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1da177e4 LT |
1 | /* lance.c: An AMD LANCE/PCnet ethernet driver for Linux. */ |
2 | /* | |
3 | Written/copyright 1993-1998 by Donald Becker. | |
4 | ||
5 | Copyright 1993 United States Government as represented by the | |
6 | Director, National Security Agency. | |
7 | This software may be used and distributed according to the terms | |
8 | of the GNU General Public License, incorporated herein by reference. | |
9 | ||
10 | This driver is for the Allied Telesis AT1500 and HP J2405A, and should work | |
11 | with most other LANCE-based bus-master (NE2100/NE2500) ethercards. | |
12 | ||
13 | The author may be reached as becker@scyld.com, or C/O | |
14 | Scyld Computing Corporation | |
15 | 410 Severn Ave., Suite 210 | |
16 | Annapolis MD 21403 | |
17 | ||
18 | Andrey V. Savochkin: | |
19 | - alignment problem with 1.3.* kernel and some minor changes. | |
20 | Thomas Bogendoerfer (tsbogend@bigbug.franken.de): | |
21 | - added support for Linux/Alpha, but removed most of it, because | |
22 | it worked only for the PCI chip. | |
23 | - added hook for the 32bit lance driver | |
24 | - added PCnetPCI II (79C970A) to chip table | |
25 | Paul Gortmaker (gpg109@rsphy1.anu.edu.au): | |
26 | - hopefully fix above so Linux/Alpha can use ISA cards too. | |
27 | 8/20/96 Fixed 7990 autoIRQ failure and reversed unneeded alignment -djb | |
28 | v1.12 10/27/97 Module support -djb | |
29 | v1.14 2/3/98 Module support modified, made PCI support optional -djb | |
30 | v1.15 5/27/99 Fixed bug in the cleanup_module(). dev->priv was freed | |
31 | before unregister_netdev() which caused NULL pointer | |
32 | reference later in the chain (in rtnetlink_fill_ifinfo()) | |
33 | -- Mika Kuoppala <miku@iki.fi> | |
34 | ||
35 | Forward ported v1.14 to 2.1.129, merged the PCI and misc changes from | |
36 | the 2.1 version of the old driver - Alan Cox | |
37 | ||
38 | Get rid of check_region, check kmalloc return in lance_probe1 | |
39 | Arnaldo Carvalho de Melo <acme@conectiva.com.br> - 11/01/2001 | |
40 | ||
41 | Reworked detection, added support for Racal InterLan EtherBlaster cards | |
42 | Vesselin Kostadinov <vesok at yahoo dot com > - 22/4/2004 | |
43 | */ | |
44 | ||
45 | static const char version[] = "lance.c:v1.15ac 1999/11/13 dplatt@3do.com, becker@cesdis.gsfc.nasa.gov\n"; | |
46 | ||
47 | #include <linux/module.h> | |
48 | #include <linux/kernel.h> | |
49 | #include <linux/string.h> | |
50 | #include <linux/delay.h> | |
51 | #include <linux/errno.h> | |
52 | #include <linux/ioport.h> | |
53 | #include <linux/slab.h> | |
54 | #include <linux/interrupt.h> | |
55 | #include <linux/pci.h> | |
56 | #include <linux/init.h> | |
57 | #include <linux/netdevice.h> | |
58 | #include <linux/etherdevice.h> | |
59 | #include <linux/skbuff.h> | |
60 | #include <linux/bitops.h> | |
61 | ||
62 | #include <asm/io.h> | |
63 | #include <asm/dma.h> | |
64 | ||
65 | static unsigned int lance_portlist[] __initdata = { 0x300, 0x320, 0x340, 0x360, 0}; | |
66 | static int lance_probe1(struct net_device *dev, int ioaddr, int irq, int options); | |
67 | static int __init do_lance_probe(struct net_device *dev); | |
68 | ||
69 | ||
70 | static struct card { | |
71 | char id_offset14; | |
72 | char id_offset15; | |
73 | } cards[] = { | |
74 | { //"normal" | |
75 | .id_offset14 = 0x57, | |
76 | .id_offset15 = 0x57, | |
77 | }, | |
78 | { //NI6510EB | |
79 | .id_offset14 = 0x52, | |
80 | .id_offset15 = 0x44, | |
81 | }, | |
82 | { //Racal InterLan EtherBlaster | |
83 | .id_offset14 = 0x52, | |
84 | .id_offset15 = 0x49, | |
85 | }, | |
86 | }; | |
87 | #define NUM_CARDS 3 | |
88 | ||
89 | #ifdef LANCE_DEBUG | |
90 | static int lance_debug = LANCE_DEBUG; | |
91 | #else | |
92 | static int lance_debug = 1; | |
93 | #endif | |
94 | ||
95 | /* | |
96 | Theory of Operation | |
97 | ||
98 | I. Board Compatibility | |
99 | ||
100 | This device driver is designed for the AMD 79C960, the "PCnet-ISA | |
101 | single-chip ethernet controller for ISA". This chip is used in a wide | |
102 | variety of boards from vendors such as Allied Telesis, HP, Kingston, | |
103 | and Boca. This driver is also intended to work with older AMD 7990 | |
104 | designs, such as the NE1500 and NE2100, and newer 79C961. For convenience, | |
105 | I use the name LANCE to refer to all of the AMD chips, even though it properly | |
106 | refers only to the original 7990. | |
107 | ||
108 | II. Board-specific settings | |
109 | ||
110 | The driver is designed to work the boards that use the faster | |
111 | bus-master mode, rather than in shared memory mode. (Only older designs | |
112 | have on-board buffer memory needed to support the slower shared memory mode.) | |
113 | ||
114 | Most ISA boards have jumpered settings for the I/O base, IRQ line, and DMA | |
115 | channel. This driver probes the likely base addresses: | |
116 | {0x300, 0x320, 0x340, 0x360}. | |
117 | After the board is found it generates a DMA-timeout interrupt and uses | |
118 | autoIRQ to find the IRQ line. The DMA channel can be set with the low bits | |
119 | of the otherwise-unused dev->mem_start value (aka PARAM1). If unset it is | |
120 | probed for by enabling each free DMA channel in turn and checking if | |
121 | initialization succeeds. | |
122 | ||
123 | The HP-J2405A board is an exception: with this board it is easy to read the | |
124 | EEPROM-set values for the base, IRQ, and DMA. (Of course you must already | |
125 | _know_ the base address -- that field is for writing the EEPROM.) | |
126 | ||
127 | III. Driver operation | |
128 | ||
129 | IIIa. Ring buffers | |
130 | The LANCE uses ring buffers of Tx and Rx descriptors. Each entry describes | |
131 | the base and length of the data buffer, along with status bits. The length | |
132 | of these buffers is set by LANCE_LOG_{RX,TX}_BUFFERS, which is log_2() of | |
133 | the buffer length (rather than being directly the buffer length) for | |
134 | implementation ease. The current values are 2 (Tx) and 4 (Rx), which leads to | |
135 | ring sizes of 4 (Tx) and 16 (Rx). Increasing the number of ring entries | |
136 | needlessly uses extra space and reduces the chance that an upper layer will | |
137 | be able to reorder queued Tx packets based on priority. Decreasing the number | |
138 | of entries makes it more difficult to achieve back-to-back packet transmission | |
139 | and increases the chance that Rx ring will overflow. (Consider the worst case | |
140 | of receiving back-to-back minimum-sized packets.) | |
141 | ||
142 | The LANCE has the capability to "chain" both Rx and Tx buffers, but this driver | |
143 | statically allocates full-sized (slightly oversized -- PKT_BUF_SZ) buffers to | |
144 | avoid the administrative overhead. For the Rx side this avoids dynamically | |
145 | allocating full-sized buffers "just in case", at the expense of a | |
146 | memory-to-memory data copy for each packet received. For most systems this | |
147 | is a good tradeoff: the Rx buffer will always be in low memory, the copy | |
148 | is inexpensive, and it primes the cache for later packet processing. For Tx | |
149 | the buffers are only used when needed as low-memory bounce buffers. | |
150 | ||
151 | IIIB. 16M memory limitations. | |
152 | For the ISA bus master mode all structures used directly by the LANCE, | |
153 | the initialization block, Rx and Tx rings, and data buffers, must be | |
154 | accessible from the ISA bus, i.e. in the lower 16M of real memory. | |
155 | This is a problem for current Linux kernels on >16M machines. The network | |
156 | devices are initialized after memory initialization, and the kernel doles out | |
157 | memory from the top of memory downward. The current solution is to have a | |
158 | special network initialization routine that's called before memory | |
159 | initialization; this will eventually be generalized for all network devices. | |
160 | As mentioned before, low-memory "bounce-buffers" are used when needed. | |
161 | ||
162 | IIIC. Synchronization | |
163 | The driver runs as two independent, single-threaded flows of control. One | |
164 | is the send-packet routine, which enforces single-threaded use by the | |
165 | dev->tbusy flag. The other thread is the interrupt handler, which is single | |
166 | threaded by the hardware and other software. | |
167 | ||
168 | The send packet thread has partial control over the Tx ring and 'dev->tbusy' | |
169 | flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next | |
170 | queue slot is empty, it clears the tbusy flag when finished otherwise it sets | |
171 | the 'lp->tx_full' flag. | |
172 | ||
173 | The interrupt handler has exclusive control over the Rx ring and records stats | |
174 | from the Tx ring. (The Tx-done interrupt can't be selectively turned off, so | |
175 | we can't avoid the interrupt overhead by having the Tx routine reap the Tx | |
176 | stats.) After reaping the stats, it marks the queue entry as empty by setting | |
177 | the 'base' to zero. Iff the 'lp->tx_full' flag is set, it clears both the | |
178 | tx_full and tbusy flags. | |
179 | ||
180 | */ | |
181 | ||
182 | /* Set the number of Tx and Rx buffers, using Log_2(# buffers). | |
183 | Reasonable default values are 16 Tx buffers, and 16 Rx buffers. | |
184 | That translates to 4 and 4 (16 == 2^^4). | |
185 | This is a compile-time option for efficiency. | |
186 | */ | |
187 | #ifndef LANCE_LOG_TX_BUFFERS | |
188 | #define LANCE_LOG_TX_BUFFERS 4 | |
189 | #define LANCE_LOG_RX_BUFFERS 4 | |
190 | #endif | |
191 | ||
192 | #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS)) | |
193 | #define TX_RING_MOD_MASK (TX_RING_SIZE - 1) | |
194 | #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29) | |
195 | ||
196 | #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS)) | |
197 | #define RX_RING_MOD_MASK (RX_RING_SIZE - 1) | |
198 | #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29) | |
199 | ||
200 | #define PKT_BUF_SZ 1544 | |
201 | ||
202 | /* Offsets from base I/O address. */ | |
203 | #define LANCE_DATA 0x10 | |
204 | #define LANCE_ADDR 0x12 | |
205 | #define LANCE_RESET 0x14 | |
206 | #define LANCE_BUS_IF 0x16 | |
207 | #define LANCE_TOTAL_SIZE 0x18 | |
208 | ||
209 | #define TX_TIMEOUT 20 | |
210 | ||
211 | /* The LANCE Rx and Tx ring descriptors. */ | |
212 | struct lance_rx_head { | |
213 | s32 base; | |
214 | s16 buf_length; /* This length is 2s complement (negative)! */ | |
215 | s16 msg_length; /* This length is "normal". */ | |
216 | }; | |
217 | ||
218 | struct lance_tx_head { | |
219 | s32 base; | |
220 | s16 length; /* Length is 2s complement (negative)! */ | |
221 | s16 misc; | |
222 | }; | |
223 | ||
224 | /* The LANCE initialization block, described in databook. */ | |
225 | struct lance_init_block { | |
226 | u16 mode; /* Pre-set mode (reg. 15) */ | |
227 | u8 phys_addr[6]; /* Physical ethernet address */ | |
228 | u32 filter[2]; /* Multicast filter (unused). */ | |
229 | /* Receive and transmit ring base, along with extra bits. */ | |
230 | u32 rx_ring; /* Tx and Rx ring base pointers */ | |
231 | u32 tx_ring; | |
232 | }; | |
233 | ||
234 | struct lance_private { | |
235 | /* The Tx and Rx ring entries must be aligned on 8-byte boundaries. */ | |
236 | struct lance_rx_head rx_ring[RX_RING_SIZE]; | |
237 | struct lance_tx_head tx_ring[TX_RING_SIZE]; | |
238 | struct lance_init_block init_block; | |
239 | const char *name; | |
240 | /* The saved address of a sent-in-place packet/buffer, for skfree(). */ | |
241 | struct sk_buff* tx_skbuff[TX_RING_SIZE]; | |
242 | /* The addresses of receive-in-place skbuffs. */ | |
243 | struct sk_buff* rx_skbuff[RX_RING_SIZE]; | |
244 | unsigned long rx_buffs; /* Address of Rx and Tx buffers. */ | |
245 | /* Tx low-memory "bounce buffer" address. */ | |
246 | char (*tx_bounce_buffs)[PKT_BUF_SZ]; | |
247 | int cur_rx, cur_tx; /* The next free ring entry */ | |
248 | int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */ | |
249 | int dma; | |
250 | struct net_device_stats stats; | |
251 | unsigned char chip_version; /* See lance_chip_type. */ | |
252 | spinlock_t devlock; | |
253 | }; | |
254 | ||
255 | #define LANCE_MUST_PAD 0x00000001 | |
256 | #define LANCE_ENABLE_AUTOSELECT 0x00000002 | |
257 | #define LANCE_MUST_REINIT_RING 0x00000004 | |
258 | #define LANCE_MUST_UNRESET 0x00000008 | |
259 | #define LANCE_HAS_MISSED_FRAME 0x00000010 | |
260 | ||
261 | /* A mapping from the chip ID number to the part number and features. | |
262 | These are from the datasheets -- in real life the '970 version | |
263 | reportedly has the same ID as the '965. */ | |
264 | static struct lance_chip_type { | |
265 | int id_number; | |
266 | const char *name; | |
267 | int flags; | |
268 | } chip_table[] = { | |
269 | {0x0000, "LANCE 7990", /* Ancient lance chip. */ | |
270 | LANCE_MUST_PAD + LANCE_MUST_UNRESET}, | |
271 | {0x0003, "PCnet/ISA 79C960", /* 79C960 PCnet/ISA. */ | |
272 | LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING + | |
273 | LANCE_HAS_MISSED_FRAME}, | |
274 | {0x2260, "PCnet/ISA+ 79C961", /* 79C961 PCnet/ISA+, Plug-n-Play. */ | |
275 | LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING + | |
276 | LANCE_HAS_MISSED_FRAME}, | |
277 | {0x2420, "PCnet/PCI 79C970", /* 79C970 or 79C974 PCnet-SCSI, PCI. */ | |
278 | LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING + | |
279 | LANCE_HAS_MISSED_FRAME}, | |
280 | /* Bug: the PCnet/PCI actually uses the PCnet/VLB ID number, so just call | |
281 | it the PCnet32. */ | |
282 | {0x2430, "PCnet32", /* 79C965 PCnet for VL bus. */ | |
283 | LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING + | |
284 | LANCE_HAS_MISSED_FRAME}, | |
285 | {0x2621, "PCnet/PCI-II 79C970A", /* 79C970A PCInetPCI II. */ | |
286 | LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING + | |
287 | LANCE_HAS_MISSED_FRAME}, | |
288 | {0x0, "PCnet (unknown)", | |
289 | LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING + | |
290 | LANCE_HAS_MISSED_FRAME}, | |
291 | }; | |
292 | ||
293 | enum {OLD_LANCE = 0, PCNET_ISA=1, PCNET_ISAP=2, PCNET_PCI=3, PCNET_VLB=4, PCNET_PCI_II=5, LANCE_UNKNOWN=6}; | |
294 | ||
295 | ||
296 | /* Non-zero if lance_probe1() needs to allocate low-memory bounce buffers. | |
297 | Assume yes until we know the memory size. */ | |
298 | static unsigned char lance_need_isa_bounce_buffers = 1; | |
299 | ||
300 | static int lance_open(struct net_device *dev); | |
9e24974d | 301 | static void lance_init_ring(struct net_device *dev, gfp_t mode); |
1da177e4 LT |
302 | static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev); |
303 | static int lance_rx(struct net_device *dev); | |
304 | static irqreturn_t lance_interrupt(int irq, void *dev_id, struct pt_regs *regs); | |
305 | static int lance_close(struct net_device *dev); | |
306 | static struct net_device_stats *lance_get_stats(struct net_device *dev); | |
307 | static void set_multicast_list(struct net_device *dev); | |
308 | static void lance_tx_timeout (struct net_device *dev); | |
309 | ||
310 | \f | |
311 | ||
1da177e4 LT |
312 | #ifdef MODULE |
313 | #define MAX_CARDS 8 /* Max number of interfaces (cards) per module */ | |
314 | ||
315 | static struct net_device *dev_lance[MAX_CARDS]; | |
316 | static int io[MAX_CARDS]; | |
317 | static int dma[MAX_CARDS]; | |
318 | static int irq[MAX_CARDS]; | |
319 | ||
320 | module_param_array(io, int, NULL, 0); | |
321 | module_param_array(dma, int, NULL, 0); | |
322 | module_param_array(irq, int, NULL, 0); | |
323 | module_param(lance_debug, int, 0); | |
324 | MODULE_PARM_DESC(io, "LANCE/PCnet I/O base address(es),required"); | |
325 | MODULE_PARM_DESC(dma, "LANCE/PCnet ISA DMA channel (ignored for some devices)"); | |
326 | MODULE_PARM_DESC(irq, "LANCE/PCnet IRQ number (ignored for some devices)"); | |
327 | MODULE_PARM_DESC(lance_debug, "LANCE/PCnet debug level (0-7)"); | |
328 | ||
329 | int init_module(void) | |
330 | { | |
331 | struct net_device *dev; | |
332 | int this_dev, found = 0; | |
333 | ||
334 | for (this_dev = 0; this_dev < MAX_CARDS; this_dev++) { | |
335 | if (io[this_dev] == 0) { | |
336 | if (this_dev != 0) /* only complain once */ | |
337 | break; | |
338 | printk(KERN_NOTICE "lance.c: Module autoprobing not allowed. Append \"io=0xNNN\" value(s).\n"); | |
339 | return -EPERM; | |
340 | } | |
341 | dev = alloc_etherdev(0); | |
342 | if (!dev) | |
343 | break; | |
344 | dev->irq = irq[this_dev]; | |
345 | dev->base_addr = io[this_dev]; | |
346 | dev->dma = dma[this_dev]; | |
347 | if (do_lance_probe(dev) == 0) { | |
b1fc5505 HX |
348 | dev_lance[found++] = dev; |
349 | continue; | |
1da177e4 LT |
350 | } |
351 | free_netdev(dev); | |
352 | break; | |
353 | } | |
354 | if (found != 0) | |
355 | return 0; | |
356 | return -ENXIO; | |
357 | } | |
358 | ||
64916f1e DV |
359 | static void cleanup_card(struct net_device *dev) |
360 | { | |
361 | struct lance_private *lp = dev->priv; | |
362 | if (dev->dma != 4) | |
363 | free_dma(dev->dma); | |
364 | release_region(dev->base_addr, LANCE_TOTAL_SIZE); | |
365 | kfree(lp->tx_bounce_buffs); | |
366 | kfree((void*)lp->rx_buffs); | |
367 | kfree(lp); | |
368 | } | |
369 | ||
1da177e4 LT |
370 | void cleanup_module(void) |
371 | { | |
372 | int this_dev; | |
373 | ||
374 | for (this_dev = 0; this_dev < MAX_CARDS; this_dev++) { | |
375 | struct net_device *dev = dev_lance[this_dev]; | |
376 | if (dev) { | |
377 | unregister_netdev(dev); | |
378 | cleanup_card(dev); | |
379 | free_netdev(dev); | |
380 | } | |
381 | } | |
382 | } | |
383 | #endif /* MODULE */ | |
384 | MODULE_LICENSE("GPL"); | |
385 | ||
386 | ||
387 | /* Starting in v2.1.*, the LANCE/PCnet probe is now similar to the other | |
388 | board probes now that kmalloc() can allocate ISA DMA-able regions. | |
389 | This also allows the LANCE driver to be used as a module. | |
390 | */ | |
391 | static int __init do_lance_probe(struct net_device *dev) | |
392 | { | |
393 | int *port, result; | |
394 | ||
395 | if (high_memory <= phys_to_virt(16*1024*1024)) | |
396 | lance_need_isa_bounce_buffers = 0; | |
397 | ||
398 | for (port = lance_portlist; *port; port++) { | |
399 | int ioaddr = *port; | |
400 | struct resource *r = request_region(ioaddr, LANCE_TOTAL_SIZE, | |
401 | "lance-probe"); | |
402 | ||
403 | if (r) { | |
404 | /* Detect the card with minimal I/O reads */ | |
405 | char offset14 = inb(ioaddr + 14); | |
406 | int card; | |
407 | for (card = 0; card < NUM_CARDS; ++card) | |
408 | if (cards[card].id_offset14 == offset14) | |
409 | break; | |
410 | if (card < NUM_CARDS) {/*yes, the first byte matches*/ | |
411 | char offset15 = inb(ioaddr + 15); | |
412 | for (card = 0; card < NUM_CARDS; ++card) | |
413 | if ((cards[card].id_offset14 == offset14) && | |
414 | (cards[card].id_offset15 == offset15)) | |
415 | break; | |
416 | } | |
417 | if (card < NUM_CARDS) { /*Signature OK*/ | |
418 | result = lance_probe1(dev, ioaddr, 0, 0); | |
419 | if (!result) { | |
420 | struct lance_private *lp = dev->priv; | |
421 | int ver = lp->chip_version; | |
422 | ||
423 | r->name = chip_table[ver].name; | |
424 | return 0; | |
425 | } | |
426 | } | |
427 | release_region(ioaddr, LANCE_TOTAL_SIZE); | |
428 | } | |
429 | } | |
430 | return -ENODEV; | |
431 | } | |
432 | ||
433 | #ifndef MODULE | |
434 | struct net_device * __init lance_probe(int unit) | |
435 | { | |
436 | struct net_device *dev = alloc_etherdev(0); | |
437 | int err; | |
438 | ||
439 | if (!dev) | |
440 | return ERR_PTR(-ENODEV); | |
441 | ||
442 | sprintf(dev->name, "eth%d", unit); | |
443 | netdev_boot_setup_check(dev); | |
444 | ||
445 | err = do_lance_probe(dev); | |
446 | if (err) | |
447 | goto out; | |
1da177e4 | 448 | return dev; |
1da177e4 LT |
449 | out: |
450 | free_netdev(dev); | |
451 | return ERR_PTR(err); | |
452 | } | |
453 | #endif | |
454 | ||
455 | static int __init lance_probe1(struct net_device *dev, int ioaddr, int irq, int options) | |
456 | { | |
457 | struct lance_private *lp; | |
458 | long dma_channels; /* Mark spuriously-busy DMA channels */ | |
459 | int i, reset_val, lance_version; | |
460 | const char *chipname; | |
461 | /* Flags for specific chips or boards. */ | |
462 | unsigned char hpJ2405A = 0; /* HP ISA adaptor */ | |
463 | int hp_builtin = 0; /* HP on-board ethernet. */ | |
464 | static int did_version; /* Already printed version info. */ | |
465 | unsigned long flags; | |
466 | int err = -ENOMEM; | |
467 | ||
468 | /* First we look for special cases. | |
469 | Check for HP's on-board ethernet by looking for 'HP' in the BIOS. | |
470 | There are two HP versions, check the BIOS for the configuration port. | |
471 | This method provided by L. Julliard, Laurent_Julliard@grenoble.hp.com. | |
472 | */ | |
473 | if (isa_readw(0x000f0102) == 0x5048) { | |
474 | static const short ioaddr_table[] = { 0x300, 0x320, 0x340, 0x360}; | |
475 | int hp_port = (isa_readl(0x000f00f1) & 1) ? 0x499 : 0x99; | |
476 | /* We can have boards other than the built-in! Verify this is on-board. */ | |
477 | if ((inb(hp_port) & 0xc0) == 0x80 | |
478 | && ioaddr_table[inb(hp_port) & 3] == ioaddr) | |
479 | hp_builtin = hp_port; | |
480 | } | |
481 | /* We also recognize the HP Vectra on-board here, but check below. */ | |
482 | hpJ2405A = (inb(ioaddr) == 0x08 && inb(ioaddr+1) == 0x00 | |
483 | && inb(ioaddr+2) == 0x09); | |
484 | ||
485 | /* Reset the LANCE. */ | |
486 | reset_val = inw(ioaddr+LANCE_RESET); /* Reset the LANCE */ | |
487 | ||
488 | /* The Un-Reset needed is only needed for the real NE2100, and will | |
489 | confuse the HP board. */ | |
490 | if (!hpJ2405A) | |
491 | outw(reset_val, ioaddr+LANCE_RESET); | |
492 | ||
493 | outw(0x0000, ioaddr+LANCE_ADDR); /* Switch to window 0 */ | |
494 | if (inw(ioaddr+LANCE_DATA) != 0x0004) | |
495 | return -ENODEV; | |
496 | ||
497 | /* Get the version of the chip. */ | |
498 | outw(88, ioaddr+LANCE_ADDR); | |
499 | if (inw(ioaddr+LANCE_ADDR) != 88) { | |
500 | lance_version = 0; | |
501 | } else { /* Good, it's a newer chip. */ | |
502 | int chip_version = inw(ioaddr+LANCE_DATA); | |
503 | outw(89, ioaddr+LANCE_ADDR); | |
504 | chip_version |= inw(ioaddr+LANCE_DATA) << 16; | |
505 | if (lance_debug > 2) | |
506 | printk(" LANCE chip version is %#x.\n", chip_version); | |
507 | if ((chip_version & 0xfff) != 0x003) | |
508 | return -ENODEV; | |
509 | chip_version = (chip_version >> 12) & 0xffff; | |
510 | for (lance_version = 1; chip_table[lance_version].id_number; lance_version++) { | |
511 | if (chip_table[lance_version].id_number == chip_version) | |
512 | break; | |
513 | } | |
514 | } | |
515 | ||
516 | /* We can't allocate dev->priv from alloc_etherdev() because it must | |
517 | a ISA DMA-able region. */ | |
518 | SET_MODULE_OWNER(dev); | |
519 | chipname = chip_table[lance_version].name; | |
520 | printk("%s: %s at %#3x,", dev->name, chipname, ioaddr); | |
521 | ||
522 | /* There is a 16 byte station address PROM at the base address. | |
523 | The first six bytes are the station address. */ | |
524 | for (i = 0; i < 6; i++) | |
525 | printk(" %2.2x", dev->dev_addr[i] = inb(ioaddr + i)); | |
526 | ||
527 | dev->base_addr = ioaddr; | |
528 | /* Make certain the data structures used by the LANCE are aligned and DMAble. */ | |
529 | ||
530 | lp = kmalloc(sizeof(*lp), GFP_DMA | GFP_KERNEL); | |
531 | if(lp==NULL) | |
532 | return -ENODEV; | |
533 | if (lance_debug > 6) printk(" (#0x%05lx)", (unsigned long)lp); | |
534 | memset(lp, 0, sizeof(*lp)); | |
535 | dev->priv = lp; | |
536 | lp->name = chipname; | |
537 | lp->rx_buffs = (unsigned long)kmalloc(PKT_BUF_SZ*RX_RING_SIZE, | |
538 | GFP_DMA | GFP_KERNEL); | |
539 | if (!lp->rx_buffs) | |
540 | goto out_lp; | |
541 | if (lance_need_isa_bounce_buffers) { | |
542 | lp->tx_bounce_buffs = kmalloc(PKT_BUF_SZ*TX_RING_SIZE, | |
543 | GFP_DMA | GFP_KERNEL); | |
544 | if (!lp->tx_bounce_buffs) | |
545 | goto out_rx; | |
546 | } else | |
547 | lp->tx_bounce_buffs = NULL; | |
548 | ||
549 | lp->chip_version = lance_version; | |
550 | spin_lock_init(&lp->devlock); | |
551 | ||
552 | lp->init_block.mode = 0x0003; /* Disable Rx and Tx. */ | |
553 | for (i = 0; i < 6; i++) | |
554 | lp->init_block.phys_addr[i] = dev->dev_addr[i]; | |
555 | lp->init_block.filter[0] = 0x00000000; | |
556 | lp->init_block.filter[1] = 0x00000000; | |
557 | lp->init_block.rx_ring = ((u32)isa_virt_to_bus(lp->rx_ring) & 0xffffff) | RX_RING_LEN_BITS; | |
558 | lp->init_block.tx_ring = ((u32)isa_virt_to_bus(lp->tx_ring) & 0xffffff) | TX_RING_LEN_BITS; | |
559 | ||
560 | outw(0x0001, ioaddr+LANCE_ADDR); | |
561 | inw(ioaddr+LANCE_ADDR); | |
562 | outw((short) (u32) isa_virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA); | |
563 | outw(0x0002, ioaddr+LANCE_ADDR); | |
564 | inw(ioaddr+LANCE_ADDR); | |
565 | outw(((u32)isa_virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA); | |
566 | outw(0x0000, ioaddr+LANCE_ADDR); | |
567 | inw(ioaddr+LANCE_ADDR); | |
568 | ||
569 | if (irq) { /* Set iff PCI card. */ | |
570 | dev->dma = 4; /* Native bus-master, no DMA channel needed. */ | |
571 | dev->irq = irq; | |
572 | } else if (hp_builtin) { | |
573 | static const char dma_tbl[4] = {3, 5, 6, 0}; | |
574 | static const char irq_tbl[4] = {3, 4, 5, 9}; | |
575 | unsigned char port_val = inb(hp_builtin); | |
576 | dev->dma = dma_tbl[(port_val >> 4) & 3]; | |
577 | dev->irq = irq_tbl[(port_val >> 2) & 3]; | |
578 | printk(" HP Vectra IRQ %d DMA %d.\n", dev->irq, dev->dma); | |
579 | } else if (hpJ2405A) { | |
580 | static const char dma_tbl[4] = {3, 5, 6, 7}; | |
581 | static const char irq_tbl[8] = {3, 4, 5, 9, 10, 11, 12, 15}; | |
582 | short reset_val = inw(ioaddr+LANCE_RESET); | |
583 | dev->dma = dma_tbl[(reset_val >> 2) & 3]; | |
584 | dev->irq = irq_tbl[(reset_val >> 4) & 7]; | |
585 | printk(" HP J2405A IRQ %d DMA %d.\n", dev->irq, dev->dma); | |
586 | } else if (lance_version == PCNET_ISAP) { /* The plug-n-play version. */ | |
587 | short bus_info; | |
588 | outw(8, ioaddr+LANCE_ADDR); | |
589 | bus_info = inw(ioaddr+LANCE_BUS_IF); | |
590 | dev->dma = bus_info & 0x07; | |
591 | dev->irq = (bus_info >> 4) & 0x0F; | |
592 | } else { | |
593 | /* The DMA channel may be passed in PARAM1. */ | |
594 | if (dev->mem_start & 0x07) | |
595 | dev->dma = dev->mem_start & 0x07; | |
596 | } | |
597 | ||
598 | if (dev->dma == 0) { | |
599 | /* Read the DMA channel status register, so that we can avoid | |
600 | stuck DMA channels in the DMA detection below. */ | |
601 | dma_channels = ((inb(DMA1_STAT_REG) >> 4) & 0x0f) | | |
602 | (inb(DMA2_STAT_REG) & 0xf0); | |
603 | } | |
604 | err = -ENODEV; | |
605 | if (dev->irq >= 2) | |
606 | printk(" assigned IRQ %d", dev->irq); | |
607 | else if (lance_version != 0) { /* 7990 boards need DMA detection first. */ | |
608 | unsigned long irq_mask; | |
609 | ||
610 | /* To auto-IRQ we enable the initialization-done and DMA error | |
611 | interrupts. For ISA boards we get a DMA error, but VLB and PCI | |
612 | boards will work. */ | |
613 | irq_mask = probe_irq_on(); | |
614 | ||
615 | /* Trigger an initialization just for the interrupt. */ | |
616 | outw(0x0041, ioaddr+LANCE_DATA); | |
617 | ||
618 | mdelay(20); | |
619 | dev->irq = probe_irq_off(irq_mask); | |
620 | if (dev->irq) | |
621 | printk(", probed IRQ %d", dev->irq); | |
622 | else { | |
623 | printk(", failed to detect IRQ line.\n"); | |
624 | goto out_tx; | |
625 | } | |
626 | ||
627 | /* Check for the initialization done bit, 0x0100, which means | |
628 | that we don't need a DMA channel. */ | |
629 | if (inw(ioaddr+LANCE_DATA) & 0x0100) | |
630 | dev->dma = 4; | |
631 | } | |
632 | ||
633 | if (dev->dma == 4) { | |
634 | printk(", no DMA needed.\n"); | |
635 | } else if (dev->dma) { | |
636 | if (request_dma(dev->dma, chipname)) { | |
637 | printk("DMA %d allocation failed.\n", dev->dma); | |
638 | goto out_tx; | |
639 | } else | |
640 | printk(", assigned DMA %d.\n", dev->dma); | |
641 | } else { /* OK, we have to auto-DMA. */ | |
642 | for (i = 0; i < 4; i++) { | |
643 | static const char dmas[] = { 5, 6, 7, 3 }; | |
644 | int dma = dmas[i]; | |
645 | int boguscnt; | |
646 | ||
647 | /* Don't enable a permanently busy DMA channel, or the machine | |
648 | will hang. */ | |
649 | if (test_bit(dma, &dma_channels)) | |
650 | continue; | |
651 | outw(0x7f04, ioaddr+LANCE_DATA); /* Clear the memory error bits. */ | |
652 | if (request_dma(dma, chipname)) | |
653 | continue; | |
654 | ||
655 | flags=claim_dma_lock(); | |
656 | set_dma_mode(dma, DMA_MODE_CASCADE); | |
657 | enable_dma(dma); | |
658 | release_dma_lock(flags); | |
659 | ||
660 | /* Trigger an initialization. */ | |
661 | outw(0x0001, ioaddr+LANCE_DATA); | |
662 | for (boguscnt = 100; boguscnt > 0; --boguscnt) | |
663 | if (inw(ioaddr+LANCE_DATA) & 0x0900) | |
664 | break; | |
665 | if (inw(ioaddr+LANCE_DATA) & 0x0100) { | |
666 | dev->dma = dma; | |
667 | printk(", DMA %d.\n", dev->dma); | |
668 | break; | |
669 | } else { | |
670 | flags=claim_dma_lock(); | |
671 | disable_dma(dma); | |
672 | release_dma_lock(flags); | |
673 | free_dma(dma); | |
674 | } | |
675 | } | |
676 | if (i == 4) { /* Failure: bail. */ | |
677 | printk("DMA detection failed.\n"); | |
678 | goto out_tx; | |
679 | } | |
680 | } | |
681 | ||
682 | if (lance_version == 0 && dev->irq == 0) { | |
683 | /* We may auto-IRQ now that we have a DMA channel. */ | |
684 | /* Trigger an initialization just for the interrupt. */ | |
685 | unsigned long irq_mask; | |
686 | ||
687 | irq_mask = probe_irq_on(); | |
688 | outw(0x0041, ioaddr+LANCE_DATA); | |
689 | ||
690 | mdelay(40); | |
691 | dev->irq = probe_irq_off(irq_mask); | |
692 | if (dev->irq == 0) { | |
693 | printk(" Failed to detect the 7990 IRQ line.\n"); | |
694 | goto out_dma; | |
695 | } | |
696 | printk(" Auto-IRQ detected IRQ%d.\n", dev->irq); | |
697 | } | |
698 | ||
699 | if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) { | |
700 | /* Turn on auto-select of media (10baseT or BNC) so that the user | |
701 | can watch the LEDs even if the board isn't opened. */ | |
702 | outw(0x0002, ioaddr+LANCE_ADDR); | |
703 | /* Don't touch 10base2 power bit. */ | |
704 | outw(inw(ioaddr+LANCE_BUS_IF) | 0x0002, ioaddr+LANCE_BUS_IF); | |
705 | } | |
706 | ||
707 | if (lance_debug > 0 && did_version++ == 0) | |
708 | printk(version); | |
709 | ||
710 | /* The LANCE-specific entries in the device structure. */ | |
711 | dev->open = lance_open; | |
712 | dev->hard_start_xmit = lance_start_xmit; | |
713 | dev->stop = lance_close; | |
714 | dev->get_stats = lance_get_stats; | |
715 | dev->set_multicast_list = set_multicast_list; | |
716 | dev->tx_timeout = lance_tx_timeout; | |
717 | dev->watchdog_timeo = TX_TIMEOUT; | |
718 | ||
b1fc5505 HX |
719 | err = register_netdev(dev); |
720 | if (err) | |
721 | goto out_dma; | |
1da177e4 LT |
722 | return 0; |
723 | out_dma: | |
724 | if (dev->dma != 4) | |
725 | free_dma(dev->dma); | |
726 | out_tx: | |
727 | kfree(lp->tx_bounce_buffs); | |
728 | out_rx: | |
729 | kfree((void*)lp->rx_buffs); | |
730 | out_lp: | |
731 | kfree(lp); | |
732 | return err; | |
733 | } | |
734 | ||
735 | \f | |
736 | static int | |
737 | lance_open(struct net_device *dev) | |
738 | { | |
739 | struct lance_private *lp = dev->priv; | |
740 | int ioaddr = dev->base_addr; | |
741 | int i; | |
742 | ||
743 | if (dev->irq == 0 || | |
744 | request_irq(dev->irq, &lance_interrupt, 0, lp->name, dev)) { | |
745 | return -EAGAIN; | |
746 | } | |
747 | ||
748 | /* We used to allocate DMA here, but that was silly. | |
749 | DMA lines can't be shared! We now permanently allocate them. */ | |
750 | ||
751 | /* Reset the LANCE */ | |
752 | inw(ioaddr+LANCE_RESET); | |
753 | ||
754 | /* The DMA controller is used as a no-operation slave, "cascade mode". */ | |
755 | if (dev->dma != 4) { | |
756 | unsigned long flags=claim_dma_lock(); | |
757 | enable_dma(dev->dma); | |
758 | set_dma_mode(dev->dma, DMA_MODE_CASCADE); | |
759 | release_dma_lock(flags); | |
760 | } | |
761 | ||
762 | /* Un-Reset the LANCE, needed only for the NE2100. */ | |
763 | if (chip_table[lp->chip_version].flags & LANCE_MUST_UNRESET) | |
764 | outw(0, ioaddr+LANCE_RESET); | |
765 | ||
766 | if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) { | |
767 | /* This is 79C960-specific: Turn on auto-select of media (AUI, BNC). */ | |
768 | outw(0x0002, ioaddr+LANCE_ADDR); | |
769 | /* Only touch autoselect bit. */ | |
770 | outw(inw(ioaddr+LANCE_BUS_IF) | 0x0002, ioaddr+LANCE_BUS_IF); | |
771 | } | |
772 | ||
773 | if (lance_debug > 1) | |
774 | printk("%s: lance_open() irq %d dma %d tx/rx rings %#x/%#x init %#x.\n", | |
775 | dev->name, dev->irq, dev->dma, | |
776 | (u32) isa_virt_to_bus(lp->tx_ring), | |
777 | (u32) isa_virt_to_bus(lp->rx_ring), | |
778 | (u32) isa_virt_to_bus(&lp->init_block)); | |
779 | ||
780 | lance_init_ring(dev, GFP_KERNEL); | |
781 | /* Re-initialize the LANCE, and start it when done. */ | |
782 | outw(0x0001, ioaddr+LANCE_ADDR); | |
783 | outw((short) (u32) isa_virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA); | |
784 | outw(0x0002, ioaddr+LANCE_ADDR); | |
785 | outw(((u32)isa_virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA); | |
786 | ||
787 | outw(0x0004, ioaddr+LANCE_ADDR); | |
788 | outw(0x0915, ioaddr+LANCE_DATA); | |
789 | ||
790 | outw(0x0000, ioaddr+LANCE_ADDR); | |
791 | outw(0x0001, ioaddr+LANCE_DATA); | |
792 | ||
793 | netif_start_queue (dev); | |
794 | ||
795 | i = 0; | |
796 | while (i++ < 100) | |
797 | if (inw(ioaddr+LANCE_DATA) & 0x0100) | |
798 | break; | |
799 | /* | |
800 | * We used to clear the InitDone bit, 0x0100, here but Mark Stockton | |
801 | * reports that doing so triggers a bug in the '974. | |
802 | */ | |
803 | outw(0x0042, ioaddr+LANCE_DATA); | |
804 | ||
805 | if (lance_debug > 2) | |
806 | printk("%s: LANCE open after %d ticks, init block %#x csr0 %4.4x.\n", | |
807 | dev->name, i, (u32) isa_virt_to_bus(&lp->init_block), inw(ioaddr+LANCE_DATA)); | |
808 | ||
809 | return 0; /* Always succeed */ | |
810 | } | |
811 | ||
812 | /* The LANCE has been halted for one reason or another (busmaster memory | |
813 | arbitration error, Tx FIFO underflow, driver stopped it to reconfigure, | |
814 | etc.). Modern LANCE variants always reload their ring-buffer | |
815 | configuration when restarted, so we must reinitialize our ring | |
816 | context before restarting. As part of this reinitialization, | |
817 | find all packets still on the Tx ring and pretend that they had been | |
818 | sent (in effect, drop the packets on the floor) - the higher-level | |
819 | protocols will time out and retransmit. It'd be better to shuffle | |
820 | these skbs to a temp list and then actually re-Tx them after | |
821 | restarting the chip, but I'm too lazy to do so right now. dplatt@3do.com | |
822 | */ | |
823 | ||
824 | static void | |
825 | lance_purge_ring(struct net_device *dev) | |
826 | { | |
827 | struct lance_private *lp = dev->priv; | |
828 | int i; | |
829 | ||
830 | /* Free all the skbuffs in the Rx and Tx queues. */ | |
831 | for (i = 0; i < RX_RING_SIZE; i++) { | |
832 | struct sk_buff *skb = lp->rx_skbuff[i]; | |
833 | lp->rx_skbuff[i] = NULL; | |
834 | lp->rx_ring[i].base = 0; /* Not owned by LANCE chip. */ | |
835 | if (skb) | |
836 | dev_kfree_skb_any(skb); | |
837 | } | |
838 | for (i = 0; i < TX_RING_SIZE; i++) { | |
839 | if (lp->tx_skbuff[i]) { | |
840 | dev_kfree_skb_any(lp->tx_skbuff[i]); | |
841 | lp->tx_skbuff[i] = NULL; | |
842 | } | |
843 | } | |
844 | } | |
845 | ||
846 | ||
847 | /* Initialize the LANCE Rx and Tx rings. */ | |
848 | static void | |
9e24974d | 849 | lance_init_ring(struct net_device *dev, gfp_t gfp) |
1da177e4 LT |
850 | { |
851 | struct lance_private *lp = dev->priv; | |
852 | int i; | |
853 | ||
854 | lp->cur_rx = lp->cur_tx = 0; | |
855 | lp->dirty_rx = lp->dirty_tx = 0; | |
856 | ||
857 | for (i = 0; i < RX_RING_SIZE; i++) { | |
858 | struct sk_buff *skb; | |
859 | void *rx_buff; | |
860 | ||
861 | skb = alloc_skb(PKT_BUF_SZ, GFP_DMA | gfp); | |
862 | lp->rx_skbuff[i] = skb; | |
863 | if (skb) { | |
864 | skb->dev = dev; | |
689be439 | 865 | rx_buff = skb->data; |
1da177e4 LT |
866 | } else |
867 | rx_buff = kmalloc(PKT_BUF_SZ, GFP_DMA | gfp); | |
868 | if (rx_buff == NULL) | |
869 | lp->rx_ring[i].base = 0; | |
870 | else | |
871 | lp->rx_ring[i].base = (u32)isa_virt_to_bus(rx_buff) | 0x80000000; | |
872 | lp->rx_ring[i].buf_length = -PKT_BUF_SZ; | |
873 | } | |
874 | /* The Tx buffer address is filled in as needed, but we do need to clear | |
875 | the upper ownership bit. */ | |
876 | for (i = 0; i < TX_RING_SIZE; i++) { | |
877 | lp->tx_skbuff[i] = NULL; | |
878 | lp->tx_ring[i].base = 0; | |
879 | } | |
880 | ||
881 | lp->init_block.mode = 0x0000; | |
882 | for (i = 0; i < 6; i++) | |
883 | lp->init_block.phys_addr[i] = dev->dev_addr[i]; | |
884 | lp->init_block.filter[0] = 0x00000000; | |
885 | lp->init_block.filter[1] = 0x00000000; | |
886 | lp->init_block.rx_ring = ((u32)isa_virt_to_bus(lp->rx_ring) & 0xffffff) | RX_RING_LEN_BITS; | |
887 | lp->init_block.tx_ring = ((u32)isa_virt_to_bus(lp->tx_ring) & 0xffffff) | TX_RING_LEN_BITS; | |
888 | } | |
889 | ||
890 | static void | |
891 | lance_restart(struct net_device *dev, unsigned int csr0_bits, int must_reinit) | |
892 | { | |
893 | struct lance_private *lp = dev->priv; | |
894 | ||
895 | if (must_reinit || | |
896 | (chip_table[lp->chip_version].flags & LANCE_MUST_REINIT_RING)) { | |
897 | lance_purge_ring(dev); | |
898 | lance_init_ring(dev, GFP_ATOMIC); | |
899 | } | |
900 | outw(0x0000, dev->base_addr + LANCE_ADDR); | |
901 | outw(csr0_bits, dev->base_addr + LANCE_DATA); | |
902 | } | |
903 | ||
904 | ||
905 | static void lance_tx_timeout (struct net_device *dev) | |
906 | { | |
907 | struct lance_private *lp = (struct lance_private *) dev->priv; | |
908 | int ioaddr = dev->base_addr; | |
909 | ||
910 | outw (0, ioaddr + LANCE_ADDR); | |
911 | printk ("%s: transmit timed out, status %4.4x, resetting.\n", | |
912 | dev->name, inw (ioaddr + LANCE_DATA)); | |
913 | outw (0x0004, ioaddr + LANCE_DATA); | |
914 | lp->stats.tx_errors++; | |
915 | #ifndef final_version | |
916 | if (lance_debug > 3) { | |
917 | int i; | |
918 | printk (" Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.", | |
919 | lp->dirty_tx, lp->cur_tx, netif_queue_stopped(dev) ? " (full)" : "", | |
920 | lp->cur_rx); | |
921 | for (i = 0; i < RX_RING_SIZE; i++) | |
922 | printk ("%s %08x %04x %04x", i & 0x3 ? "" : "\n ", | |
923 | lp->rx_ring[i].base, -lp->rx_ring[i].buf_length, | |
924 | lp->rx_ring[i].msg_length); | |
925 | for (i = 0; i < TX_RING_SIZE; i++) | |
926 | printk ("%s %08x %04x %04x", i & 0x3 ? "" : "\n ", | |
927 | lp->tx_ring[i].base, -lp->tx_ring[i].length, | |
928 | lp->tx_ring[i].misc); | |
929 | printk ("\n"); | |
930 | } | |
931 | #endif | |
932 | lance_restart (dev, 0x0043, 1); | |
933 | ||
934 | dev->trans_start = jiffies; | |
935 | netif_wake_queue (dev); | |
936 | } | |
937 | ||
938 | ||
939 | static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev) | |
940 | { | |
941 | struct lance_private *lp = dev->priv; | |
942 | int ioaddr = dev->base_addr; | |
943 | int entry; | |
944 | unsigned long flags; | |
945 | ||
946 | spin_lock_irqsave(&lp->devlock, flags); | |
947 | ||
948 | if (lance_debug > 3) { | |
949 | outw(0x0000, ioaddr+LANCE_ADDR); | |
950 | printk("%s: lance_start_xmit() called, csr0 %4.4x.\n", dev->name, | |
951 | inw(ioaddr+LANCE_DATA)); | |
952 | outw(0x0000, ioaddr+LANCE_DATA); | |
953 | } | |
954 | ||
955 | /* Fill in a Tx ring entry */ | |
956 | ||
957 | /* Mask to ring buffer boundary. */ | |
958 | entry = lp->cur_tx & TX_RING_MOD_MASK; | |
959 | ||
960 | /* Caution: the write order is important here, set the base address | |
961 | with the "ownership" bits last. */ | |
962 | ||
963 | /* The old LANCE chips doesn't automatically pad buffers to min. size. */ | |
964 | if (chip_table[lp->chip_version].flags & LANCE_MUST_PAD) { | |
965 | if (skb->len < ETH_ZLEN) { | |
966 | skb = skb_padto(skb, ETH_ZLEN); | |
967 | if (skb == NULL) | |
968 | goto out; | |
969 | lp->tx_ring[entry].length = -ETH_ZLEN; | |
970 | } | |
971 | else | |
972 | lp->tx_ring[entry].length = -skb->len; | |
973 | } else | |
974 | lp->tx_ring[entry].length = -skb->len; | |
975 | ||
976 | lp->tx_ring[entry].misc = 0x0000; | |
977 | ||
978 | lp->stats.tx_bytes += skb->len; | |
979 | ||
980 | /* If any part of this buffer is >16M we must copy it to a low-memory | |
981 | buffer. */ | |
982 | if ((u32)isa_virt_to_bus(skb->data) + skb->len > 0x01000000) { | |
983 | if (lance_debug > 5) | |
984 | printk("%s: bouncing a high-memory packet (%#x).\n", | |
985 | dev->name, (u32)isa_virt_to_bus(skb->data)); | |
986 | memcpy(&lp->tx_bounce_buffs[entry], skb->data, skb->len); | |
987 | lp->tx_ring[entry].base = | |
988 | ((u32)isa_virt_to_bus((lp->tx_bounce_buffs + entry)) & 0xffffff) | 0x83000000; | |
989 | dev_kfree_skb(skb); | |
990 | } else { | |
991 | lp->tx_skbuff[entry] = skb; | |
992 | lp->tx_ring[entry].base = ((u32)isa_virt_to_bus(skb->data) & 0xffffff) | 0x83000000; | |
993 | } | |
994 | lp->cur_tx++; | |
995 | ||
996 | /* Trigger an immediate send poll. */ | |
997 | outw(0x0000, ioaddr+LANCE_ADDR); | |
998 | outw(0x0048, ioaddr+LANCE_DATA); | |
999 | ||
1000 | dev->trans_start = jiffies; | |
1001 | ||
1002 | if ((lp->cur_tx - lp->dirty_tx) >= TX_RING_SIZE) | |
1003 | netif_stop_queue(dev); | |
1004 | ||
1005 | out: | |
1006 | spin_unlock_irqrestore(&lp->devlock, flags); | |
1007 | return 0; | |
1008 | } | |
1009 | ||
1010 | /* The LANCE interrupt handler. */ | |
1011 | static irqreturn_t | |
1012 | lance_interrupt(int irq, void *dev_id, struct pt_regs * regs) | |
1013 | { | |
1014 | struct net_device *dev = dev_id; | |
1015 | struct lance_private *lp; | |
1016 | int csr0, ioaddr, boguscnt=10; | |
1017 | int must_restart; | |
1018 | ||
1019 | if (dev == NULL) { | |
1020 | printk ("lance_interrupt(): irq %d for unknown device.\n", irq); | |
1021 | return IRQ_NONE; | |
1022 | } | |
1023 | ||
1024 | ioaddr = dev->base_addr; | |
1025 | lp = dev->priv; | |
1026 | ||
1027 | spin_lock (&lp->devlock); | |
1028 | ||
1029 | outw(0x00, dev->base_addr + LANCE_ADDR); | |
1030 | while ((csr0 = inw(dev->base_addr + LANCE_DATA)) & 0x8600 | |
1031 | && --boguscnt >= 0) { | |
1032 | /* Acknowledge all of the current interrupt sources ASAP. */ | |
1033 | outw(csr0 & ~0x004f, dev->base_addr + LANCE_DATA); | |
1034 | ||
1035 | must_restart = 0; | |
1036 | ||
1037 | if (lance_debug > 5) | |
1038 | printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n", | |
1039 | dev->name, csr0, inw(dev->base_addr + LANCE_DATA)); | |
1040 | ||
1041 | if (csr0 & 0x0400) /* Rx interrupt */ | |
1042 | lance_rx(dev); | |
1043 | ||
1044 | if (csr0 & 0x0200) { /* Tx-done interrupt */ | |
1045 | int dirty_tx = lp->dirty_tx; | |
1046 | ||
1047 | while (dirty_tx < lp->cur_tx) { | |
1048 | int entry = dirty_tx & TX_RING_MOD_MASK; | |
1049 | int status = lp->tx_ring[entry].base; | |
1050 | ||
1051 | if (status < 0) | |
1052 | break; /* It still hasn't been Txed */ | |
1053 | ||
1054 | lp->tx_ring[entry].base = 0; | |
1055 | ||
1056 | if (status & 0x40000000) { | |
1057 | /* There was an major error, log it. */ | |
1058 | int err_status = lp->tx_ring[entry].misc; | |
1059 | lp->stats.tx_errors++; | |
1060 | if (err_status & 0x0400) lp->stats.tx_aborted_errors++; | |
1061 | if (err_status & 0x0800) lp->stats.tx_carrier_errors++; | |
1062 | if (err_status & 0x1000) lp->stats.tx_window_errors++; | |
1063 | if (err_status & 0x4000) { | |
1064 | /* Ackk! On FIFO errors the Tx unit is turned off! */ | |
1065 | lp->stats.tx_fifo_errors++; | |
1066 | /* Remove this verbosity later! */ | |
1067 | printk("%s: Tx FIFO error! Status %4.4x.\n", | |
1068 | dev->name, csr0); | |
1069 | /* Restart the chip. */ | |
1070 | must_restart = 1; | |
1071 | } | |
1072 | } else { | |
1073 | if (status & 0x18000000) | |
1074 | lp->stats.collisions++; | |
1075 | lp->stats.tx_packets++; | |
1076 | } | |
1077 | ||
1078 | /* We must free the original skb if it's not a data-only copy | |
1079 | in the bounce buffer. */ | |
1080 | if (lp->tx_skbuff[entry]) { | |
1081 | dev_kfree_skb_irq(lp->tx_skbuff[entry]); | |
1082 | lp->tx_skbuff[entry] = NULL; | |
1083 | } | |
1084 | dirty_tx++; | |
1085 | } | |
1086 | ||
1087 | #ifndef final_version | |
1088 | if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) { | |
1089 | printk("out-of-sync dirty pointer, %d vs. %d, full=%s.\n", | |
1090 | dirty_tx, lp->cur_tx, | |
1091 | netif_queue_stopped(dev) ? "yes" : "no"); | |
1092 | dirty_tx += TX_RING_SIZE; | |
1093 | } | |
1094 | #endif | |
1095 | ||
1096 | /* if the ring is no longer full, accept more packets */ | |
1097 | if (netif_queue_stopped(dev) && | |
1098 | dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) | |
1099 | netif_wake_queue (dev); | |
1100 | ||
1101 | lp->dirty_tx = dirty_tx; | |
1102 | } | |
1103 | ||
1104 | /* Log misc errors. */ | |
1105 | if (csr0 & 0x4000) lp->stats.tx_errors++; /* Tx babble. */ | |
1106 | if (csr0 & 0x1000) lp->stats.rx_errors++; /* Missed a Rx frame. */ | |
1107 | if (csr0 & 0x0800) { | |
1108 | printk("%s: Bus master arbitration failure, status %4.4x.\n", | |
1109 | dev->name, csr0); | |
1110 | /* Restart the chip. */ | |
1111 | must_restart = 1; | |
1112 | } | |
1113 | ||
1114 | if (must_restart) { | |
1115 | /* stop the chip to clear the error condition, then restart */ | |
1116 | outw(0x0000, dev->base_addr + LANCE_ADDR); | |
1117 | outw(0x0004, dev->base_addr + LANCE_DATA); | |
1118 | lance_restart(dev, 0x0002, 0); | |
1119 | } | |
1120 | } | |
1121 | ||
1122 | /* Clear any other interrupt, and set interrupt enable. */ | |
1123 | outw(0x0000, dev->base_addr + LANCE_ADDR); | |
1124 | outw(0x7940, dev->base_addr + LANCE_DATA); | |
1125 | ||
1126 | if (lance_debug > 4) | |
1127 | printk("%s: exiting interrupt, csr%d=%#4.4x.\n", | |
1128 | dev->name, inw(ioaddr + LANCE_ADDR), | |
1129 | inw(dev->base_addr + LANCE_DATA)); | |
1130 | ||
1131 | spin_unlock (&lp->devlock); | |
1132 | return IRQ_HANDLED; | |
1133 | } | |
1134 | ||
1135 | static int | |
1136 | lance_rx(struct net_device *dev) | |
1137 | { | |
1138 | struct lance_private *lp = dev->priv; | |
1139 | int entry = lp->cur_rx & RX_RING_MOD_MASK; | |
1140 | int i; | |
1141 | ||
1142 | /* If we own the next entry, it's a new packet. Send it up. */ | |
1143 | while (lp->rx_ring[entry].base >= 0) { | |
1144 | int status = lp->rx_ring[entry].base >> 24; | |
1145 | ||
1146 | if (status != 0x03) { /* There was an error. */ | |
1147 | /* There is a tricky error noted by John Murphy, | |
1148 | <murf@perftech.com> to Russ Nelson: Even with full-sized | |
1149 | buffers it's possible for a jabber packet to use two | |
1150 | buffers, with only the last correctly noting the error. */ | |
1151 | if (status & 0x01) /* Only count a general error at the */ | |
1152 | lp->stats.rx_errors++; /* end of a packet.*/ | |
1153 | if (status & 0x20) lp->stats.rx_frame_errors++; | |
1154 | if (status & 0x10) lp->stats.rx_over_errors++; | |
1155 | if (status & 0x08) lp->stats.rx_crc_errors++; | |
1156 | if (status & 0x04) lp->stats.rx_fifo_errors++; | |
1157 | lp->rx_ring[entry].base &= 0x03ffffff; | |
1158 | } | |
1159 | else | |
1160 | { | |
1161 | /* Malloc up new buffer, compatible with net3. */ | |
1162 | short pkt_len = (lp->rx_ring[entry].msg_length & 0xfff)-4; | |
1163 | struct sk_buff *skb; | |
1164 | ||
1165 | if(pkt_len<60) | |
1166 | { | |
1167 | printk("%s: Runt packet!\n",dev->name); | |
1168 | lp->stats.rx_errors++; | |
1169 | } | |
1170 | else | |
1171 | { | |
1172 | skb = dev_alloc_skb(pkt_len+2); | |
1173 | if (skb == NULL) | |
1174 | { | |
1175 | printk("%s: Memory squeeze, deferring packet.\n", dev->name); | |
1176 | for (i=0; i < RX_RING_SIZE; i++) | |
1177 | if (lp->rx_ring[(entry+i) & RX_RING_MOD_MASK].base < 0) | |
1178 | break; | |
1179 | ||
1180 | if (i > RX_RING_SIZE -2) | |
1181 | { | |
1182 | lp->stats.rx_dropped++; | |
1183 | lp->rx_ring[entry].base |= 0x80000000; | |
1184 | lp->cur_rx++; | |
1185 | } | |
1186 | break; | |
1187 | } | |
1188 | skb->dev = dev; | |
1189 | skb_reserve(skb,2); /* 16 byte align */ | |
1190 | skb_put(skb,pkt_len); /* Make room */ | |
1191 | eth_copy_and_sum(skb, | |
1192 | (unsigned char *)isa_bus_to_virt((lp->rx_ring[entry].base & 0x00ffffff)), | |
1193 | pkt_len,0); | |
1194 | skb->protocol=eth_type_trans(skb,dev); | |
1195 | netif_rx(skb); | |
1196 | dev->last_rx = jiffies; | |
1197 | lp->stats.rx_packets++; | |
1198 | lp->stats.rx_bytes+=pkt_len; | |
1199 | } | |
1200 | } | |
1201 | /* The docs say that the buffer length isn't touched, but Andrew Boyd | |
1202 | of QNX reports that some revs of the 79C965 clear it. */ | |
1203 | lp->rx_ring[entry].buf_length = -PKT_BUF_SZ; | |
1204 | lp->rx_ring[entry].base |= 0x80000000; | |
1205 | entry = (++lp->cur_rx) & RX_RING_MOD_MASK; | |
1206 | } | |
1207 | ||
1208 | /* We should check that at least two ring entries are free. If not, | |
1209 | we should free one and mark stats->rx_dropped++. */ | |
1210 | ||
1211 | return 0; | |
1212 | } | |
1213 | ||
1214 | static int | |
1215 | lance_close(struct net_device *dev) | |
1216 | { | |
1217 | int ioaddr = dev->base_addr; | |
1218 | struct lance_private *lp = dev->priv; | |
1219 | ||
1220 | netif_stop_queue (dev); | |
1221 | ||
1222 | if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) { | |
1223 | outw(112, ioaddr+LANCE_ADDR); | |
1224 | lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA); | |
1225 | } | |
1226 | outw(0, ioaddr+LANCE_ADDR); | |
1227 | ||
1228 | if (lance_debug > 1) | |
1229 | printk("%s: Shutting down ethercard, status was %2.2x.\n", | |
1230 | dev->name, inw(ioaddr+LANCE_DATA)); | |
1231 | ||
1232 | /* We stop the LANCE here -- it occasionally polls | |
1233 | memory if we don't. */ | |
1234 | outw(0x0004, ioaddr+LANCE_DATA); | |
1235 | ||
1236 | if (dev->dma != 4) | |
1237 | { | |
1238 | unsigned long flags=claim_dma_lock(); | |
1239 | disable_dma(dev->dma); | |
1240 | release_dma_lock(flags); | |
1241 | } | |
1242 | free_irq(dev->irq, dev); | |
1243 | ||
1244 | lance_purge_ring(dev); | |
1245 | ||
1246 | return 0; | |
1247 | } | |
1248 | ||
1249 | static struct net_device_stats *lance_get_stats(struct net_device *dev) | |
1250 | { | |
1251 | struct lance_private *lp = dev->priv; | |
1252 | ||
1253 | if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) { | |
1254 | short ioaddr = dev->base_addr; | |
1255 | short saved_addr; | |
1256 | unsigned long flags; | |
1257 | ||
1258 | spin_lock_irqsave(&lp->devlock, flags); | |
1259 | saved_addr = inw(ioaddr+LANCE_ADDR); | |
1260 | outw(112, ioaddr+LANCE_ADDR); | |
1261 | lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA); | |
1262 | outw(saved_addr, ioaddr+LANCE_ADDR); | |
1263 | spin_unlock_irqrestore(&lp->devlock, flags); | |
1264 | } | |
1265 | ||
1266 | return &lp->stats; | |
1267 | } | |
1268 | ||
1269 | /* Set or clear the multicast filter for this adaptor. | |
1270 | */ | |
1271 | ||
1272 | static void set_multicast_list(struct net_device *dev) | |
1273 | { | |
1274 | short ioaddr = dev->base_addr; | |
1275 | ||
1276 | outw(0, ioaddr+LANCE_ADDR); | |
1277 | outw(0x0004, ioaddr+LANCE_DATA); /* Temporarily stop the lance. */ | |
1278 | ||
1279 | if (dev->flags&IFF_PROMISC) { | |
1280 | /* Log any net taps. */ | |
1281 | printk("%s: Promiscuous mode enabled.\n", dev->name); | |
1282 | outw(15, ioaddr+LANCE_ADDR); | |
1283 | outw(0x8000, ioaddr+LANCE_DATA); /* Set promiscuous mode */ | |
1284 | } else { | |
1285 | short multicast_table[4]; | |
1286 | int i; | |
1287 | int num_addrs=dev->mc_count; | |
1288 | if(dev->flags&IFF_ALLMULTI) | |
1289 | num_addrs=1; | |
1290 | /* FIXIT: We don't use the multicast table, but rely on upper-layer filtering. */ | |
1291 | memset(multicast_table, (num_addrs == 0) ? 0 : -1, sizeof(multicast_table)); | |
1292 | for (i = 0; i < 4; i++) { | |
1293 | outw(8 + i, ioaddr+LANCE_ADDR); | |
1294 | outw(multicast_table[i], ioaddr+LANCE_DATA); | |
1295 | } | |
1296 | outw(15, ioaddr+LANCE_ADDR); | |
1297 | outw(0x0000, ioaddr+LANCE_DATA); /* Unset promiscuous mode */ | |
1298 | } | |
1299 | ||
1300 | lance_restart(dev, 0x0142, 0); /* Resume normal operation */ | |
1301 | ||
1302 | } | |
1303 |