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1da177e4
LT
1/* lance.c: An AMD LANCE/PCnet ethernet driver for Linux. */
2/*
3 Written/copyright 1993-1998 by Donald Becker.
4
5 Copyright 1993 United States Government as represented by the
6 Director, National Security Agency.
7 This software may be used and distributed according to the terms
8 of the GNU General Public License, incorporated herein by reference.
9
10 This driver is for the Allied Telesis AT1500 and HP J2405A, and should work
11 with most other LANCE-based bus-master (NE2100/NE2500) ethercards.
12
13 The author may be reached as becker@scyld.com, or C/O
14 Scyld Computing Corporation
15 410 Severn Ave., Suite 210
16 Annapolis MD 21403
17
18 Andrey V. Savochkin:
19 - alignment problem with 1.3.* kernel and some minor changes.
20 Thomas Bogendoerfer (tsbogend@bigbug.franken.de):
21 - added support for Linux/Alpha, but removed most of it, because
6aa20a22 22 it worked only for the PCI chip.
1da177e4
LT
23 - added hook for the 32bit lance driver
24 - added PCnetPCI II (79C970A) to chip table
25 Paul Gortmaker (gpg109@rsphy1.anu.edu.au):
26 - hopefully fix above so Linux/Alpha can use ISA cards too.
27 8/20/96 Fixed 7990 autoIRQ failure and reversed unneeded alignment -djb
28 v1.12 10/27/97 Module support -djb
29 v1.14 2/3/98 Module support modified, made PCI support optional -djb
30 v1.15 5/27/99 Fixed bug in the cleanup_module(). dev->priv was freed
31 before unregister_netdev() which caused NULL pointer
32 reference later in the chain (in rtnetlink_fill_ifinfo())
33 -- Mika Kuoppala <miku@iki.fi>
6aa20a22 34
1da177e4
LT
35 Forward ported v1.14 to 2.1.129, merged the PCI and misc changes from
36 the 2.1 version of the old driver - Alan Cox
37
38 Get rid of check_region, check kmalloc return in lance_probe1
39 Arnaldo Carvalho de Melo <acme@conectiva.com.br> - 11/01/2001
40
41 Reworked detection, added support for Racal InterLan EtherBlaster cards
42 Vesselin Kostadinov <vesok at yahoo dot com > - 22/4/2004
43*/
44
d5b20697 45static const char version[] = "lance.c:v1.16 2006/11/09 dplatt@3do.com, becker@cesdis.gsfc.nasa.gov\n";
1da177e4
LT
46
47#include <linux/module.h>
48#include <linux/kernel.h>
49#include <linux/string.h>
50#include <linux/delay.h>
51#include <linux/errno.h>
52#include <linux/ioport.h>
53#include <linux/slab.h>
54#include <linux/interrupt.h>
55#include <linux/pci.h>
56#include <linux/init.h>
57#include <linux/netdevice.h>
58#include <linux/etherdevice.h>
59#include <linux/skbuff.h>
60#include <linux/bitops.h>
61
62#include <asm/io.h>
63#include <asm/dma.h>
64
65static unsigned int lance_portlist[] __initdata = { 0x300, 0x320, 0x340, 0x360, 0};
66static int lance_probe1(struct net_device *dev, int ioaddr, int irq, int options);
67static int __init do_lance_probe(struct net_device *dev);
68
69
70static struct card {
71 char id_offset14;
72 char id_offset15;
73} cards[] = {
74 { //"normal"
75 .id_offset14 = 0x57,
76 .id_offset15 = 0x57,
77 },
78 { //NI6510EB
79 .id_offset14 = 0x52,
80 .id_offset15 = 0x44,
81 },
82 { //Racal InterLan EtherBlaster
83 .id_offset14 = 0x52,
84 .id_offset15 = 0x49,
85 },
86};
87#define NUM_CARDS 3
88
89#ifdef LANCE_DEBUG
90static int lance_debug = LANCE_DEBUG;
91#else
92static int lance_debug = 1;
93#endif
94
95/*
96 Theory of Operation
97
98I. Board Compatibility
99
100This device driver is designed for the AMD 79C960, the "PCnet-ISA
101single-chip ethernet controller for ISA". This chip is used in a wide
102variety of boards from vendors such as Allied Telesis, HP, Kingston,
103and Boca. This driver is also intended to work with older AMD 7990
104designs, such as the NE1500 and NE2100, and newer 79C961. For convenience,
105I use the name LANCE to refer to all of the AMD chips, even though it properly
106refers only to the original 7990.
107
108II. Board-specific settings
109
110The driver is designed to work the boards that use the faster
111bus-master mode, rather than in shared memory mode. (Only older designs
112have on-board buffer memory needed to support the slower shared memory mode.)
113
114Most ISA boards have jumpered settings for the I/O base, IRQ line, and DMA
115channel. This driver probes the likely base addresses:
116{0x300, 0x320, 0x340, 0x360}.
117After the board is found it generates a DMA-timeout interrupt and uses
118autoIRQ to find the IRQ line. The DMA channel can be set with the low bits
119of the otherwise-unused dev->mem_start value (aka PARAM1). If unset it is
120probed for by enabling each free DMA channel in turn and checking if
121initialization succeeds.
122
123The HP-J2405A board is an exception: with this board it is easy to read the
124EEPROM-set values for the base, IRQ, and DMA. (Of course you must already
125_know_ the base address -- that field is for writing the EEPROM.)
126
127III. Driver operation
128
129IIIa. Ring buffers
130The LANCE uses ring buffers of Tx and Rx descriptors. Each entry describes
131the base and length of the data buffer, along with status bits. The length
132of these buffers is set by LANCE_LOG_{RX,TX}_BUFFERS, which is log_2() of
133the buffer length (rather than being directly the buffer length) for
134implementation ease. The current values are 2 (Tx) and 4 (Rx), which leads to
135ring sizes of 4 (Tx) and 16 (Rx). Increasing the number of ring entries
136needlessly uses extra space and reduces the chance that an upper layer will
137be able to reorder queued Tx packets based on priority. Decreasing the number
138of entries makes it more difficult to achieve back-to-back packet transmission
139and increases the chance that Rx ring will overflow. (Consider the worst case
140of receiving back-to-back minimum-sized packets.)
141
142The LANCE has the capability to "chain" both Rx and Tx buffers, but this driver
143statically allocates full-sized (slightly oversized -- PKT_BUF_SZ) buffers to
144avoid the administrative overhead. For the Rx side this avoids dynamically
145allocating full-sized buffers "just in case", at the expense of a
146memory-to-memory data copy for each packet received. For most systems this
147is a good tradeoff: the Rx buffer will always be in low memory, the copy
148is inexpensive, and it primes the cache for later packet processing. For Tx
149the buffers are only used when needed as low-memory bounce buffers.
150
151IIIB. 16M memory limitations.
152For the ISA bus master mode all structures used directly by the LANCE,
153the initialization block, Rx and Tx rings, and data buffers, must be
154accessible from the ISA bus, i.e. in the lower 16M of real memory.
155This is a problem for current Linux kernels on >16M machines. The network
156devices are initialized after memory initialization, and the kernel doles out
157memory from the top of memory downward. The current solution is to have a
158special network initialization routine that's called before memory
159initialization; this will eventually be generalized for all network devices.
160As mentioned before, low-memory "bounce-buffers" are used when needed.
161
162IIIC. Synchronization
163The driver runs as two independent, single-threaded flows of control. One
164is the send-packet routine, which enforces single-threaded use by the
165dev->tbusy flag. The other thread is the interrupt handler, which is single
166threaded by the hardware and other software.
167
168The send packet thread has partial control over the Tx ring and 'dev->tbusy'
169flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
170queue slot is empty, it clears the tbusy flag when finished otherwise it sets
171the 'lp->tx_full' flag.
172
173The interrupt handler has exclusive control over the Rx ring and records stats
174from the Tx ring. (The Tx-done interrupt can't be selectively turned off, so
175we can't avoid the interrupt overhead by having the Tx routine reap the Tx
176stats.) After reaping the stats, it marks the queue entry as empty by setting
177the 'base' to zero. Iff the 'lp->tx_full' flag is set, it clears both the
178tx_full and tbusy flags.
179
180*/
181
182/* Set the number of Tx and Rx buffers, using Log_2(# buffers).
183 Reasonable default values are 16 Tx buffers, and 16 Rx buffers.
184 That translates to 4 and 4 (16 == 2^^4).
185 This is a compile-time option for efficiency.
186 */
187#ifndef LANCE_LOG_TX_BUFFERS
188#define LANCE_LOG_TX_BUFFERS 4
189#define LANCE_LOG_RX_BUFFERS 4
190#endif
191
192#define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
193#define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
194#define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
195
196#define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
197#define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
198#define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
199
200#define PKT_BUF_SZ 1544
201
202/* Offsets from base I/O address. */
203#define LANCE_DATA 0x10
204#define LANCE_ADDR 0x12
205#define LANCE_RESET 0x14
206#define LANCE_BUS_IF 0x16
207#define LANCE_TOTAL_SIZE 0x18
208
209#define TX_TIMEOUT 20
210
211/* The LANCE Rx and Tx ring descriptors. */
212struct lance_rx_head {
213 s32 base;
214 s16 buf_length; /* This length is 2s complement (negative)! */
215 s16 msg_length; /* This length is "normal". */
216};
217
218struct lance_tx_head {
219 s32 base;
220 s16 length; /* Length is 2s complement (negative)! */
221 s16 misc;
222};
223
224/* The LANCE initialization block, described in databook. */
225struct lance_init_block {
226 u16 mode; /* Pre-set mode (reg. 15) */
227 u8 phys_addr[6]; /* Physical ethernet address */
228 u32 filter[2]; /* Multicast filter (unused). */
229 /* Receive and transmit ring base, along with extra bits. */
230 u32 rx_ring; /* Tx and Rx ring base pointers */
231 u32 tx_ring;
232};
233
234struct lance_private {
235 /* The Tx and Rx ring entries must be aligned on 8-byte boundaries. */
236 struct lance_rx_head rx_ring[RX_RING_SIZE];
237 struct lance_tx_head tx_ring[TX_RING_SIZE];
238 struct lance_init_block init_block;
239 const char *name;
240 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
241 struct sk_buff* tx_skbuff[TX_RING_SIZE];
242 /* The addresses of receive-in-place skbuffs. */
243 struct sk_buff* rx_skbuff[RX_RING_SIZE];
244 unsigned long rx_buffs; /* Address of Rx and Tx buffers. */
245 /* Tx low-memory "bounce buffer" address. */
246 char (*tx_bounce_buffs)[PKT_BUF_SZ];
247 int cur_rx, cur_tx; /* The next free ring entry */
248 int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
249 int dma;
250 struct net_device_stats stats;
251 unsigned char chip_version; /* See lance_chip_type. */
252 spinlock_t devlock;
253};
254
255#define LANCE_MUST_PAD 0x00000001
256#define LANCE_ENABLE_AUTOSELECT 0x00000002
257#define LANCE_MUST_REINIT_RING 0x00000004
258#define LANCE_MUST_UNRESET 0x00000008
259#define LANCE_HAS_MISSED_FRAME 0x00000010
260
261/* A mapping from the chip ID number to the part number and features.
262 These are from the datasheets -- in real life the '970 version
263 reportedly has the same ID as the '965. */
264static struct lance_chip_type {
265 int id_number;
266 const char *name;
267 int flags;
268} chip_table[] = {
269 {0x0000, "LANCE 7990", /* Ancient lance chip. */
270 LANCE_MUST_PAD + LANCE_MUST_UNRESET},
271 {0x0003, "PCnet/ISA 79C960", /* 79C960 PCnet/ISA. */
272 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
273 LANCE_HAS_MISSED_FRAME},
274 {0x2260, "PCnet/ISA+ 79C961", /* 79C961 PCnet/ISA+, Plug-n-Play. */
275 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
276 LANCE_HAS_MISSED_FRAME},
277 {0x2420, "PCnet/PCI 79C970", /* 79C970 or 79C974 PCnet-SCSI, PCI. */
278 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
279 LANCE_HAS_MISSED_FRAME},
280 /* Bug: the PCnet/PCI actually uses the PCnet/VLB ID number, so just call
281 it the PCnet32. */
282 {0x2430, "PCnet32", /* 79C965 PCnet for VL bus. */
283 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
284 LANCE_HAS_MISSED_FRAME},
285 {0x2621, "PCnet/PCI-II 79C970A", /* 79C970A PCInetPCI II. */
286 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
287 LANCE_HAS_MISSED_FRAME},
288 {0x0, "PCnet (unknown)",
289 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
290 LANCE_HAS_MISSED_FRAME},
291};
292
293enum {OLD_LANCE = 0, PCNET_ISA=1, PCNET_ISAP=2, PCNET_PCI=3, PCNET_VLB=4, PCNET_PCI_II=5, LANCE_UNKNOWN=6};
294
295
296/* Non-zero if lance_probe1() needs to allocate low-memory bounce buffers.
297 Assume yes until we know the memory size. */
298static unsigned char lance_need_isa_bounce_buffers = 1;
299
300static int lance_open(struct net_device *dev);
9e24974d 301static void lance_init_ring(struct net_device *dev, gfp_t mode);
1da177e4
LT
302static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev);
303static int lance_rx(struct net_device *dev);
7d12e780 304static irqreturn_t lance_interrupt(int irq, void *dev_id);
1da177e4
LT
305static int lance_close(struct net_device *dev);
306static struct net_device_stats *lance_get_stats(struct net_device *dev);
307static void set_multicast_list(struct net_device *dev);
308static void lance_tx_timeout (struct net_device *dev);
309
6aa20a22 310
1da177e4 311
1da177e4
LT
312#ifdef MODULE
313#define MAX_CARDS 8 /* Max number of interfaces (cards) per module */
314
315static struct net_device *dev_lance[MAX_CARDS];
316static int io[MAX_CARDS];
317static int dma[MAX_CARDS];
318static int irq[MAX_CARDS];
319
320module_param_array(io, int, NULL, 0);
321module_param_array(dma, int, NULL, 0);
322module_param_array(irq, int, NULL, 0);
323module_param(lance_debug, int, 0);
324MODULE_PARM_DESC(io, "LANCE/PCnet I/O base address(es),required");
325MODULE_PARM_DESC(dma, "LANCE/PCnet ISA DMA channel (ignored for some devices)");
326MODULE_PARM_DESC(irq, "LANCE/PCnet IRQ number (ignored for some devices)");
327MODULE_PARM_DESC(lance_debug, "LANCE/PCnet debug level (0-7)");
328
3805f0e2 329int __init init_module(void)
1da177e4
LT
330{
331 struct net_device *dev;
332 int this_dev, found = 0;
333
334 for (this_dev = 0; this_dev < MAX_CARDS; this_dev++) {
335 if (io[this_dev] == 0) {
336 if (this_dev != 0) /* only complain once */
337 break;
338 printk(KERN_NOTICE "lance.c: Module autoprobing not allowed. Append \"io=0xNNN\" value(s).\n");
339 return -EPERM;
340 }
341 dev = alloc_etherdev(0);
342 if (!dev)
343 break;
344 dev->irq = irq[this_dev];
345 dev->base_addr = io[this_dev];
346 dev->dma = dma[this_dev];
347 if (do_lance_probe(dev) == 0) {
b1fc5505
HX
348 dev_lance[found++] = dev;
349 continue;
1da177e4
LT
350 }
351 free_netdev(dev);
352 break;
353 }
354 if (found != 0)
355 return 0;
356 return -ENXIO;
357}
358
64916f1e
DV
359static void cleanup_card(struct net_device *dev)
360{
361 struct lance_private *lp = dev->priv;
362 if (dev->dma != 4)
363 free_dma(dev->dma);
364 release_region(dev->base_addr, LANCE_TOTAL_SIZE);
365 kfree(lp->tx_bounce_buffs);
366 kfree((void*)lp->rx_buffs);
367 kfree(lp);
368}
369
1da177e4
LT
370void cleanup_module(void)
371{
372 int this_dev;
373
374 for (this_dev = 0; this_dev < MAX_CARDS; this_dev++) {
375 struct net_device *dev = dev_lance[this_dev];
376 if (dev) {
6aa20a22 377 unregister_netdev(dev);
1da177e4
LT
378 cleanup_card(dev);
379 free_netdev(dev);
380 }
381 }
382}
383#endif /* MODULE */
384MODULE_LICENSE("GPL");
385
386
387/* Starting in v2.1.*, the LANCE/PCnet probe is now similar to the other
388 board probes now that kmalloc() can allocate ISA DMA-able regions.
389 This also allows the LANCE driver to be used as a module.
390 */
391static int __init do_lance_probe(struct net_device *dev)
392{
393 int *port, result;
394
395 if (high_memory <= phys_to_virt(16*1024*1024))
396 lance_need_isa_bounce_buffers = 0;
397
398 for (port = lance_portlist; *port; port++) {
399 int ioaddr = *port;
400 struct resource *r = request_region(ioaddr, LANCE_TOTAL_SIZE,
401 "lance-probe");
402
403 if (r) {
404 /* Detect the card with minimal I/O reads */
405 char offset14 = inb(ioaddr + 14);
406 int card;
407 for (card = 0; card < NUM_CARDS; ++card)
408 if (cards[card].id_offset14 == offset14)
409 break;
410 if (card < NUM_CARDS) {/*yes, the first byte matches*/
411 char offset15 = inb(ioaddr + 15);
412 for (card = 0; card < NUM_CARDS; ++card)
413 if ((cards[card].id_offset14 == offset14) &&
414 (cards[card].id_offset15 == offset15))
415 break;
416 }
417 if (card < NUM_CARDS) { /*Signature OK*/
418 result = lance_probe1(dev, ioaddr, 0, 0);
419 if (!result) {
420 struct lance_private *lp = dev->priv;
421 int ver = lp->chip_version;
422
423 r->name = chip_table[ver].name;
424 return 0;
425 }
426 }
427 release_region(ioaddr, LANCE_TOTAL_SIZE);
428 }
429 }
430 return -ENODEV;
431}
432
433#ifndef MODULE
434struct net_device * __init lance_probe(int unit)
435{
436 struct net_device *dev = alloc_etherdev(0);
437 int err;
438
439 if (!dev)
440 return ERR_PTR(-ENODEV);
441
442 sprintf(dev->name, "eth%d", unit);
443 netdev_boot_setup_check(dev);
444
445 err = do_lance_probe(dev);
446 if (err)
447 goto out;
1da177e4 448 return dev;
1da177e4
LT
449out:
450 free_netdev(dev);
451 return ERR_PTR(err);
452}
453#endif
454
455static int __init lance_probe1(struct net_device *dev, int ioaddr, int irq, int options)
456{
457 struct lance_private *lp;
458 long dma_channels; /* Mark spuriously-busy DMA channels */
459 int i, reset_val, lance_version;
460 const char *chipname;
461 /* Flags for specific chips or boards. */
462 unsigned char hpJ2405A = 0; /* HP ISA adaptor */
463 int hp_builtin = 0; /* HP on-board ethernet. */
464 static int did_version; /* Already printed version info. */
465 unsigned long flags;
466 int err = -ENOMEM;
c44fec11 467 void __iomem *bios;
1da177e4
LT
468
469 /* First we look for special cases.
470 Check for HP's on-board ethernet by looking for 'HP' in the BIOS.
471 There are two HP versions, check the BIOS for the configuration port.
472 This method provided by L. Julliard, Laurent_Julliard@grenoble.hp.com.
473 */
c44fec11
AV
474 bios = ioremap(0xf00f0, 0x14);
475 if (!bios)
476 return -ENOMEM;
477 if (readw(bios + 0x12) == 0x5048) {
1da177e4 478 static const short ioaddr_table[] = { 0x300, 0x320, 0x340, 0x360};
c44fec11 479 int hp_port = (readl(bios + 1) & 1) ? 0x499 : 0x99;
1da177e4
LT
480 /* We can have boards other than the built-in! Verify this is on-board. */
481 if ((inb(hp_port) & 0xc0) == 0x80
482 && ioaddr_table[inb(hp_port) & 3] == ioaddr)
483 hp_builtin = hp_port;
484 }
c44fec11 485 iounmap(bios);
1da177e4
LT
486 /* We also recognize the HP Vectra on-board here, but check below. */
487 hpJ2405A = (inb(ioaddr) == 0x08 && inb(ioaddr+1) == 0x00
488 && inb(ioaddr+2) == 0x09);
489
490 /* Reset the LANCE. */
491 reset_val = inw(ioaddr+LANCE_RESET); /* Reset the LANCE */
492
493 /* The Un-Reset needed is only needed for the real NE2100, and will
494 confuse the HP board. */
495 if (!hpJ2405A)
496 outw(reset_val, ioaddr+LANCE_RESET);
497
498 outw(0x0000, ioaddr+LANCE_ADDR); /* Switch to window 0 */
499 if (inw(ioaddr+LANCE_DATA) != 0x0004)
500 return -ENODEV;
501
502 /* Get the version of the chip. */
503 outw(88, ioaddr+LANCE_ADDR);
504 if (inw(ioaddr+LANCE_ADDR) != 88) {
505 lance_version = 0;
506 } else { /* Good, it's a newer chip. */
507 int chip_version = inw(ioaddr+LANCE_DATA);
508 outw(89, ioaddr+LANCE_ADDR);
509 chip_version |= inw(ioaddr+LANCE_DATA) << 16;
510 if (lance_debug > 2)
511 printk(" LANCE chip version is %#x.\n", chip_version);
512 if ((chip_version & 0xfff) != 0x003)
513 return -ENODEV;
514 chip_version = (chip_version >> 12) & 0xffff;
515 for (lance_version = 1; chip_table[lance_version].id_number; lance_version++) {
516 if (chip_table[lance_version].id_number == chip_version)
517 break;
518 }
519 }
520
521 /* We can't allocate dev->priv from alloc_etherdev() because it must
522 a ISA DMA-able region. */
523 SET_MODULE_OWNER(dev);
524 chipname = chip_table[lance_version].name;
525 printk("%s: %s at %#3x,", dev->name, chipname, ioaddr);
526
527 /* There is a 16 byte station address PROM at the base address.
528 The first six bytes are the station address. */
529 for (i = 0; i < 6; i++)
530 printk(" %2.2x", dev->dev_addr[i] = inb(ioaddr + i));
531
532 dev->base_addr = ioaddr;
533 /* Make certain the data structures used by the LANCE are aligned and DMAble. */
6aa20a22 534
1da177e4
LT
535 lp = kmalloc(sizeof(*lp), GFP_DMA | GFP_KERNEL);
536 if(lp==NULL)
537 return -ENODEV;
538 if (lance_debug > 6) printk(" (#0x%05lx)", (unsigned long)lp);
539 memset(lp, 0, sizeof(*lp));
540 dev->priv = lp;
541 lp->name = chipname;
542 lp->rx_buffs = (unsigned long)kmalloc(PKT_BUF_SZ*RX_RING_SIZE,
543 GFP_DMA | GFP_KERNEL);
544 if (!lp->rx_buffs)
545 goto out_lp;
546 if (lance_need_isa_bounce_buffers) {
547 lp->tx_bounce_buffs = kmalloc(PKT_BUF_SZ*TX_RING_SIZE,
548 GFP_DMA | GFP_KERNEL);
549 if (!lp->tx_bounce_buffs)
550 goto out_rx;
551 } else
552 lp->tx_bounce_buffs = NULL;
553
554 lp->chip_version = lance_version;
555 spin_lock_init(&lp->devlock);
556
557 lp->init_block.mode = 0x0003; /* Disable Rx and Tx. */
558 for (i = 0; i < 6; i++)
559 lp->init_block.phys_addr[i] = dev->dev_addr[i];
560 lp->init_block.filter[0] = 0x00000000;
561 lp->init_block.filter[1] = 0x00000000;
562 lp->init_block.rx_ring = ((u32)isa_virt_to_bus(lp->rx_ring) & 0xffffff) | RX_RING_LEN_BITS;
563 lp->init_block.tx_ring = ((u32)isa_virt_to_bus(lp->tx_ring) & 0xffffff) | TX_RING_LEN_BITS;
564
565 outw(0x0001, ioaddr+LANCE_ADDR);
566 inw(ioaddr+LANCE_ADDR);
567 outw((short) (u32) isa_virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA);
568 outw(0x0002, ioaddr+LANCE_ADDR);
569 inw(ioaddr+LANCE_ADDR);
570 outw(((u32)isa_virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA);
571 outw(0x0000, ioaddr+LANCE_ADDR);
572 inw(ioaddr+LANCE_ADDR);
573
574 if (irq) { /* Set iff PCI card. */
575 dev->dma = 4; /* Native bus-master, no DMA channel needed. */
576 dev->irq = irq;
577 } else if (hp_builtin) {
578 static const char dma_tbl[4] = {3, 5, 6, 0};
579 static const char irq_tbl[4] = {3, 4, 5, 9};
580 unsigned char port_val = inb(hp_builtin);
581 dev->dma = dma_tbl[(port_val >> 4) & 3];
582 dev->irq = irq_tbl[(port_val >> 2) & 3];
583 printk(" HP Vectra IRQ %d DMA %d.\n", dev->irq, dev->dma);
584 } else if (hpJ2405A) {
585 static const char dma_tbl[4] = {3, 5, 6, 7};
586 static const char irq_tbl[8] = {3, 4, 5, 9, 10, 11, 12, 15};
587 short reset_val = inw(ioaddr+LANCE_RESET);
588 dev->dma = dma_tbl[(reset_val >> 2) & 3];
589 dev->irq = irq_tbl[(reset_val >> 4) & 7];
590 printk(" HP J2405A IRQ %d DMA %d.\n", dev->irq, dev->dma);
591 } else if (lance_version == PCNET_ISAP) { /* The plug-n-play version. */
592 short bus_info;
593 outw(8, ioaddr+LANCE_ADDR);
594 bus_info = inw(ioaddr+LANCE_BUS_IF);
595 dev->dma = bus_info & 0x07;
596 dev->irq = (bus_info >> 4) & 0x0F;
597 } else {
598 /* The DMA channel may be passed in PARAM1. */
599 if (dev->mem_start & 0x07)
600 dev->dma = dev->mem_start & 0x07;
601 }
602
603 if (dev->dma == 0) {
604 /* Read the DMA channel status register, so that we can avoid
605 stuck DMA channels in the DMA detection below. */
606 dma_channels = ((inb(DMA1_STAT_REG) >> 4) & 0x0f) |
607 (inb(DMA2_STAT_REG) & 0xf0);
608 }
609 err = -ENODEV;
610 if (dev->irq >= 2)
611 printk(" assigned IRQ %d", dev->irq);
612 else if (lance_version != 0) { /* 7990 boards need DMA detection first. */
613 unsigned long irq_mask;
614
615 /* To auto-IRQ we enable the initialization-done and DMA error
616 interrupts. For ISA boards we get a DMA error, but VLB and PCI
617 boards will work. */
618 irq_mask = probe_irq_on();
619
620 /* Trigger an initialization just for the interrupt. */
621 outw(0x0041, ioaddr+LANCE_DATA);
622
623 mdelay(20);
624 dev->irq = probe_irq_off(irq_mask);
625 if (dev->irq)
626 printk(", probed IRQ %d", dev->irq);
627 else {
628 printk(", failed to detect IRQ line.\n");
629 goto out_tx;
630 }
631
632 /* Check for the initialization done bit, 0x0100, which means
633 that we don't need a DMA channel. */
634 if (inw(ioaddr+LANCE_DATA) & 0x0100)
635 dev->dma = 4;
636 }
637
638 if (dev->dma == 4) {
639 printk(", no DMA needed.\n");
640 } else if (dev->dma) {
641 if (request_dma(dev->dma, chipname)) {
642 printk("DMA %d allocation failed.\n", dev->dma);
643 goto out_tx;
644 } else
645 printk(", assigned DMA %d.\n", dev->dma);
646 } else { /* OK, we have to auto-DMA. */
647 for (i = 0; i < 4; i++) {
648 static const char dmas[] = { 5, 6, 7, 3 };
649 int dma = dmas[i];
650 int boguscnt;
651
652 /* Don't enable a permanently busy DMA channel, or the machine
653 will hang. */
654 if (test_bit(dma, &dma_channels))
655 continue;
656 outw(0x7f04, ioaddr+LANCE_DATA); /* Clear the memory error bits. */
657 if (request_dma(dma, chipname))
658 continue;
6aa20a22 659
1da177e4
LT
660 flags=claim_dma_lock();
661 set_dma_mode(dma, DMA_MODE_CASCADE);
662 enable_dma(dma);
663 release_dma_lock(flags);
664
665 /* Trigger an initialization. */
666 outw(0x0001, ioaddr+LANCE_DATA);
667 for (boguscnt = 100; boguscnt > 0; --boguscnt)
668 if (inw(ioaddr+LANCE_DATA) & 0x0900)
669 break;
670 if (inw(ioaddr+LANCE_DATA) & 0x0100) {
671 dev->dma = dma;
672 printk(", DMA %d.\n", dev->dma);
673 break;
674 } else {
675 flags=claim_dma_lock();
676 disable_dma(dma);
677 release_dma_lock(flags);
678 free_dma(dma);
679 }
680 }
681 if (i == 4) { /* Failure: bail. */
682 printk("DMA detection failed.\n");
683 goto out_tx;
684 }
685 }
686
687 if (lance_version == 0 && dev->irq == 0) {
688 /* We may auto-IRQ now that we have a DMA channel. */
689 /* Trigger an initialization just for the interrupt. */
690 unsigned long irq_mask;
691
692 irq_mask = probe_irq_on();
693 outw(0x0041, ioaddr+LANCE_DATA);
694
695 mdelay(40);
696 dev->irq = probe_irq_off(irq_mask);
697 if (dev->irq == 0) {
698 printk(" Failed to detect the 7990 IRQ line.\n");
699 goto out_dma;
700 }
701 printk(" Auto-IRQ detected IRQ%d.\n", dev->irq);
702 }
703
704 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
705 /* Turn on auto-select of media (10baseT or BNC) so that the user
706 can watch the LEDs even if the board isn't opened. */
707 outw(0x0002, ioaddr+LANCE_ADDR);
708 /* Don't touch 10base2 power bit. */
709 outw(inw(ioaddr+LANCE_BUS_IF) | 0x0002, ioaddr+LANCE_BUS_IF);
710 }
711
712 if (lance_debug > 0 && did_version++ == 0)
713 printk(version);
714
715 /* The LANCE-specific entries in the device structure. */
716 dev->open = lance_open;
717 dev->hard_start_xmit = lance_start_xmit;
718 dev->stop = lance_close;
719 dev->get_stats = lance_get_stats;
720 dev->set_multicast_list = set_multicast_list;
721 dev->tx_timeout = lance_tx_timeout;
722 dev->watchdog_timeo = TX_TIMEOUT;
723
b1fc5505
HX
724 err = register_netdev(dev);
725 if (err)
726 goto out_dma;
1da177e4
LT
727 return 0;
728out_dma:
729 if (dev->dma != 4)
730 free_dma(dev->dma);
731out_tx:
732 kfree(lp->tx_bounce_buffs);
733out_rx:
734 kfree((void*)lp->rx_buffs);
735out_lp:
736 kfree(lp);
737 return err;
738}
739
6aa20a22 740
1da177e4
LT
741static int
742lance_open(struct net_device *dev)
743{
744 struct lance_private *lp = dev->priv;
745 int ioaddr = dev->base_addr;
746 int i;
747
748 if (dev->irq == 0 ||
749 request_irq(dev->irq, &lance_interrupt, 0, lp->name, dev)) {
750 return -EAGAIN;
751 }
752
753 /* We used to allocate DMA here, but that was silly.
754 DMA lines can't be shared! We now permanently allocate them. */
755
756 /* Reset the LANCE */
757 inw(ioaddr+LANCE_RESET);
758
759 /* The DMA controller is used as a no-operation slave, "cascade mode". */
760 if (dev->dma != 4) {
761 unsigned long flags=claim_dma_lock();
762 enable_dma(dev->dma);
763 set_dma_mode(dev->dma, DMA_MODE_CASCADE);
764 release_dma_lock(flags);
765 }
766
767 /* Un-Reset the LANCE, needed only for the NE2100. */
768 if (chip_table[lp->chip_version].flags & LANCE_MUST_UNRESET)
769 outw(0, ioaddr+LANCE_RESET);
770
771 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
772 /* This is 79C960-specific: Turn on auto-select of media (AUI, BNC). */
773 outw(0x0002, ioaddr+LANCE_ADDR);
774 /* Only touch autoselect bit. */
775 outw(inw(ioaddr+LANCE_BUS_IF) | 0x0002, ioaddr+LANCE_BUS_IF);
776 }
777
778 if (lance_debug > 1)
779 printk("%s: lance_open() irq %d dma %d tx/rx rings %#x/%#x init %#x.\n",
780 dev->name, dev->irq, dev->dma,
781 (u32) isa_virt_to_bus(lp->tx_ring),
782 (u32) isa_virt_to_bus(lp->rx_ring),
783 (u32) isa_virt_to_bus(&lp->init_block));
784
785 lance_init_ring(dev, GFP_KERNEL);
786 /* Re-initialize the LANCE, and start it when done. */
787 outw(0x0001, ioaddr+LANCE_ADDR);
788 outw((short) (u32) isa_virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA);
789 outw(0x0002, ioaddr+LANCE_ADDR);
790 outw(((u32)isa_virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA);
791
792 outw(0x0004, ioaddr+LANCE_ADDR);
793 outw(0x0915, ioaddr+LANCE_DATA);
794
795 outw(0x0000, ioaddr+LANCE_ADDR);
796 outw(0x0001, ioaddr+LANCE_DATA);
797
798 netif_start_queue (dev);
799
800 i = 0;
801 while (i++ < 100)
802 if (inw(ioaddr+LANCE_DATA) & 0x0100)
803 break;
6aa20a22 804 /*
1da177e4
LT
805 * We used to clear the InitDone bit, 0x0100, here but Mark Stockton
806 * reports that doing so triggers a bug in the '974.
807 */
808 outw(0x0042, ioaddr+LANCE_DATA);
809
810 if (lance_debug > 2)
811 printk("%s: LANCE open after %d ticks, init block %#x csr0 %4.4x.\n",
812 dev->name, i, (u32) isa_virt_to_bus(&lp->init_block), inw(ioaddr+LANCE_DATA));
813
814 return 0; /* Always succeed */
815}
816
817/* The LANCE has been halted for one reason or another (busmaster memory
818 arbitration error, Tx FIFO underflow, driver stopped it to reconfigure,
819 etc.). Modern LANCE variants always reload their ring-buffer
820 configuration when restarted, so we must reinitialize our ring
821 context before restarting. As part of this reinitialization,
822 find all packets still on the Tx ring and pretend that they had been
823 sent (in effect, drop the packets on the floor) - the higher-level
824 protocols will time out and retransmit. It'd be better to shuffle
825 these skbs to a temp list and then actually re-Tx them after
826 restarting the chip, but I'm too lazy to do so right now. dplatt@3do.com
827*/
828
6aa20a22 829static void
1da177e4
LT
830lance_purge_ring(struct net_device *dev)
831{
832 struct lance_private *lp = dev->priv;
833 int i;
834
835 /* Free all the skbuffs in the Rx and Tx queues. */
836 for (i = 0; i < RX_RING_SIZE; i++) {
837 struct sk_buff *skb = lp->rx_skbuff[i];
838 lp->rx_skbuff[i] = NULL;
839 lp->rx_ring[i].base = 0; /* Not owned by LANCE chip. */
840 if (skb)
841 dev_kfree_skb_any(skb);
842 }
843 for (i = 0; i < TX_RING_SIZE; i++) {
844 if (lp->tx_skbuff[i]) {
845 dev_kfree_skb_any(lp->tx_skbuff[i]);
846 lp->tx_skbuff[i] = NULL;
847 }
848 }
849}
850
851
852/* Initialize the LANCE Rx and Tx rings. */
853static void
9e24974d 854lance_init_ring(struct net_device *dev, gfp_t gfp)
1da177e4
LT
855{
856 struct lance_private *lp = dev->priv;
857 int i;
858
859 lp->cur_rx = lp->cur_tx = 0;
860 lp->dirty_rx = lp->dirty_tx = 0;
861
862 for (i = 0; i < RX_RING_SIZE; i++) {
863 struct sk_buff *skb;
864 void *rx_buff;
865
866 skb = alloc_skb(PKT_BUF_SZ, GFP_DMA | gfp);
867 lp->rx_skbuff[i] = skb;
868 if (skb) {
869 skb->dev = dev;
689be439 870 rx_buff = skb->data;
1da177e4
LT
871 } else
872 rx_buff = kmalloc(PKT_BUF_SZ, GFP_DMA | gfp);
873 if (rx_buff == NULL)
874 lp->rx_ring[i].base = 0;
875 else
876 lp->rx_ring[i].base = (u32)isa_virt_to_bus(rx_buff) | 0x80000000;
877 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
878 }
879 /* The Tx buffer address is filled in as needed, but we do need to clear
880 the upper ownership bit. */
881 for (i = 0; i < TX_RING_SIZE; i++) {
882 lp->tx_skbuff[i] = NULL;
883 lp->tx_ring[i].base = 0;
884 }
885
886 lp->init_block.mode = 0x0000;
887 for (i = 0; i < 6; i++)
888 lp->init_block.phys_addr[i] = dev->dev_addr[i];
889 lp->init_block.filter[0] = 0x00000000;
890 lp->init_block.filter[1] = 0x00000000;
891 lp->init_block.rx_ring = ((u32)isa_virt_to_bus(lp->rx_ring) & 0xffffff) | RX_RING_LEN_BITS;
892 lp->init_block.tx_ring = ((u32)isa_virt_to_bus(lp->tx_ring) & 0xffffff) | TX_RING_LEN_BITS;
893}
894
895static void
896lance_restart(struct net_device *dev, unsigned int csr0_bits, int must_reinit)
897{
898 struct lance_private *lp = dev->priv;
899
900 if (must_reinit ||
901 (chip_table[lp->chip_version].flags & LANCE_MUST_REINIT_RING)) {
902 lance_purge_ring(dev);
903 lance_init_ring(dev, GFP_ATOMIC);
904 }
905 outw(0x0000, dev->base_addr + LANCE_ADDR);
906 outw(csr0_bits, dev->base_addr + LANCE_DATA);
907}
908
909
910static void lance_tx_timeout (struct net_device *dev)
911{
912 struct lance_private *lp = (struct lance_private *) dev->priv;
913 int ioaddr = dev->base_addr;
914
915 outw (0, ioaddr + LANCE_ADDR);
916 printk ("%s: transmit timed out, status %4.4x, resetting.\n",
917 dev->name, inw (ioaddr + LANCE_DATA));
918 outw (0x0004, ioaddr + LANCE_DATA);
919 lp->stats.tx_errors++;
920#ifndef final_version
921 if (lance_debug > 3) {
922 int i;
923 printk (" Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
924 lp->dirty_tx, lp->cur_tx, netif_queue_stopped(dev) ? " (full)" : "",
925 lp->cur_rx);
926 for (i = 0; i < RX_RING_SIZE; i++)
927 printk ("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
928 lp->rx_ring[i].base, -lp->rx_ring[i].buf_length,
929 lp->rx_ring[i].msg_length);
930 for (i = 0; i < TX_RING_SIZE; i++)
931 printk ("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
932 lp->tx_ring[i].base, -lp->tx_ring[i].length,
933 lp->tx_ring[i].misc);
934 printk ("\n");
935 }
936#endif
937 lance_restart (dev, 0x0043, 1);
938
939 dev->trans_start = jiffies;
940 netif_wake_queue (dev);
941}
942
943
944static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
945{
946 struct lance_private *lp = dev->priv;
947 int ioaddr = dev->base_addr;
948 int entry;
949 unsigned long flags;
950
951 spin_lock_irqsave(&lp->devlock, flags);
952
953 if (lance_debug > 3) {
954 outw(0x0000, ioaddr+LANCE_ADDR);
955 printk("%s: lance_start_xmit() called, csr0 %4.4x.\n", dev->name,
956 inw(ioaddr+LANCE_DATA));
957 outw(0x0000, ioaddr+LANCE_DATA);
958 }
959
960 /* Fill in a Tx ring entry */
961
962 /* Mask to ring buffer boundary. */
963 entry = lp->cur_tx & TX_RING_MOD_MASK;
964
965 /* Caution: the write order is important here, set the base address
966 with the "ownership" bits last. */
967
968 /* The old LANCE chips doesn't automatically pad buffers to min. size. */
969 if (chip_table[lp->chip_version].flags & LANCE_MUST_PAD) {
970 if (skb->len < ETH_ZLEN) {
5b057c6b 971 if (skb_padto(skb, ETH_ZLEN))
1da177e4
LT
972 goto out;
973 lp->tx_ring[entry].length = -ETH_ZLEN;
974 }
6aa20a22 975 else
1da177e4
LT
976 lp->tx_ring[entry].length = -skb->len;
977 } else
978 lp->tx_ring[entry].length = -skb->len;
979
980 lp->tx_ring[entry].misc = 0x0000;
981
982 lp->stats.tx_bytes += skb->len;
983
984 /* If any part of this buffer is >16M we must copy it to a low-memory
985 buffer. */
986 if ((u32)isa_virt_to_bus(skb->data) + skb->len > 0x01000000) {
987 if (lance_debug > 5)
988 printk("%s: bouncing a high-memory packet (%#x).\n",
989 dev->name, (u32)isa_virt_to_bus(skb->data));
990 memcpy(&lp->tx_bounce_buffs[entry], skb->data, skb->len);
991 lp->tx_ring[entry].base =
992 ((u32)isa_virt_to_bus((lp->tx_bounce_buffs + entry)) & 0xffffff) | 0x83000000;
993 dev_kfree_skb(skb);
994 } else {
995 lp->tx_skbuff[entry] = skb;
996 lp->tx_ring[entry].base = ((u32)isa_virt_to_bus(skb->data) & 0xffffff) | 0x83000000;
997 }
998 lp->cur_tx++;
999
1000 /* Trigger an immediate send poll. */
1001 outw(0x0000, ioaddr+LANCE_ADDR);
1002 outw(0x0048, ioaddr+LANCE_DATA);
1003
1004 dev->trans_start = jiffies;
1005
1006 if ((lp->cur_tx - lp->dirty_tx) >= TX_RING_SIZE)
1007 netif_stop_queue(dev);
1008
1009out:
1010 spin_unlock_irqrestore(&lp->devlock, flags);
1011 return 0;
1012}
1013
1014/* The LANCE interrupt handler. */
7d12e780 1015static irqreturn_t lance_interrupt(int irq, void *dev_id)
1da177e4
LT
1016{
1017 struct net_device *dev = dev_id;
1018 struct lance_private *lp;
1019 int csr0, ioaddr, boguscnt=10;
1020 int must_restart;
1021
1022 if (dev == NULL) {
1023 printk ("lance_interrupt(): irq %d for unknown device.\n", irq);
1024 return IRQ_NONE;
1025 }
1026
1027 ioaddr = dev->base_addr;
1028 lp = dev->priv;
6aa20a22 1029
1da177e4
LT
1030 spin_lock (&lp->devlock);
1031
1032 outw(0x00, dev->base_addr + LANCE_ADDR);
1033 while ((csr0 = inw(dev->base_addr + LANCE_DATA)) & 0x8600
1034 && --boguscnt >= 0) {
1035 /* Acknowledge all of the current interrupt sources ASAP. */
1036 outw(csr0 & ~0x004f, dev->base_addr + LANCE_DATA);
1037
1038 must_restart = 0;
1039
1040 if (lance_debug > 5)
1041 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
1042 dev->name, csr0, inw(dev->base_addr + LANCE_DATA));
1043
1044 if (csr0 & 0x0400) /* Rx interrupt */
1045 lance_rx(dev);
1046
1047 if (csr0 & 0x0200) { /* Tx-done interrupt */
1048 int dirty_tx = lp->dirty_tx;
1049
1050 while (dirty_tx < lp->cur_tx) {
1051 int entry = dirty_tx & TX_RING_MOD_MASK;
1052 int status = lp->tx_ring[entry].base;
6aa20a22 1053
1da177e4
LT
1054 if (status < 0)
1055 break; /* It still hasn't been Txed */
1056
1057 lp->tx_ring[entry].base = 0;
1058
1059 if (status & 0x40000000) {
1060 /* There was an major error, log it. */
1061 int err_status = lp->tx_ring[entry].misc;
1062 lp->stats.tx_errors++;
1063 if (err_status & 0x0400) lp->stats.tx_aborted_errors++;
1064 if (err_status & 0x0800) lp->stats.tx_carrier_errors++;
1065 if (err_status & 0x1000) lp->stats.tx_window_errors++;
1066 if (err_status & 0x4000) {
1067 /* Ackk! On FIFO errors the Tx unit is turned off! */
1068 lp->stats.tx_fifo_errors++;
1069 /* Remove this verbosity later! */
1070 printk("%s: Tx FIFO error! Status %4.4x.\n",
1071 dev->name, csr0);
1072 /* Restart the chip. */
1073 must_restart = 1;
1074 }
1075 } else {
1076 if (status & 0x18000000)
1077 lp->stats.collisions++;
1078 lp->stats.tx_packets++;
1079 }
1080
1081 /* We must free the original skb if it's not a data-only copy
1082 in the bounce buffer. */
1083 if (lp->tx_skbuff[entry]) {
1084 dev_kfree_skb_irq(lp->tx_skbuff[entry]);
1085 lp->tx_skbuff[entry] = NULL;
1086 }
1087 dirty_tx++;
1088 }
1089
1090#ifndef final_version
1091 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
1092 printk("out-of-sync dirty pointer, %d vs. %d, full=%s.\n",
1093 dirty_tx, lp->cur_tx,
1094 netif_queue_stopped(dev) ? "yes" : "no");
1095 dirty_tx += TX_RING_SIZE;
1096 }
1097#endif
1098
1099 /* if the ring is no longer full, accept more packets */
1100 if (netif_queue_stopped(dev) &&
1101 dirty_tx > lp->cur_tx - TX_RING_SIZE + 2)
1102 netif_wake_queue (dev);
1103
1104 lp->dirty_tx = dirty_tx;
1105 }
1106
1107 /* Log misc errors. */
1108 if (csr0 & 0x4000) lp->stats.tx_errors++; /* Tx babble. */
1109 if (csr0 & 0x1000) lp->stats.rx_errors++; /* Missed a Rx frame. */
1110 if (csr0 & 0x0800) {
1111 printk("%s: Bus master arbitration failure, status %4.4x.\n",
1112 dev->name, csr0);
1113 /* Restart the chip. */
1114 must_restart = 1;
1115 }
1116
1117 if (must_restart) {
1118 /* stop the chip to clear the error condition, then restart */
1119 outw(0x0000, dev->base_addr + LANCE_ADDR);
1120 outw(0x0004, dev->base_addr + LANCE_DATA);
1121 lance_restart(dev, 0x0002, 0);
1122 }
1123 }
1124
1125 /* Clear any other interrupt, and set interrupt enable. */
1126 outw(0x0000, dev->base_addr + LANCE_ADDR);
1127 outw(0x7940, dev->base_addr + LANCE_DATA);
1128
1129 if (lance_debug > 4)
1130 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
1131 dev->name, inw(ioaddr + LANCE_ADDR),
1132 inw(dev->base_addr + LANCE_DATA));
1133
1134 spin_unlock (&lp->devlock);
1135 return IRQ_HANDLED;
1136}
1137
1138static int
1139lance_rx(struct net_device *dev)
1140{
1141 struct lance_private *lp = dev->priv;
1142 int entry = lp->cur_rx & RX_RING_MOD_MASK;
1143 int i;
6aa20a22 1144
1da177e4
LT
1145 /* If we own the next entry, it's a new packet. Send it up. */
1146 while (lp->rx_ring[entry].base >= 0) {
1147 int status = lp->rx_ring[entry].base >> 24;
1148
1149 if (status != 0x03) { /* There was an error. */
1150 /* There is a tricky error noted by John Murphy,
1151 <murf@perftech.com> to Russ Nelson: Even with full-sized
1152 buffers it's possible for a jabber packet to use two
1153 buffers, with only the last correctly noting the error. */
1154 if (status & 0x01) /* Only count a general error at the */
1155 lp->stats.rx_errors++; /* end of a packet.*/
1156 if (status & 0x20) lp->stats.rx_frame_errors++;
1157 if (status & 0x10) lp->stats.rx_over_errors++;
1158 if (status & 0x08) lp->stats.rx_crc_errors++;
1159 if (status & 0x04) lp->stats.rx_fifo_errors++;
1160 lp->rx_ring[entry].base &= 0x03ffffff;
1161 }
6aa20a22 1162 else
1da177e4
LT
1163 {
1164 /* Malloc up new buffer, compatible with net3. */
1165 short pkt_len = (lp->rx_ring[entry].msg_length & 0xfff)-4;
1166 struct sk_buff *skb;
6aa20a22 1167
1da177e4
LT
1168 if(pkt_len<60)
1169 {
1170 printk("%s: Runt packet!\n",dev->name);
1171 lp->stats.rx_errors++;
1172 }
1173 else
1174 {
1175 skb = dev_alloc_skb(pkt_len+2);
6aa20a22 1176 if (skb == NULL)
1da177e4
LT
1177 {
1178 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
1179 for (i=0; i < RX_RING_SIZE; i++)
1180 if (lp->rx_ring[(entry+i) & RX_RING_MOD_MASK].base < 0)
1181 break;
1182
6aa20a22 1183 if (i > RX_RING_SIZE -2)
1da177e4
LT
1184 {
1185 lp->stats.rx_dropped++;
1186 lp->rx_ring[entry].base |= 0x80000000;
1187 lp->cur_rx++;
1188 }
1189 break;
1190 }
1191 skb->dev = dev;
1192 skb_reserve(skb,2); /* 16 byte align */
1193 skb_put(skb,pkt_len); /* Make room */
1194 eth_copy_and_sum(skb,
1195 (unsigned char *)isa_bus_to_virt((lp->rx_ring[entry].base & 0x00ffffff)),
1196 pkt_len,0);
1197 skb->protocol=eth_type_trans(skb,dev);
1198 netif_rx(skb);
1199 dev->last_rx = jiffies;
1200 lp->stats.rx_packets++;
1201 lp->stats.rx_bytes+=pkt_len;
1202 }
1203 }
1204 /* The docs say that the buffer length isn't touched, but Andrew Boyd
1205 of QNX reports that some revs of the 79C965 clear it. */
1206 lp->rx_ring[entry].buf_length = -PKT_BUF_SZ;
1207 lp->rx_ring[entry].base |= 0x80000000;
1208 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1209 }
1210
1211 /* We should check that at least two ring entries are free. If not,
1212 we should free one and mark stats->rx_dropped++. */
1213
1214 return 0;
1215}
1216
1217static int
1218lance_close(struct net_device *dev)
1219{
1220 int ioaddr = dev->base_addr;
1221 struct lance_private *lp = dev->priv;
1222
1223 netif_stop_queue (dev);
1224
1225 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1226 outw(112, ioaddr+LANCE_ADDR);
1227 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1228 }
1229 outw(0, ioaddr+LANCE_ADDR);
1230
1231 if (lance_debug > 1)
1232 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1233 dev->name, inw(ioaddr+LANCE_DATA));
1234
1235 /* We stop the LANCE here -- it occasionally polls
1236 memory if we don't. */
1237 outw(0x0004, ioaddr+LANCE_DATA);
1238
1239 if (dev->dma != 4)
1240 {
1241 unsigned long flags=claim_dma_lock();
1242 disable_dma(dev->dma);
1243 release_dma_lock(flags);
1244 }
1245 free_irq(dev->irq, dev);
1246
1247 lance_purge_ring(dev);
1248
1249 return 0;
1250}
1251
1252static struct net_device_stats *lance_get_stats(struct net_device *dev)
1253{
1254 struct lance_private *lp = dev->priv;
1255
1256 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1257 short ioaddr = dev->base_addr;
1258 short saved_addr;
1259 unsigned long flags;
1260
1261 spin_lock_irqsave(&lp->devlock, flags);
1262 saved_addr = inw(ioaddr+LANCE_ADDR);
1263 outw(112, ioaddr+LANCE_ADDR);
1264 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1265 outw(saved_addr, ioaddr+LANCE_ADDR);
1266 spin_unlock_irqrestore(&lp->devlock, flags);
1267 }
1268
1269 return &lp->stats;
1270}
1271
1272/* Set or clear the multicast filter for this adaptor.
1273 */
1274
1275static void set_multicast_list(struct net_device *dev)
1276{
1277 short ioaddr = dev->base_addr;
1278
1279 outw(0, ioaddr+LANCE_ADDR);
1280 outw(0x0004, ioaddr+LANCE_DATA); /* Temporarily stop the lance. */
1281
1282 if (dev->flags&IFF_PROMISC) {
1da177e4
LT
1283 outw(15, ioaddr+LANCE_ADDR);
1284 outw(0x8000, ioaddr+LANCE_DATA); /* Set promiscuous mode */
1285 } else {
1286 short multicast_table[4];
1287 int i;
1288 int num_addrs=dev->mc_count;
1289 if(dev->flags&IFF_ALLMULTI)
1290 num_addrs=1;
1291 /* FIXIT: We don't use the multicast table, but rely on upper-layer filtering. */
1292 memset(multicast_table, (num_addrs == 0) ? 0 : -1, sizeof(multicast_table));
1293 for (i = 0; i < 4; i++) {
1294 outw(8 + i, ioaddr+LANCE_ADDR);
1295 outw(multicast_table[i], ioaddr+LANCE_DATA);
1296 }
1297 outw(15, ioaddr+LANCE_ADDR);
1298 outw(0x0000, ioaddr+LANCE_DATA); /* Unset promiscuous mode */
1299 }
1300
1301 lance_restart(dev, 0x0142, 0); /* Resume normal operation */
1302
1303}
1304