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drivers/net: use vzalloc()
[mirror_ubuntu-bionic-kernel.git] / drivers / net / netxen / netxen_nic_init.c
CommitLineData
3d396eb1 1/*
5d242f1c 2 * Copyright (C) 2003 - 2009 NetXen, Inc.
13af7a6e 3 * Copyright (C) 2009 - QLogic Corporation.
3d396eb1 4 * All rights reserved.
80922fbc 5 *
3d396eb1
AK		 6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
80922fbc 10 *
3d396eb1
AK		 11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
80922fbc 15 *
3d396eb1
AK		 16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
19 * MA 02111-1307, USA.
80922fbc 20 *
3d396eb1 21 * The full GNU General Public License is included in this distribution
4d21fef4 22 * in the file called "COPYING".
80922fbc 23 *
3d396eb1
AK		 24 */
25
26#include <linux/netdevice.h>
27#include <linux/delay.h>
5a0e3ad6 28#include <linux/slab.h>
3d396eb1
AK		 29#include "netxen_nic.h"
30#include "netxen_nic_hw.h"
3d396eb1
AK		 31
32struct crb_addr_pair {
e0e20a1a
LCMT		 33 u32 addr;
34 u32 data;
3d396eb1
AK		 35};
36
37#define NETXEN_MAX_CRB_XFORM 60
38static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
e0e20a1a 39#define NETXEN_ADDR_ERROR (0xffffffff)
3d396eb1
AK		 40
41#define crb_addr_transform(name) \
42 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
43 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
44
cb8011ad
AK		 45#define NETXEN_NIC_XDMA_RESET 0x8000ff
46
becf46a0 47static void
d8b100c5
DP		 48netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
49 struct nx_host_rds_ring *rds_ring);
f50330f9 50static int netxen_p3_has_mn(struct netxen_adapter *adapter);
993fb90c 51
3d396eb1
AK		 52static void crb_addr_transform_setup(void)
53{
54 crb_addr_transform(XDMA);
55 crb_addr_transform(TIMR);
56 crb_addr_transform(SRE);
57 crb_addr_transform(SQN3);
58 crb_addr_transform(SQN2);
59 crb_addr_transform(SQN1);
60 crb_addr_transform(SQN0);
61 crb_addr_transform(SQS3);
62 crb_addr_transform(SQS2);
63 crb_addr_transform(SQS1);
64 crb_addr_transform(SQS0);
65 crb_addr_transform(RPMX7);
66 crb_addr_transform(RPMX6);
67 crb_addr_transform(RPMX5);
68 crb_addr_transform(RPMX4);
69 crb_addr_transform(RPMX3);
70 crb_addr_transform(RPMX2);
71 crb_addr_transform(RPMX1);
72 crb_addr_transform(RPMX0);
73 crb_addr_transform(ROMUSB);
74 crb_addr_transform(SN);
75 crb_addr_transform(QMN);
76 crb_addr_transform(QMS);
77 crb_addr_transform(PGNI);
78 crb_addr_transform(PGND);
79 crb_addr_transform(PGN3);
80 crb_addr_transform(PGN2);
81 crb_addr_transform(PGN1);
82 crb_addr_transform(PGN0);
83 crb_addr_transform(PGSI);
84 crb_addr_transform(PGSD);
85 crb_addr_transform(PGS3);
86 crb_addr_transform(PGS2);
87 crb_addr_transform(PGS1);
88 crb_addr_transform(PGS0);
89 crb_addr_transform(PS);
90 crb_addr_transform(PH);
91 crb_addr_transform(NIU);
92 crb_addr_transform(I2Q);
93 crb_addr_transform(EG);
94 crb_addr_transform(MN);
95 crb_addr_transform(MS);
96 crb_addr_transform(CAS2);
97 crb_addr_transform(CAS1);
98 crb_addr_transform(CAS0);
99 crb_addr_transform(CAM);
100 crb_addr_transform(C2C1);
101 crb_addr_transform(C2C0);
1fcca1a5 102 crb_addr_transform(SMB);
e4c93c81
DP		 103 crb_addr_transform(OCM0);
104 crb_addr_transform(I2C0);
3d396eb1
AK		 105}
106
2956640d 107void netxen_release_rx_buffers(struct netxen_adapter *adapter)
3d396eb1 108{
2956640d 109 struct netxen_recv_context *recv_ctx;
48bfd1e0 110 struct nx_host_rds_ring *rds_ring;
2956640d 111 struct netxen_rx_buffer *rx_buf;
becf46a0
DP		 112 int i, ring;
113
114 recv_ctx = &adapter->recv_ctx;
115 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
116 rds_ring = &recv_ctx->rds_rings[ring];
438627c7 117 for (i = 0; i < rds_ring->num_desc; ++i) {
becf46a0
DP		 118 rx_buf = &(rds_ring->rx_buf_arr[i]);
119 if (rx_buf->state == NETXEN_BUFFER_FREE)
120 continue;
121 pci_unmap_single(adapter->pdev,
122 rx_buf->dma,
123 rds_ring->dma_size,
124 PCI_DMA_FROMDEVICE);
125 if (rx_buf->skb != NULL)
126 dev_kfree_skb_any(rx_buf->skb);
2956640d
DP		 127 }
128 }
129}
130
131void netxen_release_tx_buffers(struct netxen_adapter *adapter)
132{
133 struct netxen_cmd_buffer *cmd_buf;
134 struct netxen_skb_frag *buffrag;
135 int i, j;
4ea528a1 136 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
2956640d 137
d877f1e3
DP		 138 cmd_buf = tx_ring->cmd_buf_arr;
139 for (i = 0; i < tx_ring->num_desc; i++) {
2956640d
DP		 140 buffrag = cmd_buf->frag_array;
141 if (buffrag->dma) {
142 pci_unmap_single(adapter->pdev, buffrag->dma,
143 buffrag->length, PCI_DMA_TODEVICE);
144 buffrag->dma = 0ULL;
145 }
146 for (j = 0; j < cmd_buf->frag_count; j++) {
147 buffrag++;
148 if (buffrag->dma) {
149 pci_unmap_page(adapter->pdev, buffrag->dma,
150 buffrag->length,
151 PCI_DMA_TODEVICE);
152 buffrag->dma = 0ULL;
153 }
154 }
2956640d
DP		 155 if (cmd_buf->skb) {
156 dev_kfree_skb_any(cmd_buf->skb);
157 cmd_buf->skb = NULL;
158 }
159 cmd_buf++;
160 }
161}
162
163void netxen_free_sw_resources(struct netxen_adapter *adapter)
164{
165 struct netxen_recv_context *recv_ctx;
48bfd1e0 166 struct nx_host_rds_ring *rds_ring;
d877f1e3 167 struct nx_host_tx_ring *tx_ring;
becf46a0
DP		 168 int ring;
169
170 recv_ctx = &adapter->recv_ctx;
4ea528a1
DP		 171
172 if (recv_ctx->rds_rings == NULL)
173 goto skip_rds;
174
becf46a0
DP		 175 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
176 rds_ring = &recv_ctx->rds_rings[ring];
f2333a01
F		 177 vfree(rds_ring->rx_buf_arr);
178 rds_ring->rx_buf_arr = NULL;
2956640d 179 }
4ea528a1
DP		 180 kfree(recv_ctx->rds_rings);
181
182skip_rds:
183 if (adapter->tx_ring == NULL)
184 return;
becf46a0 185
4ea528a1 186 tx_ring = adapter->tx_ring;
f2333a01 187 vfree(tx_ring->cmd_buf_arr);
011f4ea0
AKS		 188 kfree(tx_ring);
189 adapter->tx_ring = NULL;
2956640d
DP		 190}
191
192int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
193{
194 struct netxen_recv_context *recv_ctx;
48bfd1e0 195 struct nx_host_rds_ring *rds_ring;
d8b100c5 196 struct nx_host_sds_ring *sds_ring;
4ea528a1 197 struct nx_host_tx_ring *tx_ring;
2956640d 198 struct netxen_rx_buffer *rx_buf;
4ea528a1 199 int ring, i, size;
2956640d
DP		 200
201 struct netxen_cmd_buffer *cmd_buf_arr;
202 struct net_device *netdev = adapter->netdev;
d877f1e3 203 struct pci_dev *pdev = adapter->pdev;
2956640d 204
4ea528a1
DP		 205 size = sizeof(struct nx_host_tx_ring);
206 tx_ring = kzalloc(size, GFP_KERNEL);
207 if (tx_ring == NULL) {
208 dev_err(&pdev->dev, "%s: failed to allocate tx ring struct\n",
209 netdev->name);
210 return -ENOMEM;
211 }
212 adapter->tx_ring = tx_ring;
213
d877f1e3 214 tx_ring->num_desc = adapter->num_txd;
b2af9cb0 215 tx_ring->txq = netdev_get_tx_queue(netdev, 0);
4ea528a1 216
89bf67f1 217 cmd_buf_arr = vzalloc(TX_BUFF_RINGSIZE(tx_ring));
2956640d 218 if (cmd_buf_arr == NULL) {
d877f1e3 219 dev_err(&pdev->dev, "%s: failed to allocate cmd buffer ring\n",
2956640d 220 netdev->name);
bf445080 221 goto err_out;
2956640d 222 }
d877f1e3 223 tx_ring->cmd_buf_arr = cmd_buf_arr;
2956640d 224
becf46a0 225 recv_ctx = &adapter->recv_ctx;
4ea528a1
DP		 226
227 size = adapter->max_rds_rings * sizeof (struct nx_host_rds_ring);
228 rds_ring = kzalloc(size, GFP_KERNEL);
229 if (rds_ring == NULL) {
230 dev_err(&pdev->dev, "%s: failed to allocate rds ring struct\n",
231 netdev->name);
bf445080 232 goto err_out;
4ea528a1
DP		 233 }
234 recv_ctx->rds_rings = rds_ring;
235
becf46a0
DP		 236 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
237 rds_ring = &recv_ctx->rds_rings[ring];
438627c7
DP		 238 switch (ring) {
239 case RCV_RING_NORMAL:
240 rds_ring->num_desc = adapter->num_rxd;
becf46a0
DP		 241 if (adapter->ahw.cut_through) {
242 rds_ring->dma_size =
243 NX_CT_DEFAULT_RX_BUF_LEN;
48bfd1e0 244 rds_ring->skb_size =
becf46a0
DP		 245 NX_CT_DEFAULT_RX_BUF_LEN;
246 } else {
9b08beba
DP		 247 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
248 rds_ring->dma_size =
249 NX_P3_RX_BUF_MAX_LEN;
250 else
251 rds_ring->dma_size =
252 NX_P2_RX_BUF_MAX_LEN;
becf46a0 253 rds_ring->skb_size =
9b08beba 254 rds_ring->dma_size + NET_IP_ALIGN;
becf46a0
DP		 255 }
256 break;
2956640d 257
438627c7
DP		 258 case RCV_RING_JUMBO:
259 rds_ring->num_desc = adapter->num_jumbo_rxd;
becf46a0
DP		 260 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
261 rds_ring->dma_size =
262 NX_P3_RX_JUMBO_BUF_MAX_LEN;
263 else
264 rds_ring->dma_size =
265 NX_P2_RX_JUMBO_BUF_MAX_LEN;
bc75e5bf
DP		 266
267 if (adapter->capabilities & NX_CAP0_HW_LRO)
268 rds_ring->dma_size += NX_LRO_BUFFER_EXTRA;
269
becf46a0
DP		 270 rds_ring->skb_size =
271 rds_ring->dma_size + NET_IP_ALIGN;
272 break;
2956640d 273
becf46a0 274 case RCV_RING_LRO:
438627c7 275 rds_ring->num_desc = adapter->num_lro_rxd;
9b08beba
DP		 276 rds_ring->dma_size = NX_RX_LRO_BUFFER_LENGTH;
277 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
becf46a0
DP		 278 break;
279
280 }
281 rds_ring->rx_buf_arr = (struct netxen_rx_buffer *)
89bf67f1 282 vzalloc(RCV_BUFF_RINGSIZE(rds_ring));
becf46a0
DP		 283 if (rds_ring->rx_buf_arr == NULL) {
284 printk(KERN_ERR "%s: Failed to allocate "
285 "rx buffer ring %d\n",
286 netdev->name, ring);
287 /* free whatever was already allocated */
288 goto err_out;
289 }
becf46a0
DP		 290 INIT_LIST_HEAD(&rds_ring->free_list);
291 /*
292 * Now go through all of them, set reference handles
293 * and put them in the queues.
294 */
becf46a0 295 rx_buf = rds_ring->rx_buf_arr;
4ea528a1 296 for (i = 0; i < rds_ring->num_desc; i++) {
becf46a0
DP		 297 list_add_tail(&rx_buf->list,
298 &rds_ring->free_list);
299 rx_buf->ref_handle = i;
300 rx_buf->state = NETXEN_BUFFER_FREE;
301 rx_buf++;
3d396eb1 302 }
d8b100c5
DP		 303 spin_lock_init(&rds_ring->lock);
304 }
305
306 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
307 sds_ring = &recv_ctx->sds_rings[ring];
308 sds_ring->irq = adapter->msix_entries[ring].vector;
d8b100c5
DP		 309 sds_ring->adapter = adapter;
310 sds_ring->num_desc = adapter->num_rxd;
311
312 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
313 INIT_LIST_HEAD(&sds_ring->free_list[i]);
3d396eb1 314 }
2956640d
DP		 315
316 return 0;
317
318err_out:
319 netxen_free_sw_resources(adapter);
320 return -ENOMEM;
3d396eb1
AK		 321}
322
3d396eb1
AK		 323/*
324 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
325 * address to external PCI CRB address.
326 */
993fb90c 327static u32 netxen_decode_crb_addr(u32 addr)
3d396eb1
AK		 328{
329 int i;
e0e20a1a 330 u32 base_addr, offset, pci_base;
3d396eb1
AK		 331
332 crb_addr_transform_setup();
333
334 pci_base = NETXEN_ADDR_ERROR;
335 base_addr = addr & 0xfff00000;
336 offset = addr & 0x000fffff;
337
338 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
339 if (crb_addr_xform[i] == base_addr) {
340 pci_base = i << 20;
341 break;
342 }
343 }
344 if (pci_base == NETXEN_ADDR_ERROR)
345 return pci_base;
346 else
807540ba 347 return pci_base + offset;
3d396eb1
AK		 348}
349
c9517e58 350#define NETXEN_MAX_ROM_WAIT_USEC 100
3d396eb1 351
993fb90c 352static int netxen_wait_rom_done(struct netxen_adapter *adapter)
3d396eb1
AK		 353{
354 long timeout = 0;
355 long done = 0;
356
27c915a4
DP		 357 cond_resched();
358
3d396eb1 359 while (done == 0) {
f98a9f69 360 done = NXRD32(adapter, NETXEN_ROMUSB_GLB_STATUS);
3d396eb1 361 done &= 2;
c9517e58
DP		 362 if (++timeout >= NETXEN_MAX_ROM_WAIT_USEC) {
363 dev_err(&adapter->pdev->dev,
364 "Timeout reached waiting for rom done");
3d396eb1
AK		 365 return -EIO;
366 }
c9517e58 367 udelay(1);
3d396eb1
AK		 368 }
369 return 0;
370}
371
993fb90c
AB		 372static int do_rom_fast_read(struct netxen_adapter *adapter,
373 int addr, int *valp)
3d396eb1 374{
f98a9f69
DP		 375 NXWR32(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
376 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
377 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
378 NXWR32(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
3d396eb1
AK		 379 if (netxen_wait_rom_done(adapter)) {
380 printk("Error waiting for rom done\n");
381 return -EIO;
382 }
383 /* reset abyte_cnt and dummy_byte_cnt */
f98a9f69 384 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
27c915a4 385 udelay(10);
f98a9f69 386 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
3d396eb1 387
f98a9f69 388 *valp = NXRD32(adapter, NETXEN_ROMUSB_ROM_RDATA);
3d396eb1
AK		 389 return 0;
390}
391
993fb90c
AB		 392static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
393 u8 *bytes, size_t size)
27d2ab54
AK		 394{
395 int addridx;
396 int ret = 0;
397
398 for (addridx = addr; addridx < (addr + size); addridx += 4) {
f305f789
AV		 399 int v;
400 ret = do_rom_fast_read(adapter, addridx, &v);
27d2ab54
AK		 401 if (ret != 0)
402 break;
f305f789 403 *(__le32 *)bytes = cpu_to_le32(v);
27d2ab54
AK		 404 bytes += 4;
405 }
406
407 return ret;
408}
409
410int
4790654c 411netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
27d2ab54
AK		 412 u8 *bytes, size_t size)
413{
414 int ret;
415
c9517e58 416 ret = netxen_rom_lock(adapter);
27d2ab54
AK		 417 if (ret < 0)
418 return ret;
419
420 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
421
422 netxen_rom_unlock(adapter);
423 return ret;
424}
425
3d396eb1
AK		 426int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
427{
428 int ret;
429
c9517e58 430 if (netxen_rom_lock(adapter) != 0)
3d396eb1
AK		 431 return -EIO;
432
433 ret = do_rom_fast_read(adapter, addr, valp);
cb8011ad
AK		 434 netxen_rom_unlock(adapter);
435 return ret;
436}
437
3d396eb1
AK		 438#define NETXEN_BOARDTYPE 0x4008
439#define NETXEN_BOARDNUM 0x400c
440#define NETXEN_CHIPNUM 0x4010
3d396eb1 441
0be367bd 442int netxen_pinit_from_rom(struct netxen_adapter *adapter)
3d396eb1 443{
dcd56fdb 444 int addr, val;
27c915a4 445 int i, n, init_delay = 0;
3d396eb1 446 struct crb_addr_pair *buf;
27c915a4 447 unsigned offset;
e0e20a1a 448 u32 off;
3d396eb1
AK		 449
450 /* resetall */
c9517e58 451 netxen_rom_lock(adapter);
f98a9f69 452 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0xffffffff);
27c915a4 453 netxen_rom_unlock(adapter);
3d396eb1 454
2956640d
DP		 455 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
456 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
27c915a4 457 (n != 0xcafecafe) ||
2956640d
DP		 458 netxen_rom_fast_read(adapter, 4, &n) != 0) {
459 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
460 "n: %08x\n", netxen_nic_driver_name, n);
3d396eb1
AK		 461 return -EIO;
462 }
2956640d
DP		 463 offset = n & 0xffffU;
464 n = (n >> 16) & 0xffffU;
465 } else {
466 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
467 !(n & 0x80000000)) {
468 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
469 "n: %08x\n", netxen_nic_driver_name, n);
470 return -EIO;
3d396eb1 471 }
2956640d
DP		 472 offset = 1;
473 n &= ~0x80000000;
474 }
475
0be367bd 476 if (n >= 1024) {
2956640d
DP		 477 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not"
478 " initialized.\n", __func__, n);
479 return -EIO;
480 }
3d396eb1 481
2956640d
DP		 482 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
483 if (buf == NULL) {
484 printk("%s: netxen_pinit_from_rom: Unable to calloc memory.\n",
485 netxen_nic_driver_name);
486 return -ENOMEM;
487 }
0be367bd 488
2956640d
DP		 489 for (i = 0; i < n; i++) {
490 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
584dbe94
DM		 491 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
492 kfree(buf);
2956640d 493 return -EIO;
584dbe94 494 }
2956640d
DP		 495
496 buf[i].addr = addr;
497 buf[i].data = val;
498
2956640d 499 }
0be367bd 500
2956640d
DP		 501 for (i = 0; i < n; i++) {
502
503 off = netxen_decode_crb_addr(buf[i].addr);
504 if (off == NETXEN_ADDR_ERROR) {
505 printk(KERN_ERR"CRB init value out of range %x\n",
1fcca1a5 506 buf[i].addr);
2956640d
DP		 507 continue;
508 }
509 off += NETXEN_PCI_CRBSPACE;
0be367bd
AKS		 510
511 if (off & 1)
512 continue;
513
2956640d
DP		 514 /* skipping cold reboot MAGIC */
515 if (off == NETXEN_CAM_RAM(0x1fc))
516 continue;
517
518 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
8bee0a91
DP		 519 if (off == (NETXEN_CRB_I2C0 + 0x1c))
520 continue;
2956640d
DP		 521 /* do not reset PCI */
522 if (off == (ROMUSB_GLB + 0xbc))
1fcca1a5 523 continue;
27c915a4
DP		 524 if (off == (ROMUSB_GLB + 0xa8))
525 continue;
526 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
527 continue;
528 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
529 continue;
530 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
531 continue;
e7473f12
AKS		 532 if ((off & 0x0ff00000) == NETXEN_CRB_DDR_NET)
533 continue;
0be367bd
AKS		 534 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18) &&
535 !NX_IS_REVISION_P3P(adapter->ahw.revision_id))
2956640d
DP		 536 buf[i].data = 0x1020;
537 /* skip the function enable register */
538 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION))
3d396eb1 539 continue;
2956640d
DP		 540 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2))
541 continue;
542 if ((off & 0x0ff00000) == NETXEN_CRB_SMB)
543 continue;
544 }
3d396eb1 545
27c915a4 546 init_delay = 1;
2956640d
DP		 547 /* After writing this register, HW needs time for CRB */
548 /* to quiet down (else crb_window returns 0xffffffff) */
549 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
27c915a4 550 init_delay = 1000;
2956640d 551 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
3d396eb1 552 /* hold xdma in reset also */
cb8011ad 553 buf[i].data = NETXEN_NIC_XDMA_RESET;
27c915a4 554 buf[i].data = 0x8000ff;
3d396eb1 555 }
2956640d 556 }
3d396eb1 557
f98a9f69 558 NXWR32(adapter, off, buf[i].data);
3d396eb1 559
27c915a4 560 msleep(init_delay);
2956640d
DP		 561 }
562 kfree(buf);
3d396eb1 563
2956640d 564 /* disable_peg_cache_all */
3d396eb1 565
2956640d
DP		 566 /* unreset_net_cache */
567 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
f98a9f69
DP		 568 val = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET);
569 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f));
3d396eb1 570 }
2956640d
DP		 571
572 /* p2dn replyCount */
f98a9f69 573 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
2956640d 574 /* disable_peg_cache 0 */
f98a9f69 575 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8);
2956640d 576 /* disable_peg_cache 1 */
f98a9f69 577 NXWR32(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8);
2956640d
DP		 578
579 /* peg_clr_all */
580
581 /* peg_clr 0 */
f98a9f69
DP		 582 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0);
583 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0);
2956640d 584 /* peg_clr 1 */
f98a9f69
DP		 585 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0);
586 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0);
2956640d 587 /* peg_clr 2 */
f98a9f69
DP		 588 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0);
589 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0);
2956640d 590 /* peg_clr 3 */
f98a9f69
DP		 591 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0);
592 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0);
3d396eb1
AK		 593 return 0;
594}
595
f50330f9
AKS		 596static struct uni_table_desc *nx_get_table_desc(const u8 *unirom, int section)
597{
598 uint32_t i;
599 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
600 __le32 entries = cpu_to_le32(directory->num_entries);
601
602 for (i = 0; i < entries; i++) {
603
604 __le32 offs = cpu_to_le32(directory->findex) +
605 (i * cpu_to_le32(directory->entry_size));
606 __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8));
607
608 if (tab_type == section)
609 return (struct uni_table_desc *) &unirom[offs];
610 }
611
612 return NULL;
613}
614
10c0f2a8
RB		 615#define QLCNIC_FILEHEADER_SIZE (14 * 4)
616
f50330f9 617static int
10c0f2a8
RB		 618netxen_nic_validate_header(struct netxen_adapter *adapter)
619 {
f50330f9 620 const u8 *unirom = adapter->fw->data;
10c0f2a8
RB		 621 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
622 u32 fw_file_size = adapter->fw->size;
623 u32 tab_size;
f50330f9 624 __le32 entries;
10c0f2a8
RB		 625 __le32 entry_size;
626
627 if (fw_file_size < QLCNIC_FILEHEADER_SIZE)
628 return -EINVAL;
629
630 entries = cpu_to_le32(directory->num_entries);
631 entry_size = cpu_to_le32(directory->entry_size);
632 tab_size = cpu_to_le32(directory->findex) + (entries * entry_size);
633
634 if (fw_file_size < tab_size)
635 return -EINVAL;
636
637 return 0;
638}
639
640static int
641netxen_nic_validate_bootld(struct netxen_adapter *adapter)
642{
643 struct uni_table_desc *tab_desc;
644 struct uni_data_desc *descr;
645 const u8 *unirom = adapter->fw->data;
646 __le32 idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
647 NX_UNI_BOOTLD_IDX_OFF));
648 u32 offs;
649 u32 tab_size;
650 u32 data_size;
651
652 tab_desc = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_BOOTLD);
653
654 if (!tab_desc)
655 return -EINVAL;
656
657 tab_size = cpu_to_le32(tab_desc->findex) +
658 (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
659
660 if (adapter->fw->size < tab_size)
661 return -EINVAL;
662
663 offs = cpu_to_le32(tab_desc->findex) +
664 (cpu_to_le32(tab_desc->entry_size) * (idx));
665 descr = (struct uni_data_desc *)&unirom[offs];
666
667 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
668
669 if (adapter->fw->size < data_size)
670 return -EINVAL;
671
672 return 0;
673}
674
675static int
676netxen_nic_validate_fw(struct netxen_adapter *adapter)
677{
678 struct uni_table_desc *tab_desc;
679 struct uni_data_desc *descr;
680 const u8 *unirom = adapter->fw->data;
681 __le32 idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
682 NX_UNI_FIRMWARE_IDX_OFF));
683 u32 offs;
684 u32 tab_size;
685 u32 data_size;
686
687 tab_desc = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_FW);
688
689 if (!tab_desc)
690 return -EINVAL;
f50330f9 691
10c0f2a8
RB		 692 tab_size = cpu_to_le32(tab_desc->findex) +
693 (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
694
695 if (adapter->fw->size < tab_size)
696 return -EINVAL;
697
698 offs = cpu_to_le32(tab_desc->findex) +
699 (cpu_to_le32(tab_desc->entry_size) * (idx));
700 descr = (struct uni_data_desc *)&unirom[offs];
701 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
702
703 if (adapter->fw->size < data_size)
704 return -EINVAL;
705
706 return 0;
707}
708
709
710static int
711netxen_nic_validate_product_offs(struct netxen_adapter *adapter)
712{
713 struct uni_table_desc *ptab_descr;
714 const u8 *unirom = adapter->fw->data;
634d7df8
DP		 715 int mn_present = (NX_IS_REVISION_P2(adapter->ahw.revision_id)) ?
716 1 : netxen_p3_has_mn(adapter);
10c0f2a8
RB		 717 __le32 entries;
718 __le32 entry_size;
719 u32 tab_size;
720 u32 i;
634d7df8 721
f50330f9
AKS		 722 ptab_descr = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_PRODUCT_TBL);
723 if (ptab_descr == NULL)
10c0f2a8 724 return -EINVAL;
f50330f9
AKS		 725
726 entries = cpu_to_le32(ptab_descr->num_entries);
10c0f2a8
RB		 727 entry_size = cpu_to_le32(ptab_descr->entry_size);
728 tab_size = cpu_to_le32(ptab_descr->findex) + (entries * entry_size);
729
730 if (adapter->fw->size < tab_size)
731 return -EINVAL;
f50330f9 732
634d7df8 733nomn:
f50330f9
AKS		 734 for (i = 0; i < entries; i++) {
735
736 __le32 flags, file_chiprev, offs;
737 u8 chiprev = adapter->ahw.revision_id;
f50330f9
AKS		 738 uint32_t flagbit;
739
740 offs = cpu_to_le32(ptab_descr->findex) +
741 (i * cpu_to_le32(ptab_descr->entry_size));
742 flags = cpu_to_le32(*((int *)&unirom[offs] + NX_UNI_FLAGS_OFF));
743 file_chiprev = cpu_to_le32(*((int *)&unirom[offs] +
744 NX_UNI_CHIP_REV_OFF));
745
746 flagbit = mn_present ? 1 : 2;
747
748 if ((chiprev == file_chiprev) &&
749 ((1ULL << flagbit) & flags)) {
750 adapter->file_prd_off = offs;
751 return 0;
752 }
753 }
754
634d7df8
DP		 755 if (mn_present && NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
756 mn_present = 0;
757 goto nomn;
758 }
759
10c0f2a8 760 return -EINVAL;
f50330f9
AKS		 761}
762
10c0f2a8
RB		 763static int
764netxen_nic_validate_unified_romimage(struct netxen_adapter *adapter)
765{
766 if (netxen_nic_validate_header(adapter)) {
767 dev_err(&adapter->pdev->dev,
768 "unified image: header validation failed\n");
769 return -EINVAL;
770 }
771
772 if (netxen_nic_validate_product_offs(adapter)) {
773 dev_err(&adapter->pdev->dev,
774 "unified image: product validation failed\n");
775 return -EINVAL;
776 }
777
778 if (netxen_nic_validate_bootld(adapter)) {
779 dev_err(&adapter->pdev->dev,
780 "unified image: bootld validation failed\n");
781 return -EINVAL;
782 }
783
784 if (netxen_nic_validate_fw(adapter)) {
785 dev_err(&adapter->pdev->dev,
786 "unified image: firmware validation failed\n");
787 return -EINVAL;
788 }
789
790 return 0;
791}
f50330f9
AKS		 792
793static struct uni_data_desc *nx_get_data_desc(struct netxen_adapter *adapter,
794 u32 section, u32 idx_offset)
795{
796 const u8 *unirom = adapter->fw->data;
797 int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
798 idx_offset));
799 struct uni_table_desc *tab_desc;
800 __le32 offs;
801
802 tab_desc = nx_get_table_desc(unirom, section);
803
804 if (tab_desc == NULL)
805 return NULL;
806
807 offs = cpu_to_le32(tab_desc->findex) +
808 (cpu_to_le32(tab_desc->entry_size) * idx);
809
810 return (struct uni_data_desc *)&unirom[offs];
811}
812
813static u8 *
814nx_get_bootld_offs(struct netxen_adapter *adapter)
815{
816 u32 offs = NETXEN_BOOTLD_START;
817
818 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE)
819 offs = cpu_to_le32((nx_get_data_desc(adapter,
820 NX_UNI_DIR_SECT_BOOTLD,
821 NX_UNI_BOOTLD_IDX_OFF))->findex);
822
823 return (u8 *)&adapter->fw->data[offs];
824}
825
826static u8 *
827nx_get_fw_offs(struct netxen_adapter *adapter)
828{
829 u32 offs = NETXEN_IMAGE_START;
830
831 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE)
832 offs = cpu_to_le32((nx_get_data_desc(adapter,
833 NX_UNI_DIR_SECT_FW,
834 NX_UNI_FIRMWARE_IDX_OFF))->findex);
835
836 return (u8 *)&adapter->fw->data[offs];
837}
838
839static __le32
840nx_get_fw_size(struct netxen_adapter *adapter)
841{
842 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE)
843 return cpu_to_le32((nx_get_data_desc(adapter,
844 NX_UNI_DIR_SECT_FW,
845 NX_UNI_FIRMWARE_IDX_OFF))->size);
846 else
847 return cpu_to_le32(
848 *(u32 *)&adapter->fw->data[NX_FW_SIZE_OFFSET]);
849}
850
851static __le32
852nx_get_fw_version(struct netxen_adapter *adapter)
853{
854 struct uni_data_desc *fw_data_desc;
855 const struct firmware *fw = adapter->fw;
856 __le32 major, minor, sub;
857 const u8 *ver_str;
858 int i, ret = 0;
859
860 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) {
861
862 fw_data_desc = nx_get_data_desc(adapter,
863 NX_UNI_DIR_SECT_FW, NX_UNI_FIRMWARE_IDX_OFF);
864 ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) +
865 cpu_to_le32(fw_data_desc->size) - 17;
866
867 for (i = 0; i < 12; i++) {
868 if (!strncmp(&ver_str[i], "REV=", 4)) {
869 ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
870 &major, &minor, &sub);
871 break;
872 }
873 }
874
875 if (ret != 3)
876 return 0;
877
878 return major + (minor << 8) + (sub << 16);
879
880 } else
881 return cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
882}
883
884static __le32
885nx_get_bios_version(struct netxen_adapter *adapter)
886{
887 const struct firmware *fw = adapter->fw;
888 __le32 bios_ver, prd_off = adapter->file_prd_off;
889
890 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) {
891 bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off])
892 + NX_UNI_BIOS_VERSION_OFF));
bb2792e0 893 return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) +
f50330f9
AKS		 894 (bios_ver >> 24);
895 } else
896 return cpu_to_le32(*(u32 *)&fw->data[NX_BIOS_VERSION_OFFSET]);
897
898}
899
67c38fc6
DP		 900int
901netxen_need_fw_reset(struct netxen_adapter *adapter)
902{
903 u32 count, old_count;
904 u32 val, version, major, minor, build;
905 int i, timeout;
906 u8 fw_type;
907
908 /* NX2031 firmware doesn't support heartbit */
909 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
910 return 1;
911
6a808c6c
AKS		 912 if (adapter->need_fw_reset)
913 return 1;
914
67c38fc6
DP		 915 /* last attempt had failed */
916 if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED)
917 return 1;
918
581e8ae4 919 old_count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
67c38fc6
DP		 920
921 for (i = 0; i < 10; i++) {
922
923 timeout = msleep_interruptible(200);
924 if (timeout) {
925 NXWR32(adapter, CRB_CMDPEG_STATE,
926 PHAN_INITIALIZE_FAILED);
927 return -EINTR;
928 }
929
930 count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
931 if (count != old_count)
932 break;
933 }
934
935 /* firmware is dead */
936 if (count == old_count)
937 return 1;
938
939 /* check if we have got newer or different file firmware */
940 if (adapter->fw) {
941
f50330f9 942 val = nx_get_fw_version(adapter);
67c38fc6 943
67c38fc6
DP		 944 version = NETXEN_DECODE_VERSION(val);
945
946 major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR);
947 minor = NXRD32(adapter, NETXEN_FW_VERSION_MINOR);
948 build = NXRD32(adapter, NETXEN_FW_VERSION_SUB);
949
950 if (version > NETXEN_VERSION_CODE(major, minor, build))
951 return 1;
952
f50330f9
AKS		 953 if (version == NETXEN_VERSION_CODE(major, minor, build) &&
954 adapter->fw_type != NX_UNIFIED_ROMIMAGE) {
67c38fc6
DP		 955
956 val = NXRD32(adapter, NETXEN_MIU_MN_CONTROL);
957 fw_type = (val & 0x4) ?
958 NX_P3_CT_ROMIMAGE : NX_P3_MN_ROMIMAGE;
959
960 if (adapter->fw_type != fw_type)
961 return 1;
962 }
963 }
964
965 return 0;
966}
967
968static char *fw_name[] = {
7e8e5d97
DP		 969 NX_P2_MN_ROMIMAGE_NAME,
970 NX_P3_CT_ROMIMAGE_NAME,
971 NX_P3_MN_ROMIMAGE_NAME,
972 NX_UNIFIED_ROMIMAGE_NAME,
973 NX_FLASH_ROMIMAGE_NAME,
67c38fc6
DP		 974};
975
f7185c71
DP		 976int
977netxen_load_firmware(struct netxen_adapter *adapter)
978{
979 u64 *ptr64;
980 u32 i, flashaddr, size;
981 const struct firmware *fw = adapter->fw;
67c38fc6
DP		 982 struct pci_dev *pdev = adapter->pdev;
983
984 dev_info(&pdev->dev, "loading firmware from %s\n",
985 fw_name[adapter->fw_type]);
f7185c71
DP		 986
987 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
988 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 1);
989
990 if (fw) {
991 __le64 data;
992
993 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
994
f50330f9 995 ptr64 = (u64 *)nx_get_bootld_offs(adapter);
f7185c71
DP		 996 flashaddr = NETXEN_BOOTLD_START;
997
998 for (i = 0; i < size; i++) {
999 data = cpu_to_le64(ptr64[i]);
f50330f9
AKS		 1000
1001 if (adapter->pci_mem_write(adapter, flashaddr, data))
1f5e055d
AKS		 1002 return -EIO;
1003
f7185c71
DP		 1004 flashaddr += 8;
1005 }
1006
f50330f9 1007 size = (__force u32)nx_get_fw_size(adapter) / 8;
f7185c71 1008
f50330f9 1009 ptr64 = (u64 *)nx_get_fw_offs(adapter);
f7185c71
DP		 1010 flashaddr = NETXEN_IMAGE_START;
1011
1012 for (i = 0; i < size; i++) {
1013 data = cpu_to_le64(ptr64[i]);
1014
1015 if (adapter->pci_mem_write(adapter,
1f5e055d 1016 flashaddr, data))
f7185c71
DP		 1017 return -EIO;
1018
1019 flashaddr += 8;
1020 }
e270299a
AKS		 1021
1022 size = (__force u32)nx_get_fw_size(adapter) % 8;
1023 if (size) {
1024 data = cpu_to_le64(ptr64[i]);
1025
1026 if (adapter->pci_mem_write(adapter,
1027 flashaddr, data))
1028 return -EIO;
1029 }
1030
f7185c71 1031 } else {
f78c0850
AKS		 1032 u64 data;
1033 u32 hi, lo;
f7185c71 1034
f78c0850 1035 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
f7185c71
DP		 1036 flashaddr = NETXEN_BOOTLD_START;
1037
1038 for (i = 0; i < size; i++) {
1039 if (netxen_rom_fast_read(adapter,
1f5e055d 1040 flashaddr, (int *)&lo) != 0)
f78c0850
AKS		 1041 return -EIO;
1042 if (netxen_rom_fast_read(adapter,
1f5e055d 1043 flashaddr + 4, (int *)&hi) != 0)
f7185c71
DP		 1044 return -EIO;
1045
f78c0850
AKS		 1046 /* hi, lo are already in host endian byteorder */
1047 data = (((u64)hi << 32) | lo);
1048
f7185c71 1049 if (adapter->pci_mem_write(adapter,
1f5e055d 1050 flashaddr, data))
f7185c71
DP		 1051 return -EIO;
1052
f78c0850 1053 flashaddr += 8;
f7185c71
DP		 1054 }
1055 }
1056 msleep(1);
1057
0be367bd
AKS		 1058 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id)) {
1059 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x18, 0x1020);
1060 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001e);
1061 } else if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
f7185c71
DP		 1062 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d);
1063 else {
1064 NXWR32(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff);
1065 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 0);
1066 }
1067
1068 return 0;
1069}
1070
1071static int
f50330f9 1072netxen_validate_firmware(struct netxen_adapter *adapter)
f7185c71
DP		 1073{
1074 __le32 val;
10c0f2a8 1075 u32 ver, min_ver, bios;
f7185c71
DP		 1076 struct pci_dev *pdev = adapter->pdev;
1077 const struct firmware *fw = adapter->fw;
f50330f9 1078 u8 fw_type = adapter->fw_type;
f7185c71 1079
f50330f9 1080 if (fw_type == NX_UNIFIED_ROMIMAGE) {
10c0f2a8 1081 if (netxen_nic_validate_unified_romimage(adapter))
f50330f9 1082 return -EINVAL;
f50330f9
AKS		 1083 } else {
1084 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_MAGIC_OFFSET]);
1085 if ((__force u32)val != NETXEN_BDINFO_MAGIC)
1086 return -EINVAL;
f7185c71 1087
10c0f2a8
RB		 1088 if (fw->size < NX_FW_MIN_SIZE)
1089 return -EINVAL;
f50330f9
AKS		 1090 }
1091
f50330f9 1092 val = nx_get_fw_version(adapter);
f7185c71
DP		 1093
1094 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
1095 min_ver = NETXEN_VERSION_CODE(4, 0, 216);
1096 else
1097 min_ver = NETXEN_VERSION_CODE(3, 4, 216);
1098
98e31bb0 1099 ver = NETXEN_DECODE_VERSION(val);
f7185c71 1100
98e31bb0 1101 if ((_major(ver) > _NETXEN_NIC_LINUX_MAJOR) || (ver < min_ver)) {
f7185c71
DP		 1102 dev_err(&pdev->dev,
1103 "%s: firmware version %d.%d.%d unsupported\n",
f50330f9 1104 fw_name[fw_type], _major(ver), _minor(ver), _build(ver));
f7185c71
DP		 1105 return -EINVAL;
1106 }
1107
f50330f9 1108 val = nx_get_bios_version(adapter);
f7185c71
DP		 1109 netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&bios);
1110 if ((__force u32)val != bios) {
1111 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
f50330f9 1112 fw_name[fw_type]);
f7185c71
DP		 1113 return -EINVAL;
1114 }
1115
1116 /* check if flashed firmware is newer */
1117 if (netxen_rom_fast_read(adapter,
1118 NX_FW_VERSION_OFFSET, (int *)&val))
1119 return -EIO;
98e31bb0
DP		 1120 val = NETXEN_DECODE_VERSION(val);
1121 if (val > ver) {
1122 dev_info(&pdev->dev, "%s: firmware is older than flash\n",
f50330f9 1123 fw_name[fw_type]);
f7185c71 1124 return -EINVAL;
98e31bb0 1125 }
f7185c71
DP		 1126
1127 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC);
1128 return 0;
1129}
1130
f50330f9
AKS		 1131static void
1132nx_get_next_fwtype(struct netxen_adapter *adapter)
1133{
1134 u8 fw_type;
1135
1136 switch (adapter->fw_type) {
1137 case NX_UNKNOWN_ROMIMAGE:
1138 fw_type = NX_UNIFIED_ROMIMAGE;
1139 break;
1140
1141 case NX_UNIFIED_ROMIMAGE:
1142 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id))
1143 fw_type = NX_FLASH_ROMIMAGE;
1144 else if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
1145 fw_type = NX_P2_MN_ROMIMAGE;
1146 else if (netxen_p3_has_mn(adapter))
1147 fw_type = NX_P3_MN_ROMIMAGE;
1148 else
1149 fw_type = NX_P3_CT_ROMIMAGE;
1150 break;
1151
1152 case NX_P3_MN_ROMIMAGE:
1153 fw_type = NX_P3_CT_ROMIMAGE;
1154 break;
1155
1156 case NX_P2_MN_ROMIMAGE:
1157 case NX_P3_CT_ROMIMAGE:
1158 default:
1159 fw_type = NX_FLASH_ROMIMAGE;
1160 break;
1161 }
1162
1163 adapter->fw_type = fw_type;
1164}
1165
6598b169
DP		 1166static int
1167netxen_p3_has_mn(struct netxen_adapter *adapter)
f7185c71
DP		 1168{
1169 u32 capability, flashed_ver;
f7185c71
DP		 1170 capability = 0;
1171
634d7df8
DP		 1172 /* NX2031 always had MN */
1173 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
1174 return 1;
1175
f7185c71
DP		 1176 netxen_rom_fast_read(adapter,
1177 NX_FW_VERSION_OFFSET, (int *)&flashed_ver);
98e31bb0
DP		 1178 flashed_ver = NETXEN_DECODE_VERSION(flashed_ver);
1179
f7185c71 1180 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) {
6598b169 1181
f7185c71 1182 capability = NXRD32(adapter, NX_PEG_TUNE_CAPABILITY);
6598b169
DP		 1183 if (capability & NX_PEG_TUNE_MN_PRESENT)
1184 return 1;
1185 }
1186 return 0;
1187}
1188
1189void netxen_request_firmware(struct netxen_adapter *adapter)
1190{
6598b169
DP		 1191 struct pci_dev *pdev = adapter->pdev;
1192 int rc = 0;
1193
f50330f9 1194 adapter->fw_type = NX_UNKNOWN_ROMIMAGE;
f7185c71 1195
f50330f9
AKS		 1196next:
1197 nx_get_next_fwtype(adapter);
f7185c71 1198
f50330f9 1199 if (adapter->fw_type == NX_FLASH_ROMIMAGE) {
f7185c71 1200 adapter->fw = NULL;
f50330f9
AKS		 1201 } else {
1202 rc = request_firmware(&adapter->fw,
1203 fw_name[adapter->fw_type], &pdev->dev);
1204 if (rc != 0)
1205 goto next;
1206
1207 rc = netxen_validate_firmware(adapter);
1208 if (rc != 0) {
1209 release_firmware(adapter->fw);
f7185c71 1210 msleep(1);
f50330f9 1211 goto next;
f7185c71 1212 }
f7185c71 1213 }
f7185c71
DP		 1214}
1215
1216
1217void
1218netxen_release_firmware(struct netxen_adapter *adapter)
1219{
1220 if (adapter->fw)
1221 release_firmware(adapter->fw);
db4cfd8a 1222 adapter->fw = NULL;
f7185c71
DP		 1223}
1224
83ac51fa 1225int netxen_init_dummy_dma(struct netxen_adapter *adapter)
ed25ffa1 1226{
83ac51fa
DP		 1227 u64 addr;
1228 u32 hi, lo;
ed25ffa1 1229
83ac51fa
DP		 1230 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
1231 return 0;
1232
1233 adapter->dummy_dma.addr = pci_alloc_consistent(adapter->pdev,
ed25ffa1
AK		 1234 NETXEN_HOST_DUMMY_DMA_SIZE,
1235 &adapter->dummy_dma.phys_addr);
1236 if (adapter->dummy_dma.addr == NULL) {
83ac51fa
DP		 1237 dev_err(&adapter->pdev->dev,
1238 "ERROR: Could not allocate dummy DMA memory\n");
ed25ffa1
AK		 1239 return -ENOMEM;
1240 }
1241
1242 addr = (uint64_t) adapter->dummy_dma.phys_addr;
1243 hi = (addr >> 32) & 0xffffffff;
1244 lo = addr & 0xffffffff;
1245
f98a9f69
DP		 1246 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi);
1247 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo);
ed25ffa1
AK		 1248
1249 return 0;
1250}
1251
83ac51fa
DP		 1252/*
1253 * NetXen DMA watchdog control:
1254 *
1255 * Bit 0 : enabled => R/O: 1 watchdog active, 0 inactive
1256 * Bit 1 : disable_request => 1 req disable dma watchdog
1257 * Bit 2 : enable_request => 1 req enable dma watchdog
1258 * Bit 3-31 : unused
1259 */
1260void netxen_free_dummy_dma(struct netxen_adapter *adapter)
ed25ffa1 1261{
15eef1e1 1262 int i = 100;
83ac51fa
DP		 1263 u32 ctrl;
1264
1265 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
1266 return;
15eef1e1
DP		 1267
1268 if (!adapter->dummy_dma.addr)
1269 return;
439b454e 1270
83ac51fa
DP		 1271 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
1272 if ((ctrl & 0x1) != 0) {
1273 NXWR32(adapter, NETXEN_DMA_WATCHDOG_CTRL, (ctrl | 0x2));
1274
1275 while ((ctrl & 0x1) != 0) {
1276
439b454e 1277 msleep(50);
83ac51fa
DP		 1278
1279 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
1280
1281 if (--i == 0)
439b454e 1282 break;
83ac51fa 1283 };
15eef1e1 1284 }
439b454e 1285
15eef1e1
DP		 1286 if (i) {
1287 pci_free_consistent(adapter->pdev,
1288 NETXEN_HOST_DUMMY_DMA_SIZE,
1289 adapter->dummy_dma.addr,
1290 adapter->dummy_dma.phys_addr);
1291 adapter->dummy_dma.addr = NULL;
83ac51fa
DP		 1292 } else
1293 dev_err(&adapter->pdev->dev, "dma_watchdog_shutdown failed\n");
ed25ffa1
AK		 1294}
1295
96acb6eb 1296int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
3d396eb1
AK		 1297{
1298 u32 val = 0;
2956640d 1299 int retries = 60;
3d396eb1 1300
96f2ebd2
DP		 1301 if (pegtune_val)
1302 return 0;
1303
1304 do {
1305 val = NXRD32(adapter, CRB_CMDPEG_STATE);
96acb6eb 1306
96f2ebd2
DP		 1307 switch (val) {
1308 case PHAN_INITIALIZE_COMPLETE:
1309 case PHAN_INITIALIZE_ACK:
1310 return 0;
1311 case PHAN_INITIALIZE_FAILED:
1312 goto out_err;
1313 default:
1314 break;
1315 }
96acb6eb 1316
96f2ebd2 1317 msleep(500);
2956640d 1318
96f2ebd2 1319 } while (--retries);
2956640d 1320
96f2ebd2 1321 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED);
96acb6eb 1322
96f2ebd2
DP		 1323out_err:
1324 dev_warn(&adapter->pdev->dev, "firmware init failed\n");
1325 return -EIO;
3d396eb1
AK		 1326}
1327
56a00787
DP		 1328static int
1329netxen_receive_peg_ready(struct netxen_adapter *adapter)
2956640d
DP		 1330{
1331 u32 val = 0;
1332 int retries = 2000;
1333
1334 do {
f98a9f69 1335 val = NXRD32(adapter, CRB_RCVPEG_STATE);
2956640d
DP		 1336
1337 if (val == PHAN_PEG_RCV_INITIALIZED)
1338 return 0;
1339
1340 msleep(10);
1341
1342 } while (--retries);
1343
1344 if (!retries) {
1345 printk(KERN_ERR "Receive Peg initialization not "
1346 "complete, state: 0x%x.\n", val);
1347 return -EIO;
1348 }
1349
1350 return 0;
1351}
1352
56a00787
DP		 1353int netxen_init_firmware(struct netxen_adapter *adapter)
1354{
1355 int err;
1356
1357 err = netxen_receive_peg_ready(adapter);
1358 if (err)
1359 return err;
1360
f98a9f69 1361 NXWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT);
f98a9f69
DP		 1362 NXWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE);
1363 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
56a00787 1364
f8e21f8f
AKS		 1365 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
1366 NXWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC);
1367
56a00787
DP		 1368 return err;
1369}
1370
3bf26ce3
DP		 1371static void
1372netxen_handle_linkevent(struct netxen_adapter *adapter, nx_fw_msg_t *msg)
1373{
1374 u32 cable_OUI;
1375 u16 cable_len;
1376 u16 link_speed;
1377 u8 link_status, module, duplex, autoneg;
1378 struct net_device *netdev = adapter->netdev;
1379
1380 adapter->has_link_events = 1;
1381
1382 cable_OUI = msg->body[1] & 0xffffffff;
1383 cable_len = (msg->body[1] >> 32) & 0xffff;
1384 link_speed = (msg->body[1] >> 48) & 0xffff;
1385
1386 link_status = msg->body[2] & 0xff;
1387 duplex = (msg->body[2] >> 16) & 0xff;
1388 autoneg = (msg->body[2] >> 24) & 0xff;
1389
1390 module = (msg->body[2] >> 8) & 0xff;
1391 if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) {
1392 printk(KERN_INFO "%s: unsupported cable: OUI 0x%x, length %d\n",
1393 netdev->name, cable_OUI, cable_len);
1394 } else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) {
1395 printk(KERN_INFO "%s: unsupported cable length %d\n",
1396 netdev->name, cable_len);
1397 }
1398
1399 netxen_advert_link_change(adapter, link_status);
1400
1401 /* update link parameters */
1402 if (duplex == LINKEVENT_FULL_DUPLEX)
1403 adapter->link_duplex = DUPLEX_FULL;
1404 else
1405 adapter->link_duplex = DUPLEX_HALF;
1406 adapter->module_type = module;
1407 adapter->link_autoneg = autoneg;
1408 adapter->link_speed = link_speed;
1409}
1410
1411static void
1412netxen_handle_fw_message(int desc_cnt, int index,
1413 struct nx_host_sds_ring *sds_ring)
1414{
1415 nx_fw_msg_t msg;
1416 struct status_desc *desc;
1417 int i = 0, opcode;
1418
1419 while (desc_cnt > 0 && i < 8) {
1420 desc = &sds_ring->desc_head[index];
1421 msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
1422 msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
1423
1424 index = get_next_index(index, sds_ring->num_desc);
1425 desc_cnt--;
1426 }
1427
1428 opcode = netxen_get_nic_msg_opcode(msg.body[0]);
1429 switch (opcode) {
1430 case NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
1431 netxen_handle_linkevent(sds_ring->adapter, &msg);
1432 break;
1433 default:
1434 break;
1435 }
1436}
1437
d8b100c5
DP		 1438static int
1439netxen_alloc_rx_skb(struct netxen_adapter *adapter,
1440 struct nx_host_rds_ring *rds_ring,
1441 struct netxen_rx_buffer *buffer)
1442{
1443 struct sk_buff *skb;
1444 dma_addr_t dma;
1445 struct pci_dev *pdev = adapter->pdev;
1446
1447 buffer->skb = dev_alloc_skb(rds_ring->skb_size);
1448 if (!buffer->skb)
1449 return 1;
1450
1451 skb = buffer->skb;
1452
1453 if (!adapter->ahw.cut_through)
1454 skb_reserve(skb, 2);
1455
1456 dma = pci_map_single(pdev, skb->data,
1457 rds_ring->dma_size, PCI_DMA_FROMDEVICE);
1458
1459 if (pci_dma_mapping_error(pdev, dma)) {
1460 dev_kfree_skb_any(skb);
1461 buffer->skb = NULL;
1462 return 1;
1463 }
1464
1465 buffer->skb = skb;
1466 buffer->dma = dma;
1467 buffer->state = NETXEN_BUFFER_BUSY;
1468
1469 return 0;
1470}
1471
d9e651bc
DP		 1472static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter,
1473 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum)
1474{
1475 struct netxen_rx_buffer *buffer;
1476 struct sk_buff *skb;
1477
1478 buffer = &rds_ring->rx_buf_arr[index];
1479
1480 pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
1481 PCI_DMA_FROMDEVICE);
1482
1483 skb = buffer->skb;
1484 if (!skb)
1485 goto no_skb;
1486
1487 if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) {
1488 adapter->stats.csummed++;
1489 skb->ip_summed = CHECKSUM_UNNECESSARY;
1490 } else
1491 skb->ip_summed = CHECKSUM_NONE;
1492
1493 skb->dev = adapter->netdev;
1494
1495 buffer->skb = NULL;
d9e651bc
DP		 1496no_skb:
1497 buffer->state = NETXEN_BUFFER_FREE;
d9e651bc
DP		 1498 return skb;
1499}
1500
d8b100c5 1501static struct netxen_rx_buffer *
9b3ef55c 1502netxen_process_rcv(struct netxen_adapter *adapter,
c1c00ab8
DP		 1503 struct nx_host_sds_ring *sds_ring,
1504 int ring, u64 sts_data0)
3d396eb1 1505{
3176ff3e 1506 struct net_device *netdev = adapter->netdev;
becf46a0 1507 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
3d396eb1
AK		 1508 struct netxen_rx_buffer *buffer;
1509 struct sk_buff *skb;
c1c00ab8
DP		 1510 struct nx_host_rds_ring *rds_ring;
1511 int index, length, cksum, pkt_offset;
3d396eb1 1512
c1c00ab8
DP		 1513 if (unlikely(ring >= adapter->max_rds_rings))
1514 return NULL;
1515
1516 rds_ring = &recv_ctx->rds_rings[ring];
1517
1518 index = netxen_get_sts_refhandle(sts_data0);
1519 if (unlikely(index >= rds_ring->num_desc))
d8b100c5 1520 return NULL;
438627c7 1521
48bfd1e0 1522 buffer = &rds_ring->rx_buf_arr[index];
3d396eb1 1523
c1c00ab8
DP		 1524 length = netxen_get_sts_totallength(sts_data0);
1525 cksum = netxen_get_sts_status(sts_data0);
1526 pkt_offset = netxen_get_sts_pkt_offset(sts_data0);
1527
d9e651bc
DP		 1528 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum);
1529 if (!skb)
d8b100c5 1530 return buffer;
200eef20 1531
9b3ef55c
DP		 1532 if (length > rds_ring->skb_size)
1533 skb_put(skb, rds_ring->skb_size);
1534 else
1535 skb_put(skb, length);
d9e651bc 1536
9b3ef55c
DP		 1537
1538 if (pkt_offset)
1539 skb_pull(skb, pkt_offset);
ed25ffa1 1540
3d396eb1
AK		 1541 skb->protocol = eth_type_trans(skb, netdev);
1542
a92e9e65 1543 napi_gro_receive(&sds_ring->napi, skb);
d9e651bc 1544
1bb482f8 1545 adapter->stats.rx_pkts++;
0ddc110c 1546 adapter->stats.rxbytes += length;
d8b100c5
DP		 1547
1548 return buffer;
3d396eb1
AK		 1549}
1550
c1c00ab8
DP		 1551#define TCP_HDR_SIZE 20
1552#define TCP_TS_OPTION_SIZE 12
1553#define TCP_TS_HDR_SIZE (TCP_HDR_SIZE + TCP_TS_OPTION_SIZE)
1554
1555static struct netxen_rx_buffer *
1556netxen_process_lro(struct netxen_adapter *adapter,
1557 struct nx_host_sds_ring *sds_ring,
1558 int ring, u64 sts_data0, u64 sts_data1)
1559{
1560 struct net_device *netdev = adapter->netdev;
1561 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
1562 struct netxen_rx_buffer *buffer;
1563 struct sk_buff *skb;
1564 struct nx_host_rds_ring *rds_ring;
1565 struct iphdr *iph;
1566 struct tcphdr *th;
1567 bool push, timestamp;
1568 int l2_hdr_offset, l4_hdr_offset;
1569 int index;
1570 u16 lro_length, length, data_offset;
1571 u32 seq_number;
1572
1573 if (unlikely(ring > adapter->max_rds_rings))
1574 return NULL;
1575
1576 rds_ring = &recv_ctx->rds_rings[ring];
1577
1578 index = netxen_get_lro_sts_refhandle(sts_data0);
1579 if (unlikely(index > rds_ring->num_desc))
1580 return NULL;
1581
1582 buffer = &rds_ring->rx_buf_arr[index];
1583
1584 timestamp = netxen_get_lro_sts_timestamp(sts_data0);
1585 lro_length = netxen_get_lro_sts_length(sts_data0);
1586 l2_hdr_offset = netxen_get_lro_sts_l2_hdr_offset(sts_data0);
1587 l4_hdr_offset = netxen_get_lro_sts_l4_hdr_offset(sts_data0);
1588 push = netxen_get_lro_sts_push_flag(sts_data0);
1589 seq_number = netxen_get_lro_sts_seq_number(sts_data1);
1590
1591 skb = netxen_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK);
1592 if (!skb)
1593 return buffer;
1594
1595 if (timestamp)
1596 data_offset = l4_hdr_offset + TCP_TS_HDR_SIZE;
1597 else
1598 data_offset = l4_hdr_offset + TCP_HDR_SIZE;
1599
1600 skb_put(skb, lro_length + data_offset);
1601
c1c00ab8
DP		 1602 skb_pull(skb, l2_hdr_offset);
1603 skb->protocol = eth_type_trans(skb, netdev);
1604
1605 iph = (struct iphdr *)skb->data;
1606 th = (struct tcphdr *)(skb->data + (iph->ihl << 2));
1607
1608 length = (iph->ihl << 2) + (th->doff << 2) + lro_length;
1609 iph->tot_len = htons(length);
1610 iph->check = 0;
1611 iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl);
1612 th->psh = push;
1613 th->seq = htonl(seq_number);
1614
1bb482f8
NK		 1615 length = skb->len;
1616
c1c00ab8
DP		 1617 netif_receive_skb(skb);
1618
1bb482f8
NK		 1619 adapter->stats.lro_pkts++;
1620 adapter->stats.rxbytes += length;
1621
c1c00ab8
DP		 1622 return buffer;
1623}
1624
d8b100c5
DP		 1625#define netxen_merge_rx_buffers(list, head) \
1626 do { list_splice_tail_init(list, head); } while (0);
1627
becf46a0 1628int
d8b100c5 1629netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max)
3d396eb1 1630{
d8b100c5
DP		 1631 struct netxen_adapter *adapter = sds_ring->adapter;
1632
1633 struct list_head *cur;
1634
0ddc110c 1635 struct status_desc *desc;
d8b100c5
DP		 1636 struct netxen_rx_buffer *rxbuf;
1637
1638 u32 consumer = sds_ring->consumer;
1639
9b3ef55c 1640 int count = 0;
c1c00ab8
DP		 1641 u64 sts_data0, sts_data1;
1642 int opcode, ring = 0, desc_cnt;
3d396eb1 1643
3d396eb1 1644 while (count < max) {
d8b100c5 1645 desc = &sds_ring->desc_head[consumer];
c1c00ab8 1646 sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
0ddc110c 1647
c1c00ab8 1648 if (!(sts_data0 & STATUS_OWNER_HOST))
3d396eb1 1649 break;
d9e651bc 1650
c1c00ab8 1651 desc_cnt = netxen_get_sts_desc_cnt(sts_data0);
3bf26ce3 1652
c1c00ab8 1653 opcode = netxen_get_sts_opcode(sts_data0);
d9e651bc 1654
3bf26ce3
DP		 1655 switch (opcode) {
1656 case NETXEN_NIC_RXPKT_DESC:
1657 case NETXEN_OLD_RXPKT_DESC:
6598b169 1658 case NETXEN_NIC_SYN_OFFLOAD:
c1c00ab8
DP		 1659 ring = netxen_get_sts_type(sts_data0);
1660 rxbuf = netxen_process_rcv(adapter, sds_ring,
1661 ring, sts_data0);
1662 break;
1663 case NETXEN_NIC_LRO_DESC:
1664 ring = netxen_get_lro_sts_type(sts_data0);
1665 sts_data1 = le64_to_cpu(desc->status_desc_data[1]);
1666 rxbuf = netxen_process_lro(adapter, sds_ring,
1667 ring, sts_data0, sts_data1);
3bf26ce3
DP		 1668 break;
1669 case NETXEN_NIC_RESPONSE_DESC:
1670 netxen_handle_fw_message(desc_cnt, consumer, sds_ring);
1671 default:
1672 goto skip;
1673 }
1674
1675 WARN_ON(desc_cnt > 1);
1676
d8b100c5
DP		 1677 if (rxbuf)
1678 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
1679
3bf26ce3
DP		 1680skip:
1681 for (; desc_cnt > 0; desc_cnt--) {
1682 desc = &sds_ring->desc_head[consumer];
1683 desc->status_desc_data[0] =
1684 cpu_to_le64(STATUS_OWNER_PHANTOM);
1685 consumer = get_next_index(consumer, sds_ring->num_desc);
1686 }
3d396eb1
AK		 1687 count++;
1688 }
0ddc110c 1689
d8b100c5
DP		 1690 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
1691 struct nx_host_rds_ring *rds_ring =
1692 &adapter->recv_ctx.rds_rings[ring];
1693
1694 if (!list_empty(&sds_ring->free_list[ring])) {
1695 list_for_each(cur, &sds_ring->free_list[ring]) {
1696 rxbuf = list_entry(cur,
1697 struct netxen_rx_buffer, list);
1698 netxen_alloc_rx_skb(adapter, rds_ring, rxbuf);
1699 }
1700 spin_lock(&rds_ring->lock);
1701 netxen_merge_rx_buffers(&sds_ring->free_list[ring],
1702 &rds_ring->free_list);
1703 spin_unlock(&rds_ring->lock);
1704 }
1705
1706 netxen_post_rx_buffers_nodb(adapter, rds_ring);
1707 }
3d396eb1 1708
3d396eb1 1709 if (count) {
d8b100c5 1710 sds_ring->consumer = consumer;
195c5f98 1711 NXWRIO(adapter, sds_ring->crb_sts_consumer, consumer);
3d396eb1
AK		 1712 }
1713
1714 return count;
1715}
1716
1717/* Process Command status ring */
05aaa02d 1718int netxen_process_cmd_ring(struct netxen_adapter *adapter)
3d396eb1 1719{
d877f1e3 1720 u32 sw_consumer, hw_consumer;
ba53e6b4 1721 int count = 0, i;
3d396eb1 1722 struct netxen_cmd_buffer *buffer;
ba53e6b4
DP		 1723 struct pci_dev *pdev = adapter->pdev;
1724 struct net_device *netdev = adapter->netdev;
3d396eb1 1725 struct netxen_skb_frag *frag;
ba53e6b4 1726 int done = 0;
4ea528a1 1727 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
3d396eb1 1728
d8b100c5
DP		 1729 if (!spin_trylock(&adapter->tx_clean_lock))
1730 return 1;
1731
d877f1e3 1732 sw_consumer = tx_ring->sw_consumer;
d877f1e3 1733 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
3d396eb1 1734
d877f1e3
DP		 1735 while (sw_consumer != hw_consumer) {
1736 buffer = &tx_ring->cmd_buf_arr[sw_consumer];
53a01e00 1737 if (buffer->skb) {
1738 frag = &buffer->frag_array[0];
3d396eb1
AK		 1739 pci_unmap_single(pdev, frag->dma, frag->length,
1740 PCI_DMA_TODEVICE);
96acb6eb 1741 frag->dma = 0ULL;
3d396eb1 1742 for (i = 1; i < buffer->frag_count; i++) {
3d396eb1
AK		 1743 frag++; /* Get the next frag */
1744 pci_unmap_page(pdev, frag->dma, frag->length,
1745 PCI_DMA_TODEVICE);
96acb6eb 1746 frag->dma = 0ULL;
3d396eb1
AK		 1747 }
1748
ba53e6b4 1749 adapter->stats.xmitfinished++;
53a01e00 1750 dev_kfree_skb_any(buffer->skb);
1751 buffer->skb = NULL;
3d396eb1
AK		 1752 }
1753
d877f1e3 1754 sw_consumer = get_next_index(sw_consumer, tx_ring->num_desc);
ba53e6b4
DP		 1755 if (++count >= MAX_STATUS_HANDLE)
1756 break;
3d396eb1 1757 }
3d396eb1 1758
22527864 1759 if (count && netif_running(netdev)) {
cb2107be
DP		 1760 tx_ring->sw_consumer = sw_consumer;
1761
ba53e6b4 1762 smp_mb();
cb2107be 1763
7a9905e6
RB		 1764 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev))
1765 if (netxen_tx_avail(tx_ring) > TX_STOP_THRESH)
cb2107be 1766 netif_wake_queue(netdev);
7a9905e6 1767 adapter->tx_timeo_cnt = 0;
3d396eb1 1768 }
ed25ffa1
AK		 1769 /*
1770 * If everything is freed up to consumer then check if the ring is full
1771 * If the ring is full then check if more needs to be freed and
1772 * schedule the call back again.
1773 *
1774 * This happens when there are 2 CPUs. One could be freeing and the
1775 * other filling it. If the ring is full when we get out of here and
1776 * the card has already interrupted the host then the host can miss the
1777 * interrupt.
1778 *
1779 * There is still a possible race condition and the host could miss an
1780 * interrupt. The card has to take care of this.
1781 */
d877f1e3
DP		 1782 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1783 done = (sw_consumer == hw_consumer);
d8b100c5 1784 spin_unlock(&adapter->tx_clean_lock);
3d396eb1 1785
807540ba 1786 return done;
3d396eb1
AK		 1787}
1788
becf46a0 1789void
d8b100c5
DP		 1790netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid,
1791 struct nx_host_rds_ring *rds_ring)
3d396eb1 1792{
3d396eb1
AK		 1793 struct rcv_desc *pdesc;
1794 struct netxen_rx_buffer *buffer;
d8b100c5 1795 int producer, count = 0;
ed25ffa1 1796 netxen_ctx_msg msg = 0;
d9e651bc 1797 struct list_head *head;
3d396eb1 1798
48bfd1e0 1799 producer = rds_ring->producer;
d9e651bc 1800
d8b100c5 1801 head = &rds_ring->free_list;
d9e651bc
DP		 1802 while (!list_empty(head)) {
1803
d8b100c5 1804 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
6f703406 1805
d8b100c5
DP		 1806 if (!buffer->skb) {
1807 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1808 break;
6f703406
DP		 1809 }
1810
1811 count++;
d9e651bc
DP		 1812 list_del(&buffer->list);
1813
ed25ffa1 1814 /* make a rcv descriptor */
6f703406 1815 pdesc = &rds_ring->desc_head[producer];
d8b100c5 1816 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
ed33ebe4 1817 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
48bfd1e0 1818 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
6f703406 1819
438627c7 1820 producer = get_next_index(producer, rds_ring->num_desc);
ed25ffa1 1821 }
9b3ef55c 1822
ed25ffa1 1823 if (count) {
48bfd1e0 1824 rds_ring->producer = producer;
195c5f98 1825 NXWRIO(adapter, rds_ring->crb_rcv_producer,
438627c7 1826 (producer-1) & (rds_ring->num_desc-1));
48bfd1e0 1827
4f96b988 1828 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
ed25ffa1
AK		 1829 /*
1830 * Write a doorbell msg to tell phanmon of change in
1831 * receive ring producer
48bfd1e0 1832 * Only for firmware version < 4.0.0
ed25ffa1
AK		 1833 */
1834 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1835 netxen_set_msg_privid(msg);
1836 netxen_set_msg_count(msg,
438627c7
DP		 1837 ((producer - 1) &
1838 (rds_ring->num_desc - 1)));
3176ff3e 1839 netxen_set_msg_ctxid(msg, adapter->portnum);
ed25ffa1 1840 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
f03b0ebd
DP		 1841 NXWRIO(adapter, DB_NORMALIZE(adapter,
1842 NETXEN_RCV_PRODUCER_OFFSET), msg);
48bfd1e0 1843 }
ed25ffa1
AK		 1844 }
1845}
1846
becf46a0 1847static void
d8b100c5
DP		 1848netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1849 struct nx_host_rds_ring *rds_ring)
ed25ffa1 1850{
ed25ffa1
AK		 1851 struct rcv_desc *pdesc;
1852 struct netxen_rx_buffer *buffer;
d8b100c5 1853 int producer, count = 0;
d9e651bc 1854 struct list_head *head;
ed25ffa1 1855
d8b100c5
DP		 1856 if (!spin_trylock(&rds_ring->lock))
1857 return;
1858
2227bae2
AKS		 1859 producer = rds_ring->producer;
1860
d9e651bc 1861 head = &rds_ring->free_list;
d9e651bc
DP		 1862 while (!list_empty(head)) {
1863
d8b100c5 1864 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
6f703406 1865
d8b100c5
DP		 1866 if (!buffer->skb) {
1867 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1868 break;
6f703406
DP		 1869 }
1870
1871 count++;
d9e651bc
DP		 1872 list_del(&buffer->list);
1873
3d396eb1 1874 /* make a rcv descriptor */
6f703406 1875 pdesc = &rds_ring->desc_head[producer];
ed33ebe4 1876 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
48bfd1e0 1877 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
3d396eb1 1878 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
6f703406 1879
438627c7 1880 producer = get_next_index(producer, rds_ring->num_desc);
3d396eb1
AK		 1881 }
1882
3d396eb1 1883 if (count) {
48bfd1e0 1884 rds_ring->producer = producer;
195c5f98 1885 NXWRIO(adapter, rds_ring->crb_rcv_producer,
438627c7 1886 (producer - 1) & (rds_ring->num_desc - 1));
3d396eb1 1887 }
d8b100c5 1888 spin_unlock(&rds_ring->lock);
3d396eb1
AK		 1889}
1890
3d396eb1
AK		 1891void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1892{
3d396eb1 1893 memset(&adapter->stats, 0, sizeof(adapter->stats));
3d396eb1
AK		 1894}
1895
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