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drivers/net/ns83820.c: fix a check-after-use
[mirror_ubuntu-focal-kernel.git] / drivers / net / netxen / netxen_nic_init.c
CommitLineData
3d396eb1
AK		 1/*
2 * Copyright (C) 2003 - 2006 NetXen, Inc.
3 * All rights reserved.
80922fbc 4 *
3d396eb1
AK		 5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
80922fbc 9 *
3d396eb1
AK		 10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
80922fbc 14 *
3d396eb1
AK		 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
80922fbc 19 *
3d396eb1
AK		 20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
80922fbc 22 *
3d396eb1
AK		 23 * Contact Information:
24 * info@netxen.com
25 * NetXen,
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
28 *
29 *
30 * Source file for NIC routines to initialize the Phantom Hardware
31 *
32 */
33
34#include <linux/netdevice.h>
35#include <linux/delay.h>
36#include "netxen_nic.h"
37#include "netxen_nic_hw.h"
3d396eb1
AK		 38#include "netxen_nic_phan_reg.h"
39
40struct crb_addr_pair {
e0e20a1a
LCMT		 41 u32 addr;
42 u32 data;
3d396eb1
AK		 43};
44
b58ecad8
LCMT		 45unsigned long last_schedule_time;
46
3d396eb1
AK		 47#define NETXEN_MAX_CRB_XFORM 60
48static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
e0e20a1a 49#define NETXEN_ADDR_ERROR (0xffffffff)
3d396eb1
AK		 50
51#define crb_addr_transform(name) \
52 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
53 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
54
cb8011ad
AK		 55#define NETXEN_NIC_XDMA_RESET 0x8000ff
56
3d396eb1
AK		 57static inline void
58netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
59 unsigned long off, int *data)
60{
cb8011ad 61 void __iomem *addr = pci_base_offset(adapter, off);
3d396eb1
AK		 62 writel(*data, addr);
63}
64
65static void crb_addr_transform_setup(void)
66{
67 crb_addr_transform(XDMA);
68 crb_addr_transform(TIMR);
69 crb_addr_transform(SRE);
70 crb_addr_transform(SQN3);
71 crb_addr_transform(SQN2);
72 crb_addr_transform(SQN1);
73 crb_addr_transform(SQN0);
74 crb_addr_transform(SQS3);
75 crb_addr_transform(SQS2);
76 crb_addr_transform(SQS1);
77 crb_addr_transform(SQS0);
78 crb_addr_transform(RPMX7);
79 crb_addr_transform(RPMX6);
80 crb_addr_transform(RPMX5);
81 crb_addr_transform(RPMX4);
82 crb_addr_transform(RPMX3);
83 crb_addr_transform(RPMX2);
84 crb_addr_transform(RPMX1);
85 crb_addr_transform(RPMX0);
86 crb_addr_transform(ROMUSB);
87 crb_addr_transform(SN);
88 crb_addr_transform(QMN);
89 crb_addr_transform(QMS);
90 crb_addr_transform(PGNI);
91 crb_addr_transform(PGND);
92 crb_addr_transform(PGN3);
93 crb_addr_transform(PGN2);
94 crb_addr_transform(PGN1);
95 crb_addr_transform(PGN0);
96 crb_addr_transform(PGSI);
97 crb_addr_transform(PGSD);
98 crb_addr_transform(PGS3);
99 crb_addr_transform(PGS2);
100 crb_addr_transform(PGS1);
101 crb_addr_transform(PGS0);
102 crb_addr_transform(PS);
103 crb_addr_transform(PH);
104 crb_addr_transform(NIU);
105 crb_addr_transform(I2Q);
106 crb_addr_transform(EG);
107 crb_addr_transform(MN);
108 crb_addr_transform(MS);
109 crb_addr_transform(CAS2);
110 crb_addr_transform(CAS1);
111 crb_addr_transform(CAS0);
112 crb_addr_transform(CAM);
113 crb_addr_transform(C2C1);
114 crb_addr_transform(C2C0);
1fcca1a5 115 crb_addr_transform(SMB);
3d396eb1
AK		 116}
117
118int netxen_init_firmware(struct netxen_adapter *adapter)
119{
120 u32 state = 0, loops = 0, err = 0;
121
122 /* Window 1 call */
123 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
124
125 if (state == PHAN_INITIALIZE_ACK)
126 return 0;
127
128 while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
129 udelay(100);
130 /* Window 1 call */
131 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
132
133 loops++;
134 }
135 if (loops >= 2000) {
136 printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
137 state);
138 err = -EIO;
139 return err;
140 }
141 /* Window 1 call */
2d1a3bbd 142 writel(INTR_SCHEME_PERPORT,
143 NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_CAPABILITIES_HOST));
3176ff3e 144 writel(MPORT_MULTI_FUNCTION_MODE,
ed25ffa1 145 NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE));
3d396eb1
AK		 146 writel(PHAN_INITIALIZE_ACK,
147 NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
148
149 return err;
150}
151
cb8011ad
AK		 152#define NETXEN_ADDR_LIMIT 0xffffffffULL
153
154void *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr,
155 struct pci_dev **used_dev)
156{
157 void *addr;
158
159 addr = pci_alloc_consistent(pdev, sz, ptr);
160 if ((unsigned long long)(*ptr) < NETXEN_ADDR_LIMIT) {
161 *used_dev = pdev;
162 return addr;
163 }
164 pci_free_consistent(pdev, sz, addr, *ptr);
165 addr = pci_alloc_consistent(NULL, sz, ptr);
166 *used_dev = NULL;
167 return addr;
168}
169
3d396eb1
AK		 170void netxen_initialize_adapter_sw(struct netxen_adapter *adapter)
171{
172 int ctxid, ring;
173 u32 i;
174 u32 num_rx_bufs = 0;
175 struct netxen_rcv_desc_ctx *rcv_desc;
176
177 DPRINTK(INFO, "initializing some queues: %p\n", adapter);
178 for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
179 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
180 struct netxen_rx_buffer *rx_buf;
181 rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring];
182 rcv_desc->rcv_free = rcv_desc->max_rx_desc_count;
183 rcv_desc->begin_alloc = 0;
184 rx_buf = rcv_desc->rx_buf_arr;
185 num_rx_bufs = rcv_desc->max_rx_desc_count;
186 /*
187 * Now go through all of them, set reference handles
188 * and put them in the queues.
189 */
190 for (i = 0; i < num_rx_bufs; i++) {
191 rx_buf->ref_handle = i;
192 rx_buf->state = NETXEN_BUFFER_FREE;
3d396eb1
AK		 193 DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:"
194 "%p\n", ctxid, i, rx_buf);
195 rx_buf++;
196 }
197 }
198 }
3d396eb1
AK		 199}
200
201void netxen_initialize_adapter_hw(struct netxen_adapter *adapter)
202{
cb8011ad
AK		 203 int ports = 0;
204 struct netxen_board_info *board_info = &(adapter->ahw.boardcfg);
205
3d396eb1
AK		 206 if (netxen_nic_get_board_info(adapter) != 0)
207 printk("%s: Error getting board config info.\n",
208 netxen_nic_driver_name);
cb8011ad
AK		 209 get_brd_port_by_type(board_info->board_type, &ports);
210 if (ports == 0)
3d396eb1
AK		 211 printk(KERN_ERR "%s: Unknown board type\n",
212 netxen_nic_driver_name);
cb8011ad 213 adapter->ahw.max_ports = ports;
3d396eb1
AK		 214}
215
216void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
217{
3d396eb1
AK		 218 switch (adapter->ahw.board_type) {
219 case NETXEN_NIC_GBE:
80922fbc 220 adapter->enable_phy_interrupts =
3d396eb1 221 netxen_niu_gbe_enable_phy_interrupts;
80922fbc 222 adapter->disable_phy_interrupts =
3d396eb1 223 netxen_niu_gbe_disable_phy_interrupts;
80922fbc
AK		 224 adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr;
225 adapter->macaddr_set = netxen_niu_macaddr_set;
226 adapter->set_mtu = netxen_nic_set_mtu_gb;
227 adapter->set_promisc = netxen_niu_set_promiscuous_mode;
228 adapter->unset_promisc = netxen_niu_set_promiscuous_mode;
229 adapter->phy_read = netxen_niu_gbe_phy_read;
230 adapter->phy_write = netxen_niu_gbe_phy_write;
80922fbc
AK		 231 adapter->init_niu = netxen_nic_init_niu_gb;
232 adapter->stop_port = netxen_niu_disable_gbe_port;
3d396eb1
AK		 233 break;
234
235 case NETXEN_NIC_XGBE:
80922fbc 236 adapter->enable_phy_interrupts =
3d396eb1 237 netxen_niu_xgbe_enable_phy_interrupts;
80922fbc 238 adapter->disable_phy_interrupts =
3d396eb1 239 netxen_niu_xgbe_disable_phy_interrupts;
80922fbc
AK		 240 adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr;
241 adapter->macaddr_set = netxen_niu_xg_macaddr_set;
242 adapter->set_mtu = netxen_nic_set_mtu_xgb;
243 adapter->init_port = netxen_niu_xg_init_port;
244 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
245 adapter->unset_promisc = netxen_niu_xg_set_promiscuous_mode;
246 adapter->stop_port = netxen_niu_disable_xg_port;
3d396eb1
AK		 247 break;
248
249 default:
250 break;
251 }
252}
253
254/*
255 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
256 * address to external PCI CRB address.
257 */
e0e20a1a 258u32 netxen_decode_crb_addr(u32 addr)
3d396eb1
AK		 259{
260 int i;
e0e20a1a 261 u32 base_addr, offset, pci_base;
3d396eb1
AK		 262
263 crb_addr_transform_setup();
264
265 pci_base = NETXEN_ADDR_ERROR;
266 base_addr = addr & 0xfff00000;
267 offset = addr & 0x000fffff;
268
269 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
270 if (crb_addr_xform[i] == base_addr) {
271 pci_base = i << 20;
272 break;
273 }
274 }
275 if (pci_base == NETXEN_ADDR_ERROR)
276 return pci_base;
277 else
278 return (pci_base + offset);
279}
280
13ba9c77
MT		 281static long rom_max_timeout = 100;
282static long rom_lock_timeout = 10000;
27d2ab54 283static long rom_write_timeout = 700;
3d396eb1
AK		 284
285static inline int rom_lock(struct netxen_adapter *adapter)
286{
287 int iter;
288 u32 done = 0;
289 int timeout = 0;
290
291 while (!done) {
292 /* acquire semaphore2 from PCI HW block */
293 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
294 &done);
295 if (done == 1)
296 break;
297 if (timeout >= rom_lock_timeout)
298 return -EIO;
299
300 timeout++;
301 /*
302 * Yield CPU
303 */
304 if (!in_atomic())
305 schedule();
306 else {
307 for (iter = 0; iter < 20; iter++)
308 cpu_relax(); /*This a nop instr on i386 */
309 }
310 }
311 netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
312 return 0;
313}
314
3d396eb1
AK		 315int netxen_wait_rom_done(struct netxen_adapter *adapter)
316{
317 long timeout = 0;
318 long done = 0;
319
320 while (done == 0) {
321 done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
322 done &= 2;
323 timeout++;
324 if (timeout >= rom_max_timeout) {
325 printk("Timeout reached waiting for rom done");
326 return -EIO;
327 }
328 }
329 return 0;
330}
331
cb8011ad
AK		 332static inline int netxen_rom_wren(struct netxen_adapter *adapter)
333{
334 /* Set write enable latch in ROM status register */
335 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
336 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
337 M25P_INSTR_WREN);
338 if (netxen_wait_rom_done(adapter)) {
339 return -1;
340 }
341 return 0;
342}
343
344static inline unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
345 unsigned int addr)
346{
347 unsigned int data = 0xdeaddead;
348 data = netxen_nic_reg_read(adapter, addr);
349 return data;
350}
351
352static inline int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
353{
354 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
355 M25P_INSTR_RDSR);
356 if (netxen_wait_rom_done(adapter)) {
357 return -1;
358 }
359 return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
360}
361
362static inline void netxen_rom_unlock(struct netxen_adapter *adapter)
363{
364 u32 val;
365
366 /* release semaphore2 */
367 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
368
369}
370
371int netxen_rom_wip_poll(struct netxen_adapter *adapter)
372{
373 long timeout = 0;
374 long wip = 1;
375 int val;
376 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
377 while (wip != 0) {
378 val = netxen_do_rom_rdsr(adapter);
379 wip = val & 1;
380 timeout++;
381 if (timeout > rom_max_timeout) {
382 return -1;
383 }
384 }
385 return 0;
386}
387
80922fbc
AK		 388static inline int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
389 int data)
cb8011ad
AK		 390{
391 if (netxen_rom_wren(adapter)) {
392 return -1;
393 }
394 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
395 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
396 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
397 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
398 M25P_INSTR_PP);
399 if (netxen_wait_rom_done(adapter)) {
400 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
401 return -1;
402 }
403
404 return netxen_rom_wip_poll(adapter);
405}
406
3d396eb1
AK		 407static inline int
408do_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
409{
b58ecad8
LCMT		 410 if (jiffies > (last_schedule_time + (8 * HZ))) {
411 last_schedule_time = jiffies;
412 schedule();
413 }
414
3d396eb1
AK		 415 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
416 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
b58ecad8 417 udelay(100); /* prevent bursting on CRB */
3d396eb1
AK		 418 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
419 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
420 if (netxen_wait_rom_done(adapter)) {
421 printk("Error waiting for rom done\n");
422 return -EIO;
423 }
424 /* reset abyte_cnt and dummy_byte_cnt */
425 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
b58ecad8 426 udelay(100); /* prevent bursting on CRB */
3d396eb1
AK		 427 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
428
429 *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
430 return 0;
431}
432
27d2ab54
AK		 433static inline int
434do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
435 u8 *bytes, size_t size)
436{
437 int addridx;
438 int ret = 0;
439
440 for (addridx = addr; addridx < (addr + size); addridx += 4) {
441 ret = do_rom_fast_read(adapter, addridx, (int *)bytes);
442 if (ret != 0)
443 break;
6d1495f2 444 *(int *)bytes = cpu_to_le32(*(int *)bytes);
27d2ab54
AK		 445 bytes += 4;
446 }
447
448 return ret;
449}
450
451int
452netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
453 u8 *bytes, size_t size)
454{
455 int ret;
456
457 ret = rom_lock(adapter);
458 if (ret < 0)
459 return ret;
460
461 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
462
463 netxen_rom_unlock(adapter);
464 return ret;
465}
466
3d396eb1
AK		 467int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
468{
469 int ret;
470
471 if (rom_lock(adapter) != 0)
472 return -EIO;
473
474 ret = do_rom_fast_read(adapter, addr, valp);
cb8011ad
AK		 475 netxen_rom_unlock(adapter);
476 return ret;
477}
478
479int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
480{
481 int ret = 0;
482
483 if (rom_lock(adapter) != 0) {
484 return -1;
485 }
486 ret = do_rom_fast_write(adapter, addr, data);
487 netxen_rom_unlock(adapter);
488 return ret;
489}
27d2ab54
AK		 490
491static inline int do_rom_fast_write_words(struct netxen_adapter *adapter,
492 int addr, u8 *bytes, size_t size)
493{
494 int addridx = addr;
495 int ret = 0;
496
497 while (addridx < (addr + size)) {
498 int last_attempt = 0;
499 int timeout = 0;
500 int data;
501
6d1495f2 502 data = le32_to_cpu((*(u32*)bytes));
27d2ab54
AK		 503 ret = do_rom_fast_write(adapter, addridx, data);
504 if (ret < 0)
505 return ret;
506
507 while(1) {
508 int data1;
509
f8dfdd5c
SH		 510 ret = do_rom_fast_read(adapter, addridx, &data1);
511 if (ret < 0)
512 return ret;
513
27d2ab54
AK		 514 if (data1 == data)
515 break;
516
517 if (timeout++ >= rom_write_timeout) {
518 if (last_attempt++ < 4) {
519 ret = do_rom_fast_write(adapter,
520 addridx, data);
521 if (ret < 0)
522 return ret;
523 }
524 else {
525 printk(KERN_INFO "Data write did not "
526 "succeed at address 0x%x\n", addridx);
527 break;
528 }
529 }
530 }
531
532 bytes += 4;
533 addridx += 4;
534 }
535
536 return ret;
537}
538
539int netxen_rom_fast_write_words(struct netxen_adapter *adapter, int addr,
540 u8 *bytes, size_t size)
541{
542 int ret = 0;
543
544 ret = rom_lock(adapter);
545 if (ret < 0)
546 return ret;
547
548 ret = do_rom_fast_write_words(adapter, addr, bytes, size);
549 netxen_rom_unlock(adapter);
550
551 return ret;
552}
553
554int netxen_rom_wrsr(struct netxen_adapter *adapter, int data)
555{
556 int ret;
557
558 ret = netxen_rom_wren(adapter);
559 if (ret < 0)
560 return ret;
561
562 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
563 netxen_crb_writelit_adapter(adapter,
564 NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0x1);
565
566 ret = netxen_wait_rom_done(adapter);
567 if (ret < 0)
568 return ret;
569
570 return netxen_rom_wip_poll(adapter);
571}
572
573int netxen_rom_rdsr(struct netxen_adapter *adapter)
574{
575 int ret;
576
577 ret = rom_lock(adapter);
578 if (ret < 0)
579 return ret;
580
581 ret = netxen_do_rom_rdsr(adapter);
582 netxen_rom_unlock(adapter);
583 return ret;
584}
585
586int netxen_backup_crbinit(struct netxen_adapter *adapter)
587{
588 int ret = FLASH_SUCCESS;
589 int val;
0d04761d 590 char *buffer = kmalloc(NETXEN_FLASH_SECTOR_SIZE, GFP_KERNEL);
27d2ab54
AK		 591
592 if (!buffer)
593 return -ENOMEM;
594 /* unlock sector 63 */
595 val = netxen_rom_rdsr(adapter);
596 val = val & 0xe3;
597 ret = netxen_rom_wrsr(adapter, val);
598 if (ret != FLASH_SUCCESS)
599 goto out_kfree;
600
601 ret = netxen_rom_wip_poll(adapter);
602 if (ret != FLASH_SUCCESS)
603 goto out_kfree;
604
605 /* copy sector 0 to sector 63 */
0d04761d
MT		 606 ret = netxen_rom_fast_read_words(adapter, NETXEN_CRBINIT_START,
607 buffer, NETXEN_FLASH_SECTOR_SIZE);
27d2ab54
AK		 608 if (ret != FLASH_SUCCESS)
609 goto out_kfree;
610
0d04761d
MT		 611 ret = netxen_rom_fast_write_words(adapter, NETXEN_FIXED_START,
612 buffer, NETXEN_FLASH_SECTOR_SIZE);
27d2ab54
AK		 613 if (ret != FLASH_SUCCESS)
614 goto out_kfree;
615
616 /* lock sector 63 */
617 val = netxen_rom_rdsr(adapter);
618 if (!(val & 0x8)) {
619 val |= (0x1 << 2);
620 /* lock sector 63 */
621 if (netxen_rom_wrsr(adapter, val) == 0) {
622 ret = netxen_rom_wip_poll(adapter);
623 if (ret != FLASH_SUCCESS)
624 goto out_kfree;
625
626 /* lock SR writes */
627 ret = netxen_rom_wip_poll(adapter);
628 if (ret != FLASH_SUCCESS)
629 goto out_kfree;
630 }
631 }
632
633out_kfree:
634 kfree(buffer);
635 return ret;
636}
637
cb8011ad
AK		 638int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
639{
640 netxen_rom_wren(adapter);
641 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
642 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
643 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
644 M25P_INSTR_SE);
645 if (netxen_wait_rom_done(adapter)) {
646 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
647 return -1;
648 }
649 return netxen_rom_wip_poll(adapter);
650}
651
27d2ab54
AK		 652void check_erased_flash(struct netxen_adapter *adapter, int addr)
653{
654 int i;
655 int val;
656 int count = 0, erased_errors = 0;
657 int range;
658
0d04761d
MT		 659 range = (addr == NETXEN_USER_START) ?
660 NETXEN_FIXED_START : addr + NETXEN_FLASH_SECTOR_SIZE;
27d2ab54
AK		 661
662 for (i = addr; i < range; i += 4) {
663 netxen_rom_fast_read(adapter, i, &val);
664 if (val != 0xffffffff)
665 erased_errors++;
666 count++;
667 }
668
669 if (erased_errors)
670 printk(KERN_INFO "0x%x out of 0x%x words fail to be erased "
671 "for sector address: %x\n", erased_errors, count, addr);
672}
673
cb8011ad
AK		 674int netxen_rom_se(struct netxen_adapter *adapter, int addr)
675{
676 int ret = 0;
677 if (rom_lock(adapter) != 0) {
678 return -1;
679 }
680 ret = netxen_do_rom_se(adapter, addr);
681 netxen_rom_unlock(adapter);
27d2ab54
AK		 682 msleep(30);
683 check_erased_flash(adapter, addr);
684
685 return ret;
686}
687
688int
689netxen_flash_erase_sections(struct netxen_adapter *adapter, int start, int end)
690{
691 int ret = FLASH_SUCCESS;
692 int i;
693
694 for (i = start; i < end; i++) {
0d04761d 695 ret = netxen_rom_se(adapter, i * NETXEN_FLASH_SECTOR_SIZE);
27d2ab54
AK		 696 if (ret)
697 break;
698 ret = netxen_rom_wip_poll(adapter);
699 if (ret < 0)
700 return ret;
701 }
702
703 return ret;
704}
705
706int
707netxen_flash_erase_secondary(struct netxen_adapter *adapter)
708{
709 int ret = FLASH_SUCCESS;
710 int start, end;
711
0d04761d
MT		 712 start = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
713 end = NETXEN_USER_START / NETXEN_FLASH_SECTOR_SIZE;
27d2ab54
AK		 714 ret = netxen_flash_erase_sections(adapter, start, end);
715
716 return ret;
717}
718
719int
720netxen_flash_erase_primary(struct netxen_adapter *adapter)
721{
722 int ret = FLASH_SUCCESS;
723 int start, end;
724
0d04761d
MT		 725 start = NETXEN_PRIMARY_START / NETXEN_FLASH_SECTOR_SIZE;
726 end = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
27d2ab54
AK		 727 ret = netxen_flash_erase_sections(adapter, start, end);
728
729 return ret;
730}
731
e45d9ab4
AK		 732void netxen_halt_pegs(struct netxen_adapter *adapter)
733{
734 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x3c, 1);
735 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x3c, 1);
736 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x3c, 1);
737 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x3c, 1);
738}
739
27d2ab54
AK		 740int netxen_flash_unlock(struct netxen_adapter *adapter)
741{
742 int ret = 0;
743
744 ret = netxen_rom_wrsr(adapter, 0);
745 if (ret < 0)
746 return ret;
747
748 ret = netxen_rom_wren(adapter);
749 if (ret < 0)
750 return ret;
751
3d396eb1
AK		 752 return ret;
753}
754
755#define NETXEN_BOARDTYPE 0x4008
756#define NETXEN_BOARDNUM 0x400c
757#define NETXEN_CHIPNUM 0x4010
758#define NETXEN_ROMBUS_RESET 0xFFFFFFFF
759#define NETXEN_ROM_FIRST_BARRIER 0x800000000ULL
760#define NETXEN_ROM_FOUND_INIT 0x400
761
762int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
763{
764 int addr, val, status;
765 int n, i;
766 int init_delay = 0;
767 struct crb_addr_pair *buf;
e0e20a1a 768 u32 off;
3d396eb1
AK		 769
770 /* resetall */
771 status = netxen_nic_get_board_info(adapter);
772 if (status)
cb8011ad 773 printk("%s: netxen_pinit_from_rom: Error getting board info\n",
3d396eb1
AK		 774 netxen_nic_driver_name);
775
776 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
777 NETXEN_ROMBUS_RESET);
778
779 if (verbose) {
780 int val;
781 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
782 printk("P2 ROM board type: 0x%08x\n", val);
783 else
784 printk("Could not read board type\n");
785 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
786 printk("P2 ROM board num: 0x%08x\n", val);
787 else
788 printk("Could not read board number\n");
789 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
790 printk("P2 ROM chip num: 0x%08x\n", val);
791 else
792 printk("Could not read chip number\n");
793 }
794
795 if (netxen_rom_fast_read(adapter, 0, &n) == 0
796 && (n & NETXEN_ROM_FIRST_BARRIER)) {
797 n &= ~NETXEN_ROM_ROUNDUP;
798 if (n < NETXEN_ROM_FOUND_INIT) {
799 if (verbose)
800 printk("%s: %d CRB init values found"
801 " in ROM.\n", netxen_nic_driver_name, n);
802 } else {
803 printk("%s:n=0x%x Error! NetXen card flash not"
804 " initialized.\n", __FUNCTION__, n);
805 return -EIO;
806 }
807 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
808 if (buf == NULL) {
cb8011ad
AK		 809 printk("%s: netxen_pinit_from_rom: Unable to calloc "
810 "memory.\n", netxen_nic_driver_name);
3d396eb1
AK		 811 return -ENOMEM;
812 }
813 for (i = 0; i < n; i++) {
814 if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0
815 || netxen_rom_fast_read(adapter, 8 * i + 8,
816 &addr) != 0)
817 return -EIO;
818
819 buf[i].addr = addr;
820 buf[i].data = val;
821
822 if (verbose)
823 printk("%s: PCI: 0x%08x == 0x%08x\n",
824 netxen_nic_driver_name, (unsigned int)
e0e20a1a 825 netxen_decode_crb_addr(addr), val);
3d396eb1
AK		 826 }
827 for (i = 0; i < n; i++) {
828
e0e20a1a 829 off = netxen_decode_crb_addr(buf[i].addr);
1fcca1a5 830 if (off == NETXEN_ADDR_ERROR) {
e0e20a1a 831 printk(KERN_ERR"CRB init value out of range %x\n",
1fcca1a5
AK		 832 buf[i].addr);
833 continue;
834 }
835 off += NETXEN_PCI_CRBSPACE;
3d396eb1
AK		 836 /* skipping cold reboot MAGIC */
837 if (off == NETXEN_CAM_RAM(0x1fc))
838 continue;
839
840 /* After writing this register, HW needs time for CRB */
841 /* to quiet down (else crb_window returns 0xffffffff) */
842 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
843 init_delay = 1;
844 /* hold xdma in reset also */
cb8011ad 845 buf[i].data = NETXEN_NIC_XDMA_RESET;
3d396eb1
AK		 846 }
847
848 if (ADDR_IN_WINDOW1(off)) {
849 writel(buf[i].data,
850 NETXEN_CRB_NORMALIZE(adapter, off));
851 } else {
852 netxen_nic_pci_change_crbwindow(adapter, 0);
853 writel(buf[i].data,
cb8011ad 854 pci_base_offset(adapter, off));
3d396eb1
AK		 855
856 netxen_nic_pci_change_crbwindow(adapter, 1);
857 }
858 if (init_delay == 1) {
859 ssleep(1);
860 init_delay = 0;
861 }
862 msleep(1);
863 }
864 kfree(buf);
865
866 /* disable_peg_cache_all */
867
868 /* unreset_net_cache */
869 netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val,
870 4);
871 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
872 (val & 0xffffff0f));
873 /* p2dn replyCount */
874 netxen_crb_writelit_adapter(adapter,
875 NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
876 /* disable_peg_cache 0 */
877 netxen_crb_writelit_adapter(adapter,
878 NETXEN_CRB_PEG_NET_D + 0x4c, 8);
879 /* disable_peg_cache 1 */
880 netxen_crb_writelit_adapter(adapter,
881 NETXEN_CRB_PEG_NET_I + 0x4c, 8);
882
883 /* peg_clr_all */
884
885 /* peg_clr 0 */
886 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8,
887 0);
888 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc,
889 0);
890 /* peg_clr 1 */
891 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8,
892 0);
893 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc,
894 0);
895 /* peg_clr 2 */
896 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8,
897 0);
898 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc,
899 0);
900 /* peg_clr 3 */
901 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8,
902 0);
903 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc,
904 0);
905 }
906 return 0;
907}
908
ed25ffa1
AK		 909int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
910{
911 uint64_t addr;
912 uint32_t hi;
913 uint32_t lo;
914
915 adapter->dummy_dma.addr =
916 pci_alloc_consistent(adapter->ahw.pdev,
917 NETXEN_HOST_DUMMY_DMA_SIZE,
918 &adapter->dummy_dma.phys_addr);
919 if (adapter->dummy_dma.addr == NULL) {
920 printk("%s: ERROR: Could not allocate dummy DMA memory\n",
921 __FUNCTION__);
922 return -ENOMEM;
923 }
924
925 addr = (uint64_t) adapter->dummy_dma.phys_addr;
926 hi = (addr >> 32) & 0xffffffff;
927 lo = addr & 0xffffffff;
928
929 writel(hi, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI));
930 writel(lo, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO));
931
932 return 0;
933}
934
935void netxen_free_adapter_offload(struct netxen_adapter *adapter)
936{
937 if (adapter->dummy_dma.addr) {
e0e20a1a
LCMT		 938 writel(0, NETXEN_CRB_NORMALIZE(adapter,
939 CRB_HOST_DUMMY_BUF_ADDR_HI));
940 writel(0, NETXEN_CRB_NORMALIZE(adapter,
941 CRB_HOST_DUMMY_BUF_ADDR_LO));
ed25ffa1
AK		 942 pci_free_consistent(adapter->ahw.pdev,
943 NETXEN_HOST_DUMMY_DMA_SIZE,
944 adapter->dummy_dma.addr,
945 adapter->dummy_dma.phys_addr);
946 adapter->dummy_dma.addr = NULL;
947 }
948}
949
cb8011ad 950void netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
3d396eb1
AK		 951{
952 u32 val = 0;
953 int loops = 0;
954
cb8011ad 955 if (!pegtune_val) {
1fcca1a5 956 val = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
13ba9c77
MT		 957 while (val != PHAN_INITIALIZE_COMPLETE &&
958 val != PHAN_INITIALIZE_ACK && loops < 200000) {
3d396eb1 959 udelay(100);
cb8011ad 960 schedule();
3d396eb1
AK		 961 val =
962 readl(NETXEN_CRB_NORMALIZE
963 (adapter, CRB_CMDPEG_STATE));
964 loops++;
965 }
966 if (val != PHAN_INITIALIZE_COMPLETE)
967 printk("WARNING: Initial boot wait loop failed...\n");
968 }
969}
970
971int netxen_nic_rx_has_work(struct netxen_adapter *adapter)
972{
973 int ctx;
974
975 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
976 struct netxen_recv_context *recv_ctx =
977 &(adapter->recv_ctx[ctx]);
978 u32 consumer;
979 struct status_desc *desc_head;
cb8011ad 980 struct status_desc *desc;
3d396eb1
AK		 981
982 consumer = recv_ctx->status_rx_consumer;
983 desc_head = recv_ctx->rcv_status_desc_head;
984 desc = &desc_head[consumer];
985
a608ab9c 986 if (netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)
3d396eb1
AK		 987 return 1;
988 }
989
990 return 0;
991}
992
cb8011ad
AK		 993static inline int netxen_nic_check_temp(struct netxen_adapter *adapter)
994{
3176ff3e 995 struct net_device *netdev = adapter->netdev;
cb8011ad
AK		 996 uint32_t temp, temp_state, temp_val;
997 int rv = 0;
998
999 temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE));
1000
1001 temp_state = nx_get_temp_state(temp);
1002 temp_val = nx_get_temp_val(temp);
1003
1004 if (temp_state == NX_TEMP_PANIC) {
1005 printk(KERN_ALERT
1006 "%s: Device temperature %d degrees C exceeds"
1007 " maximum allowed. Hardware has been shut down.\n",
1008 netxen_nic_driver_name, temp_val);
cb8011ad 1009
3176ff3e
MT		 1010 netif_carrier_off(netdev);
1011 netif_stop_queue(netdev);
cb8011ad
AK		 1012 rv = 1;
1013 } else if (temp_state == NX_TEMP_WARN) {
1014 if (adapter->temp == NX_TEMP_NORMAL) {
1015 printk(KERN_ALERT
1016 "%s: Device temperature %d degrees C "
1017 "exceeds operating range."
1018 " Immediate action needed.\n",
1019 netxen_nic_driver_name, temp_val);
1020 }
1021 } else {
1022 if (adapter->temp == NX_TEMP_WARN) {
1023 printk(KERN_INFO
1024 "%s: Device temperature is now %d degrees C"
1025 " in normal range.\n", netxen_nic_driver_name,
1026 temp_val);
1027 }
1028 }
1029 adapter->temp = temp_state;
1030 return rv;
1031}
1032
6d5aefb8 1033void netxen_watchdog_task(struct work_struct *work)
3d396eb1 1034{
3d396eb1 1035 struct net_device *netdev;
6d5aefb8
DH		 1036 struct netxen_adapter *adapter =
1037 container_of(work, struct netxen_adapter, watchdog_task);
3d396eb1 1038
6c80b18d 1039 if ((adapter->portnum == 0) && netxen_nic_check_temp(adapter))
cb8011ad
AK		 1040 return;
1041
c27e6721
MT		 1042 if (adapter->handle_phy_intr)
1043 adapter->handle_phy_intr(adapter);
1044
3176ff3e 1045 netdev = adapter->netdev;
c27e6721
MT		 1046 if ((netif_running(netdev)) && !netif_carrier_ok(netdev) &&
1047 netxen_nic_link_ok(adapter) ) {
1048 printk(KERN_INFO "%s %s (port %d), Link is up\n",
1049 netxen_nic_driver_name, netdev->name, adapter->portnum);
3176ff3e 1050 netif_carrier_on(netdev);
3176ff3e 1051 netif_wake_queue(netdev);
c27e6721
MT		 1052 } else if(!(netif_running(netdev)) && netif_carrier_ok(netdev)) {
1053 printk(KERN_ERR "%s %s Link is Down\n",
1054 netxen_nic_driver_name, netdev->name);
1055 netif_carrier_off(netdev);
1056 netif_stop_queue(netdev);
1057 }
3176ff3e 1058
3d396eb1
AK		 1059 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1060}
1061
1062/*
1063 * netxen_process_rcv() send the received packet to the protocol stack.
1064 * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
1065 * invoke the routine to send more rx buffers to the Phantom...
1066 */
1067void
1068netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
1069 struct status_desc *desc)
1070{
3176ff3e
MT		 1071 struct pci_dev *pdev = adapter->pdev;
1072 struct net_device *netdev = adapter->netdev;
a608ab9c 1073 int index = netxen_get_sts_refhandle(desc);
3d396eb1
AK		 1074 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1075 struct netxen_rx_buffer *buffer;
1076 struct sk_buff *skb;
a608ab9c 1077 u32 length = netxen_get_sts_totallength(desc);
3d396eb1
AK		 1078 u32 desc_ctx;
1079 struct netxen_rcv_desc_ctx *rcv_desc;
1080 int ret;
1081
ed25ffa1 1082 desc_ctx = netxen_get_sts_type(desc);
3d396eb1
AK		 1083 if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
1084 printk("%s: %s Bad Rcv descriptor ring\n",
1085 netxen_nic_driver_name, netdev->name);
1086 return;
1087 }
1088
1089 rcv_desc = &recv_ctx->rcv_desc[desc_ctx];
ed25ffa1
AK		 1090 if (unlikely(index > rcv_desc->max_rx_desc_count)) {
1091 DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
1092 index, rcv_desc->max_rx_desc_count);
1093 return;
1094 }
3d396eb1 1095 buffer = &rcv_desc->rx_buf_arr[index];
ed25ffa1
AK		 1096 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1097 buffer->lro_current_frags++;
1098 if (netxen_get_sts_desc_lro_last_frag(desc)) {
1099 buffer->lro_expected_frags =
1100 netxen_get_sts_desc_lro_cnt(desc);
1101 buffer->lro_length = length;
1102 }
1103 if (buffer->lro_current_frags != buffer->lro_expected_frags) {
1104 if (buffer->lro_expected_frags != 0) {
1105 printk("LRO: (refhandle:%x) recv frag."
1106 "wait for last. flags: %x expected:%d"
1107 "have:%d\n", index,
1108 netxen_get_sts_desc_lro_last_frag(desc),
1109 buffer->lro_expected_frags,
1110 buffer->lro_current_frags);
1111 }
1112 return;
1113 }
1114 }
3d396eb1
AK		 1115
1116 pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size,
1117 PCI_DMA_FROMDEVICE);
1118
1119 skb = (struct sk_buff *)buffer->skb;
1120
ed25ffa1 1121 if (likely(netxen_get_sts_status(desc) == STATUS_CKSUM_OK)) {
3176ff3e 1122 adapter->stats.csummed++;
3d396eb1 1123 skb->ip_summed = CHECKSUM_UNNECESSARY;
ed25ffa1 1124 }
ed25ffa1
AK		 1125 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1126 /* True length was only available on the last pkt */
1127 skb_put(skb, buffer->lro_length);
1128 } else {
1129 skb_put(skb, length);
1130 }
1131
3d396eb1
AK		 1132 skb->protocol = eth_type_trans(skb, netdev);
1133
1134 ret = netif_receive_skb(skb);
1135
1136 /*
1137 * RH: Do we need these stats on a regular basis. Can we get it from
1138 * Linux stats.
1139 */
1140 switch (ret) {
1141 case NET_RX_SUCCESS:
3176ff3e 1142 adapter->stats.uphappy++;
3d396eb1
AK		 1143 break;
1144
1145 case NET_RX_CN_LOW:
3176ff3e 1146 adapter->stats.uplcong++;
3d396eb1
AK		 1147 break;
1148
1149 case NET_RX_CN_MOD:
3176ff3e 1150 adapter->stats.upmcong++;
3d396eb1
AK		 1151 break;
1152
1153 case NET_RX_CN_HIGH:
3176ff3e 1154 adapter->stats.uphcong++;
3d396eb1
AK		 1155 break;
1156
1157 case NET_RX_DROP:
3176ff3e 1158 adapter->stats.updropped++;
3d396eb1
AK		 1159 break;
1160
1161 default:
3176ff3e 1162 adapter->stats.updunno++;
3d396eb1
AK		 1163 break;
1164 }
1165
1166 netdev->last_rx = jiffies;
1167
1168 rcv_desc->rcv_free++;
1169 rcv_desc->rcv_pending--;
1170
1171 /*
1172 * We just consumed one buffer so post a buffer.
1173 */
3d396eb1
AK		 1174 buffer->skb = NULL;
1175 buffer->state = NETXEN_BUFFER_FREE;
ed25ffa1
AK		 1176 buffer->lro_current_frags = 0;
1177 buffer->lro_expected_frags = 0;
3d396eb1 1178
3176ff3e
MT		 1179 adapter->stats.no_rcv++;
1180 adapter->stats.rxbytes += length;
3d396eb1
AK		 1181}
1182
1183/* Process Receive status ring */
1184u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
1185{
1186 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1187 struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
1188 struct status_desc *desc; /* used to read status desc here */
1189 u32 consumer = recv_ctx->status_rx_consumer;
ed25ffa1 1190 u32 producer = 0;
3d396eb1
AK		 1191 int count = 0, ring;
1192
1193 DPRINTK(INFO, "procesing receive\n");
1194 /*
1195 * we assume in this case that there is only one port and that is
1196 * port #1...changes need to be done in firmware to indicate port
1197 * number as part of the descriptor. This way we will be able to get
1198 * the netdev which is associated with that device.
1199 */
1200 while (count < max) {
1201 desc = &desc_head[consumer];
a608ab9c 1202 if (!(netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)) {
ed25ffa1
AK		 1203 DPRINTK(ERR, "desc %p ownedby %x\n", desc,
1204 netxen_get_sts_owner(desc));
3d396eb1
AK		 1205 break;
1206 }
1207 netxen_process_rcv(adapter, ctxid, desc);
ed25ffa1 1208 netxen_clear_sts_owner(desc);
a608ab9c 1209 netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
3d396eb1
AK		 1210 consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1);
1211 count++;
1212 }
1213 if (count) {
1214 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
ed25ffa1 1215 netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
3d396eb1
AK		 1216 }
1217 }
1218
1219 /* update the consumer index in phantom */
1220 if (count) {
3d396eb1 1221 recv_ctx->status_rx_consumer = consumer;
ed25ffa1 1222 recv_ctx->status_rx_producer = producer;
3d396eb1
AK		 1223
1224 /* Window = 1 */
1225 writel(consumer,
1226 NETXEN_CRB_NORMALIZE(adapter,
4a79a04e 1227 recv_crb_registers[adapter->portnum].
3d396eb1
AK		 1228 crb_rcv_status_consumer));
1229 }
1230
1231 return count;
1232}
1233
1234/* Process Command status ring */
ed25ffa1 1235int netxen_process_cmd_ring(unsigned long data)
3d396eb1
AK		 1236{
1237 u32 last_consumer;
1238 u32 consumer;
1239 struct netxen_adapter *adapter = (struct netxen_adapter *)data;
ed25ffa1
AK		 1240 int count1 = 0;
1241 int count2 = 0;
3d396eb1 1242 struct netxen_cmd_buffer *buffer;
3d396eb1
AK		 1243 struct pci_dev *pdev;
1244 struct netxen_skb_frag *frag;
1245 u32 i;
1246 struct sk_buff *skb = NULL;
ed25ffa1 1247 int done;
3d396eb1
AK		 1248
1249 spin_lock(&adapter->tx_lock);
1250 last_consumer = adapter->last_cmd_consumer;
1251 DPRINTK(INFO, "procesing xmit complete\n");
1252 /* we assume in this case that there is only one port and that is
1253 * port #1...changes need to be done in firmware to indicate port
1254 * number as part of the descriptor. This way we will be able to get
1255 * the netdev which is associated with that device.
1256 */
3d396eb1 1257
9b410117 1258 consumer = le32_to_cpu(*(adapter->cmd_consumer));
3d396eb1
AK		 1259 if (last_consumer == consumer) { /* Ring is empty */
1260 DPRINTK(INFO, "last_consumer %d == consumer %d\n",
1261 last_consumer, consumer);
1262 spin_unlock(&adapter->tx_lock);
ed25ffa1 1263 return 1;
3d396eb1
AK		 1264 }
1265
1266 adapter->proc_cmd_buf_counter++;
3d396eb1
AK		 1267 /*
1268 * Not needed - does not seem to be used anywhere.
1269 * adapter->cmd_consumer = consumer;
1270 */
1271 spin_unlock(&adapter->tx_lock);
1272
ed25ffa1 1273 while ((last_consumer != consumer) && (count1 < MAX_STATUS_HANDLE)) {
3d396eb1 1274 buffer = &adapter->cmd_buf_arr[last_consumer];
3176ff3e 1275 pdev = adapter->pdev;
3d396eb1
AK		 1276 frag = &buffer->frag_array[0];
1277 skb = buffer->skb;
1278 if (skb && (cmpxchg(&buffer->skb, skb, 0) == skb)) {
1279 pci_unmap_single(pdev, frag->dma, frag->length,
1280 PCI_DMA_TODEVICE);
1281 for (i = 1; i < buffer->frag_count; i++) {
1282 DPRINTK(INFO, "getting fragment no %d\n", i);
1283 frag++; /* Get the next frag */
1284 pci_unmap_page(pdev, frag->dma, frag->length,
1285 PCI_DMA_TODEVICE);
1286 }
1287
3176ff3e 1288 adapter->stats.skbfreed++;
3d396eb1
AK		 1289 dev_kfree_skb_any(skb);
1290 skb = NULL;
1291 } else if (adapter->proc_cmd_buf_counter == 1) {
3176ff3e 1292 adapter->stats.txnullskb++;
3d396eb1 1293 }
3176ff3e
MT		 1294 if (unlikely(netif_queue_stopped(adapter->netdev)
1295 && netif_carrier_ok(adapter->netdev))
1296 && ((jiffies - adapter->netdev->trans_start) >
1297 adapter->netdev->watchdog_timeo)) {
1298 SCHEDULE_WORK(&adapter->tx_timeout_task);
3d396eb1
AK		 1299 }
1300
1301 last_consumer = get_next_index(last_consumer,
1302 adapter->max_tx_desc_count);
ed25ffa1 1303 count1++;
3d396eb1 1304 }
3d396eb1 1305
ed25ffa1 1306 count2 = 0;
3d396eb1
AK		 1307 spin_lock(&adapter->tx_lock);
1308 if ((--adapter->proc_cmd_buf_counter) == 0) {
1309 adapter->last_cmd_consumer = last_consumer;
1310 while ((adapter->last_cmd_consumer != consumer)
ed25ffa1 1311 && (count2 < MAX_STATUS_HANDLE)) {
3d396eb1
AK		 1312 buffer =
1313 &adapter->cmd_buf_arr[adapter->last_cmd_consumer];
ed25ffa1 1314 count2++;
3d396eb1
AK		 1315 if (buffer->skb)
1316 break;
1317 else
1318 adapter->last_cmd_consumer =
1319 get_next_index(adapter->last_cmd_consumer,
1320 adapter->max_tx_desc_count);
1321 }
1322 }
ed25ffa1 1323 if (count1 || count2) {
3176ff3e
MT		 1324 if (netif_queue_stopped(adapter->netdev)
1325 && (adapter->flags & NETXEN_NETDEV_STATUS)) {
1326 netif_wake_queue(adapter->netdev);
1327 adapter->flags &= ~NETXEN_NETDEV_STATUS;
3d396eb1
AK		 1328 }
1329 }
ed25ffa1
AK		 1330 /*
1331 * If everything is freed up to consumer then check if the ring is full
1332 * If the ring is full then check if more needs to be freed and
1333 * schedule the call back again.
1334 *
1335 * This happens when there are 2 CPUs. One could be freeing and the
1336 * other filling it. If the ring is full when we get out of here and
1337 * the card has already interrupted the host then the host can miss the
1338 * interrupt.
1339 *
1340 * There is still a possible race condition and the host could miss an
1341 * interrupt. The card has to take care of this.
1342 */
1343 if (adapter->last_cmd_consumer == consumer &&
1344 (((adapter->cmd_producer + 1) %
1345 adapter->max_tx_desc_count) == adapter->last_cmd_consumer)) {
9b410117 1346 consumer = le32_to_cpu(*(adapter->cmd_consumer));
ed25ffa1
AK		 1347 }
1348 done = (adapter->last_cmd_consumer == consumer);
3d396eb1
AK		 1349
1350 spin_unlock(&adapter->tx_lock);
1351 DPRINTK(INFO, "last consumer is %d in %s\n", last_consumer,
1352 __FUNCTION__);
ed25ffa1 1353 return (done);
3d396eb1
AK		 1354}
1355
1356/*
1357 * netxen_post_rx_buffers puts buffer in the Phantom memory
1358 */
1359void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
1360{
1361 struct pci_dev *pdev = adapter->ahw.pdev;
1362 struct sk_buff *skb;
1363 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1364 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
ed25ffa1 1365 uint producer;
3d396eb1
AK		 1366 struct rcv_desc *pdesc;
1367 struct netxen_rx_buffer *buffer;
1368 int count = 0;
1369 int index = 0;
ed25ffa1
AK		 1370 netxen_ctx_msg msg = 0;
1371 dma_addr_t dma;
3d396eb1 1372
3d396eb1 1373 rcv_desc = &recv_ctx->rcv_desc[ringid];
3d396eb1
AK		 1374
1375 producer = rcv_desc->producer;
1376 index = rcv_desc->begin_alloc;
1377 buffer = &rcv_desc->rx_buf_arr[index];
1378 /* We can start writing rx descriptors into the phantom memory. */
1379 while (buffer->state == NETXEN_BUFFER_FREE) {
1380 skb = dev_alloc_skb(rcv_desc->skb_size);
1381 if (unlikely(!skb)) {
1382 /*
ed25ffa1 1383 * TODO
3d396eb1
AK		 1384 * We need to schedule the posting of buffers to the pegs.
1385 */
1386 rcv_desc->begin_alloc = index;
cb8011ad 1387 DPRINTK(ERR, "netxen_post_rx_buffers: "
3d396eb1
AK		 1388 " allocated only %d buffers\n", count);
1389 break;
1390 }
ed25ffa1
AK		 1391
1392 count++; /* now there should be no failure */
1393 pdesc = &rcv_desc->desc_head[producer];
1394
1395#if defined(XGB_DEBUG)
1396 *(unsigned long *)(skb->head) = 0xc0debabe;
1397 if (skb_is_nonlinear(skb)) {
1398 printk("Allocated SKB @%p is nonlinear\n");
1399 }
1400#endif
1401 skb_reserve(skb, 2);
1402 /* This will be setup when we receive the
1403 * buffer after it has been filled FSL TBD TBD
1404 * skb->dev = netdev;
1405 */
1406 dma = pci_map_single(pdev, skb->data, rcv_desc->dma_size,
1407 PCI_DMA_FROMDEVICE);
ed33ebe4 1408 pdesc->addr_buffer = cpu_to_le64(dma);
ed25ffa1
AK		 1409 buffer->skb = skb;
1410 buffer->state = NETXEN_BUFFER_BUSY;
1411 buffer->dma = dma;
1412 /* make a rcv descriptor */
ed33ebe4
AK		 1413 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1414 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
ed25ffa1
AK		 1415 DPRINTK(INFO, "done writing descripter\n");
1416 producer =
1417 get_next_index(producer, rcv_desc->max_rx_desc_count);
1418 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1419 buffer = &rcv_desc->rx_buf_arr[index];
1420 }
1421 /* if we did allocate buffers, then write the count to Phantom */
1422 if (count) {
1423 rcv_desc->begin_alloc = index;
1424 rcv_desc->rcv_pending += count;
ed25ffa1
AK		 1425 rcv_desc->producer = producer;
1426 if (rcv_desc->rcv_free >= 32) {
1427 rcv_desc->rcv_free = 0;
1428 /* Window = 1 */
1429 writel((producer - 1) &
1430 (rcv_desc->max_rx_desc_count - 1),
1431 NETXEN_CRB_NORMALIZE(adapter,
3176ff3e
MT		 1432 recv_crb_registers[
1433 adapter->portnum].
ed25ffa1
AK		 1434 rcv_desc_crb[ringid].
1435 crb_rcv_producer_offset));
1436 /*
1437 * Write a doorbell msg to tell phanmon of change in
1438 * receive ring producer
1439 */
1440 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1441 netxen_set_msg_privid(msg);
1442 netxen_set_msg_count(msg,
1443 ((producer -
1444 1) & (rcv_desc->
1445 max_rx_desc_count - 1)));
3176ff3e 1446 netxen_set_msg_ctxid(msg, adapter->portnum);
ed25ffa1
AK		 1447 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1448 writel(msg,
1449 DB_NORMALIZE(adapter,
1450 NETXEN_RCV_PRODUCER_OFFSET));
1451 }
1452 }
1453}
1454
1455void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, uint32_t ctx,
1456 uint32_t ringid)
1457{
1458 struct pci_dev *pdev = adapter->ahw.pdev;
1459 struct sk_buff *skb;
1460 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1461 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
1462 u32 producer;
1463 struct rcv_desc *pdesc;
1464 struct netxen_rx_buffer *buffer;
1465 int count = 0;
1466 int index = 0;
1467
ed25ffa1
AK		 1468 rcv_desc = &recv_ctx->rcv_desc[ringid];
1469
1470 producer = rcv_desc->producer;
1471 index = rcv_desc->begin_alloc;
1472 buffer = &rcv_desc->rx_buf_arr[index];
1473 /* We can start writing rx descriptors into the phantom memory. */
1474 while (buffer->state == NETXEN_BUFFER_FREE) {
1475 skb = dev_alloc_skb(rcv_desc->skb_size);
1476 if (unlikely(!skb)) {
1477 /*
1478 * We need to schedule the posting of buffers to the pegs.
1479 */
1480 rcv_desc->begin_alloc = index;
1481 DPRINTK(ERR, "netxen_post_rx_buffers_nodb: "
1482 " allocated only %d buffers\n", count);
1483 break;
1484 }
3d396eb1
AK		 1485 count++; /* now there should be no failure */
1486 pdesc = &rcv_desc->desc_head[producer];
ed25ffa1 1487 skb_reserve(skb, 2);
3d396eb1
AK		 1488 /*
1489 * This will be setup when we receive the
1490 * buffer after it has been filled
1491 * skb->dev = netdev;
1492 */
1493 buffer->skb = skb;
1494 buffer->state = NETXEN_BUFFER_BUSY;
1495 buffer->dma = pci_map_single(pdev, skb->data,
1496 rcv_desc->dma_size,
1497 PCI_DMA_FROMDEVICE);
ed25ffa1 1498
3d396eb1 1499 /* make a rcv descriptor */
ed33ebe4 1500 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
a608ab9c 1501 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
3d396eb1
AK		 1502 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1503 DPRINTK(INFO, "done writing descripter\n");
1504 producer =
1505 get_next_index(producer, rcv_desc->max_rx_desc_count);
1506 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1507 buffer = &rcv_desc->rx_buf_arr[index];
1508 }
1509
1510 /* if we did allocate buffers, then write the count to Phantom */
1511 if (count) {
1512 rcv_desc->begin_alloc = index;
1513 rcv_desc->rcv_pending += count;
3d396eb1
AK		 1514 rcv_desc->producer = producer;
1515 if (rcv_desc->rcv_free >= 32) {
1516 rcv_desc->rcv_free = 0;
1517 /* Window = 1 */
1518 writel((producer - 1) &
1519 (rcv_desc->max_rx_desc_count - 1),
1520 NETXEN_CRB_NORMALIZE(adapter,
3176ff3e
MT		 1521 recv_crb_registers[
1522 adapter->portnum].
ed25ffa1 1523 rcv_desc_crb[ringid].
3d396eb1
AK		 1524 crb_rcv_producer_offset));
1525 wmb();
1526 }
1527 }
1528}
1529
1530int netxen_nic_tx_has_work(struct netxen_adapter *adapter)
1531{
1532 if (find_diff_among(adapter->last_cmd_consumer,
1533 adapter->cmd_producer,
1534 adapter->max_tx_desc_count) > 0)
1535 return 1;
1536
1537 return 0;
1538}
1539
3d396eb1
AK		 1540
1541void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1542{
3d396eb1 1543 memset(&adapter->stats, 0, sizeof(adapter->stats));
3176ff3e 1544 return;
3d396eb1
AK		 1545}
1546
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