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Commit | Line | Data |
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3d396eb1 AK |
1 | /* |
2 | * Copyright (C) 2003 - 2006 NetXen, Inc. | |
3 | * All rights reserved. | |
80922fbc | 4 | * |
3d396eb1 AK |
5 | * This program is free software; you can redistribute it and/or |
6 | * modify it under the terms of the GNU General Public License | |
7 | * as published by the Free Software Foundation; either version 2 | |
8 | * of the License, or (at your option) any later version. | |
80922fbc | 9 | * |
3d396eb1 AK |
10 | * This program is distributed in the hope that it will be useful, but |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
80922fbc | 14 | * |
3d396eb1 AK |
15 | * You should have received a copy of the GNU General Public License |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, | |
18 | * MA 02111-1307, USA. | |
80922fbc | 19 | * |
3d396eb1 AK |
20 | * The full GNU General Public License is included in this distribution |
21 | * in the file called LICENSE. | |
80922fbc | 22 | * |
3d396eb1 AK |
23 | * Contact Information: |
24 | * info@netxen.com | |
25 | * NetXen, | |
26 | * 3965 Freedom Circle, Fourth floor, | |
27 | * Santa Clara, CA 95054 | |
28 | * | |
29 | * | |
30 | * Source file for NIC routines to initialize the Phantom Hardware | |
31 | * | |
32 | */ | |
33 | ||
34 | #include <linux/netdevice.h> | |
35 | #include <linux/delay.h> | |
36 | #include "netxen_nic.h" | |
37 | #include "netxen_nic_hw.h" | |
3d396eb1 AK |
38 | #include "netxen_nic_phan_reg.h" |
39 | ||
40 | struct crb_addr_pair { | |
e0e20a1a LCMT |
41 | u32 addr; |
42 | u32 data; | |
3d396eb1 AK |
43 | }; |
44 | ||
b58ecad8 LCMT |
45 | unsigned long last_schedule_time; |
46 | ||
3d396eb1 AK |
47 | #define NETXEN_MAX_CRB_XFORM 60 |
48 | static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM]; | |
e0e20a1a | 49 | #define NETXEN_ADDR_ERROR (0xffffffff) |
3d396eb1 AK |
50 | |
51 | #define crb_addr_transform(name) \ | |
52 | crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \ | |
53 | NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20 | |
54 | ||
cb8011ad AK |
55 | #define NETXEN_NIC_XDMA_RESET 0x8000ff |
56 | ||
3d396eb1 AK |
57 | static inline void |
58 | netxen_nic_locked_write_reg(struct netxen_adapter *adapter, | |
59 | unsigned long off, int *data) | |
60 | { | |
cb8011ad | 61 | void __iomem *addr = pci_base_offset(adapter, off); |
3d396eb1 AK |
62 | writel(*data, addr); |
63 | } | |
64 | ||
65 | static void crb_addr_transform_setup(void) | |
66 | { | |
67 | crb_addr_transform(XDMA); | |
68 | crb_addr_transform(TIMR); | |
69 | crb_addr_transform(SRE); | |
70 | crb_addr_transform(SQN3); | |
71 | crb_addr_transform(SQN2); | |
72 | crb_addr_transform(SQN1); | |
73 | crb_addr_transform(SQN0); | |
74 | crb_addr_transform(SQS3); | |
75 | crb_addr_transform(SQS2); | |
76 | crb_addr_transform(SQS1); | |
77 | crb_addr_transform(SQS0); | |
78 | crb_addr_transform(RPMX7); | |
79 | crb_addr_transform(RPMX6); | |
80 | crb_addr_transform(RPMX5); | |
81 | crb_addr_transform(RPMX4); | |
82 | crb_addr_transform(RPMX3); | |
83 | crb_addr_transform(RPMX2); | |
84 | crb_addr_transform(RPMX1); | |
85 | crb_addr_transform(RPMX0); | |
86 | crb_addr_transform(ROMUSB); | |
87 | crb_addr_transform(SN); | |
88 | crb_addr_transform(QMN); | |
89 | crb_addr_transform(QMS); | |
90 | crb_addr_transform(PGNI); | |
91 | crb_addr_transform(PGND); | |
92 | crb_addr_transform(PGN3); | |
93 | crb_addr_transform(PGN2); | |
94 | crb_addr_transform(PGN1); | |
95 | crb_addr_transform(PGN0); | |
96 | crb_addr_transform(PGSI); | |
97 | crb_addr_transform(PGSD); | |
98 | crb_addr_transform(PGS3); | |
99 | crb_addr_transform(PGS2); | |
100 | crb_addr_transform(PGS1); | |
101 | crb_addr_transform(PGS0); | |
102 | crb_addr_transform(PS); | |
103 | crb_addr_transform(PH); | |
104 | crb_addr_transform(NIU); | |
105 | crb_addr_transform(I2Q); | |
106 | crb_addr_transform(EG); | |
107 | crb_addr_transform(MN); | |
108 | crb_addr_transform(MS); | |
109 | crb_addr_transform(CAS2); | |
110 | crb_addr_transform(CAS1); | |
111 | crb_addr_transform(CAS0); | |
112 | crb_addr_transform(CAM); | |
113 | crb_addr_transform(C2C1); | |
114 | crb_addr_transform(C2C0); | |
1fcca1a5 | 115 | crb_addr_transform(SMB); |
3d396eb1 AK |
116 | } |
117 | ||
118 | int netxen_init_firmware(struct netxen_adapter *adapter) | |
119 | { | |
120 | u32 state = 0, loops = 0, err = 0; | |
121 | ||
122 | /* Window 1 call */ | |
123 | state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE)); | |
124 | ||
125 | if (state == PHAN_INITIALIZE_ACK) | |
126 | return 0; | |
127 | ||
128 | while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) { | |
129 | udelay(100); | |
130 | /* Window 1 call */ | |
131 | state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE)); | |
132 | ||
133 | loops++; | |
134 | } | |
135 | if (loops >= 2000) { | |
136 | printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n", | |
137 | state); | |
138 | err = -EIO; | |
139 | return err; | |
140 | } | |
141 | /* Window 1 call */ | |
ed25ffa1 AK |
142 | writel(MPORT_SINGLE_FUNCTION_MODE, |
143 | NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE)); | |
3d396eb1 AK |
144 | writel(PHAN_INITIALIZE_ACK, |
145 | NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE)); | |
146 | ||
147 | return err; | |
148 | } | |
149 | ||
cb8011ad AK |
150 | #define NETXEN_ADDR_LIMIT 0xffffffffULL |
151 | ||
152 | void *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr, | |
153 | struct pci_dev **used_dev) | |
154 | { | |
155 | void *addr; | |
156 | ||
157 | addr = pci_alloc_consistent(pdev, sz, ptr); | |
158 | if ((unsigned long long)(*ptr) < NETXEN_ADDR_LIMIT) { | |
159 | *used_dev = pdev; | |
160 | return addr; | |
161 | } | |
162 | pci_free_consistent(pdev, sz, addr, *ptr); | |
163 | addr = pci_alloc_consistent(NULL, sz, ptr); | |
164 | *used_dev = NULL; | |
165 | return addr; | |
166 | } | |
167 | ||
3d396eb1 AK |
168 | void netxen_initialize_adapter_sw(struct netxen_adapter *adapter) |
169 | { | |
170 | int ctxid, ring; | |
171 | u32 i; | |
172 | u32 num_rx_bufs = 0; | |
173 | struct netxen_rcv_desc_ctx *rcv_desc; | |
174 | ||
175 | DPRINTK(INFO, "initializing some queues: %p\n", adapter); | |
176 | for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) { | |
177 | for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) { | |
178 | struct netxen_rx_buffer *rx_buf; | |
179 | rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring]; | |
180 | rcv_desc->rcv_free = rcv_desc->max_rx_desc_count; | |
181 | rcv_desc->begin_alloc = 0; | |
182 | rx_buf = rcv_desc->rx_buf_arr; | |
183 | num_rx_bufs = rcv_desc->max_rx_desc_count; | |
184 | /* | |
185 | * Now go through all of them, set reference handles | |
186 | * and put them in the queues. | |
187 | */ | |
188 | for (i = 0; i < num_rx_bufs; i++) { | |
189 | rx_buf->ref_handle = i; | |
190 | rx_buf->state = NETXEN_BUFFER_FREE; | |
3d396eb1 AK |
191 | DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:" |
192 | "%p\n", ctxid, i, rx_buf); | |
193 | rx_buf++; | |
194 | } | |
195 | } | |
196 | } | |
3d396eb1 AK |
197 | } |
198 | ||
199 | void netxen_initialize_adapter_hw(struct netxen_adapter *adapter) | |
200 | { | |
cb8011ad AK |
201 | int ports = 0; |
202 | struct netxen_board_info *board_info = &(adapter->ahw.boardcfg); | |
203 | ||
3d396eb1 AK |
204 | if (netxen_nic_get_board_info(adapter) != 0) |
205 | printk("%s: Error getting board config info.\n", | |
206 | netxen_nic_driver_name); | |
cb8011ad AK |
207 | get_brd_port_by_type(board_info->board_type, &ports); |
208 | if (ports == 0) | |
3d396eb1 AK |
209 | printk(KERN_ERR "%s: Unknown board type\n", |
210 | netxen_nic_driver_name); | |
cb8011ad | 211 | adapter->ahw.max_ports = ports; |
3d396eb1 AK |
212 | } |
213 | ||
214 | void netxen_initialize_adapter_ops(struct netxen_adapter *adapter) | |
215 | { | |
3d396eb1 AK |
216 | switch (adapter->ahw.board_type) { |
217 | case NETXEN_NIC_GBE: | |
80922fbc | 218 | adapter->enable_phy_interrupts = |
3d396eb1 | 219 | netxen_niu_gbe_enable_phy_interrupts; |
80922fbc | 220 | adapter->disable_phy_interrupts = |
3d396eb1 | 221 | netxen_niu_gbe_disable_phy_interrupts; |
80922fbc AK |
222 | adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr; |
223 | adapter->macaddr_set = netxen_niu_macaddr_set; | |
224 | adapter->set_mtu = netxen_nic_set_mtu_gb; | |
225 | adapter->set_promisc = netxen_niu_set_promiscuous_mode; | |
226 | adapter->unset_promisc = netxen_niu_set_promiscuous_mode; | |
227 | adapter->phy_read = netxen_niu_gbe_phy_read; | |
228 | adapter->phy_write = netxen_niu_gbe_phy_write; | |
229 | adapter->init_port = netxen_niu_gbe_init_port; | |
230 | adapter->init_niu = netxen_nic_init_niu_gb; | |
231 | adapter->stop_port = netxen_niu_disable_gbe_port; | |
3d396eb1 AK |
232 | break; |
233 | ||
234 | case NETXEN_NIC_XGBE: | |
80922fbc | 235 | adapter->enable_phy_interrupts = |
3d396eb1 | 236 | netxen_niu_xgbe_enable_phy_interrupts; |
80922fbc | 237 | adapter->disable_phy_interrupts = |
3d396eb1 | 238 | netxen_niu_xgbe_disable_phy_interrupts; |
80922fbc AK |
239 | adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr; |
240 | adapter->macaddr_set = netxen_niu_xg_macaddr_set; | |
241 | adapter->set_mtu = netxen_nic_set_mtu_xgb; | |
242 | adapter->init_port = netxen_niu_xg_init_port; | |
243 | adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode; | |
244 | adapter->unset_promisc = netxen_niu_xg_set_promiscuous_mode; | |
245 | adapter->stop_port = netxen_niu_disable_xg_port; | |
3d396eb1 AK |
246 | break; |
247 | ||
248 | default: | |
249 | break; | |
250 | } | |
251 | } | |
252 | ||
253 | /* | |
254 | * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB | |
255 | * address to external PCI CRB address. | |
256 | */ | |
e0e20a1a | 257 | u32 netxen_decode_crb_addr(u32 addr) |
3d396eb1 AK |
258 | { |
259 | int i; | |
e0e20a1a | 260 | u32 base_addr, offset, pci_base; |
3d396eb1 AK |
261 | |
262 | crb_addr_transform_setup(); | |
263 | ||
264 | pci_base = NETXEN_ADDR_ERROR; | |
265 | base_addr = addr & 0xfff00000; | |
266 | offset = addr & 0x000fffff; | |
267 | ||
268 | for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) { | |
269 | if (crb_addr_xform[i] == base_addr) { | |
270 | pci_base = i << 20; | |
271 | break; | |
272 | } | |
273 | } | |
274 | if (pci_base == NETXEN_ADDR_ERROR) | |
275 | return pci_base; | |
276 | else | |
277 | return (pci_base + offset); | |
278 | } | |
279 | ||
280 | static long rom_max_timeout = 10000; | |
281 | static long rom_lock_timeout = 1000000; | |
27d2ab54 | 282 | static long rom_write_timeout = 700; |
3d396eb1 AK |
283 | |
284 | static inline int rom_lock(struct netxen_adapter *adapter) | |
285 | { | |
286 | int iter; | |
287 | u32 done = 0; | |
288 | int timeout = 0; | |
289 | ||
290 | while (!done) { | |
291 | /* acquire semaphore2 from PCI HW block */ | |
292 | netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK), | |
293 | &done); | |
294 | if (done == 1) | |
295 | break; | |
296 | if (timeout >= rom_lock_timeout) | |
297 | return -EIO; | |
298 | ||
299 | timeout++; | |
300 | /* | |
301 | * Yield CPU | |
302 | */ | |
303 | if (!in_atomic()) | |
304 | schedule(); | |
305 | else { | |
306 | for (iter = 0; iter < 20; iter++) | |
307 | cpu_relax(); /*This a nop instr on i386 */ | |
308 | } | |
309 | } | |
310 | netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER); | |
311 | return 0; | |
312 | } | |
313 | ||
3d396eb1 AK |
314 | int netxen_wait_rom_done(struct netxen_adapter *adapter) |
315 | { | |
316 | long timeout = 0; | |
317 | long done = 0; | |
318 | ||
319 | while (done == 0) { | |
320 | done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS); | |
321 | done &= 2; | |
322 | timeout++; | |
323 | if (timeout >= rom_max_timeout) { | |
324 | printk("Timeout reached waiting for rom done"); | |
325 | return -EIO; | |
326 | } | |
327 | } | |
328 | return 0; | |
329 | } | |
330 | ||
cb8011ad AK |
331 | static inline int netxen_rom_wren(struct netxen_adapter *adapter) |
332 | { | |
333 | /* Set write enable latch in ROM status register */ | |
334 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); | |
335 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, | |
336 | M25P_INSTR_WREN); | |
337 | if (netxen_wait_rom_done(adapter)) { | |
338 | return -1; | |
339 | } | |
340 | return 0; | |
341 | } | |
342 | ||
343 | static inline unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter, | |
344 | unsigned int addr) | |
345 | { | |
346 | unsigned int data = 0xdeaddead; | |
347 | data = netxen_nic_reg_read(adapter, addr); | |
348 | return data; | |
349 | } | |
350 | ||
351 | static inline int netxen_do_rom_rdsr(struct netxen_adapter *adapter) | |
352 | { | |
353 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, | |
354 | M25P_INSTR_RDSR); | |
355 | if (netxen_wait_rom_done(adapter)) { | |
356 | return -1; | |
357 | } | |
358 | return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA); | |
359 | } | |
360 | ||
361 | static inline void netxen_rom_unlock(struct netxen_adapter *adapter) | |
362 | { | |
363 | u32 val; | |
364 | ||
365 | /* release semaphore2 */ | |
366 | netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val); | |
367 | ||
368 | } | |
369 | ||
370 | int netxen_rom_wip_poll(struct netxen_adapter *adapter) | |
371 | { | |
372 | long timeout = 0; | |
373 | long wip = 1; | |
374 | int val; | |
375 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); | |
376 | while (wip != 0) { | |
377 | val = netxen_do_rom_rdsr(adapter); | |
378 | wip = val & 1; | |
379 | timeout++; | |
380 | if (timeout > rom_max_timeout) { | |
381 | return -1; | |
382 | } | |
383 | } | |
384 | return 0; | |
385 | } | |
386 | ||
80922fbc AK |
387 | static inline int do_rom_fast_write(struct netxen_adapter *adapter, int addr, |
388 | int data) | |
cb8011ad AK |
389 | { |
390 | if (netxen_rom_wren(adapter)) { | |
391 | return -1; | |
392 | } | |
393 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data); | |
394 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr); | |
395 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3); | |
396 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, | |
397 | M25P_INSTR_PP); | |
398 | if (netxen_wait_rom_done(adapter)) { | |
399 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); | |
400 | return -1; | |
401 | } | |
402 | ||
403 | return netxen_rom_wip_poll(adapter); | |
404 | } | |
405 | ||
3d396eb1 AK |
406 | static inline int |
407 | do_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp) | |
408 | { | |
b58ecad8 LCMT |
409 | if (jiffies > (last_schedule_time + (8 * HZ))) { |
410 | last_schedule_time = jiffies; | |
411 | schedule(); | |
412 | } | |
413 | ||
3d396eb1 AK |
414 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr); |
415 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3); | |
b58ecad8 | 416 | udelay(100); /* prevent bursting on CRB */ |
3d396eb1 AK |
417 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); |
418 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb); | |
419 | if (netxen_wait_rom_done(adapter)) { | |
420 | printk("Error waiting for rom done\n"); | |
421 | return -EIO; | |
422 | } | |
423 | /* reset abyte_cnt and dummy_byte_cnt */ | |
424 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); | |
b58ecad8 | 425 | udelay(100); /* prevent bursting on CRB */ |
3d396eb1 AK |
426 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); |
427 | ||
428 | *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA); | |
429 | return 0; | |
430 | } | |
431 | ||
27d2ab54 AK |
432 | static inline int |
433 | do_rom_fast_read_words(struct netxen_adapter *adapter, int addr, | |
434 | u8 *bytes, size_t size) | |
435 | { | |
436 | int addridx; | |
437 | int ret = 0; | |
438 | ||
439 | for (addridx = addr; addridx < (addr + size); addridx += 4) { | |
440 | ret = do_rom_fast_read(adapter, addridx, (int *)bytes); | |
d8d79201 | 441 | *(int *)bytes = cpu_to_le32(*(int *)bytes); |
27d2ab54 AK |
442 | if (ret != 0) |
443 | break; | |
444 | bytes += 4; | |
445 | } | |
446 | ||
447 | return ret; | |
448 | } | |
449 | ||
450 | int | |
451 | netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr, | |
452 | u8 *bytes, size_t size) | |
453 | { | |
454 | int ret; | |
455 | ||
456 | ret = rom_lock(adapter); | |
457 | if (ret < 0) | |
458 | return ret; | |
459 | ||
460 | ret = do_rom_fast_read_words(adapter, addr, bytes, size); | |
461 | ||
462 | netxen_rom_unlock(adapter); | |
463 | return ret; | |
464 | } | |
465 | ||
3d396eb1 AK |
466 | int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp) |
467 | { | |
468 | int ret; | |
469 | ||
470 | if (rom_lock(adapter) != 0) | |
471 | return -EIO; | |
472 | ||
473 | ret = do_rom_fast_read(adapter, addr, valp); | |
cb8011ad AK |
474 | netxen_rom_unlock(adapter); |
475 | return ret; | |
476 | } | |
477 | ||
478 | int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data) | |
479 | { | |
480 | int ret = 0; | |
481 | ||
482 | if (rom_lock(adapter) != 0) { | |
483 | return -1; | |
484 | } | |
485 | ret = do_rom_fast_write(adapter, addr, data); | |
486 | netxen_rom_unlock(adapter); | |
487 | return ret; | |
488 | } | |
27d2ab54 AK |
489 | |
490 | static inline int do_rom_fast_write_words(struct netxen_adapter *adapter, | |
491 | int addr, u8 *bytes, size_t size) | |
492 | { | |
493 | int addridx = addr; | |
494 | int ret = 0; | |
495 | ||
496 | while (addridx < (addr + size)) { | |
497 | int last_attempt = 0; | |
498 | int timeout = 0; | |
499 | int data; | |
500 | ||
d8d79201 | 501 | data = le32_to_cpu((*(u32*)bytes)); |
27d2ab54 AK |
502 | |
503 | ret = do_rom_fast_write(adapter, addridx, data); | |
504 | if (ret < 0) | |
505 | return ret; | |
506 | ||
507 | while(1) { | |
508 | int data1; | |
509 | ||
f8dfdd5c SH |
510 | ret = do_rom_fast_read(adapter, addridx, &data1); |
511 | if (ret < 0) | |
512 | return ret; | |
513 | ||
27d2ab54 AK |
514 | if (data1 == data) |
515 | break; | |
516 | ||
517 | if (timeout++ >= rom_write_timeout) { | |
518 | if (last_attempt++ < 4) { | |
519 | ret = do_rom_fast_write(adapter, | |
520 | addridx, data); | |
521 | if (ret < 0) | |
522 | return ret; | |
523 | } | |
524 | else { | |
525 | printk(KERN_INFO "Data write did not " | |
526 | "succeed at address 0x%x\n", addridx); | |
527 | break; | |
528 | } | |
529 | } | |
530 | } | |
531 | ||
532 | bytes += 4; | |
533 | addridx += 4; | |
534 | } | |
535 | ||
536 | return ret; | |
537 | } | |
538 | ||
539 | int netxen_rom_fast_write_words(struct netxen_adapter *adapter, int addr, | |
540 | u8 *bytes, size_t size) | |
541 | { | |
542 | int ret = 0; | |
543 | ||
544 | ret = rom_lock(adapter); | |
545 | if (ret < 0) | |
546 | return ret; | |
547 | ||
548 | ret = do_rom_fast_write_words(adapter, addr, bytes, size); | |
549 | netxen_rom_unlock(adapter); | |
550 | ||
551 | return ret; | |
552 | } | |
553 | ||
554 | int netxen_rom_wrsr(struct netxen_adapter *adapter, int data) | |
555 | { | |
556 | int ret; | |
557 | ||
558 | ret = netxen_rom_wren(adapter); | |
559 | if (ret < 0) | |
560 | return ret; | |
561 | ||
562 | netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_ROM_WDATA, data); | |
563 | netxen_crb_writelit_adapter(adapter, | |
564 | NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0x1); | |
565 | ||
566 | ret = netxen_wait_rom_done(adapter); | |
567 | if (ret < 0) | |
568 | return ret; | |
569 | ||
570 | return netxen_rom_wip_poll(adapter); | |
571 | } | |
572 | ||
573 | int netxen_rom_rdsr(struct netxen_adapter *adapter) | |
574 | { | |
575 | int ret; | |
576 | ||
577 | ret = rom_lock(adapter); | |
578 | if (ret < 0) | |
579 | return ret; | |
580 | ||
581 | ret = netxen_do_rom_rdsr(adapter); | |
582 | netxen_rom_unlock(adapter); | |
583 | return ret; | |
584 | } | |
585 | ||
586 | int netxen_backup_crbinit(struct netxen_adapter *adapter) | |
587 | { | |
588 | int ret = FLASH_SUCCESS; | |
589 | int val; | |
590 | char *buffer = kmalloc(FLASH_SECTOR_SIZE, GFP_KERNEL); | |
591 | ||
592 | if (!buffer) | |
593 | return -ENOMEM; | |
594 | /* unlock sector 63 */ | |
595 | val = netxen_rom_rdsr(adapter); | |
596 | val = val & 0xe3; | |
597 | ret = netxen_rom_wrsr(adapter, val); | |
598 | if (ret != FLASH_SUCCESS) | |
599 | goto out_kfree; | |
600 | ||
601 | ret = netxen_rom_wip_poll(adapter); | |
602 | if (ret != FLASH_SUCCESS) | |
603 | goto out_kfree; | |
604 | ||
605 | /* copy sector 0 to sector 63 */ | |
606 | ret = netxen_rom_fast_read_words(adapter, CRBINIT_START, | |
607 | buffer, FLASH_SECTOR_SIZE); | |
608 | if (ret != FLASH_SUCCESS) | |
609 | goto out_kfree; | |
610 | ||
611 | ret = netxen_rom_fast_write_words(adapter, FIXED_START, | |
612 | buffer, FLASH_SECTOR_SIZE); | |
613 | if (ret != FLASH_SUCCESS) | |
614 | goto out_kfree; | |
615 | ||
616 | /* lock sector 63 */ | |
617 | val = netxen_rom_rdsr(adapter); | |
618 | if (!(val & 0x8)) { | |
619 | val |= (0x1 << 2); | |
620 | /* lock sector 63 */ | |
621 | if (netxen_rom_wrsr(adapter, val) == 0) { | |
622 | ret = netxen_rom_wip_poll(adapter); | |
623 | if (ret != FLASH_SUCCESS) | |
624 | goto out_kfree; | |
625 | ||
626 | /* lock SR writes */ | |
627 | ret = netxen_rom_wip_poll(adapter); | |
628 | if (ret != FLASH_SUCCESS) | |
629 | goto out_kfree; | |
630 | } | |
631 | } | |
632 | ||
633 | out_kfree: | |
634 | kfree(buffer); | |
635 | return ret; | |
636 | } | |
637 | ||
cb8011ad AK |
638 | int netxen_do_rom_se(struct netxen_adapter *adapter, int addr) |
639 | { | |
640 | netxen_rom_wren(adapter); | |
641 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr); | |
642 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3); | |
643 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, | |
644 | M25P_INSTR_SE); | |
645 | if (netxen_wait_rom_done(adapter)) { | |
646 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); | |
647 | return -1; | |
648 | } | |
649 | return netxen_rom_wip_poll(adapter); | |
650 | } | |
651 | ||
27d2ab54 AK |
652 | void check_erased_flash(struct netxen_adapter *adapter, int addr) |
653 | { | |
654 | int i; | |
655 | int val; | |
656 | int count = 0, erased_errors = 0; | |
657 | int range; | |
658 | ||
659 | range = (addr == USER_START) ? FIXED_START : addr + FLASH_SECTOR_SIZE; | |
660 | ||
661 | for (i = addr; i < range; i += 4) { | |
662 | netxen_rom_fast_read(adapter, i, &val); | |
663 | if (val != 0xffffffff) | |
664 | erased_errors++; | |
665 | count++; | |
666 | } | |
667 | ||
668 | if (erased_errors) | |
669 | printk(KERN_INFO "0x%x out of 0x%x words fail to be erased " | |
670 | "for sector address: %x\n", erased_errors, count, addr); | |
671 | } | |
672 | ||
cb8011ad AK |
673 | int netxen_rom_se(struct netxen_adapter *adapter, int addr) |
674 | { | |
675 | int ret = 0; | |
676 | if (rom_lock(adapter) != 0) { | |
677 | return -1; | |
678 | } | |
679 | ret = netxen_do_rom_se(adapter, addr); | |
680 | netxen_rom_unlock(adapter); | |
27d2ab54 AK |
681 | msleep(30); |
682 | check_erased_flash(adapter, addr); | |
683 | ||
684 | return ret; | |
685 | } | |
686 | ||
687 | int | |
688 | netxen_flash_erase_sections(struct netxen_adapter *adapter, int start, int end) | |
689 | { | |
690 | int ret = FLASH_SUCCESS; | |
691 | int i; | |
692 | ||
693 | for (i = start; i < end; i++) { | |
694 | ret = netxen_rom_se(adapter, i * FLASH_SECTOR_SIZE); | |
695 | if (ret) | |
696 | break; | |
697 | ret = netxen_rom_wip_poll(adapter); | |
698 | if (ret < 0) | |
699 | return ret; | |
700 | } | |
701 | ||
702 | return ret; | |
703 | } | |
704 | ||
705 | int | |
706 | netxen_flash_erase_secondary(struct netxen_adapter *adapter) | |
707 | { | |
708 | int ret = FLASH_SUCCESS; | |
709 | int start, end; | |
710 | ||
711 | start = SECONDARY_START / FLASH_SECTOR_SIZE; | |
712 | end = USER_START / FLASH_SECTOR_SIZE; | |
713 | ret = netxen_flash_erase_sections(adapter, start, end); | |
714 | ||
715 | return ret; | |
716 | } | |
717 | ||
718 | int | |
719 | netxen_flash_erase_primary(struct netxen_adapter *adapter) | |
720 | { | |
721 | int ret = FLASH_SUCCESS; | |
722 | int start, end; | |
723 | ||
724 | start = PRIMARY_START / FLASH_SECTOR_SIZE; | |
725 | end = SECONDARY_START / FLASH_SECTOR_SIZE; | |
726 | ret = netxen_flash_erase_sections(adapter, start, end); | |
727 | ||
728 | return ret; | |
729 | } | |
730 | ||
e45d9ab4 AK |
731 | void netxen_halt_pegs(struct netxen_adapter *adapter) |
732 | { | |
733 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x3c, 1); | |
734 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x3c, 1); | |
735 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x3c, 1); | |
736 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x3c, 1); | |
737 | } | |
738 | ||
27d2ab54 AK |
739 | int netxen_flash_unlock(struct netxen_adapter *adapter) |
740 | { | |
741 | int ret = 0; | |
742 | ||
743 | ret = netxen_rom_wrsr(adapter, 0); | |
744 | if (ret < 0) | |
745 | return ret; | |
746 | ||
747 | ret = netxen_rom_wren(adapter); | |
748 | if (ret < 0) | |
749 | return ret; | |
750 | ||
3d396eb1 AK |
751 | return ret; |
752 | } | |
753 | ||
754 | #define NETXEN_BOARDTYPE 0x4008 | |
755 | #define NETXEN_BOARDNUM 0x400c | |
756 | #define NETXEN_CHIPNUM 0x4010 | |
757 | #define NETXEN_ROMBUS_RESET 0xFFFFFFFF | |
758 | #define NETXEN_ROM_FIRST_BARRIER 0x800000000ULL | |
759 | #define NETXEN_ROM_FOUND_INIT 0x400 | |
760 | ||
761 | int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose) | |
762 | { | |
763 | int addr, val, status; | |
764 | int n, i; | |
765 | int init_delay = 0; | |
766 | struct crb_addr_pair *buf; | |
e0e20a1a | 767 | u32 off; |
3d396eb1 AK |
768 | |
769 | /* resetall */ | |
770 | status = netxen_nic_get_board_info(adapter); | |
771 | if (status) | |
cb8011ad | 772 | printk("%s: netxen_pinit_from_rom: Error getting board info\n", |
3d396eb1 AK |
773 | netxen_nic_driver_name); |
774 | ||
775 | netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET, | |
776 | NETXEN_ROMBUS_RESET); | |
777 | ||
778 | if (verbose) { | |
779 | int val; | |
780 | if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0) | |
781 | printk("P2 ROM board type: 0x%08x\n", val); | |
782 | else | |
783 | printk("Could not read board type\n"); | |
784 | if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0) | |
785 | printk("P2 ROM board num: 0x%08x\n", val); | |
786 | else | |
787 | printk("Could not read board number\n"); | |
788 | if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0) | |
789 | printk("P2 ROM chip num: 0x%08x\n", val); | |
790 | else | |
791 | printk("Could not read chip number\n"); | |
792 | } | |
793 | ||
794 | if (netxen_rom_fast_read(adapter, 0, &n) == 0 | |
795 | && (n & NETXEN_ROM_FIRST_BARRIER)) { | |
796 | n &= ~NETXEN_ROM_ROUNDUP; | |
797 | if (n < NETXEN_ROM_FOUND_INIT) { | |
798 | if (verbose) | |
799 | printk("%s: %d CRB init values found" | |
800 | " in ROM.\n", netxen_nic_driver_name, n); | |
801 | } else { | |
802 | printk("%s:n=0x%x Error! NetXen card flash not" | |
803 | " initialized.\n", __FUNCTION__, n); | |
804 | return -EIO; | |
805 | } | |
806 | buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL); | |
807 | if (buf == NULL) { | |
cb8011ad AK |
808 | printk("%s: netxen_pinit_from_rom: Unable to calloc " |
809 | "memory.\n", netxen_nic_driver_name); | |
3d396eb1 AK |
810 | return -ENOMEM; |
811 | } | |
812 | for (i = 0; i < n; i++) { | |
813 | if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0 | |
814 | || netxen_rom_fast_read(adapter, 8 * i + 8, | |
815 | &addr) != 0) | |
816 | return -EIO; | |
817 | ||
818 | buf[i].addr = addr; | |
819 | buf[i].data = val; | |
820 | ||
821 | if (verbose) | |
822 | printk("%s: PCI: 0x%08x == 0x%08x\n", | |
823 | netxen_nic_driver_name, (unsigned int) | |
e0e20a1a | 824 | netxen_decode_crb_addr(addr), val); |
3d396eb1 AK |
825 | } |
826 | for (i = 0; i < n; i++) { | |
827 | ||
e0e20a1a | 828 | off = netxen_decode_crb_addr(buf[i].addr); |
1fcca1a5 | 829 | if (off == NETXEN_ADDR_ERROR) { |
e0e20a1a | 830 | printk(KERN_ERR"CRB init value out of range %x\n", |
1fcca1a5 AK |
831 | buf[i].addr); |
832 | continue; | |
833 | } | |
834 | off += NETXEN_PCI_CRBSPACE; | |
3d396eb1 AK |
835 | /* skipping cold reboot MAGIC */ |
836 | if (off == NETXEN_CAM_RAM(0x1fc)) | |
837 | continue; | |
838 | ||
839 | /* After writing this register, HW needs time for CRB */ | |
840 | /* to quiet down (else crb_window returns 0xffffffff) */ | |
841 | if (off == NETXEN_ROMUSB_GLB_SW_RESET) { | |
842 | init_delay = 1; | |
843 | /* hold xdma in reset also */ | |
cb8011ad | 844 | buf[i].data = NETXEN_NIC_XDMA_RESET; |
3d396eb1 AK |
845 | } |
846 | ||
847 | if (ADDR_IN_WINDOW1(off)) { | |
848 | writel(buf[i].data, | |
849 | NETXEN_CRB_NORMALIZE(adapter, off)); | |
850 | } else { | |
851 | netxen_nic_pci_change_crbwindow(adapter, 0); | |
852 | writel(buf[i].data, | |
cb8011ad | 853 | pci_base_offset(adapter, off)); |
3d396eb1 AK |
854 | |
855 | netxen_nic_pci_change_crbwindow(adapter, 1); | |
856 | } | |
857 | if (init_delay == 1) { | |
858 | ssleep(1); | |
859 | init_delay = 0; | |
860 | } | |
861 | msleep(1); | |
862 | } | |
863 | kfree(buf); | |
864 | ||
865 | /* disable_peg_cache_all */ | |
866 | ||
867 | /* unreset_net_cache */ | |
868 | netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val, | |
869 | 4); | |
870 | netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET, | |
871 | (val & 0xffffff0f)); | |
872 | /* p2dn replyCount */ | |
873 | netxen_crb_writelit_adapter(adapter, | |
874 | NETXEN_CRB_PEG_NET_D + 0xec, 0x1e); | |
875 | /* disable_peg_cache 0 */ | |
876 | netxen_crb_writelit_adapter(adapter, | |
877 | NETXEN_CRB_PEG_NET_D + 0x4c, 8); | |
878 | /* disable_peg_cache 1 */ | |
879 | netxen_crb_writelit_adapter(adapter, | |
880 | NETXEN_CRB_PEG_NET_I + 0x4c, 8); | |
881 | ||
882 | /* peg_clr_all */ | |
883 | ||
884 | /* peg_clr 0 */ | |
885 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, | |
886 | 0); | |
887 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, | |
888 | 0); | |
889 | /* peg_clr 1 */ | |
890 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, | |
891 | 0); | |
892 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, | |
893 | 0); | |
894 | /* peg_clr 2 */ | |
895 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, | |
896 | 0); | |
897 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, | |
898 | 0); | |
899 | /* peg_clr 3 */ | |
900 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, | |
901 | 0); | |
902 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, | |
903 | 0); | |
904 | } | |
905 | return 0; | |
906 | } | |
907 | ||
ed25ffa1 AK |
908 | int netxen_initialize_adapter_offload(struct netxen_adapter *adapter) |
909 | { | |
910 | uint64_t addr; | |
911 | uint32_t hi; | |
912 | uint32_t lo; | |
913 | ||
914 | adapter->dummy_dma.addr = | |
915 | pci_alloc_consistent(adapter->ahw.pdev, | |
916 | NETXEN_HOST_DUMMY_DMA_SIZE, | |
917 | &adapter->dummy_dma.phys_addr); | |
918 | if (adapter->dummy_dma.addr == NULL) { | |
919 | printk("%s: ERROR: Could not allocate dummy DMA memory\n", | |
920 | __FUNCTION__); | |
921 | return -ENOMEM; | |
922 | } | |
923 | ||
924 | addr = (uint64_t) adapter->dummy_dma.phys_addr; | |
925 | hi = (addr >> 32) & 0xffffffff; | |
926 | lo = addr & 0xffffffff; | |
927 | ||
928 | writel(hi, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI)); | |
929 | writel(lo, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO)); | |
930 | ||
931 | return 0; | |
932 | } | |
933 | ||
934 | void netxen_free_adapter_offload(struct netxen_adapter *adapter) | |
935 | { | |
936 | if (adapter->dummy_dma.addr) { | |
e0e20a1a LCMT |
937 | writel(0, NETXEN_CRB_NORMALIZE(adapter, |
938 | CRB_HOST_DUMMY_BUF_ADDR_HI)); | |
939 | writel(0, NETXEN_CRB_NORMALIZE(adapter, | |
940 | CRB_HOST_DUMMY_BUF_ADDR_LO)); | |
ed25ffa1 AK |
941 | pci_free_consistent(adapter->ahw.pdev, |
942 | NETXEN_HOST_DUMMY_DMA_SIZE, | |
943 | adapter->dummy_dma.addr, | |
944 | adapter->dummy_dma.phys_addr); | |
945 | adapter->dummy_dma.addr = NULL; | |
946 | } | |
947 | } | |
948 | ||
cb8011ad | 949 | void netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val) |
3d396eb1 AK |
950 | { |
951 | u32 val = 0; | |
952 | int loops = 0; | |
953 | ||
cb8011ad | 954 | if (!pegtune_val) { |
1fcca1a5 | 955 | val = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE)); |
3d396eb1 AK |
956 | while (val != PHAN_INITIALIZE_COMPLETE && loops < 200000) { |
957 | udelay(100); | |
cb8011ad | 958 | schedule(); |
3d396eb1 AK |
959 | val = |
960 | readl(NETXEN_CRB_NORMALIZE | |
961 | (adapter, CRB_CMDPEG_STATE)); | |
962 | loops++; | |
963 | } | |
964 | if (val != PHAN_INITIALIZE_COMPLETE) | |
965 | printk("WARNING: Initial boot wait loop failed...\n"); | |
966 | } | |
967 | } | |
968 | ||
969 | int netxen_nic_rx_has_work(struct netxen_adapter *adapter) | |
970 | { | |
971 | int ctx; | |
972 | ||
973 | for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) { | |
974 | struct netxen_recv_context *recv_ctx = | |
975 | &(adapter->recv_ctx[ctx]); | |
976 | u32 consumer; | |
977 | struct status_desc *desc_head; | |
cb8011ad | 978 | struct status_desc *desc; |
3d396eb1 AK |
979 | |
980 | consumer = recv_ctx->status_rx_consumer; | |
981 | desc_head = recv_ctx->rcv_status_desc_head; | |
982 | desc = &desc_head[consumer]; | |
983 | ||
a608ab9c | 984 | if (netxen_get_sts_owner(desc) & STATUS_OWNER_HOST) |
3d396eb1 AK |
985 | return 1; |
986 | } | |
987 | ||
988 | return 0; | |
989 | } | |
990 | ||
cb8011ad AK |
991 | static inline int netxen_nic_check_temp(struct netxen_adapter *adapter) |
992 | { | |
993 | int port_num; | |
994 | struct netxen_port *port; | |
995 | struct net_device *netdev; | |
996 | uint32_t temp, temp_state, temp_val; | |
997 | int rv = 0; | |
998 | ||
999 | temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE)); | |
1000 | ||
1001 | temp_state = nx_get_temp_state(temp); | |
1002 | temp_val = nx_get_temp_val(temp); | |
1003 | ||
1004 | if (temp_state == NX_TEMP_PANIC) { | |
1005 | printk(KERN_ALERT | |
1006 | "%s: Device temperature %d degrees C exceeds" | |
1007 | " maximum allowed. Hardware has been shut down.\n", | |
1008 | netxen_nic_driver_name, temp_val); | |
1009 | for (port_num = 0; port_num < adapter->ahw.max_ports; | |
1010 | port_num++) { | |
1011 | port = adapter->port[port_num]; | |
1012 | netdev = port->netdev; | |
1013 | ||
1014 | netif_carrier_off(netdev); | |
1015 | netif_stop_queue(netdev); | |
1016 | } | |
1017 | rv = 1; | |
1018 | } else if (temp_state == NX_TEMP_WARN) { | |
1019 | if (adapter->temp == NX_TEMP_NORMAL) { | |
1020 | printk(KERN_ALERT | |
1021 | "%s: Device temperature %d degrees C " | |
1022 | "exceeds operating range." | |
1023 | " Immediate action needed.\n", | |
1024 | netxen_nic_driver_name, temp_val); | |
1025 | } | |
1026 | } else { | |
1027 | if (adapter->temp == NX_TEMP_WARN) { | |
1028 | printk(KERN_INFO | |
1029 | "%s: Device temperature is now %d degrees C" | |
1030 | " in normal range.\n", netxen_nic_driver_name, | |
1031 | temp_val); | |
1032 | } | |
1033 | } | |
1034 | adapter->temp = temp_state; | |
1035 | return rv; | |
1036 | } | |
1037 | ||
6d5aefb8 | 1038 | void netxen_watchdog_task(struct work_struct *work) |
3d396eb1 AK |
1039 | { |
1040 | int port_num; | |
1041 | struct netxen_port *port; | |
1042 | struct net_device *netdev; | |
6d5aefb8 DH |
1043 | struct netxen_adapter *adapter = |
1044 | container_of(work, struct netxen_adapter, watchdog_task); | |
3d396eb1 | 1045 | |
cb8011ad AK |
1046 | if (netxen_nic_check_temp(adapter)) |
1047 | return; | |
1048 | ||
3d396eb1 AK |
1049 | for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) { |
1050 | port = adapter->port[port_num]; | |
1051 | netdev = port->netdev; | |
1052 | ||
1053 | if ((netif_running(netdev)) && !netif_carrier_ok(netdev)) { | |
1054 | printk(KERN_INFO "%s port %d, %s carrier is now ok\n", | |
1055 | netxen_nic_driver_name, port_num, netdev->name); | |
1056 | netif_carrier_on(netdev); | |
1057 | } | |
1058 | ||
1059 | if (netif_queue_stopped(netdev)) | |
1060 | netif_wake_queue(netdev); | |
1061 | } | |
1062 | ||
80922fbc AK |
1063 | if (adapter->handle_phy_intr) |
1064 | adapter->handle_phy_intr(adapter); | |
3d396eb1 AK |
1065 | mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); |
1066 | } | |
1067 | ||
1068 | /* | |
1069 | * netxen_process_rcv() send the received packet to the protocol stack. | |
1070 | * and if the number of receives exceeds RX_BUFFERS_REFILL, then we | |
1071 | * invoke the routine to send more rx buffers to the Phantom... | |
1072 | */ | |
1073 | void | |
1074 | netxen_process_rcv(struct netxen_adapter *adapter, int ctxid, | |
1075 | struct status_desc *desc) | |
1076 | { | |
ed25ffa1 | 1077 | struct netxen_port *port = adapter->port[netxen_get_sts_port(desc)]; |
3d396eb1 AK |
1078 | struct pci_dev *pdev = port->pdev; |
1079 | struct net_device *netdev = port->netdev; | |
a608ab9c | 1080 | int index = netxen_get_sts_refhandle(desc); |
3d396eb1 AK |
1081 | struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]); |
1082 | struct netxen_rx_buffer *buffer; | |
1083 | struct sk_buff *skb; | |
a608ab9c | 1084 | u32 length = netxen_get_sts_totallength(desc); |
3d396eb1 AK |
1085 | u32 desc_ctx; |
1086 | struct netxen_rcv_desc_ctx *rcv_desc; | |
1087 | int ret; | |
1088 | ||
ed25ffa1 | 1089 | desc_ctx = netxen_get_sts_type(desc); |
3d396eb1 AK |
1090 | if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) { |
1091 | printk("%s: %s Bad Rcv descriptor ring\n", | |
1092 | netxen_nic_driver_name, netdev->name); | |
1093 | return; | |
1094 | } | |
1095 | ||
1096 | rcv_desc = &recv_ctx->rcv_desc[desc_ctx]; | |
ed25ffa1 AK |
1097 | if (unlikely(index > rcv_desc->max_rx_desc_count)) { |
1098 | DPRINTK(ERR, "Got a buffer index:%x Max is %x\n", | |
1099 | index, rcv_desc->max_rx_desc_count); | |
1100 | return; | |
1101 | } | |
3d396eb1 | 1102 | buffer = &rcv_desc->rx_buf_arr[index]; |
ed25ffa1 AK |
1103 | if (desc_ctx == RCV_DESC_LRO_CTXID) { |
1104 | buffer->lro_current_frags++; | |
1105 | if (netxen_get_sts_desc_lro_last_frag(desc)) { | |
1106 | buffer->lro_expected_frags = | |
1107 | netxen_get_sts_desc_lro_cnt(desc); | |
1108 | buffer->lro_length = length; | |
1109 | } | |
1110 | if (buffer->lro_current_frags != buffer->lro_expected_frags) { | |
1111 | if (buffer->lro_expected_frags != 0) { | |
1112 | printk("LRO: (refhandle:%x) recv frag." | |
1113 | "wait for last. flags: %x expected:%d" | |
1114 | "have:%d\n", index, | |
1115 | netxen_get_sts_desc_lro_last_frag(desc), | |
1116 | buffer->lro_expected_frags, | |
1117 | buffer->lro_current_frags); | |
1118 | } | |
1119 | return; | |
1120 | } | |
1121 | } | |
3d396eb1 AK |
1122 | |
1123 | pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size, | |
1124 | PCI_DMA_FROMDEVICE); | |
1125 | ||
1126 | skb = (struct sk_buff *)buffer->skb; | |
1127 | ||
ed25ffa1 | 1128 | if (likely(netxen_get_sts_status(desc) == STATUS_CKSUM_OK)) { |
3d396eb1 AK |
1129 | port->stats.csummed++; |
1130 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
ed25ffa1 | 1131 | } |
ed25ffa1 AK |
1132 | if (desc_ctx == RCV_DESC_LRO_CTXID) { |
1133 | /* True length was only available on the last pkt */ | |
1134 | skb_put(skb, buffer->lro_length); | |
1135 | } else { | |
1136 | skb_put(skb, length); | |
1137 | } | |
1138 | ||
3d396eb1 AK |
1139 | skb->protocol = eth_type_trans(skb, netdev); |
1140 | ||
1141 | ret = netif_receive_skb(skb); | |
1142 | ||
1143 | /* | |
1144 | * RH: Do we need these stats on a regular basis. Can we get it from | |
1145 | * Linux stats. | |
1146 | */ | |
1147 | switch (ret) { | |
1148 | case NET_RX_SUCCESS: | |
1149 | port->stats.uphappy++; | |
1150 | break; | |
1151 | ||
1152 | case NET_RX_CN_LOW: | |
1153 | port->stats.uplcong++; | |
1154 | break; | |
1155 | ||
1156 | case NET_RX_CN_MOD: | |
1157 | port->stats.upmcong++; | |
1158 | break; | |
1159 | ||
1160 | case NET_RX_CN_HIGH: | |
1161 | port->stats.uphcong++; | |
1162 | break; | |
1163 | ||
1164 | case NET_RX_DROP: | |
1165 | port->stats.updropped++; | |
1166 | break; | |
1167 | ||
1168 | default: | |
1169 | port->stats.updunno++; | |
1170 | break; | |
1171 | } | |
1172 | ||
1173 | netdev->last_rx = jiffies; | |
1174 | ||
1175 | rcv_desc->rcv_free++; | |
1176 | rcv_desc->rcv_pending--; | |
1177 | ||
1178 | /* | |
1179 | * We just consumed one buffer so post a buffer. | |
1180 | */ | |
1181 | adapter->stats.post_called++; | |
1182 | buffer->skb = NULL; | |
1183 | buffer->state = NETXEN_BUFFER_FREE; | |
ed25ffa1 AK |
1184 | buffer->lro_current_frags = 0; |
1185 | buffer->lro_expected_frags = 0; | |
3d396eb1 AK |
1186 | |
1187 | port->stats.no_rcv++; | |
1188 | port->stats.rxbytes += length; | |
1189 | } | |
1190 | ||
1191 | /* Process Receive status ring */ | |
1192 | u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max) | |
1193 | { | |
1194 | struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]); | |
1195 | struct status_desc *desc_head = recv_ctx->rcv_status_desc_head; | |
1196 | struct status_desc *desc; /* used to read status desc here */ | |
1197 | u32 consumer = recv_ctx->status_rx_consumer; | |
ed25ffa1 | 1198 | u32 producer = 0; |
3d396eb1 AK |
1199 | int count = 0, ring; |
1200 | ||
1201 | DPRINTK(INFO, "procesing receive\n"); | |
1202 | /* | |
1203 | * we assume in this case that there is only one port and that is | |
1204 | * port #1...changes need to be done in firmware to indicate port | |
1205 | * number as part of the descriptor. This way we will be able to get | |
1206 | * the netdev which is associated with that device. | |
1207 | */ | |
1208 | while (count < max) { | |
1209 | desc = &desc_head[consumer]; | |
a608ab9c | 1210 | if (!(netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)) { |
ed25ffa1 AK |
1211 | DPRINTK(ERR, "desc %p ownedby %x\n", desc, |
1212 | netxen_get_sts_owner(desc)); | |
3d396eb1 AK |
1213 | break; |
1214 | } | |
1215 | netxen_process_rcv(adapter, ctxid, desc); | |
ed25ffa1 | 1216 | netxen_clear_sts_owner(desc); |
a608ab9c | 1217 | netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM); |
3d396eb1 AK |
1218 | consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1); |
1219 | count++; | |
1220 | } | |
1221 | if (count) { | |
1222 | for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) { | |
ed25ffa1 | 1223 | netxen_post_rx_buffers_nodb(adapter, ctxid, ring); |
3d396eb1 AK |
1224 | } |
1225 | } | |
1226 | ||
1227 | /* update the consumer index in phantom */ | |
1228 | if (count) { | |
1229 | adapter->stats.process_rcv++; | |
1230 | recv_ctx->status_rx_consumer = consumer; | |
ed25ffa1 | 1231 | recv_ctx->status_rx_producer = producer; |
3d396eb1 AK |
1232 | |
1233 | /* Window = 1 */ | |
1234 | writel(consumer, | |
1235 | NETXEN_CRB_NORMALIZE(adapter, | |
1236 | recv_crb_registers[ctxid]. | |
1237 | crb_rcv_status_consumer)); | |
1238 | } | |
1239 | ||
1240 | return count; | |
1241 | } | |
1242 | ||
1243 | /* Process Command status ring */ | |
ed25ffa1 | 1244 | int netxen_process_cmd_ring(unsigned long data) |
3d396eb1 AK |
1245 | { |
1246 | u32 last_consumer; | |
1247 | u32 consumer; | |
1248 | struct netxen_adapter *adapter = (struct netxen_adapter *)data; | |
ed25ffa1 AK |
1249 | int count1 = 0; |
1250 | int count2 = 0; | |
3d396eb1 AK |
1251 | struct netxen_cmd_buffer *buffer; |
1252 | struct netxen_port *port; /* port #1 */ | |
1253 | struct netxen_port *nport; | |
1254 | struct pci_dev *pdev; | |
1255 | struct netxen_skb_frag *frag; | |
1256 | u32 i; | |
1257 | struct sk_buff *skb = NULL; | |
1258 | int p; | |
ed25ffa1 | 1259 | int done; |
3d396eb1 AK |
1260 | |
1261 | spin_lock(&adapter->tx_lock); | |
1262 | last_consumer = adapter->last_cmd_consumer; | |
1263 | DPRINTK(INFO, "procesing xmit complete\n"); | |
1264 | /* we assume in this case that there is only one port and that is | |
1265 | * port #1...changes need to be done in firmware to indicate port | |
1266 | * number as part of the descriptor. This way we will be able to get | |
1267 | * the netdev which is associated with that device. | |
1268 | */ | |
3d396eb1 | 1269 | |
9b410117 | 1270 | consumer = le32_to_cpu(*(adapter->cmd_consumer)); |
3d396eb1 AK |
1271 | if (last_consumer == consumer) { /* Ring is empty */ |
1272 | DPRINTK(INFO, "last_consumer %d == consumer %d\n", | |
1273 | last_consumer, consumer); | |
1274 | spin_unlock(&adapter->tx_lock); | |
ed25ffa1 | 1275 | return 1; |
3d396eb1 AK |
1276 | } |
1277 | ||
1278 | adapter->proc_cmd_buf_counter++; | |
1279 | adapter->stats.process_xmit++; | |
1280 | /* | |
1281 | * Not needed - does not seem to be used anywhere. | |
1282 | * adapter->cmd_consumer = consumer; | |
1283 | */ | |
1284 | spin_unlock(&adapter->tx_lock); | |
1285 | ||
ed25ffa1 | 1286 | while ((last_consumer != consumer) && (count1 < MAX_STATUS_HANDLE)) { |
3d396eb1 AK |
1287 | buffer = &adapter->cmd_buf_arr[last_consumer]; |
1288 | port = adapter->port[buffer->port]; | |
1289 | pdev = port->pdev; | |
1290 | frag = &buffer->frag_array[0]; | |
1291 | skb = buffer->skb; | |
1292 | if (skb && (cmpxchg(&buffer->skb, skb, 0) == skb)) { | |
1293 | pci_unmap_single(pdev, frag->dma, frag->length, | |
1294 | PCI_DMA_TODEVICE); | |
1295 | for (i = 1; i < buffer->frag_count; i++) { | |
1296 | DPRINTK(INFO, "getting fragment no %d\n", i); | |
1297 | frag++; /* Get the next frag */ | |
1298 | pci_unmap_page(pdev, frag->dma, frag->length, | |
1299 | PCI_DMA_TODEVICE); | |
1300 | } | |
1301 | ||
1302 | port->stats.skbfreed++; | |
1303 | dev_kfree_skb_any(skb); | |
1304 | skb = NULL; | |
1305 | } else if (adapter->proc_cmd_buf_counter == 1) { | |
1306 | port->stats.txnullskb++; | |
1307 | } | |
1308 | if (unlikely(netif_queue_stopped(port->netdev) | |
1309 | && netif_carrier_ok(port->netdev)) | |
1310 | && ((jiffies - port->netdev->trans_start) > | |
1311 | port->netdev->watchdog_timeo)) { | |
6c586644 | 1312 | SCHEDULE_WORK(&port->tx_timeout_task); |
3d396eb1 AK |
1313 | } |
1314 | ||
1315 | last_consumer = get_next_index(last_consumer, | |
1316 | adapter->max_tx_desc_count); | |
ed25ffa1 | 1317 | count1++; |
3d396eb1 | 1318 | } |
ed25ffa1 | 1319 | adapter->stats.noxmitdone += count1; |
3d396eb1 | 1320 | |
ed25ffa1 | 1321 | count2 = 0; |
3d396eb1 AK |
1322 | spin_lock(&adapter->tx_lock); |
1323 | if ((--adapter->proc_cmd_buf_counter) == 0) { | |
1324 | adapter->last_cmd_consumer = last_consumer; | |
1325 | while ((adapter->last_cmd_consumer != consumer) | |
ed25ffa1 | 1326 | && (count2 < MAX_STATUS_HANDLE)) { |
3d396eb1 AK |
1327 | buffer = |
1328 | &adapter->cmd_buf_arr[adapter->last_cmd_consumer]; | |
ed25ffa1 | 1329 | count2++; |
3d396eb1 AK |
1330 | if (buffer->skb) |
1331 | break; | |
1332 | else | |
1333 | adapter->last_cmd_consumer = | |
1334 | get_next_index(adapter->last_cmd_consumer, | |
1335 | adapter->max_tx_desc_count); | |
1336 | } | |
1337 | } | |
ed25ffa1 | 1338 | if (count1 || count2) { |
3d396eb1 AK |
1339 | for (p = 0; p < adapter->ahw.max_ports; p++) { |
1340 | nport = adapter->port[p]; | |
1341 | if (netif_queue_stopped(nport->netdev) | |
1342 | && (nport->flags & NETXEN_NETDEV_STATUS)) { | |
1343 | netif_wake_queue(nport->netdev); | |
1344 | nport->flags &= ~NETXEN_NETDEV_STATUS; | |
1345 | } | |
1346 | } | |
1347 | } | |
ed25ffa1 AK |
1348 | /* |
1349 | * If everything is freed up to consumer then check if the ring is full | |
1350 | * If the ring is full then check if more needs to be freed and | |
1351 | * schedule the call back again. | |
1352 | * | |
1353 | * This happens when there are 2 CPUs. One could be freeing and the | |
1354 | * other filling it. If the ring is full when we get out of here and | |
1355 | * the card has already interrupted the host then the host can miss the | |
1356 | * interrupt. | |
1357 | * | |
1358 | * There is still a possible race condition and the host could miss an | |
1359 | * interrupt. The card has to take care of this. | |
1360 | */ | |
1361 | if (adapter->last_cmd_consumer == consumer && | |
1362 | (((adapter->cmd_producer + 1) % | |
1363 | adapter->max_tx_desc_count) == adapter->last_cmd_consumer)) { | |
9b410117 | 1364 | consumer = le32_to_cpu(*(adapter->cmd_consumer)); |
ed25ffa1 AK |
1365 | } |
1366 | done = (adapter->last_cmd_consumer == consumer); | |
3d396eb1 AK |
1367 | |
1368 | spin_unlock(&adapter->tx_lock); | |
1369 | DPRINTK(INFO, "last consumer is %d in %s\n", last_consumer, | |
1370 | __FUNCTION__); | |
ed25ffa1 | 1371 | return (done); |
3d396eb1 AK |
1372 | } |
1373 | ||
1374 | /* | |
1375 | * netxen_post_rx_buffers puts buffer in the Phantom memory | |
1376 | */ | |
1377 | void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid) | |
1378 | { | |
1379 | struct pci_dev *pdev = adapter->ahw.pdev; | |
1380 | struct sk_buff *skb; | |
1381 | struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]); | |
1382 | struct netxen_rcv_desc_ctx *rcv_desc = NULL; | |
ed25ffa1 | 1383 | uint producer; |
3d396eb1 AK |
1384 | struct rcv_desc *pdesc; |
1385 | struct netxen_rx_buffer *buffer; | |
1386 | int count = 0; | |
1387 | int index = 0; | |
ed25ffa1 AK |
1388 | netxen_ctx_msg msg = 0; |
1389 | dma_addr_t dma; | |
3d396eb1 AK |
1390 | |
1391 | adapter->stats.post_called++; | |
1392 | rcv_desc = &recv_ctx->rcv_desc[ringid]; | |
3d396eb1 AK |
1393 | |
1394 | producer = rcv_desc->producer; | |
1395 | index = rcv_desc->begin_alloc; | |
1396 | buffer = &rcv_desc->rx_buf_arr[index]; | |
1397 | /* We can start writing rx descriptors into the phantom memory. */ | |
1398 | while (buffer->state == NETXEN_BUFFER_FREE) { | |
1399 | skb = dev_alloc_skb(rcv_desc->skb_size); | |
1400 | if (unlikely(!skb)) { | |
1401 | /* | |
ed25ffa1 | 1402 | * TODO |
3d396eb1 AK |
1403 | * We need to schedule the posting of buffers to the pegs. |
1404 | */ | |
1405 | rcv_desc->begin_alloc = index; | |
cb8011ad | 1406 | DPRINTK(ERR, "netxen_post_rx_buffers: " |
3d396eb1 AK |
1407 | " allocated only %d buffers\n", count); |
1408 | break; | |
1409 | } | |
ed25ffa1 AK |
1410 | |
1411 | count++; /* now there should be no failure */ | |
1412 | pdesc = &rcv_desc->desc_head[producer]; | |
1413 | ||
1414 | #if defined(XGB_DEBUG) | |
1415 | *(unsigned long *)(skb->head) = 0xc0debabe; | |
1416 | if (skb_is_nonlinear(skb)) { | |
1417 | printk("Allocated SKB @%p is nonlinear\n"); | |
1418 | } | |
1419 | #endif | |
1420 | skb_reserve(skb, 2); | |
1421 | /* This will be setup when we receive the | |
1422 | * buffer after it has been filled FSL TBD TBD | |
1423 | * skb->dev = netdev; | |
1424 | */ | |
1425 | dma = pci_map_single(pdev, skb->data, rcv_desc->dma_size, | |
1426 | PCI_DMA_FROMDEVICE); | |
ed33ebe4 | 1427 | pdesc->addr_buffer = cpu_to_le64(dma); |
ed25ffa1 AK |
1428 | buffer->skb = skb; |
1429 | buffer->state = NETXEN_BUFFER_BUSY; | |
1430 | buffer->dma = dma; | |
1431 | /* make a rcv descriptor */ | |
ed33ebe4 AK |
1432 | pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); |
1433 | pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size); | |
ed25ffa1 AK |
1434 | DPRINTK(INFO, "done writing descripter\n"); |
1435 | producer = | |
1436 | get_next_index(producer, rcv_desc->max_rx_desc_count); | |
1437 | index = get_next_index(index, rcv_desc->max_rx_desc_count); | |
1438 | buffer = &rcv_desc->rx_buf_arr[index]; | |
1439 | } | |
1440 | /* if we did allocate buffers, then write the count to Phantom */ | |
1441 | if (count) { | |
1442 | rcv_desc->begin_alloc = index; | |
1443 | rcv_desc->rcv_pending += count; | |
1444 | adapter->stats.lastposted = count; | |
1445 | adapter->stats.posted += count; | |
1446 | rcv_desc->producer = producer; | |
1447 | if (rcv_desc->rcv_free >= 32) { | |
1448 | rcv_desc->rcv_free = 0; | |
1449 | /* Window = 1 */ | |
1450 | writel((producer - 1) & | |
1451 | (rcv_desc->max_rx_desc_count - 1), | |
1452 | NETXEN_CRB_NORMALIZE(adapter, | |
1453 | recv_crb_registers[0]. | |
1454 | rcv_desc_crb[ringid]. | |
1455 | crb_rcv_producer_offset)); | |
1456 | /* | |
1457 | * Write a doorbell msg to tell phanmon of change in | |
1458 | * receive ring producer | |
1459 | */ | |
1460 | netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID); | |
1461 | netxen_set_msg_privid(msg); | |
1462 | netxen_set_msg_count(msg, | |
1463 | ((producer - | |
1464 | 1) & (rcv_desc-> | |
1465 | max_rx_desc_count - 1))); | |
1466 | netxen_set_msg_ctxid(msg, 0); | |
1467 | netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid)); | |
1468 | writel(msg, | |
1469 | DB_NORMALIZE(adapter, | |
1470 | NETXEN_RCV_PRODUCER_OFFSET)); | |
1471 | } | |
1472 | } | |
1473 | } | |
1474 | ||
1475 | void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, uint32_t ctx, | |
1476 | uint32_t ringid) | |
1477 | { | |
1478 | struct pci_dev *pdev = adapter->ahw.pdev; | |
1479 | struct sk_buff *skb; | |
1480 | struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]); | |
1481 | struct netxen_rcv_desc_ctx *rcv_desc = NULL; | |
1482 | u32 producer; | |
1483 | struct rcv_desc *pdesc; | |
1484 | struct netxen_rx_buffer *buffer; | |
1485 | int count = 0; | |
1486 | int index = 0; | |
1487 | ||
1488 | adapter->stats.post_called++; | |
1489 | rcv_desc = &recv_ctx->rcv_desc[ringid]; | |
1490 | ||
1491 | producer = rcv_desc->producer; | |
1492 | index = rcv_desc->begin_alloc; | |
1493 | buffer = &rcv_desc->rx_buf_arr[index]; | |
1494 | /* We can start writing rx descriptors into the phantom memory. */ | |
1495 | while (buffer->state == NETXEN_BUFFER_FREE) { | |
1496 | skb = dev_alloc_skb(rcv_desc->skb_size); | |
1497 | if (unlikely(!skb)) { | |
1498 | /* | |
1499 | * We need to schedule the posting of buffers to the pegs. | |
1500 | */ | |
1501 | rcv_desc->begin_alloc = index; | |
1502 | DPRINTK(ERR, "netxen_post_rx_buffers_nodb: " | |
1503 | " allocated only %d buffers\n", count); | |
1504 | break; | |
1505 | } | |
3d396eb1 AK |
1506 | count++; /* now there should be no failure */ |
1507 | pdesc = &rcv_desc->desc_head[producer]; | |
ed25ffa1 | 1508 | skb_reserve(skb, 2); |
3d396eb1 AK |
1509 | /* |
1510 | * This will be setup when we receive the | |
1511 | * buffer after it has been filled | |
1512 | * skb->dev = netdev; | |
1513 | */ | |
1514 | buffer->skb = skb; | |
1515 | buffer->state = NETXEN_BUFFER_BUSY; | |
1516 | buffer->dma = pci_map_single(pdev, skb->data, | |
1517 | rcv_desc->dma_size, | |
1518 | PCI_DMA_FROMDEVICE); | |
ed25ffa1 | 1519 | |
3d396eb1 | 1520 | /* make a rcv descriptor */ |
ed33ebe4 | 1521 | pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); |
a608ab9c | 1522 | pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size); |
3d396eb1 AK |
1523 | pdesc->addr_buffer = cpu_to_le64(buffer->dma); |
1524 | DPRINTK(INFO, "done writing descripter\n"); | |
1525 | producer = | |
1526 | get_next_index(producer, rcv_desc->max_rx_desc_count); | |
1527 | index = get_next_index(index, rcv_desc->max_rx_desc_count); | |
1528 | buffer = &rcv_desc->rx_buf_arr[index]; | |
1529 | } | |
1530 | ||
1531 | /* if we did allocate buffers, then write the count to Phantom */ | |
1532 | if (count) { | |
1533 | rcv_desc->begin_alloc = index; | |
1534 | rcv_desc->rcv_pending += count; | |
1535 | adapter->stats.lastposted = count; | |
1536 | adapter->stats.posted += count; | |
1537 | rcv_desc->producer = producer; | |
1538 | if (rcv_desc->rcv_free >= 32) { | |
1539 | rcv_desc->rcv_free = 0; | |
1540 | /* Window = 1 */ | |
1541 | writel((producer - 1) & | |
1542 | (rcv_desc->max_rx_desc_count - 1), | |
1543 | NETXEN_CRB_NORMALIZE(adapter, | |
ed25ffa1 AK |
1544 | recv_crb_registers[0]. |
1545 | rcv_desc_crb[ringid]. | |
3d396eb1 AK |
1546 | crb_rcv_producer_offset)); |
1547 | wmb(); | |
1548 | } | |
1549 | } | |
1550 | } | |
1551 | ||
1552 | int netxen_nic_tx_has_work(struct netxen_adapter *adapter) | |
1553 | { | |
1554 | if (find_diff_among(adapter->last_cmd_consumer, | |
1555 | adapter->cmd_producer, | |
1556 | adapter->max_tx_desc_count) > 0) | |
1557 | return 1; | |
1558 | ||
1559 | return 0; | |
1560 | } | |
1561 | ||
3d396eb1 AK |
1562 | |
1563 | void netxen_nic_clear_stats(struct netxen_adapter *adapter) | |
1564 | { | |
1565 | struct netxen_port *port; | |
1566 | int port_num; | |
1567 | ||
1568 | memset(&adapter->stats, 0, sizeof(adapter->stats)); | |
1569 | for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) { | |
1570 | port = adapter->port[port_num]; | |
1571 | memset(&port->stats, 0, sizeof(port->stats)); | |
1572 | } | |
1573 | } | |
1574 |