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Commit | Line | Data |
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3d396eb1 | 1 | /* |
5d242f1c | 2 | * Copyright (C) 2003 - 2009 NetXen, Inc. |
3d396eb1 | 3 | * All rights reserved. |
80922fbc | 4 | * |
3d396eb1 AK |
5 | * This program is free software; you can redistribute it and/or |
6 | * modify it under the terms of the GNU General Public License | |
7 | * as published by the Free Software Foundation; either version 2 | |
8 | * of the License, or (at your option) any later version. | |
80922fbc | 9 | * |
3d396eb1 AK |
10 | * This program is distributed in the hope that it will be useful, but |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
80922fbc | 14 | * |
3d396eb1 AK |
15 | * You should have received a copy of the GNU General Public License |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, | |
18 | * MA 02111-1307, USA. | |
80922fbc | 19 | * |
3d396eb1 AK |
20 | * The full GNU General Public License is included in this distribution |
21 | * in the file called LICENSE. | |
80922fbc | 22 | * |
3d396eb1 AK |
23 | * Contact Information: |
24 | * info@netxen.com | |
5d242f1c DP |
25 | * NetXen Inc, |
26 | * 18922 Forge Drive | |
27 | * Cupertino, CA 95014-0701 | |
3d396eb1 AK |
28 | * |
29 | */ | |
30 | ||
cb8011ad | 31 | #include <linux/vmalloc.h> |
e98e3350 | 32 | #include <linux/interrupt.h> |
3d396eb1 AK |
33 | #include "netxen_nic_hw.h" |
34 | ||
35 | #include "netxen_nic.h" | |
3d396eb1 | 36 | #include "netxen_nic_phan_reg.h" |
3d396eb1 | 37 | |
1494a814 | 38 | #include <linux/dma-mapping.h> |
391587c3 | 39 | #include <linux/if_vlan.h> |
c9bdd4b5 | 40 | #include <net/ip.h> |
00977784 | 41 | #include <linux/ipv6.h> |
1494a814 | 42 | |
3d396eb1 AK |
43 | MODULE_DESCRIPTION("NetXen Multi port (1/10) Gigabit Network Driver"); |
44 | MODULE_LICENSE("GPL"); | |
45 | MODULE_VERSION(NETXEN_NIC_LINUX_VERSIONID); | |
46 | ||
ceded32f | 47 | char netxen_nic_driver_name[] = "netxen_nic"; |
3d396eb1 | 48 | static char netxen_nic_driver_string[] = "NetXen Network Driver version " |
cb8011ad | 49 | NETXEN_NIC_LINUX_VERSIONID; |
3d396eb1 | 50 | |
2956640d DP |
51 | static int port_mode = NETXEN_PORT_MODE_AUTO_NEG; |
52 | ||
53 | /* Default to restricted 1G auto-neg mode */ | |
54 | static int wol_port_mode = 5; | |
55 | ||
56 | static int use_msi = 1; | |
57 | ||
58 | static int use_msi_x = 1; | |
59 | ||
3d396eb1 AK |
60 | /* Local functions to NetXen NIC driver */ |
61 | static int __devinit netxen_nic_probe(struct pci_dev *pdev, | |
2956640d | 62 | const struct pci_device_id *ent); |
3d396eb1 AK |
63 | static void __devexit netxen_nic_remove(struct pci_dev *pdev); |
64 | static int netxen_nic_open(struct net_device *netdev); | |
65 | static int netxen_nic_close(struct net_device *netdev); | |
66 | static int netxen_nic_xmit_frame(struct sk_buff *, struct net_device *); | |
67 | static void netxen_tx_timeout(struct net_device *netdev); | |
6d5aefb8 | 68 | static void netxen_tx_timeout_task(struct work_struct *work); |
3d396eb1 | 69 | static void netxen_watchdog(unsigned long); |
bea3348e | 70 | static int netxen_nic_poll(struct napi_struct *napi, int budget); |
3d396eb1 AK |
71 | #ifdef CONFIG_NET_POLL_CONTROLLER |
72 | static void netxen_nic_poll_controller(struct net_device *netdev); | |
73 | #endif | |
1494a814 | 74 | static irqreturn_t netxen_intr(int irq, void *data); |
05aaa02d | 75 | static irqreturn_t netxen_msi_intr(int irq, void *data); |
b3df68f8 | 76 | static irqreturn_t netxen_msix_intr(int irq, void *data); |
3d396eb1 AK |
77 | |
78 | /* PCI Device ID Table */ | |
70081ac5 | 79 | #define ENTRY(device) \ |
040dec3b | 80 | {PCI_DEVICE(PCI_VENDOR_ID_NETXEN, (device)), \ |
70081ac5 AV |
81 | .class = PCI_CLASS_NETWORK_ETHERNET << 8, .class_mask = ~0} |
82 | ||
3d396eb1 | 83 | static struct pci_device_id netxen_pci_tbl[] __devinitdata = { |
040dec3b DP |
84 | ENTRY(PCI_DEVICE_ID_NX2031_10GXSR), |
85 | ENTRY(PCI_DEVICE_ID_NX2031_10GCX4), | |
86 | ENTRY(PCI_DEVICE_ID_NX2031_4GCU), | |
87 | ENTRY(PCI_DEVICE_ID_NX2031_IMEZ), | |
88 | ENTRY(PCI_DEVICE_ID_NX2031_HMEZ), | |
89 | ENTRY(PCI_DEVICE_ID_NX2031_XG_MGMT), | |
90 | ENTRY(PCI_DEVICE_ID_NX2031_XG_MGMT2), | |
91 | ENTRY(PCI_DEVICE_ID_NX3031), | |
3d396eb1 AK |
92 | {0,} |
93 | }; | |
94 | ||
95 | MODULE_DEVICE_TABLE(pci, netxen_pci_tbl); | |
96 | ||
b1555130 AB |
97 | static struct workqueue_struct *netxen_workq; |
98 | #define SCHEDULE_WORK(tp) queue_work(netxen_workq, tp) | |
99 | #define FLUSH_SCHEDULED_WORK() flush_workqueue(netxen_workq) | |
100 | ||
ed25ffa1 AK |
101 | static void netxen_watchdog(unsigned long); |
102 | ||
7830b22c DP |
103 | static uint32_t crb_cmd_producer[4] = { |
104 | CRB_CMD_PRODUCER_OFFSET, CRB_CMD_PRODUCER_OFFSET_1, | |
105 | CRB_CMD_PRODUCER_OFFSET_2, CRB_CMD_PRODUCER_OFFSET_3 | |
106 | }; | |
107 | ||
c9fc891f | 108 | void |
3ce06a32 | 109 | netxen_nic_update_cmd_producer(struct netxen_adapter *adapter, |
d877f1e3 | 110 | struct nx_host_tx_ring *tx_ring, u32 producer) |
3176ff3e | 111 | { |
f98a9f69 | 112 | NXWR32(adapter, tx_ring->crb_cmd_producer, producer); |
3176ff3e MT |
113 | } |
114 | ||
7830b22c DP |
115 | static uint32_t crb_cmd_consumer[4] = { |
116 | CRB_CMD_CONSUMER_OFFSET, CRB_CMD_CONSUMER_OFFSET_1, | |
117 | CRB_CMD_CONSUMER_OFFSET_2, CRB_CMD_CONSUMER_OFFSET_3 | |
118 | }; | |
119 | ||
3ce06a32 DP |
120 | static inline void |
121 | netxen_nic_update_cmd_consumer(struct netxen_adapter *adapter, | |
d877f1e3 | 122 | struct nx_host_tx_ring *tx_ring, u32 consumer) |
3176ff3e | 123 | { |
f98a9f69 | 124 | NXWR32(adapter, tx_ring->crb_cmd_consumer, consumer); |
3176ff3e MT |
125 | } |
126 | ||
2956640d | 127 | static uint32_t msi_tgt_status[8] = { |
443be796 | 128 | ISR_INT_TARGET_STATUS, ISR_INT_TARGET_STATUS_F1, |
2956640d DP |
129 | ISR_INT_TARGET_STATUS_F2, ISR_INT_TARGET_STATUS_F3, |
130 | ISR_INT_TARGET_STATUS_F4, ISR_INT_TARGET_STATUS_F5, | |
131 | ISR_INT_TARGET_STATUS_F6, ISR_INT_TARGET_STATUS_F7 | |
443be796 DP |
132 | }; |
133 | ||
2956640d DP |
134 | static struct netxen_legacy_intr_set legacy_intr[] = NX_LEGACY_INTR_CONFIG; |
135 | ||
d8b100c5 | 136 | static inline void netxen_nic_disable_int(struct nx_host_sds_ring *sds_ring) |
4638aef1 | 137 | { |
d8b100c5 DP |
138 | struct netxen_adapter *adapter = sds_ring->adapter; |
139 | ||
f98a9f69 | 140 | NXWR32(adapter, sds_ring->crb_intr_mask, 0); |
4638aef1 SH |
141 | } |
142 | ||
d8b100c5 | 143 | static inline void netxen_nic_enable_int(struct nx_host_sds_ring *sds_ring) |
4638aef1 | 144 | { |
d8b100c5 DP |
145 | struct netxen_adapter *adapter = sds_ring->adapter; |
146 | ||
f98a9f69 | 147 | NXWR32(adapter, sds_ring->crb_intr_mask, 0x1); |
4638aef1 | 148 | |
092bc571 DP |
149 | if (!NETXEN_IS_MSI_FAMILY(adapter)) |
150 | adapter->pci_write_immediate(adapter, | |
151 | adapter->legacy_intr.tgt_mask_reg, 0xfbff); | |
4638aef1 SH |
152 | } |
153 | ||
71dcddbd DP |
154 | static int |
155 | netxen_alloc_sds_rings(struct netxen_recv_context *recv_ctx, int count) | |
156 | { | |
157 | int size = sizeof(struct nx_host_sds_ring) * count; | |
158 | ||
159 | recv_ctx->sds_rings = kzalloc(size, GFP_KERNEL); | |
160 | ||
161 | return (recv_ctx->sds_rings == NULL); | |
162 | } | |
163 | ||
d8b100c5 | 164 | static void |
71dcddbd DP |
165 | netxen_free_sds_rings(struct netxen_recv_context *recv_ctx) |
166 | { | |
167 | if (recv_ctx->sds_rings != NULL) | |
168 | kfree(recv_ctx->sds_rings); | |
169 | } | |
170 | ||
171 | static int | |
d8b100c5 DP |
172 | netxen_napi_add(struct netxen_adapter *adapter, struct net_device *netdev) |
173 | { | |
174 | int ring; | |
175 | struct nx_host_sds_ring *sds_ring; | |
176 | struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; | |
177 | ||
178 | if (adapter->flags & NETXEN_NIC_MSIX_ENABLED) | |
179 | adapter->max_sds_rings = (num_online_cpus() >= 4) ? 4 : 2; | |
180 | else | |
181 | adapter->max_sds_rings = 1; | |
182 | ||
71dcddbd DP |
183 | if (netxen_alloc_sds_rings(recv_ctx, adapter->max_sds_rings)) |
184 | return 1; | |
185 | ||
d8b100c5 DP |
186 | for (ring = 0; ring < adapter->max_sds_rings; ring++) { |
187 | sds_ring = &recv_ctx->sds_rings[ring]; | |
188 | netif_napi_add(netdev, &sds_ring->napi, | |
189 | netxen_nic_poll, NETXEN_NETDEV_WEIGHT); | |
190 | } | |
71dcddbd DP |
191 | |
192 | return 0; | |
d8b100c5 DP |
193 | } |
194 | ||
195 | static void | |
196 | netxen_napi_enable(struct netxen_adapter *adapter) | |
197 | { | |
198 | int ring; | |
199 | struct nx_host_sds_ring *sds_ring; | |
200 | struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; | |
201 | ||
202 | for (ring = 0; ring < adapter->max_sds_rings; ring++) { | |
203 | sds_ring = &recv_ctx->sds_rings[ring]; | |
204 | napi_enable(&sds_ring->napi); | |
205 | netxen_nic_enable_int(sds_ring); | |
206 | } | |
207 | } | |
208 | ||
209 | static void | |
210 | netxen_napi_disable(struct netxen_adapter *adapter) | |
211 | { | |
212 | int ring; | |
213 | struct nx_host_sds_ring *sds_ring; | |
214 | struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; | |
215 | ||
216 | for (ring = 0; ring < adapter->max_sds_rings; ring++) { | |
217 | sds_ring = &recv_ctx->sds_rings[ring]; | |
218 | netxen_nic_disable_int(sds_ring); | |
219 | napi_disable(&sds_ring->napi); | |
220 | } | |
221 | } | |
222 | ||
2956640d DP |
223 | static int nx_set_dma_mask(struct netxen_adapter *adapter, uint8_t revision_id) |
224 | { | |
225 | struct pci_dev *pdev = adapter->pdev; | |
1f434f63 DP |
226 | uint64_t mask, cmask; |
227 | ||
228 | adapter->pci_using_dac = 0; | |
2956640d | 229 | |
6afd142f | 230 | mask = DMA_BIT_MASK(32); |
2956640d DP |
231 | /* |
232 | * Consistent DMA mask is set to 32 bit because it cannot be set to | |
233 | * 35 bits. For P3 also leave it at 32 bits for now. Only the rings | |
234 | * come off this pool. | |
235 | */ | |
6afd142f | 236 | cmask = DMA_BIT_MASK(32); |
1f434f63 DP |
237 | |
238 | #ifndef CONFIG_IA64 | |
239 | if (revision_id >= NX_P3_B0) | |
6afd142f | 240 | mask = DMA_BIT_MASK(39); |
1f434f63 | 241 | else if (revision_id == NX_P2_C1) |
6afd142f | 242 | mask = DMA_BIT_MASK(35); |
1f434f63 | 243 | #endif |
2956640d | 244 | if (pci_set_dma_mask(pdev, mask) == 0 && |
1f434f63 | 245 | pci_set_consistent_dma_mask(pdev, cmask) == 0) { |
2956640d DP |
246 | adapter->pci_using_dac = 1; |
247 | return 0; | |
248 | } | |
2956640d | 249 | |
1f434f63 DP |
250 | return -EIO; |
251 | } | |
252 | ||
253 | /* Update addressable range if firmware supports it */ | |
254 | static int | |
255 | nx_update_dma_mask(struct netxen_adapter *adapter) | |
256 | { | |
257 | int change, shift, err; | |
258 | uint64_t mask, old_mask; | |
259 | struct pci_dev *pdev = adapter->pdev; | |
260 | ||
261 | change = 0; | |
262 | ||
f98a9f69 | 263 | shift = NXRD32(adapter, CRB_DMA_SHIFT); |
1f434f63 DP |
264 | if (shift >= 32) |
265 | return 0; | |
266 | ||
267 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id) && (shift > 9)) | |
268 | change = 1; | |
269 | else if ((adapter->ahw.revision_id == NX_P2_C1) && (shift <= 4)) | |
270 | change = 1; | |
271 | ||
272 | if (change) { | |
273 | old_mask = pdev->dma_mask; | |
274 | mask = (1ULL<<(32+shift)) - 1; | |
275 | ||
276 | err = pci_set_dma_mask(pdev, mask); | |
277 | if (err) | |
278 | return pci_set_dma_mask(pdev, old_mask); | |
2956640d DP |
279 | } |
280 | ||
2956640d DP |
281 | return 0; |
282 | } | |
283 | ||
284 | static void netxen_check_options(struct netxen_adapter *adapter) | |
285 | { | |
438627c7 DP |
286 | if (adapter->ahw.port_type == NETXEN_NIC_XGBE) |
287 | adapter->num_rxd = MAX_RCV_DESCRIPTORS_10G; | |
288 | else if (adapter->ahw.port_type == NETXEN_NIC_GBE) | |
289 | adapter->num_rxd = MAX_RCV_DESCRIPTORS_1G; | |
2956640d | 290 | |
438627c7 | 291 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) |
c7860a2a | 292 | adapter->msix_supported = !!use_msi_x; |
438627c7 | 293 | else |
2956640d | 294 | adapter->msix_supported = 0; |
2956640d | 295 | |
438627c7 DP |
296 | adapter->num_txd = MAX_CMD_DESCRIPTORS_HOST; |
297 | adapter->num_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS; | |
298 | adapter->num_lro_rxd = MAX_LRO_RCV_DESCRIPTORS; | |
2956640d | 299 | |
2956640d DP |
300 | return; |
301 | } | |
302 | ||
303 | static int | |
304 | netxen_check_hw_init(struct netxen_adapter *adapter, int first_boot) | |
305 | { | |
27c915a4 | 306 | u32 val, timeout; |
2956640d DP |
307 | |
308 | if (first_boot == 0x55555555) { | |
309 | /* This is the first boot after power up */ | |
f98a9f69 | 310 | NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC); |
27c915a4 DP |
311 | |
312 | if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) | |
313 | return 0; | |
2956640d DP |
314 | |
315 | /* PCI bus master workaround */ | |
f98a9f69 | 316 | first_boot = NXRD32(adapter, NETXEN_PCIE_REG(0x4)); |
2956640d DP |
317 | if (!(first_boot & 0x4)) { |
318 | first_boot |= 0x4; | |
f98a9f69 DP |
319 | NXWR32(adapter, NETXEN_PCIE_REG(0x4), first_boot); |
320 | first_boot = NXRD32(adapter, NETXEN_PCIE_REG(0x4)); | |
2956640d DP |
321 | } |
322 | ||
323 | /* This is the first boot after power up */ | |
f98a9f69 | 324 | first_boot = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET); |
2956640d DP |
325 | if (first_boot != 0x80000f) { |
326 | /* clear the register for future unloads/loads */ | |
f98a9f69 | 327 | NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), 0); |
27c915a4 | 328 | return -EIO; |
2956640d DP |
329 | } |
330 | ||
27c915a4 | 331 | /* Start P2 boot loader */ |
f98a9f69 DP |
332 | val = NXRD32(adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE); |
333 | NXWR32(adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE, val | 0x1); | |
27c915a4 DP |
334 | timeout = 0; |
335 | do { | |
336 | msleep(1); | |
f98a9f69 | 337 | val = NXRD32(adapter, NETXEN_CAM_RAM(0x1fc)); |
27c915a4 DP |
338 | |
339 | if (++timeout > 5000) | |
340 | return -EIO; | |
341 | ||
342 | } while (val == NETXEN_BDINFO_MAGIC); | |
2956640d | 343 | } |
27c915a4 | 344 | return 0; |
2956640d DP |
345 | } |
346 | ||
347 | static void netxen_set_port_mode(struct netxen_adapter *adapter) | |
348 | { | |
349 | u32 val, data; | |
350 | ||
1e2d0059 | 351 | val = adapter->ahw.board_type; |
2956640d DP |
352 | if ((val == NETXEN_BRDTYPE_P3_HMEZ) || |
353 | (val == NETXEN_BRDTYPE_P3_XG_LOM)) { | |
354 | if (port_mode == NETXEN_PORT_MODE_802_3_AP) { | |
355 | data = NETXEN_PORT_MODE_802_3_AP; | |
f98a9f69 | 356 | NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data); |
2956640d DP |
357 | } else if (port_mode == NETXEN_PORT_MODE_XG) { |
358 | data = NETXEN_PORT_MODE_XG; | |
f98a9f69 | 359 | NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data); |
2956640d DP |
360 | } else if (port_mode == NETXEN_PORT_MODE_AUTO_NEG_1G) { |
361 | data = NETXEN_PORT_MODE_AUTO_NEG_1G; | |
f98a9f69 | 362 | NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data); |
2956640d DP |
363 | } else if (port_mode == NETXEN_PORT_MODE_AUTO_NEG_XG) { |
364 | data = NETXEN_PORT_MODE_AUTO_NEG_XG; | |
f98a9f69 | 365 | NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data); |
2956640d DP |
366 | } else { |
367 | data = NETXEN_PORT_MODE_AUTO_NEG; | |
f98a9f69 | 368 | NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data); |
2956640d DP |
369 | } |
370 | ||
371 | if ((wol_port_mode != NETXEN_PORT_MODE_802_3_AP) && | |
372 | (wol_port_mode != NETXEN_PORT_MODE_XG) && | |
373 | (wol_port_mode != NETXEN_PORT_MODE_AUTO_NEG_1G) && | |
374 | (wol_port_mode != NETXEN_PORT_MODE_AUTO_NEG_XG)) { | |
375 | wol_port_mode = NETXEN_PORT_MODE_AUTO_NEG; | |
376 | } | |
f98a9f69 | 377 | NXWR32(adapter, NETXEN_WOL_PORT_MODE, wol_port_mode); |
2956640d DP |
378 | } |
379 | } | |
380 | ||
2956640d DP |
381 | static void netxen_set_msix_bit(struct pci_dev *pdev, int enable) |
382 | { | |
383 | u32 control; | |
384 | int pos; | |
385 | ||
386 | pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX); | |
387 | if (pos) { | |
388 | pci_read_config_dword(pdev, pos, &control); | |
389 | if (enable) | |
390 | control |= PCI_MSIX_FLAGS_ENABLE; | |
391 | else | |
392 | control = 0; | |
393 | pci_write_config_dword(pdev, pos, control); | |
394 | } | |
395 | } | |
396 | ||
397 | static void netxen_init_msix_entries(struct netxen_adapter *adapter) | |
398 | { | |
399 | int i; | |
400 | ||
401 | for (i = 0; i < MSIX_ENTRIES_PER_ADAPTER; i++) | |
402 | adapter->msix_entries[i].entry = i; | |
403 | } | |
404 | ||
9dc28efe DP |
405 | static int |
406 | netxen_read_mac_addr(struct netxen_adapter *adapter) | |
407 | { | |
408 | int i; | |
409 | unsigned char *p; | |
410 | __le64 mac_addr; | |
9dc28efe DP |
411 | struct net_device *netdev = adapter->netdev; |
412 | struct pci_dev *pdev = adapter->pdev; | |
413 | ||
9dc28efe DP |
414 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { |
415 | if (netxen_p3_get_mac_addr(adapter, &mac_addr) != 0) | |
416 | return -EIO; | |
417 | } else { | |
418 | if (netxen_get_flash_mac_addr(adapter, &mac_addr) != 0) | |
419 | return -EIO; | |
420 | } | |
421 | ||
422 | p = (unsigned char *)&mac_addr; | |
423 | for (i = 0; i < 6; i++) | |
424 | netdev->dev_addr[i] = *(p + 5 - i); | |
425 | ||
426 | memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len); | |
427 | ||
428 | /* set station address */ | |
429 | ||
e174961c JB |
430 | if (!is_valid_ether_addr(netdev->perm_addr)) |
431 | dev_warn(&pdev->dev, "Bad MAC address %pM.\n", netdev->dev_addr); | |
432 | else | |
9dc28efe DP |
433 | adapter->macaddr_set(adapter, netdev->dev_addr); |
434 | ||
435 | return 0; | |
436 | } | |
437 | ||
1abd266f SH |
438 | static void netxen_set_multicast_list(struct net_device *dev) |
439 | { | |
440 | struct netxen_adapter *adapter = netdev_priv(dev); | |
441 | ||
442 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) | |
443 | netxen_p3_nic_set_multi(dev); | |
444 | else | |
445 | netxen_p2_nic_set_multi(dev); | |
446 | } | |
447 | ||
448 | static const struct net_device_ops netxen_netdev_ops = { | |
449 | .ndo_open = netxen_nic_open, | |
450 | .ndo_stop = netxen_nic_close, | |
451 | .ndo_start_xmit = netxen_nic_xmit_frame, | |
452 | .ndo_get_stats = netxen_nic_get_stats, | |
453 | .ndo_validate_addr = eth_validate_addr, | |
454 | .ndo_set_multicast_list = netxen_set_multicast_list, | |
455 | .ndo_set_mac_address = netxen_nic_set_mac, | |
456 | .ndo_change_mtu = netxen_nic_change_mtu, | |
457 | .ndo_tx_timeout = netxen_tx_timeout, | |
458 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
459 | .ndo_poll_controller = netxen_nic_poll_controller, | |
460 | #endif | |
461 | }; | |
462 | ||
97daee83 DP |
463 | static void |
464 | netxen_setup_intr(struct netxen_adapter *adapter) | |
465 | { | |
466 | struct netxen_legacy_intr_set *legacy_intrp; | |
467 | struct pci_dev *pdev = adapter->pdev; | |
468 | ||
469 | adapter->flags &= ~(NETXEN_NIC_MSI_ENABLED | NETXEN_NIC_MSIX_ENABLED); | |
97daee83 DP |
470 | |
471 | if (adapter->ahw.revision_id >= NX_P3_B0) | |
472 | legacy_intrp = &legacy_intr[adapter->ahw.pci_func]; | |
473 | else | |
474 | legacy_intrp = &legacy_intr[0]; | |
475 | adapter->legacy_intr.int_vec_bit = legacy_intrp->int_vec_bit; | |
476 | adapter->legacy_intr.tgt_status_reg = legacy_intrp->tgt_status_reg; | |
477 | adapter->legacy_intr.tgt_mask_reg = legacy_intrp->tgt_mask_reg; | |
478 | adapter->legacy_intr.pci_int_reg = legacy_intrp->pci_int_reg; | |
479 | ||
480 | netxen_set_msix_bit(pdev, 0); | |
481 | ||
482 | if (adapter->msix_supported) { | |
483 | ||
484 | netxen_init_msix_entries(adapter); | |
485 | if (pci_enable_msix(pdev, adapter->msix_entries, | |
486 | MSIX_ENTRIES_PER_ADAPTER)) | |
487 | goto request_msi; | |
488 | ||
489 | adapter->flags |= NETXEN_NIC_MSIX_ENABLED; | |
490 | netxen_set_msix_bit(pdev, 1); | |
491 | dev_info(&pdev->dev, "using msi-x interrupts\n"); | |
492 | ||
493 | } else { | |
494 | request_msi: | |
495 | if (use_msi && !pci_enable_msi(pdev)) { | |
496 | adapter->flags |= NETXEN_NIC_MSI_ENABLED; | |
497 | dev_info(&pdev->dev, "using msi interrupts\n"); | |
498 | } else | |
499 | dev_info(&pdev->dev, "using legacy interrupts\n"); | |
d8b100c5 | 500 | adapter->msix_entries[0].vector = pdev->irq; |
97daee83 DP |
501 | } |
502 | } | |
503 | ||
504 | static void | |
505 | netxen_teardown_intr(struct netxen_adapter *adapter) | |
506 | { | |
507 | if (adapter->flags & NETXEN_NIC_MSIX_ENABLED) | |
508 | pci_disable_msix(adapter->pdev); | |
509 | if (adapter->flags & NETXEN_NIC_MSI_ENABLED) | |
510 | pci_disable_msi(adapter->pdev); | |
511 | } | |
512 | ||
513 | static void | |
514 | netxen_cleanup_pci_map(struct netxen_adapter *adapter) | |
515 | { | |
516 | if (adapter->ahw.db_base != NULL) | |
517 | iounmap(adapter->ahw.db_base); | |
518 | if (adapter->ahw.pci_base0 != NULL) | |
519 | iounmap(adapter->ahw.pci_base0); | |
520 | if (adapter->ahw.pci_base1 != NULL) | |
521 | iounmap(adapter->ahw.pci_base1); | |
522 | if (adapter->ahw.pci_base2 != NULL) | |
523 | iounmap(adapter->ahw.pci_base2); | |
524 | } | |
525 | ||
526 | static int | |
527 | netxen_setup_pci_map(struct netxen_adapter *adapter) | |
528 | { | |
529 | void __iomem *mem_ptr0 = NULL; | |
530 | void __iomem *mem_ptr1 = NULL; | |
531 | void __iomem *mem_ptr2 = NULL; | |
532 | void __iomem *db_ptr = NULL; | |
533 | ||
97daee83 DP |
534 | unsigned long mem_base, mem_len, db_base, db_len = 0, pci_len0 = 0; |
535 | ||
536 | struct pci_dev *pdev = adapter->pdev; | |
537 | int pci_func = adapter->ahw.pci_func; | |
538 | ||
539 | int err = 0; | |
540 | ||
541 | /* | |
542 | * Set the CRB window to invalid. If any register in window 0 is | |
543 | * accessed it should set the window to 0 and then reset it to 1. | |
544 | */ | |
545 | adapter->curr_window = 255; | |
546 | adapter->ahw.qdr_sn_window = -1; | |
547 | adapter->ahw.ddr_mn_window = -1; | |
548 | ||
549 | /* remap phys address */ | |
550 | mem_base = pci_resource_start(pdev, 0); /* 0 is for BAR 0 */ | |
551 | mem_len = pci_resource_len(pdev, 0); | |
552 | pci_len0 = 0; | |
553 | ||
554 | adapter->hw_write_wx = netxen_nic_hw_write_wx_128M; | |
555 | adapter->hw_read_wx = netxen_nic_hw_read_wx_128M; | |
556 | adapter->pci_read_immediate = netxen_nic_pci_read_immediate_128M; | |
557 | adapter->pci_write_immediate = netxen_nic_pci_write_immediate_128M; | |
97daee83 DP |
558 | adapter->pci_set_window = netxen_nic_pci_set_window_128M; |
559 | adapter->pci_mem_read = netxen_nic_pci_mem_read_128M; | |
560 | adapter->pci_mem_write = netxen_nic_pci_mem_write_128M; | |
561 | ||
562 | /* 128 Meg of memory */ | |
563 | if (mem_len == NETXEN_PCI_128MB_SIZE) { | |
564 | mem_ptr0 = ioremap(mem_base, FIRST_PAGE_GROUP_SIZE); | |
565 | mem_ptr1 = ioremap(mem_base + SECOND_PAGE_GROUP_START, | |
566 | SECOND_PAGE_GROUP_SIZE); | |
567 | mem_ptr2 = ioremap(mem_base + THIRD_PAGE_GROUP_START, | |
568 | THIRD_PAGE_GROUP_SIZE); | |
97daee83 DP |
569 | } else if (mem_len == NETXEN_PCI_32MB_SIZE) { |
570 | mem_ptr1 = ioremap(mem_base, SECOND_PAGE_GROUP_SIZE); | |
571 | mem_ptr2 = ioremap(mem_base + THIRD_PAGE_GROUP_START - | |
572 | SECOND_PAGE_GROUP_START, THIRD_PAGE_GROUP_SIZE); | |
97daee83 DP |
573 | } else if (mem_len == NETXEN_PCI_2MB_SIZE) { |
574 | adapter->hw_write_wx = netxen_nic_hw_write_wx_2M; | |
575 | adapter->hw_read_wx = netxen_nic_hw_read_wx_2M; | |
576 | adapter->pci_read_immediate = netxen_nic_pci_read_immediate_2M; | |
577 | adapter->pci_write_immediate = | |
578 | netxen_nic_pci_write_immediate_2M; | |
97daee83 DP |
579 | adapter->pci_set_window = netxen_nic_pci_set_window_2M; |
580 | adapter->pci_mem_read = netxen_nic_pci_mem_read_2M; | |
581 | adapter->pci_mem_write = netxen_nic_pci_mem_write_2M; | |
582 | ||
583 | mem_ptr0 = pci_ioremap_bar(pdev, 0); | |
584 | if (mem_ptr0 == NULL) { | |
585 | dev_err(&pdev->dev, "failed to map PCI bar 0\n"); | |
586 | return -EIO; | |
587 | } | |
588 | pci_len0 = mem_len; | |
97daee83 DP |
589 | |
590 | adapter->ahw.ddr_mn_window = 0; | |
591 | adapter->ahw.qdr_sn_window = 0; | |
592 | ||
593 | adapter->ahw.mn_win_crb = 0x100000 + PCIX_MN_WINDOW + | |
594 | (pci_func * 0x20); | |
595 | adapter->ahw.ms_win_crb = 0x100000 + PCIX_SN_WINDOW; | |
596 | if (pci_func < 4) | |
597 | adapter->ahw.ms_win_crb += (pci_func * 0x20); | |
598 | else | |
599 | adapter->ahw.ms_win_crb += | |
600 | 0xA0 + ((pci_func - 4) * 0x10); | |
601 | } else { | |
602 | return -EIO; | |
603 | } | |
604 | ||
605 | dev_info(&pdev->dev, "%dMB memory map\n", (int)(mem_len>>20)); | |
606 | ||
607 | adapter->ahw.pci_base0 = mem_ptr0; | |
608 | adapter->ahw.pci_len0 = pci_len0; | |
97daee83 DP |
609 | adapter->ahw.pci_base1 = mem_ptr1; |
610 | adapter->ahw.pci_base2 = mem_ptr2; | |
611 | ||
612 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) | |
613 | goto skip_doorbell; | |
614 | ||
615 | db_base = pci_resource_start(pdev, 4); /* doorbell is on bar 4 */ | |
616 | db_len = pci_resource_len(pdev, 4); | |
617 | ||
618 | if (db_len == 0) { | |
619 | printk(KERN_ERR "%s: doorbell is disabled\n", | |
620 | netxen_nic_driver_name); | |
621 | err = -EIO; | |
622 | goto err_out; | |
623 | } | |
624 | ||
625 | db_ptr = ioremap(db_base, NETXEN_DB_MAPSIZE_BYTES); | |
626 | if (!db_ptr) { | |
627 | printk(KERN_ERR "%s: Failed to allocate doorbell map.", | |
628 | netxen_nic_driver_name); | |
629 | err = -EIO; | |
630 | goto err_out; | |
631 | } | |
632 | ||
633 | skip_doorbell: | |
634 | adapter->ahw.db_base = db_ptr; | |
635 | adapter->ahw.db_len = db_len; | |
636 | return 0; | |
637 | ||
638 | err_out: | |
639 | netxen_cleanup_pci_map(adapter); | |
640 | return err; | |
641 | } | |
642 | ||
ba599d4f DP |
643 | static int |
644 | netxen_start_firmware(struct netxen_adapter *adapter) | |
645 | { | |
646 | int val, err, first_boot; | |
647 | struct pci_dev *pdev = adapter->pdev; | |
648 | ||
0b72e659 DP |
649 | int first_driver = 0; |
650 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { | |
651 | if (adapter->ahw.pci_func == 0) | |
652 | first_driver = 1; | |
653 | } else { | |
654 | if (adapter->portnum == 0) | |
655 | first_driver = 1; | |
656 | } | |
657 | ||
658 | if (!first_driver) | |
659 | return 0; | |
660 | ||
f98a9f69 | 661 | first_boot = NXRD32(adapter, NETXEN_CAM_RAM(0x1fc)); |
ba599d4f DP |
662 | |
663 | err = netxen_check_hw_init(adapter, first_boot); | |
664 | if (err) { | |
665 | dev_err(&pdev->dev, "error in init HW init sequence\n"); | |
666 | return err; | |
667 | } | |
668 | ||
ba599d4f | 669 | if (first_boot != 0x55555555) { |
f98a9f69 | 670 | NXWR32(adapter, CRB_CMDPEG_STATE, 0); |
ba599d4f DP |
671 | netxen_pinit_from_rom(adapter, 0); |
672 | msleep(1); | |
673 | } | |
567c6c4e | 674 | |
f98a9f69 | 675 | NXWR32(adapter, CRB_DMA_SHIFT, 0x55555555); |
567c6c4e DP |
676 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) |
677 | netxen_set_port_mode(adapter); | |
678 | ||
ba599d4f DP |
679 | netxen_load_firmware(adapter); |
680 | ||
681 | if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { | |
682 | ||
683 | /* Initialize multicast addr pool owners */ | |
684 | val = 0x7654; | |
1e2d0059 | 685 | if (adapter->ahw.port_type == NETXEN_NIC_XGBE) |
ba599d4f | 686 | val |= 0x0f000000; |
f98a9f69 | 687 | NXWR32(adapter, NETXEN_MAC_ADDR_CNTL_REG, val); |
ba599d4f DP |
688 | |
689 | } | |
690 | ||
691 | err = netxen_initialize_adapter_offload(adapter); | |
692 | if (err) | |
693 | return err; | |
694 | ||
695 | /* | |
696 | * Tell the hardware our version number. | |
697 | */ | |
698 | val = (_NETXEN_NIC_LINUX_MAJOR << 16) | |
699 | | ((_NETXEN_NIC_LINUX_MINOR << 8)) | |
700 | | (_NETXEN_NIC_LINUX_SUBVERSION); | |
f98a9f69 | 701 | NXWR32(adapter, CRB_DRIVER_VERSION, val); |
ba599d4f DP |
702 | |
703 | /* Handshake with the card before we register the devices. */ | |
704 | err = netxen_phantom_init(adapter, NETXEN_NIC_PEG_TUNE); | |
705 | if (err) { | |
706 | netxen_free_adapter_offload(adapter); | |
707 | return err; | |
708 | } | |
709 | ||
710 | return 0; | |
711 | } | |
712 | ||
9f5bc7f1 DP |
713 | static int |
714 | netxen_nic_request_irq(struct netxen_adapter *adapter) | |
715 | { | |
716 | irq_handler_t handler; | |
d8b100c5 DP |
717 | struct nx_host_sds_ring *sds_ring; |
718 | int err, ring; | |
719 | ||
9f5bc7f1 DP |
720 | unsigned long flags = IRQF_SAMPLE_RANDOM; |
721 | struct net_device *netdev = adapter->netdev; | |
d8b100c5 | 722 | struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; |
9f5bc7f1 | 723 | |
9f5bc7f1 DP |
724 | if (adapter->flags & NETXEN_NIC_MSIX_ENABLED) |
725 | handler = netxen_msix_intr; | |
726 | else if (adapter->flags & NETXEN_NIC_MSI_ENABLED) | |
727 | handler = netxen_msi_intr; | |
728 | else { | |
729 | flags |= IRQF_SHARED; | |
730 | handler = netxen_intr; | |
731 | } | |
732 | adapter->irq = netdev->irq; | |
733 | ||
d8b100c5 DP |
734 | for (ring = 0; ring < adapter->max_sds_rings; ring++) { |
735 | sds_ring = &recv_ctx->sds_rings[ring]; | |
736 | sprintf(sds_ring->name, "%16s[%d]", netdev->name, ring); | |
737 | err = request_irq(sds_ring->irq, handler, | |
738 | flags, sds_ring->name, sds_ring); | |
739 | if (err) | |
740 | return err; | |
741 | } | |
742 | ||
743 | return 0; | |
744 | } | |
745 | ||
746 | static void | |
747 | netxen_nic_free_irq(struct netxen_adapter *adapter) | |
748 | { | |
749 | int ring; | |
750 | struct nx_host_sds_ring *sds_ring; | |
751 | ||
752 | struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; | |
753 | ||
754 | for (ring = 0; ring < adapter->max_sds_rings; ring++) { | |
755 | sds_ring = &recv_ctx->sds_rings[ring]; | |
756 | free_irq(sds_ring->irq, sds_ring); | |
757 | } | |
9f5bc7f1 DP |
758 | } |
759 | ||
760 | static int | |
761 | netxen_nic_up(struct netxen_adapter *adapter, struct net_device *netdev) | |
762 | { | |
763 | int err; | |
764 | ||
765 | err = adapter->init_port(adapter, adapter->physical_port); | |
766 | if (err) { | |
767 | printk(KERN_ERR "%s: Failed to initialize port %d\n", | |
768 | netxen_nic_driver_name, adapter->portnum); | |
769 | return err; | |
770 | } | |
771 | adapter->macaddr_set(adapter, netdev->dev_addr); | |
772 | ||
773 | netxen_nic_set_link_parameters(adapter); | |
774 | ||
775 | netxen_set_multicast_list(netdev); | |
776 | if (adapter->set_mtu) | |
777 | adapter->set_mtu(adapter, netdev->mtu); | |
778 | ||
779 | adapter->ahw.linkup = 0; | |
780 | mod_timer(&adapter->watchdog_timer, jiffies); | |
781 | ||
d8b100c5 DP |
782 | netxen_napi_enable(adapter); |
783 | ||
784 | if (adapter->max_sds_rings > 1) | |
785 | netxen_config_rss(adapter, 1); | |
9f5bc7f1 | 786 | |
3bf26ce3 DP |
787 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) |
788 | netxen_linkevent_request(adapter, 1); | |
789 | ||
9f5bc7f1 DP |
790 | return 0; |
791 | } | |
792 | ||
793 | static void | |
794 | netxen_nic_down(struct netxen_adapter *adapter, struct net_device *netdev) | |
795 | { | |
796 | netif_carrier_off(netdev); | |
797 | netif_stop_queue(netdev); | |
d8b100c5 | 798 | netxen_napi_disable(adapter); |
9f5bc7f1 DP |
799 | |
800 | if (adapter->stop_port) | |
801 | adapter->stop_port(adapter); | |
802 | ||
9f5bc7f1 DP |
803 | netxen_release_tx_buffers(adapter); |
804 | ||
805 | FLUSH_SCHEDULED_WORK(); | |
806 | del_timer_sync(&adapter->watchdog_timer); | |
807 | } | |
808 | ||
809 | ||
810 | static int | |
811 | netxen_nic_attach(struct netxen_adapter *adapter) | |
812 | { | |
813 | struct net_device *netdev = adapter->netdev; | |
814 | struct pci_dev *pdev = adapter->pdev; | |
becf46a0 | 815 | int err, ring; |
d8b100c5 | 816 | struct nx_host_rds_ring *rds_ring; |
d877f1e3 | 817 | struct nx_host_tx_ring *tx_ring; |
9f5bc7f1 DP |
818 | |
819 | err = netxen_init_firmware(adapter); | |
820 | if (err != 0) { | |
821 | printk(KERN_ERR "Failed to init firmware\n"); | |
822 | return -EIO; | |
823 | } | |
824 | ||
825 | if (adapter->fw_major < 4) | |
826 | adapter->max_rds_rings = 3; | |
827 | else | |
828 | adapter->max_rds_rings = 2; | |
829 | ||
830 | err = netxen_alloc_sw_resources(adapter); | |
831 | if (err) { | |
832 | printk(KERN_ERR "%s: Error in setting sw resources\n", | |
833 | netdev->name); | |
834 | return err; | |
835 | } | |
836 | ||
837 | netxen_nic_clear_stats(adapter); | |
838 | ||
839 | err = netxen_alloc_hw_resources(adapter); | |
840 | if (err) { | |
841 | printk(KERN_ERR "%s: Error in setting hw resources\n", | |
842 | netdev->name); | |
843 | goto err_out_free_sw; | |
844 | } | |
845 | ||
846 | if (adapter->fw_major < 4) { | |
d877f1e3 DP |
847 | tx_ring = &adapter->tx_ring; |
848 | tx_ring->crb_cmd_producer = crb_cmd_producer[adapter->portnum]; | |
849 | tx_ring->crb_cmd_consumer = crb_cmd_consumer[adapter->portnum]; | |
9f5bc7f1 | 850 | |
d877f1e3 DP |
851 | netxen_nic_update_cmd_producer(adapter, tx_ring, 0); |
852 | netxen_nic_update_cmd_consumer(adapter, tx_ring, 0); | |
9f5bc7f1 DP |
853 | } |
854 | ||
d8b100c5 DP |
855 | for (ring = 0; ring < adapter->max_rds_rings; ring++) { |
856 | rds_ring = &adapter->recv_ctx.rds_rings[ring]; | |
857 | netxen_post_rx_buffers(adapter, ring, rds_ring); | |
858 | } | |
9f5bc7f1 DP |
859 | |
860 | err = netxen_nic_request_irq(adapter); | |
861 | if (err) { | |
862 | dev_err(&pdev->dev, "%s: failed to setup interrupt\n", | |
863 | netdev->name); | |
864 | goto err_out_free_rxbuf; | |
865 | } | |
866 | ||
867 | adapter->is_up = NETXEN_ADAPTER_UP_MAGIC; | |
868 | return 0; | |
869 | ||
870 | err_out_free_rxbuf: | |
871 | netxen_release_rx_buffers(adapter); | |
872 | netxen_free_hw_resources(adapter); | |
873 | err_out_free_sw: | |
874 | netxen_free_sw_resources(adapter); | |
875 | return err; | |
876 | } | |
877 | ||
878 | static void | |
879 | netxen_nic_detach(struct netxen_adapter *adapter) | |
880 | { | |
d8b100c5 | 881 | netxen_nic_free_irq(adapter); |
9f5bc7f1 DP |
882 | |
883 | netxen_release_rx_buffers(adapter); | |
884 | netxen_free_hw_resources(adapter); | |
885 | netxen_free_sw_resources(adapter); | |
886 | ||
887 | adapter->is_up = 0; | |
888 | } | |
889 | ||
3d396eb1 AK |
890 | static int __devinit |
891 | netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |
892 | { | |
893 | struct net_device *netdev = NULL; | |
894 | struct netxen_adapter *adapter = NULL; | |
2956640d | 895 | int i = 0, err; |
3176ff3e | 896 | int pci_func_id = PCI_FUNC(pdev->devfn); |
2956640d | 897 | uint8_t revision_id; |
3d396eb1 | 898 | |
3176ff3e | 899 | if (pdev->class != 0x020000) { |
dcd56fdb | 900 | printk(KERN_DEBUG "NetXen function %d, class %x will not " |
3176ff3e | 901 | "be enabled.\n",pci_func_id, pdev->class); |
ed25ffa1 AK |
902 | return -ENODEV; |
903 | } | |
2956640d | 904 | |
11d89d63 DP |
905 | if (pdev->revision >= NX_P3_A0 && pdev->revision < NX_P3_B1) { |
906 | printk(KERN_WARNING "NetXen chip revisions between 0x%x-0x%x" | |
907 | "will not be enabled.\n", | |
908 | NX_P3_A0, NX_P3_B1); | |
909 | return -ENODEV; | |
910 | } | |
911 | ||
3d396eb1 AK |
912 | if ((err = pci_enable_device(pdev))) |
913 | return err; | |
2956640d | 914 | |
3d396eb1 AK |
915 | if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { |
916 | err = -ENODEV; | |
917 | goto err_out_disable_pdev; | |
918 | } | |
919 | ||
920 | if ((err = pci_request_regions(pdev, netxen_nic_driver_name))) | |
921 | goto err_out_disable_pdev; | |
922 | ||
923 | pci_set_master(pdev); | |
3176ff3e MT |
924 | |
925 | netdev = alloc_etherdev(sizeof(struct netxen_adapter)); | |
926 | if(!netdev) { | |
927 | printk(KERN_ERR"%s: Failed to allocate memory for the " | |
928 | "device block.Check system memory resource" | |
929 | " usage.\n", netxen_nic_driver_name); | |
930 | goto err_out_free_res; | |
931 | } | |
932 | ||
3176ff3e MT |
933 | SET_NETDEV_DEV(netdev, &pdev->dev); |
934 | ||
4cf1653a | 935 | adapter = netdev_priv(netdev); |
2956640d DP |
936 | adapter->netdev = netdev; |
937 | adapter->pdev = pdev; | |
13ba9c77 | 938 | adapter->ahw.pci_func = pci_func_id; |
2956640d DP |
939 | |
940 | revision_id = pdev->revision; | |
941 | adapter->ahw.revision_id = revision_id; | |
942 | ||
943 | err = nx_set_dma_mask(adapter, revision_id); | |
944 | if (err) | |
945 | goto err_out_free_netdev; | |
946 | ||
3ce06a32 | 947 | rwlock_init(&adapter->adapter_lock); |
d8b100c5 | 948 | spin_lock_init(&adapter->tx_clean_lock); |
3ce06a32 | 949 | |
97daee83 DP |
950 | err = netxen_setup_pci_map(adapter); |
951 | if (err) | |
6c80b18d | 952 | goto err_out_free_netdev; |
3d396eb1 | 953 | |
2d1a3bbd | 954 | /* This will be reset for mezz cards */ |
3176ff3e | 955 | adapter->portnum = pci_func_id; |
200eef20 | 956 | adapter->rx_csum = 1; |
623621b0 | 957 | adapter->mc_enabled = 0; |
83821a07 | 958 | if (NX_IS_REVISION_P3(revision_id)) |
2956640d | 959 | adapter->max_mc_count = 38; |
83821a07 | 960 | else |
2956640d | 961 | adapter->max_mc_count = 16; |
3176ff3e | 962 | |
1abd266f | 963 | netdev->netdev_ops = &netxen_netdev_ops; |
05aaa02d | 964 | netdev->watchdog_timeo = 2*HZ; |
3176ff3e MT |
965 | |
966 | netxen_nic_change_mtu(netdev, netdev->mtu); | |
967 | ||
968 | SET_ETHTOOL_OPS(netdev, &netxen_nic_ethtool_ops); | |
1abd266f | 969 | |
cdff1036 DP |
970 | netdev->features |= (NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO); |
971 | netdev->vlan_features |= (NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO); | |
972 | ||
cd1f8160 | 973 | if (NX_IS_REVISION_P3(revision_id)) { |
cdff1036 DP |
974 | netdev->features |= (NETIF_F_IPV6_CSUM | NETIF_F_TSO6); |
975 | netdev->vlan_features |= (NETIF_F_IPV6_CSUM | NETIF_F_TSO6); | |
cd1f8160 | 976 | } |
3176ff3e | 977 | |
cdff1036 | 978 | if (adapter->pci_using_dac) { |
3176ff3e | 979 | netdev->features |= NETIF_F_HIGHDMA; |
cdff1036 DP |
980 | netdev->vlan_features |= NETIF_F_HIGHDMA; |
981 | } | |
3176ff3e | 982 | |
dcd56fdb DP |
983 | if (netxen_nic_get_board_info(adapter) != 0) { |
984 | printk("%s: Error getting board config info.\n", | |
2956640d | 985 | netxen_nic_driver_name); |
dcd56fdb DP |
986 | err = -EIO; |
987 | goto err_out_iounmap; | |
988 | } | |
6c80b18d | 989 | |
6c80b18d MT |
990 | netxen_initialize_adapter_ops(adapter); |
991 | ||
13ba9c77 | 992 | /* Mezz cards have PCI function 0,2,3 enabled */ |
1e2d0059 | 993 | switch (adapter->ahw.board_type) { |
dc515f2e DP |
994 | case NETXEN_BRDTYPE_P2_SB31_10G_IMEZ: |
995 | case NETXEN_BRDTYPE_P2_SB31_10G_HMEZ: | |
996 | if (pci_func_id >= 2) | |
13ba9c77 | 997 | adapter->portnum = pci_func_id - 2; |
dc515f2e DP |
998 | break; |
999 | default: | |
1000 | break; | |
1001 | } | |
13ba9c77 | 1002 | |
0b72e659 DP |
1003 | err = netxen_start_firmware(adapter); |
1004 | if (err) | |
1005 | goto err_out_iounmap; | |
2956640d | 1006 | |
1f434f63 DP |
1007 | nx_update_dma_mask(adapter); |
1008 | ||
1e2d0059 | 1009 | netxen_nic_get_firmware_info(adapter); |
d9e651bc | 1010 | |
3d396eb1 | 1011 | /* |
6c80b18d | 1012 | * See if the firmware gave us a virtual-physical port mapping. |
3d396eb1 | 1013 | */ |
dcd56fdb | 1014 | adapter->physical_port = adapter->portnum; |
044fad0d | 1015 | if (adapter->fw_major < 4) { |
f98a9f69 | 1016 | i = NXRD32(adapter, CRB_V2P(adapter->portnum)); |
044fad0d DP |
1017 | if (i != 0x55555555) |
1018 | adapter->physical_port = i; | |
1019 | } | |
6c80b18d | 1020 | |
438627c7 | 1021 | netxen_check_options(adapter); |
2956640d | 1022 | |
97daee83 | 1023 | netxen_setup_intr(adapter); |
2956640d | 1024 | |
d8b100c5 DP |
1025 | netdev->irq = adapter->msix_entries[0].vector; |
1026 | ||
71dcddbd DP |
1027 | if (netxen_napi_add(adapter, netdev)) |
1028 | goto err_out_disable_msi; | |
2956640d | 1029 | |
2956640d | 1030 | init_timer(&adapter->watchdog_timer); |
2956640d DP |
1031 | adapter->watchdog_timer.function = &netxen_watchdog; |
1032 | adapter->watchdog_timer.data = (unsigned long)adapter; | |
1033 | INIT_WORK(&adapter->watchdog_task, netxen_watchdog_task); | |
1034 | INIT_WORK(&adapter->tx_timeout_task, netxen_tx_timeout_task); | |
1035 | ||
9dc28efe DP |
1036 | err = netxen_read_mac_addr(adapter); |
1037 | if (err) | |
1038 | dev_warn(&pdev->dev, "failed to read mac addr\n"); | |
2956640d | 1039 | |
3176ff3e MT |
1040 | netif_carrier_off(netdev); |
1041 | netif_stop_queue(netdev); | |
1042 | ||
6c80b18d MT |
1043 | if ((err = register_netdev(netdev))) { |
1044 | printk(KERN_ERR "%s: register_netdev failed port #%d" | |
1045 | " aborting\n", netxen_nic_driver_name, | |
1046 | adapter->portnum); | |
1047 | err = -EIO; | |
2956640d | 1048 | goto err_out_disable_msi; |
6c80b18d MT |
1049 | } |
1050 | ||
1051 | pci_set_drvdata(pdev, adapter); | |
3d396eb1 | 1052 | |
1e2d0059 | 1053 | switch (adapter->ahw.port_type) { |
2956640d DP |
1054 | case NETXEN_NIC_GBE: |
1055 | dev_info(&adapter->pdev->dev, "%s: GbE port initialized\n", | |
1056 | adapter->netdev->name); | |
1057 | break; | |
1058 | case NETXEN_NIC_XGBE: | |
1059 | dev_info(&adapter->pdev->dev, "%s: XGbE port initialized\n", | |
1060 | adapter->netdev->name); | |
1061 | break; | |
3d396eb1 | 1062 | } |
3d396eb1 | 1063 | |
2956640d DP |
1064 | return 0; |
1065 | ||
1066 | err_out_disable_msi: | |
97daee83 | 1067 | netxen_teardown_intr(adapter); |
6c80b18d | 1068 | |
0b72e659 | 1069 | netxen_free_adapter_offload(adapter); |
3d396eb1 | 1070 | |
2956640d | 1071 | err_out_iounmap: |
97daee83 | 1072 | netxen_cleanup_pci_map(adapter); |
cb8011ad | 1073 | |
6c80b18d MT |
1074 | err_out_free_netdev: |
1075 | free_netdev(netdev); | |
1076 | ||
1077 | err_out_free_res: | |
3d396eb1 | 1078 | pci_release_regions(pdev); |
6c80b18d MT |
1079 | |
1080 | err_out_disable_pdev: | |
2956640d | 1081 | pci_set_drvdata(pdev, NULL); |
3d396eb1 AK |
1082 | pci_disable_device(pdev); |
1083 | return err; | |
1084 | } | |
1085 | ||
1086 | static void __devexit netxen_nic_remove(struct pci_dev *pdev) | |
1087 | { | |
1088 | struct netxen_adapter *adapter; | |
3176ff3e | 1089 | struct net_device *netdev; |
3d396eb1 | 1090 | |
6c80b18d | 1091 | adapter = pci_get_drvdata(pdev); |
3d396eb1 AK |
1092 | if (adapter == NULL) |
1093 | return; | |
1094 | ||
6c80b18d MT |
1095 | netdev = adapter->netdev; |
1096 | ||
96acb6eb DP |
1097 | unregister_netdev(netdev); |
1098 | ||
96acb6eb | 1099 | if (adapter->is_up == NETXEN_ADAPTER_UP_MAGIC) { |
9f5bc7f1 | 1100 | netxen_nic_detach(adapter); |
06e9d9f9 DP |
1101 | |
1102 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) | |
1103 | netxen_p3_free_mac_list(adapter); | |
96acb6eb | 1104 | } |
3d396eb1 | 1105 | |
439b454e DP |
1106 | if (adapter->portnum == 0) |
1107 | netxen_free_adapter_offload(adapter); | |
96acb6eb | 1108 | |
97daee83 | 1109 | netxen_teardown_intr(adapter); |
71dcddbd | 1110 | netxen_free_sds_rings(&adapter->recv_ctx); |
3052246c | 1111 | |
97daee83 | 1112 | netxen_cleanup_pci_map(adapter); |
595e3fb8 MT |
1113 | |
1114 | pci_release_regions(pdev); | |
3052246c | 1115 | pci_disable_device(pdev); |
595e3fb8 MT |
1116 | pci_set_drvdata(pdev, NULL); |
1117 | ||
6c80b18d | 1118 | free_netdev(netdev); |
3d396eb1 AK |
1119 | } |
1120 | ||
0b72e659 DP |
1121 | static int |
1122 | netxen_nic_suspend(struct pci_dev *pdev, pm_message_t state) | |
1123 | { | |
1124 | ||
1125 | struct netxen_adapter *adapter = pci_get_drvdata(pdev); | |
1126 | struct net_device *netdev = adapter->netdev; | |
1127 | ||
1128 | netif_device_detach(netdev); | |
1129 | ||
1130 | if (netif_running(netdev)) | |
1131 | netxen_nic_down(adapter, netdev); | |
1132 | ||
1133 | if (adapter->is_up == NETXEN_ADAPTER_UP_MAGIC) | |
1134 | netxen_nic_detach(adapter); | |
1135 | ||
1136 | pci_save_state(pdev); | |
1137 | ||
1138 | if (netxen_nic_wol_supported(adapter)) { | |
1139 | pci_enable_wake(pdev, PCI_D3cold, 1); | |
1140 | pci_enable_wake(pdev, PCI_D3hot, 1); | |
1141 | } | |
1142 | ||
1143 | pci_disable_device(pdev); | |
1144 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | |
1145 | ||
1146 | return 0; | |
1147 | } | |
1148 | ||
1149 | static int | |
1150 | netxen_nic_resume(struct pci_dev *pdev) | |
1151 | { | |
1152 | struct netxen_adapter *adapter = pci_get_drvdata(pdev); | |
1153 | struct net_device *netdev = adapter->netdev; | |
1154 | int err; | |
1155 | ||
1156 | pci_set_power_state(pdev, PCI_D0); | |
1157 | pci_restore_state(pdev); | |
1158 | ||
1159 | err = pci_enable_device(pdev); | |
1160 | if (err) | |
1161 | return err; | |
1162 | ||
1163 | adapter->curr_window = 255; | |
1164 | ||
1165 | err = netxen_start_firmware(adapter); | |
1166 | if (err) { | |
1167 | dev_err(&pdev->dev, "failed to start firmware\n"); | |
1168 | return err; | |
1169 | } | |
1170 | ||
1171 | if (netif_running(netdev)) { | |
1172 | err = netxen_nic_attach(adapter); | |
1173 | if (err) | |
1174 | return err; | |
1175 | ||
1176 | err = netxen_nic_up(adapter, netdev); | |
1177 | if (err) | |
1178 | return err; | |
1179 | ||
1180 | netif_device_attach(netdev); | |
1181 | } | |
1182 | ||
1183 | return 0; | |
1184 | } | |
1185 | ||
3d396eb1 AK |
1186 | static int netxen_nic_open(struct net_device *netdev) |
1187 | { | |
4cf1653a | 1188 | struct netxen_adapter *adapter = netdev_priv(netdev); |
3d396eb1 | 1189 | int err = 0; |
3d396eb1 | 1190 | |
dcd56fdb DP |
1191 | if (adapter->driver_mismatch) |
1192 | return -EIO; | |
1193 | ||
3d396eb1 | 1194 | if (adapter->is_up != NETXEN_ADAPTER_UP_MAGIC) { |
9f5bc7f1 DP |
1195 | err = netxen_nic_attach(adapter); |
1196 | if (err) | |
3d396eb1 | 1197 | return err; |
ed25ffa1 | 1198 | } |
2956640d | 1199 | |
9f5bc7f1 DP |
1200 | err = netxen_nic_up(adapter, netdev); |
1201 | if (err) | |
1202 | goto err_out; | |
05aaa02d | 1203 | |
dcd56fdb | 1204 | netif_start_queue(netdev); |
3d396eb1 AK |
1205 | |
1206 | return 0; | |
2956640d | 1207 | |
9f5bc7f1 DP |
1208 | err_out: |
1209 | netxen_nic_detach(adapter); | |
2956640d | 1210 | return err; |
3d396eb1 AK |
1211 | } |
1212 | ||
1213 | /* | |
1214 | * netxen_nic_close - Disables a network interface entry point | |
1215 | */ | |
1216 | static int netxen_nic_close(struct net_device *netdev) | |
1217 | { | |
3176ff3e | 1218 | struct netxen_adapter *adapter = netdev_priv(netdev); |
3d396eb1 | 1219 | |
9f5bc7f1 | 1220 | netxen_nic_down(adapter, netdev); |
3d396eb1 AK |
1221 | return 0; |
1222 | } | |
1223 | ||
391587c3 | 1224 | static bool netxen_tso_check(struct net_device *netdev, |
cd1f8160 DP |
1225 | struct cmd_desc_type0 *desc, struct sk_buff *skb) |
1226 | { | |
391587c3 DP |
1227 | bool tso = false; |
1228 | u8 opcode = TX_ETHER_PKT; | |
cdff1036 DP |
1229 | __be16 protocol = skb->protocol; |
1230 | u16 flags = 0; | |
1231 | ||
09640e63 | 1232 | if (protocol == cpu_to_be16(ETH_P_8021Q)) { |
cdff1036 DP |
1233 | struct vlan_ethhdr *vh = (struct vlan_ethhdr *)skb->data; |
1234 | protocol = vh->h_vlan_encapsulated_proto; | |
1235 | flags = FLAGS_VLAN_TAGGED; | |
1236 | } | |
cd1f8160 | 1237 | |
391587c3 DP |
1238 | if ((netdev->features & (NETIF_F_TSO | NETIF_F_TSO6)) && |
1239 | skb_shinfo(skb)->gso_size > 0) { | |
1240 | ||
1241 | desc->mss = cpu_to_le16(skb_shinfo(skb)->gso_size); | |
1242 | desc->total_hdr_length = | |
1243 | skb_transport_offset(skb) + tcp_hdrlen(skb); | |
1244 | ||
09640e63 | 1245 | opcode = (protocol == cpu_to_be16(ETH_P_IPV6)) ? |
391587c3 DP |
1246 | TX_TCP_LSO6 : TX_TCP_LSO; |
1247 | tso = true; | |
cd1f8160 DP |
1248 | |
1249 | } else if (skb->ip_summed == CHECKSUM_PARTIAL) { | |
391587c3 DP |
1250 | u8 l4proto; |
1251 | ||
09640e63 | 1252 | if (protocol == cpu_to_be16(ETH_P_IP)) { |
391587c3 DP |
1253 | l4proto = ip_hdr(skb)->protocol; |
1254 | ||
1255 | if (l4proto == IPPROTO_TCP) | |
1256 | opcode = TX_TCP_PKT; | |
1257 | else if(l4proto == IPPROTO_UDP) | |
1258 | opcode = TX_UDP_PKT; | |
09640e63 | 1259 | } else if (protocol == cpu_to_be16(ETH_P_IPV6)) { |
391587c3 DP |
1260 | l4proto = ipv6_hdr(skb)->nexthdr; |
1261 | ||
1262 | if (l4proto == IPPROTO_TCP) | |
1263 | opcode = TX_TCPV6_PKT; | |
1264 | else if(l4proto == IPPROTO_UDP) | |
1265 | opcode = TX_UDPV6_PKT; | |
1266 | } | |
cd1f8160 DP |
1267 | } |
1268 | desc->tcp_hdr_offset = skb_transport_offset(skb); | |
1269 | desc->ip_hdr_offset = skb_network_offset(skb); | |
cdff1036 | 1270 | netxen_set_tx_flags_opcode(desc, flags, opcode); |
391587c3 | 1271 | return tso; |
cd1f8160 DP |
1272 | } |
1273 | ||
6f703406 DP |
1274 | static void |
1275 | netxen_clean_tx_dma_mapping(struct pci_dev *pdev, | |
1276 | struct netxen_cmd_buffer *pbuf, int last) | |
1277 | { | |
1278 | int k; | |
1279 | struct netxen_skb_frag *buffrag; | |
1280 | ||
1281 | buffrag = &pbuf->frag_array[0]; | |
1282 | pci_unmap_single(pdev, buffrag->dma, | |
1283 | buffrag->length, PCI_DMA_TODEVICE); | |
1284 | ||
1285 | for (k = 1; k < last; k++) { | |
1286 | buffrag = &pbuf->frag_array[k]; | |
1287 | pci_unmap_page(pdev, buffrag->dma, | |
1288 | buffrag->length, PCI_DMA_TODEVICE); | |
1289 | } | |
1290 | } | |
1291 | ||
d32cc3d2 DP |
1292 | static inline void |
1293 | netxen_clear_cmddesc(u64 *desc) | |
1294 | { | |
1295 | int i; | |
1296 | for (i = 0; i < 8; i++) | |
1297 | desc[i] = 0ULL; | |
1298 | } | |
1299 | ||
1300 | static int | |
1301 | netxen_nic_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |
3d396eb1 | 1302 | { |
3176ff3e | 1303 | struct netxen_adapter *adapter = netdev_priv(netdev); |
d877f1e3 | 1304 | struct nx_host_tx_ring *tx_ring = &adapter->tx_ring; |
3d396eb1 | 1305 | unsigned int first_seg_len = skb->len - skb->data_len; |
391587c3 | 1306 | struct netxen_cmd_buffer *pbuf; |
3d396eb1 | 1307 | struct netxen_skb_frag *buffrag; |
391587c3 | 1308 | struct cmd_desc_type0 *hwdesc; |
6f703406 DP |
1309 | struct pci_dev *pdev = adapter->pdev; |
1310 | dma_addr_t temp_dma; | |
391587c3 | 1311 | int i, k; |
3d396eb1 | 1312 | |
ba53e6b4 | 1313 | u32 producer, consumer; |
391587c3 | 1314 | int frag_count, no_of_desc; |
d877f1e3 | 1315 | u32 num_txd = tx_ring->num_desc; |
391587c3 | 1316 | bool is_tso = false; |
3d396eb1 | 1317 | |
3d396eb1 AK |
1318 | frag_count = skb_shinfo(skb)->nr_frags + 1; |
1319 | ||
d877f1e3 | 1320 | /* 4 fragments per cmd des */ |
3d396eb1 | 1321 | no_of_desc = (frag_count + 3) >> 2; |
53a01e00 | 1322 | |
d877f1e3 | 1323 | producer = tx_ring->producer; |
ba53e6b4 | 1324 | smp_mb(); |
d877f1e3 | 1325 | consumer = tx_ring->sw_consumer; |
ba53e6b4 DP |
1326 | if ((no_of_desc+2) > find_diff_among(producer, consumer, num_txd)) { |
1327 | netif_stop_queue(netdev); | |
1328 | smp_mb(); | |
1329 | return NETDEV_TX_BUSY; | |
53a01e00 | 1330 | } |
3d396eb1 | 1331 | |
d877f1e3 | 1332 | hwdesc = &tx_ring->desc_head[producer]; |
d32cc3d2 | 1333 | netxen_clear_cmddesc((u64 *)hwdesc); |
d877f1e3 | 1334 | pbuf = &tx_ring->cmd_buf_arr[producer]; |
391587c3 DP |
1335 | |
1336 | is_tso = netxen_tso_check(netdev, hwdesc, skb); | |
1337 | ||
3d396eb1 | 1338 | pbuf->skb = skb; |
3d396eb1 | 1339 | pbuf->frag_count = frag_count; |
3d396eb1 | 1340 | buffrag = &pbuf->frag_array[0]; |
6f703406 | 1341 | temp_dma = pci_map_single(pdev, skb->data, first_seg_len, |
3d396eb1 | 1342 | PCI_DMA_TODEVICE); |
6f703406 DP |
1343 | if (pci_dma_mapping_error(pdev, temp_dma)) |
1344 | goto drop_packet; | |
1345 | ||
1346 | buffrag->dma = temp_dma; | |
3d396eb1 | 1347 | buffrag->length = first_seg_len; |
391587c3 DP |
1348 | netxen_set_tx_frags_len(hwdesc, frag_count, skb->len); |
1349 | netxen_set_tx_port(hwdesc, adapter->portnum); | |
3d396eb1 | 1350 | |
d32cc3d2 | 1351 | hwdesc->buffer_length[0] = cpu_to_le16(first_seg_len); |
3d396eb1 AK |
1352 | hwdesc->addr_buffer1 = cpu_to_le64(buffrag->dma); |
1353 | ||
1354 | for (i = 1, k = 1; i < frag_count; i++, k++) { | |
1355 | struct skb_frag_struct *frag; | |
1356 | int len, temp_len; | |
1357 | unsigned long offset; | |
3d396eb1 AK |
1358 | |
1359 | /* move to next desc. if there is a need */ | |
1360 | if ((i & 0x3) == 0) { | |
1361 | k = 0; | |
ba53e6b4 | 1362 | producer = get_next_index(producer, num_txd); |
d877f1e3 | 1363 | hwdesc = &tx_ring->desc_head[producer]; |
d32cc3d2 | 1364 | netxen_clear_cmddesc((u64 *)hwdesc); |
d877f1e3 | 1365 | pbuf = &tx_ring->cmd_buf_arr[producer]; |
53a01e00 | 1366 | pbuf->skb = NULL; |
3d396eb1 AK |
1367 | } |
1368 | frag = &skb_shinfo(skb)->frags[i - 1]; | |
1369 | len = frag->size; | |
1370 | offset = frag->page_offset; | |
1371 | ||
1372 | temp_len = len; | |
6f703406 | 1373 | temp_dma = pci_map_page(pdev, frag->page, offset, |
3d396eb1 | 1374 | len, PCI_DMA_TODEVICE); |
6f703406 DP |
1375 | if (pci_dma_mapping_error(pdev, temp_dma)) { |
1376 | netxen_clean_tx_dma_mapping(pdev, pbuf, i); | |
1377 | goto drop_packet; | |
1378 | } | |
3d396eb1 AK |
1379 | |
1380 | buffrag++; | |
1381 | buffrag->dma = temp_dma; | |
1382 | buffrag->length = temp_len; | |
1383 | ||
d32cc3d2 | 1384 | hwdesc->buffer_length[k] = cpu_to_le16(temp_len); |
3d396eb1 AK |
1385 | switch (k) { |
1386 | case 0: | |
3d396eb1 AK |
1387 | hwdesc->addr_buffer1 = cpu_to_le64(temp_dma); |
1388 | break; | |
1389 | case 1: | |
3d396eb1 AK |
1390 | hwdesc->addr_buffer2 = cpu_to_le64(temp_dma); |
1391 | break; | |
1392 | case 2: | |
3d396eb1 AK |
1393 | hwdesc->addr_buffer3 = cpu_to_le64(temp_dma); |
1394 | break; | |
1395 | case 3: | |
3d396eb1 AK |
1396 | hwdesc->addr_buffer4 = cpu_to_le64(temp_dma); |
1397 | break; | |
1398 | } | |
1399 | frag++; | |
1400 | } | |
ba53e6b4 | 1401 | producer = get_next_index(producer, num_txd); |
3d396eb1 | 1402 | |
3d396eb1 AK |
1403 | /* For LSO, we need to copy the MAC/IP/TCP headers into |
1404 | * the descriptor ring | |
1405 | */ | |
391587c3 | 1406 | if (is_tso) { |
3d396eb1 | 1407 | int hdr_len, first_hdr_len, more_hdr; |
391587c3 | 1408 | hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); |
ed25ffa1 AK |
1409 | if (hdr_len > (sizeof(struct cmd_desc_type0) - 2)) { |
1410 | first_hdr_len = sizeof(struct cmd_desc_type0) - 2; | |
3d396eb1 AK |
1411 | more_hdr = 1; |
1412 | } else { | |
1413 | first_hdr_len = hdr_len; | |
1414 | more_hdr = 0; | |
1415 | } | |
1416 | /* copy the MAC/IP/TCP headers to the cmd descriptor list */ | |
d877f1e3 DP |
1417 | hwdesc = &tx_ring->desc_head[producer]; |
1418 | pbuf = &tx_ring->cmd_buf_arr[producer]; | |
53a01e00 | 1419 | pbuf->skb = NULL; |
3d396eb1 AK |
1420 | |
1421 | /* copy the first 64 bytes */ | |
ed25ffa1 | 1422 | memcpy(((void *)hwdesc) + 2, |
3d396eb1 | 1423 | (void *)(skb->data), first_hdr_len); |
ba53e6b4 | 1424 | producer = get_next_index(producer, num_txd); |
3d396eb1 AK |
1425 | |
1426 | if (more_hdr) { | |
d877f1e3 DP |
1427 | hwdesc = &tx_ring->desc_head[producer]; |
1428 | pbuf = &tx_ring->cmd_buf_arr[producer]; | |
53a01e00 | 1429 | pbuf->skb = NULL; |
3d396eb1 AK |
1430 | /* copy the next 64 bytes - should be enough except |
1431 | * for pathological case | |
1432 | */ | |
d626f62b ACM |
1433 | skb_copy_from_linear_data_offset(skb, first_hdr_len, |
1434 | hwdesc, | |
1435 | (hdr_len - | |
1436 | first_hdr_len)); | |
ba53e6b4 | 1437 | producer = get_next_index(producer, num_txd); |
3d396eb1 AK |
1438 | } |
1439 | } | |
6c80b18d | 1440 | |
d877f1e3 | 1441 | tx_ring->producer = producer; |
5dc16268 | 1442 | adapter->stats.txbytes += skb->len; |
6c80b18d | 1443 | |
d877f1e3 | 1444 | netxen_nic_update_cmd_producer(adapter, tx_ring, producer); |
3d396eb1 | 1445 | |
ba53e6b4 | 1446 | adapter->stats.xmitcalled++; |
3d396eb1 AK |
1447 | netdev->trans_start = jiffies; |
1448 | ||
3d396eb1 | 1449 | return NETDEV_TX_OK; |
6f703406 DP |
1450 | |
1451 | drop_packet: | |
1452 | adapter->stats.txdropped++; | |
1453 | dev_kfree_skb_any(skb); | |
1454 | return NETDEV_TX_OK; | |
3d396eb1 AK |
1455 | } |
1456 | ||
a97342f9 DP |
1457 | static int netxen_nic_check_temp(struct netxen_adapter *adapter) |
1458 | { | |
1459 | struct net_device *netdev = adapter->netdev; | |
1460 | uint32_t temp, temp_state, temp_val; | |
1461 | int rv = 0; | |
1462 | ||
f98a9f69 | 1463 | temp = NXRD32(adapter, CRB_TEMP_STATE); |
a97342f9 DP |
1464 | |
1465 | temp_state = nx_get_temp_state(temp); | |
1466 | temp_val = nx_get_temp_val(temp); | |
1467 | ||
1468 | if (temp_state == NX_TEMP_PANIC) { | |
1469 | printk(KERN_ALERT | |
1470 | "%s: Device temperature %d degrees C exceeds" | |
1471 | " maximum allowed. Hardware has been shut down.\n", | |
1472 | netxen_nic_driver_name, temp_val); | |
1473 | ||
1474 | netif_carrier_off(netdev); | |
1475 | netif_stop_queue(netdev); | |
1476 | rv = 1; | |
1477 | } else if (temp_state == NX_TEMP_WARN) { | |
1478 | if (adapter->temp == NX_TEMP_NORMAL) { | |
1479 | printk(KERN_ALERT | |
1480 | "%s: Device temperature %d degrees C " | |
1481 | "exceeds operating range." | |
1482 | " Immediate action needed.\n", | |
1483 | netxen_nic_driver_name, temp_val); | |
1484 | } | |
1485 | } else { | |
1486 | if (adapter->temp == NX_TEMP_WARN) { | |
1487 | printk(KERN_INFO | |
1488 | "%s: Device temperature is now %d degrees C" | |
1489 | " in normal range.\n", netxen_nic_driver_name, | |
1490 | temp_val); | |
1491 | } | |
1492 | } | |
1493 | adapter->temp = temp_state; | |
1494 | return rv; | |
1495 | } | |
1496 | ||
3bf26ce3 | 1497 | void netxen_advert_link_change(struct netxen_adapter *adapter, int linkup) |
a97342f9 DP |
1498 | { |
1499 | struct net_device *netdev = adapter->netdev; | |
a97342f9 DP |
1500 | |
1501 | if (adapter->ahw.linkup && !linkup) { | |
1502 | printk(KERN_INFO "%s: %s NIC Link is down\n", | |
1503 | netxen_nic_driver_name, netdev->name); | |
1504 | adapter->ahw.linkup = 0; | |
1505 | if (netif_running(netdev)) { | |
1506 | netif_carrier_off(netdev); | |
1507 | netif_stop_queue(netdev); | |
1508 | } | |
c7860a2a | 1509 | |
3bf26ce3 DP |
1510 | if (!adapter->has_link_events) |
1511 | netxen_nic_set_link_parameters(adapter); | |
1512 | ||
a97342f9 DP |
1513 | } else if (!adapter->ahw.linkup && linkup) { |
1514 | printk(KERN_INFO "%s: %s NIC Link is up\n", | |
1515 | netxen_nic_driver_name, netdev->name); | |
1516 | adapter->ahw.linkup = 1; | |
1517 | if (netif_running(netdev)) { | |
1518 | netif_carrier_on(netdev); | |
1519 | netif_wake_queue(netdev); | |
1520 | } | |
c7860a2a | 1521 | |
3bf26ce3 DP |
1522 | if (!adapter->has_link_events) |
1523 | netxen_nic_set_link_parameters(adapter); | |
a97342f9 DP |
1524 | } |
1525 | } | |
1526 | ||
3bf26ce3 DP |
1527 | static void netxen_nic_handle_phy_intr(struct netxen_adapter *adapter) |
1528 | { | |
1529 | u32 val, port, linkup; | |
1530 | ||
1531 | port = adapter->physical_port; | |
1532 | ||
1533 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { | |
f98a9f69 | 1534 | val = NXRD32(adapter, CRB_XG_STATE_P3); |
3bf26ce3 DP |
1535 | val = XG_LINK_STATE_P3(adapter->ahw.pci_func, val); |
1536 | linkup = (val == XG_LINK_UP_P3); | |
1537 | } else { | |
f98a9f69 | 1538 | val = NXRD32(adapter, CRB_XG_STATE); |
3bf26ce3 DP |
1539 | if (adapter->ahw.port_type == NETXEN_NIC_GBE) |
1540 | linkup = (val >> port) & 1; | |
1541 | else { | |
1542 | val = (val >> port*8) & 0xff; | |
1543 | linkup = (val == XG_LINK_UP); | |
1544 | } | |
1545 | } | |
1546 | ||
1547 | netxen_advert_link_change(adapter, linkup); | |
1548 | } | |
1549 | ||
3d396eb1 AK |
1550 | static void netxen_watchdog(unsigned long v) |
1551 | { | |
1552 | struct netxen_adapter *adapter = (struct netxen_adapter *)v; | |
ed25ffa1 AK |
1553 | |
1554 | SCHEDULE_WORK(&adapter->watchdog_task); | |
3d396eb1 AK |
1555 | } |
1556 | ||
a97342f9 DP |
1557 | void netxen_watchdog_task(struct work_struct *work) |
1558 | { | |
1559 | struct netxen_adapter *adapter = | |
1560 | container_of(work, struct netxen_adapter, watchdog_task); | |
1561 | ||
1562 | if ((adapter->portnum == 0) && netxen_nic_check_temp(adapter)) | |
1563 | return; | |
1564 | ||
3bf26ce3 DP |
1565 | if (!adapter->has_link_events) |
1566 | netxen_nic_handle_phy_intr(adapter); | |
a97342f9 | 1567 | |
922c4f2c DP |
1568 | if (netif_running(adapter->netdev)) |
1569 | mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); | |
a97342f9 DP |
1570 | } |
1571 | ||
3d396eb1 AK |
1572 | static void netxen_tx_timeout(struct net_device *netdev) |
1573 | { | |
3176ff3e MT |
1574 | struct netxen_adapter *adapter = (struct netxen_adapter *) |
1575 | netdev_priv(netdev); | |
1576 | SCHEDULE_WORK(&adapter->tx_timeout_task); | |
3d396eb1 AK |
1577 | } |
1578 | ||
6d5aefb8 | 1579 | static void netxen_tx_timeout_task(struct work_struct *work) |
3d396eb1 | 1580 | { |
4790654c | 1581 | struct netxen_adapter *adapter = |
3176ff3e | 1582 | container_of(work, struct netxen_adapter, tx_timeout_task); |
3d396eb1 AK |
1583 | |
1584 | printk(KERN_ERR "%s %s: transmit timeout, resetting.\n", | |
6c80b18d | 1585 | netxen_nic_driver_name, adapter->netdev->name); |
3d396eb1 | 1586 | |
d8b100c5 | 1587 | netxen_napi_disable(adapter); |
ba53e6b4 | 1588 | |
6c80b18d | 1589 | adapter->netdev->trans_start = jiffies; |
ba53e6b4 | 1590 | |
d8b100c5 | 1591 | netxen_napi_enable(adapter); |
6c80b18d | 1592 | netif_wake_queue(adapter->netdev); |
3d396eb1 AK |
1593 | } |
1594 | ||
a97342f9 DP |
1595 | struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev) |
1596 | { | |
1597 | struct netxen_adapter *adapter = netdev_priv(netdev); | |
1598 | struct net_device_stats *stats = &adapter->net_stats; | |
1599 | ||
1600 | memset(stats, 0, sizeof(*stats)); | |
1601 | ||
a97342f9 | 1602 | stats->rx_packets = adapter->stats.no_rcv; |
e98e3350 | 1603 | stats->tx_packets = adapter->stats.xmitfinished; |
a97342f9 | 1604 | stats->rx_bytes = adapter->stats.rxbytes; |
a97342f9 | 1605 | stats->tx_bytes = adapter->stats.txbytes; |
a97342f9 | 1606 | stats->rx_dropped = adapter->stats.rxdropped; |
a97342f9 DP |
1607 | stats->tx_dropped = adapter->stats.txdropped; |
1608 | ||
1609 | return stats; | |
1610 | } | |
1611 | ||
e4c93c81 | 1612 | static irqreturn_t netxen_intr(int irq, void *data) |
3d396eb1 | 1613 | { |
d8b100c5 DP |
1614 | struct nx_host_sds_ring *sds_ring = data; |
1615 | struct netxen_adapter *adapter = sds_ring->adapter; | |
d71e1be8 DP |
1616 | u32 status = 0; |
1617 | ||
1618 | status = adapter->pci_read_immediate(adapter, ISR_INT_VECTOR); | |
1619 | ||
1620 | if (!(status & adapter->legacy_intr.int_vec_bit)) | |
05aaa02d | 1621 | return IRQ_NONE; |
e01872af | 1622 | |
d71e1be8 DP |
1623 | if (adapter->ahw.revision_id >= NX_P3_B1) { |
1624 | /* check interrupt state machine, to be sure */ | |
1625 | status = adapter->pci_read_immediate(adapter, | |
1626 | ISR_INT_STATE_REG); | |
1627 | if (!ISR_LEGACY_INT_TRIGGERED(status)) | |
1628 | return IRQ_NONE; | |
1629 | ||
092bc571 DP |
1630 | } else { |
1631 | unsigned long our_int = 0; | |
d71e1be8 | 1632 | |
f98a9f69 | 1633 | our_int = NXRD32(adapter, CRB_INT_VECTOR); |
092bc571 | 1634 | |
d71e1be8 | 1635 | /* not our interrupt */ |
092bc571 | 1636 | if (!test_and_clear_bit((7 + adapter->portnum), &our_int)) |
d71e1be8 DP |
1637 | return IRQ_NONE; |
1638 | ||
092bc571 | 1639 | /* claim interrupt */ |
f98a9f69 | 1640 | NXWR32(adapter, CRB_INT_VECTOR, (our_int & 0xffffffff)); |
e01872af | 1641 | } |
1642 | ||
092bc571 DP |
1643 | /* clear interrupt */ |
1644 | if (adapter->fw_major < 4) | |
d8b100c5 | 1645 | netxen_nic_disable_int(sds_ring); |
092bc571 DP |
1646 | |
1647 | adapter->pci_write_immediate(adapter, | |
1648 | adapter->legacy_intr.tgt_status_reg, | |
1649 | 0xffffffff); | |
1650 | /* read twice to ensure write is flushed */ | |
1651 | adapter->pci_read_immediate(adapter, ISR_INT_VECTOR); | |
1652 | adapter->pci_read_immediate(adapter, ISR_INT_VECTOR); | |
1653 | ||
d8b100c5 | 1654 | napi_schedule(&sds_ring->napi); |
3d396eb1 AK |
1655 | |
1656 | return IRQ_HANDLED; | |
1657 | } | |
1658 | ||
e4c93c81 | 1659 | static irqreturn_t netxen_msi_intr(int irq, void *data) |
05aaa02d | 1660 | { |
d8b100c5 DP |
1661 | struct nx_host_sds_ring *sds_ring = data; |
1662 | struct netxen_adapter *adapter = sds_ring->adapter; | |
05aaa02d | 1663 | |
092bc571 DP |
1664 | /* clear interrupt */ |
1665 | adapter->pci_write_immediate(adapter, | |
1666 | msi_tgt_status[adapter->ahw.pci_func], 0xffffffff); | |
1667 | ||
d8b100c5 | 1668 | napi_schedule(&sds_ring->napi); |
05aaa02d DP |
1669 | return IRQ_HANDLED; |
1670 | } | |
1671 | ||
b3df68f8 DP |
1672 | static irqreturn_t netxen_msix_intr(int irq, void *data) |
1673 | { | |
d8b100c5 | 1674 | struct nx_host_sds_ring *sds_ring = data; |
b3df68f8 | 1675 | |
d8b100c5 | 1676 | napi_schedule(&sds_ring->napi); |
b3df68f8 DP |
1677 | return IRQ_HANDLED; |
1678 | } | |
1679 | ||
bea3348e | 1680 | static int netxen_nic_poll(struct napi_struct *napi, int budget) |
3d396eb1 | 1681 | { |
d8b100c5 DP |
1682 | struct nx_host_sds_ring *sds_ring = |
1683 | container_of(napi, struct nx_host_sds_ring, napi); | |
1684 | ||
1685 | struct netxen_adapter *adapter = sds_ring->adapter; | |
1686 | ||
05aaa02d | 1687 | int tx_complete; |
bea3348e | 1688 | int work_done; |
3d396eb1 | 1689 | |
05aaa02d | 1690 | tx_complete = netxen_process_cmd_ring(adapter); |
3d396eb1 | 1691 | |
d8b100c5 | 1692 | work_done = netxen_process_rcv_ring(sds_ring, budget); |
3d396eb1 | 1693 | |
05aaa02d | 1694 | if ((work_done < budget) && tx_complete) { |
d8b100c5 DP |
1695 | napi_complete(&sds_ring->napi); |
1696 | netxen_nic_enable_int(sds_ring); | |
3d396eb1 AK |
1697 | } |
1698 | ||
bea3348e | 1699 | return work_done; |
3d396eb1 AK |
1700 | } |
1701 | ||
1702 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
1703 | static void netxen_nic_poll_controller(struct net_device *netdev) | |
1704 | { | |
3176ff3e | 1705 | struct netxen_adapter *adapter = netdev_priv(netdev); |
3d396eb1 | 1706 | disable_irq(adapter->irq); |
1494a814 | 1707 | netxen_intr(adapter->irq, adapter); |
3d396eb1 AK |
1708 | enable_irq(adapter->irq); |
1709 | } | |
1710 | #endif | |
3d396eb1 AK |
1711 | |
1712 | static struct pci_driver netxen_driver = { | |
1713 | .name = netxen_nic_driver_name, | |
1714 | .id_table = netxen_pci_tbl, | |
1715 | .probe = netxen_nic_probe, | |
0b72e659 DP |
1716 | .remove = __devexit_p(netxen_nic_remove), |
1717 | .suspend = netxen_nic_suspend, | |
1718 | .resume = netxen_nic_resume | |
3d396eb1 AK |
1719 | }; |
1720 | ||
1721 | /* Driver Registration on NetXen card */ | |
1722 | ||
1723 | static int __init netxen_init_module(void) | |
1724 | { | |
ff4fbd43 DP |
1725 | printk(KERN_INFO "%s\n", netxen_nic_driver_string); |
1726 | ||
79ea13ce | 1727 | if ((netxen_workq = create_singlethread_workqueue("netxen")) == NULL) |
ed25ffa1 AK |
1728 | return -ENOMEM; |
1729 | ||
184231bd | 1730 | return pci_register_driver(&netxen_driver); |
3d396eb1 AK |
1731 | } |
1732 | ||
1733 | module_init(netxen_init_module); | |
1734 | ||
1735 | static void __exit netxen_exit_module(void) | |
1736 | { | |
3d396eb1 | 1737 | pci_unregister_driver(&netxen_driver); |
9de06610 | 1738 | destroy_workqueue(netxen_workq); |
3d396eb1 AK |
1739 | } |
1740 | ||
1741 | module_exit(netxen_exit_module); |