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pasemi_mac: Batch up TX buffer frees
[mirror_ubuntu-bionic-kernel.git] / drivers / net / pasemi_mac.c
CommitLineData
f5cd7872
OJ		 1/*
2 * Copyright (C) 2006-2007 PA Semi, Inc
3 *
4 * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/init.h>
21#include <linux/module.h>
22#include <linux/pci.h>
23#include <linux/interrupt.h>
24#include <linux/dmaengine.h>
25#include <linux/delay.h>
26#include <linux/netdevice.h>
27#include <linux/etherdevice.h>
28#include <asm/dma-mapping.h>
29#include <linux/in.h>
30#include <linux/skbuff.h>
31
32#include <linux/ip.h>
33#include <linux/tcp.h>
34#include <net/checksum.h>
35
771f7404
OJ		 36#include <asm/irq.h>
37
f5cd7872
OJ		 38#include "pasemi_mac.h"
39
40
41/* TODO list
42 *
43 * - Get rid of pci_{read,write}_config(), map registers with ioremap
44 * for performance
45 * - PHY support
46 * - Multicast support
47 * - Large MTU support
48 * - Other performance improvements
49 */
50
51
52/* Must be a power of two */
53#define RX_RING_SIZE 512
54#define TX_RING_SIZE 512
55
ceb51361
OJ		 56#define DEFAULT_MSG_ENABLE \
57 (NETIF_MSG_DRV | \
58 NETIF_MSG_PROBE | \
59 NETIF_MSG_LINK | \
60 NETIF_MSG_TIMER | \
61 NETIF_MSG_IFDOWN | \
62 NETIF_MSG_IFUP | \
63 NETIF_MSG_RX_ERR | \
64 NETIF_MSG_TX_ERR)
65
f5cd7872
OJ		 66#define TX_DESC(mac, num) ((mac)->tx->desc[(num) & (TX_RING_SIZE-1)])
67#define TX_DESC_INFO(mac, num) ((mac)->tx->desc_info[(num) & (TX_RING_SIZE-1)])
68#define RX_DESC(mac, num) ((mac)->rx->desc[(num) & (RX_RING_SIZE-1)])
69#define RX_DESC_INFO(mac, num) ((mac)->rx->desc_info[(num) & (RX_RING_SIZE-1)])
70#define RX_BUFF(mac, num) ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
71
72#define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
73
ceb51361
OJ		 74MODULE_LICENSE("GPL");
75MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
76MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
77
78static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
79module_param(debug, int, 0);
80MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
f5cd7872
OJ		 81
82static struct pasdma_status *dma_status;
83
a85b9422
OJ		 84static unsigned int read_iob_reg(struct pasemi_mac *mac, unsigned int reg)
85{
b6e05a1b 86 return in_le32(mac->iob_regs+reg);
a85b9422
OJ		 87}
88
89static void write_iob_reg(struct pasemi_mac *mac, unsigned int reg,
90 unsigned int val)
91{
b6e05a1b 92 out_le32(mac->iob_regs+reg, val);
a85b9422
OJ		 93}
94
95static unsigned int read_mac_reg(struct pasemi_mac *mac, unsigned int reg)
96{
b6e05a1b 97 return in_le32(mac->regs+reg);
a85b9422
OJ		 98}
99
100static void write_mac_reg(struct pasemi_mac *mac, unsigned int reg,
101 unsigned int val)
102{
b6e05a1b 103 out_le32(mac->regs+reg, val);
a85b9422
OJ		 104}
105
106static unsigned int read_dma_reg(struct pasemi_mac *mac, unsigned int reg)
107{
b6e05a1b 108 return in_le32(mac->dma_regs+reg);
a85b9422
OJ		 109}
110
111static void write_dma_reg(struct pasemi_mac *mac, unsigned int reg,
112 unsigned int val)
113{
b6e05a1b 114 out_le32(mac->dma_regs+reg, val);
a85b9422
OJ		 115}
116
f5cd7872
OJ		 117static int pasemi_get_mac_addr(struct pasemi_mac *mac)
118{
119 struct pci_dev *pdev = mac->pdev;
120 struct device_node *dn = pci_device_to_OF_node(pdev);
1af7f056 121 int len;
f5cd7872
OJ		 122 const u8 *maddr;
123 u8 addr[6];
124
125 if (!dn) {
126 dev_dbg(&pdev->dev,
127 "No device node for mac, not configuring\n");
128 return -ENOENT;
129 }
130
1af7f056 131 maddr = of_get_property(dn, "local-mac-address", &len);
132
133 if (maddr && len == 6) {
134 memcpy(mac->mac_addr, maddr, 6);
135 return 0;
136 }
137
138 /* Some old versions of firmware mistakenly uses mac-address
139 * (and as a string) instead of a byte array in local-mac-address.
140 */
a5fd22eb 141
a5fd22eb 142 if (maddr == NULL)
9028780a 143 maddr = of_get_property(dn, "mac-address", NULL);
a5fd22eb 144
f5cd7872
OJ		 145 if (maddr == NULL) {
146 dev_warn(&pdev->dev,
147 "no mac address in device tree, not configuring\n");
148 return -ENOENT;
149 }
150
1af7f056 151
f5cd7872
OJ		 152 if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
153 &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
154 dev_warn(&pdev->dev,
155 "can't parse mac address, not configuring\n");
156 return -EINVAL;
157 }
158
1af7f056 159 memcpy(mac->mac_addr, addr, 6);
160
f5cd7872
OJ		 161 return 0;
162}
163
164static int pasemi_mac_setup_rx_resources(struct net_device *dev)
165{
166 struct pasemi_mac_rxring *ring;
167 struct pasemi_mac *mac = netdev_priv(dev);
168 int chan_id = mac->dma_rxch;
169
170 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
171
172 if (!ring)
173 goto out_ring;
174
175 spin_lock_init(&ring->lock);
176
177 ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
178 RX_RING_SIZE, GFP_KERNEL);
179
180 if (!ring->desc_info)
181 goto out_desc_info;
182
183 /* Allocate descriptors */
184 ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
185 RX_RING_SIZE *
186 sizeof(struct pas_dma_xct_descr),
187 &ring->dma, GFP_KERNEL);
188
189 if (!ring->desc)
190 goto out_desc;
191
192 memset(ring->desc, 0, RX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
193
194 ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
195 RX_RING_SIZE * sizeof(u64),
196 &ring->buf_dma, GFP_KERNEL);
197 if (!ring->buffers)
198 goto out_buffers;
199
200 memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
201
a85b9422 202 write_dma_reg(mac, PAS_DMA_RXCHAN_BASEL(chan_id), PAS_DMA_RXCHAN_BASEL_BRBL(ring->dma));
f5cd7872 203
a85b9422
OJ		 204 write_dma_reg(mac, PAS_DMA_RXCHAN_BASEU(chan_id),
205 PAS_DMA_RXCHAN_BASEU_BRBH(ring->dma >> 32) |
206 PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 2));
f5cd7872 207
a85b9422 208 write_dma_reg(mac, PAS_DMA_RXCHAN_CFG(chan_id),
c0efd52b 209 PAS_DMA_RXCHAN_CFG_HBU(2));
f5cd7872 210
a85b9422
OJ		 211 write_dma_reg(mac, PAS_DMA_RXINT_BASEL(mac->dma_if),
212 PAS_DMA_RXINT_BASEL_BRBL(__pa(ring->buffers)));
f5cd7872 213
a85b9422
OJ		 214 write_dma_reg(mac, PAS_DMA_RXINT_BASEU(mac->dma_if),
215 PAS_DMA_RXINT_BASEU_BRBH(__pa(ring->buffers) >> 32) |
216 PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
f5cd7872 217
c0efd52b
OJ		 218 write_dma_reg(mac, PAS_DMA_RXINT_CFG(mac->dma_if),
219 PAS_DMA_RXINT_CFG_DHL(2));
220
f5cd7872
OJ		 221 ring->next_to_fill = 0;
222 ring->next_to_clean = 0;
223
224 snprintf(ring->irq_name, sizeof(ring->irq_name),
225 "%s rx", dev->name);
226 mac->rx = ring;
227
228 return 0;
229
230out_buffers:
231 dma_free_coherent(&mac->dma_pdev->dev,
232 RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
233 mac->rx->desc, mac->rx->dma);
234out_desc:
235 kfree(ring->desc_info);
236out_desc_info:
237 kfree(ring);
238out_ring:
239 return -ENOMEM;
240}
241
242
243static int pasemi_mac_setup_tx_resources(struct net_device *dev)
244{
245 struct pasemi_mac *mac = netdev_priv(dev);
246 u32 val;
247 int chan_id = mac->dma_txch;
248 struct pasemi_mac_txring *ring;
249
250 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
251 if (!ring)
252 goto out_ring;
253
254 spin_lock_init(&ring->lock);
255
256 ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
257 TX_RING_SIZE, GFP_KERNEL);
258 if (!ring->desc_info)
259 goto out_desc_info;
260
261 /* Allocate descriptors */
262 ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
263 TX_RING_SIZE *
264 sizeof(struct pas_dma_xct_descr),
265 &ring->dma, GFP_KERNEL);
266 if (!ring->desc)
267 goto out_desc;
268
269 memset(ring->desc, 0, TX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
270
a85b9422
OJ		 271 write_dma_reg(mac, PAS_DMA_TXCHAN_BASEL(chan_id),
272 PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma));
f5cd7872
OJ		 273 val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32);
274 val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 2);
275
a85b9422 276 write_dma_reg(mac, PAS_DMA_TXCHAN_BASEU(chan_id), val);
f5cd7872 277
a85b9422
OJ		 278 write_dma_reg(mac, PAS_DMA_TXCHAN_CFG(chan_id),
279 PAS_DMA_TXCHAN_CFG_TY_IFACE |
280 PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
281 PAS_DMA_TXCHAN_CFG_UP |
282 PAS_DMA_TXCHAN_CFG_WT(2));
f5cd7872
OJ		 283
284 ring->next_to_use = 0;
285 ring->next_to_clean = 0;
286
287 snprintf(ring->irq_name, sizeof(ring->irq_name),
288 "%s tx", dev->name);
289 mac->tx = ring;
290
291 return 0;
292
293out_desc:
294 kfree(ring->desc_info);
295out_desc_info:
296 kfree(ring);
297out_ring:
298 return -ENOMEM;
299}
300
301static void pasemi_mac_free_tx_resources(struct net_device *dev)
302{
303 struct pasemi_mac *mac = netdev_priv(dev);
304 unsigned int i;
305 struct pasemi_mac_buffer *info;
306 struct pas_dma_xct_descr *dp;
307
308 for (i = 0; i < TX_RING_SIZE; i++) {
309 info = &TX_DESC_INFO(mac, i);
310 dp = &TX_DESC(mac, i);
311 if (info->dma) {
312 if (info->skb) {
313 pci_unmap_single(mac->dma_pdev,
314 info->dma,
315 info->skb->len,
316 PCI_DMA_TODEVICE);
317 dev_kfree_skb_any(info->skb);
318 }
319 info->dma = 0;
320 info->skb = NULL;
321 dp->mactx = 0;
322 dp->ptr = 0;
323 }
324 }
325
326 dma_free_coherent(&mac->dma_pdev->dev,
327 TX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
328 mac->tx->desc, mac->tx->dma);
329
330 kfree(mac->tx->desc_info);
331 kfree(mac->tx);
332 mac->tx = NULL;
333}
334
335static void pasemi_mac_free_rx_resources(struct net_device *dev)
336{
337 struct pasemi_mac *mac = netdev_priv(dev);
338 unsigned int i;
339 struct pasemi_mac_buffer *info;
340 struct pas_dma_xct_descr *dp;
341
342 for (i = 0; i < RX_RING_SIZE; i++) {
343 info = &RX_DESC_INFO(mac, i);
344 dp = &RX_DESC(mac, i);
9f05cfe2
OJ		 345 if (info->skb) {
346 if (info->dma) {
f5cd7872
OJ		 347 pci_unmap_single(mac->dma_pdev,
348 info->dma,
349 info->skb->len,
350 PCI_DMA_FROMDEVICE);
351 dev_kfree_skb_any(info->skb);
352 }
353 info->dma = 0;
354 info->skb = NULL;
355 dp->macrx = 0;
356 dp->ptr = 0;
357 }
358 }
359
360 dma_free_coherent(&mac->dma_pdev->dev,
361 RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
362 mac->rx->desc, mac->rx->dma);
363
364 dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
365 mac->rx->buffers, mac->rx->buf_dma);
366
367 kfree(mac->rx->desc_info);
368 kfree(mac->rx);
369 mac->rx = NULL;
370}
371
372static void pasemi_mac_replenish_rx_ring(struct net_device *dev)
373{
374 struct pasemi_mac *mac = netdev_priv(dev);
375 unsigned int i;
376 int start = mac->rx->next_to_fill;
cd4ceb24 377 unsigned int limit, count;
f5cd7872 378
cd4ceb24 379 limit = (mac->rx->next_to_clean + RX_RING_SIZE -
f5cd7872
OJ		 380 mac->rx->next_to_fill) & (RX_RING_SIZE - 1);
381
382 /* Check to see if we're doing first-time setup */
383 if (unlikely(mac->rx->next_to_clean == 0 && mac->rx->next_to_fill == 0))
cd4ceb24 384 limit = RX_RING_SIZE;
f5cd7872 385
cd4ceb24 386 if (limit <= 0)
f5cd7872
OJ		 387 return;
388
cd4ceb24
OJ		 389 i = start;
390 for (count = limit; count; count--) {
f5cd7872
OJ		 391 struct pasemi_mac_buffer *info = &RX_DESC_INFO(mac, i);
392 u64 *buff = &RX_BUFF(mac, i);
393 struct sk_buff *skb;
394 dma_addr_t dma;
395
9f05cfe2
OJ		 396 /* skb might still be in there for recycle on short receives */
397 if (info->skb)
398 skb = info->skb;
399 else
400 skb = dev_alloc_skb(BUF_SIZE);
f5cd7872 401
9f05cfe2 402 if (unlikely(!skb))
f5cd7872 403 break;
f5cd7872 404
f5cd7872
OJ		 405 dma = pci_map_single(mac->dma_pdev, skb->data, skb->len,
406 PCI_DMA_FROMDEVICE);
407
cd4ceb24 408 if (unlikely(dma_mapping_error(dma))) {
f5cd7872 409 dev_kfree_skb_irq(info->skb);
f5cd7872
OJ		 410 break;
411 }
412
413 info->skb = skb;
414 info->dma = dma;
415 *buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
cd4ceb24 416 i++;
f5cd7872
OJ		 417 }
418
419 wmb();
420
a85b9422
OJ		 421 write_dma_reg(mac, PAS_DMA_RXCHAN_INCR(mac->dma_rxch), limit - count);
422 write_dma_reg(mac, PAS_DMA_RXINT_INCR(mac->dma_if), limit - count);
f5cd7872 423
cd4ceb24 424 mac->rx->next_to_fill += limit - count;
f5cd7872
OJ		 425}
426
1b0335ea
OJ		 427static void pasemi_mac_restart_rx_intr(struct pasemi_mac *mac)
428{
52a94351 429 unsigned int reg, pcnt;
1b0335ea
OJ		 430 /* Re-enable packet count interrupts: finally
431 * ack the packet count interrupt we got in rx_intr.
432 */
433
52a94351 434 pcnt = *mac->rx_status & PAS_STATUS_PCNT_M;
1b0335ea 435
52a94351 436 reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
1b0335ea 437
a85b9422 438 write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
1b0335ea
OJ		 439}
440
441static void pasemi_mac_restart_tx_intr(struct pasemi_mac *mac)
442{
52a94351 443 unsigned int reg, pcnt;
1b0335ea
OJ		 444
445 /* Re-enable packet count interrupts */
52a94351 446 pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
1b0335ea 447
52a94351 448 reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
1b0335ea 449
a85b9422 450 write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
1b0335ea
OJ		 451}
452
453
f5cd7872
OJ		 454static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
455{
cd4ceb24
OJ		 456 unsigned int n;
457 int count;
458 struct pas_dma_xct_descr *dp;
459 struct pasemi_mac_buffer *info;
460 struct sk_buff *skb;
461 unsigned int i, len;
462 u64 macrx;
463 dma_addr_t dma;
f5cd7872
OJ		 464
465 spin_lock(&mac->rx->lock);
466
cd4ceb24 467 n = mac->rx->next_to_clean;
f5cd7872 468
cd4ceb24 469 for (count = limit; count; count--) {
f5cd7872
OJ		 470
471 rmb();
472
cd4ceb24 473 dp = &RX_DESC(mac, n);
26fcfa95 474 prefetchw(dp);
cd4ceb24 475 macrx = dp->macrx;
f5cd7872 476
cd4ceb24 477 if (!(macrx & XCT_MACRX_O))
f5cd7872
OJ		 478 break;
479
f5cd7872
OJ		 480
481 info = NULL;
482
483 /* We have to scan for our skb since there's no way
484 * to back-map them from the descriptor, and if we
485 * have several receive channels then they might not
486 * show up in the same order as they were put on the
487 * interface ring.
488 */
489
490 dma = (dp->ptr & XCT_PTR_ADDR_M);
cd4ceb24
OJ		 491 for (i = n; i < (n + RX_RING_SIZE); i++) {
492 info = &RX_DESC_INFO(mac, i);
f5cd7872
OJ		 493 if (info->dma == dma)
494 break;
495 }
26fcfa95 496 prefetchw(info);
f5cd7872 497
9f05cfe2 498 skb = info->skb;
26fcfa95 499 prefetchw(skb);
cd4ceb24 500 info->dma = 0;
f5cd7872 501
cd4ceb24 502 pci_unmap_single(mac->dma_pdev, dma, skb->len,
f5cd7872
OJ		 503 PCI_DMA_FROMDEVICE);
504
cd4ceb24 505 len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
f5cd7872 506
9f05cfe2
OJ		 507 if (len < 256) {
508 struct sk_buff *new_skb =
509 netdev_alloc_skb(mac->netdev, len + NET_IP_ALIGN);
510 if (new_skb) {
511 skb_reserve(new_skb, NET_IP_ALIGN);
73344863 512 memcpy(new_skb->data, skb->data, len);
9f05cfe2
OJ		 513 /* save the skb in buffer_info as good */
514 skb = new_skb;
515 }
516 /* else just continue with the old one */
517 } else
518 info->skb = NULL;
f5cd7872
OJ		 519
520 skb_put(skb, len);
521
26fcfa95 522 if (likely((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK)) {
f5cd7872 523 skb->ip_summed = CHECKSUM_COMPLETE;
cd4ceb24 524 skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
f5cd7872
OJ		 525 XCT_MACRX_CSUM_S;
526 } else
527 skb->ip_summed = CHECKSUM_NONE;
528
529 mac->stats.rx_bytes += len;
530 mac->stats.rx_packets++;
531
26fcfa95 532 skb->protocol = eth_type_trans(skb, mac->netdev);
f5cd7872
OJ		 533 netif_receive_skb(skb);
534
f5cd7872
OJ		 535 dp->ptr = 0;
536 dp->macrx = 0;
cd4ceb24
OJ		 537
538 n++;
f5cd7872
OJ		 539 }
540
cd4ceb24 541 mac->rx->next_to_clean += limit - count;
f5cd7872
OJ		 542 pasemi_mac_replenish_rx_ring(mac->netdev);
543
544 spin_unlock(&mac->rx->lock);
545
546 return count;
547}
548
549static int pasemi_mac_clean_tx(struct pasemi_mac *mac)
550{
551 int i;
552 struct pasemi_mac_buffer *info;
553 struct pas_dma_xct_descr *dp;
02df6cfa
OJ		 554 unsigned int start, count, limit;
555 unsigned int total_count;
f5cd7872 556 int flags;
02df6cfa
OJ		 557 struct sk_buff *skbs[32];
558 dma_addr_t dmas[32];
f5cd7872 559
02df6cfa
OJ		 560 total_count = 0;
561restart:
f5cd7872
OJ		 562 spin_lock_irqsave(&mac->tx->lock, flags);
563
564 start = mac->tx->next_to_clean;
02df6cfa
OJ		 565 limit = min(mac->tx->next_to_use, start+32);
566
f5cd7872
OJ		 567 count = 0;
568
02df6cfa 569 for (i = start; i < limit; i++) {
f5cd7872 570 dp = &TX_DESC(mac, i);
02df6cfa 571
26fcfa95 572 if (unlikely(dp->mactx & XCT_MACTX_O))
02df6cfa 573 /* Not yet transmitted */
f5cd7872
OJ		 574 break;
575
f5cd7872 576 info = &TX_DESC_INFO(mac, i);
02df6cfa
OJ		 577 skbs[count] = info->skb;
578 dmas[count] = info->dma;
f5cd7872
OJ		 579
580 info->skb = NULL;
581 info->dma = 0;
582 dp->mactx = 0;
583 dp->ptr = 0;
02df6cfa
OJ		 584
585 count++;
f5cd7872
OJ		 586 }
587 mac->tx->next_to_clean += count;
588 spin_unlock_irqrestore(&mac->tx->lock, flags);
0ce68c74
OJ		 589 netif_wake_queue(mac->netdev);
590
02df6cfa
OJ		 591 for (i = 0; i < count; i++) {
592 pci_unmap_single(mac->dma_pdev, dmas[i],
593 skbs[i]->len, PCI_DMA_TODEVICE);
594 dev_kfree_skb_irq(skbs[i]);
595 }
596
597 total_count += count;
598
599 /* If the batch was full, try to clean more */
600 if (count == 32)
601 goto restart;
602
603 return total_count;
f5cd7872
OJ		 604}
605
606
607static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
608{
609 struct net_device *dev = data;
610 struct pasemi_mac *mac = netdev_priv(dev);
611 unsigned int reg;
612
6dfa7522 613 if (!(*mac->rx_status & PAS_STATUS_CAUSE_M))
f5cd7872
OJ		 614 return IRQ_NONE;
615
6dfa7522
OJ		 616 if (*mac->rx_status & PAS_STATUS_ERROR)
617 printk("rx_status reported error\n");
618
619 /* Don't reset packet count so it won't fire again but clear
620 * all others.
621 */
622
6dfa7522
OJ		 623 reg = 0;
624 if (*mac->rx_status & PAS_STATUS_SOFT)
625 reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
626 if (*mac->rx_status & PAS_STATUS_ERROR)
627 reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
f5cd7872
OJ		 628 if (*mac->rx_status & PAS_STATUS_TIMER)
629 reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
630
bea3348e 631 netif_rx_schedule(dev, &mac->napi);
6dfa7522 632
a85b9422 633 write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
f5cd7872
OJ		 634
635 return IRQ_HANDLED;
636}
637
638static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
639{
640 struct net_device *dev = data;
641 struct pasemi_mac *mac = netdev_priv(dev);
52a94351 642 unsigned int reg, pcnt;
f5cd7872 643
6dfa7522 644 if (!(*mac->tx_status & PAS_STATUS_CAUSE_M))
f5cd7872
OJ		 645 return IRQ_NONE;
646
647 pasemi_mac_clean_tx(mac);
648
52a94351
OJ		 649 pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
650
651 reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
6dfa7522
OJ		 652
653 if (*mac->tx_status & PAS_STATUS_SOFT)
654 reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
655 if (*mac->tx_status & PAS_STATUS_ERROR)
656 reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
f5cd7872 657
a85b9422 658 write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
f5cd7872 659
f5cd7872
OJ		 660 return IRQ_HANDLED;
661}
662
bb6e9590
OJ		 663static void pasemi_adjust_link(struct net_device *dev)
664{
665 struct pasemi_mac *mac = netdev_priv(dev);
666 int msg;
667 unsigned int flags;
668 unsigned int new_flags;
669
670 if (!mac->phydev->link) {
671 /* If no link, MAC speed settings don't matter. Just report
672 * link down and return.
673 */
674 if (mac->link && netif_msg_link(mac))
675 printk(KERN_INFO "%s: Link is down.\n", dev->name);
676
677 netif_carrier_off(dev);
678 mac->link = 0;
679
680 return;
681 } else
682 netif_carrier_on(dev);
683
a85b9422 684 flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
bb6e9590
OJ		 685 new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
686 PAS_MAC_CFG_PCFG_TSR_M);
687
688 if (!mac->phydev->duplex)
689 new_flags |= PAS_MAC_CFG_PCFG_HD;
690
691 switch (mac->phydev->speed) {
692 case 1000:
693 new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
694 PAS_MAC_CFG_PCFG_TSR_1G;
695 break;
696 case 100:
697 new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
698 PAS_MAC_CFG_PCFG_TSR_100M;
699 break;
700 case 10:
701 new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
702 PAS_MAC_CFG_PCFG_TSR_10M;
703 break;
704 default:
705 printk("Unsupported speed %d\n", mac->phydev->speed);
706 }
707
708 /* Print on link or speed/duplex change */
709 msg = mac->link != mac->phydev->link || flags != new_flags;
710
711 mac->duplex = mac->phydev->duplex;
712 mac->speed = mac->phydev->speed;
713 mac->link = mac->phydev->link;
714
715 if (new_flags != flags)
a85b9422 716 write_mac_reg(mac, PAS_MAC_CFG_PCFG, new_flags);
bb6e9590
OJ		 717
718 if (msg && netif_msg_link(mac))
719 printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
720 dev->name, mac->speed, mac->duplex ? "full" : "half");
721}
722
723static int pasemi_mac_phy_init(struct net_device *dev)
724{
725 struct pasemi_mac *mac = netdev_priv(dev);
726 struct device_node *dn, *phy_dn;
727 struct phy_device *phydev;
728 unsigned int phy_id;
729 const phandle *ph;
730 const unsigned int *prop;
731 struct resource r;
732 int ret;
733
734 dn = pci_device_to_OF_node(mac->pdev);
9028780a 735 ph = of_get_property(dn, "phy-handle", NULL);
bb6e9590
OJ		 736 if (!ph)
737 return -ENODEV;
738 phy_dn = of_find_node_by_phandle(*ph);
739
9028780a 740 prop = of_get_property(phy_dn, "reg", NULL);
bb6e9590
OJ		 741 ret = of_address_to_resource(phy_dn->parent, 0, &r);
742 if (ret)
743 goto err;
744
745 phy_id = *prop;
746 snprintf(mac->phy_id, BUS_ID_SIZE, PHY_ID_FMT, (int)r.start, phy_id);
747
748 of_node_put(phy_dn);
749
750 mac->link = 0;
751 mac->speed = 0;
752 mac->duplex = -1;
753
754 phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
755
756 if (IS_ERR(phydev)) {
757 printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
758 return PTR_ERR(phydev);
759 }
760
761 mac->phydev = phydev;
762
763 return 0;
764
765err:
766 of_node_put(phy_dn);
767 return -ENODEV;
768}
769
770
f5cd7872
OJ		 771static int pasemi_mac_open(struct net_device *dev)
772{
773 struct pasemi_mac *mac = netdev_priv(dev);
771f7404 774 int base_irq;
f5cd7872
OJ		 775 unsigned int flags;
776 int ret;
777
778 /* enable rx section */
a85b9422 779 write_dma_reg(mac, PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
f5cd7872
OJ		 780
781 /* enable tx section */
a85b9422 782 write_dma_reg(mac, PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
f5cd7872
OJ		 783
784 flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
785 PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
786 PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
787
a85b9422 788 write_mac_reg(mac, PAS_MAC_CFG_TXP, flags);
f5cd7872
OJ		 789
790 flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PE |
791 PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
792
793 flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
794
a85b9422
OJ		 795 write_iob_reg(mac, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
796 PAS_IOB_DMA_RXCH_CFG_CNTTH(0));
f5cd7872 797
a85b9422 798 write_iob_reg(mac, PAS_IOB_DMA_TXCH_CFG(mac->dma_txch),
02df6cfa 799 PAS_IOB_DMA_TXCH_CFG_CNTTH(128));
f5cd7872 800
1b0335ea
OJ		 801 /* Clear out any residual packet count state from firmware */
802 pasemi_mac_restart_rx_intr(mac);
803 pasemi_mac_restart_tx_intr(mac);
804
6dfa7522 805 /* 0xffffff is max value, about 16ms */
a85b9422
OJ		 806 write_iob_reg(mac, PAS_IOB_DMA_COM_TIMEOUTCFG,
807 PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0xffffff));
f5cd7872 808
a85b9422 809 write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
f5cd7872
OJ		 810
811 ret = pasemi_mac_setup_rx_resources(dev);
812 if (ret)
813 goto out_rx_resources;
814
815 ret = pasemi_mac_setup_tx_resources(dev);
816 if (ret)
817 goto out_tx_resources;
818
a85b9422
OJ		 819 write_mac_reg(mac, PAS_MAC_IPC_CHNL,
820 PAS_MAC_IPC_CHNL_DCHNO(mac->dma_rxch) |
821 PAS_MAC_IPC_CHNL_BCH(mac->dma_rxch));
f5cd7872
OJ		 822
823 /* enable rx if */
a85b9422
OJ		 824 write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
825 PAS_DMA_RXINT_RCMDSTA_EN);
f5cd7872
OJ		 826
827 /* enable rx channel */
a85b9422
OJ		 828 write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
829 PAS_DMA_RXCHAN_CCMDSTA_EN |
830 PAS_DMA_RXCHAN_CCMDSTA_DU);
f5cd7872
OJ		 831
832 /* enable tx channel */
a85b9422
OJ		 833 write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
834 PAS_DMA_TXCHAN_TCMDSTA_EN);
f5cd7872
OJ		 835
836 pasemi_mac_replenish_rx_ring(dev);
837
bb6e9590
OJ		 838 ret = pasemi_mac_phy_init(dev);
839 /* Some configs don't have PHYs (XAUI etc), so don't complain about
840 * failed init due to -ENODEV.
841 */
842 if (ret && ret != -ENODEV)
843 dev_warn(&mac->pdev->dev, "phy init failed: %d\n", ret);
844
f5cd7872 845 netif_start_queue(dev);
bea3348e 846 napi_enable(&mac->napi);
f5cd7872 847
771f7404
OJ		 848 /* Interrupts are a bit different for our DMA controller: While
849 * it's got one a regular PCI device header, the interrupt there
850 * is really the base of the range it's using. Each tx and rx
851 * channel has it's own interrupt source.
852 */
853
854 base_irq = virq_to_hw(mac->dma_pdev->irq);
855
856 mac->tx_irq = irq_create_mapping(NULL, base_irq + mac->dma_txch);
857 mac->rx_irq = irq_create_mapping(NULL, base_irq + 20 + mac->dma_txch);
858
859 ret = request_irq(mac->tx_irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
f5cd7872
OJ		 860 mac->tx->irq_name, dev);
861 if (ret) {
862 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
771f7404 863 base_irq + mac->dma_txch, ret);
f5cd7872
OJ		 864 goto out_tx_int;
865 }
866
771f7404 867 ret = request_irq(mac->rx_irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
f5cd7872
OJ		 868 mac->rx->irq_name, dev);
869 if (ret) {
870 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
771f7404 871 base_irq + 20 + mac->dma_rxch, ret);
f5cd7872
OJ		 872 goto out_rx_int;
873 }
874
bb6e9590
OJ		 875 if (mac->phydev)
876 phy_start(mac->phydev);
877
f5cd7872
OJ		 878 return 0;
879
880out_rx_int:
771f7404 881 free_irq(mac->tx_irq, dev);
f5cd7872 882out_tx_int:
bea3348e 883 napi_disable(&mac->napi);
f5cd7872
OJ		 884 netif_stop_queue(dev);
885 pasemi_mac_free_tx_resources(dev);
886out_tx_resources:
887 pasemi_mac_free_rx_resources(dev);
888out_rx_resources:
889
890 return ret;
891}
892
893#define MAX_RETRIES 5000
894
895static int pasemi_mac_close(struct net_device *dev)
896{
897 struct pasemi_mac *mac = netdev_priv(dev);
898 unsigned int stat;
899 int retries;
900
bb6e9590
OJ		 901 if (mac->phydev) {
902 phy_stop(mac->phydev);
903 phy_disconnect(mac->phydev);
904 }
905
f5cd7872 906 netif_stop_queue(dev);
bea3348e 907 napi_disable(&mac->napi);
f5cd7872
OJ		 908
909 /* Clean out any pending buffers */
910 pasemi_mac_clean_tx(mac);
911 pasemi_mac_clean_rx(mac, RX_RING_SIZE);
912
913 /* Disable interface */
a85b9422
OJ		 914 write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), PAS_DMA_TXCHAN_TCMDSTA_ST);
915 write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), PAS_DMA_RXINT_RCMDSTA_ST);
916 write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), PAS_DMA_RXCHAN_CCMDSTA_ST);
f5cd7872
OJ		 917
918 for (retries = 0; retries < MAX_RETRIES; retries++) {
a85b9422 919 stat = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
0ce68c74 920 if (!(stat & PAS_DMA_TXCHAN_TCMDSTA_ACT))
f5cd7872
OJ		 921 break;
922 cond_resched();
923 }
924
0ce68c74 925 if (stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)
f5cd7872 926 dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
f5cd7872
OJ		 927
928 for (retries = 0; retries < MAX_RETRIES; retries++) {
a85b9422 929 stat = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
0ce68c74 930 if (!(stat & PAS_DMA_RXCHAN_CCMDSTA_ACT))
f5cd7872
OJ		 931 break;
932 cond_resched();
933 }
934
0ce68c74 935 if (stat & PAS_DMA_RXCHAN_CCMDSTA_ACT)
f5cd7872 936 dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
f5cd7872
OJ		 937
938 for (retries = 0; retries < MAX_RETRIES; retries++) {
a85b9422 939 stat = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
0ce68c74 940 if (!(stat & PAS_DMA_RXINT_RCMDSTA_ACT))
f5cd7872
OJ		 941 break;
942 cond_resched();
943 }
944
0ce68c74 945 if (stat & PAS_DMA_RXINT_RCMDSTA_ACT)
f5cd7872 946 dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
f5cd7872
OJ		 947
948 /* Then, disable the channel. This must be done separately from
949 * stopping, since you can't disable when active.
950 */
951
a85b9422
OJ		 952 write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), 0);
953 write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), 0);
954 write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
f5cd7872 955
771f7404
OJ		 956 free_irq(mac->tx_irq, dev);
957 free_irq(mac->rx_irq, dev);
f5cd7872
OJ		 958
959 /* Free resources */
960 pasemi_mac_free_rx_resources(dev);
961 pasemi_mac_free_tx_resources(dev);
962
963 return 0;
964}
965
966static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
967{
968 struct pasemi_mac *mac = netdev_priv(dev);
969 struct pasemi_mac_txring *txring;
970 struct pasemi_mac_buffer *info;
971 struct pas_dma_xct_descr *dp;
26fcfa95 972 u64 dflags, mactx, ptr;
f5cd7872
OJ		 973 dma_addr_t map;
974 int flags;
975
976 dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_SS | XCT_MACTX_CRC_PAD;
977
978 if (skb->ip_summed == CHECKSUM_PARTIAL) {
d56f90a7
ACM		 979 const unsigned char *nh = skb_network_header(skb);
980
eddc9ec5 981 switch (ip_hdr(skb)->protocol) {
f5cd7872
OJ		 982 case IPPROTO_TCP:
983 dflags |= XCT_MACTX_CSUM_TCP;
cfe1fc77 984 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
d56f90a7 985 dflags |= XCT_MACTX_IPO(nh - skb->data);
f5cd7872
OJ		 986 break;
987 case IPPROTO_UDP:
988 dflags |= XCT_MACTX_CSUM_UDP;
cfe1fc77 989 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
d56f90a7 990 dflags |= XCT_MACTX_IPO(nh - skb->data);
f5cd7872
OJ		 991 break;
992 }
993 }
994
995 map = pci_map_single(mac->dma_pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
996
997 if (dma_mapping_error(map))
998 return NETDEV_TX_BUSY;
999
26fcfa95
OJ		 1000 mactx = dflags | XCT_MACTX_LLEN(skb->len);
1001 ptr = XCT_PTR_LEN(skb->len) | XCT_PTR_ADDR(map);
1002
f5cd7872
OJ		 1003 txring = mac->tx;
1004
1005 spin_lock_irqsave(&txring->lock, flags);
1006
1007 if (txring->next_to_clean - txring->next_to_use == TX_RING_SIZE) {
1008 spin_unlock_irqrestore(&txring->lock, flags);
1009 pasemi_mac_clean_tx(mac);
52a94351 1010 pasemi_mac_restart_tx_intr(mac);
f5cd7872
OJ		 1011 spin_lock_irqsave(&txring->lock, flags);
1012
1013 if (txring->next_to_clean - txring->next_to_use ==
1014 TX_RING_SIZE) {
1015 /* Still no room -- stop the queue and wait for tx
1016 * intr when there's room.
1017 */
1018 netif_stop_queue(dev);
1019 goto out_err;
1020 }
1021 }
1022
f5cd7872
OJ		 1023 dp = &TX_DESC(mac, txring->next_to_use);
1024 info = &TX_DESC_INFO(mac, txring->next_to_use);
1025
26fcfa95
OJ		 1026 dp->mactx = mactx;
1027 dp->ptr = ptr;
f5cd7872
OJ		 1028 info->dma = map;
1029 info->skb = skb;
1030
1031 txring->next_to_use++;
1032 mac->stats.tx_packets++;
1033 mac->stats.tx_bytes += skb->len;
1034
1035 spin_unlock_irqrestore(&txring->lock, flags);
1036
a85b9422 1037 write_dma_reg(mac, PAS_DMA_TXCHAN_INCR(mac->dma_txch), 1);
f5cd7872
OJ		 1038
1039 return NETDEV_TX_OK;
1040
1041out_err:
1042 spin_unlock_irqrestore(&txring->lock, flags);
1043 pci_unmap_single(mac->dma_pdev, map, skb->len, PCI_DMA_TODEVICE);
1044 return NETDEV_TX_BUSY;
1045}
1046
1047static struct net_device_stats *pasemi_mac_get_stats(struct net_device *dev)
1048{
1049 struct pasemi_mac *mac = netdev_priv(dev);
1050
1051 return &mac->stats;
1052}
1053
ceb51361 1054
f5cd7872
OJ		 1055static void pasemi_mac_set_rx_mode(struct net_device *dev)
1056{
1057 struct pasemi_mac *mac = netdev_priv(dev);
1058 unsigned int flags;
1059
a85b9422 1060 flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
f5cd7872
OJ		 1061
1062 /* Set promiscuous */
1063 if (dev->flags & IFF_PROMISC)
1064 flags |= PAS_MAC_CFG_PCFG_PR;
1065 else
1066 flags &= ~PAS_MAC_CFG_PCFG_PR;
1067
a85b9422 1068 write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
f5cd7872
OJ		 1069}
1070
1071
bea3348e 1072static int pasemi_mac_poll(struct napi_struct *napi, int budget)
f5cd7872 1073{
bea3348e
SH		 1074 struct pasemi_mac *mac = container_of(napi, struct pasemi_mac, napi);
1075 struct net_device *dev = mac->netdev;
1076 int pkts;
f5cd7872 1077
bea3348e
SH		 1078 pkts = pasemi_mac_clean_rx(mac, budget);
1079 if (pkts < budget) {
f5cd7872 1080 /* all done, no more packets present */
bea3348e 1081 netif_rx_complete(dev, napi);
f5cd7872 1082
1b0335ea 1083 pasemi_mac_restart_rx_intr(mac);
f5cd7872 1084 }
bea3348e 1085 return pkts;
f5cd7872
OJ		 1086}
1087
b6e05a1b
OJ		 1088static void __iomem * __devinit map_onedev(struct pci_dev *p, int index)
1089{
1090 struct device_node *dn;
1091 void __iomem *ret;
1092
1093 dn = pci_device_to_OF_node(p);
1094 if (!dn)
1095 goto fallback;
1096
1097 ret = of_iomap(dn, index);
1098 if (!ret)
1099 goto fallback;
1100
1101 return ret;
1102fallback:
1103 /* This is hardcoded and ugly, but we have some firmware versions
1104 * that don't provide the register space in the device tree. Luckily
1105 * they are at well-known locations so we can just do the math here.
1106 */
1107 return ioremap(0xe0000000 + (p->devfn << 12), 0x2000);
1108}
1109
1110static int __devinit pasemi_mac_map_regs(struct pasemi_mac *mac)
1111{
1112 struct resource res;
1113 struct device_node *dn;
1114 int err;
1115
1116 mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
1117 if (!mac->dma_pdev) {
1118 dev_err(&mac->pdev->dev, "Can't find DMA Controller\n");
1119 return -ENODEV;
1120 }
1121
1122 mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
1123 if (!mac->iob_pdev) {
1124 dev_err(&mac->pdev->dev, "Can't find I/O Bridge\n");
1125 return -ENODEV;
1126 }
1127
1128 mac->regs = map_onedev(mac->pdev, 0);
1129 mac->dma_regs = map_onedev(mac->dma_pdev, 0);
1130 mac->iob_regs = map_onedev(mac->iob_pdev, 0);
1131
1132 if (!mac->regs || !mac->dma_regs || !mac->iob_regs) {
1133 dev_err(&mac->pdev->dev, "Can't map registers\n");
1134 return -ENODEV;
1135 }
1136
1137 /* The dma status structure is located in the I/O bridge, and
1138 * is cache coherent.
1139 */
1140 if (!dma_status) {
1141 dn = pci_device_to_OF_node(mac->iob_pdev);
1142 if (dn)
1143 err = of_address_to_resource(dn, 1, &res);
1144 if (!dn || err) {
1145 /* Fallback for old firmware */
1146 res.start = 0xfd800000;
1147 res.end = res.start + 0x1000;
1148 }
1149 dma_status = __ioremap(res.start, res.end-res.start, 0);
1150 }
1151
1152 return 0;
1153}
1154
f5cd7872
OJ		 1155static int __devinit
1156pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1157{
1158 static int index = 0;
1159 struct net_device *dev;
1160 struct pasemi_mac *mac;
1161 int err;
1162
1163 err = pci_enable_device(pdev);
1164 if (err)
1165 return err;
1166
1167 dev = alloc_etherdev(sizeof(struct pasemi_mac));
1168 if (dev == NULL) {
1169 dev_err(&pdev->dev,
1170 "pasemi_mac: Could not allocate ethernet device.\n");
1171 err = -ENOMEM;
1172 goto out_disable_device;
1173 }
1174
1175 SET_MODULE_OWNER(dev);
1176 pci_set_drvdata(pdev, dev);
1177 SET_NETDEV_DEV(dev, &pdev->dev);
1178
1179 mac = netdev_priv(dev);
1180
1181 mac->pdev = pdev;
1182 mac->netdev = dev;
f5cd7872 1183
bea3348e
SH		 1184 netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
1185
1186 dev->features = NETIF_F_HW_CSUM;
1187
f5cd7872
OJ		 1188 /* These should come out of the device tree eventually */
1189 mac->dma_txch = index;
1190 mac->dma_rxch = index;
1191
1192 /* We probe GMAC before XAUI, but the DMA interfaces are
1193 * in XAUI, GMAC order.
1194 */
1195 if (index < 4)
1196 mac->dma_if = index + 2;
1197 else
1198 mac->dma_if = index - 4;
1199 index++;
1200
1201 switch (pdev->device) {
1202 case 0xa005:
1203 mac->type = MAC_TYPE_GMAC;
1204 break;
1205 case 0xa006:
1206 mac->type = MAC_TYPE_XAUI;
1207 break;
1208 default:
1209 err = -ENODEV;
1210 goto out;
1211 }
1212
1213 /* get mac addr from device tree */
1214 if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
1215 err = -ENODEV;
1216 goto out;
1217 }
1218 memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
1219
1220 dev->open = pasemi_mac_open;
1221 dev->stop = pasemi_mac_close;
1222 dev->hard_start_xmit = pasemi_mac_start_tx;
1223 dev->get_stats = pasemi_mac_get_stats;
1224 dev->set_multicast_list = pasemi_mac_set_rx_mode;
f5cd7872 1225
b6e05a1b
OJ		 1226 err = pasemi_mac_map_regs(mac);
1227 if (err)
1228 goto out;
f5cd7872
OJ		 1229
1230 mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
1231 mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
1232
ceb51361
OJ		 1233 mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
1234
bb6e9590
OJ		 1235 /* Enable most messages by default */
1236 mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
1237
f5cd7872
OJ		 1238 err = register_netdev(dev);
1239
1240 if (err) {
1241 dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
1242 err);
1243 goto out;
1244 } else
1245 printk(KERN_INFO "%s: PA Semi %s: intf %d, txch %d, rxch %d, "
1246 "hw addr %02x:%02x:%02x:%02x:%02x:%02x\n",
1247 dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
1248 mac->dma_if, mac->dma_txch, mac->dma_rxch,
1249 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1250 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1251
1252 return err;
1253
1254out:
b6e05a1b
OJ		 1255 if (mac->iob_pdev)
1256 pci_dev_put(mac->iob_pdev);
1257 if (mac->dma_pdev)
1258 pci_dev_put(mac->dma_pdev);
1259 if (mac->dma_regs)
1260 iounmap(mac->dma_regs);
1261 if (mac->iob_regs)
1262 iounmap(mac->iob_regs);
1263 if (mac->regs)
1264 iounmap(mac->regs);
1265
f5cd7872
OJ		 1266 free_netdev(dev);
1267out_disable_device:
1268 pci_disable_device(pdev);
1269 return err;
1270
1271}
1272
1273static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
1274{
1275 struct net_device *netdev = pci_get_drvdata(pdev);
1276 struct pasemi_mac *mac;
1277
1278 if (!netdev)
1279 return;
1280
1281 mac = netdev_priv(netdev);
1282
1283 unregister_netdev(netdev);
1284
1285 pci_disable_device(pdev);
1286 pci_dev_put(mac->dma_pdev);
1287 pci_dev_put(mac->iob_pdev);
1288
b6e05a1b
OJ		 1289 iounmap(mac->regs);
1290 iounmap(mac->dma_regs);
1291 iounmap(mac->iob_regs);
1292
f5cd7872
OJ		 1293 pci_set_drvdata(pdev, NULL);
1294 free_netdev(netdev);
1295}
1296
1297static struct pci_device_id pasemi_mac_pci_tbl[] = {
1298 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
1299 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
fd178254 1300 { },
f5cd7872
OJ		 1301};
1302
1303MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
1304
1305static struct pci_driver pasemi_mac_driver = {
1306 .name = "pasemi_mac",
1307 .id_table = pasemi_mac_pci_tbl,
1308 .probe = pasemi_mac_probe,
1309 .remove = __devexit_p(pasemi_mac_remove),
1310};
1311
1312static void __exit pasemi_mac_cleanup_module(void)
1313{
1314 pci_unregister_driver(&pasemi_mac_driver);
1315 __iounmap(dma_status);
1316 dma_status = NULL;
1317}
1318
1319int pasemi_mac_init_module(void)
1320{
1321 return pci_register_driver(&pasemi_mac_driver);
1322}
1323
f5cd7872
OJ		 1324module_init(pasemi_mac_init_module);
1325module_exit(pasemi_mac_cleanup_module);
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