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[mirror_ubuntu-bionic-kernel.git] / drivers / net / pasemi_mac.c
CommitLineData
f5cd7872
OJ		 1/*
2 * Copyright (C) 2006-2007 PA Semi, Inc
3 *
4 * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/init.h>
21#include <linux/module.h>
22#include <linux/pci.h>
23#include <linux/interrupt.h>
24#include <linux/dmaengine.h>
25#include <linux/delay.h>
26#include <linux/netdevice.h>
27#include <linux/etherdevice.h>
28#include <asm/dma-mapping.h>
29#include <linux/in.h>
30#include <linux/skbuff.h>
31
32#include <linux/ip.h>
33#include <linux/tcp.h>
34#include <net/checksum.h>
35
771f7404
OJ		 36#include <asm/irq.h>
37
f5cd7872
OJ		 38#include "pasemi_mac.h"
39
40
41/* TODO list
42 *
43 * - Get rid of pci_{read,write}_config(), map registers with ioremap
44 * for performance
45 * - PHY support
46 * - Multicast support
47 * - Large MTU support
48 * - Other performance improvements
49 */
50
51
52/* Must be a power of two */
53#define RX_RING_SIZE 512
54#define TX_RING_SIZE 512
55
ceb51361
OJ		 56#define DEFAULT_MSG_ENABLE \
57 (NETIF_MSG_DRV | \
58 NETIF_MSG_PROBE | \
59 NETIF_MSG_LINK | \
60 NETIF_MSG_TIMER | \
61 NETIF_MSG_IFDOWN | \
62 NETIF_MSG_IFUP | \
63 NETIF_MSG_RX_ERR | \
64 NETIF_MSG_TX_ERR)
65
f5cd7872
OJ		 66#define TX_DESC(mac, num) ((mac)->tx->desc[(num) & (TX_RING_SIZE-1)])
67#define TX_DESC_INFO(mac, num) ((mac)->tx->desc_info[(num) & (TX_RING_SIZE-1)])
68#define RX_DESC(mac, num) ((mac)->rx->desc[(num) & (RX_RING_SIZE-1)])
69#define RX_DESC_INFO(mac, num) ((mac)->rx->desc_info[(num) & (RX_RING_SIZE-1)])
70#define RX_BUFF(mac, num) ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
71
021fa22e
OJ		 72#define RING_USED(ring) (((ring)->next_to_fill - (ring)->next_to_clean) \
73 & ((ring)->size - 1))
74#define RING_AVAIL(ring) ((ring->size) - RING_USED(ring))
75
f5cd7872
OJ		 76#define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
77
ceb51361
OJ		 78MODULE_LICENSE("GPL");
79MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
80MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
81
82static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
83module_param(debug, int, 0);
84MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
f5cd7872
OJ		 85
86static struct pasdma_status *dma_status;
87
a85b9422
OJ		 88static unsigned int read_iob_reg(struct pasemi_mac *mac, unsigned int reg)
89{
b6e05a1b 90 return in_le32(mac->iob_regs+reg);
a85b9422
OJ		 91}
92
93static void write_iob_reg(struct pasemi_mac *mac, unsigned int reg,
94 unsigned int val)
95{
b6e05a1b 96 out_le32(mac->iob_regs+reg, val);
a85b9422
OJ		 97}
98
99static unsigned int read_mac_reg(struct pasemi_mac *mac, unsigned int reg)
100{
b6e05a1b 101 return in_le32(mac->regs+reg);
a85b9422
OJ		 102}
103
104static void write_mac_reg(struct pasemi_mac *mac, unsigned int reg,
105 unsigned int val)
106{
b6e05a1b 107 out_le32(mac->regs+reg, val);
a85b9422
OJ		 108}
109
110static unsigned int read_dma_reg(struct pasemi_mac *mac, unsigned int reg)
111{
b6e05a1b 112 return in_le32(mac->dma_regs+reg);
a85b9422
OJ		 113}
114
115static void write_dma_reg(struct pasemi_mac *mac, unsigned int reg,
116 unsigned int val)
117{
b6e05a1b 118 out_le32(mac->dma_regs+reg, val);
a85b9422
OJ		 119}
120
f5cd7872
OJ		 121static int pasemi_get_mac_addr(struct pasemi_mac *mac)
122{
123 struct pci_dev *pdev = mac->pdev;
124 struct device_node *dn = pci_device_to_OF_node(pdev);
1af7f056 125 int len;
f5cd7872
OJ		 126 const u8 *maddr;
127 u8 addr[6];
128
129 if (!dn) {
130 dev_dbg(&pdev->dev,
131 "No device node for mac, not configuring\n");
132 return -ENOENT;
133 }
134
1af7f056 135 maddr = of_get_property(dn, "local-mac-address", &len);
136
137 if (maddr && len == 6) {
138 memcpy(mac->mac_addr, maddr, 6);
139 return 0;
140 }
141
142 /* Some old versions of firmware mistakenly uses mac-address
143 * (and as a string) instead of a byte array in local-mac-address.
144 */
a5fd22eb 145
a5fd22eb 146 if (maddr == NULL)
9028780a 147 maddr = of_get_property(dn, "mac-address", NULL);
a5fd22eb 148
f5cd7872
OJ		 149 if (maddr == NULL) {
150 dev_warn(&pdev->dev,
151 "no mac address in device tree, not configuring\n");
152 return -ENOENT;
153 }
154
1af7f056 155
f5cd7872
OJ		 156 if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
157 &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
158 dev_warn(&pdev->dev,
159 "can't parse mac address, not configuring\n");
160 return -EINVAL;
161 }
162
1af7f056 163 memcpy(mac->mac_addr, addr, 6);
164
f5cd7872
OJ		 165 return 0;
166}
167
168static int pasemi_mac_setup_rx_resources(struct net_device *dev)
169{
170 struct pasemi_mac_rxring *ring;
171 struct pasemi_mac *mac = netdev_priv(dev);
172 int chan_id = mac->dma_rxch;
173
174 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
175
176 if (!ring)
177 goto out_ring;
178
179 spin_lock_init(&ring->lock);
180
021fa22e 181 ring->size = RX_RING_SIZE;
f5cd7872
OJ		 182 ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
183 RX_RING_SIZE, GFP_KERNEL);
184
185 if (!ring->desc_info)
186 goto out_desc_info;
187
188 /* Allocate descriptors */
189 ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
190 RX_RING_SIZE *
191 sizeof(struct pas_dma_xct_descr),
192 &ring->dma, GFP_KERNEL);
193
194 if (!ring->desc)
195 goto out_desc;
196
197 memset(ring->desc, 0, RX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
198
199 ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
200 RX_RING_SIZE * sizeof(u64),
201 &ring->buf_dma, GFP_KERNEL);
202 if (!ring->buffers)
203 goto out_buffers;
204
205 memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
206
a85b9422 207 write_dma_reg(mac, PAS_DMA_RXCHAN_BASEL(chan_id), PAS_DMA_RXCHAN_BASEL_BRBL(ring->dma));
f5cd7872 208
a85b9422
OJ		 209 write_dma_reg(mac, PAS_DMA_RXCHAN_BASEU(chan_id),
210 PAS_DMA_RXCHAN_BASEU_BRBH(ring->dma >> 32) |
211 PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 2));
f5cd7872 212
a85b9422 213 write_dma_reg(mac, PAS_DMA_RXCHAN_CFG(chan_id),
c0efd52b 214 PAS_DMA_RXCHAN_CFG_HBU(2));
f5cd7872 215
a85b9422
OJ		 216 write_dma_reg(mac, PAS_DMA_RXINT_BASEL(mac->dma_if),
217 PAS_DMA_RXINT_BASEL_BRBL(__pa(ring->buffers)));
f5cd7872 218
a85b9422
OJ		 219 write_dma_reg(mac, PAS_DMA_RXINT_BASEU(mac->dma_if),
220 PAS_DMA_RXINT_BASEU_BRBH(__pa(ring->buffers) >> 32) |
221 PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
f5cd7872 222
c0efd52b
OJ		 223 write_dma_reg(mac, PAS_DMA_RXINT_CFG(mac->dma_if),
224 PAS_DMA_RXINT_CFG_DHL(2));
225
f5cd7872
OJ		 226 ring->next_to_fill = 0;
227 ring->next_to_clean = 0;
228
229 snprintf(ring->irq_name, sizeof(ring->irq_name),
230 "%s rx", dev->name);
231 mac->rx = ring;
232
233 return 0;
234
235out_buffers:
236 dma_free_coherent(&mac->dma_pdev->dev,
237 RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
238 mac->rx->desc, mac->rx->dma);
239out_desc:
240 kfree(ring->desc_info);
241out_desc_info:
242 kfree(ring);
243out_ring:
244 return -ENOMEM;
245}
246
247
248static int pasemi_mac_setup_tx_resources(struct net_device *dev)
249{
250 struct pasemi_mac *mac = netdev_priv(dev);
251 u32 val;
252 int chan_id = mac->dma_txch;
253 struct pasemi_mac_txring *ring;
254
255 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
256 if (!ring)
257 goto out_ring;
258
259 spin_lock_init(&ring->lock);
260
021fa22e 261 ring->size = TX_RING_SIZE;
f5cd7872
OJ		 262 ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
263 TX_RING_SIZE, GFP_KERNEL);
264 if (!ring->desc_info)
265 goto out_desc_info;
266
267 /* Allocate descriptors */
268 ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
269 TX_RING_SIZE *
270 sizeof(struct pas_dma_xct_descr),
271 &ring->dma, GFP_KERNEL);
272 if (!ring->desc)
273 goto out_desc;
274
275 memset(ring->desc, 0, TX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
276
a85b9422
OJ		 277 write_dma_reg(mac, PAS_DMA_TXCHAN_BASEL(chan_id),
278 PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma));
f5cd7872
OJ		 279 val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32);
280 val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 2);
281
a85b9422 282 write_dma_reg(mac, PAS_DMA_TXCHAN_BASEU(chan_id), val);
f5cd7872 283
a85b9422
OJ		 284 write_dma_reg(mac, PAS_DMA_TXCHAN_CFG(chan_id),
285 PAS_DMA_TXCHAN_CFG_TY_IFACE |
286 PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
287 PAS_DMA_TXCHAN_CFG_UP |
288 PAS_DMA_TXCHAN_CFG_WT(2));
f5cd7872 289
021fa22e 290 ring->next_to_fill = 0;
f5cd7872
OJ		 291 ring->next_to_clean = 0;
292
293 snprintf(ring->irq_name, sizeof(ring->irq_name),
294 "%s tx", dev->name);
295 mac->tx = ring;
296
297 return 0;
298
299out_desc:
300 kfree(ring->desc_info);
301out_desc_info:
302 kfree(ring);
303out_ring:
304 return -ENOMEM;
305}
306
307static void pasemi_mac_free_tx_resources(struct net_device *dev)
308{
309 struct pasemi_mac *mac = netdev_priv(dev);
310 unsigned int i;
311 struct pasemi_mac_buffer *info;
312 struct pas_dma_xct_descr *dp;
313
314 for (i = 0; i < TX_RING_SIZE; i++) {
315 info = &TX_DESC_INFO(mac, i);
316 dp = &TX_DESC(mac, i);
317 if (info->dma) {
318 if (info->skb) {
319 pci_unmap_single(mac->dma_pdev,
320 info->dma,
321 info->skb->len,
322 PCI_DMA_TODEVICE);
323 dev_kfree_skb_any(info->skb);
324 }
325 info->dma = 0;
326 info->skb = NULL;
327 dp->mactx = 0;
328 dp->ptr = 0;
329 }
330 }
331
332 dma_free_coherent(&mac->dma_pdev->dev,
333 TX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
334 mac->tx->desc, mac->tx->dma);
335
336 kfree(mac->tx->desc_info);
337 kfree(mac->tx);
338 mac->tx = NULL;
339}
340
341static void pasemi_mac_free_rx_resources(struct net_device *dev)
342{
343 struct pasemi_mac *mac = netdev_priv(dev);
344 unsigned int i;
345 struct pasemi_mac_buffer *info;
346 struct pas_dma_xct_descr *dp;
347
348 for (i = 0; i < RX_RING_SIZE; i++) {
349 info = &RX_DESC_INFO(mac, i);
350 dp = &RX_DESC(mac, i);
9f05cfe2
OJ		 351 if (info->skb) {
352 if (info->dma) {
f5cd7872
OJ		 353 pci_unmap_single(mac->dma_pdev,
354 info->dma,
355 info->skb->len,
356 PCI_DMA_FROMDEVICE);
357 dev_kfree_skb_any(info->skb);
358 }
359 info->dma = 0;
360 info->skb = NULL;
361 dp->macrx = 0;
362 dp->ptr = 0;
363 }
364 }
365
366 dma_free_coherent(&mac->dma_pdev->dev,
367 RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
368 mac->rx->desc, mac->rx->dma);
369
370 dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
371 mac->rx->buffers, mac->rx->buf_dma);
372
373 kfree(mac->rx->desc_info);
374 kfree(mac->rx);
375 mac->rx = NULL;
376}
377
378static void pasemi_mac_replenish_rx_ring(struct net_device *dev)
379{
380 struct pasemi_mac *mac = netdev_priv(dev);
381 unsigned int i;
382 int start = mac->rx->next_to_fill;
cd4ceb24 383 unsigned int limit, count;
f5cd7872 384
021fa22e 385 limit = RING_AVAIL(mac->rx);
f5cd7872
OJ		 386 /* Check to see if we're doing first-time setup */
387 if (unlikely(mac->rx->next_to_clean == 0 && mac->rx->next_to_fill == 0))
cd4ceb24 388 limit = RX_RING_SIZE;
f5cd7872 389
cd4ceb24 390 if (limit <= 0)
f5cd7872
OJ		 391 return;
392
cd4ceb24
OJ		 393 i = start;
394 for (count = limit; count; count--) {
f5cd7872
OJ		 395 struct pasemi_mac_buffer *info = &RX_DESC_INFO(mac, i);
396 u64 *buff = &RX_BUFF(mac, i);
397 struct sk_buff *skb;
398 dma_addr_t dma;
399
9f05cfe2
OJ		 400 /* skb might still be in there for recycle on short receives */
401 if (info->skb)
402 skb = info->skb;
403 else
404 skb = dev_alloc_skb(BUF_SIZE);
f5cd7872 405
9f05cfe2 406 if (unlikely(!skb))
f5cd7872 407 break;
f5cd7872 408
f5cd7872
OJ		 409 dma = pci_map_single(mac->dma_pdev, skb->data, skb->len,
410 PCI_DMA_FROMDEVICE);
411
cd4ceb24 412 if (unlikely(dma_mapping_error(dma))) {
f5cd7872 413 dev_kfree_skb_irq(info->skb);
f5cd7872
OJ		 414 break;
415 }
416
417 info->skb = skb;
418 info->dma = dma;
419 *buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
cd4ceb24 420 i++;
f5cd7872
OJ		 421 }
422
423 wmb();
424
a85b9422
OJ		 425 write_dma_reg(mac, PAS_DMA_RXCHAN_INCR(mac->dma_rxch), limit - count);
426 write_dma_reg(mac, PAS_DMA_RXINT_INCR(mac->dma_if), limit - count);
f5cd7872 427
cd4ceb24 428 mac->rx->next_to_fill += limit - count;
f5cd7872
OJ		 429}
430
1b0335ea
OJ		 431static void pasemi_mac_restart_rx_intr(struct pasemi_mac *mac)
432{
52a94351 433 unsigned int reg, pcnt;
1b0335ea
OJ		 434 /* Re-enable packet count interrupts: finally
435 * ack the packet count interrupt we got in rx_intr.
436 */
437
52a94351 438 pcnt = *mac->rx_status & PAS_STATUS_PCNT_M;
1b0335ea 439
52a94351 440 reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
1b0335ea 441
a85b9422 442 write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
1b0335ea
OJ		 443}
444
445static void pasemi_mac_restart_tx_intr(struct pasemi_mac *mac)
446{
52a94351 447 unsigned int reg, pcnt;
1b0335ea
OJ		 448
449 /* Re-enable packet count interrupts */
52a94351 450 pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
1b0335ea 451
52a94351 452 reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
1b0335ea 453
a85b9422 454 write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
1b0335ea
OJ		 455}
456
457
f5cd7872
OJ		 458static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
459{
cd4ceb24
OJ		 460 unsigned int n;
461 int count;
462 struct pas_dma_xct_descr *dp;
463 struct pasemi_mac_buffer *info;
464 struct sk_buff *skb;
465 unsigned int i, len;
466 u64 macrx;
467 dma_addr_t dma;
f5cd7872
OJ		 468
469 spin_lock(&mac->rx->lock);
470
cd4ceb24 471 n = mac->rx->next_to_clean;
f5cd7872 472
cd4ceb24 473 for (count = limit; count; count--) {
f5cd7872
OJ		 474
475 rmb();
476
cd4ceb24 477 dp = &RX_DESC(mac, n);
26fcfa95 478 prefetchw(dp);
cd4ceb24 479 macrx = dp->macrx;
f5cd7872 480
cd4ceb24 481 if (!(macrx & XCT_MACRX_O))
f5cd7872
OJ		 482 break;
483
f5cd7872
OJ		 484
485 info = NULL;
486
487 /* We have to scan for our skb since there's no way
488 * to back-map them from the descriptor, and if we
489 * have several receive channels then they might not
490 * show up in the same order as they were put on the
491 * interface ring.
492 */
493
494 dma = (dp->ptr & XCT_PTR_ADDR_M);
cd4ceb24
OJ		 495 for (i = n; i < (n + RX_RING_SIZE); i++) {
496 info = &RX_DESC_INFO(mac, i);
f5cd7872
OJ		 497 if (info->dma == dma)
498 break;
499 }
26fcfa95 500 prefetchw(info);
f5cd7872 501
9f05cfe2 502 skb = info->skb;
26fcfa95 503 prefetchw(skb);
cd4ceb24 504 info->dma = 0;
f5cd7872 505
cd4ceb24 506 pci_unmap_single(mac->dma_pdev, dma, skb->len,
f5cd7872
OJ		 507 PCI_DMA_FROMDEVICE);
508
cd4ceb24 509 len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
f5cd7872 510
9f05cfe2
OJ		 511 if (len < 256) {
512 struct sk_buff *new_skb =
513 netdev_alloc_skb(mac->netdev, len + NET_IP_ALIGN);
514 if (new_skb) {
515 skb_reserve(new_skb, NET_IP_ALIGN);
73344863 516 memcpy(new_skb->data, skb->data, len);
9f05cfe2
OJ		 517 /* save the skb in buffer_info as good */
518 skb = new_skb;
519 }
520 /* else just continue with the old one */
521 } else
522 info->skb = NULL;
f5cd7872
OJ		 523
524 skb_put(skb, len);
525
26fcfa95 526 if (likely((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK)) {
38bf3184 527 skb->ip_summed = CHECKSUM_UNNECESSARY;
cd4ceb24 528 skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
f5cd7872
OJ		 529 XCT_MACRX_CSUM_S;
530 } else
531 skb->ip_summed = CHECKSUM_NONE;
532
533 mac->stats.rx_bytes += len;
534 mac->stats.rx_packets++;
535
26fcfa95 536 skb->protocol = eth_type_trans(skb, mac->netdev);
f5cd7872
OJ		 537 netif_receive_skb(skb);
538
f5cd7872
OJ		 539 dp->ptr = 0;
540 dp->macrx = 0;
cd4ceb24
OJ		 541
542 n++;
f5cd7872
OJ		 543 }
544
cd4ceb24 545 mac->rx->next_to_clean += limit - count;
f5cd7872
OJ		 546 pasemi_mac_replenish_rx_ring(mac->netdev);
547
548 spin_unlock(&mac->rx->lock);
549
550 return count;
551}
552
553static int pasemi_mac_clean_tx(struct pasemi_mac *mac)
554{
555 int i;
556 struct pasemi_mac_buffer *info;
557 struct pas_dma_xct_descr *dp;
02df6cfa
OJ		 558 unsigned int start, count, limit;
559 unsigned int total_count;
f5cd7872 560 int flags;
02df6cfa
OJ		 561 struct sk_buff *skbs[32];
562 dma_addr_t dmas[32];
f5cd7872 563
02df6cfa
OJ		 564 total_count = 0;
565restart:
f5cd7872
OJ		 566 spin_lock_irqsave(&mac->tx->lock, flags);
567
568 start = mac->tx->next_to_clean;
021fa22e 569 limit = min(mac->tx->next_to_fill, start+32);
02df6cfa 570
f5cd7872
OJ		 571 count = 0;
572
02df6cfa 573 for (i = start; i < limit; i++) {
f5cd7872 574 dp = &TX_DESC(mac, i);
02df6cfa 575
26fcfa95 576 if (unlikely(dp->mactx & XCT_MACTX_O))
02df6cfa 577 /* Not yet transmitted */
f5cd7872
OJ		 578 break;
579
f5cd7872 580 info = &TX_DESC_INFO(mac, i);
02df6cfa
OJ		 581 skbs[count] = info->skb;
582 dmas[count] = info->dma;
f5cd7872
OJ		 583
584 info->skb = NULL;
585 info->dma = 0;
586 dp->mactx = 0;
587 dp->ptr = 0;
02df6cfa
OJ		 588
589 count++;
f5cd7872
OJ		 590 }
591 mac->tx->next_to_clean += count;
592 spin_unlock_irqrestore(&mac->tx->lock, flags);
0ce68c74
OJ		 593 netif_wake_queue(mac->netdev);
594
02df6cfa
OJ		 595 for (i = 0; i < count; i++) {
596 pci_unmap_single(mac->dma_pdev, dmas[i],
597 skbs[i]->len, PCI_DMA_TODEVICE);
598 dev_kfree_skb_irq(skbs[i]);
599 }
600
601 total_count += count;
602
603 /* If the batch was full, try to clean more */
604 if (count == 32)
605 goto restart;
606
607 return total_count;
f5cd7872
OJ		 608}
609
610
611static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
612{
613 struct net_device *dev = data;
614 struct pasemi_mac *mac = netdev_priv(dev);
615 unsigned int reg;
616
6dfa7522 617 if (!(*mac->rx_status & PAS_STATUS_CAUSE_M))
f5cd7872
OJ		 618 return IRQ_NONE;
619
6dfa7522
OJ		 620 if (*mac->rx_status & PAS_STATUS_ERROR)
621 printk("rx_status reported error\n");
622
623 /* Don't reset packet count so it won't fire again but clear
624 * all others.
625 */
626
6dfa7522
OJ		 627 reg = 0;
628 if (*mac->rx_status & PAS_STATUS_SOFT)
629 reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
630 if (*mac->rx_status & PAS_STATUS_ERROR)
631 reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
f5cd7872
OJ		 632 if (*mac->rx_status & PAS_STATUS_TIMER)
633 reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
634
bea3348e 635 netif_rx_schedule(dev, &mac->napi);
6dfa7522 636
a85b9422 637 write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
f5cd7872
OJ		 638
639 return IRQ_HANDLED;
640}
641
642static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
643{
644 struct net_device *dev = data;
645 struct pasemi_mac *mac = netdev_priv(dev);
52a94351 646 unsigned int reg, pcnt;
f5cd7872 647
6dfa7522 648 if (!(*mac->tx_status & PAS_STATUS_CAUSE_M))
f5cd7872
OJ		 649 return IRQ_NONE;
650
651 pasemi_mac_clean_tx(mac);
652
52a94351
OJ		 653 pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
654
655 reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
6dfa7522
OJ		 656
657 if (*mac->tx_status & PAS_STATUS_SOFT)
658 reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
659 if (*mac->tx_status & PAS_STATUS_ERROR)
660 reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
f5cd7872 661
a85b9422 662 write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
f5cd7872 663
f5cd7872
OJ		 664 return IRQ_HANDLED;
665}
666
bb6e9590
OJ		 667static void pasemi_adjust_link(struct net_device *dev)
668{
669 struct pasemi_mac *mac = netdev_priv(dev);
670 int msg;
671 unsigned int flags;
672 unsigned int new_flags;
673
674 if (!mac->phydev->link) {
675 /* If no link, MAC speed settings don't matter. Just report
676 * link down and return.
677 */
678 if (mac->link && netif_msg_link(mac))
679 printk(KERN_INFO "%s: Link is down.\n", dev->name);
680
681 netif_carrier_off(dev);
682 mac->link = 0;
683
684 return;
685 } else
686 netif_carrier_on(dev);
687
a85b9422 688 flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
bb6e9590
OJ		 689 new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
690 PAS_MAC_CFG_PCFG_TSR_M);
691
692 if (!mac->phydev->duplex)
693 new_flags |= PAS_MAC_CFG_PCFG_HD;
694
695 switch (mac->phydev->speed) {
696 case 1000:
697 new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
698 PAS_MAC_CFG_PCFG_TSR_1G;
699 break;
700 case 100:
701 new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
702 PAS_MAC_CFG_PCFG_TSR_100M;
703 break;
704 case 10:
705 new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
706 PAS_MAC_CFG_PCFG_TSR_10M;
707 break;
708 default:
709 printk("Unsupported speed %d\n", mac->phydev->speed);
710 }
711
712 /* Print on link or speed/duplex change */
713 msg = mac->link != mac->phydev->link || flags != new_flags;
714
715 mac->duplex = mac->phydev->duplex;
716 mac->speed = mac->phydev->speed;
717 mac->link = mac->phydev->link;
718
719 if (new_flags != flags)
a85b9422 720 write_mac_reg(mac, PAS_MAC_CFG_PCFG, new_flags);
bb6e9590
OJ		 721
722 if (msg && netif_msg_link(mac))
723 printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
724 dev->name, mac->speed, mac->duplex ? "full" : "half");
725}
726
727static int pasemi_mac_phy_init(struct net_device *dev)
728{
729 struct pasemi_mac *mac = netdev_priv(dev);
730 struct device_node *dn, *phy_dn;
731 struct phy_device *phydev;
732 unsigned int phy_id;
733 const phandle *ph;
734 const unsigned int *prop;
735 struct resource r;
736 int ret;
737
738 dn = pci_device_to_OF_node(mac->pdev);
9028780a 739 ph = of_get_property(dn, "phy-handle", NULL);
bb6e9590
OJ		 740 if (!ph)
741 return -ENODEV;
742 phy_dn = of_find_node_by_phandle(*ph);
743
9028780a 744 prop = of_get_property(phy_dn, "reg", NULL);
bb6e9590
OJ		 745 ret = of_address_to_resource(phy_dn->parent, 0, &r);
746 if (ret)
747 goto err;
748
749 phy_id = *prop;
750 snprintf(mac->phy_id, BUS_ID_SIZE, PHY_ID_FMT, (int)r.start, phy_id);
751
752 of_node_put(phy_dn);
753
754 mac->link = 0;
755 mac->speed = 0;
756 mac->duplex = -1;
757
758 phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
759
760 if (IS_ERR(phydev)) {
761 printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
762 return PTR_ERR(phydev);
763 }
764
765 mac->phydev = phydev;
766
767 return 0;
768
769err:
770 of_node_put(phy_dn);
771 return -ENODEV;
772}
773
774
f5cd7872
OJ		 775static int pasemi_mac_open(struct net_device *dev)
776{
777 struct pasemi_mac *mac = netdev_priv(dev);
771f7404 778 int base_irq;
f5cd7872
OJ		 779 unsigned int flags;
780 int ret;
781
782 /* enable rx section */
a85b9422 783 write_dma_reg(mac, PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
f5cd7872
OJ		 784
785 /* enable tx section */
a85b9422 786 write_dma_reg(mac, PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
f5cd7872
OJ		 787
788 flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
789 PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
790 PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
791
a85b9422 792 write_mac_reg(mac, PAS_MAC_CFG_TXP, flags);
f5cd7872
OJ		 793
794 flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PE |
795 PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
796
797 flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
798
a85b9422
OJ		 799 write_iob_reg(mac, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
800 PAS_IOB_DMA_RXCH_CFG_CNTTH(0));
f5cd7872 801
a85b9422 802 write_iob_reg(mac, PAS_IOB_DMA_TXCH_CFG(mac->dma_txch),
02df6cfa 803 PAS_IOB_DMA_TXCH_CFG_CNTTH(128));
f5cd7872 804
1b0335ea
OJ		 805 /* Clear out any residual packet count state from firmware */
806 pasemi_mac_restart_rx_intr(mac);
807 pasemi_mac_restart_tx_intr(mac);
808
6dfa7522 809 /* 0xffffff is max value, about 16ms */
a85b9422
OJ		 810 write_iob_reg(mac, PAS_IOB_DMA_COM_TIMEOUTCFG,
811 PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0xffffff));
f5cd7872 812
a85b9422 813 write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
f5cd7872
OJ		 814
815 ret = pasemi_mac_setup_rx_resources(dev);
816 if (ret)
817 goto out_rx_resources;
818
819 ret = pasemi_mac_setup_tx_resources(dev);
820 if (ret)
821 goto out_tx_resources;
822
a85b9422
OJ		 823 write_mac_reg(mac, PAS_MAC_IPC_CHNL,
824 PAS_MAC_IPC_CHNL_DCHNO(mac->dma_rxch) |
825 PAS_MAC_IPC_CHNL_BCH(mac->dma_rxch));
f5cd7872
OJ		 826
827 /* enable rx if */
a85b9422
OJ		 828 write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
829 PAS_DMA_RXINT_RCMDSTA_EN);
f5cd7872
OJ		 830
831 /* enable rx channel */
a85b9422
OJ		 832 write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
833 PAS_DMA_RXCHAN_CCMDSTA_EN |
834 PAS_DMA_RXCHAN_CCMDSTA_DU);
f5cd7872
OJ		 835
836 /* enable tx channel */
a85b9422
OJ		 837 write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
838 PAS_DMA_TXCHAN_TCMDSTA_EN);
f5cd7872
OJ		 839
840 pasemi_mac_replenish_rx_ring(dev);
841
bb6e9590
OJ		 842 ret = pasemi_mac_phy_init(dev);
843 /* Some configs don't have PHYs (XAUI etc), so don't complain about
844 * failed init due to -ENODEV.
845 */
846 if (ret && ret != -ENODEV)
847 dev_warn(&mac->pdev->dev, "phy init failed: %d\n", ret);
848
f5cd7872 849 netif_start_queue(dev);
bea3348e 850 napi_enable(&mac->napi);
f5cd7872 851
771f7404
OJ		 852 /* Interrupts are a bit different for our DMA controller: While
853 * it's got one a regular PCI device header, the interrupt there
854 * is really the base of the range it's using. Each tx and rx
855 * channel has it's own interrupt source.
856 */
857
858 base_irq = virq_to_hw(mac->dma_pdev->irq);
859
860 mac->tx_irq = irq_create_mapping(NULL, base_irq + mac->dma_txch);
861 mac->rx_irq = irq_create_mapping(NULL, base_irq + 20 + mac->dma_txch);
862
863 ret = request_irq(mac->tx_irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
f5cd7872
OJ		 864 mac->tx->irq_name, dev);
865 if (ret) {
866 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
771f7404 867 base_irq + mac->dma_txch, ret);
f5cd7872
OJ		 868 goto out_tx_int;
869 }
870
771f7404 871 ret = request_irq(mac->rx_irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
f5cd7872
OJ		 872 mac->rx->irq_name, dev);
873 if (ret) {
874 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
771f7404 875 base_irq + 20 + mac->dma_rxch, ret);
f5cd7872
OJ		 876 goto out_rx_int;
877 }
878
bb6e9590
OJ		 879 if (mac->phydev)
880 phy_start(mac->phydev);
881
f5cd7872
OJ		 882 return 0;
883
884out_rx_int:
771f7404 885 free_irq(mac->tx_irq, dev);
f5cd7872 886out_tx_int:
bea3348e 887 napi_disable(&mac->napi);
f5cd7872
OJ		 888 netif_stop_queue(dev);
889 pasemi_mac_free_tx_resources(dev);
890out_tx_resources:
891 pasemi_mac_free_rx_resources(dev);
892out_rx_resources:
893
894 return ret;
895}
896
897#define MAX_RETRIES 5000
898
899static int pasemi_mac_close(struct net_device *dev)
900{
901 struct pasemi_mac *mac = netdev_priv(dev);
902 unsigned int stat;
903 int retries;
904
bb6e9590
OJ		 905 if (mac->phydev) {
906 phy_stop(mac->phydev);
907 phy_disconnect(mac->phydev);
908 }
909
f5cd7872 910 netif_stop_queue(dev);
bea3348e 911 napi_disable(&mac->napi);
f5cd7872
OJ		 912
913 /* Clean out any pending buffers */
914 pasemi_mac_clean_tx(mac);
915 pasemi_mac_clean_rx(mac, RX_RING_SIZE);
916
917 /* Disable interface */
a85b9422
OJ		 918 write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), PAS_DMA_TXCHAN_TCMDSTA_ST);
919 write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), PAS_DMA_RXINT_RCMDSTA_ST);
920 write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), PAS_DMA_RXCHAN_CCMDSTA_ST);
f5cd7872
OJ		 921
922 for (retries = 0; retries < MAX_RETRIES; retries++) {
a85b9422 923 stat = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
0ce68c74 924 if (!(stat & PAS_DMA_TXCHAN_TCMDSTA_ACT))
f5cd7872
OJ		 925 break;
926 cond_resched();
927 }
928
0ce68c74 929 if (stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)
f5cd7872 930 dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
f5cd7872
OJ		 931
932 for (retries = 0; retries < MAX_RETRIES; retries++) {
a85b9422 933 stat = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
0ce68c74 934 if (!(stat & PAS_DMA_RXCHAN_CCMDSTA_ACT))
f5cd7872
OJ		 935 break;
936 cond_resched();
937 }
938
0ce68c74 939 if (stat & PAS_DMA_RXCHAN_CCMDSTA_ACT)
f5cd7872 940 dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
f5cd7872
OJ		 941
942 for (retries = 0; retries < MAX_RETRIES; retries++) {
a85b9422 943 stat = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
0ce68c74 944 if (!(stat & PAS_DMA_RXINT_RCMDSTA_ACT))
f5cd7872
OJ		 945 break;
946 cond_resched();
947 }
948
0ce68c74 949 if (stat & PAS_DMA_RXINT_RCMDSTA_ACT)
f5cd7872 950 dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
f5cd7872
OJ		 951
952 /* Then, disable the channel. This must be done separately from
953 * stopping, since you can't disable when active.
954 */
955
a85b9422
OJ		 956 write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), 0);
957 write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), 0);
958 write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
f5cd7872 959
771f7404
OJ		 960 free_irq(mac->tx_irq, dev);
961 free_irq(mac->rx_irq, dev);
f5cd7872
OJ		 962
963 /* Free resources */
964 pasemi_mac_free_rx_resources(dev);
965 pasemi_mac_free_tx_resources(dev);
966
967 return 0;
968}
969
970static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
971{
972 struct pasemi_mac *mac = netdev_priv(dev);
973 struct pasemi_mac_txring *txring;
974 struct pasemi_mac_buffer *info;
975 struct pas_dma_xct_descr *dp;
26fcfa95 976 u64 dflags, mactx, ptr;
f5cd7872
OJ		 977 dma_addr_t map;
978 int flags;
979
980 dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_SS | XCT_MACTX_CRC_PAD;
981
982 if (skb->ip_summed == CHECKSUM_PARTIAL) {
d56f90a7
ACM		 983 const unsigned char *nh = skb_network_header(skb);
984
eddc9ec5 985 switch (ip_hdr(skb)->protocol) {
f5cd7872
OJ		 986 case IPPROTO_TCP:
987 dflags |= XCT_MACTX_CSUM_TCP;
cfe1fc77 988 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
d56f90a7 989 dflags |= XCT_MACTX_IPO(nh - skb->data);
f5cd7872
OJ		 990 break;
991 case IPPROTO_UDP:
992 dflags |= XCT_MACTX_CSUM_UDP;
cfe1fc77 993 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
d56f90a7 994 dflags |= XCT_MACTX_IPO(nh - skb->data);
f5cd7872
OJ		 995 break;
996 }
997 }
998
999 map = pci_map_single(mac->dma_pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1000
1001 if (dma_mapping_error(map))
1002 return NETDEV_TX_BUSY;
1003
26fcfa95
OJ		 1004 mactx = dflags | XCT_MACTX_LLEN(skb->len);
1005 ptr = XCT_PTR_LEN(skb->len) | XCT_PTR_ADDR(map);
1006
f5cd7872
OJ		 1007 txring = mac->tx;
1008
1009 spin_lock_irqsave(&txring->lock, flags);
1010
021fa22e 1011 if (RING_AVAIL(txring) <= 1) {
f5cd7872
OJ		 1012 spin_unlock_irqrestore(&txring->lock, flags);
1013 pasemi_mac_clean_tx(mac);
52a94351 1014 pasemi_mac_restart_tx_intr(mac);
f5cd7872
OJ		 1015 spin_lock_irqsave(&txring->lock, flags);
1016
021fa22e 1017 if (RING_AVAIL(txring) <= 1) {
f5cd7872
OJ		 1018 /* Still no room -- stop the queue and wait for tx
1019 * intr when there's room.
1020 */
1021 netif_stop_queue(dev);
1022 goto out_err;
1023 }
1024 }
1025
021fa22e
OJ		 1026 dp = &TX_DESC(mac, txring->next_to_fill);
1027 info = &TX_DESC_INFO(mac, txring->next_to_fill);
f5cd7872 1028
26fcfa95
OJ		 1029 dp->mactx = mactx;
1030 dp->ptr = ptr;
f5cd7872
OJ		 1031 info->dma = map;
1032 info->skb = skb;
1033
021fa22e 1034 txring->next_to_fill++;
f5cd7872
OJ		 1035 mac->stats.tx_packets++;
1036 mac->stats.tx_bytes += skb->len;
1037
1038 spin_unlock_irqrestore(&txring->lock, flags);
1039
a85b9422 1040 write_dma_reg(mac, PAS_DMA_TXCHAN_INCR(mac->dma_txch), 1);
f5cd7872
OJ		 1041
1042 return NETDEV_TX_OK;
1043
1044out_err:
1045 spin_unlock_irqrestore(&txring->lock, flags);
1046 pci_unmap_single(mac->dma_pdev, map, skb->len, PCI_DMA_TODEVICE);
1047 return NETDEV_TX_BUSY;
1048}
1049
1050static struct net_device_stats *pasemi_mac_get_stats(struct net_device *dev)
1051{
1052 struct pasemi_mac *mac = netdev_priv(dev);
1053
1054 return &mac->stats;
1055}
1056
ceb51361 1057
f5cd7872
OJ		 1058static void pasemi_mac_set_rx_mode(struct net_device *dev)
1059{
1060 struct pasemi_mac *mac = netdev_priv(dev);
1061 unsigned int flags;
1062
a85b9422 1063 flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
f5cd7872
OJ		 1064
1065 /* Set promiscuous */
1066 if (dev->flags & IFF_PROMISC)
1067 flags |= PAS_MAC_CFG_PCFG_PR;
1068 else
1069 flags &= ~PAS_MAC_CFG_PCFG_PR;
1070
a85b9422 1071 write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
f5cd7872
OJ		 1072}
1073
1074
bea3348e 1075static int pasemi_mac_poll(struct napi_struct *napi, int budget)
f5cd7872 1076{
bea3348e
SH		 1077 struct pasemi_mac *mac = container_of(napi, struct pasemi_mac, napi);
1078 struct net_device *dev = mac->netdev;
1079 int pkts;
f5cd7872 1080
829185e9 1081 pasemi_mac_clean_tx(mac);
bea3348e
SH		 1082 pkts = pasemi_mac_clean_rx(mac, budget);
1083 if (pkts < budget) {
f5cd7872 1084 /* all done, no more packets present */
bea3348e 1085 netif_rx_complete(dev, napi);
f5cd7872 1086
1b0335ea 1087 pasemi_mac_restart_rx_intr(mac);
f5cd7872 1088 }
bea3348e 1089 return pkts;
f5cd7872
OJ		 1090}
1091
b6e05a1b
OJ		 1092static void __iomem * __devinit map_onedev(struct pci_dev *p, int index)
1093{
1094 struct device_node *dn;
1095 void __iomem *ret;
1096
1097 dn = pci_device_to_OF_node(p);
1098 if (!dn)
1099 goto fallback;
1100
1101 ret = of_iomap(dn, index);
1102 if (!ret)
1103 goto fallback;
1104
1105 return ret;
1106fallback:
1107 /* This is hardcoded and ugly, but we have some firmware versions
1108 * that don't provide the register space in the device tree. Luckily
1109 * they are at well-known locations so we can just do the math here.
1110 */
1111 return ioremap(0xe0000000 + (p->devfn << 12), 0x2000);
1112}
1113
1114static int __devinit pasemi_mac_map_regs(struct pasemi_mac *mac)
1115{
1116 struct resource res;
1117 struct device_node *dn;
1118 int err;
1119
1120 mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
1121 if (!mac->dma_pdev) {
1122 dev_err(&mac->pdev->dev, "Can't find DMA Controller\n");
1123 return -ENODEV;
1124 }
1125
1126 mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
1127 if (!mac->iob_pdev) {
1128 dev_err(&mac->pdev->dev, "Can't find I/O Bridge\n");
1129 return -ENODEV;
1130 }
1131
1132 mac->regs = map_onedev(mac->pdev, 0);
1133 mac->dma_regs = map_onedev(mac->dma_pdev, 0);
1134 mac->iob_regs = map_onedev(mac->iob_pdev, 0);
1135
1136 if (!mac->regs || !mac->dma_regs || !mac->iob_regs) {
1137 dev_err(&mac->pdev->dev, "Can't map registers\n");
1138 return -ENODEV;
1139 }
1140
1141 /* The dma status structure is located in the I/O bridge, and
1142 * is cache coherent.
1143 */
1144 if (!dma_status) {
1145 dn = pci_device_to_OF_node(mac->iob_pdev);
1146 if (dn)
1147 err = of_address_to_resource(dn, 1, &res);
1148 if (!dn || err) {
1149 /* Fallback for old firmware */
1150 res.start = 0xfd800000;
1151 res.end = res.start + 0x1000;
1152 }
1153 dma_status = __ioremap(res.start, res.end-res.start, 0);
1154 }
1155
1156 return 0;
1157}
1158
f5cd7872
OJ		 1159static int __devinit
1160pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1161{
1162 static int index = 0;
1163 struct net_device *dev;
1164 struct pasemi_mac *mac;
1165 int err;
1166
1167 err = pci_enable_device(pdev);
1168 if (err)
1169 return err;
1170
1171 dev = alloc_etherdev(sizeof(struct pasemi_mac));
1172 if (dev == NULL) {
1173 dev_err(&pdev->dev,
1174 "pasemi_mac: Could not allocate ethernet device.\n");
1175 err = -ENOMEM;
1176 goto out_disable_device;
1177 }
1178
f5cd7872
OJ		 1179 pci_set_drvdata(pdev, dev);
1180 SET_NETDEV_DEV(dev, &pdev->dev);
1181
1182 mac = netdev_priv(dev);
1183
1184 mac->pdev = pdev;
1185 mac->netdev = dev;
f5cd7872 1186
bea3348e
SH		 1187 netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
1188
6fba848a 1189 dev->features = NETIF_F_HW_CSUM | NETIF_F_LLTX;
bea3348e 1190
f5cd7872
OJ		 1191 /* These should come out of the device tree eventually */
1192 mac->dma_txch = index;
1193 mac->dma_rxch = index;
1194
1195 /* We probe GMAC before XAUI, but the DMA interfaces are
1196 * in XAUI, GMAC order.
1197 */
1198 if (index < 4)
1199 mac->dma_if = index + 2;
1200 else
1201 mac->dma_if = index - 4;
1202 index++;
1203
1204 switch (pdev->device) {
1205 case 0xa005:
1206 mac->type = MAC_TYPE_GMAC;
1207 break;
1208 case 0xa006:
1209 mac->type = MAC_TYPE_XAUI;
1210 break;
1211 default:
1212 err = -ENODEV;
1213 goto out;
1214 }
1215
1216 /* get mac addr from device tree */
1217 if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
1218 err = -ENODEV;
1219 goto out;
1220 }
1221 memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
1222
1223 dev->open = pasemi_mac_open;
1224 dev->stop = pasemi_mac_close;
1225 dev->hard_start_xmit = pasemi_mac_start_tx;
1226 dev->get_stats = pasemi_mac_get_stats;
1227 dev->set_multicast_list = pasemi_mac_set_rx_mode;
f5cd7872 1228
b6e05a1b
OJ		 1229 err = pasemi_mac_map_regs(mac);
1230 if (err)
1231 goto out;
f5cd7872
OJ		 1232
1233 mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
1234 mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
1235
ceb51361
OJ		 1236 mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
1237
bb6e9590
OJ		 1238 /* Enable most messages by default */
1239 mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
1240
f5cd7872
OJ		 1241 err = register_netdev(dev);
1242
1243 if (err) {
1244 dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
1245 err);
1246 goto out;
1247 } else
1248 printk(KERN_INFO "%s: PA Semi %s: intf %d, txch %d, rxch %d, "
1249 "hw addr %02x:%02x:%02x:%02x:%02x:%02x\n",
1250 dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
1251 mac->dma_if, mac->dma_txch, mac->dma_rxch,
1252 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1253 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1254
1255 return err;
1256
1257out:
b6e05a1b
OJ		 1258 if (mac->iob_pdev)
1259 pci_dev_put(mac->iob_pdev);
1260 if (mac->dma_pdev)
1261 pci_dev_put(mac->dma_pdev);
1262 if (mac->dma_regs)
1263 iounmap(mac->dma_regs);
1264 if (mac->iob_regs)
1265 iounmap(mac->iob_regs);
1266 if (mac->regs)
1267 iounmap(mac->regs);
1268
f5cd7872
OJ		 1269 free_netdev(dev);
1270out_disable_device:
1271 pci_disable_device(pdev);
1272 return err;
1273
1274}
1275
1276static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
1277{
1278 struct net_device *netdev = pci_get_drvdata(pdev);
1279 struct pasemi_mac *mac;
1280
1281 if (!netdev)
1282 return;
1283
1284 mac = netdev_priv(netdev);
1285
1286 unregister_netdev(netdev);
1287
1288 pci_disable_device(pdev);
1289 pci_dev_put(mac->dma_pdev);
1290 pci_dev_put(mac->iob_pdev);
1291
b6e05a1b
OJ		 1292 iounmap(mac->regs);
1293 iounmap(mac->dma_regs);
1294 iounmap(mac->iob_regs);
1295
f5cd7872
OJ		 1296 pci_set_drvdata(pdev, NULL);
1297 free_netdev(netdev);
1298}
1299
1300static struct pci_device_id pasemi_mac_pci_tbl[] = {
1301 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
1302 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
fd178254 1303 { },
f5cd7872
OJ		 1304};
1305
1306MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
1307
1308static struct pci_driver pasemi_mac_driver = {
1309 .name = "pasemi_mac",
1310 .id_table = pasemi_mac_pci_tbl,
1311 .probe = pasemi_mac_probe,
1312 .remove = __devexit_p(pasemi_mac_remove),
1313};
1314
1315static void __exit pasemi_mac_cleanup_module(void)
1316{
1317 pci_unregister_driver(&pasemi_mac_driver);
1318 __iounmap(dma_status);
1319 dma_status = NULL;
1320}
1321
1322int pasemi_mac_init_module(void)
1323{
1324 return pci_register_driver(&pasemi_mac_driver);
1325}
1326
f5cd7872
OJ		 1327module_init(pasemi_mac_init_module);
1328module_exit(pasemi_mac_cleanup_module);
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