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1da177e4
LT		 1/* ----------------------------------------------------------------------------
2Linux PCMCIA ethernet adapter driver for the New Media Ethernet LAN.
3 nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao
4
5 The Ethernet LAN uses the Advanced Micro Devices (AMD) Am79C940 Media
6 Access Controller for Ethernet (MACE). It is essentially the Am2150
7 PCMCIA Ethernet card contained in the Am2150 Demo Kit.
8
9Written by Roger C. Pao <rpao@paonet.org>
10 Copyright 1995 Roger C. Pao
11 Linux 2.5 cleanups Copyright Red Hat 2003
12
13 This software may be used and distributed according to the terms of
14 the GNU General Public License.
15
16Ported to Linux 1.3.* network driver environment by
17 Matti Aarnio <mea@utu.fi>
18
19References
20
21 Am2150 Technical Reference Manual, Revision 1.0, August 17, 1993
22 Am79C940 (MACE) Data Sheet, 1994
23 Am79C90 (C-LANCE) Data Sheet, 1994
24 Linux PCMCIA Programmer's Guide v1.17
25 /usr/src/linux/net/inet/dev.c, Linux kernel 1.2.8
26
27 Eric Mears, New Media Corporation
28 Tom Pollard, New Media Corporation
29 Dean Siasoyco, New Media Corporation
30 Ken Lesniak, Silicon Graphics, Inc. <lesniak@boston.sgi.com>
31 Donald Becker <becker@scyld.com>
32 David Hinds <dahinds@users.sourceforge.net>
33
34 The Linux client driver is based on the 3c589_cs.c client driver by
35 David Hinds.
36
37 The Linux network driver outline is based on the 3c589_cs.c driver,
38 the 8390.c driver, and the example skeleton.c kernel code, which are
39 by Donald Becker.
40
41 The Am2150 network driver hardware interface code is based on the
42 OS/9000 driver for the New Media Ethernet LAN by Eric Mears.
43
44 Special thanks for testing and help in debugging this driver goes
45 to Ken Lesniak.
46
47-------------------------------------------------------------------------------
48Driver Notes and Issues
49-------------------------------------------------------------------------------
50
511. Developed on a Dell 320SLi
52 PCMCIA Card Services 2.6.2
53 Linux dell 1.2.10 #1 Thu Jun 29 20:23:41 PDT 1995 i386
54
552. rc.pcmcia may require loading pcmcia_core with io_speed=300:
56 'insmod pcmcia_core.o io_speed=300'.
57 This will avoid problems with fast systems which causes rx_framecnt
58 to return random values.
59
603. If hot extraction does not work for you, use 'ifconfig eth0 down'
61 before extraction.
62
634. There is a bad slow-down problem in this driver.
64
655. Future: Multicast processing. In the meantime, do _not_ compile your
66 kernel with multicast ip enabled.
67
68-------------------------------------------------------------------------------
69History
70-------------------------------------------------------------------------------
71Log: nmclan_cs.c,v
72 * 2.5.75-ac1 2003/07/11 Alan Cox <alan@redhat.com>
73 * Fixed hang on card eject as we probe it
74 * Cleaned up to use new style locking.
75 *
76 * Revision 0.16 1995/07/01 06:42:17 rpao
77 * Bug fix: nmclan_reset() called CardServices incorrectly.
78 *
79 * Revision 0.15 1995/05/24 08:09:47 rpao
80 * Re-implement MULTI_TX dev->tbusy handling.
81 *
82 * Revision 0.14 1995/05/23 03:19:30 rpao
83 * Added, in nmclan_config(), "tuple.Attributes = 0;".
84 * Modified MACE ID check to ignore chip revision level.
85 * Avoid tx_free_frames race condition between _start_xmit and _interrupt.
86 *
87 * Revision 0.13 1995/05/18 05:56:34 rpao
88 * Statistics changes.
89 * Bug fix: nmclan_reset did not enable TX and RX: call restore_multicast_list.
90 * Bug fix: mace_interrupt checks ~MACE_IMR_DEFAULT. Fixes driver lockup.
91 *
92 * Revision 0.12 1995/05/14 00:12:23 rpao
93 * Statistics overhaul.
94 *
95
9695/05/13 rpao V0.10a
97 Bug fix: MACE statistics counters used wrong I/O ports.
98 Bug fix: mace_interrupt() needed to allow statistics to be
99 processed without RX or TX interrupts pending.
10095/05/11 rpao V0.10
101 Multiple transmit request processing.
102 Modified statistics to use MACE counters where possible.
10395/05/10 rpao V0.09 Bug fix: Must use IO_DATA_PATH_WIDTH_AUTO.
104 *Released
10595/05/10 rpao V0.08
106 Bug fix: Make all non-exported functions private by using
107 static keyword.
108 Bug fix: Test IntrCnt _before_ reading MACE_IR.
10995/05/10 rpao V0.07 Statistics.
11095/05/09 rpao V0.06 Fix rx_framecnt problem by addition of PCIC wait states.
111
112---------------------------------------------------------------------------- */
113
114#define DRV_NAME "nmclan_cs"
115#define DRV_VERSION "0.16"
116
117
118/* ----------------------------------------------------------------------------
119Conditional Compilation Options
120---------------------------------------------------------------------------- */
121
122#define MULTI_TX 0
123#define RESET_ON_TIMEOUT 1
124#define TX_INTERRUPTABLE 1
125#define RESET_XILINX 0
126
127/* ----------------------------------------------------------------------------
128Include Files
129---------------------------------------------------------------------------- */
130
131#include <linux/module.h>
132#include <linux/kernel.h>
133#include <linux/init.h>
134#include <linux/ptrace.h>
135#include <linux/slab.h>
136#include <linux/string.h>
137#include <linux/timer.h>
138#include <linux/interrupt.h>
139#include <linux/in.h>
140#include <linux/delay.h>
141#include <linux/ethtool.h>
142#include <linux/netdevice.h>
143#include <linux/etherdevice.h>
144#include <linux/skbuff.h>
145#include <linux/if_arp.h>
146#include <linux/ioport.h>
147#include <linux/bitops.h>
148
1da177e4
LT		 149#include <pcmcia/cs_types.h>
150#include <pcmcia/cs.h>
151#include <pcmcia/cisreg.h>
152#include <pcmcia/cistpl.h>
153#include <pcmcia/ds.h>
154
155#include <asm/uaccess.h>
156#include <asm/io.h>
157#include <asm/system.h>
158
159/* ----------------------------------------------------------------------------
160Defines
161---------------------------------------------------------------------------- */
162
163#define ETHER_ADDR_LEN ETH_ALEN
164 /* 6 bytes in an Ethernet Address */
165#define MACE_LADRF_LEN 8
166 /* 8 bytes in Logical Address Filter */
167
168/* Loop Control Defines */
169#define MACE_MAX_IR_ITERATIONS 10
170#define MACE_MAX_RX_ITERATIONS 12
171 /*
172 TBD: Dean brought this up, and I assumed the hardware would
173 handle it:
174
175 If MACE_MAX_RX_ITERATIONS is > 1, rx_framecnt may still be
176 non-zero when the isr exits. We may not get another interrupt
177 to process the remaining packets for some time.
178 */
179
180/*
181The Am2150 has a Xilinx XC3042 field programmable gate array (FPGA)
182which manages the interface between the MACE and the PCMCIA bus. It
183also includes buffer management for the 32K x 8 SRAM to control up to
184four transmit and 12 receive frames at a time.
185*/
186#define AM2150_MAX_TX_FRAMES 4
187#define AM2150_MAX_RX_FRAMES 12
188
189/* Am2150 Ethernet Card I/O Mapping */
190#define AM2150_RCV 0x00
191#define AM2150_XMT 0x04
192#define AM2150_XMT_SKIP 0x09
193#define AM2150_RCV_NEXT 0x0A
194#define AM2150_RCV_FRAME_COUNT 0x0B
195#define AM2150_MACE_BANK 0x0C
196#define AM2150_MACE_BASE 0x10
197
198/* MACE Registers */
199#define MACE_RCVFIFO 0
200#define MACE_XMTFIFO 1
201#define MACE_XMTFC 2
202#define MACE_XMTFS 3
203#define MACE_XMTRC 4
204#define MACE_RCVFC 5
205#define MACE_RCVFS 6
206#define MACE_FIFOFC 7
207#define MACE_IR 8
208#define MACE_IMR 9
209#define MACE_PR 10
210#define MACE_BIUCC 11
211#define MACE_FIFOCC 12
212#define MACE_MACCC 13
213#define MACE_PLSCC 14
214#define MACE_PHYCC 15
215#define MACE_CHIPIDL 16
216#define MACE_CHIPIDH 17
217#define MACE_IAC 18
218/* Reserved */
219#define MACE_LADRF 20
220#define MACE_PADR 21
221/* Reserved */
222/* Reserved */
223#define MACE_MPC 24
224/* Reserved */
225#define MACE_RNTPC 26
226#define MACE_RCVCC 27
227/* Reserved */
228#define MACE_UTR 29
229#define MACE_RTR1 30
230#define MACE_RTR2 31
231
232/* MACE Bit Masks */
233#define MACE_XMTRC_EXDEF 0x80
234#define MACE_XMTRC_XMTRC 0x0F
235
236#define MACE_XMTFS_XMTSV 0x80
237#define MACE_XMTFS_UFLO 0x40
238#define MACE_XMTFS_LCOL 0x20
239#define MACE_XMTFS_MORE 0x10
240#define MACE_XMTFS_ONE 0x08
241#define MACE_XMTFS_DEFER 0x04
242#define MACE_XMTFS_LCAR 0x02
243#define MACE_XMTFS_RTRY 0x01
244
245#define MACE_RCVFS_RCVSTS 0xF000
246#define MACE_RCVFS_OFLO 0x8000
247#define MACE_RCVFS_CLSN 0x4000
248#define MACE_RCVFS_FRAM 0x2000
249#define MACE_RCVFS_FCS 0x1000
250
251#define MACE_FIFOFC_RCVFC 0xF0
252#define MACE_FIFOFC_XMTFC 0x0F
253
254#define MACE_IR_JAB 0x80
255#define MACE_IR_BABL 0x40
256#define MACE_IR_CERR 0x20
257#define MACE_IR_RCVCCO 0x10
258#define MACE_IR_RNTPCO 0x08
259#define MACE_IR_MPCO 0x04
260#define MACE_IR_RCVINT 0x02
261#define MACE_IR_XMTINT 0x01
262
263#define MACE_MACCC_PROM 0x80
264#define MACE_MACCC_DXMT2PD 0x40
265#define MACE_MACCC_EMBA 0x20
266#define MACE_MACCC_RESERVED 0x10
267#define MACE_MACCC_DRCVPA 0x08
268#define MACE_MACCC_DRCVBC 0x04
269#define MACE_MACCC_ENXMT 0x02
270#define MACE_MACCC_ENRCV 0x01
271
272#define MACE_PHYCC_LNKFL 0x80
273#define MACE_PHYCC_DLNKTST 0x40
274#define MACE_PHYCC_REVPOL 0x20
275#define MACE_PHYCC_DAPC 0x10
276#define MACE_PHYCC_LRT 0x08
277#define MACE_PHYCC_ASEL 0x04
278#define MACE_PHYCC_RWAKE 0x02
279#define MACE_PHYCC_AWAKE 0x01
280
281#define MACE_IAC_ADDRCHG 0x80
282#define MACE_IAC_PHYADDR 0x04
283#define MACE_IAC_LOGADDR 0x02
284
285#define MACE_UTR_RTRE 0x80
286#define MACE_UTR_RTRD 0x40
287#define MACE_UTR_RPA 0x20
288#define MACE_UTR_FCOLL 0x10
289#define MACE_UTR_RCVFCSE 0x08
290#define MACE_UTR_LOOP_INCL_MENDEC 0x06
291#define MACE_UTR_LOOP_NO_MENDEC 0x04
292#define MACE_UTR_LOOP_EXTERNAL 0x02
293#define MACE_UTR_LOOP_NONE 0x00
294#define MACE_UTR_RESERVED 0x01
295
296/* Switch MACE register bank (only 0 and 1 are valid) */
297#define MACEBANK(win_num) outb((win_num), ioaddr + AM2150_MACE_BANK)
298
299#define MACE_IMR_DEFAULT \
300 (0xFF - \
301 ( \
302 MACE_IR_CERR | \
303 MACE_IR_RCVCCO | \
304 MACE_IR_RNTPCO | \
305 MACE_IR_MPCO | \
306 MACE_IR_RCVINT | \
307 MACE_IR_XMTINT \
308 ) \
309 )
310#undef MACE_IMR_DEFAULT
311#define MACE_IMR_DEFAULT 0x00 /* New statistics handling: grab everything */
312
313#define TX_TIMEOUT ((400*HZ)/1000)
314
315/* ----------------------------------------------------------------------------
316Type Definitions
317---------------------------------------------------------------------------- */
318
319typedef struct _mace_statistics {
320 /* MACE_XMTFS */
321 int xmtsv;
322 int uflo;
323 int lcol;
324 int more;
325 int one;
326 int defer;
327 int lcar;
328 int rtry;
329
330 /* MACE_XMTRC */
331 int exdef;
332 int xmtrc;
333
334 /* RFS1--Receive Status (RCVSTS) */
335 int oflo;
336 int clsn;
337 int fram;
338 int fcs;
339
340 /* RFS2--Runt Packet Count (RNTPC) */
341 int rfs_rntpc;
342
343 /* RFS3--Receive Collision Count (RCVCC) */
344 int rfs_rcvcc;
345
346 /* MACE_IR */
347 int jab;
348 int babl;
349 int cerr;
350 int rcvcco;
351 int rntpco;
352 int mpco;
353
354 /* MACE_MPC */
355 int mpc;
356
357 /* MACE_RNTPC */
358 int rntpc;
359
360 /* MACE_RCVCC */
361 int rcvcc;
362} mace_statistics;
363
364typedef struct _mace_private {
fd238232 365 struct pcmcia_device *p_dev;
1da177e4
LT		 366 dev_node_t node;
367 struct net_device_stats linux_stats; /* Linux statistics counters */
368 mace_statistics mace_stats; /* MACE chip statistics counters */
369
370 /* restore_multicast_list() state variables */
371 int multicast_ladrf[MACE_LADRF_LEN]; /* Logical address filter */
372 int multicast_num_addrs;
373
374 char tx_free_frames; /* Number of free transmit frame buffers */
375 char tx_irq_disabled; /* MACE TX interrupt disabled */
376
377 spinlock_t bank_lock; /* Must be held if you step off bank 0 */
378} mace_private;
379
380/* ----------------------------------------------------------------------------
381Private Global Variables
382---------------------------------------------------------------------------- */
383
384#ifdef PCMCIA_DEBUG
385static char rcsid[] =
386"nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao";
387static char *version =
388DRV_NAME " " DRV_VERSION " (Roger C. Pao)";
389#endif
390
f71e1309 391static const char *if_names[]={
1da177e4
LT		 392 "Auto", "10baseT", "BNC",
393};
394
395/* ----------------------------------------------------------------------------
396Parameters
397 These are the parameters that can be set during loading with
398 'insmod'.
399---------------------------------------------------------------------------- */
400
401MODULE_DESCRIPTION("New Media PCMCIA ethernet driver");
402MODULE_LICENSE("GPL");
403
404#define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
405
406/* 0=auto, 1=10baseT, 2 = 10base2, default=auto */
407INT_MODULE_PARM(if_port, 0);
408
409#ifdef PCMCIA_DEBUG
410INT_MODULE_PARM(pc_debug, PCMCIA_DEBUG);
411#define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args)
412#else
413#define DEBUG(n, args...)
414#endif
415
416/* ----------------------------------------------------------------------------
417Function Prototypes
418---------------------------------------------------------------------------- */
419
15b99ac1 420static int nmclan_config(struct pcmcia_device *link);
fba395ee 421static void nmclan_release(struct pcmcia_device *link);
1da177e4
LT		 422
423static void nmclan_reset(struct net_device *dev);
424static int mace_config(struct net_device *dev, struct ifmap *map);
425static int mace_open(struct net_device *dev);
426static int mace_close(struct net_device *dev);
427static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev);
428static void mace_tx_timeout(struct net_device *dev);
7d12e780 429static irqreturn_t mace_interrupt(int irq, void *dev_id);
1da177e4
LT		 430static struct net_device_stats *mace_get_stats(struct net_device *dev);
431static int mace_rx(struct net_device *dev, unsigned char RxCnt);
432static void restore_multicast_list(struct net_device *dev);
433static void set_multicast_list(struct net_device *dev);
7282d491 434static const struct ethtool_ops netdev_ethtool_ops;
1da177e4
LT		 435
436
cc3b4866 437static void nmclan_detach(struct pcmcia_device *p_dev);
1da177e4
LT		 438
439/* ----------------------------------------------------------------------------
440nmclan_attach
441 Creates an "instance" of the driver, allocating local data
442 structures for one device. The device is registered with Card
443 Services.
444---------------------------------------------------------------------------- */
445
15b99ac1 446static int nmclan_probe(struct pcmcia_device *link)
1da177e4
LT		 447{
448 mace_private *lp;
1da177e4 449 struct net_device *dev;
1da177e4
LT		 450
451 DEBUG(0, "nmclan_attach()\n");
452 DEBUG(1, "%s\n", rcsid);
453
454 /* Create new ethernet device */
455 dev = alloc_etherdev(sizeof(mace_private));
456 if (!dev)
f8cfa618 457 return -ENOMEM;
1da177e4 458 lp = netdev_priv(dev);
fba395ee 459 lp->p_dev = link;
1da177e4
LT		 460 link->priv = dev;
461
462 spin_lock_init(&lp->bank_lock);
463 link->io.NumPorts1 = 32;
464 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
465 link->io.IOAddrLines = 5;
466 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE | IRQ_HANDLE_PRESENT;
467 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
468 link->irq.Handler = &mace_interrupt;
469 link->irq.Instance = dev;
470 link->conf.Attributes = CONF_ENABLE_IRQ;
1da177e4
LT		 471 link->conf.IntType = INT_MEMORY_AND_IO;
472 link->conf.ConfigIndex = 1;
473 link->conf.Present = PRESENT_OPTION;
474
475 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
476
1da177e4
LT		 477 dev->hard_start_xmit = &mace_start_xmit;
478 dev->set_config = &mace_config;
479 dev->get_stats = &mace_get_stats;
480 dev->set_multicast_list = &set_multicast_list;
481 SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops);
482 dev->open = &mace_open;
483 dev->stop = &mace_close;
484#ifdef HAVE_TX_TIMEOUT
485 dev->tx_timeout = mace_tx_timeout;
486 dev->watchdog_timeo = TX_TIMEOUT;
487#endif
488
15b99ac1 489 return nmclan_config(link);
1da177e4
LT		 490} /* nmclan_attach */
491
492/* ----------------------------------------------------------------------------
493nmclan_detach
494 This deletes a driver "instance". The device is de-registered
495 with Card Services. If it has been released, all local data
496 structures are freed. Otherwise, the structures will be freed
497 when the device is released.
498---------------------------------------------------------------------------- */
499
fba395ee 500static void nmclan_detach(struct pcmcia_device *link)
1da177e4
LT		 501{
502 struct net_device *dev = link->priv;
1da177e4
LT		 503
504 DEBUG(0, "nmclan_detach(0x%p)\n", link);
505
fd238232 506 if (link->dev_node)
1da177e4
LT		 507 unregister_netdev(dev);
508
e2d40963 509 nmclan_release(link);
1da177e4 510
1da177e4
LT		 511 free_netdev(dev);
512} /* nmclan_detach */
513
514/* ----------------------------------------------------------------------------
515mace_read
516 Reads a MACE register. This is bank independent; however, the
517 caller must ensure that this call is not interruptable. We are
518 assuming that during normal operation, the MACE is always in
519 bank 0.
520---------------------------------------------------------------------------- */
521static int mace_read(mace_private *lp, kio_addr_t ioaddr, int reg)
522{
523 int data = 0xFF;
524 unsigned long flags;
525
526 switch (reg >> 4) {
527 case 0: /* register 0-15 */
528 data = inb(ioaddr + AM2150_MACE_BASE + reg);
529 break;
530 case 1: /* register 16-31 */
531 spin_lock_irqsave(&lp->bank_lock, flags);
532 MACEBANK(1);
533 data = inb(ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
534 MACEBANK(0);
535 spin_unlock_irqrestore(&lp->bank_lock, flags);
536 break;
537 }
538 return (data & 0xFF);
539} /* mace_read */
540
541/* ----------------------------------------------------------------------------
542mace_write
543 Writes to a MACE register. This is bank independent; however,
544 the caller must ensure that this call is not interruptable. We
545 are assuming that during normal operation, the MACE is always in
546 bank 0.
547---------------------------------------------------------------------------- */
548static void mace_write(mace_private *lp, kio_addr_t ioaddr, int reg, int data)
549{
550 unsigned long flags;
551
552 switch (reg >> 4) {
553 case 0: /* register 0-15 */
554 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + reg);
555 break;
556 case 1: /* register 16-31 */
557 spin_lock_irqsave(&lp->bank_lock, flags);
558 MACEBANK(1);
559 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
560 MACEBANK(0);
561 spin_unlock_irqrestore(&lp->bank_lock, flags);
562 break;
563 }
564} /* mace_write */
565
566/* ----------------------------------------------------------------------------
567mace_init
568 Resets the MACE chip.
569---------------------------------------------------------------------------- */
570static int mace_init(mace_private *lp, kio_addr_t ioaddr, char *enet_addr)
571{
572 int i;
573 int ct = 0;
574
575 /* MACE Software reset */
576 mace_write(lp, ioaddr, MACE_BIUCC, 1);
577 while (mace_read(lp, ioaddr, MACE_BIUCC) & 0x01) {
578 /* Wait for reset bit to be cleared automatically after <= 200ns */;
579 if(++ct > 500)
580 {
581 printk(KERN_ERR "mace: reset failed, card removed ?\n");
582 return -1;
583 }
584 udelay(1);
585 }
586 mace_write(lp, ioaddr, MACE_BIUCC, 0);
587
588 /* The Am2150 requires that the MACE FIFOs operate in burst mode. */
589 mace_write(lp, ioaddr, MACE_FIFOCC, 0x0F);
590
591 mace_write(lp,ioaddr, MACE_RCVFC, 0); /* Disable Auto Strip Receive */
592 mace_write(lp, ioaddr, MACE_IMR, 0xFF); /* Disable all interrupts until _open */
593
594 /*
595 * Bit 2-1 PORTSEL[1-0] Port Select.
596 * 00 AUI/10Base-2
597 * 01 10Base-T
598 * 10 DAI Port (reserved in Am2150)
599 * 11 GPSI
600 * For this card, only the first two are valid.
601 * So, PLSCC should be set to
602 * 0x00 for 10Base-2
603 * 0x02 for 10Base-T
604 * Or just set ASEL in PHYCC below!
605 */
606 switch (if_port) {
607 case 1:
608 mace_write(lp, ioaddr, MACE_PLSCC, 0x02);
609 break;
610 case 2:
611 mace_write(lp, ioaddr, MACE_PLSCC, 0x00);
612 break;
613 default:
614 mace_write(lp, ioaddr, MACE_PHYCC, /* ASEL */ 4);
615 /* ASEL Auto Select. When set, the PORTSEL[1-0] bits are overridden,
616 and the MACE device will automatically select the operating media
617 interface port. */
618 break;
619 }
620
621 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_PHYADDR);
622 /* Poll ADDRCHG bit */
623 ct = 0;
624 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
625 {
626 if(++ ct > 500)
627 {
628 printk(KERN_ERR "mace: ADDRCHG timeout, card removed ?\n");
629 return -1;
630 }
631 }
632 /* Set PADR register */
633 for (i = 0; i < ETHER_ADDR_LEN; i++)
634 mace_write(lp, ioaddr, MACE_PADR, enet_addr[i]);
635
636 /* MAC Configuration Control Register should be written last */
637 /* Let set_multicast_list set this. */
638 /* mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV); */
639 mace_write(lp, ioaddr, MACE_MACCC, 0x00);
640 return 0;
641} /* mace_init */
642
643/* ----------------------------------------------------------------------------
644nmclan_config
645 This routine is scheduled to run after a CARD_INSERTION event
646 is received, to configure the PCMCIA socket, and to make the
647 ethernet device available to the system.
648---------------------------------------------------------------------------- */
649
650#define CS_CHECK(fn, ret) \
651 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
652
15b99ac1 653static int nmclan_config(struct pcmcia_device *link)
1da177e4 654{
1da177e4
LT		 655 struct net_device *dev = link->priv;
656 mace_private *lp = netdev_priv(dev);
657 tuple_t tuple;
1da177e4
LT		 658 u_char buf[64];
659 int i, last_ret, last_fn;
660 kio_addr_t ioaddr;
661
662 DEBUG(0, "nmclan_config(0x%p)\n", link);
663
fba395ee
DB		 664 CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
665 CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
666 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
1da177e4
LT		 667 dev->irq = link->irq.AssignedIRQ;
668 dev->base_addr = link->io.BasePort1;
669
670 ioaddr = dev->base_addr;
671
672 /* Read the ethernet address from the CIS. */
673 tuple.DesiredTuple = 0x80 /* CISTPL_CFTABLE_ENTRY_MISC */;
674 tuple.TupleData = buf;
675 tuple.TupleDataMax = 64;
676 tuple.TupleOffset = 0;
af2b3b50 677 tuple.Attributes = 0;
fba395ee
DB		 678 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
679 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
1da177e4
LT		 680 memcpy(dev->dev_addr, tuple.TupleData, ETHER_ADDR_LEN);
681
682 /* Verify configuration by reading the MACE ID. */
683 {
684 char sig[2];
685
686 sig[0] = mace_read(lp, ioaddr, MACE_CHIPIDL);
687 sig[1] = mace_read(lp, ioaddr, MACE_CHIPIDH);
688 if ((sig[0] == 0x40) && ((sig[1] & 0x0F) == 0x09)) {
689 DEBUG(0, "nmclan_cs configured: mace id=%x %x\n",
690 sig[0], sig[1]);
691 } else {
692 printk(KERN_NOTICE "nmclan_cs: mace id not found: %x %x should"
693 " be 0x40 0x?9\n", sig[0], sig[1]);
15b99ac1 694 return -ENODEV;
1da177e4
LT		 695 }
696 }
697
698 if(mace_init(lp, ioaddr, dev->dev_addr) == -1)
699 goto failed;
700
701 /* The if_port symbol can be set when the module is loaded */
702 if (if_port <= 2)
703 dev->if_port = if_port;
704 else
705 printk(KERN_NOTICE "nmclan_cs: invalid if_port requested\n");
706
fd238232 707 link->dev_node = &lp->node;
fba395ee 708 SET_NETDEV_DEV(dev, &handle_to_dev(link));
1da177e4
LT		 709
710 i = register_netdev(dev);
711 if (i != 0) {
712 printk(KERN_NOTICE "nmclan_cs: register_netdev() failed\n");
fd238232 713 link->dev_node = NULL;
1da177e4
LT		 714 goto failed;
715 }
716
717 strcpy(lp->node.dev_name, dev->name);
718
719 printk(KERN_INFO "%s: nmclan: port %#3lx, irq %d, %s port, hw_addr ",
720 dev->name, dev->base_addr, dev->irq, if_names[dev->if_port]);
721 for (i = 0; i < 6; i++)
722 printk("%02X%s", dev->dev_addr[i], ((i<5) ? ":" : "\n"));
15b99ac1 723 return 0;
1da177e4
LT		 724
725cs_failed:
15b99ac1 726 cs_error(link, last_fn, last_ret);
1da177e4 727failed:
15b99ac1
DB		 728 nmclan_release(link);
729 return -ENODEV;
1da177e4
LT		 730} /* nmclan_config */
731
732/* ----------------------------------------------------------------------------
733nmclan_release
734 After a card is removed, nmclan_release() will unregister the
735 net device, and release the PCMCIA configuration. If the device
736 is still open, this will be postponed until it is closed.
737---------------------------------------------------------------------------- */
fba395ee 738static void nmclan_release(struct pcmcia_device *link)
1da177e4 739{
5f2a71fc 740 DEBUG(0, "nmclan_release(0x%p)\n", link);
fba395ee 741 pcmcia_disable_device(link);
1da177e4
LT		 742}
743
fba395ee 744static int nmclan_suspend(struct pcmcia_device *link)
98e4c28b 745{
98e4c28b
DB		 746 struct net_device *dev = link->priv;
747
e2d40963 748 if (link->open)
8661bb5b 749 netif_device_detach(dev);
98e4c28b
DB		 750
751 return 0;
752}
753
fba395ee 754static int nmclan_resume(struct pcmcia_device *link)
98e4c28b 755{
98e4c28b
DB		 756 struct net_device *dev = link->priv;
757
e2d40963 758 if (link->open) {
8661bb5b
DB		 759 nmclan_reset(dev);
760 netif_device_attach(dev);
98e4c28b
DB		 761 }
762
763 return 0;
764}
765
1da177e4
LT		 766
767/* ----------------------------------------------------------------------------
768nmclan_reset
769 Reset and restore all of the Xilinx and MACE registers.
770---------------------------------------------------------------------------- */
771static void nmclan_reset(struct net_device *dev)
772{
773 mace_private *lp = netdev_priv(dev);
774
775#if RESET_XILINX
fba395ee 776 struct pcmcia_device *link = &lp->link;
1da177e4
LT		 777 conf_reg_t reg;
778 u_long OrigCorValue;
779
780 /* Save original COR value */
781 reg.Function = 0;
782 reg.Action = CS_READ;
783 reg.Offset = CISREG_COR;
784 reg.Value = 0;
fba395ee 785 pcmcia_access_configuration_register(link, &reg);
1da177e4
LT		 786 OrigCorValue = reg.Value;
787
788 /* Reset Xilinx */
789 reg.Action = CS_WRITE;
790 reg.Offset = CISREG_COR;
791 DEBUG(1, "nmclan_reset: OrigCorValue=0x%lX, resetting...\n",
792 OrigCorValue);
793 reg.Value = COR_SOFT_RESET;
fba395ee 794 pcmcia_access_configuration_register(link, &reg);
1da177e4
LT		 795 /* Need to wait for 20 ms for PCMCIA to finish reset. */
796
797 /* Restore original COR configuration index */
798 reg.Value = COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK);
fba395ee 799 pcmcia_access_configuration_register(link, &reg);
1da177e4
LT		 800 /* Xilinx is now completely reset along with the MACE chip. */
801 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
802
803#endif /* #if RESET_XILINX */
804
805 /* Xilinx is now completely reset along with the MACE chip. */
806 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
807
808 /* Reinitialize the MACE chip for operation. */
809 mace_init(lp, dev->base_addr, dev->dev_addr);
810 mace_write(lp, dev->base_addr, MACE_IMR, MACE_IMR_DEFAULT);
811
812 /* Restore the multicast list and enable TX and RX. */
813 restore_multicast_list(dev);
814} /* nmclan_reset */
815
816/* ----------------------------------------------------------------------------
817mace_config
818 [Someone tell me what this is supposed to do? Is if_port a defined
819 standard? If so, there should be defines to indicate 1=10Base-T,
820 2=10Base-2, etc. including limited automatic detection.]
821---------------------------------------------------------------------------- */
822static int mace_config(struct net_device *dev, struct ifmap *map)
823{
824 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
825 if (map->port <= 2) {
826 dev->if_port = map->port;
827 printk(KERN_INFO "%s: switched to %s port\n", dev->name,
828 if_names[dev->if_port]);
829 } else
830 return -EINVAL;
831 }
832 return 0;
833} /* mace_config */
834
835/* ----------------------------------------------------------------------------
836mace_open
837 Open device driver.
838---------------------------------------------------------------------------- */
839static int mace_open(struct net_device *dev)
840{
841 kio_addr_t ioaddr = dev->base_addr;
842 mace_private *lp = netdev_priv(dev);
fba395ee 843 struct pcmcia_device *link = lp->p_dev;
1da177e4 844
9940ec36 845 if (!pcmcia_dev_present(link))
1da177e4
LT		 846 return -ENODEV;
847
848 link->open++;
849
850 MACEBANK(0);
851
852 netif_start_queue(dev);
853 nmclan_reset(dev);
854
855 return 0; /* Always succeed */
856} /* mace_open */
857
858/* ----------------------------------------------------------------------------
859mace_close
860 Closes device driver.
861---------------------------------------------------------------------------- */
862static int mace_close(struct net_device *dev)
863{
864 kio_addr_t ioaddr = dev->base_addr;
865 mace_private *lp = netdev_priv(dev);
fba395ee 866 struct pcmcia_device *link = lp->p_dev;
1da177e4
LT		 867
868 DEBUG(2, "%s: shutting down ethercard.\n", dev->name);
869
870 /* Mask off all interrupts from the MACE chip. */
871 outb(0xFF, ioaddr + AM2150_MACE_BASE + MACE_IMR);
872
873 link->open--;
874 netif_stop_queue(dev);
875
876 return 0;
877} /* mace_close */
878
879static void netdev_get_drvinfo(struct net_device *dev,
880 struct ethtool_drvinfo *info)
881{
882 strcpy(info->driver, DRV_NAME);
883 strcpy(info->version, DRV_VERSION);
884 sprintf(info->bus_info, "PCMCIA 0x%lx", dev->base_addr);
885}
886
887#ifdef PCMCIA_DEBUG
888static u32 netdev_get_msglevel(struct net_device *dev)
889{
890 return pc_debug;
891}
892
893static void netdev_set_msglevel(struct net_device *dev, u32 level)
894{
895 pc_debug = level;
896}
897#endif /* PCMCIA_DEBUG */
898
7282d491 899static const struct ethtool_ops netdev_ethtool_ops = {
1da177e4
LT		 900 .get_drvinfo = netdev_get_drvinfo,
901#ifdef PCMCIA_DEBUG
902 .get_msglevel = netdev_get_msglevel,
903 .set_msglevel = netdev_set_msglevel,
904#endif /* PCMCIA_DEBUG */
905};
906
907/* ----------------------------------------------------------------------------
908mace_start_xmit
909 This routine begins the packet transmit function. When completed,
910 it will generate a transmit interrupt.
911
912 According to /usr/src/linux/net/inet/dev.c, if _start_xmit
913 returns 0, the "packet is now solely the responsibility of the
914 driver." If _start_xmit returns non-zero, the "transmission
915 failed, put skb back into a list."
916---------------------------------------------------------------------------- */
917
918static void mace_tx_timeout(struct net_device *dev)
919{
920 mace_private *lp = netdev_priv(dev);
fba395ee 921 struct pcmcia_device *link = lp->p_dev;
1da177e4
LT		 922
923 printk(KERN_NOTICE "%s: transmit timed out -- ", dev->name);
924#if RESET_ON_TIMEOUT
925 printk("resetting card\n");
fba395ee 926 pcmcia_reset_card(link, NULL);
1da177e4
LT		 927#else /* #if RESET_ON_TIMEOUT */
928 printk("NOT resetting card\n");
929#endif /* #if RESET_ON_TIMEOUT */
930 dev->trans_start = jiffies;
931 netif_wake_queue(dev);
932}
933
934static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev)
935{
936 mace_private *lp = netdev_priv(dev);
937 kio_addr_t ioaddr = dev->base_addr;
938
939 netif_stop_queue(dev);
940
941 DEBUG(3, "%s: mace_start_xmit(length = %ld) called.\n",
942 dev->name, (long)skb->len);
943
944#if (!TX_INTERRUPTABLE)
945 /* Disable MACE TX interrupts. */
946 outb(MACE_IMR_DEFAULT | MACE_IR_XMTINT,
947 ioaddr + AM2150_MACE_BASE + MACE_IMR);
948 lp->tx_irq_disabled=1;
949#endif /* #if (!TX_INTERRUPTABLE) */
950
951 {
952 /* This block must not be interrupted by another transmit request!
953 mace_tx_timeout will take care of timer-based retransmissions from
954 the upper layers. The interrupt handler is guaranteed never to
955 service a transmit interrupt while we are in here.
956 */
957
958 lp->linux_stats.tx_bytes += skb->len;
959 lp->tx_free_frames--;
960
961 /* WARNING: Write the _exact_ number of bytes written in the header! */
962 /* Put out the word header [must be an outw()] . . . */
963 outw(skb->len, ioaddr + AM2150_XMT);
964 /* . . . and the packet [may be any combination of outw() and outb()] */
965 outsw(ioaddr + AM2150_XMT, skb->data, skb->len >> 1);
966 if (skb->len & 1) {
967 /* Odd byte transfer */
968 outb(skb->data[skb->len-1], ioaddr + AM2150_XMT);
969 }
970
971 dev->trans_start = jiffies;
972
973#if MULTI_TX
974 if (lp->tx_free_frames > 0)
975 netif_start_queue(dev);
976#endif /* #if MULTI_TX */
977 }
978
979#if (!TX_INTERRUPTABLE)
980 /* Re-enable MACE TX interrupts. */
981 lp->tx_irq_disabled=0;
982 outb(MACE_IMR_DEFAULT, ioaddr + AM2150_MACE_BASE + MACE_IMR);
983#endif /* #if (!TX_INTERRUPTABLE) */
984
985 dev_kfree_skb(skb);
986
987 return 0;
988} /* mace_start_xmit */
989
990/* ----------------------------------------------------------------------------
991mace_interrupt
992 The interrupt handler.
993---------------------------------------------------------------------------- */
7d12e780 994static irqreturn_t mace_interrupt(int irq, void *dev_id)
1da177e4
LT		 995{
996 struct net_device *dev = (struct net_device *) dev_id;
997 mace_private *lp = netdev_priv(dev);
c196d80f 998 kio_addr_t ioaddr;
1da177e4
LT		 999 int status;
1000 int IntrCnt = MACE_MAX_IR_ITERATIONS;
1001
1002 if (dev == NULL) {
1003 DEBUG(2, "mace_interrupt(): irq 0x%X for unknown device.\n",
1004 irq);
1005 return IRQ_NONE;
1006 }
1007
c196d80f
MG		 1008 ioaddr = dev->base_addr;
1009
1da177e4
LT		 1010 if (lp->tx_irq_disabled) {
1011 printk(
1012 (lp->tx_irq_disabled?
1013 KERN_NOTICE "%s: Interrupt with tx_irq_disabled "
1014 "[isr=%02X, imr=%02X]\n":
1015 KERN_NOTICE "%s: Re-entering the interrupt handler "
1016 "[isr=%02X, imr=%02X]\n"),
1017 dev->name,
1018 inb(ioaddr + AM2150_MACE_BASE + MACE_IR),
1019 inb(ioaddr + AM2150_MACE_BASE + MACE_IMR)
1020 );
1021 /* WARNING: MACE_IR has been read! */
1022 return IRQ_NONE;
1023 }
1024
1025 if (!netif_device_present(dev)) {
1026 DEBUG(2, "%s: interrupt from dead card\n", dev->name);
1027 return IRQ_NONE;
1028 }
1029
1030 do {
1031 /* WARNING: MACE_IR is a READ/CLEAR port! */
1032 status = inb(ioaddr + AM2150_MACE_BASE + MACE_IR);
1033
1034 DEBUG(3, "mace_interrupt: irq 0x%X status 0x%X.\n", irq, status);
1035
1036 if (status & MACE_IR_RCVINT) {
1037 mace_rx(dev, MACE_MAX_RX_ITERATIONS);
1038 }
1039
1040 if (status & MACE_IR_XMTINT) {
1041 unsigned char fifofc;
1042 unsigned char xmtrc;
1043 unsigned char xmtfs;
1044
1045 fifofc = inb(ioaddr + AM2150_MACE_BASE + MACE_FIFOFC);
1046 if ((fifofc & MACE_FIFOFC_XMTFC)==0) {
1047 lp->linux_stats.tx_errors++;
1048 outb(0xFF, ioaddr + AM2150_XMT_SKIP);
1049 }
1050
1051 /* Transmit Retry Count (XMTRC, reg 4) */
1052 xmtrc = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTRC);
1053 if (xmtrc & MACE_XMTRC_EXDEF) lp->mace_stats.exdef++;
1054 lp->mace_stats.xmtrc += (xmtrc & MACE_XMTRC_XMTRC);
1055
1056 if (
1057 (xmtfs = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTFS)) &
1058 MACE_XMTFS_XMTSV /* Transmit Status Valid */
1059 ) {
1060 lp->mace_stats.xmtsv++;
1061
1062 if (xmtfs & ~MACE_XMTFS_XMTSV) {
1063 if (xmtfs & MACE_XMTFS_UFLO) {
1064 /* Underflow. Indicates that the Transmit FIFO emptied before
1065 the end of frame was reached. */
1066 lp->mace_stats.uflo++;
1067 }
1068 if (xmtfs & MACE_XMTFS_LCOL) {
1069 /* Late Collision */
1070 lp->mace_stats.lcol++;
1071 }
1072 if (xmtfs & MACE_XMTFS_MORE) {
1073 /* MORE than one retry was needed */
1074 lp->mace_stats.more++;
1075 }
1076 if (xmtfs & MACE_XMTFS_ONE) {
1077 /* Exactly ONE retry occurred */
1078 lp->mace_stats.one++;
1079 }
1080 if (xmtfs & MACE_XMTFS_DEFER) {
1081 /* Transmission was defered */
1082 lp->mace_stats.defer++;
1083 }
1084 if (xmtfs & MACE_XMTFS_LCAR) {
1085 /* Loss of carrier */
1086 lp->mace_stats.lcar++;
1087 }
1088 if (xmtfs & MACE_XMTFS_RTRY) {
1089 /* Retry error: transmit aborted after 16 attempts */
1090 lp->mace_stats.rtry++;
1091 }
1092 } /* if (xmtfs & ~MACE_XMTFS_XMTSV) */
1093
1094 } /* if (xmtfs & MACE_XMTFS_XMTSV) */
1095
1096 lp->linux_stats.tx_packets++;
1097 lp->tx_free_frames++;
1098 netif_wake_queue(dev);
1099 } /* if (status & MACE_IR_XMTINT) */
1100
1101 if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) {
1102 if (status & MACE_IR_JAB) {
1103 /* Jabber Error. Excessive transmit duration (20-150ms). */
1104 lp->mace_stats.jab++;
1105 }
1106 if (status & MACE_IR_BABL) {
1107 /* Babble Error. >1518 bytes transmitted. */
1108 lp->mace_stats.babl++;
1109 }
1110 if (status & MACE_IR_CERR) {
1111 /* Collision Error. CERR indicates the absence of the
1112 Signal Quality Error Test message after a packet
1113 transmission. */
1114 lp->mace_stats.cerr++;
1115 }
1116 if (status & MACE_IR_RCVCCO) {
1117 /* Receive Collision Count Overflow; */
1118 lp->mace_stats.rcvcco++;
1119 }
1120 if (status & MACE_IR_RNTPCO) {
1121 /* Runt Packet Count Overflow */
1122 lp->mace_stats.rntpco++;
1123 }
1124 if (status & MACE_IR_MPCO) {
1125 /* Missed Packet Count Overflow */
1126 lp->mace_stats.mpco++;
1127 }
1128 } /* if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) */
1129
1130 } while ((status & ~MACE_IMR_DEFAULT) && (--IntrCnt));
1131
1132 return IRQ_HANDLED;
1133} /* mace_interrupt */
1134
1135/* ----------------------------------------------------------------------------
1136mace_rx
1137 Receives packets.
1138---------------------------------------------------------------------------- */
1139static int mace_rx(struct net_device *dev, unsigned char RxCnt)
1140{
1141 mace_private *lp = netdev_priv(dev);
1142 kio_addr_t ioaddr = dev->base_addr;
1143 unsigned char rx_framecnt;
1144 unsigned short rx_status;
1145
1146 while (
1147 ((rx_framecnt = inb(ioaddr + AM2150_RCV_FRAME_COUNT)) > 0) &&
1148 (rx_framecnt <= 12) && /* rx_framecnt==0xFF if card is extracted. */
1149 (RxCnt--)
1150 ) {
1151 rx_status = inw(ioaddr + AM2150_RCV);
1152
1153 DEBUG(3, "%s: in mace_rx(), framecnt 0x%X, rx_status"
1154 " 0x%X.\n", dev->name, rx_framecnt, rx_status);
1155
1156 if (rx_status & MACE_RCVFS_RCVSTS) { /* Error, update stats. */
1157 lp->linux_stats.rx_errors++;
1158 if (rx_status & MACE_RCVFS_OFLO) {
1159 lp->mace_stats.oflo++;
1160 }
1161 if (rx_status & MACE_RCVFS_CLSN) {
1162 lp->mace_stats.clsn++;
1163 }
1164 if (rx_status & MACE_RCVFS_FRAM) {
1165 lp->mace_stats.fram++;
1166 }
1167 if (rx_status & MACE_RCVFS_FCS) {
1168 lp->mace_stats.fcs++;
1169 }
1170 } else {
1171 short pkt_len = (rx_status & ~MACE_RCVFS_RCVSTS) - 4;
1172 /* Auto Strip is off, always subtract 4 */
1173 struct sk_buff *skb;
1174
1175 lp->mace_stats.rfs_rntpc += inb(ioaddr + AM2150_RCV);
1176 /* runt packet count */
1177 lp->mace_stats.rfs_rcvcc += inb(ioaddr + AM2150_RCV);
1178 /* rcv collision count */
1179
1180 DEBUG(3, " receiving packet size 0x%X rx_status"
1181 " 0x%X.\n", pkt_len, rx_status);
1182
1183 skb = dev_alloc_skb(pkt_len+2);
1184
1185 if (skb != NULL) {
1da177e4
LT		 1186 skb_reserve(skb, 2);
1187 insw(ioaddr + AM2150_RCV, skb_put(skb, pkt_len), pkt_len>>1);
1188 if (pkt_len & 1)
27a884dc 1189 *(skb_tail_pointer(skb) - 1) = inb(ioaddr + AM2150_RCV);
1da177e4
LT		 1190 skb->protocol = eth_type_trans(skb, dev);
1191
1192 netif_rx(skb); /* Send the packet to the upper (protocol) layers. */
1193
1194 dev->last_rx = jiffies;
1195 lp->linux_stats.rx_packets++;
6f258910 1196 lp->linux_stats.rx_bytes += pkt_len;
1da177e4
LT		 1197 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1198 continue;
1199 } else {
1200 DEBUG(1, "%s: couldn't allocate a sk_buff of size"
1201 " %d.\n", dev->name, pkt_len);
1202 lp->linux_stats.rx_dropped++;
1203 }
1204 }
1205 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1206 } /* while */
1207
1208 return 0;
1209} /* mace_rx */
1210
1211/* ----------------------------------------------------------------------------
1212pr_linux_stats
1213---------------------------------------------------------------------------- */
1214static void pr_linux_stats(struct net_device_stats *pstats)
1215{
1216 DEBUG(2, "pr_linux_stats\n");
1217 DEBUG(2, " rx_packets=%-7ld tx_packets=%ld\n",
1218 (long)pstats->rx_packets, (long)pstats->tx_packets);
1219 DEBUG(2, " rx_errors=%-7ld tx_errors=%ld\n",
1220 (long)pstats->rx_errors, (long)pstats->tx_errors);
1221 DEBUG(2, " rx_dropped=%-7ld tx_dropped=%ld\n",
1222 (long)pstats->rx_dropped, (long)pstats->tx_dropped);
1223 DEBUG(2, " multicast=%-7ld collisions=%ld\n",
1224 (long)pstats->multicast, (long)pstats->collisions);
1225
1226 DEBUG(2, " rx_length_errors=%-7ld rx_over_errors=%ld\n",
1227 (long)pstats->rx_length_errors, (long)pstats->rx_over_errors);
1228 DEBUG(2, " rx_crc_errors=%-7ld rx_frame_errors=%ld\n",
1229 (long)pstats->rx_crc_errors, (long)pstats->rx_frame_errors);
1230 DEBUG(2, " rx_fifo_errors=%-7ld rx_missed_errors=%ld\n",
1231 (long)pstats->rx_fifo_errors, (long)pstats->rx_missed_errors);
1232
1233 DEBUG(2, " tx_aborted_errors=%-7ld tx_carrier_errors=%ld\n",
1234 (long)pstats->tx_aborted_errors, (long)pstats->tx_carrier_errors);
1235 DEBUG(2, " tx_fifo_errors=%-7ld tx_heartbeat_errors=%ld\n",
1236 (long)pstats->tx_fifo_errors, (long)pstats->tx_heartbeat_errors);
1237 DEBUG(2, " tx_window_errors=%ld\n",
1238 (long)pstats->tx_window_errors);
1239} /* pr_linux_stats */
1240
1241/* ----------------------------------------------------------------------------
1242pr_mace_stats
1243---------------------------------------------------------------------------- */
1244static void pr_mace_stats(mace_statistics *pstats)
1245{
1246 DEBUG(2, "pr_mace_stats\n");
1247
1248 DEBUG(2, " xmtsv=%-7d uflo=%d\n",
1249 pstats->xmtsv, pstats->uflo);
1250 DEBUG(2, " lcol=%-7d more=%d\n",
1251 pstats->lcol, pstats->more);
1252 DEBUG(2, " one=%-7d defer=%d\n",
1253 pstats->one, pstats->defer);
1254 DEBUG(2, " lcar=%-7d rtry=%d\n",
1255 pstats->lcar, pstats->rtry);
1256
1257 /* MACE_XMTRC */
1258 DEBUG(2, " exdef=%-7d xmtrc=%d\n",
1259 pstats->exdef, pstats->xmtrc);
1260
1261 /* RFS1--Receive Status (RCVSTS) */
1262 DEBUG(2, " oflo=%-7d clsn=%d\n",
1263 pstats->oflo, pstats->clsn);
1264 DEBUG(2, " fram=%-7d fcs=%d\n",
1265 pstats->fram, pstats->fcs);
1266
1267 /* RFS2--Runt Packet Count (RNTPC) */
1268 /* RFS3--Receive Collision Count (RCVCC) */
1269 DEBUG(2, " rfs_rntpc=%-7d rfs_rcvcc=%d\n",
1270 pstats->rfs_rntpc, pstats->rfs_rcvcc);
1271
1272 /* MACE_IR */
1273 DEBUG(2, " jab=%-7d babl=%d\n",
1274 pstats->jab, pstats->babl);
1275 DEBUG(2, " cerr=%-7d rcvcco=%d\n",
1276 pstats->cerr, pstats->rcvcco);
1277 DEBUG(2, " rntpco=%-7d mpco=%d\n",
1278 pstats->rntpco, pstats->mpco);
1279
1280 /* MACE_MPC */
1281 DEBUG(2, " mpc=%d\n", pstats->mpc);
1282
1283 /* MACE_RNTPC */
1284 DEBUG(2, " rntpc=%d\n", pstats->rntpc);
1285
1286 /* MACE_RCVCC */
1287 DEBUG(2, " rcvcc=%d\n", pstats->rcvcc);
1288
1289} /* pr_mace_stats */
1290
1291/* ----------------------------------------------------------------------------
1292update_stats
1293 Update statistics. We change to register window 1, so this
1294 should be run single-threaded if the device is active. This is
1295 expected to be a rare operation, and it's simpler for the rest
1296 of the driver to assume that window 0 is always valid rather
1297 than use a special window-state variable.
1298
1299 oflo & uflo should _never_ occur since it would mean the Xilinx
1300 was not able to transfer data between the MACE FIFO and the
1301 card's SRAM fast enough. If this happens, something is
1302 seriously wrong with the hardware.
1303---------------------------------------------------------------------------- */
1304static void update_stats(kio_addr_t ioaddr, struct net_device *dev)
1305{
1306 mace_private *lp = netdev_priv(dev);
1307
1308 lp->mace_stats.rcvcc += mace_read(lp, ioaddr, MACE_RCVCC);
1309 lp->mace_stats.rntpc += mace_read(lp, ioaddr, MACE_RNTPC);
1310 lp->mace_stats.mpc += mace_read(lp, ioaddr, MACE_MPC);
1311 /* At this point, mace_stats is fully updated for this call.
1312 We may now update the linux_stats. */
1313
1314 /* The MACE has no equivalent for linux_stats field which are commented
1315 out. */
1316
1317 /* lp->linux_stats.multicast; */
1318 lp->linux_stats.collisions =
1319 lp->mace_stats.rcvcco * 256 + lp->mace_stats.rcvcc;
1320 /* Collision: The MACE may retry sending a packet 15 times
1321 before giving up. The retry count is in XMTRC.
1322 Does each retry constitute a collision?
1323 If so, why doesn't the RCVCC record these collisions? */
1324
1325 /* detailed rx_errors: */
1326 lp->linux_stats.rx_length_errors =
1327 lp->mace_stats.rntpco * 256 + lp->mace_stats.rntpc;
1328 /* lp->linux_stats.rx_over_errors */
1329 lp->linux_stats.rx_crc_errors = lp->mace_stats.fcs;
1330 lp->linux_stats.rx_frame_errors = lp->mace_stats.fram;
1331 lp->linux_stats.rx_fifo_errors = lp->mace_stats.oflo;
1332 lp->linux_stats.rx_missed_errors =
1333 lp->mace_stats.mpco * 256 + lp->mace_stats.mpc;
1334
1335 /* detailed tx_errors */
1336 lp->linux_stats.tx_aborted_errors = lp->mace_stats.rtry;
1337 lp->linux_stats.tx_carrier_errors = lp->mace_stats.lcar;
1338 /* LCAR usually results from bad cabling. */
1339 lp->linux_stats.tx_fifo_errors = lp->mace_stats.uflo;
1340 lp->linux_stats.tx_heartbeat_errors = lp->mace_stats.cerr;
1341 /* lp->linux_stats.tx_window_errors; */
1342
1343 return;
1344} /* update_stats */
1345
1346/* ----------------------------------------------------------------------------
1347mace_get_stats
1348 Gathers ethernet statistics from the MACE chip.
1349---------------------------------------------------------------------------- */
1350static struct net_device_stats *mace_get_stats(struct net_device *dev)
1351{
1352 mace_private *lp = netdev_priv(dev);
1353
1354 update_stats(dev->base_addr, dev);
1355
1356 DEBUG(1, "%s: updating the statistics.\n", dev->name);
1357 pr_linux_stats(&lp->linux_stats);
1358 pr_mace_stats(&lp->mace_stats);
1359
1360 return &lp->linux_stats;
1361} /* net_device_stats */
1362
1363/* ----------------------------------------------------------------------------
1364updateCRC
1365 Modified from Am79C90 data sheet.
1366---------------------------------------------------------------------------- */
1367
1368#ifdef BROKEN_MULTICAST
1369
1370static void updateCRC(int *CRC, int bit)
1371{
1372 int poly[]={
1373 1,1,1,0, 1,1,0,1,
1374 1,0,1,1, 1,0,0,0,
1375 1,0,0,0, 0,0,1,1,
1376 0,0,1,0, 0,0,0,0
1377 }; /* CRC polynomial. poly[n] = coefficient of the x**n term of the
1378 CRC generator polynomial. */
1379
1380 int j;
1381
1382 /* shift CRC and control bit (CRC[32]) */
1383 for (j = 32; j > 0; j--)
1384 CRC[j] = CRC[j-1];
1385 CRC[0] = 0;
1386
1387 /* If bit XOR(control bit) = 1, set CRC = CRC XOR polynomial. */
1388 if (bit ^ CRC[32])
1389 for (j = 0; j < 32; j++)
1390 CRC[j] ^= poly[j];
1391} /* updateCRC */
1392
1393/* ----------------------------------------------------------------------------
1394BuildLAF
1395 Build logical address filter.
1396 Modified from Am79C90 data sheet.
1397
1398Input
1399 ladrf: logical address filter (contents initialized to 0)
1400 adr: ethernet address
1401---------------------------------------------------------------------------- */
1402static void BuildLAF(int *ladrf, int *adr)
1403{
1404 int CRC[33]={1}; /* CRC register, 1 word/bit + extra control bit */
1405
1406 int i, byte; /* temporary array indices */
1407 int hashcode; /* the output object */
1408
1409 CRC[32]=0;
1410
1411 for (byte = 0; byte < 6; byte++)
1412 for (i = 0; i < 8; i++)
1413 updateCRC(CRC, (adr[byte] >> i) & 1);
1414
1415 hashcode = 0;
1416 for (i = 0; i < 6; i++)
1417 hashcode = (hashcode << 1) + CRC[i];
1418
1419 byte = hashcode >> 3;
1420 ladrf[byte] |= (1 << (hashcode & 7));
1421
1422#ifdef PCMCIA_DEBUG
1423 if (pc_debug > 2) {
1424 printk(KERN_DEBUG " adr =");
1425 for (i = 0; i < 6; i++)
1426 printk(" %02X", adr[i]);
1427 printk("\n" KERN_DEBUG " hashcode = %d(decimal), ladrf[0:63]"
1428 " =", hashcode);
1429 for (i = 0; i < 8; i++)
1430 printk(" %02X", ladrf[i]);
1431 printk("\n");
1432 }
1433#endif
1434} /* BuildLAF */
1435
1436/* ----------------------------------------------------------------------------
1437restore_multicast_list
1438 Restores the multicast filter for MACE chip to the last
1439 set_multicast_list() call.
1440
1441Input
1442 multicast_num_addrs
1443 multicast_ladrf[]
1444---------------------------------------------------------------------------- */
1445static void restore_multicast_list(struct net_device *dev)
1446{
1447 mace_private *lp = netdev_priv(dev);
1448 int num_addrs = lp->multicast_num_addrs;
1449 int *ladrf = lp->multicast_ladrf;
1450 kio_addr_t ioaddr = dev->base_addr;
1451 int i;
1452
1453 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n",
1454 dev->name, num_addrs);
1455
1456 if (num_addrs > 0) {
1457
1458 DEBUG(1, "Attempt to restore multicast list detected.\n");
1459
1460 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_LOGADDR);
1461 /* Poll ADDRCHG bit */
1462 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
1463 ;
1464 /* Set LADRF register */
1465 for (i = 0; i < MACE_LADRF_LEN; i++)
1466 mace_write(lp, ioaddr, MACE_LADRF, ladrf[i]);
1467
1468 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_RCVFCSE | MACE_UTR_LOOP_EXTERNAL);
1469 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1470
1471 } else if (num_addrs < 0) {
1472
1473 /* Promiscuous mode: receive all packets */
1474 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1475 mace_write(lp, ioaddr, MACE_MACCC,
1476 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1477 );
1478
1479 } else {
1480
1481 /* Normal mode */
1482 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1483 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1484
1485 }
1486} /* restore_multicast_list */
1487
1488/* ----------------------------------------------------------------------------
1489set_multicast_list
1490 Set or clear the multicast filter for this adaptor.
1491
1492Input
1493 num_addrs == -1 Promiscuous mode, receive all packets
1494 num_addrs == 0 Normal mode, clear multicast list
1495 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1496 best-effort filtering.
1497Output
1498 multicast_num_addrs
1499 multicast_ladrf[]
1500---------------------------------------------------------------------------- */
1501
1502static void set_multicast_list(struct net_device *dev)
1503{
1504 mace_private *lp = netdev_priv(dev);
1505 int adr[ETHER_ADDR_LEN] = {0}; /* Ethernet address */
1506 int i;
1507 struct dev_mc_list *dmi = dev->mc_list;
1508
1509#ifdef PCMCIA_DEBUG
1510 if (pc_debug > 1) {
1511 static int old;
1512 if (dev->mc_count != old) {
1513 old = dev->mc_count;
1514 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1515 dev->name, old);
1516 }
1517 }
1518#endif
1519
1520 /* Set multicast_num_addrs. */
1521 lp->multicast_num_addrs = dev->mc_count;
1522
1523 /* Set multicast_ladrf. */
1524 if (num_addrs > 0) {
1525 /* Calculate multicast logical address filter */
1526 memset(lp->multicast_ladrf, 0, MACE_LADRF_LEN);
1527 for (i = 0; i < dev->mc_count; i++) {
1528 memcpy(adr, dmi->dmi_addr, ETHER_ADDR_LEN);
1529 dmi = dmi->next;
1530 BuildLAF(lp->multicast_ladrf, adr);
1531 }
1532 }
1533
1534 restore_multicast_list(dev);
1535
1536} /* set_multicast_list */
1537
1538#endif /* BROKEN_MULTICAST */
1539
1540static void restore_multicast_list(struct net_device *dev)
1541{
1542 kio_addr_t ioaddr = dev->base_addr;
1543 mace_private *lp = netdev_priv(dev);
1544
1545 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n", dev->name,
1546 lp->multicast_num_addrs);
1547
1548 if (dev->flags & IFF_PROMISC) {
1549 /* Promiscuous mode: receive all packets */
1550 mace_write(lp,ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1551 mace_write(lp, ioaddr, MACE_MACCC,
1552 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1553 );
1554 } else {
1555 /* Normal mode */
1556 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1557 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1558 }
1559} /* restore_multicast_list */
1560
1561static void set_multicast_list(struct net_device *dev)
1562{
1563 mace_private *lp = netdev_priv(dev);
1564
1565#ifdef PCMCIA_DEBUG
1566 if (pc_debug > 1) {
1567 static int old;
1568 if (dev->mc_count != old) {
1569 old = dev->mc_count;
1570 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1571 dev->name, old);
1572 }
1573 }
1574#endif
1575
1576 lp->multicast_num_addrs = dev->mc_count;
1577 restore_multicast_list(dev);
1578
1579} /* set_multicast_list */
1580
a58e26cb
DB		 1581static struct pcmcia_device_id nmclan_ids[] = {
1582 PCMCIA_DEVICE_PROD_ID12("New Media Corporation", "Ethernet", 0x085a850b, 0x00b2e941),
d277ad0e 1583 PCMCIA_DEVICE_PROD_ID12("Portable Add-ons", "Ethernet+", 0xebf1d60, 0xad673aaf),
a58e26cb
DB		 1584 PCMCIA_DEVICE_NULL,
1585};
1586MODULE_DEVICE_TABLE(pcmcia, nmclan_ids);
1587
1da177e4
LT		 1588static struct pcmcia_driver nmclan_cs_driver = {
1589 .owner = THIS_MODULE,
1590 .drv = {
1591 .name = "nmclan_cs",
1592 },
15b99ac1 1593 .probe = nmclan_probe,
cc3b4866 1594 .remove = nmclan_detach,
a58e26cb 1595 .id_table = nmclan_ids,
98e4c28b
DB		 1596 .suspend = nmclan_suspend,
1597 .resume = nmclan_resume,
1da177e4
LT		 1598};
1599
1600static int __init init_nmclan_cs(void)
1601{
1602 return pcmcia_register_driver(&nmclan_cs_driver);
1603}
1604
1605static void __exit exit_nmclan_cs(void)
1606{
1607 pcmcia_unregister_driver(&nmclan_cs_driver);
1da177e4
LT		 1608}
1609
1610module_init(init_nmclan_cs);
1611module_exit(exit_nmclan_cs);
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