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Commit | Line | Data |
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1da177e4 LT |
1 | /*====================================================================== |
2 | ||
3 | A PCMCIA ethernet driver for SMC91c92-based cards. | |
4 | ||
5 | This driver supports Megahertz PCMCIA ethernet cards; and | |
6 | Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem | |
7 | multifunction cards. | |
8 | ||
9 | Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net | |
10 | ||
11 | smc91c92_cs.c 1.122 2002/10/25 06:26:39 | |
12 | ||
13 | This driver contains code written by Donald Becker | |
14 | (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au), | |
15 | David Hinds (dahinds@users.sourceforge.net), and Erik Stahlman | |
16 | (erik@vt.edu). Donald wrote the SMC 91c92 code using parts of | |
17 | Erik's SMC 91c94 driver. Rowan wrote a similar driver, and I've | |
18 | incorporated some parts of his driver here. I (Dave) wrote most | |
19 | of the PCMCIA glue code, and the Ositech support code. Kelly | |
20 | Stephens (kstephen@holli.com) added support for the Motorola | |
21 | Mariner, with help from Allen Brost. | |
22 | ||
23 | This software may be used and distributed according to the terms of | |
24 | the GNU General Public License, incorporated herein by reference. | |
25 | ||
26 | ======================================================================*/ | |
27 | ||
28 | #include <linux/module.h> | |
29 | #include <linux/kernel.h> | |
30 | #include <linux/init.h> | |
31 | #include <linux/slab.h> | |
32 | #include <linux/string.h> | |
33 | #include <linux/timer.h> | |
34 | #include <linux/interrupt.h> | |
35 | #include <linux/delay.h> | |
36 | #include <linux/crc32.h> | |
37 | #include <linux/netdevice.h> | |
38 | #include <linux/etherdevice.h> | |
39 | #include <linux/skbuff.h> | |
40 | #include <linux/if_arp.h> | |
41 | #include <linux/ioport.h> | |
42 | #include <linux/ethtool.h> | |
43 | #include <linux/mii.h> | |
4851d3aa | 44 | #include <linux/jiffies.h> |
1da177e4 | 45 | |
1da177e4 LT |
46 | #include <pcmcia/cs_types.h> |
47 | #include <pcmcia/cs.h> | |
48 | #include <pcmcia/cistpl.h> | |
49 | #include <pcmcia/cisreg.h> | |
50 | #include <pcmcia/ciscode.h> | |
51 | #include <pcmcia/ds.h> | |
50db3fdb | 52 | #include <pcmcia/ss.h> |
1da177e4 LT |
53 | |
54 | #include <asm/io.h> | |
55 | #include <asm/system.h> | |
56 | #include <asm/uaccess.h> | |
57 | ||
58 | /* Ositech Seven of Diamonds firmware */ | |
59 | #include "ositech.h" | |
60 | ||
61 | /*====================================================================*/ | |
62 | ||
f71e1309 | 63 | static const char *if_names[] = { "auto", "10baseT", "10base2"}; |
1da177e4 LT |
64 | |
65 | /* Module parameters */ | |
66 | ||
67 | MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver"); | |
68 | MODULE_LICENSE("GPL"); | |
69 | ||
70 | #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0) | |
71 | ||
72 | /* | |
73 | Transceiver/media type. | |
74 | 0 = auto | |
75 | 1 = 10baseT (and autoselect if #define AUTOSELECT), | |
76 | 2 = AUI/10base2, | |
77 | */ | |
78 | INT_MODULE_PARM(if_port, 0); | |
79 | ||
80 | #ifdef PCMCIA_DEBUG | |
81 | INT_MODULE_PARM(pc_debug, PCMCIA_DEBUG); | |
82 | static const char *version = | |
d5b20697 | 83 | "smc91c92_cs.c 1.123 2006/11/09 Donald Becker, becker@scyld.com.\n"; |
1da177e4 LT |
84 | #define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args) |
85 | #else | |
86 | #define DEBUG(n, args...) | |
87 | #endif | |
88 | ||
89 | #define DRV_NAME "smc91c92_cs" | |
d5b20697 | 90 | #define DRV_VERSION "1.123" |
1da177e4 LT |
91 | |
92 | /*====================================================================*/ | |
93 | ||
94 | /* Operational parameter that usually are not changed. */ | |
95 | ||
96 | /* Time in jiffies before concluding Tx hung */ | |
97 | #define TX_TIMEOUT ((400*HZ)/1000) | |
98 | ||
99 | /* Maximum events (Rx packets, etc.) to handle at each interrupt. */ | |
100 | #define INTR_WORK 4 | |
101 | ||
102 | /* Times to check the check the chip before concluding that it doesn't | |
103 | currently have room for another Tx packet. */ | |
104 | #define MEMORY_WAIT_TIME 8 | |
105 | ||
1da177e4 | 106 | struct smc_private { |
fd238232 | 107 | struct pcmcia_device *p_dev; |
1da177e4 LT |
108 | spinlock_t lock; |
109 | u_short manfid; | |
110 | u_short cardid; | |
111 | struct net_device_stats stats; | |
112 | dev_node_t node; | |
113 | struct sk_buff *saved_skb; | |
114 | int packets_waiting; | |
115 | void __iomem *base; | |
116 | u_short cfg; | |
117 | struct timer_list media; | |
118 | int watchdog, tx_err; | |
119 | u_short media_status; | |
120 | u_short fast_poll; | |
121 | u_short link_status; | |
122 | struct mii_if_info mii_if; | |
123 | int duplex; | |
124 | int rx_ovrn; | |
125 | }; | |
126 | ||
4638aef4 YR |
127 | struct smc_cfg_mem { |
128 | tuple_t tuple; | |
129 | cisparse_t parse; | |
130 | u_char buf[255]; | |
131 | }; | |
132 | ||
1da177e4 LT |
133 | /* Special definitions for Megahertz multifunction cards */ |
134 | #define MEGAHERTZ_ISR 0x0380 | |
135 | ||
136 | /* Special function registers for Motorola Mariner */ | |
137 | #define MOT_LAN 0x0000 | |
138 | #define MOT_UART 0x0020 | |
139 | #define MOT_EEPROM 0x20 | |
140 | ||
141 | #define MOT_NORMAL \ | |
142 | (COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA) | |
143 | ||
144 | /* Special function registers for Ositech cards */ | |
145 | #define OSITECH_AUI_CTL 0x0c | |
146 | #define OSITECH_PWRDOWN 0x0d | |
147 | #define OSITECH_RESET 0x0e | |
148 | #define OSITECH_ISR 0x0f | |
149 | #define OSITECH_AUI_PWR 0x0c | |
150 | #define OSITECH_RESET_ISR 0x0e | |
151 | ||
152 | #define OSI_AUI_PWR 0x40 | |
153 | #define OSI_LAN_PWRDOWN 0x02 | |
154 | #define OSI_MODEM_PWRDOWN 0x01 | |
155 | #define OSI_LAN_RESET 0x02 | |
156 | #define OSI_MODEM_RESET 0x01 | |
157 | ||
158 | /* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */ | |
159 | #define BANK_SELECT 14 /* Window select register. */ | |
160 | #define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); } | |
161 | ||
162 | /* Bank 0 registers. */ | |
163 | #define TCR 0 /* transmit control register */ | |
164 | #define TCR_CLEAR 0 /* do NOTHING */ | |
165 | #define TCR_ENABLE 0x0001 /* if this is 1, we can transmit */ | |
166 | #define TCR_PAD_EN 0x0080 /* pads short packets to 64 bytes */ | |
167 | #define TCR_MONCSN 0x0400 /* Monitor Carrier. */ | |
168 | #define TCR_FDUPLX 0x0800 /* Full duplex mode. */ | |
169 | #define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN | |
170 | ||
171 | #define EPH 2 /* Ethernet Protocol Handler report. */ | |
172 | #define EPH_TX_SUC 0x0001 | |
173 | #define EPH_SNGLCOL 0x0002 | |
174 | #define EPH_MULCOL 0x0004 | |
175 | #define EPH_LTX_MULT 0x0008 | |
176 | #define EPH_16COL 0x0010 | |
177 | #define EPH_SQET 0x0020 | |
178 | #define EPH_LTX_BRD 0x0040 | |
179 | #define EPH_TX_DEFR 0x0080 | |
180 | #define EPH_LAT_COL 0x0200 | |
181 | #define EPH_LOST_CAR 0x0400 | |
182 | #define EPH_EXC_DEF 0x0800 | |
183 | #define EPH_CTR_ROL 0x1000 | |
184 | #define EPH_RX_OVRN 0x2000 | |
185 | #define EPH_LINK_OK 0x4000 | |
186 | #define EPH_TX_UNRN 0x8000 | |
187 | #define MEMINFO 8 /* Memory Information Register */ | |
188 | #define MEMCFG 10 /* Memory Configuration Register */ | |
189 | ||
190 | /* Bank 1 registers. */ | |
191 | #define CONFIG 0 | |
192 | #define CFG_MII_SELECT 0x8000 /* 91C100 only */ | |
193 | #define CFG_NO_WAIT 0x1000 | |
194 | #define CFG_FULL_STEP 0x0400 | |
195 | #define CFG_SET_SQLCH 0x0200 | |
196 | #define CFG_AUI_SELECT 0x0100 | |
197 | #define CFG_16BIT 0x0080 | |
198 | #define CFG_DIS_LINK 0x0040 | |
199 | #define CFG_STATIC 0x0030 | |
200 | #define CFG_IRQ_SEL_1 0x0004 | |
201 | #define CFG_IRQ_SEL_0 0x0002 | |
202 | #define BASE_ADDR 2 | |
203 | #define ADDR0 4 | |
204 | #define GENERAL 10 | |
205 | #define CONTROL 12 | |
206 | #define CTL_STORE 0x0001 | |
207 | #define CTL_RELOAD 0x0002 | |
208 | #define CTL_EE_SELECT 0x0004 | |
209 | #define CTL_TE_ENABLE 0x0020 | |
210 | #define CTL_CR_ENABLE 0x0040 | |
211 | #define CTL_LE_ENABLE 0x0080 | |
212 | #define CTL_AUTO_RELEASE 0x0800 | |
213 | #define CTL_POWERDOWN 0x2000 | |
214 | ||
215 | /* Bank 2 registers. */ | |
216 | #define MMU_CMD 0 | |
217 | #define MC_ALLOC 0x20 /* or with number of 256 byte packets */ | |
218 | #define MC_RESET 0x40 | |
219 | #define MC_RELEASE 0x80 /* remove and release the current rx packet */ | |
220 | #define MC_FREEPKT 0xA0 /* Release packet in PNR register */ | |
221 | #define MC_ENQUEUE 0xC0 /* Enqueue the packet for transmit */ | |
222 | #define PNR_ARR 2 | |
223 | #define FIFO_PORTS 4 | |
224 | #define FP_RXEMPTY 0x8000 | |
225 | #define POINTER 6 | |
226 | #define PTR_AUTO_INC 0x0040 | |
227 | #define PTR_READ 0x2000 | |
228 | #define PTR_AUTOINC 0x4000 | |
229 | #define PTR_RCV 0x8000 | |
230 | #define DATA_1 8 | |
231 | #define INTERRUPT 12 | |
232 | #define IM_RCV_INT 0x1 | |
233 | #define IM_TX_INT 0x2 | |
234 | #define IM_TX_EMPTY_INT 0x4 | |
235 | #define IM_ALLOC_INT 0x8 | |
236 | #define IM_RX_OVRN_INT 0x10 | |
237 | #define IM_EPH_INT 0x20 | |
238 | ||
239 | #define RCR 4 | |
240 | enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002, | |
241 | RxEnable = 0x0100, RxStripCRC = 0x0200}; | |
242 | #define RCR_SOFTRESET 0x8000 /* resets the chip */ | |
243 | #define RCR_STRIP_CRC 0x200 /* strips CRC */ | |
244 | #define RCR_ENABLE 0x100 /* IFF this is set, we can receive packets */ | |
245 | #define RCR_ALMUL 0x4 /* receive all multicast packets */ | |
246 | #define RCR_PROMISC 0x2 /* enable promiscuous mode */ | |
247 | ||
248 | /* the normal settings for the RCR register : */ | |
249 | #define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE) | |
250 | #define RCR_CLEAR 0x0 /* set it to a base state */ | |
251 | #define COUNTER 6 | |
252 | ||
253 | /* BANK 3 -- not the same values as in smc9194! */ | |
254 | #define MULTICAST0 0 | |
255 | #define MULTICAST2 2 | |
256 | #define MULTICAST4 4 | |
257 | #define MULTICAST6 6 | |
258 | #define MGMT 8 | |
259 | #define REVISION 0x0a | |
260 | ||
261 | /* Transmit status bits. */ | |
262 | #define TS_SUCCESS 0x0001 | |
263 | #define TS_16COL 0x0010 | |
264 | #define TS_LATCOL 0x0200 | |
265 | #define TS_LOSTCAR 0x0400 | |
266 | ||
267 | /* Receive status bits. */ | |
268 | #define RS_ALGNERR 0x8000 | |
269 | #define RS_BADCRC 0x2000 | |
270 | #define RS_ODDFRAME 0x1000 | |
271 | #define RS_TOOLONG 0x0800 | |
272 | #define RS_TOOSHORT 0x0400 | |
273 | #define RS_MULTICAST 0x0001 | |
274 | #define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT) | |
275 | ||
276 | #define set_bits(v, p) outw(inw(p)|(v), (p)) | |
277 | #define mask_bits(v, p) outw(inw(p)&(v), (p)) | |
278 | ||
279 | /*====================================================================*/ | |
280 | ||
cc3b4866 | 281 | static void smc91c92_detach(struct pcmcia_device *p_dev); |
15b99ac1 | 282 | static int smc91c92_config(struct pcmcia_device *link); |
fba395ee | 283 | static void smc91c92_release(struct pcmcia_device *link); |
1da177e4 LT |
284 | |
285 | static int smc_open(struct net_device *dev); | |
286 | static int smc_close(struct net_device *dev); | |
287 | static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); | |
288 | static void smc_tx_timeout(struct net_device *dev); | |
289 | static int smc_start_xmit(struct sk_buff *skb, struct net_device *dev); | |
7d12e780 | 290 | static irqreturn_t smc_interrupt(int irq, void *dev_id); |
1da177e4 LT |
291 | static void smc_rx(struct net_device *dev); |
292 | static struct net_device_stats *smc_get_stats(struct net_device *dev); | |
293 | static void set_rx_mode(struct net_device *dev); | |
294 | static int s9k_config(struct net_device *dev, struct ifmap *map); | |
295 | static void smc_set_xcvr(struct net_device *dev, int if_port); | |
296 | static void smc_reset(struct net_device *dev); | |
297 | static void media_check(u_long arg); | |
906da809 | 298 | static void mdio_sync(unsigned int addr); |
1da177e4 LT |
299 | static int mdio_read(struct net_device *dev, int phy_id, int loc); |
300 | static void mdio_write(struct net_device *dev, int phy_id, int loc, int value); | |
301 | static int smc_link_ok(struct net_device *dev); | |
7282d491 | 302 | static const struct ethtool_ops ethtool_ops; |
1da177e4 LT |
303 | |
304 | /*====================================================================== | |
305 | ||
306 | smc91c92_attach() creates an "instance" of the driver, allocating | |
307 | local data structures for one device. The device is registered | |
308 | with Card Services. | |
309 | ||
310 | ======================================================================*/ | |
311 | ||
15b99ac1 | 312 | static int smc91c92_probe(struct pcmcia_device *link) |
1da177e4 | 313 | { |
1da177e4 | 314 | struct smc_private *smc; |
1da177e4 | 315 | struct net_device *dev; |
1da177e4 LT |
316 | |
317 | DEBUG(0, "smc91c92_attach()\n"); | |
318 | ||
319 | /* Create new ethernet device */ | |
320 | dev = alloc_etherdev(sizeof(struct smc_private)); | |
321 | if (!dev) | |
f8cfa618 | 322 | return -ENOMEM; |
1da177e4 | 323 | smc = netdev_priv(dev); |
fba395ee | 324 | smc->p_dev = link; |
1da177e4 LT |
325 | link->priv = dev; |
326 | ||
327 | spin_lock_init(&smc->lock); | |
328 | link->io.NumPorts1 = 16; | |
329 | link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO; | |
330 | link->io.IOAddrLines = 4; | |
5e7bf8cc | 331 | link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING|IRQ_HANDLE_PRESENT; |
1da177e4 LT |
332 | link->irq.IRQInfo1 = IRQ_LEVEL_ID; |
333 | link->irq.Handler = &smc_interrupt; | |
334 | link->irq.Instance = dev; | |
335 | link->conf.Attributes = CONF_ENABLE_IRQ; | |
1da177e4 LT |
336 | link->conf.IntType = INT_MEMORY_AND_IO; |
337 | ||
338 | /* The SMC91c92-specific entries in the device structure. */ | |
1da177e4 LT |
339 | dev->hard_start_xmit = &smc_start_xmit; |
340 | dev->get_stats = &smc_get_stats; | |
341 | dev->set_config = &s9k_config; | |
342 | dev->set_multicast_list = &set_rx_mode; | |
343 | dev->open = &smc_open; | |
344 | dev->stop = &smc_close; | |
345 | dev->do_ioctl = &smc_ioctl; | |
346 | SET_ETHTOOL_OPS(dev, ðtool_ops); | |
347 | #ifdef HAVE_TX_TIMEOUT | |
348 | dev->tx_timeout = smc_tx_timeout; | |
349 | dev->watchdog_timeo = TX_TIMEOUT; | |
350 | #endif | |
351 | ||
352 | smc->mii_if.dev = dev; | |
353 | smc->mii_if.mdio_read = mdio_read; | |
354 | smc->mii_if.mdio_write = mdio_write; | |
355 | smc->mii_if.phy_id_mask = 0x1f; | |
356 | smc->mii_if.reg_num_mask = 0x1f; | |
357 | ||
15b99ac1 | 358 | return smc91c92_config(link); |
1da177e4 LT |
359 | } /* smc91c92_attach */ |
360 | ||
361 | /*====================================================================== | |
362 | ||
363 | This deletes a driver "instance". The device is de-registered | |
364 | with Card Services. If it has been released, all local data | |
365 | structures are freed. Otherwise, the structures will be freed | |
366 | when the device is released. | |
367 | ||
368 | ======================================================================*/ | |
369 | ||
fba395ee | 370 | static void smc91c92_detach(struct pcmcia_device *link) |
1da177e4 LT |
371 | { |
372 | struct net_device *dev = link->priv; | |
1da177e4 LT |
373 | |
374 | DEBUG(0, "smc91c92_detach(0x%p)\n", link); | |
375 | ||
fd238232 | 376 | if (link->dev_node) |
1da177e4 LT |
377 | unregister_netdev(dev); |
378 | ||
e2d40963 | 379 | smc91c92_release(link); |
1da177e4 | 380 | |
1da177e4 LT |
381 | free_netdev(dev); |
382 | } /* smc91c92_detach */ | |
383 | ||
384 | /*====================================================================*/ | |
385 | ||
386 | static int cvt_ascii_address(struct net_device *dev, char *s) | |
387 | { | |
388 | int i, j, da, c; | |
389 | ||
390 | if (strlen(s) != 12) | |
391 | return -1; | |
392 | for (i = 0; i < 6; i++) { | |
393 | da = 0; | |
394 | for (j = 0; j < 2; j++) { | |
395 | c = *s++; | |
396 | da <<= 4; | |
397 | da += ((c >= '0') && (c <= '9')) ? | |
398 | (c - '0') : ((c & 0x0f) + 9); | |
399 | } | |
400 | dev->dev_addr[i] = da; | |
401 | } | |
402 | return 0; | |
403 | } | |
404 | ||
405 | /*====================================================================*/ | |
406 | ||
fba395ee | 407 | static int first_tuple(struct pcmcia_device *handle, tuple_t *tuple, |
1da177e4 LT |
408 | cisparse_t *parse) |
409 | { | |
410 | int i; | |
411 | ||
4c89e88b DB |
412 | i = pcmcia_get_first_tuple(handle, tuple); |
413 | if (i != 0) | |
414 | return i; | |
415 | i = pcmcia_get_tuple_data(handle, tuple); | |
416 | if (i != 0) | |
1da177e4 | 417 | return i; |
2f3061eb | 418 | return pcmcia_parse_tuple(tuple, parse); |
1da177e4 LT |
419 | } |
420 | ||
fba395ee | 421 | static int next_tuple(struct pcmcia_device *handle, tuple_t *tuple, |
1da177e4 LT |
422 | cisparse_t *parse) |
423 | { | |
424 | int i; | |
425 | ||
4c89e88b DB |
426 | if ((i = pcmcia_get_next_tuple(handle, tuple)) != 0 || |
427 | (i = pcmcia_get_tuple_data(handle, tuple)) != 0) | |
1da177e4 | 428 | return i; |
2f3061eb | 429 | return pcmcia_parse_tuple(tuple, parse); |
1da177e4 LT |
430 | } |
431 | ||
432 | /*====================================================================== | |
433 | ||
434 | Configuration stuff for Megahertz cards | |
435 | ||
436 | mhz_3288_power() is used to power up a 3288's ethernet chip. | |
437 | mhz_mfc_config() handles socket setup for multifunction (1144 | |
438 | and 3288) cards. mhz_setup() gets a card's hardware ethernet | |
439 | address. | |
440 | ||
441 | ======================================================================*/ | |
442 | ||
fba395ee | 443 | static int mhz_3288_power(struct pcmcia_device *link) |
1da177e4 LT |
444 | { |
445 | struct net_device *dev = link->priv; | |
446 | struct smc_private *smc = netdev_priv(dev); | |
447 | u_char tmp; | |
448 | ||
449 | /* Read the ISR twice... */ | |
450 | readb(smc->base+MEGAHERTZ_ISR); | |
451 | udelay(5); | |
452 | readb(smc->base+MEGAHERTZ_ISR); | |
453 | ||
454 | /* Pause 200ms... */ | |
455 | mdelay(200); | |
456 | ||
457 | /* Now read and write the COR... */ | |
458 | tmp = readb(smc->base + link->conf.ConfigBase + CISREG_COR); | |
459 | udelay(5); | |
460 | writeb(tmp, smc->base + link->conf.ConfigBase + CISREG_COR); | |
461 | ||
462 | return 0; | |
463 | } | |
464 | ||
b54bf94b DB |
465 | static int mhz_mfc_config_check(struct pcmcia_device *p_dev, |
466 | cistpl_cftable_entry_t *cf, | |
8e2fc39d | 467 | cistpl_cftable_entry_t *dflt, |
ad913c11 | 468 | unsigned int vcc, |
b54bf94b DB |
469 | void *priv_data) |
470 | { | |
471 | int k; | |
b54bf94b DB |
472 | p_dev->io.BasePort2 = cf->io.win[0].base; |
473 | for (k = 0; k < 0x400; k += 0x10) { | |
474 | if (k & 0x80) | |
475 | continue; | |
476 | p_dev->io.BasePort1 = k ^ 0x300; | |
477 | if (!pcmcia_request_io(p_dev, &p_dev->io)) | |
478 | return 0; | |
479 | } | |
480 | return -ENODEV; | |
481 | } | |
482 | ||
fba395ee | 483 | static int mhz_mfc_config(struct pcmcia_device *link) |
1da177e4 LT |
484 | { |
485 | struct net_device *dev = link->priv; | |
486 | struct smc_private *smc = netdev_priv(dev); | |
4638aef4 | 487 | struct smc_cfg_mem *cfg_mem; |
1da177e4 LT |
488 | win_req_t req; |
489 | memreq_t mem; | |
b54bf94b | 490 | int i; |
1da177e4 | 491 | |
4638aef4 YR |
492 | cfg_mem = kmalloc(sizeof(struct smc_cfg_mem), GFP_KERNEL); |
493 | if (!cfg_mem) | |
1168386a | 494 | return -ENOMEM; |
4638aef4 | 495 | |
1da177e4 LT |
496 | link->conf.Attributes |= CONF_ENABLE_SPKR; |
497 | link->conf.Status = CCSR_AUDIO_ENA; | |
498 | link->irq.Attributes = | |
499 | IRQ_TYPE_DYNAMIC_SHARING|IRQ_FIRST_SHARED|IRQ_HANDLE_PRESENT; | |
500 | link->io.IOAddrLines = 16; | |
501 | link->io.Attributes2 = IO_DATA_PATH_WIDTH_8; | |
502 | link->io.NumPorts2 = 8; | |
503 | ||
1da177e4 LT |
504 | /* The Megahertz combo cards have modem-like CIS entries, so |
505 | we have to explicitly try a bunch of port combinations. */ | |
b54bf94b | 506 | if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL)) |
4638aef4 | 507 | goto free_cfg_mem; |
1da177e4 LT |
508 | dev->base_addr = link->io.BasePort1; |
509 | ||
510 | /* Allocate a memory window, for accessing the ISR */ | |
511 | req.Attributes = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE; | |
512 | req.Base = req.Size = 0; | |
513 | req.AccessSpeed = 0; | |
fba395ee | 514 | i = pcmcia_request_window(&link, &req, &link->win); |
4c89e88b | 515 | if (i != 0) |
4638aef4 | 516 | goto free_cfg_mem; |
1da177e4 LT |
517 | smc->base = ioremap(req.Base, req.Size); |
518 | mem.CardOffset = mem.Page = 0; | |
519 | if (smc->manfid == MANFID_MOTOROLA) | |
520 | mem.CardOffset = link->conf.ConfigBase; | |
521 | i = pcmcia_map_mem_page(link->win, &mem); | |
522 | ||
4c89e88b | 523 | if ((i == 0) |
1da177e4 LT |
524 | && (smc->manfid == MANFID_MEGAHERTZ) |
525 | && (smc->cardid == PRODID_MEGAHERTZ_EM3288)) | |
526 | mhz_3288_power(link); | |
527 | ||
4638aef4 YR |
528 | free_cfg_mem: |
529 | kfree(cfg_mem); | |
b54bf94b | 530 | return -ENODEV; |
1da177e4 LT |
531 | } |
532 | ||
fba395ee | 533 | static int mhz_setup(struct pcmcia_device *link) |
1da177e4 | 534 | { |
1da177e4 | 535 | struct net_device *dev = link->priv; |
4638aef4 YR |
536 | struct smc_cfg_mem *cfg_mem; |
537 | tuple_t *tuple; | |
538 | cisparse_t *parse; | |
539 | u_char *buf, *station_addr; | |
540 | int rc; | |
541 | ||
542 | cfg_mem = kmalloc(sizeof(struct smc_cfg_mem), GFP_KERNEL); | |
543 | if (!cfg_mem) | |
544 | return -1; | |
1da177e4 | 545 | |
4638aef4 YR |
546 | tuple = &cfg_mem->tuple; |
547 | parse = &cfg_mem->parse; | |
548 | buf = cfg_mem->buf; | |
549 | ||
550 | tuple->Attributes = tuple->TupleOffset = 0; | |
551 | tuple->TupleData = (cisdata_t *)buf; | |
552 | tuple->TupleDataMax = 255; | |
1da177e4 LT |
553 | |
554 | /* Read the station address from the CIS. It is stored as the last | |
555 | (fourth) string in the Version 1 Version/ID tuple. */ | |
a1a98b72 | 556 | tuple->DesiredTuple = CISTPL_VERS_1; |
4c89e88b | 557 | if (first_tuple(link, tuple, parse) != 0) { |
a1a98b72 CE |
558 | rc = -1; |
559 | goto free_cfg_mem; | |
560 | } | |
561 | /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */ | |
4c89e88b | 562 | if (next_tuple(link, tuple, parse) != 0) |
a1a98b72 CE |
563 | first_tuple(link, tuple, parse); |
564 | if (parse->version_1.ns > 3) { | |
565 | station_addr = parse->version_1.str + parse->version_1.ofs[3]; | |
4638aef4 YR |
566 | if (cvt_ascii_address(dev, station_addr) == 0) { |
567 | rc = 0; | |
568 | goto free_cfg_mem; | |
569 | } | |
1da177e4 LT |
570 | } |
571 | ||
572 | /* Another possibility: for the EM3288, in a special tuple */ | |
4638aef4 | 573 | tuple->DesiredTuple = 0x81; |
4c89e88b | 574 | if (pcmcia_get_first_tuple(link, tuple) != 0) { |
4638aef4 YR |
575 | rc = -1; |
576 | goto free_cfg_mem; | |
577 | } | |
4c89e88b | 578 | if (pcmcia_get_tuple_data(link, tuple) != 0) { |
4638aef4 YR |
579 | rc = -1; |
580 | goto free_cfg_mem; | |
581 | } | |
1da177e4 | 582 | buf[12] = '\0'; |
4638aef4 YR |
583 | if (cvt_ascii_address(dev, buf) == 0) { |
584 | rc = 0; | |
585 | goto free_cfg_mem; | |
586 | } | |
587 | rc = -1; | |
588 | free_cfg_mem: | |
589 | kfree(cfg_mem); | |
590 | return rc; | |
1da177e4 LT |
591 | } |
592 | ||
593 | /*====================================================================== | |
594 | ||
595 | Configuration stuff for the Motorola Mariner | |
596 | ||
597 | mot_config() writes directly to the Mariner configuration | |
598 | registers because the CIS is just bogus. | |
599 | ||
600 | ======================================================================*/ | |
601 | ||
fba395ee | 602 | static void mot_config(struct pcmcia_device *link) |
1da177e4 LT |
603 | { |
604 | struct net_device *dev = link->priv; | |
605 | struct smc_private *smc = netdev_priv(dev); | |
906da809 OJ |
606 | unsigned int ioaddr = dev->base_addr; |
607 | unsigned int iouart = link->io.BasePort2; | |
1da177e4 LT |
608 | |
609 | /* Set UART base address and force map with COR bit 1 */ | |
610 | writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0); | |
611 | writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1); | |
612 | writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR); | |
613 | ||
614 | /* Set SMC base address and force map with COR bit 1 */ | |
615 | writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0); | |
616 | writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1); | |
617 | writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR); | |
618 | ||
619 | /* Wait for things to settle down */ | |
620 | mdelay(100); | |
621 | } | |
622 | ||
fba395ee | 623 | static int mot_setup(struct pcmcia_device *link) |
1da177e4 LT |
624 | { |
625 | struct net_device *dev = link->priv; | |
906da809 | 626 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
627 | int i, wait, loop; |
628 | u_int addr; | |
629 | ||
630 | /* Read Ethernet address from Serial EEPROM */ | |
631 | ||
632 | for (i = 0; i < 3; i++) { | |
633 | SMC_SELECT_BANK(2); | |
634 | outw(MOT_EEPROM + i, ioaddr + POINTER); | |
635 | SMC_SELECT_BANK(1); | |
636 | outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL); | |
637 | ||
638 | for (loop = wait = 0; loop < 200; loop++) { | |
639 | udelay(10); | |
640 | wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL)); | |
641 | if (wait == 0) break; | |
642 | } | |
643 | ||
644 | if (wait) | |
645 | return -1; | |
646 | ||
647 | addr = inw(ioaddr + GENERAL); | |
648 | dev->dev_addr[2*i] = addr & 0xff; | |
649 | dev->dev_addr[2*i+1] = (addr >> 8) & 0xff; | |
650 | } | |
651 | ||
652 | return 0; | |
653 | } | |
654 | ||
655 | /*====================================================================*/ | |
656 | ||
b54bf94b DB |
657 | static int smc_configcheck(struct pcmcia_device *p_dev, |
658 | cistpl_cftable_entry_t *cf, | |
8e2fc39d | 659 | cistpl_cftable_entry_t *dflt, |
ad913c11 | 660 | unsigned int vcc, |
b54bf94b DB |
661 | void *priv_data) |
662 | { | |
b54bf94b DB |
663 | p_dev->io.BasePort1 = cf->io.win[0].base; |
664 | p_dev->io.IOAddrLines = cf->io.flags & CISTPL_IO_LINES_MASK; | |
665 | return pcmcia_request_io(p_dev, &p_dev->io); | |
666 | } | |
667 | ||
fba395ee | 668 | static int smc_config(struct pcmcia_device *link) |
1da177e4 LT |
669 | { |
670 | struct net_device *dev = link->priv; | |
1da177e4 LT |
671 | int i; |
672 | ||
1da177e4 | 673 | link->io.NumPorts1 = 16; |
b54bf94b DB |
674 | i = pcmcia_loop_config(link, smc_configcheck, NULL); |
675 | if (!i) | |
676 | dev->base_addr = link->io.BasePort1; | |
4638aef4 | 677 | |
1da177e4 LT |
678 | return i; |
679 | } | |
680 | ||
fba395ee | 681 | static int smc_setup(struct pcmcia_device *link) |
1da177e4 | 682 | { |
1da177e4 | 683 | struct net_device *dev = link->priv; |
4638aef4 YR |
684 | struct smc_cfg_mem *cfg_mem; |
685 | tuple_t *tuple; | |
686 | cisparse_t *parse; | |
1da177e4 | 687 | cistpl_lan_node_id_t *node_id; |
4638aef4 YR |
688 | u_char *buf, *station_addr; |
689 | int i, rc; | |
690 | ||
691 | cfg_mem = kmalloc(sizeof(struct smc_cfg_mem), GFP_KERNEL); | |
692 | if (!cfg_mem) | |
1168386a | 693 | return -ENOMEM; |
4638aef4 YR |
694 | |
695 | tuple = &cfg_mem->tuple; | |
696 | parse = &cfg_mem->parse; | |
697 | buf = cfg_mem->buf; | |
1da177e4 | 698 | |
4638aef4 YR |
699 | tuple->Attributes = tuple->TupleOffset = 0; |
700 | tuple->TupleData = (cisdata_t *)buf; | |
701 | tuple->TupleDataMax = 255; | |
1da177e4 LT |
702 | |
703 | /* Check for a LAN function extension tuple */ | |
4638aef4 | 704 | tuple->DesiredTuple = CISTPL_FUNCE; |
fba395ee | 705 | i = first_tuple(link, tuple, parse); |
4c89e88b | 706 | while (i == 0) { |
4638aef4 | 707 | if (parse->funce.type == CISTPL_FUNCE_LAN_NODE_ID) |
1da177e4 | 708 | break; |
fba395ee | 709 | i = next_tuple(link, tuple, parse); |
1da177e4 | 710 | } |
4c89e88b | 711 | if (i == 0) { |
4638aef4 | 712 | node_id = (cistpl_lan_node_id_t *)parse->funce.data; |
1da177e4 LT |
713 | if (node_id->nb == 6) { |
714 | for (i = 0; i < 6; i++) | |
715 | dev->dev_addr[i] = node_id->id[i]; | |
4638aef4 YR |
716 | rc = 0; |
717 | goto free_cfg_mem; | |
1da177e4 LT |
718 | } |
719 | } | |
720 | /* Try the third string in the Version 1 Version/ID tuple. */ | |
a9606fd3 DB |
721 | if (link->prod_id[2]) { |
722 | station_addr = link->prod_id[2]; | |
723 | if (cvt_ascii_address(dev, station_addr) == 0) { | |
724 | rc = 0; | |
725 | goto free_cfg_mem; | |
726 | } | |
4638aef4 | 727 | } |
1da177e4 | 728 | |
4638aef4 YR |
729 | rc = -1; |
730 | free_cfg_mem: | |
731 | kfree(cfg_mem); | |
732 | return rc; | |
1da177e4 LT |
733 | } |
734 | ||
735 | /*====================================================================*/ | |
736 | ||
fba395ee | 737 | static int osi_config(struct pcmcia_device *link) |
1da177e4 LT |
738 | { |
739 | struct net_device *dev = link->priv; | |
906da809 | 740 | static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; |
1da177e4 LT |
741 | int i, j; |
742 | ||
743 | link->conf.Attributes |= CONF_ENABLE_SPKR; | |
744 | link->conf.Status = CCSR_AUDIO_ENA; | |
745 | link->irq.Attributes = | |
746 | IRQ_TYPE_DYNAMIC_SHARING|IRQ_FIRST_SHARED|IRQ_HANDLE_PRESENT; | |
747 | link->io.NumPorts1 = 64; | |
748 | link->io.Attributes2 = IO_DATA_PATH_WIDTH_8; | |
749 | link->io.NumPorts2 = 8; | |
750 | link->io.IOAddrLines = 16; | |
751 | ||
752 | /* Enable Hard Decode, LAN, Modem */ | |
753 | link->conf.ConfigIndex = 0x23; | |
754 | ||
755 | for (i = j = 0; j < 4; j++) { | |
756 | link->io.BasePort2 = com[j]; | |
fba395ee | 757 | i = pcmcia_request_io(link, &link->io); |
4c89e88b DB |
758 | if (i == 0) |
759 | break; | |
1da177e4 | 760 | } |
4c89e88b | 761 | if (i != 0) { |
1da177e4 LT |
762 | /* Fallback: turn off hard decode */ |
763 | link->conf.ConfigIndex = 0x03; | |
764 | link->io.NumPorts2 = 0; | |
fba395ee | 765 | i = pcmcia_request_io(link, &link->io); |
1da177e4 LT |
766 | } |
767 | dev->base_addr = link->io.BasePort1 + 0x10; | |
768 | return i; | |
769 | } | |
770 | ||
fba395ee | 771 | static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid) |
1da177e4 | 772 | { |
1da177e4 | 773 | struct net_device *dev = link->priv; |
4638aef4 YR |
774 | struct smc_cfg_mem *cfg_mem; |
775 | tuple_t *tuple; | |
776 | u_char *buf; | |
777 | int i, rc; | |
1da177e4 | 778 | |
4638aef4 YR |
779 | cfg_mem = kmalloc(sizeof(struct smc_cfg_mem), GFP_KERNEL); |
780 | if (!cfg_mem) | |
781 | return -1; | |
782 | ||
783 | tuple = &cfg_mem->tuple; | |
784 | buf = cfg_mem->buf; | |
785 | ||
786 | tuple->Attributes = TUPLE_RETURN_COMMON; | |
787 | tuple->TupleData = (cisdata_t *)buf; | |
788 | tuple->TupleDataMax = 255; | |
789 | tuple->TupleOffset = 0; | |
1da177e4 LT |
790 | |
791 | /* Read the station address from tuple 0x90, subtuple 0x04 */ | |
4638aef4 | 792 | tuple->DesiredTuple = 0x90; |
fba395ee | 793 | i = pcmcia_get_first_tuple(link, tuple); |
4c89e88b | 794 | while (i == 0) { |
fba395ee | 795 | i = pcmcia_get_tuple_data(link, tuple); |
4c89e88b | 796 | if ((i != 0) || (buf[0] == 0x04)) |
1da177e4 | 797 | break; |
fba395ee | 798 | i = pcmcia_get_next_tuple(link, tuple); |
4638aef4 | 799 | } |
4c89e88b | 800 | if (i != 0) { |
4638aef4 YR |
801 | rc = -1; |
802 | goto free_cfg_mem; | |
1da177e4 | 803 | } |
1da177e4 LT |
804 | for (i = 0; i < 6; i++) |
805 | dev->dev_addr[i] = buf[i+2]; | |
806 | ||
807 | if (((manfid == MANFID_OSITECH) && | |
808 | (cardid == PRODID_OSITECH_SEVEN)) || | |
809 | ((manfid == MANFID_PSION) && | |
810 | (cardid == PRODID_PSION_NET100))) { | |
811 | /* Download the Seven of Diamonds firmware */ | |
812 | for (i = 0; i < sizeof(__Xilinx7OD); i++) { | |
813 | outb(__Xilinx7OD[i], link->io.BasePort1+2); | |
814 | udelay(50); | |
815 | } | |
816 | } else if (manfid == MANFID_OSITECH) { | |
817 | /* Make sure both functions are powered up */ | |
818 | set_bits(0x300, link->io.BasePort1 + OSITECH_AUI_PWR); | |
819 | /* Now, turn on the interrupt for both card functions */ | |
820 | set_bits(0x300, link->io.BasePort1 + OSITECH_RESET_ISR); | |
821 | DEBUG(2, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n", | |
822 | inw(link->io.BasePort1 + OSITECH_AUI_PWR), | |
823 | inw(link->io.BasePort1 + OSITECH_RESET_ISR)); | |
824 | } | |
4638aef4 YR |
825 | rc = 0; |
826 | free_cfg_mem: | |
827 | kfree(cfg_mem); | |
828 | return rc; | |
1da177e4 LT |
829 | } |
830 | ||
fba395ee | 831 | static int smc91c92_suspend(struct pcmcia_device *link) |
98e4c28b | 832 | { |
98e4c28b DB |
833 | struct net_device *dev = link->priv; |
834 | ||
e2d40963 | 835 | if (link->open) |
4bbed523 | 836 | netif_device_detach(dev); |
98e4c28b DB |
837 | |
838 | return 0; | |
839 | } | |
840 | ||
fba395ee | 841 | static int smc91c92_resume(struct pcmcia_device *link) |
98e4c28b | 842 | { |
98e4c28b DB |
843 | struct net_device *dev = link->priv; |
844 | struct smc_private *smc = netdev_priv(dev); | |
845 | int i; | |
846 | ||
e2d40963 DB |
847 | if ((smc->manfid == MANFID_MEGAHERTZ) && |
848 | (smc->cardid == PRODID_MEGAHERTZ_EM3288)) | |
849 | mhz_3288_power(link); | |
850 | if (smc->manfid == MANFID_MOTOROLA) | |
851 | mot_config(link); | |
852 | if ((smc->manfid == MANFID_OSITECH) && | |
853 | (smc->cardid != PRODID_OSITECH_SEVEN)) { | |
854 | /* Power up the card and enable interrupts */ | |
855 | set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR); | |
856 | set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR); | |
857 | } | |
858 | if (((smc->manfid == MANFID_OSITECH) && | |
859 | (smc->cardid == PRODID_OSITECH_SEVEN)) || | |
860 | ((smc->manfid == MANFID_PSION) && | |
861 | (smc->cardid == PRODID_PSION_NET100))) { | |
862 | /* Download the Seven of Diamonds firmware */ | |
863 | for (i = 0; i < sizeof(__Xilinx7OD); i++) { | |
864 | outb(__Xilinx7OD[i], link->io.BasePort1+2); | |
865 | udelay(50); | |
98e4c28b DB |
866 | } |
867 | } | |
e2d40963 DB |
868 | if (link->open) { |
869 | smc_reset(dev); | |
870 | netif_device_attach(dev); | |
871 | } | |
98e4c28b DB |
872 | |
873 | return 0; | |
874 | } | |
875 | ||
876 | ||
1da177e4 LT |
877 | /*====================================================================== |
878 | ||
879 | This verifies that the chip is some SMC91cXX variant, and returns | |
880 | the revision code if successful. Otherwise, it returns -ENODEV. | |
881 | ||
882 | ======================================================================*/ | |
883 | ||
fba395ee | 884 | static int check_sig(struct pcmcia_device *link) |
1da177e4 LT |
885 | { |
886 | struct net_device *dev = link->priv; | |
906da809 | 887 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
888 | int width; |
889 | u_short s; | |
890 | ||
891 | SMC_SELECT_BANK(1); | |
892 | if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) { | |
893 | /* Try powering up the chip */ | |
894 | outw(0, ioaddr + CONTROL); | |
895 | mdelay(55); | |
896 | } | |
897 | ||
898 | /* Try setting bus width */ | |
899 | width = (link->io.Attributes1 == IO_DATA_PATH_WIDTH_AUTO); | |
900 | s = inb(ioaddr + CONFIG); | |
901 | if (width) | |
902 | s |= CFG_16BIT; | |
903 | else | |
904 | s &= ~CFG_16BIT; | |
905 | outb(s, ioaddr + CONFIG); | |
906 | ||
907 | /* Check Base Address Register to make sure bus width is OK */ | |
908 | s = inw(ioaddr + BASE_ADDR); | |
909 | if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) && | |
910 | ((s >> 8) != (s & 0xff))) { | |
911 | SMC_SELECT_BANK(3); | |
912 | s = inw(ioaddr + REVISION); | |
913 | return (s & 0xff); | |
914 | } | |
915 | ||
916 | if (width) { | |
4bbed523 DB |
917 | modconf_t mod = { |
918 | .Attributes = CONF_IO_CHANGE_WIDTH, | |
919 | }; | |
920 | printk(KERN_INFO "smc91c92_cs: using 8-bit IO window.\n"); | |
921 | ||
fba395ee DB |
922 | smc91c92_suspend(link); |
923 | pcmcia_modify_configuration(link, &mod); | |
924 | smc91c92_resume(link); | |
4bbed523 | 925 | return check_sig(link); |
1da177e4 LT |
926 | } |
927 | return -ENODEV; | |
928 | } | |
929 | ||
930 | /*====================================================================== | |
931 | ||
932 | smc91c92_config() is scheduled to run after a CARD_INSERTION event | |
933 | is received, to configure the PCMCIA socket, and to make the | |
934 | ethernet device available to the system. | |
935 | ||
936 | ======================================================================*/ | |
937 | ||
4c89e88b DB |
938 | #define CS_EXIT_TEST(ret, svc, label) \ |
939 | if (ret != 0) { \ | |
940 | cs_error(link, svc, ret); \ | |
941 | goto label; \ | |
942 | } | |
1da177e4 | 943 | |
15b99ac1 | 944 | static int smc91c92_config(struct pcmcia_device *link) |
1da177e4 | 945 | { |
1da177e4 LT |
946 | struct net_device *dev = link->priv; |
947 | struct smc_private *smc = netdev_priv(dev); | |
1da177e4 LT |
948 | char *name; |
949 | int i, j, rev; | |
906da809 | 950 | unsigned int ioaddr; |
1da177e4 LT |
951 | u_long mir; |
952 | ||
953 | DEBUG(0, "smc91c92_config(0x%p)\n", link); | |
954 | ||
efd50585 DB |
955 | smc->manfid = link->manf_id; |
956 | smc->cardid = link->card_id; | |
1da177e4 | 957 | |
1da177e4 LT |
958 | if ((smc->manfid == MANFID_OSITECH) && |
959 | (smc->cardid != PRODID_OSITECH_SEVEN)) { | |
960 | i = osi_config(link); | |
961 | } else if ((smc->manfid == MANFID_MOTOROLA) || | |
962 | ((smc->manfid == MANFID_MEGAHERTZ) && | |
963 | ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) || | |
964 | (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) { | |
965 | i = mhz_mfc_config(link); | |
966 | } else { | |
967 | i = smc_config(link); | |
968 | } | |
969 | CS_EXIT_TEST(i, RequestIO, config_failed); | |
970 | ||
fba395ee | 971 | i = pcmcia_request_irq(link, &link->irq); |
1da177e4 | 972 | CS_EXIT_TEST(i, RequestIRQ, config_failed); |
fba395ee | 973 | i = pcmcia_request_configuration(link, &link->conf); |
1da177e4 LT |
974 | CS_EXIT_TEST(i, RequestConfiguration, config_failed); |
975 | ||
976 | if (smc->manfid == MANFID_MOTOROLA) | |
977 | mot_config(link); | |
978 | ||
979 | dev->irq = link->irq.AssignedIRQ; | |
980 | ||
981 | if ((if_port >= 0) && (if_port <= 2)) | |
982 | dev->if_port = if_port; | |
983 | else | |
984 | printk(KERN_NOTICE "smc91c92_cs: invalid if_port requested\n"); | |
985 | ||
986 | switch (smc->manfid) { | |
987 | case MANFID_OSITECH: | |
988 | case MANFID_PSION: | |
989 | i = osi_setup(link, smc->manfid, smc->cardid); break; | |
990 | case MANFID_SMC: | |
991 | case MANFID_NEW_MEDIA: | |
992 | i = smc_setup(link); break; | |
993 | case 0x128: /* For broken Megahertz cards */ | |
994 | case MANFID_MEGAHERTZ: | |
995 | i = mhz_setup(link); break; | |
996 | case MANFID_MOTOROLA: | |
997 | default: /* get the hw address from EEPROM */ | |
998 | i = mot_setup(link); break; | |
999 | } | |
1000 | ||
1001 | if (i != 0) { | |
1002 | printk(KERN_NOTICE "smc91c92_cs: Unable to find hardware address.\n"); | |
1003 | goto config_undo; | |
1004 | } | |
1005 | ||
1006 | smc->duplex = 0; | |
1007 | smc->rx_ovrn = 0; | |
1008 | ||
1009 | rev = check_sig(link); | |
1010 | name = "???"; | |
1011 | if (rev > 0) | |
1012 | switch (rev >> 4) { | |
1013 | case 3: name = "92"; break; | |
1014 | case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break; | |
1015 | case 5: name = "95"; break; | |
1016 | case 7: name = "100"; break; | |
1017 | case 8: name = "100-FD"; break; | |
1018 | case 9: name = "110"; break; | |
1019 | } | |
1020 | ||
1021 | ioaddr = dev->base_addr; | |
1022 | if (rev > 0) { | |
1023 | u_long mcr; | |
1024 | SMC_SELECT_BANK(0); | |
1025 | mir = inw(ioaddr + MEMINFO) & 0xff; | |
1026 | if (mir == 0xff) mir++; | |
1027 | /* Get scale factor for memory size */ | |
1028 | mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200; | |
1029 | mir *= 128 * (1<<((mcr >> 9) & 7)); | |
1030 | SMC_SELECT_BANK(1); | |
1031 | smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT; | |
1032 | smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC; | |
1033 | if (smc->manfid == MANFID_OSITECH) | |
1034 | smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0; | |
1035 | if ((rev >> 4) >= 7) | |
1036 | smc->cfg |= CFG_MII_SELECT; | |
1037 | } else | |
1038 | mir = 0; | |
1039 | ||
1040 | if (smc->cfg & CFG_MII_SELECT) { | |
1041 | SMC_SELECT_BANK(3); | |
1042 | ||
1043 | for (i = 0; i < 32; i++) { | |
1044 | j = mdio_read(dev, i, 1); | |
1045 | if ((j != 0) && (j != 0xffff)) break; | |
1046 | } | |
1047 | smc->mii_if.phy_id = (i < 32) ? i : -1; | |
1048 | ||
1049 | SMC_SELECT_BANK(0); | |
1050 | } | |
1051 | ||
fd238232 | 1052 | link->dev_node = &smc->node; |
fba395ee | 1053 | SET_NETDEV_DEV(dev, &handle_to_dev(link)); |
1da177e4 LT |
1054 | |
1055 | if (register_netdev(dev) != 0) { | |
1056 | printk(KERN_ERR "smc91c92_cs: register_netdev() failed\n"); | |
fd238232 | 1057 | link->dev_node = NULL; |
1da177e4 LT |
1058 | goto config_undo; |
1059 | } | |
1060 | ||
1061 | strcpy(smc->node.dev_name, dev->name); | |
1062 | ||
1063 | printk(KERN_INFO "%s: smc91c%s rev %d: io %#3lx, irq %d, " | |
e174961c | 1064 | "hw_addr %pM\n", |
0795af57 | 1065 | dev->name, name, (rev & 0x0f), dev->base_addr, dev->irq, |
e174961c | 1066 | dev->dev_addr); |
1da177e4 LT |
1067 | |
1068 | if (rev > 0) { | |
1069 | if (mir & 0x3ff) | |
1070 | printk(KERN_INFO " %lu byte", mir); | |
1071 | else | |
1072 | printk(KERN_INFO " %lu kb", mir>>10); | |
1073 | printk(" buffer, %s xcvr\n", (smc->cfg & CFG_MII_SELECT) ? | |
1074 | "MII" : if_names[dev->if_port]); | |
1075 | } | |
1076 | ||
1077 | if (smc->cfg & CFG_MII_SELECT) { | |
1078 | if (smc->mii_if.phy_id != -1) { | |
1079 | DEBUG(0, " MII transceiver at index %d, status %x.\n", | |
1080 | smc->mii_if.phy_id, j); | |
1081 | } else { | |
1082 | printk(KERN_NOTICE " No MII transceivers found!\n"); | |
1083 | } | |
1084 | } | |
15b99ac1 | 1085 | return 0; |
1da177e4 LT |
1086 | |
1087 | config_undo: | |
1088 | unregister_netdev(dev); | |
1089 | config_failed: /* CS_EXIT_TEST() calls jump to here... */ | |
1090 | smc91c92_release(link); | |
15b99ac1 | 1091 | return -ENODEV; |
1da177e4 LT |
1092 | } /* smc91c92_config */ |
1093 | ||
1094 | /*====================================================================== | |
1095 | ||
1096 | After a card is removed, smc91c92_release() will unregister the net | |
1097 | device, and release the PCMCIA configuration. If the device is | |
1098 | still open, this will be postponed until it is closed. | |
1099 | ||
1100 | ======================================================================*/ | |
1101 | ||
fba395ee | 1102 | static void smc91c92_release(struct pcmcia_device *link) |
1da177e4 | 1103 | { |
5f2a71fc DB |
1104 | DEBUG(0, "smc91c92_release(0x%p)\n", link); |
1105 | if (link->win) { | |
1106 | struct net_device *dev = link->priv; | |
1107 | struct smc_private *smc = netdev_priv(dev); | |
1108 | iounmap(smc->base); | |
1109 | } | |
fba395ee | 1110 | pcmcia_disable_device(link); |
1da177e4 LT |
1111 | } |
1112 | ||
1da177e4 LT |
1113 | /*====================================================================== |
1114 | ||
1115 | MII interface support for SMC91cXX based cards | |
1116 | ======================================================================*/ | |
1117 | ||
1118 | #define MDIO_SHIFT_CLK 0x04 | |
1119 | #define MDIO_DATA_OUT 0x01 | |
1120 | #define MDIO_DIR_WRITE 0x08 | |
1121 | #define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE) | |
1122 | #define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT) | |
1123 | #define MDIO_DATA_READ 0x02 | |
1124 | ||
906da809 | 1125 | static void mdio_sync(unsigned int addr) |
1da177e4 LT |
1126 | { |
1127 | int bits; | |
1128 | for (bits = 0; bits < 32; bits++) { | |
1129 | outb(MDIO_DATA_WRITE1, addr); | |
1130 | outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr); | |
1131 | } | |
1132 | } | |
1133 | ||
1134 | static int mdio_read(struct net_device *dev, int phy_id, int loc) | |
1135 | { | |
906da809 | 1136 | unsigned int addr = dev->base_addr + MGMT; |
1da177e4 LT |
1137 | u_int cmd = (0x06<<10)|(phy_id<<5)|loc; |
1138 | int i, retval = 0; | |
1139 | ||
1140 | mdio_sync(addr); | |
1141 | for (i = 13; i >= 0; i--) { | |
1142 | int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0; | |
1143 | outb(dat, addr); | |
1144 | outb(dat | MDIO_SHIFT_CLK, addr); | |
1145 | } | |
1146 | for (i = 19; i > 0; i--) { | |
1147 | outb(0, addr); | |
1148 | retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0); | |
1149 | outb(MDIO_SHIFT_CLK, addr); | |
1150 | } | |
1151 | return (retval>>1) & 0xffff; | |
1152 | } | |
1153 | ||
1154 | static void mdio_write(struct net_device *dev, int phy_id, int loc, int value) | |
1155 | { | |
906da809 | 1156 | unsigned int addr = dev->base_addr + MGMT; |
1da177e4 LT |
1157 | u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value; |
1158 | int i; | |
1159 | ||
1160 | mdio_sync(addr); | |
1161 | for (i = 31; i >= 0; i--) { | |
1162 | int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0; | |
1163 | outb(dat, addr); | |
1164 | outb(dat | MDIO_SHIFT_CLK, addr); | |
1165 | } | |
1166 | for (i = 1; i >= 0; i--) { | |
1167 | outb(0, addr); | |
1168 | outb(MDIO_SHIFT_CLK, addr); | |
1169 | } | |
1170 | } | |
1171 | ||
1172 | /*====================================================================== | |
1173 | ||
1174 | The driver core code, most of which should be common with a | |
1175 | non-PCMCIA implementation. | |
1176 | ||
1177 | ======================================================================*/ | |
1178 | ||
1179 | #ifdef PCMCIA_DEBUG | |
1180 | static void smc_dump(struct net_device *dev) | |
1181 | { | |
906da809 | 1182 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1183 | u_short i, w, save; |
1184 | save = inw(ioaddr + BANK_SELECT); | |
1185 | for (w = 0; w < 4; w++) { | |
1186 | SMC_SELECT_BANK(w); | |
1187 | printk(KERN_DEBUG "bank %d: ", w); | |
1188 | for (i = 0; i < 14; i += 2) | |
1189 | printk(" %04x", inw(ioaddr + i)); | |
1190 | printk("\n"); | |
1191 | } | |
1192 | outw(save, ioaddr + BANK_SELECT); | |
1193 | } | |
1194 | #endif | |
1195 | ||
1196 | static int smc_open(struct net_device *dev) | |
1197 | { | |
1198 | struct smc_private *smc = netdev_priv(dev); | |
fba395ee | 1199 | struct pcmcia_device *link = smc->p_dev; |
1da177e4 LT |
1200 | |
1201 | #ifdef PCMCIA_DEBUG | |
1202 | DEBUG(0, "%s: smc_open(%p), ID/Window %4.4x.\n", | |
1203 | dev->name, dev, inw(dev->base_addr + BANK_SELECT)); | |
1204 | if (pc_debug > 1) smc_dump(dev); | |
1205 | #endif | |
1206 | ||
1207 | /* Check that the PCMCIA card is still here. */ | |
9940ec36 | 1208 | if (!pcmcia_dev_present(link)) |
1da177e4 LT |
1209 | return -ENODEV; |
1210 | /* Physical device present signature. */ | |
1211 | if (check_sig(link) < 0) { | |
1212 | printk("smc91c92_cs: Yikes! Bad chip signature!\n"); | |
1213 | return -ENODEV; | |
1214 | } | |
1215 | link->open++; | |
1216 | ||
1217 | netif_start_queue(dev); | |
1218 | smc->saved_skb = NULL; | |
1219 | smc->packets_waiting = 0; | |
1220 | ||
1221 | smc_reset(dev); | |
1222 | init_timer(&smc->media); | |
1223 | smc->media.function = &media_check; | |
1224 | smc->media.data = (u_long) dev; | |
1225 | smc->media.expires = jiffies + HZ; | |
1226 | add_timer(&smc->media); | |
1227 | ||
1228 | return 0; | |
1229 | } /* smc_open */ | |
1230 | ||
1231 | /*====================================================================*/ | |
1232 | ||
1233 | static int smc_close(struct net_device *dev) | |
1234 | { | |
1235 | struct smc_private *smc = netdev_priv(dev); | |
fba395ee | 1236 | struct pcmcia_device *link = smc->p_dev; |
906da809 | 1237 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1238 | |
1239 | DEBUG(0, "%s: smc_close(), status %4.4x.\n", | |
1240 | dev->name, inw(ioaddr + BANK_SELECT)); | |
1241 | ||
1242 | netif_stop_queue(dev); | |
1243 | ||
1244 | /* Shut off all interrupts, and turn off the Tx and Rx sections. | |
1245 | Don't bother to check for chip present. */ | |
1246 | SMC_SELECT_BANK(2); /* Nominally paranoia, but do no assume... */ | |
1247 | outw(0, ioaddr + INTERRUPT); | |
1248 | SMC_SELECT_BANK(0); | |
1249 | mask_bits(0xff00, ioaddr + RCR); | |
1250 | mask_bits(0xff00, ioaddr + TCR); | |
1251 | ||
1252 | /* Put the chip into power-down mode. */ | |
1253 | SMC_SELECT_BANK(1); | |
1254 | outw(CTL_POWERDOWN, ioaddr + CONTROL ); | |
1255 | ||
1256 | link->open--; | |
1257 | del_timer_sync(&smc->media); | |
1258 | ||
1259 | return 0; | |
1260 | } /* smc_close */ | |
1261 | ||
1262 | /*====================================================================== | |
1263 | ||
1264 | Transfer a packet to the hardware and trigger the packet send. | |
1265 | This may be called at either from either the Tx queue code | |
1266 | or the interrupt handler. | |
1267 | ||
1268 | ======================================================================*/ | |
1269 | ||
1270 | static void smc_hardware_send_packet(struct net_device * dev) | |
1271 | { | |
1272 | struct smc_private *smc = netdev_priv(dev); | |
1273 | struct sk_buff *skb = smc->saved_skb; | |
906da809 | 1274 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1275 | u_char packet_no; |
1276 | ||
1277 | if (!skb) { | |
1278 | printk(KERN_ERR "%s: In XMIT with no packet to send.\n", dev->name); | |
1279 | return; | |
1280 | } | |
1281 | ||
1282 | /* There should be a packet slot waiting. */ | |
1283 | packet_no = inw(ioaddr + PNR_ARR) >> 8; | |
1284 | if (packet_no & 0x80) { | |
1285 | /* If not, there is a hardware problem! Likely an ejected card. */ | |
1286 | printk(KERN_WARNING "%s: 91c92 hardware Tx buffer allocation" | |
1287 | " failed, status %#2.2x.\n", dev->name, packet_no); | |
1288 | dev_kfree_skb_irq(skb); | |
1289 | smc->saved_skb = NULL; | |
1290 | netif_start_queue(dev); | |
1291 | return; | |
1292 | } | |
1293 | ||
1294 | smc->stats.tx_bytes += skb->len; | |
1295 | /* The card should use the just-allocated buffer. */ | |
1296 | outw(packet_no, ioaddr + PNR_ARR); | |
1297 | /* point to the beginning of the packet */ | |
1298 | outw(PTR_AUTOINC , ioaddr + POINTER); | |
1299 | ||
1300 | /* Send the packet length (+6 for status, length and ctl byte) | |
1301 | and the status word (set to zeros). */ | |
1302 | { | |
1303 | u_char *buf = skb->data; | |
1304 | u_int length = skb->len; /* The chip will pad to ethernet min. */ | |
1305 | ||
1306 | DEBUG(2, "%s: Trying to xmit packet of length %d.\n", | |
1307 | dev->name, length); | |
1308 | ||
1309 | /* send the packet length: +6 for status word, length, and ctl */ | |
1310 | outw(0, ioaddr + DATA_1); | |
1311 | outw(length + 6, ioaddr + DATA_1); | |
1312 | outsw(ioaddr + DATA_1, buf, length >> 1); | |
1313 | ||
1314 | /* The odd last byte, if there is one, goes in the control word. */ | |
1315 | outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1); | |
1316 | } | |
1317 | ||
1318 | /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */ | |
1319 | outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) | | |
1320 | (inw(ioaddr + INTERRUPT) & 0xff00), | |
1321 | ioaddr + INTERRUPT); | |
1322 | ||
1323 | /* The chip does the rest of the work. */ | |
1324 | outw(MC_ENQUEUE , ioaddr + MMU_CMD); | |
1325 | ||
1326 | smc->saved_skb = NULL; | |
1327 | dev_kfree_skb_irq(skb); | |
1328 | dev->trans_start = jiffies; | |
1329 | netif_start_queue(dev); | |
1330 | return; | |
1331 | } | |
1332 | ||
1333 | /*====================================================================*/ | |
1334 | ||
1335 | static void smc_tx_timeout(struct net_device *dev) | |
1336 | { | |
1337 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1338 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1339 | |
1340 | printk(KERN_NOTICE "%s: SMC91c92 transmit timed out, " | |
1341 | "Tx_status %2.2x status %4.4x.\n", | |
1342 | dev->name, inw(ioaddr)&0xff, inw(ioaddr + 2)); | |
1343 | smc->stats.tx_errors++; | |
1344 | smc_reset(dev); | |
1345 | dev->trans_start = jiffies; | |
1346 | smc->saved_skb = NULL; | |
1347 | netif_wake_queue(dev); | |
1348 | } | |
1349 | ||
1350 | static int smc_start_xmit(struct sk_buff *skb, struct net_device *dev) | |
1351 | { | |
1352 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1353 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1354 | u_short num_pages; |
1355 | short time_out, ir; | |
85e27831 | 1356 | unsigned long flags; |
1da177e4 LT |
1357 | |
1358 | netif_stop_queue(dev); | |
1359 | ||
1360 | DEBUG(2, "%s: smc_start_xmit(length = %d) called," | |
1361 | " status %4.4x.\n", dev->name, skb->len, inw(ioaddr + 2)); | |
1362 | ||
1363 | if (smc->saved_skb) { | |
1364 | /* THIS SHOULD NEVER HAPPEN. */ | |
1365 | smc->stats.tx_aborted_errors++; | |
1366 | printk(KERN_DEBUG "%s: Internal error -- sent packet while busy.\n", | |
1367 | dev->name); | |
1368 | return 1; | |
1369 | } | |
1370 | smc->saved_skb = skb; | |
1371 | ||
1372 | num_pages = skb->len >> 8; | |
1373 | ||
1374 | if (num_pages > 7) { | |
1375 | printk(KERN_ERR "%s: Far too big packet error.\n", dev->name); | |
1376 | dev_kfree_skb (skb); | |
1377 | smc->saved_skb = NULL; | |
1378 | smc->stats.tx_dropped++; | |
1379 | return 0; /* Do not re-queue this packet. */ | |
1380 | } | |
1381 | /* A packet is now waiting. */ | |
1382 | smc->packets_waiting++; | |
1383 | ||
85e27831 | 1384 | spin_lock_irqsave(&smc->lock, flags); |
1da177e4 LT |
1385 | SMC_SELECT_BANK(2); /* Paranoia, we should always be in window 2 */ |
1386 | ||
1387 | /* need MC_RESET to keep the memory consistent. errata? */ | |
1388 | if (smc->rx_ovrn) { | |
1389 | outw(MC_RESET, ioaddr + MMU_CMD); | |
1390 | smc->rx_ovrn = 0; | |
1391 | } | |
1392 | ||
1393 | /* Allocate the memory; send the packet now if we win. */ | |
1394 | outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD); | |
1395 | for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) { | |
1396 | ir = inw(ioaddr+INTERRUPT); | |
1397 | if (ir & IM_ALLOC_INT) { | |
1398 | /* Acknowledge the interrupt, send the packet. */ | |
1399 | outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT); | |
1400 | smc_hardware_send_packet(dev); /* Send the packet now.. */ | |
85e27831 | 1401 | spin_unlock_irqrestore(&smc->lock, flags); |
1da177e4 LT |
1402 | return 0; |
1403 | } | |
1404 | } | |
1405 | ||
1406 | /* Otherwise defer until the Tx-space-allocated interrupt. */ | |
1407 | DEBUG(2, "%s: memory allocation deferred.\n", dev->name); | |
1408 | outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT); | |
85e27831 | 1409 | spin_unlock_irqrestore(&smc->lock, flags); |
1da177e4 LT |
1410 | |
1411 | return 0; | |
1412 | } | |
1413 | ||
1414 | /*====================================================================== | |
1415 | ||
1416 | Handle a Tx anomolous event. Entered while in Window 2. | |
1417 | ||
1418 | ======================================================================*/ | |
1419 | ||
1420 | static void smc_tx_err(struct net_device * dev) | |
1421 | { | |
1422 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1423 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1424 | int saved_packet = inw(ioaddr + PNR_ARR) & 0xff; |
1425 | int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f; | |
1426 | int tx_status; | |
1427 | ||
1428 | /* select this as the packet to read from */ | |
1429 | outw(packet_no, ioaddr + PNR_ARR); | |
1430 | ||
1431 | /* read the first word from this packet */ | |
1432 | outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER); | |
1433 | ||
1434 | tx_status = inw(ioaddr + DATA_1); | |
1435 | ||
1436 | smc->stats.tx_errors++; | |
1437 | if (tx_status & TS_LOSTCAR) smc->stats.tx_carrier_errors++; | |
1438 | if (tx_status & TS_LATCOL) smc->stats.tx_window_errors++; | |
1439 | if (tx_status & TS_16COL) { | |
1440 | smc->stats.tx_aborted_errors++; | |
1441 | smc->tx_err++; | |
1442 | } | |
1443 | ||
1444 | if (tx_status & TS_SUCCESS) { | |
1445 | printk(KERN_NOTICE "%s: Successful packet caused error " | |
1446 | "interrupt?\n", dev->name); | |
1447 | } | |
1448 | /* re-enable transmit */ | |
1449 | SMC_SELECT_BANK(0); | |
1450 | outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR); | |
1451 | SMC_SELECT_BANK(2); | |
1452 | ||
1453 | outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */ | |
1454 | ||
1455 | /* one less packet waiting for me */ | |
1456 | smc->packets_waiting--; | |
1457 | ||
1458 | outw(saved_packet, ioaddr + PNR_ARR); | |
1459 | return; | |
1460 | } | |
1461 | ||
1462 | /*====================================================================*/ | |
1463 | ||
1464 | static void smc_eph_irq(struct net_device *dev) | |
1465 | { | |
1466 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1467 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1468 | u_short card_stats, ephs; |
1469 | ||
1470 | SMC_SELECT_BANK(0); | |
1471 | ephs = inw(ioaddr + EPH); | |
1472 | DEBUG(2, "%s: Ethernet protocol handler interrupt, status" | |
1473 | " %4.4x.\n", dev->name, ephs); | |
1474 | /* Could be a counter roll-over warning: update stats. */ | |
1475 | card_stats = inw(ioaddr + COUNTER); | |
1476 | /* single collisions */ | |
1477 | smc->stats.collisions += card_stats & 0xF; | |
1478 | card_stats >>= 4; | |
1479 | /* multiple collisions */ | |
1480 | smc->stats.collisions += card_stats & 0xF; | |
1481 | #if 0 /* These are for when linux supports these statistics */ | |
1482 | card_stats >>= 4; /* deferred */ | |
1483 | card_stats >>= 4; /* excess deferred */ | |
1484 | #endif | |
1485 | /* If we had a transmit error we must re-enable the transmitter. */ | |
1486 | outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR); | |
1487 | ||
1488 | /* Clear a link error interrupt. */ | |
1489 | SMC_SELECT_BANK(1); | |
1490 | outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL); | |
1491 | outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE, | |
1492 | ioaddr + CONTROL); | |
1493 | SMC_SELECT_BANK(2); | |
1494 | } | |
1495 | ||
1496 | /*====================================================================*/ | |
1497 | ||
7d12e780 | 1498 | static irqreturn_t smc_interrupt(int irq, void *dev_id) |
1da177e4 LT |
1499 | { |
1500 | struct net_device *dev = dev_id; | |
1501 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1502 | unsigned int ioaddr; |
1da177e4 LT |
1503 | u_short saved_bank, saved_pointer, mask, status; |
1504 | unsigned int handled = 1; | |
1505 | char bogus_cnt = INTR_WORK; /* Work we are willing to do. */ | |
1506 | ||
1507 | if (!netif_device_present(dev)) | |
1508 | return IRQ_NONE; | |
1509 | ||
1510 | ioaddr = dev->base_addr; | |
1511 | ||
1512 | DEBUG(3, "%s: SMC91c92 interrupt %d at %#x.\n", dev->name, | |
1513 | irq, ioaddr); | |
1514 | ||
85e27831 | 1515 | spin_lock(&smc->lock); |
1da177e4 LT |
1516 | smc->watchdog = 0; |
1517 | saved_bank = inw(ioaddr + BANK_SELECT); | |
1518 | if ((saved_bank & 0xff00) != 0x3300) { | |
1519 | /* The device does not exist -- the card could be off-line, or | |
1520 | maybe it has been ejected. */ | |
1521 | DEBUG(1, "%s: SMC91c92 interrupt %d for non-existent" | |
1522 | "/ejected device.\n", dev->name, irq); | |
1523 | handled = 0; | |
1524 | goto irq_done; | |
1525 | } | |
1526 | ||
1527 | SMC_SELECT_BANK(2); | |
1528 | saved_pointer = inw(ioaddr + POINTER); | |
1529 | mask = inw(ioaddr + INTERRUPT) >> 8; | |
1530 | /* clear all interrupts */ | |
1531 | outw(0, ioaddr + INTERRUPT); | |
1532 | ||
1533 | do { /* read the status flag, and mask it */ | |
1534 | status = inw(ioaddr + INTERRUPT) & 0xff; | |
1535 | DEBUG(3, "%s: Status is %#2.2x (mask %#2.2x).\n", dev->name, | |
1536 | status, mask); | |
1537 | if ((status & mask) == 0) { | |
1538 | if (bogus_cnt == INTR_WORK) | |
1539 | handled = 0; | |
1540 | break; | |
1541 | } | |
1542 | if (status & IM_RCV_INT) { | |
1543 | /* Got a packet(s). */ | |
1544 | smc_rx(dev); | |
1545 | } | |
1546 | if (status & IM_TX_INT) { | |
1547 | smc_tx_err(dev); | |
1548 | outw(IM_TX_INT, ioaddr + INTERRUPT); | |
1549 | } | |
1550 | status &= mask; | |
1551 | if (status & IM_TX_EMPTY_INT) { | |
1552 | outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT); | |
1553 | mask &= ~IM_TX_EMPTY_INT; | |
1554 | smc->stats.tx_packets += smc->packets_waiting; | |
1555 | smc->packets_waiting = 0; | |
1556 | } | |
1557 | if (status & IM_ALLOC_INT) { | |
1558 | /* Clear this interrupt so it doesn't happen again */ | |
1559 | mask &= ~IM_ALLOC_INT; | |
1560 | ||
1561 | smc_hardware_send_packet(dev); | |
1562 | ||
1563 | /* enable xmit interrupts based on this */ | |
1564 | mask |= (IM_TX_EMPTY_INT | IM_TX_INT); | |
1565 | ||
1566 | /* and let the card send more packets to me */ | |
1567 | netif_wake_queue(dev); | |
1568 | } | |
1569 | if (status & IM_RX_OVRN_INT) { | |
1570 | smc->stats.rx_errors++; | |
1571 | smc->stats.rx_fifo_errors++; | |
1572 | if (smc->duplex) | |
1573 | smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */ | |
1574 | outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT); | |
1575 | } | |
1576 | if (status & IM_EPH_INT) | |
1577 | smc_eph_irq(dev); | |
1578 | } while (--bogus_cnt); | |
1579 | ||
1580 | DEBUG(3, " Restoring saved registers mask %2.2x bank %4.4x" | |
1581 | " pointer %4.4x.\n", mask, saved_bank, saved_pointer); | |
1582 | ||
1583 | /* restore state register */ | |
1584 | outw((mask<<8), ioaddr + INTERRUPT); | |
1585 | outw(saved_pointer, ioaddr + POINTER); | |
1586 | SMC_SELECT_BANK(saved_bank); | |
1587 | ||
1588 | DEBUG(3, "%s: Exiting interrupt IRQ%d.\n", dev->name, irq); | |
1589 | ||
1590 | irq_done: | |
1591 | ||
1592 | if ((smc->manfid == MANFID_OSITECH) && | |
1593 | (smc->cardid != PRODID_OSITECH_SEVEN)) { | |
1594 | /* Retrigger interrupt if needed */ | |
1595 | mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR); | |
1596 | set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR); | |
1597 | } | |
1598 | if (smc->manfid == MANFID_MOTOROLA) { | |
1599 | u_char cor; | |
1600 | cor = readb(smc->base + MOT_UART + CISREG_COR); | |
1601 | writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR); | |
1602 | writeb(cor, smc->base + MOT_UART + CISREG_COR); | |
1603 | cor = readb(smc->base + MOT_LAN + CISREG_COR); | |
1604 | writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR); | |
1605 | writeb(cor, smc->base + MOT_LAN + CISREG_COR); | |
1606 | } | |
1607 | #ifdef DOES_NOT_WORK | |
1608 | if (smc->base != NULL) { /* Megahertz MFC's */ | |
1609 | readb(smc->base+MEGAHERTZ_ISR); | |
1610 | readb(smc->base+MEGAHERTZ_ISR); | |
1611 | } | |
1612 | #endif | |
85e27831 | 1613 | spin_unlock(&smc->lock); |
1da177e4 LT |
1614 | return IRQ_RETVAL(handled); |
1615 | } | |
1616 | ||
1617 | /*====================================================================*/ | |
1618 | ||
1619 | static void smc_rx(struct net_device *dev) | |
1620 | { | |
1621 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1622 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1623 | int rx_status; |
1624 | int packet_length; /* Caution: not frame length, rather words | |
1625 | to transfer from the chip. */ | |
1626 | ||
1627 | /* Assertion: we are in Window 2. */ | |
1628 | ||
1629 | if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) { | |
1630 | printk(KERN_ERR "%s: smc_rx() with nothing on Rx FIFO.\n", | |
1631 | dev->name); | |
1632 | return; | |
1633 | } | |
1634 | ||
1635 | /* Reset the read pointer, and read the status and packet length. */ | |
1636 | outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER); | |
1637 | rx_status = inw(ioaddr + DATA_1); | |
1638 | packet_length = inw(ioaddr + DATA_1) & 0x07ff; | |
1639 | ||
1640 | DEBUG(2, "%s: Receive status %4.4x length %d.\n", | |
1641 | dev->name, rx_status, packet_length); | |
1642 | ||
1643 | if (!(rx_status & RS_ERRORS)) { | |
1644 | /* do stuff to make a new packet */ | |
1645 | struct sk_buff *skb; | |
1646 | ||
1647 | /* Note: packet_length adds 5 or 6 extra bytes here! */ | |
1648 | skb = dev_alloc_skb(packet_length+2); | |
1649 | ||
1650 | if (skb == NULL) { | |
1651 | DEBUG(1, "%s: Low memory, packet dropped.\n", dev->name); | |
1652 | smc->stats.rx_dropped++; | |
1653 | outw(MC_RELEASE, ioaddr + MMU_CMD); | |
1654 | return; | |
1655 | } | |
1656 | ||
1657 | packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6); | |
1658 | skb_reserve(skb, 2); | |
1659 | insw(ioaddr+DATA_1, skb_put(skb, packet_length), | |
1660 | (packet_length+1)>>1); | |
1661 | skb->protocol = eth_type_trans(skb, dev); | |
1662 | ||
1da177e4 LT |
1663 | netif_rx(skb); |
1664 | dev->last_rx = jiffies; | |
1665 | smc->stats.rx_packets++; | |
1666 | smc->stats.rx_bytes += packet_length; | |
1667 | if (rx_status & RS_MULTICAST) | |
1668 | smc->stats.multicast++; | |
1669 | } else { | |
1670 | /* error ... */ | |
1671 | smc->stats.rx_errors++; | |
1672 | ||
1673 | if (rx_status & RS_ALGNERR) smc->stats.rx_frame_errors++; | |
1674 | if (rx_status & (RS_TOOSHORT | RS_TOOLONG)) | |
1675 | smc->stats.rx_length_errors++; | |
1676 | if (rx_status & RS_BADCRC) smc->stats.rx_crc_errors++; | |
1677 | } | |
1678 | /* Let the MMU free the memory of this packet. */ | |
1679 | outw(MC_RELEASE, ioaddr + MMU_CMD); | |
1680 | ||
1681 | return; | |
1682 | } | |
1683 | ||
1684 | /*====================================================================*/ | |
1685 | ||
1686 | static struct net_device_stats *smc_get_stats(struct net_device *dev) | |
1687 | { | |
1688 | struct smc_private *smc = netdev_priv(dev); | |
1689 | /* Nothing to update - the 91c92 is a pretty primative chip. */ | |
1690 | return &smc->stats; | |
1691 | } | |
1692 | ||
1693 | /*====================================================================== | |
1694 | ||
1695 | Calculate values for the hardware multicast filter hash table. | |
1696 | ||
1697 | ======================================================================*/ | |
1698 | ||
1699 | static void fill_multicast_tbl(int count, struct dev_mc_list *addrs, | |
1700 | u_char *multicast_table) | |
1701 | { | |
1702 | struct dev_mc_list *mc_addr; | |
1703 | ||
bb53d6d0 | 1704 | for (mc_addr = addrs; mc_addr && count-- > 0; mc_addr = mc_addr->next) { |
1da177e4 LT |
1705 | u_int position = ether_crc(6, mc_addr->dmi_addr); |
1706 | #ifndef final_version /* Verify multicast address. */ | |
1707 | if ((mc_addr->dmi_addr[0] & 1) == 0) | |
1708 | continue; | |
1709 | #endif | |
1710 | multicast_table[position >> 29] |= 1 << ((position >> 26) & 7); | |
1711 | } | |
1712 | } | |
1713 | ||
1714 | /*====================================================================== | |
1715 | ||
1716 | Set the receive mode. | |
1717 | ||
1718 | This routine is used by both the protocol level to notify us of | |
1719 | promiscuous/multicast mode changes, and by the open/reset code to | |
1720 | initialize the Rx registers. We always set the multicast list and | |
1721 | leave the receiver running. | |
1722 | ||
1723 | ======================================================================*/ | |
1724 | ||
1725 | static void set_rx_mode(struct net_device *dev) | |
1726 | { | |
906da809 | 1727 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1728 | struct smc_private *smc = netdev_priv(dev); |
1729 | u_int multicast_table[ 2 ] = { 0, }; | |
1730 | unsigned long flags; | |
1731 | u_short rx_cfg_setting; | |
1732 | ||
1733 | if (dev->flags & IFF_PROMISC) { | |
1da177e4 LT |
1734 | rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti; |
1735 | } else if (dev->flags & IFF_ALLMULTI) | |
1736 | rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti; | |
1737 | else { | |
1738 | if (dev->mc_count) { | |
1739 | fill_multicast_tbl(dev->mc_count, dev->mc_list, | |
1740 | (u_char *)multicast_table); | |
1741 | } | |
1742 | rx_cfg_setting = RxStripCRC | RxEnable; | |
1743 | } | |
1744 | ||
1745 | /* Load MC table and Rx setting into the chip without interrupts. */ | |
1746 | spin_lock_irqsave(&smc->lock, flags); | |
1747 | SMC_SELECT_BANK(3); | |
1748 | outl(multicast_table[0], ioaddr + MULTICAST0); | |
1749 | outl(multicast_table[1], ioaddr + MULTICAST4); | |
1750 | SMC_SELECT_BANK(0); | |
1751 | outw(rx_cfg_setting, ioaddr + RCR); | |
1752 | SMC_SELECT_BANK(2); | |
1753 | spin_unlock_irqrestore(&smc->lock, flags); | |
1754 | ||
1755 | return; | |
1756 | } | |
1757 | ||
1758 | /*====================================================================== | |
1759 | ||
1760 | Senses when a card's config changes. Here, it's coax or TP. | |
1761 | ||
1762 | ======================================================================*/ | |
1763 | ||
1764 | static int s9k_config(struct net_device *dev, struct ifmap *map) | |
1765 | { | |
1766 | struct smc_private *smc = netdev_priv(dev); | |
1767 | if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) { | |
1768 | if (smc->cfg & CFG_MII_SELECT) | |
1769 | return -EOPNOTSUPP; | |
1770 | else if (map->port > 2) | |
1771 | return -EINVAL; | |
1772 | dev->if_port = map->port; | |
1773 | printk(KERN_INFO "%s: switched to %s port\n", | |
1774 | dev->name, if_names[dev->if_port]); | |
1775 | smc_reset(dev); | |
1776 | } | |
1777 | return 0; | |
1778 | } | |
1779 | ||
1780 | /*====================================================================== | |
1781 | ||
1782 | Reset the chip, reloading every register that might be corrupted. | |
1783 | ||
1784 | ======================================================================*/ | |
1785 | ||
1786 | /* | |
1787 | Set transceiver type, perhaps to something other than what the user | |
1788 | specified in dev->if_port. | |
1789 | */ | |
1790 | static void smc_set_xcvr(struct net_device *dev, int if_port) | |
1791 | { | |
1792 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1793 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1794 | u_short saved_bank; |
1795 | ||
1796 | saved_bank = inw(ioaddr + BANK_SELECT); | |
1797 | SMC_SELECT_BANK(1); | |
1798 | if (if_port == 2) { | |
1799 | outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG); | |
1800 | if ((smc->manfid == MANFID_OSITECH) && | |
1801 | (smc->cardid != PRODID_OSITECH_SEVEN)) | |
1802 | set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR); | |
1803 | smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002); | |
1804 | } else { | |
1805 | outw(smc->cfg, ioaddr + CONFIG); | |
1806 | if ((smc->manfid == MANFID_OSITECH) && | |
1807 | (smc->cardid != PRODID_OSITECH_SEVEN)) | |
1808 | mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR); | |
1809 | smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001); | |
1810 | } | |
1811 | SMC_SELECT_BANK(saved_bank); | |
1812 | } | |
1813 | ||
1814 | static void smc_reset(struct net_device *dev) | |
1815 | { | |
906da809 | 1816 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1817 | struct smc_private *smc = netdev_priv(dev); |
1818 | int i; | |
1819 | ||
1820 | DEBUG(0, "%s: smc91c92 reset called.\n", dev->name); | |
1821 | ||
1822 | /* The first interaction must be a write to bring the chip out | |
1823 | of sleep mode. */ | |
1824 | SMC_SELECT_BANK(0); | |
1825 | /* Reset the chip. */ | |
1826 | outw(RCR_SOFTRESET, ioaddr + RCR); | |
1827 | udelay(10); | |
1828 | ||
1829 | /* Clear the transmit and receive configuration registers. */ | |
1830 | outw(RCR_CLEAR, ioaddr + RCR); | |
1831 | outw(TCR_CLEAR, ioaddr + TCR); | |
1832 | ||
1833 | /* Set the Window 1 control, configuration and station addr registers. | |
1834 | No point in writing the I/O base register ;-> */ | |
1835 | SMC_SELECT_BANK(1); | |
d6e05edc | 1836 | /* Automatically release successfully transmitted packets, |
1da177e4 LT |
1837 | Accept link errors, counter and Tx error interrupts. */ |
1838 | outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE, | |
1839 | ioaddr + CONTROL); | |
1840 | smc_set_xcvr(dev, dev->if_port); | |
1841 | if ((smc->manfid == MANFID_OSITECH) && | |
1842 | (smc->cardid != PRODID_OSITECH_SEVEN)) | |
1843 | outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) | | |
1844 | (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00), | |
1845 | ioaddr - 0x10 + OSITECH_AUI_PWR); | |
1846 | ||
1847 | /* Fill in the physical address. The databook is wrong about the order! */ | |
1848 | for (i = 0; i < 6; i += 2) | |
1849 | outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i], | |
1850 | ioaddr + ADDR0 + i); | |
1851 | ||
1852 | /* Reset the MMU */ | |
1853 | SMC_SELECT_BANK(2); | |
1854 | outw(MC_RESET, ioaddr + MMU_CMD); | |
1855 | outw(0, ioaddr + INTERRUPT); | |
1856 | ||
1857 | /* Re-enable the chip. */ | |
1858 | SMC_SELECT_BANK(0); | |
1859 | outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) | | |
1860 | TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR); | |
1861 | set_rx_mode(dev); | |
1862 | ||
1863 | if (smc->cfg & CFG_MII_SELECT) { | |
1864 | SMC_SELECT_BANK(3); | |
1865 | ||
1866 | /* Reset MII */ | |
1867 | mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000); | |
1868 | ||
1869 | /* Advertise 100F, 100H, 10F, 10H */ | |
1870 | mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1); | |
1871 | ||
1872 | /* Restart MII autonegotiation */ | |
1873 | mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000); | |
1874 | mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200); | |
1875 | } | |
1876 | ||
1877 | /* Enable interrupts. */ | |
1878 | SMC_SELECT_BANK(2); | |
1879 | outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8, | |
1880 | ioaddr + INTERRUPT); | |
1881 | } | |
1882 | ||
1883 | /*====================================================================== | |
1884 | ||
1885 | Media selection timer routine | |
1886 | ||
1887 | ======================================================================*/ | |
1888 | ||
1889 | static void media_check(u_long arg) | |
1890 | { | |
1891 | struct net_device *dev = (struct net_device *) arg; | |
1892 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1893 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1894 | u_short i, media, saved_bank; |
1895 | u_short link; | |
85e27831 K |
1896 | unsigned long flags; |
1897 | ||
1898 | spin_lock_irqsave(&smc->lock, flags); | |
1da177e4 LT |
1899 | |
1900 | saved_bank = inw(ioaddr + BANK_SELECT); | |
1901 | ||
1902 | if (!netif_device_present(dev)) | |
1903 | goto reschedule; | |
1904 | ||
1905 | SMC_SELECT_BANK(2); | |
1906 | ||
1907 | /* need MC_RESET to keep the memory consistent. errata? */ | |
1908 | if (smc->rx_ovrn) { | |
1909 | outw(MC_RESET, ioaddr + MMU_CMD); | |
1910 | smc->rx_ovrn = 0; | |
1911 | } | |
1912 | i = inw(ioaddr + INTERRUPT); | |
1913 | SMC_SELECT_BANK(0); | |
1914 | media = inw(ioaddr + EPH) & EPH_LINK_OK; | |
1915 | SMC_SELECT_BANK(1); | |
1916 | media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1; | |
1917 | ||
1918 | /* Check for pending interrupt with watchdog flag set: with | |
1919 | this, we can limp along even if the interrupt is blocked */ | |
1920 | if (smc->watchdog++ && ((i>>8) & i)) { | |
1921 | if (!smc->fast_poll) | |
1922 | printk(KERN_INFO "%s: interrupt(s) dropped!\n", dev->name); | |
e363d138 | 1923 | smc_interrupt(dev->irq, dev); |
1da177e4 LT |
1924 | smc->fast_poll = HZ; |
1925 | } | |
1926 | if (smc->fast_poll) { | |
1927 | smc->fast_poll--; | |
1928 | smc->media.expires = jiffies + HZ/100; | |
1929 | add_timer(&smc->media); | |
1930 | SMC_SELECT_BANK(saved_bank); | |
85e27831 | 1931 | spin_unlock_irqrestore(&smc->lock, flags); |
1da177e4 LT |
1932 | return; |
1933 | } | |
1934 | ||
1935 | if (smc->cfg & CFG_MII_SELECT) { | |
1936 | if (smc->mii_if.phy_id < 0) | |
1937 | goto reschedule; | |
1938 | ||
1939 | SMC_SELECT_BANK(3); | |
1940 | link = mdio_read(dev, smc->mii_if.phy_id, 1); | |
1941 | if (!link || (link == 0xffff)) { | |
1942 | printk(KERN_INFO "%s: MII is missing!\n", dev->name); | |
1943 | smc->mii_if.phy_id = -1; | |
1944 | goto reschedule; | |
1945 | } | |
1946 | ||
1947 | link &= 0x0004; | |
1948 | if (link != smc->link_status) { | |
1949 | u_short p = mdio_read(dev, smc->mii_if.phy_id, 5); | |
1950 | printk(KERN_INFO "%s: %s link beat\n", dev->name, | |
1951 | (link) ? "found" : "lost"); | |
1952 | smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40)) | |
1953 | ? TCR_FDUPLX : 0); | |
1954 | if (link) { | |
1955 | printk(KERN_INFO "%s: autonegotiation complete: " | |
1956 | "%sbaseT-%cD selected\n", dev->name, | |
1957 | ((p & 0x0180) ? "100" : "10"), | |
1958 | (smc->duplex ? 'F' : 'H')); | |
1959 | } | |
1960 | SMC_SELECT_BANK(0); | |
1961 | outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR); | |
1962 | smc->link_status = link; | |
1963 | } | |
1964 | goto reschedule; | |
1965 | } | |
1966 | ||
1967 | /* Ignore collisions unless we've had no rx's recently */ | |
4851d3aa | 1968 | if (time_after(jiffies, dev->last_rx + HZ)) { |
1da177e4 LT |
1969 | if (smc->tx_err || (smc->media_status & EPH_16COL)) |
1970 | media |= EPH_16COL; | |
1971 | } | |
1972 | smc->tx_err = 0; | |
1973 | ||
1974 | if (media != smc->media_status) { | |
1975 | if ((media & smc->media_status & 1) && | |
1976 | ((smc->media_status ^ media) & EPH_LINK_OK)) | |
1977 | printk(KERN_INFO "%s: %s link beat\n", dev->name, | |
1978 | (smc->media_status & EPH_LINK_OK ? "lost" : "found")); | |
1979 | else if ((media & smc->media_status & 2) && | |
1980 | ((smc->media_status ^ media) & EPH_16COL)) | |
1981 | printk(KERN_INFO "%s: coax cable %s\n", dev->name, | |
1982 | (media & EPH_16COL ? "problem" : "ok")); | |
1983 | if (dev->if_port == 0) { | |
1984 | if (media & 1) { | |
1985 | if (media & EPH_LINK_OK) | |
1986 | printk(KERN_INFO "%s: flipped to 10baseT\n", | |
1987 | dev->name); | |
1988 | else | |
1989 | smc_set_xcvr(dev, 2); | |
1990 | } else { | |
1991 | if (media & EPH_16COL) | |
1992 | smc_set_xcvr(dev, 1); | |
1993 | else | |
1994 | printk(KERN_INFO "%s: flipped to 10base2\n", | |
1995 | dev->name); | |
1996 | } | |
1997 | } | |
1998 | smc->media_status = media; | |
1999 | } | |
2000 | ||
2001 | reschedule: | |
2002 | smc->media.expires = jiffies + HZ; | |
2003 | add_timer(&smc->media); | |
2004 | SMC_SELECT_BANK(saved_bank); | |
85e27831 | 2005 | spin_unlock_irqrestore(&smc->lock, flags); |
1da177e4 LT |
2006 | } |
2007 | ||
2008 | static int smc_link_ok(struct net_device *dev) | |
2009 | { | |
906da809 | 2010 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
2011 | struct smc_private *smc = netdev_priv(dev); |
2012 | ||
2013 | if (smc->cfg & CFG_MII_SELECT) { | |
2014 | return mii_link_ok(&smc->mii_if); | |
2015 | } else { | |
2016 | SMC_SELECT_BANK(0); | |
2017 | return inw(ioaddr + EPH) & EPH_LINK_OK; | |
2018 | } | |
2019 | } | |
2020 | ||
2021 | static int smc_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd) | |
2022 | { | |
2023 | u16 tmp; | |
906da809 | 2024 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
2025 | |
2026 | ecmd->supported = (SUPPORTED_TP | SUPPORTED_AUI | | |
2027 | SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full); | |
2028 | ||
2029 | SMC_SELECT_BANK(1); | |
2030 | tmp = inw(ioaddr + CONFIG); | |
2031 | ecmd->port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP; | |
2032 | ecmd->transceiver = XCVR_INTERNAL; | |
2033 | ecmd->speed = SPEED_10; | |
2034 | ecmd->phy_address = ioaddr + MGMT; | |
2035 | ||
2036 | SMC_SELECT_BANK(0); | |
2037 | tmp = inw(ioaddr + TCR); | |
2038 | ecmd->duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF; | |
2039 | ||
2040 | return 0; | |
2041 | } | |
2042 | ||
2043 | static int smc_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd) | |
2044 | { | |
2045 | u16 tmp; | |
906da809 | 2046 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
2047 | |
2048 | if (ecmd->speed != SPEED_10) | |
2049 | return -EINVAL; | |
2050 | if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL) | |
2051 | return -EINVAL; | |
2052 | if (ecmd->port != PORT_TP && ecmd->port != PORT_AUI) | |
2053 | return -EINVAL; | |
2054 | if (ecmd->transceiver != XCVR_INTERNAL) | |
2055 | return -EINVAL; | |
2056 | ||
2057 | if (ecmd->port == PORT_AUI) | |
2058 | smc_set_xcvr(dev, 1); | |
2059 | else | |
2060 | smc_set_xcvr(dev, 0); | |
2061 | ||
2062 | SMC_SELECT_BANK(0); | |
2063 | tmp = inw(ioaddr + TCR); | |
2064 | if (ecmd->duplex == DUPLEX_FULL) | |
2065 | tmp |= TCR_FDUPLX; | |
2066 | else | |
2067 | tmp &= ~TCR_FDUPLX; | |
2068 | outw(tmp, ioaddr + TCR); | |
2069 | ||
2070 | return 0; | |
2071 | } | |
2072 | ||
2073 | static int check_if_running(struct net_device *dev) | |
2074 | { | |
2075 | if (!netif_running(dev)) | |
2076 | return -EINVAL; | |
2077 | return 0; | |
2078 | } | |
2079 | ||
2080 | static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) | |
2081 | { | |
2082 | strcpy(info->driver, DRV_NAME); | |
2083 | strcpy(info->version, DRV_VERSION); | |
2084 | } | |
2085 | ||
2086 | static int smc_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | |
2087 | { | |
2088 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 2089 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
2090 | u16 saved_bank = inw(ioaddr + BANK_SELECT); |
2091 | int ret; | |
2092 | ||
1da177e4 | 2093 | spin_lock_irq(&smc->lock); |
85e27831 | 2094 | SMC_SELECT_BANK(3); |
1da177e4 LT |
2095 | if (smc->cfg & CFG_MII_SELECT) |
2096 | ret = mii_ethtool_gset(&smc->mii_if, ecmd); | |
2097 | else | |
2098 | ret = smc_netdev_get_ecmd(dev, ecmd); | |
1da177e4 | 2099 | SMC_SELECT_BANK(saved_bank); |
85e27831 | 2100 | spin_unlock_irq(&smc->lock); |
1da177e4 LT |
2101 | return ret; |
2102 | } | |
2103 | ||
2104 | static int smc_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | |
2105 | { | |
2106 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 2107 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
2108 | u16 saved_bank = inw(ioaddr + BANK_SELECT); |
2109 | int ret; | |
2110 | ||
1da177e4 | 2111 | spin_lock_irq(&smc->lock); |
85e27831 | 2112 | SMC_SELECT_BANK(3); |
1da177e4 LT |
2113 | if (smc->cfg & CFG_MII_SELECT) |
2114 | ret = mii_ethtool_sset(&smc->mii_if, ecmd); | |
2115 | else | |
2116 | ret = smc_netdev_set_ecmd(dev, ecmd); | |
1da177e4 | 2117 | SMC_SELECT_BANK(saved_bank); |
85e27831 | 2118 | spin_unlock_irq(&smc->lock); |
1da177e4 LT |
2119 | return ret; |
2120 | } | |
2121 | ||
2122 | static u32 smc_get_link(struct net_device *dev) | |
2123 | { | |
2124 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 2125 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
2126 | u16 saved_bank = inw(ioaddr + BANK_SELECT); |
2127 | u32 ret; | |
2128 | ||
1da177e4 | 2129 | spin_lock_irq(&smc->lock); |
85e27831 | 2130 | SMC_SELECT_BANK(3); |
1da177e4 | 2131 | ret = smc_link_ok(dev); |
1da177e4 | 2132 | SMC_SELECT_BANK(saved_bank); |
85e27831 | 2133 | spin_unlock_irq(&smc->lock); |
1da177e4 LT |
2134 | return ret; |
2135 | } | |
2136 | ||
2137 | #ifdef PCMCIA_DEBUG | |
2138 | static u32 smc_get_msglevel(struct net_device *dev) | |
2139 | { | |
2140 | return pc_debug; | |
2141 | } | |
2142 | ||
2143 | static void smc_set_msglevel(struct net_device *dev, u32 val) | |
2144 | { | |
2145 | pc_debug = val; | |
2146 | } | |
2147 | #endif | |
2148 | ||
2149 | static int smc_nway_reset(struct net_device *dev) | |
2150 | { | |
2151 | struct smc_private *smc = netdev_priv(dev); | |
2152 | if (smc->cfg & CFG_MII_SELECT) { | |
906da809 | 2153 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
2154 | u16 saved_bank = inw(ioaddr + BANK_SELECT); |
2155 | int res; | |
2156 | ||
2157 | SMC_SELECT_BANK(3); | |
2158 | res = mii_nway_restart(&smc->mii_if); | |
2159 | SMC_SELECT_BANK(saved_bank); | |
2160 | ||
2161 | return res; | |
2162 | } else | |
2163 | return -EOPNOTSUPP; | |
2164 | } | |
2165 | ||
7282d491 | 2166 | static const struct ethtool_ops ethtool_ops = { |
1da177e4 LT |
2167 | .begin = check_if_running, |
2168 | .get_drvinfo = smc_get_drvinfo, | |
2169 | .get_settings = smc_get_settings, | |
2170 | .set_settings = smc_set_settings, | |
2171 | .get_link = smc_get_link, | |
2172 | #ifdef PCMCIA_DEBUG | |
2173 | .get_msglevel = smc_get_msglevel, | |
2174 | .set_msglevel = smc_set_msglevel, | |
2175 | #endif | |
2176 | .nway_reset = smc_nway_reset, | |
2177 | }; | |
2178 | ||
2179 | static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd) | |
2180 | { | |
2181 | struct smc_private *smc = netdev_priv(dev); | |
2182 | struct mii_ioctl_data *mii = if_mii(rq); | |
2183 | int rc = 0; | |
2184 | u16 saved_bank; | |
906da809 | 2185 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
2186 | |
2187 | if (!netif_running(dev)) | |
2188 | return -EINVAL; | |
2189 | ||
2190 | spin_lock_irq(&smc->lock); | |
2191 | saved_bank = inw(ioaddr + BANK_SELECT); | |
2192 | SMC_SELECT_BANK(3); | |
2193 | rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL); | |
2194 | SMC_SELECT_BANK(saved_bank); | |
2195 | spin_unlock_irq(&smc->lock); | |
2196 | return rc; | |
2197 | } | |
2198 | ||
5c672220 DB |
2199 | static struct pcmcia_device_id smc91c92_ids[] = { |
2200 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501), | |
2201 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a), | |
2202 | PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63), | |
2203 | PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63), | |
2204 | PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef), | |
2205 | PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef), | |
2206 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c), | |
2207 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e), | |
d277ad0e K |
2208 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9), |
2209 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed), | |
5c672220 DB |
2210 | PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020), |
2211 | PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023), | |
2212 | PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb), | |
2213 | PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc), | |
2214 | PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1), | |
2215 | PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5), | |
2216 | PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9), | |
2217 | PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953), | |
2218 | PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a), | |
d277ad0e K |
2219 | PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314), |
2220 | PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a), | |
5c672220 DB |
2221 | PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc), |
2222 | PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9), | |
2223 | PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d), | |
2224 | /* These conflict with other cards! */ | |
2225 | /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */ | |
2226 | /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */ | |
2227 | PCMCIA_DEVICE_NULL, | |
2228 | }; | |
2229 | MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids); | |
2230 | ||
1da177e4 LT |
2231 | static struct pcmcia_driver smc91c92_cs_driver = { |
2232 | .owner = THIS_MODULE, | |
2233 | .drv = { | |
2234 | .name = "smc91c92_cs", | |
2235 | }, | |
15b99ac1 | 2236 | .probe = smc91c92_probe, |
cc3b4866 | 2237 | .remove = smc91c92_detach, |
5c672220 | 2238 | .id_table = smc91c92_ids, |
98e4c28b DB |
2239 | .suspend = smc91c92_suspend, |
2240 | .resume = smc91c92_resume, | |
1da177e4 LT |
2241 | }; |
2242 | ||
2243 | static int __init init_smc91c92_cs(void) | |
2244 | { | |
2245 | return pcmcia_register_driver(&smc91c92_cs_driver); | |
2246 | } | |
2247 | ||
2248 | static void __exit exit_smc91c92_cs(void) | |
2249 | { | |
2250 | pcmcia_unregister_driver(&smc91c92_cs_driver); | |
1da177e4 LT |
2251 | } |
2252 | ||
2253 | module_init(init_smc91c92_cs); | |
2254 | module_exit(exit_smc91c92_cs); |