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Commit | Line | Data |
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1da177e4 LT |
1 | /*====================================================================== |
2 | ||
3 | A PCMCIA ethernet driver for SMC91c92-based cards. | |
4 | ||
5 | This driver supports Megahertz PCMCIA ethernet cards; and | |
6 | Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem | |
7 | multifunction cards. | |
8 | ||
9 | Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net | |
10 | ||
11 | smc91c92_cs.c 1.122 2002/10/25 06:26:39 | |
12 | ||
13 | This driver contains code written by Donald Becker | |
14 | (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au), | |
15 | David Hinds (dahinds@users.sourceforge.net), and Erik Stahlman | |
16 | (erik@vt.edu). Donald wrote the SMC 91c92 code using parts of | |
17 | Erik's SMC 91c94 driver. Rowan wrote a similar driver, and I've | |
18 | incorporated some parts of his driver here. I (Dave) wrote most | |
19 | of the PCMCIA glue code, and the Ositech support code. Kelly | |
20 | Stephens (kstephen@holli.com) added support for the Motorola | |
21 | Mariner, with help from Allen Brost. | |
22 | ||
23 | This software may be used and distributed according to the terms of | |
24 | the GNU General Public License, incorporated herein by reference. | |
25 | ||
26 | ======================================================================*/ | |
27 | ||
28 | #include <linux/module.h> | |
29 | #include <linux/kernel.h> | |
30 | #include <linux/init.h> | |
31 | #include <linux/slab.h> | |
32 | #include <linux/string.h> | |
33 | #include <linux/timer.h> | |
34 | #include <linux/interrupt.h> | |
35 | #include <linux/delay.h> | |
36 | #include <linux/crc32.h> | |
37 | #include <linux/netdevice.h> | |
38 | #include <linux/etherdevice.h> | |
39 | #include <linux/skbuff.h> | |
40 | #include <linux/if_arp.h> | |
41 | #include <linux/ioport.h> | |
42 | #include <linux/ethtool.h> | |
43 | #include <linux/mii.h> | |
4851d3aa | 44 | #include <linux/jiffies.h> |
75bf758f | 45 | #include <linux/firmware.h> |
1da177e4 | 46 | |
1da177e4 LT |
47 | #include <pcmcia/cs_types.h> |
48 | #include <pcmcia/cs.h> | |
49 | #include <pcmcia/cistpl.h> | |
50 | #include <pcmcia/cisreg.h> | |
51 | #include <pcmcia/ciscode.h> | |
52 | #include <pcmcia/ds.h> | |
50db3fdb | 53 | #include <pcmcia/ss.h> |
1da177e4 LT |
54 | |
55 | #include <asm/io.h> | |
56 | #include <asm/system.h> | |
57 | #include <asm/uaccess.h> | |
58 | ||
1da177e4 LT |
59 | /*====================================================================*/ |
60 | ||
f71e1309 | 61 | static const char *if_names[] = { "auto", "10baseT", "10base2"}; |
1da177e4 | 62 | |
75bf758f JSR |
63 | /* Firmware name */ |
64 | #define FIRMWARE_NAME "ositech/Xilinx7OD.bin" | |
65 | ||
1da177e4 LT |
66 | /* Module parameters */ |
67 | ||
68 | MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver"); | |
69 | MODULE_LICENSE("GPL"); | |
75bf758f | 70 | MODULE_FIRMWARE(FIRMWARE_NAME); |
1da177e4 LT |
71 | |
72 | #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0) | |
73 | ||
74 | /* | |
75 | Transceiver/media type. | |
76 | 0 = auto | |
77 | 1 = 10baseT (and autoselect if #define AUTOSELECT), | |
78 | 2 = AUI/10base2, | |
79 | */ | |
80 | INT_MODULE_PARM(if_port, 0); | |
81 | ||
82 | #ifdef PCMCIA_DEBUG | |
83 | INT_MODULE_PARM(pc_debug, PCMCIA_DEBUG); | |
84 | static const char *version = | |
d5b20697 | 85 | "smc91c92_cs.c 1.123 2006/11/09 Donald Becker, becker@scyld.com.\n"; |
1da177e4 LT |
86 | #define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args) |
87 | #else | |
88 | #define DEBUG(n, args...) | |
89 | #endif | |
90 | ||
91 | #define DRV_NAME "smc91c92_cs" | |
d5b20697 | 92 | #define DRV_VERSION "1.123" |
1da177e4 LT |
93 | |
94 | /*====================================================================*/ | |
95 | ||
96 | /* Operational parameter that usually are not changed. */ | |
97 | ||
98 | /* Time in jiffies before concluding Tx hung */ | |
99 | #define TX_TIMEOUT ((400*HZ)/1000) | |
100 | ||
101 | /* Maximum events (Rx packets, etc.) to handle at each interrupt. */ | |
102 | #define INTR_WORK 4 | |
103 | ||
104 | /* Times to check the check the chip before concluding that it doesn't | |
105 | currently have room for another Tx packet. */ | |
106 | #define MEMORY_WAIT_TIME 8 | |
107 | ||
1da177e4 | 108 | struct smc_private { |
fd238232 | 109 | struct pcmcia_device *p_dev; |
1da177e4 LT |
110 | spinlock_t lock; |
111 | u_short manfid; | |
112 | u_short cardid; | |
6fb7298c | 113 | |
1da177e4 LT |
114 | dev_node_t node; |
115 | struct sk_buff *saved_skb; | |
116 | int packets_waiting; | |
117 | void __iomem *base; | |
118 | u_short cfg; | |
119 | struct timer_list media; | |
120 | int watchdog, tx_err; | |
121 | u_short media_status; | |
122 | u_short fast_poll; | |
123 | u_short link_status; | |
124 | struct mii_if_info mii_if; | |
125 | int duplex; | |
126 | int rx_ovrn; | |
127 | }; | |
128 | ||
4638aef4 YR |
129 | struct smc_cfg_mem { |
130 | tuple_t tuple; | |
131 | cisparse_t parse; | |
132 | u_char buf[255]; | |
133 | }; | |
134 | ||
1da177e4 LT |
135 | /* Special definitions for Megahertz multifunction cards */ |
136 | #define MEGAHERTZ_ISR 0x0380 | |
137 | ||
138 | /* Special function registers for Motorola Mariner */ | |
139 | #define MOT_LAN 0x0000 | |
140 | #define MOT_UART 0x0020 | |
141 | #define MOT_EEPROM 0x20 | |
142 | ||
143 | #define MOT_NORMAL \ | |
144 | (COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA) | |
145 | ||
146 | /* Special function registers for Ositech cards */ | |
147 | #define OSITECH_AUI_CTL 0x0c | |
148 | #define OSITECH_PWRDOWN 0x0d | |
149 | #define OSITECH_RESET 0x0e | |
150 | #define OSITECH_ISR 0x0f | |
151 | #define OSITECH_AUI_PWR 0x0c | |
152 | #define OSITECH_RESET_ISR 0x0e | |
153 | ||
154 | #define OSI_AUI_PWR 0x40 | |
155 | #define OSI_LAN_PWRDOWN 0x02 | |
156 | #define OSI_MODEM_PWRDOWN 0x01 | |
157 | #define OSI_LAN_RESET 0x02 | |
158 | #define OSI_MODEM_RESET 0x01 | |
159 | ||
160 | /* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */ | |
161 | #define BANK_SELECT 14 /* Window select register. */ | |
162 | #define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); } | |
163 | ||
164 | /* Bank 0 registers. */ | |
165 | #define TCR 0 /* transmit control register */ | |
166 | #define TCR_CLEAR 0 /* do NOTHING */ | |
167 | #define TCR_ENABLE 0x0001 /* if this is 1, we can transmit */ | |
168 | #define TCR_PAD_EN 0x0080 /* pads short packets to 64 bytes */ | |
169 | #define TCR_MONCSN 0x0400 /* Monitor Carrier. */ | |
170 | #define TCR_FDUPLX 0x0800 /* Full duplex mode. */ | |
171 | #define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN | |
172 | ||
173 | #define EPH 2 /* Ethernet Protocol Handler report. */ | |
174 | #define EPH_TX_SUC 0x0001 | |
175 | #define EPH_SNGLCOL 0x0002 | |
176 | #define EPH_MULCOL 0x0004 | |
177 | #define EPH_LTX_MULT 0x0008 | |
178 | #define EPH_16COL 0x0010 | |
179 | #define EPH_SQET 0x0020 | |
180 | #define EPH_LTX_BRD 0x0040 | |
181 | #define EPH_TX_DEFR 0x0080 | |
182 | #define EPH_LAT_COL 0x0200 | |
183 | #define EPH_LOST_CAR 0x0400 | |
184 | #define EPH_EXC_DEF 0x0800 | |
185 | #define EPH_CTR_ROL 0x1000 | |
186 | #define EPH_RX_OVRN 0x2000 | |
187 | #define EPH_LINK_OK 0x4000 | |
188 | #define EPH_TX_UNRN 0x8000 | |
189 | #define MEMINFO 8 /* Memory Information Register */ | |
190 | #define MEMCFG 10 /* Memory Configuration Register */ | |
191 | ||
192 | /* Bank 1 registers. */ | |
193 | #define CONFIG 0 | |
194 | #define CFG_MII_SELECT 0x8000 /* 91C100 only */ | |
195 | #define CFG_NO_WAIT 0x1000 | |
196 | #define CFG_FULL_STEP 0x0400 | |
197 | #define CFG_SET_SQLCH 0x0200 | |
198 | #define CFG_AUI_SELECT 0x0100 | |
199 | #define CFG_16BIT 0x0080 | |
200 | #define CFG_DIS_LINK 0x0040 | |
201 | #define CFG_STATIC 0x0030 | |
202 | #define CFG_IRQ_SEL_1 0x0004 | |
203 | #define CFG_IRQ_SEL_0 0x0002 | |
204 | #define BASE_ADDR 2 | |
205 | #define ADDR0 4 | |
206 | #define GENERAL 10 | |
207 | #define CONTROL 12 | |
208 | #define CTL_STORE 0x0001 | |
209 | #define CTL_RELOAD 0x0002 | |
210 | #define CTL_EE_SELECT 0x0004 | |
211 | #define CTL_TE_ENABLE 0x0020 | |
212 | #define CTL_CR_ENABLE 0x0040 | |
213 | #define CTL_LE_ENABLE 0x0080 | |
214 | #define CTL_AUTO_RELEASE 0x0800 | |
215 | #define CTL_POWERDOWN 0x2000 | |
216 | ||
217 | /* Bank 2 registers. */ | |
218 | #define MMU_CMD 0 | |
219 | #define MC_ALLOC 0x20 /* or with number of 256 byte packets */ | |
220 | #define MC_RESET 0x40 | |
221 | #define MC_RELEASE 0x80 /* remove and release the current rx packet */ | |
222 | #define MC_FREEPKT 0xA0 /* Release packet in PNR register */ | |
223 | #define MC_ENQUEUE 0xC0 /* Enqueue the packet for transmit */ | |
224 | #define PNR_ARR 2 | |
225 | #define FIFO_PORTS 4 | |
226 | #define FP_RXEMPTY 0x8000 | |
227 | #define POINTER 6 | |
228 | #define PTR_AUTO_INC 0x0040 | |
229 | #define PTR_READ 0x2000 | |
230 | #define PTR_AUTOINC 0x4000 | |
231 | #define PTR_RCV 0x8000 | |
232 | #define DATA_1 8 | |
233 | #define INTERRUPT 12 | |
234 | #define IM_RCV_INT 0x1 | |
235 | #define IM_TX_INT 0x2 | |
236 | #define IM_TX_EMPTY_INT 0x4 | |
237 | #define IM_ALLOC_INT 0x8 | |
238 | #define IM_RX_OVRN_INT 0x10 | |
239 | #define IM_EPH_INT 0x20 | |
240 | ||
241 | #define RCR 4 | |
242 | enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002, | |
243 | RxEnable = 0x0100, RxStripCRC = 0x0200}; | |
244 | #define RCR_SOFTRESET 0x8000 /* resets the chip */ | |
245 | #define RCR_STRIP_CRC 0x200 /* strips CRC */ | |
246 | #define RCR_ENABLE 0x100 /* IFF this is set, we can receive packets */ | |
247 | #define RCR_ALMUL 0x4 /* receive all multicast packets */ | |
248 | #define RCR_PROMISC 0x2 /* enable promiscuous mode */ | |
249 | ||
250 | /* the normal settings for the RCR register : */ | |
251 | #define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE) | |
252 | #define RCR_CLEAR 0x0 /* set it to a base state */ | |
253 | #define COUNTER 6 | |
254 | ||
255 | /* BANK 3 -- not the same values as in smc9194! */ | |
256 | #define MULTICAST0 0 | |
257 | #define MULTICAST2 2 | |
258 | #define MULTICAST4 4 | |
259 | #define MULTICAST6 6 | |
260 | #define MGMT 8 | |
261 | #define REVISION 0x0a | |
262 | ||
263 | /* Transmit status bits. */ | |
264 | #define TS_SUCCESS 0x0001 | |
265 | #define TS_16COL 0x0010 | |
266 | #define TS_LATCOL 0x0200 | |
267 | #define TS_LOSTCAR 0x0400 | |
268 | ||
269 | /* Receive status bits. */ | |
270 | #define RS_ALGNERR 0x8000 | |
271 | #define RS_BADCRC 0x2000 | |
272 | #define RS_ODDFRAME 0x1000 | |
273 | #define RS_TOOLONG 0x0800 | |
274 | #define RS_TOOSHORT 0x0400 | |
275 | #define RS_MULTICAST 0x0001 | |
276 | #define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT) | |
277 | ||
278 | #define set_bits(v, p) outw(inw(p)|(v), (p)) | |
279 | #define mask_bits(v, p) outw(inw(p)&(v), (p)) | |
280 | ||
281 | /*====================================================================*/ | |
282 | ||
cc3b4866 | 283 | static void smc91c92_detach(struct pcmcia_device *p_dev); |
15b99ac1 | 284 | static int smc91c92_config(struct pcmcia_device *link); |
fba395ee | 285 | static void smc91c92_release(struct pcmcia_device *link); |
1da177e4 LT |
286 | |
287 | static int smc_open(struct net_device *dev); | |
288 | static int smc_close(struct net_device *dev); | |
289 | static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); | |
290 | static void smc_tx_timeout(struct net_device *dev); | |
291 | static int smc_start_xmit(struct sk_buff *skb, struct net_device *dev); | |
7d12e780 | 292 | static irqreturn_t smc_interrupt(int irq, void *dev_id); |
1da177e4 | 293 | static void smc_rx(struct net_device *dev); |
1da177e4 LT |
294 | static void set_rx_mode(struct net_device *dev); |
295 | static int s9k_config(struct net_device *dev, struct ifmap *map); | |
296 | static void smc_set_xcvr(struct net_device *dev, int if_port); | |
297 | static void smc_reset(struct net_device *dev); | |
298 | static void media_check(u_long arg); | |
906da809 | 299 | static void mdio_sync(unsigned int addr); |
1da177e4 LT |
300 | static int mdio_read(struct net_device *dev, int phy_id, int loc); |
301 | static void mdio_write(struct net_device *dev, int phy_id, int loc, int value); | |
302 | static int smc_link_ok(struct net_device *dev); | |
7282d491 | 303 | static const struct ethtool_ops ethtool_ops; |
1da177e4 | 304 | |
9b31b697 SH |
305 | static const struct net_device_ops smc_netdev_ops = { |
306 | .ndo_open = smc_open, | |
307 | .ndo_stop = smc_close, | |
308 | .ndo_start_xmit = smc_start_xmit, | |
309 | .ndo_tx_timeout = smc_tx_timeout, | |
310 | .ndo_set_config = s9k_config, | |
311 | .ndo_set_multicast_list = set_rx_mode, | |
312 | .ndo_do_ioctl = &smc_ioctl, | |
313 | .ndo_change_mtu = eth_change_mtu, | |
314 | .ndo_set_mac_address = eth_mac_addr, | |
315 | .ndo_validate_addr = eth_validate_addr, | |
316 | }; | |
317 | ||
1da177e4 LT |
318 | /*====================================================================== |
319 | ||
320 | smc91c92_attach() creates an "instance" of the driver, allocating | |
321 | local data structures for one device. The device is registered | |
322 | with Card Services. | |
323 | ||
324 | ======================================================================*/ | |
325 | ||
15b99ac1 | 326 | static int smc91c92_probe(struct pcmcia_device *link) |
1da177e4 | 327 | { |
1da177e4 | 328 | struct smc_private *smc; |
1da177e4 | 329 | struct net_device *dev; |
1da177e4 LT |
330 | |
331 | DEBUG(0, "smc91c92_attach()\n"); | |
332 | ||
333 | /* Create new ethernet device */ | |
334 | dev = alloc_etherdev(sizeof(struct smc_private)); | |
335 | if (!dev) | |
f8cfa618 | 336 | return -ENOMEM; |
1da177e4 | 337 | smc = netdev_priv(dev); |
fba395ee | 338 | smc->p_dev = link; |
1da177e4 LT |
339 | link->priv = dev; |
340 | ||
341 | spin_lock_init(&smc->lock); | |
342 | link->io.NumPorts1 = 16; | |
343 | link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO; | |
344 | link->io.IOAddrLines = 4; | |
5e7bf8cc | 345 | link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING|IRQ_HANDLE_PRESENT; |
1da177e4 LT |
346 | link->irq.IRQInfo1 = IRQ_LEVEL_ID; |
347 | link->irq.Handler = &smc_interrupt; | |
348 | link->irq.Instance = dev; | |
349 | link->conf.Attributes = CONF_ENABLE_IRQ; | |
1da177e4 LT |
350 | link->conf.IntType = INT_MEMORY_AND_IO; |
351 | ||
352 | /* The SMC91c92-specific entries in the device structure. */ | |
9b31b697 | 353 | dev->netdev_ops = &smc_netdev_ops; |
1da177e4 | 354 | SET_ETHTOOL_OPS(dev, ðtool_ops); |
1da177e4 | 355 | dev->watchdog_timeo = TX_TIMEOUT; |
1da177e4 LT |
356 | |
357 | smc->mii_if.dev = dev; | |
358 | smc->mii_if.mdio_read = mdio_read; | |
359 | smc->mii_if.mdio_write = mdio_write; | |
360 | smc->mii_if.phy_id_mask = 0x1f; | |
361 | smc->mii_if.reg_num_mask = 0x1f; | |
362 | ||
15b99ac1 | 363 | return smc91c92_config(link); |
1da177e4 LT |
364 | } /* smc91c92_attach */ |
365 | ||
366 | /*====================================================================== | |
367 | ||
368 | This deletes a driver "instance". The device is de-registered | |
369 | with Card Services. If it has been released, all local data | |
370 | structures are freed. Otherwise, the structures will be freed | |
371 | when the device is released. | |
372 | ||
373 | ======================================================================*/ | |
374 | ||
fba395ee | 375 | static void smc91c92_detach(struct pcmcia_device *link) |
1da177e4 LT |
376 | { |
377 | struct net_device *dev = link->priv; | |
1da177e4 LT |
378 | |
379 | DEBUG(0, "smc91c92_detach(0x%p)\n", link); | |
380 | ||
fd238232 | 381 | if (link->dev_node) |
1da177e4 LT |
382 | unregister_netdev(dev); |
383 | ||
e2d40963 | 384 | smc91c92_release(link); |
1da177e4 | 385 | |
1da177e4 LT |
386 | free_netdev(dev); |
387 | } /* smc91c92_detach */ | |
388 | ||
389 | /*====================================================================*/ | |
390 | ||
391 | static int cvt_ascii_address(struct net_device *dev, char *s) | |
392 | { | |
393 | int i, j, da, c; | |
394 | ||
395 | if (strlen(s) != 12) | |
396 | return -1; | |
397 | for (i = 0; i < 6; i++) { | |
398 | da = 0; | |
399 | for (j = 0; j < 2; j++) { | |
400 | c = *s++; | |
401 | da <<= 4; | |
402 | da += ((c >= '0') && (c <= '9')) ? | |
403 | (c - '0') : ((c & 0x0f) + 9); | |
404 | } | |
405 | dev->dev_addr[i] = da; | |
406 | } | |
407 | return 0; | |
408 | } | |
409 | ||
410 | /*====================================================================*/ | |
411 | ||
fba395ee | 412 | static int first_tuple(struct pcmcia_device *handle, tuple_t *tuple, |
1da177e4 LT |
413 | cisparse_t *parse) |
414 | { | |
415 | int i; | |
416 | ||
4c89e88b DB |
417 | i = pcmcia_get_first_tuple(handle, tuple); |
418 | if (i != 0) | |
419 | return i; | |
420 | i = pcmcia_get_tuple_data(handle, tuple); | |
421 | if (i != 0) | |
1da177e4 | 422 | return i; |
2f3061eb | 423 | return pcmcia_parse_tuple(tuple, parse); |
1da177e4 LT |
424 | } |
425 | ||
fba395ee | 426 | static int next_tuple(struct pcmcia_device *handle, tuple_t *tuple, |
1da177e4 LT |
427 | cisparse_t *parse) |
428 | { | |
429 | int i; | |
430 | ||
4c89e88b DB |
431 | if ((i = pcmcia_get_next_tuple(handle, tuple)) != 0 || |
432 | (i = pcmcia_get_tuple_data(handle, tuple)) != 0) | |
1da177e4 | 433 | return i; |
2f3061eb | 434 | return pcmcia_parse_tuple(tuple, parse); |
1da177e4 LT |
435 | } |
436 | ||
437 | /*====================================================================== | |
438 | ||
439 | Configuration stuff for Megahertz cards | |
440 | ||
441 | mhz_3288_power() is used to power up a 3288's ethernet chip. | |
442 | mhz_mfc_config() handles socket setup for multifunction (1144 | |
443 | and 3288) cards. mhz_setup() gets a card's hardware ethernet | |
444 | address. | |
445 | ||
446 | ======================================================================*/ | |
447 | ||
fba395ee | 448 | static int mhz_3288_power(struct pcmcia_device *link) |
1da177e4 LT |
449 | { |
450 | struct net_device *dev = link->priv; | |
451 | struct smc_private *smc = netdev_priv(dev); | |
452 | u_char tmp; | |
453 | ||
454 | /* Read the ISR twice... */ | |
455 | readb(smc->base+MEGAHERTZ_ISR); | |
456 | udelay(5); | |
457 | readb(smc->base+MEGAHERTZ_ISR); | |
458 | ||
459 | /* Pause 200ms... */ | |
460 | mdelay(200); | |
461 | ||
462 | /* Now read and write the COR... */ | |
463 | tmp = readb(smc->base + link->conf.ConfigBase + CISREG_COR); | |
464 | udelay(5); | |
465 | writeb(tmp, smc->base + link->conf.ConfigBase + CISREG_COR); | |
466 | ||
467 | return 0; | |
468 | } | |
469 | ||
b54bf94b DB |
470 | static int mhz_mfc_config_check(struct pcmcia_device *p_dev, |
471 | cistpl_cftable_entry_t *cf, | |
8e2fc39d | 472 | cistpl_cftable_entry_t *dflt, |
ad913c11 | 473 | unsigned int vcc, |
b54bf94b DB |
474 | void *priv_data) |
475 | { | |
476 | int k; | |
b54bf94b DB |
477 | p_dev->io.BasePort2 = cf->io.win[0].base; |
478 | for (k = 0; k < 0x400; k += 0x10) { | |
479 | if (k & 0x80) | |
480 | continue; | |
481 | p_dev->io.BasePort1 = k ^ 0x300; | |
482 | if (!pcmcia_request_io(p_dev, &p_dev->io)) | |
483 | return 0; | |
484 | } | |
485 | return -ENODEV; | |
486 | } | |
487 | ||
fba395ee | 488 | static int mhz_mfc_config(struct pcmcia_device *link) |
1da177e4 LT |
489 | { |
490 | struct net_device *dev = link->priv; | |
491 | struct smc_private *smc = netdev_priv(dev); | |
4638aef4 | 492 | struct smc_cfg_mem *cfg_mem; |
1da177e4 LT |
493 | win_req_t req; |
494 | memreq_t mem; | |
b54bf94b | 495 | int i; |
1da177e4 | 496 | |
4638aef4 YR |
497 | cfg_mem = kmalloc(sizeof(struct smc_cfg_mem), GFP_KERNEL); |
498 | if (!cfg_mem) | |
1168386a | 499 | return -ENOMEM; |
4638aef4 | 500 | |
1da177e4 LT |
501 | link->conf.Attributes |= CONF_ENABLE_SPKR; |
502 | link->conf.Status = CCSR_AUDIO_ENA; | |
503 | link->irq.Attributes = | |
504 | IRQ_TYPE_DYNAMIC_SHARING|IRQ_FIRST_SHARED|IRQ_HANDLE_PRESENT; | |
505 | link->io.IOAddrLines = 16; | |
506 | link->io.Attributes2 = IO_DATA_PATH_WIDTH_8; | |
507 | link->io.NumPorts2 = 8; | |
508 | ||
1da177e4 LT |
509 | /* The Megahertz combo cards have modem-like CIS entries, so |
510 | we have to explicitly try a bunch of port combinations. */ | |
b54bf94b | 511 | if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL)) |
4638aef4 | 512 | goto free_cfg_mem; |
1da177e4 LT |
513 | dev->base_addr = link->io.BasePort1; |
514 | ||
515 | /* Allocate a memory window, for accessing the ISR */ | |
516 | req.Attributes = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE; | |
517 | req.Base = req.Size = 0; | |
518 | req.AccessSpeed = 0; | |
fba395ee | 519 | i = pcmcia_request_window(&link, &req, &link->win); |
4c89e88b | 520 | if (i != 0) |
4638aef4 | 521 | goto free_cfg_mem; |
1da177e4 LT |
522 | smc->base = ioremap(req.Base, req.Size); |
523 | mem.CardOffset = mem.Page = 0; | |
524 | if (smc->manfid == MANFID_MOTOROLA) | |
525 | mem.CardOffset = link->conf.ConfigBase; | |
526 | i = pcmcia_map_mem_page(link->win, &mem); | |
527 | ||
4c89e88b | 528 | if ((i == 0) |
1da177e4 LT |
529 | && (smc->manfid == MANFID_MEGAHERTZ) |
530 | && (smc->cardid == PRODID_MEGAHERTZ_EM3288)) | |
531 | mhz_3288_power(link); | |
532 | ||
4638aef4 YR |
533 | free_cfg_mem: |
534 | kfree(cfg_mem); | |
b54bf94b | 535 | return -ENODEV; |
1da177e4 LT |
536 | } |
537 | ||
fba395ee | 538 | static int mhz_setup(struct pcmcia_device *link) |
1da177e4 | 539 | { |
1da177e4 | 540 | struct net_device *dev = link->priv; |
4638aef4 YR |
541 | struct smc_cfg_mem *cfg_mem; |
542 | tuple_t *tuple; | |
543 | cisparse_t *parse; | |
544 | u_char *buf, *station_addr; | |
545 | int rc; | |
546 | ||
547 | cfg_mem = kmalloc(sizeof(struct smc_cfg_mem), GFP_KERNEL); | |
548 | if (!cfg_mem) | |
549 | return -1; | |
1da177e4 | 550 | |
4638aef4 YR |
551 | tuple = &cfg_mem->tuple; |
552 | parse = &cfg_mem->parse; | |
553 | buf = cfg_mem->buf; | |
554 | ||
555 | tuple->Attributes = tuple->TupleOffset = 0; | |
556 | tuple->TupleData = (cisdata_t *)buf; | |
557 | tuple->TupleDataMax = 255; | |
1da177e4 LT |
558 | |
559 | /* Read the station address from the CIS. It is stored as the last | |
560 | (fourth) string in the Version 1 Version/ID tuple. */ | |
a1a98b72 | 561 | tuple->DesiredTuple = CISTPL_VERS_1; |
4c89e88b | 562 | if (first_tuple(link, tuple, parse) != 0) { |
a1a98b72 CE |
563 | rc = -1; |
564 | goto free_cfg_mem; | |
565 | } | |
566 | /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */ | |
4c89e88b | 567 | if (next_tuple(link, tuple, parse) != 0) |
a1a98b72 CE |
568 | first_tuple(link, tuple, parse); |
569 | if (parse->version_1.ns > 3) { | |
570 | station_addr = parse->version_1.str + parse->version_1.ofs[3]; | |
4638aef4 YR |
571 | if (cvt_ascii_address(dev, station_addr) == 0) { |
572 | rc = 0; | |
573 | goto free_cfg_mem; | |
574 | } | |
1da177e4 LT |
575 | } |
576 | ||
577 | /* Another possibility: for the EM3288, in a special tuple */ | |
4638aef4 | 578 | tuple->DesiredTuple = 0x81; |
4c89e88b | 579 | if (pcmcia_get_first_tuple(link, tuple) != 0) { |
4638aef4 YR |
580 | rc = -1; |
581 | goto free_cfg_mem; | |
582 | } | |
4c89e88b | 583 | if (pcmcia_get_tuple_data(link, tuple) != 0) { |
4638aef4 YR |
584 | rc = -1; |
585 | goto free_cfg_mem; | |
586 | } | |
1da177e4 | 587 | buf[12] = '\0'; |
4638aef4 YR |
588 | if (cvt_ascii_address(dev, buf) == 0) { |
589 | rc = 0; | |
590 | goto free_cfg_mem; | |
591 | } | |
592 | rc = -1; | |
593 | free_cfg_mem: | |
594 | kfree(cfg_mem); | |
595 | return rc; | |
1da177e4 LT |
596 | } |
597 | ||
598 | /*====================================================================== | |
599 | ||
600 | Configuration stuff for the Motorola Mariner | |
601 | ||
602 | mot_config() writes directly to the Mariner configuration | |
603 | registers because the CIS is just bogus. | |
604 | ||
605 | ======================================================================*/ | |
606 | ||
fba395ee | 607 | static void mot_config(struct pcmcia_device *link) |
1da177e4 LT |
608 | { |
609 | struct net_device *dev = link->priv; | |
610 | struct smc_private *smc = netdev_priv(dev); | |
906da809 OJ |
611 | unsigned int ioaddr = dev->base_addr; |
612 | unsigned int iouart = link->io.BasePort2; | |
1da177e4 LT |
613 | |
614 | /* Set UART base address and force map with COR bit 1 */ | |
615 | writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0); | |
616 | writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1); | |
617 | writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR); | |
618 | ||
619 | /* Set SMC base address and force map with COR bit 1 */ | |
620 | writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0); | |
621 | writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1); | |
622 | writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR); | |
623 | ||
624 | /* Wait for things to settle down */ | |
625 | mdelay(100); | |
626 | } | |
627 | ||
fba395ee | 628 | static int mot_setup(struct pcmcia_device *link) |
1da177e4 LT |
629 | { |
630 | struct net_device *dev = link->priv; | |
906da809 | 631 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
632 | int i, wait, loop; |
633 | u_int addr; | |
634 | ||
635 | /* Read Ethernet address from Serial EEPROM */ | |
636 | ||
637 | for (i = 0; i < 3; i++) { | |
638 | SMC_SELECT_BANK(2); | |
639 | outw(MOT_EEPROM + i, ioaddr + POINTER); | |
640 | SMC_SELECT_BANK(1); | |
641 | outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL); | |
642 | ||
643 | for (loop = wait = 0; loop < 200; loop++) { | |
644 | udelay(10); | |
645 | wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL)); | |
646 | if (wait == 0) break; | |
647 | } | |
648 | ||
649 | if (wait) | |
650 | return -1; | |
651 | ||
652 | addr = inw(ioaddr + GENERAL); | |
653 | dev->dev_addr[2*i] = addr & 0xff; | |
654 | dev->dev_addr[2*i+1] = (addr >> 8) & 0xff; | |
655 | } | |
656 | ||
657 | return 0; | |
658 | } | |
659 | ||
660 | /*====================================================================*/ | |
661 | ||
b54bf94b DB |
662 | static int smc_configcheck(struct pcmcia_device *p_dev, |
663 | cistpl_cftable_entry_t *cf, | |
8e2fc39d | 664 | cistpl_cftable_entry_t *dflt, |
ad913c11 | 665 | unsigned int vcc, |
b54bf94b DB |
666 | void *priv_data) |
667 | { | |
b54bf94b DB |
668 | p_dev->io.BasePort1 = cf->io.win[0].base; |
669 | p_dev->io.IOAddrLines = cf->io.flags & CISTPL_IO_LINES_MASK; | |
670 | return pcmcia_request_io(p_dev, &p_dev->io); | |
671 | } | |
672 | ||
fba395ee | 673 | static int smc_config(struct pcmcia_device *link) |
1da177e4 LT |
674 | { |
675 | struct net_device *dev = link->priv; | |
1da177e4 LT |
676 | int i; |
677 | ||
1da177e4 | 678 | link->io.NumPorts1 = 16; |
b54bf94b DB |
679 | i = pcmcia_loop_config(link, smc_configcheck, NULL); |
680 | if (!i) | |
681 | dev->base_addr = link->io.BasePort1; | |
4638aef4 | 682 | |
1da177e4 LT |
683 | return i; |
684 | } | |
685 | ||
fba395ee | 686 | static int smc_setup(struct pcmcia_device *link) |
1da177e4 | 687 | { |
1da177e4 | 688 | struct net_device *dev = link->priv; |
4638aef4 YR |
689 | struct smc_cfg_mem *cfg_mem; |
690 | tuple_t *tuple; | |
691 | cisparse_t *parse; | |
1da177e4 | 692 | cistpl_lan_node_id_t *node_id; |
4638aef4 YR |
693 | u_char *buf, *station_addr; |
694 | int i, rc; | |
695 | ||
696 | cfg_mem = kmalloc(sizeof(struct smc_cfg_mem), GFP_KERNEL); | |
697 | if (!cfg_mem) | |
1168386a | 698 | return -ENOMEM; |
4638aef4 YR |
699 | |
700 | tuple = &cfg_mem->tuple; | |
701 | parse = &cfg_mem->parse; | |
702 | buf = cfg_mem->buf; | |
1da177e4 | 703 | |
4638aef4 YR |
704 | tuple->Attributes = tuple->TupleOffset = 0; |
705 | tuple->TupleData = (cisdata_t *)buf; | |
706 | tuple->TupleDataMax = 255; | |
1da177e4 LT |
707 | |
708 | /* Check for a LAN function extension tuple */ | |
4638aef4 | 709 | tuple->DesiredTuple = CISTPL_FUNCE; |
fba395ee | 710 | i = first_tuple(link, tuple, parse); |
4c89e88b | 711 | while (i == 0) { |
4638aef4 | 712 | if (parse->funce.type == CISTPL_FUNCE_LAN_NODE_ID) |
1da177e4 | 713 | break; |
fba395ee | 714 | i = next_tuple(link, tuple, parse); |
1da177e4 | 715 | } |
4c89e88b | 716 | if (i == 0) { |
4638aef4 | 717 | node_id = (cistpl_lan_node_id_t *)parse->funce.data; |
1da177e4 LT |
718 | if (node_id->nb == 6) { |
719 | for (i = 0; i < 6; i++) | |
720 | dev->dev_addr[i] = node_id->id[i]; | |
4638aef4 YR |
721 | rc = 0; |
722 | goto free_cfg_mem; | |
1da177e4 LT |
723 | } |
724 | } | |
725 | /* Try the third string in the Version 1 Version/ID tuple. */ | |
a9606fd3 DB |
726 | if (link->prod_id[2]) { |
727 | station_addr = link->prod_id[2]; | |
728 | if (cvt_ascii_address(dev, station_addr) == 0) { | |
729 | rc = 0; | |
730 | goto free_cfg_mem; | |
731 | } | |
4638aef4 | 732 | } |
1da177e4 | 733 | |
4638aef4 YR |
734 | rc = -1; |
735 | free_cfg_mem: | |
736 | kfree(cfg_mem); | |
737 | return rc; | |
1da177e4 LT |
738 | } |
739 | ||
740 | /*====================================================================*/ | |
741 | ||
fba395ee | 742 | static int osi_config(struct pcmcia_device *link) |
1da177e4 LT |
743 | { |
744 | struct net_device *dev = link->priv; | |
906da809 | 745 | static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; |
1da177e4 LT |
746 | int i, j; |
747 | ||
748 | link->conf.Attributes |= CONF_ENABLE_SPKR; | |
749 | link->conf.Status = CCSR_AUDIO_ENA; | |
750 | link->irq.Attributes = | |
751 | IRQ_TYPE_DYNAMIC_SHARING|IRQ_FIRST_SHARED|IRQ_HANDLE_PRESENT; | |
752 | link->io.NumPorts1 = 64; | |
753 | link->io.Attributes2 = IO_DATA_PATH_WIDTH_8; | |
754 | link->io.NumPorts2 = 8; | |
755 | link->io.IOAddrLines = 16; | |
756 | ||
757 | /* Enable Hard Decode, LAN, Modem */ | |
758 | link->conf.ConfigIndex = 0x23; | |
759 | ||
760 | for (i = j = 0; j < 4; j++) { | |
761 | link->io.BasePort2 = com[j]; | |
fba395ee | 762 | i = pcmcia_request_io(link, &link->io); |
4c89e88b DB |
763 | if (i == 0) |
764 | break; | |
1da177e4 | 765 | } |
4c89e88b | 766 | if (i != 0) { |
1da177e4 LT |
767 | /* Fallback: turn off hard decode */ |
768 | link->conf.ConfigIndex = 0x03; | |
769 | link->io.NumPorts2 = 0; | |
fba395ee | 770 | i = pcmcia_request_io(link, &link->io); |
1da177e4 LT |
771 | } |
772 | dev->base_addr = link->io.BasePort1 + 0x10; | |
773 | return i; | |
774 | } | |
775 | ||
75bf758f JSR |
776 | static int osi_load_firmware(struct pcmcia_device *link) |
777 | { | |
778 | const struct firmware *fw; | |
779 | int i, err; | |
780 | ||
781 | err = request_firmware(&fw, FIRMWARE_NAME, &link->dev); | |
782 | if (err) { | |
783 | pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME); | |
784 | return err; | |
785 | } | |
786 | ||
787 | /* Download the Seven of Diamonds firmware */ | |
788 | for (i = 0; i < fw->size; i++) { | |
789 | outb(fw->data[i], link->io.BasePort1 + 2); | |
790 | udelay(50); | |
791 | } | |
792 | release_firmware(fw); | |
793 | return err; | |
794 | } | |
795 | ||
fba395ee | 796 | static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid) |
1da177e4 | 797 | { |
1da177e4 | 798 | struct net_device *dev = link->priv; |
4638aef4 YR |
799 | struct smc_cfg_mem *cfg_mem; |
800 | tuple_t *tuple; | |
801 | u_char *buf; | |
802 | int i, rc; | |
1da177e4 | 803 | |
4638aef4 YR |
804 | cfg_mem = kmalloc(sizeof(struct smc_cfg_mem), GFP_KERNEL); |
805 | if (!cfg_mem) | |
806 | return -1; | |
807 | ||
808 | tuple = &cfg_mem->tuple; | |
809 | buf = cfg_mem->buf; | |
810 | ||
811 | tuple->Attributes = TUPLE_RETURN_COMMON; | |
812 | tuple->TupleData = (cisdata_t *)buf; | |
813 | tuple->TupleDataMax = 255; | |
814 | tuple->TupleOffset = 0; | |
1da177e4 LT |
815 | |
816 | /* Read the station address from tuple 0x90, subtuple 0x04 */ | |
4638aef4 | 817 | tuple->DesiredTuple = 0x90; |
fba395ee | 818 | i = pcmcia_get_first_tuple(link, tuple); |
4c89e88b | 819 | while (i == 0) { |
fba395ee | 820 | i = pcmcia_get_tuple_data(link, tuple); |
4c89e88b | 821 | if ((i != 0) || (buf[0] == 0x04)) |
1da177e4 | 822 | break; |
fba395ee | 823 | i = pcmcia_get_next_tuple(link, tuple); |
4638aef4 | 824 | } |
4c89e88b | 825 | if (i != 0) { |
4638aef4 YR |
826 | rc = -1; |
827 | goto free_cfg_mem; | |
1da177e4 | 828 | } |
1da177e4 LT |
829 | for (i = 0; i < 6; i++) |
830 | dev->dev_addr[i] = buf[i+2]; | |
831 | ||
832 | if (((manfid == MANFID_OSITECH) && | |
833 | (cardid == PRODID_OSITECH_SEVEN)) || | |
834 | ((manfid == MANFID_PSION) && | |
835 | (cardid == PRODID_PSION_NET100))) { | |
75bf758f JSR |
836 | rc = osi_load_firmware(link); |
837 | if (rc) | |
838 | goto free_cfg_mem; | |
1da177e4 LT |
839 | } else if (manfid == MANFID_OSITECH) { |
840 | /* Make sure both functions are powered up */ | |
841 | set_bits(0x300, link->io.BasePort1 + OSITECH_AUI_PWR); | |
842 | /* Now, turn on the interrupt for both card functions */ | |
843 | set_bits(0x300, link->io.BasePort1 + OSITECH_RESET_ISR); | |
844 | DEBUG(2, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n", | |
845 | inw(link->io.BasePort1 + OSITECH_AUI_PWR), | |
846 | inw(link->io.BasePort1 + OSITECH_RESET_ISR)); | |
847 | } | |
4638aef4 YR |
848 | rc = 0; |
849 | free_cfg_mem: | |
850 | kfree(cfg_mem); | |
851 | return rc; | |
1da177e4 LT |
852 | } |
853 | ||
fba395ee | 854 | static int smc91c92_suspend(struct pcmcia_device *link) |
98e4c28b | 855 | { |
98e4c28b DB |
856 | struct net_device *dev = link->priv; |
857 | ||
e2d40963 | 858 | if (link->open) |
4bbed523 | 859 | netif_device_detach(dev); |
98e4c28b DB |
860 | |
861 | return 0; | |
862 | } | |
863 | ||
fba395ee | 864 | static int smc91c92_resume(struct pcmcia_device *link) |
98e4c28b | 865 | { |
98e4c28b DB |
866 | struct net_device *dev = link->priv; |
867 | struct smc_private *smc = netdev_priv(dev); | |
868 | int i; | |
869 | ||
e2d40963 DB |
870 | if ((smc->manfid == MANFID_MEGAHERTZ) && |
871 | (smc->cardid == PRODID_MEGAHERTZ_EM3288)) | |
872 | mhz_3288_power(link); | |
873 | if (smc->manfid == MANFID_MOTOROLA) | |
874 | mot_config(link); | |
875 | if ((smc->manfid == MANFID_OSITECH) && | |
876 | (smc->cardid != PRODID_OSITECH_SEVEN)) { | |
877 | /* Power up the card and enable interrupts */ | |
878 | set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR); | |
879 | set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR); | |
880 | } | |
881 | if (((smc->manfid == MANFID_OSITECH) && | |
882 | (smc->cardid == PRODID_OSITECH_SEVEN)) || | |
883 | ((smc->manfid == MANFID_PSION) && | |
884 | (smc->cardid == PRODID_PSION_NET100))) { | |
75bf758f JSR |
885 | i = osi_load_firmware(link); |
886 | if (i) { | |
887 | pr_err("smc91c92_cs: Failed to load firmware\n"); | |
888 | return i; | |
98e4c28b DB |
889 | } |
890 | } | |
e2d40963 DB |
891 | if (link->open) { |
892 | smc_reset(dev); | |
893 | netif_device_attach(dev); | |
894 | } | |
98e4c28b DB |
895 | |
896 | return 0; | |
897 | } | |
898 | ||
899 | ||
1da177e4 LT |
900 | /*====================================================================== |
901 | ||
902 | This verifies that the chip is some SMC91cXX variant, and returns | |
903 | the revision code if successful. Otherwise, it returns -ENODEV. | |
904 | ||
905 | ======================================================================*/ | |
906 | ||
fba395ee | 907 | static int check_sig(struct pcmcia_device *link) |
1da177e4 LT |
908 | { |
909 | struct net_device *dev = link->priv; | |
906da809 | 910 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
911 | int width; |
912 | u_short s; | |
913 | ||
914 | SMC_SELECT_BANK(1); | |
915 | if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) { | |
916 | /* Try powering up the chip */ | |
917 | outw(0, ioaddr + CONTROL); | |
918 | mdelay(55); | |
919 | } | |
920 | ||
921 | /* Try setting bus width */ | |
922 | width = (link->io.Attributes1 == IO_DATA_PATH_WIDTH_AUTO); | |
923 | s = inb(ioaddr + CONFIG); | |
924 | if (width) | |
925 | s |= CFG_16BIT; | |
926 | else | |
927 | s &= ~CFG_16BIT; | |
928 | outb(s, ioaddr + CONFIG); | |
929 | ||
930 | /* Check Base Address Register to make sure bus width is OK */ | |
931 | s = inw(ioaddr + BASE_ADDR); | |
932 | if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) && | |
933 | ((s >> 8) != (s & 0xff))) { | |
934 | SMC_SELECT_BANK(3); | |
935 | s = inw(ioaddr + REVISION); | |
936 | return (s & 0xff); | |
937 | } | |
938 | ||
939 | if (width) { | |
4bbed523 DB |
940 | modconf_t mod = { |
941 | .Attributes = CONF_IO_CHANGE_WIDTH, | |
942 | }; | |
943 | printk(KERN_INFO "smc91c92_cs: using 8-bit IO window.\n"); | |
944 | ||
fba395ee DB |
945 | smc91c92_suspend(link); |
946 | pcmcia_modify_configuration(link, &mod); | |
947 | smc91c92_resume(link); | |
4bbed523 | 948 | return check_sig(link); |
1da177e4 LT |
949 | } |
950 | return -ENODEV; | |
951 | } | |
952 | ||
953 | /*====================================================================== | |
954 | ||
955 | smc91c92_config() is scheduled to run after a CARD_INSERTION event | |
956 | is received, to configure the PCMCIA socket, and to make the | |
957 | ethernet device available to the system. | |
958 | ||
959 | ======================================================================*/ | |
960 | ||
4c89e88b DB |
961 | #define CS_EXIT_TEST(ret, svc, label) \ |
962 | if (ret != 0) { \ | |
963 | cs_error(link, svc, ret); \ | |
964 | goto label; \ | |
965 | } | |
1da177e4 | 966 | |
15b99ac1 | 967 | static int smc91c92_config(struct pcmcia_device *link) |
1da177e4 | 968 | { |
1da177e4 LT |
969 | struct net_device *dev = link->priv; |
970 | struct smc_private *smc = netdev_priv(dev); | |
1da177e4 LT |
971 | char *name; |
972 | int i, j, rev; | |
906da809 | 973 | unsigned int ioaddr; |
1da177e4 LT |
974 | u_long mir; |
975 | ||
976 | DEBUG(0, "smc91c92_config(0x%p)\n", link); | |
977 | ||
efd50585 DB |
978 | smc->manfid = link->manf_id; |
979 | smc->cardid = link->card_id; | |
1da177e4 | 980 | |
1da177e4 LT |
981 | if ((smc->manfid == MANFID_OSITECH) && |
982 | (smc->cardid != PRODID_OSITECH_SEVEN)) { | |
983 | i = osi_config(link); | |
984 | } else if ((smc->manfid == MANFID_MOTOROLA) || | |
985 | ((smc->manfid == MANFID_MEGAHERTZ) && | |
986 | ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) || | |
987 | (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) { | |
988 | i = mhz_mfc_config(link); | |
989 | } else { | |
990 | i = smc_config(link); | |
991 | } | |
992 | CS_EXIT_TEST(i, RequestIO, config_failed); | |
993 | ||
fba395ee | 994 | i = pcmcia_request_irq(link, &link->irq); |
1da177e4 | 995 | CS_EXIT_TEST(i, RequestIRQ, config_failed); |
fba395ee | 996 | i = pcmcia_request_configuration(link, &link->conf); |
1da177e4 LT |
997 | CS_EXIT_TEST(i, RequestConfiguration, config_failed); |
998 | ||
999 | if (smc->manfid == MANFID_MOTOROLA) | |
1000 | mot_config(link); | |
1001 | ||
1002 | dev->irq = link->irq.AssignedIRQ; | |
1003 | ||
1004 | if ((if_port >= 0) && (if_port <= 2)) | |
1005 | dev->if_port = if_port; | |
1006 | else | |
1007 | printk(KERN_NOTICE "smc91c92_cs: invalid if_port requested\n"); | |
1008 | ||
1009 | switch (smc->manfid) { | |
1010 | case MANFID_OSITECH: | |
1011 | case MANFID_PSION: | |
1012 | i = osi_setup(link, smc->manfid, smc->cardid); break; | |
1013 | case MANFID_SMC: | |
1014 | case MANFID_NEW_MEDIA: | |
1015 | i = smc_setup(link); break; | |
1016 | case 0x128: /* For broken Megahertz cards */ | |
1017 | case MANFID_MEGAHERTZ: | |
1018 | i = mhz_setup(link); break; | |
1019 | case MANFID_MOTOROLA: | |
1020 | default: /* get the hw address from EEPROM */ | |
1021 | i = mot_setup(link); break; | |
1022 | } | |
1023 | ||
1024 | if (i != 0) { | |
1025 | printk(KERN_NOTICE "smc91c92_cs: Unable to find hardware address.\n"); | |
1026 | goto config_undo; | |
1027 | } | |
1028 | ||
1029 | smc->duplex = 0; | |
1030 | smc->rx_ovrn = 0; | |
1031 | ||
1032 | rev = check_sig(link); | |
1033 | name = "???"; | |
1034 | if (rev > 0) | |
1035 | switch (rev >> 4) { | |
1036 | case 3: name = "92"; break; | |
1037 | case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break; | |
1038 | case 5: name = "95"; break; | |
1039 | case 7: name = "100"; break; | |
1040 | case 8: name = "100-FD"; break; | |
1041 | case 9: name = "110"; break; | |
1042 | } | |
1043 | ||
1044 | ioaddr = dev->base_addr; | |
1045 | if (rev > 0) { | |
1046 | u_long mcr; | |
1047 | SMC_SELECT_BANK(0); | |
1048 | mir = inw(ioaddr + MEMINFO) & 0xff; | |
1049 | if (mir == 0xff) mir++; | |
1050 | /* Get scale factor for memory size */ | |
1051 | mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200; | |
1052 | mir *= 128 * (1<<((mcr >> 9) & 7)); | |
1053 | SMC_SELECT_BANK(1); | |
1054 | smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT; | |
1055 | smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC; | |
1056 | if (smc->manfid == MANFID_OSITECH) | |
1057 | smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0; | |
1058 | if ((rev >> 4) >= 7) | |
1059 | smc->cfg |= CFG_MII_SELECT; | |
1060 | } else | |
1061 | mir = 0; | |
1062 | ||
1063 | if (smc->cfg & CFG_MII_SELECT) { | |
1064 | SMC_SELECT_BANK(3); | |
1065 | ||
1066 | for (i = 0; i < 32; i++) { | |
1067 | j = mdio_read(dev, i, 1); | |
1068 | if ((j != 0) && (j != 0xffff)) break; | |
1069 | } | |
1070 | smc->mii_if.phy_id = (i < 32) ? i : -1; | |
1071 | ||
1072 | SMC_SELECT_BANK(0); | |
1073 | } | |
1074 | ||
fd238232 | 1075 | link->dev_node = &smc->node; |
fba395ee | 1076 | SET_NETDEV_DEV(dev, &handle_to_dev(link)); |
1da177e4 LT |
1077 | |
1078 | if (register_netdev(dev) != 0) { | |
1079 | printk(KERN_ERR "smc91c92_cs: register_netdev() failed\n"); | |
fd238232 | 1080 | link->dev_node = NULL; |
1da177e4 LT |
1081 | goto config_undo; |
1082 | } | |
1083 | ||
1084 | strcpy(smc->node.dev_name, dev->name); | |
1085 | ||
1086 | printk(KERN_INFO "%s: smc91c%s rev %d: io %#3lx, irq %d, " | |
e174961c | 1087 | "hw_addr %pM\n", |
0795af57 | 1088 | dev->name, name, (rev & 0x0f), dev->base_addr, dev->irq, |
e174961c | 1089 | dev->dev_addr); |
1da177e4 LT |
1090 | |
1091 | if (rev > 0) { | |
1092 | if (mir & 0x3ff) | |
1093 | printk(KERN_INFO " %lu byte", mir); | |
1094 | else | |
1095 | printk(KERN_INFO " %lu kb", mir>>10); | |
1096 | printk(" buffer, %s xcvr\n", (smc->cfg & CFG_MII_SELECT) ? | |
1097 | "MII" : if_names[dev->if_port]); | |
1098 | } | |
1099 | ||
1100 | if (smc->cfg & CFG_MII_SELECT) { | |
1101 | if (smc->mii_if.phy_id != -1) { | |
1102 | DEBUG(0, " MII transceiver at index %d, status %x.\n", | |
1103 | smc->mii_if.phy_id, j); | |
1104 | } else { | |
1105 | printk(KERN_NOTICE " No MII transceivers found!\n"); | |
1106 | } | |
1107 | } | |
15b99ac1 | 1108 | return 0; |
1da177e4 LT |
1109 | |
1110 | config_undo: | |
1111 | unregister_netdev(dev); | |
1112 | config_failed: /* CS_EXIT_TEST() calls jump to here... */ | |
1113 | smc91c92_release(link); | |
15b99ac1 | 1114 | return -ENODEV; |
1da177e4 LT |
1115 | } /* smc91c92_config */ |
1116 | ||
1117 | /*====================================================================== | |
1118 | ||
1119 | After a card is removed, smc91c92_release() will unregister the net | |
1120 | device, and release the PCMCIA configuration. If the device is | |
1121 | still open, this will be postponed until it is closed. | |
1122 | ||
1123 | ======================================================================*/ | |
1124 | ||
fba395ee | 1125 | static void smc91c92_release(struct pcmcia_device *link) |
1da177e4 | 1126 | { |
5f2a71fc DB |
1127 | DEBUG(0, "smc91c92_release(0x%p)\n", link); |
1128 | if (link->win) { | |
1129 | struct net_device *dev = link->priv; | |
1130 | struct smc_private *smc = netdev_priv(dev); | |
1131 | iounmap(smc->base); | |
1132 | } | |
fba395ee | 1133 | pcmcia_disable_device(link); |
1da177e4 LT |
1134 | } |
1135 | ||
1da177e4 LT |
1136 | /*====================================================================== |
1137 | ||
1138 | MII interface support for SMC91cXX based cards | |
1139 | ======================================================================*/ | |
1140 | ||
1141 | #define MDIO_SHIFT_CLK 0x04 | |
1142 | #define MDIO_DATA_OUT 0x01 | |
1143 | #define MDIO_DIR_WRITE 0x08 | |
1144 | #define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE) | |
1145 | #define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT) | |
1146 | #define MDIO_DATA_READ 0x02 | |
1147 | ||
906da809 | 1148 | static void mdio_sync(unsigned int addr) |
1da177e4 LT |
1149 | { |
1150 | int bits; | |
1151 | for (bits = 0; bits < 32; bits++) { | |
1152 | outb(MDIO_DATA_WRITE1, addr); | |
1153 | outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr); | |
1154 | } | |
1155 | } | |
1156 | ||
1157 | static int mdio_read(struct net_device *dev, int phy_id, int loc) | |
1158 | { | |
906da809 | 1159 | unsigned int addr = dev->base_addr + MGMT; |
1da177e4 LT |
1160 | u_int cmd = (0x06<<10)|(phy_id<<5)|loc; |
1161 | int i, retval = 0; | |
1162 | ||
1163 | mdio_sync(addr); | |
1164 | for (i = 13; i >= 0; i--) { | |
1165 | int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0; | |
1166 | outb(dat, addr); | |
1167 | outb(dat | MDIO_SHIFT_CLK, addr); | |
1168 | } | |
1169 | for (i = 19; i > 0; i--) { | |
1170 | outb(0, addr); | |
1171 | retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0); | |
1172 | outb(MDIO_SHIFT_CLK, addr); | |
1173 | } | |
1174 | return (retval>>1) & 0xffff; | |
1175 | } | |
1176 | ||
1177 | static void mdio_write(struct net_device *dev, int phy_id, int loc, int value) | |
1178 | { | |
906da809 | 1179 | unsigned int addr = dev->base_addr + MGMT; |
1da177e4 LT |
1180 | u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value; |
1181 | int i; | |
1182 | ||
1183 | mdio_sync(addr); | |
1184 | for (i = 31; i >= 0; i--) { | |
1185 | int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0; | |
1186 | outb(dat, addr); | |
1187 | outb(dat | MDIO_SHIFT_CLK, addr); | |
1188 | } | |
1189 | for (i = 1; i >= 0; i--) { | |
1190 | outb(0, addr); | |
1191 | outb(MDIO_SHIFT_CLK, addr); | |
1192 | } | |
1193 | } | |
1194 | ||
1195 | /*====================================================================== | |
1196 | ||
1197 | The driver core code, most of which should be common with a | |
1198 | non-PCMCIA implementation. | |
1199 | ||
1200 | ======================================================================*/ | |
1201 | ||
1202 | #ifdef PCMCIA_DEBUG | |
1203 | static void smc_dump(struct net_device *dev) | |
1204 | { | |
906da809 | 1205 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1206 | u_short i, w, save; |
1207 | save = inw(ioaddr + BANK_SELECT); | |
1208 | for (w = 0; w < 4; w++) { | |
1209 | SMC_SELECT_BANK(w); | |
1210 | printk(KERN_DEBUG "bank %d: ", w); | |
1211 | for (i = 0; i < 14; i += 2) | |
1212 | printk(" %04x", inw(ioaddr + i)); | |
1213 | printk("\n"); | |
1214 | } | |
1215 | outw(save, ioaddr + BANK_SELECT); | |
1216 | } | |
1217 | #endif | |
1218 | ||
1219 | static int smc_open(struct net_device *dev) | |
1220 | { | |
1221 | struct smc_private *smc = netdev_priv(dev); | |
fba395ee | 1222 | struct pcmcia_device *link = smc->p_dev; |
1da177e4 LT |
1223 | |
1224 | #ifdef PCMCIA_DEBUG | |
1225 | DEBUG(0, "%s: smc_open(%p), ID/Window %4.4x.\n", | |
1226 | dev->name, dev, inw(dev->base_addr + BANK_SELECT)); | |
1227 | if (pc_debug > 1) smc_dump(dev); | |
1228 | #endif | |
1229 | ||
1230 | /* Check that the PCMCIA card is still here. */ | |
9940ec36 | 1231 | if (!pcmcia_dev_present(link)) |
1da177e4 LT |
1232 | return -ENODEV; |
1233 | /* Physical device present signature. */ | |
1234 | if (check_sig(link) < 0) { | |
1235 | printk("smc91c92_cs: Yikes! Bad chip signature!\n"); | |
1236 | return -ENODEV; | |
1237 | } | |
1238 | link->open++; | |
1239 | ||
1240 | netif_start_queue(dev); | |
1241 | smc->saved_skb = NULL; | |
1242 | smc->packets_waiting = 0; | |
1243 | ||
1244 | smc_reset(dev); | |
1245 | init_timer(&smc->media); | |
1246 | smc->media.function = &media_check; | |
1247 | smc->media.data = (u_long) dev; | |
1248 | smc->media.expires = jiffies + HZ; | |
1249 | add_timer(&smc->media); | |
1250 | ||
1251 | return 0; | |
1252 | } /* smc_open */ | |
1253 | ||
1254 | /*====================================================================*/ | |
1255 | ||
1256 | static int smc_close(struct net_device *dev) | |
1257 | { | |
1258 | struct smc_private *smc = netdev_priv(dev); | |
fba395ee | 1259 | struct pcmcia_device *link = smc->p_dev; |
906da809 | 1260 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1261 | |
1262 | DEBUG(0, "%s: smc_close(), status %4.4x.\n", | |
1263 | dev->name, inw(ioaddr + BANK_SELECT)); | |
1264 | ||
1265 | netif_stop_queue(dev); | |
1266 | ||
1267 | /* Shut off all interrupts, and turn off the Tx and Rx sections. | |
1268 | Don't bother to check for chip present. */ | |
1269 | SMC_SELECT_BANK(2); /* Nominally paranoia, but do no assume... */ | |
1270 | outw(0, ioaddr + INTERRUPT); | |
1271 | SMC_SELECT_BANK(0); | |
1272 | mask_bits(0xff00, ioaddr + RCR); | |
1273 | mask_bits(0xff00, ioaddr + TCR); | |
1274 | ||
1275 | /* Put the chip into power-down mode. */ | |
1276 | SMC_SELECT_BANK(1); | |
1277 | outw(CTL_POWERDOWN, ioaddr + CONTROL ); | |
1278 | ||
1279 | link->open--; | |
1280 | del_timer_sync(&smc->media); | |
1281 | ||
1282 | return 0; | |
1283 | } /* smc_close */ | |
1284 | ||
1285 | /*====================================================================== | |
1286 | ||
1287 | Transfer a packet to the hardware and trigger the packet send. | |
1288 | This may be called at either from either the Tx queue code | |
1289 | or the interrupt handler. | |
1290 | ||
1291 | ======================================================================*/ | |
1292 | ||
1293 | static void smc_hardware_send_packet(struct net_device * dev) | |
1294 | { | |
1295 | struct smc_private *smc = netdev_priv(dev); | |
1296 | struct sk_buff *skb = smc->saved_skb; | |
906da809 | 1297 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1298 | u_char packet_no; |
1299 | ||
1300 | if (!skb) { | |
1301 | printk(KERN_ERR "%s: In XMIT with no packet to send.\n", dev->name); | |
1302 | return; | |
1303 | } | |
1304 | ||
1305 | /* There should be a packet slot waiting. */ | |
1306 | packet_no = inw(ioaddr + PNR_ARR) >> 8; | |
1307 | if (packet_no & 0x80) { | |
1308 | /* If not, there is a hardware problem! Likely an ejected card. */ | |
1309 | printk(KERN_WARNING "%s: 91c92 hardware Tx buffer allocation" | |
1310 | " failed, status %#2.2x.\n", dev->name, packet_no); | |
1311 | dev_kfree_skb_irq(skb); | |
1312 | smc->saved_skb = NULL; | |
1313 | netif_start_queue(dev); | |
1314 | return; | |
1315 | } | |
1316 | ||
6fb7298c | 1317 | dev->stats.tx_bytes += skb->len; |
1da177e4 LT |
1318 | /* The card should use the just-allocated buffer. */ |
1319 | outw(packet_no, ioaddr + PNR_ARR); | |
1320 | /* point to the beginning of the packet */ | |
1321 | outw(PTR_AUTOINC , ioaddr + POINTER); | |
1322 | ||
1323 | /* Send the packet length (+6 for status, length and ctl byte) | |
1324 | and the status word (set to zeros). */ | |
1325 | { | |
1326 | u_char *buf = skb->data; | |
1327 | u_int length = skb->len; /* The chip will pad to ethernet min. */ | |
1328 | ||
1329 | DEBUG(2, "%s: Trying to xmit packet of length %d.\n", | |
1330 | dev->name, length); | |
1331 | ||
1332 | /* send the packet length: +6 for status word, length, and ctl */ | |
1333 | outw(0, ioaddr + DATA_1); | |
1334 | outw(length + 6, ioaddr + DATA_1); | |
1335 | outsw(ioaddr + DATA_1, buf, length >> 1); | |
1336 | ||
1337 | /* The odd last byte, if there is one, goes in the control word. */ | |
1338 | outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1); | |
1339 | } | |
1340 | ||
1341 | /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */ | |
1342 | outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) | | |
1343 | (inw(ioaddr + INTERRUPT) & 0xff00), | |
1344 | ioaddr + INTERRUPT); | |
1345 | ||
1346 | /* The chip does the rest of the work. */ | |
1347 | outw(MC_ENQUEUE , ioaddr + MMU_CMD); | |
1348 | ||
1349 | smc->saved_skb = NULL; | |
1350 | dev_kfree_skb_irq(skb); | |
1351 | dev->trans_start = jiffies; | |
1352 | netif_start_queue(dev); | |
1353 | return; | |
1354 | } | |
1355 | ||
1356 | /*====================================================================*/ | |
1357 | ||
1358 | static void smc_tx_timeout(struct net_device *dev) | |
1359 | { | |
1360 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1361 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1362 | |
1363 | printk(KERN_NOTICE "%s: SMC91c92 transmit timed out, " | |
1364 | "Tx_status %2.2x status %4.4x.\n", | |
1365 | dev->name, inw(ioaddr)&0xff, inw(ioaddr + 2)); | |
6fb7298c | 1366 | dev->stats.tx_errors++; |
1da177e4 LT |
1367 | smc_reset(dev); |
1368 | dev->trans_start = jiffies; | |
1369 | smc->saved_skb = NULL; | |
1370 | netif_wake_queue(dev); | |
1371 | } | |
1372 | ||
1373 | static int smc_start_xmit(struct sk_buff *skb, struct net_device *dev) | |
1374 | { | |
1375 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1376 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1377 | u_short num_pages; |
1378 | short time_out, ir; | |
85e27831 | 1379 | unsigned long flags; |
1da177e4 LT |
1380 | |
1381 | netif_stop_queue(dev); | |
1382 | ||
1383 | DEBUG(2, "%s: smc_start_xmit(length = %d) called," | |
1384 | " status %4.4x.\n", dev->name, skb->len, inw(ioaddr + 2)); | |
1385 | ||
1386 | if (smc->saved_skb) { | |
1387 | /* THIS SHOULD NEVER HAPPEN. */ | |
6fb7298c | 1388 | dev->stats.tx_aborted_errors++; |
1da177e4 LT |
1389 | printk(KERN_DEBUG "%s: Internal error -- sent packet while busy.\n", |
1390 | dev->name); | |
5b548140 | 1391 | return NETDEV_TX_BUSY; |
1da177e4 LT |
1392 | } |
1393 | smc->saved_skb = skb; | |
1394 | ||
1395 | num_pages = skb->len >> 8; | |
1396 | ||
1397 | if (num_pages > 7) { | |
1398 | printk(KERN_ERR "%s: Far too big packet error.\n", dev->name); | |
1399 | dev_kfree_skb (skb); | |
1400 | smc->saved_skb = NULL; | |
6fb7298c | 1401 | dev->stats.tx_dropped++; |
6ed10654 | 1402 | return NETDEV_TX_OK; /* Do not re-queue this packet. */ |
1da177e4 LT |
1403 | } |
1404 | /* A packet is now waiting. */ | |
1405 | smc->packets_waiting++; | |
1406 | ||
85e27831 | 1407 | spin_lock_irqsave(&smc->lock, flags); |
1da177e4 LT |
1408 | SMC_SELECT_BANK(2); /* Paranoia, we should always be in window 2 */ |
1409 | ||
1410 | /* need MC_RESET to keep the memory consistent. errata? */ | |
1411 | if (smc->rx_ovrn) { | |
1412 | outw(MC_RESET, ioaddr + MMU_CMD); | |
1413 | smc->rx_ovrn = 0; | |
1414 | } | |
1415 | ||
1416 | /* Allocate the memory; send the packet now if we win. */ | |
1417 | outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD); | |
1418 | for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) { | |
1419 | ir = inw(ioaddr+INTERRUPT); | |
1420 | if (ir & IM_ALLOC_INT) { | |
1421 | /* Acknowledge the interrupt, send the packet. */ | |
1422 | outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT); | |
1423 | smc_hardware_send_packet(dev); /* Send the packet now.. */ | |
85e27831 | 1424 | spin_unlock_irqrestore(&smc->lock, flags); |
6ed10654 | 1425 | return NETDEV_TX_OK; |
1da177e4 LT |
1426 | } |
1427 | } | |
1428 | ||
1429 | /* Otherwise defer until the Tx-space-allocated interrupt. */ | |
1430 | DEBUG(2, "%s: memory allocation deferred.\n", dev->name); | |
1431 | outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT); | |
85e27831 | 1432 | spin_unlock_irqrestore(&smc->lock, flags); |
1da177e4 | 1433 | |
6ed10654 | 1434 | return NETDEV_TX_OK; |
1da177e4 LT |
1435 | } |
1436 | ||
1437 | /*====================================================================== | |
1438 | ||
1439 | Handle a Tx anomolous event. Entered while in Window 2. | |
1440 | ||
1441 | ======================================================================*/ | |
1442 | ||
1443 | static void smc_tx_err(struct net_device * dev) | |
1444 | { | |
1445 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1446 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1447 | int saved_packet = inw(ioaddr + PNR_ARR) & 0xff; |
1448 | int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f; | |
1449 | int tx_status; | |
1450 | ||
1451 | /* select this as the packet to read from */ | |
1452 | outw(packet_no, ioaddr + PNR_ARR); | |
1453 | ||
1454 | /* read the first word from this packet */ | |
1455 | outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER); | |
1456 | ||
1457 | tx_status = inw(ioaddr + DATA_1); | |
1458 | ||
6fb7298c SH |
1459 | dev->stats.tx_errors++; |
1460 | if (tx_status & TS_LOSTCAR) dev->stats.tx_carrier_errors++; | |
1461 | if (tx_status & TS_LATCOL) dev->stats.tx_window_errors++; | |
1da177e4 | 1462 | if (tx_status & TS_16COL) { |
6fb7298c | 1463 | dev->stats.tx_aborted_errors++; |
1da177e4 LT |
1464 | smc->tx_err++; |
1465 | } | |
1466 | ||
1467 | if (tx_status & TS_SUCCESS) { | |
1468 | printk(KERN_NOTICE "%s: Successful packet caused error " | |
1469 | "interrupt?\n", dev->name); | |
1470 | } | |
1471 | /* re-enable transmit */ | |
1472 | SMC_SELECT_BANK(0); | |
1473 | outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR); | |
1474 | SMC_SELECT_BANK(2); | |
1475 | ||
1476 | outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */ | |
1477 | ||
1478 | /* one less packet waiting for me */ | |
1479 | smc->packets_waiting--; | |
1480 | ||
1481 | outw(saved_packet, ioaddr + PNR_ARR); | |
1482 | return; | |
1483 | } | |
1484 | ||
1485 | /*====================================================================*/ | |
1486 | ||
1487 | static void smc_eph_irq(struct net_device *dev) | |
1488 | { | |
1489 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1490 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1491 | u_short card_stats, ephs; |
1492 | ||
1493 | SMC_SELECT_BANK(0); | |
1494 | ephs = inw(ioaddr + EPH); | |
1495 | DEBUG(2, "%s: Ethernet protocol handler interrupt, status" | |
1496 | " %4.4x.\n", dev->name, ephs); | |
1497 | /* Could be a counter roll-over warning: update stats. */ | |
1498 | card_stats = inw(ioaddr + COUNTER); | |
1499 | /* single collisions */ | |
6fb7298c | 1500 | dev->stats.collisions += card_stats & 0xF; |
1da177e4 LT |
1501 | card_stats >>= 4; |
1502 | /* multiple collisions */ | |
6fb7298c | 1503 | dev->stats.collisions += card_stats & 0xF; |
1da177e4 LT |
1504 | #if 0 /* These are for when linux supports these statistics */ |
1505 | card_stats >>= 4; /* deferred */ | |
1506 | card_stats >>= 4; /* excess deferred */ | |
1507 | #endif | |
1508 | /* If we had a transmit error we must re-enable the transmitter. */ | |
1509 | outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR); | |
1510 | ||
1511 | /* Clear a link error interrupt. */ | |
1512 | SMC_SELECT_BANK(1); | |
1513 | outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL); | |
1514 | outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE, | |
1515 | ioaddr + CONTROL); | |
1516 | SMC_SELECT_BANK(2); | |
1517 | } | |
1518 | ||
1519 | /*====================================================================*/ | |
1520 | ||
7d12e780 | 1521 | static irqreturn_t smc_interrupt(int irq, void *dev_id) |
1da177e4 LT |
1522 | { |
1523 | struct net_device *dev = dev_id; | |
1524 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1525 | unsigned int ioaddr; |
1da177e4 LT |
1526 | u_short saved_bank, saved_pointer, mask, status; |
1527 | unsigned int handled = 1; | |
1528 | char bogus_cnt = INTR_WORK; /* Work we are willing to do. */ | |
1529 | ||
1530 | if (!netif_device_present(dev)) | |
1531 | return IRQ_NONE; | |
1532 | ||
1533 | ioaddr = dev->base_addr; | |
1534 | ||
1535 | DEBUG(3, "%s: SMC91c92 interrupt %d at %#x.\n", dev->name, | |
1536 | irq, ioaddr); | |
1537 | ||
85e27831 | 1538 | spin_lock(&smc->lock); |
1da177e4 LT |
1539 | smc->watchdog = 0; |
1540 | saved_bank = inw(ioaddr + BANK_SELECT); | |
1541 | if ((saved_bank & 0xff00) != 0x3300) { | |
1542 | /* The device does not exist -- the card could be off-line, or | |
1543 | maybe it has been ejected. */ | |
1544 | DEBUG(1, "%s: SMC91c92 interrupt %d for non-existent" | |
1545 | "/ejected device.\n", dev->name, irq); | |
1546 | handled = 0; | |
1547 | goto irq_done; | |
1548 | } | |
1549 | ||
1550 | SMC_SELECT_BANK(2); | |
1551 | saved_pointer = inw(ioaddr + POINTER); | |
1552 | mask = inw(ioaddr + INTERRUPT) >> 8; | |
1553 | /* clear all interrupts */ | |
1554 | outw(0, ioaddr + INTERRUPT); | |
1555 | ||
1556 | do { /* read the status flag, and mask it */ | |
1557 | status = inw(ioaddr + INTERRUPT) & 0xff; | |
1558 | DEBUG(3, "%s: Status is %#2.2x (mask %#2.2x).\n", dev->name, | |
1559 | status, mask); | |
1560 | if ((status & mask) == 0) { | |
1561 | if (bogus_cnt == INTR_WORK) | |
1562 | handled = 0; | |
1563 | break; | |
1564 | } | |
1565 | if (status & IM_RCV_INT) { | |
1566 | /* Got a packet(s). */ | |
1567 | smc_rx(dev); | |
1568 | } | |
1569 | if (status & IM_TX_INT) { | |
1570 | smc_tx_err(dev); | |
1571 | outw(IM_TX_INT, ioaddr + INTERRUPT); | |
1572 | } | |
1573 | status &= mask; | |
1574 | if (status & IM_TX_EMPTY_INT) { | |
1575 | outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT); | |
1576 | mask &= ~IM_TX_EMPTY_INT; | |
6fb7298c | 1577 | dev->stats.tx_packets += smc->packets_waiting; |
1da177e4 LT |
1578 | smc->packets_waiting = 0; |
1579 | } | |
1580 | if (status & IM_ALLOC_INT) { | |
1581 | /* Clear this interrupt so it doesn't happen again */ | |
1582 | mask &= ~IM_ALLOC_INT; | |
1583 | ||
1584 | smc_hardware_send_packet(dev); | |
1585 | ||
1586 | /* enable xmit interrupts based on this */ | |
1587 | mask |= (IM_TX_EMPTY_INT | IM_TX_INT); | |
1588 | ||
1589 | /* and let the card send more packets to me */ | |
1590 | netif_wake_queue(dev); | |
1591 | } | |
1592 | if (status & IM_RX_OVRN_INT) { | |
6fb7298c SH |
1593 | dev->stats.rx_errors++; |
1594 | dev->stats.rx_fifo_errors++; | |
1da177e4 LT |
1595 | if (smc->duplex) |
1596 | smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */ | |
1597 | outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT); | |
1598 | } | |
1599 | if (status & IM_EPH_INT) | |
1600 | smc_eph_irq(dev); | |
1601 | } while (--bogus_cnt); | |
1602 | ||
1603 | DEBUG(3, " Restoring saved registers mask %2.2x bank %4.4x" | |
1604 | " pointer %4.4x.\n", mask, saved_bank, saved_pointer); | |
1605 | ||
1606 | /* restore state register */ | |
1607 | outw((mask<<8), ioaddr + INTERRUPT); | |
1608 | outw(saved_pointer, ioaddr + POINTER); | |
1609 | SMC_SELECT_BANK(saved_bank); | |
1610 | ||
1611 | DEBUG(3, "%s: Exiting interrupt IRQ%d.\n", dev->name, irq); | |
1612 | ||
1613 | irq_done: | |
1614 | ||
1615 | if ((smc->manfid == MANFID_OSITECH) && | |
1616 | (smc->cardid != PRODID_OSITECH_SEVEN)) { | |
1617 | /* Retrigger interrupt if needed */ | |
1618 | mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR); | |
1619 | set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR); | |
1620 | } | |
1621 | if (smc->manfid == MANFID_MOTOROLA) { | |
1622 | u_char cor; | |
1623 | cor = readb(smc->base + MOT_UART + CISREG_COR); | |
1624 | writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR); | |
1625 | writeb(cor, smc->base + MOT_UART + CISREG_COR); | |
1626 | cor = readb(smc->base + MOT_LAN + CISREG_COR); | |
1627 | writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR); | |
1628 | writeb(cor, smc->base + MOT_LAN + CISREG_COR); | |
1629 | } | |
1630 | #ifdef DOES_NOT_WORK | |
1631 | if (smc->base != NULL) { /* Megahertz MFC's */ | |
1632 | readb(smc->base+MEGAHERTZ_ISR); | |
1633 | readb(smc->base+MEGAHERTZ_ISR); | |
1634 | } | |
1635 | #endif | |
85e27831 | 1636 | spin_unlock(&smc->lock); |
1da177e4 LT |
1637 | return IRQ_RETVAL(handled); |
1638 | } | |
1639 | ||
1640 | /*====================================================================*/ | |
1641 | ||
1642 | static void smc_rx(struct net_device *dev) | |
1643 | { | |
906da809 | 1644 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1645 | int rx_status; |
1646 | int packet_length; /* Caution: not frame length, rather words | |
1647 | to transfer from the chip. */ | |
1648 | ||
1649 | /* Assertion: we are in Window 2. */ | |
1650 | ||
1651 | if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) { | |
1652 | printk(KERN_ERR "%s: smc_rx() with nothing on Rx FIFO.\n", | |
1653 | dev->name); | |
1654 | return; | |
1655 | } | |
1656 | ||
1657 | /* Reset the read pointer, and read the status and packet length. */ | |
1658 | outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER); | |
1659 | rx_status = inw(ioaddr + DATA_1); | |
1660 | packet_length = inw(ioaddr + DATA_1) & 0x07ff; | |
1661 | ||
1662 | DEBUG(2, "%s: Receive status %4.4x length %d.\n", | |
1663 | dev->name, rx_status, packet_length); | |
1664 | ||
1665 | if (!(rx_status & RS_ERRORS)) { | |
1666 | /* do stuff to make a new packet */ | |
1667 | struct sk_buff *skb; | |
1668 | ||
1669 | /* Note: packet_length adds 5 or 6 extra bytes here! */ | |
1670 | skb = dev_alloc_skb(packet_length+2); | |
1671 | ||
1672 | if (skb == NULL) { | |
1673 | DEBUG(1, "%s: Low memory, packet dropped.\n", dev->name); | |
6fb7298c | 1674 | dev->stats.rx_dropped++; |
1da177e4 LT |
1675 | outw(MC_RELEASE, ioaddr + MMU_CMD); |
1676 | return; | |
1677 | } | |
1678 | ||
1679 | packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6); | |
1680 | skb_reserve(skb, 2); | |
1681 | insw(ioaddr+DATA_1, skb_put(skb, packet_length), | |
1682 | (packet_length+1)>>1); | |
1683 | skb->protocol = eth_type_trans(skb, dev); | |
1684 | ||
1da177e4 LT |
1685 | netif_rx(skb); |
1686 | dev->last_rx = jiffies; | |
6fb7298c SH |
1687 | dev->stats.rx_packets++; |
1688 | dev->stats.rx_bytes += packet_length; | |
1da177e4 | 1689 | if (rx_status & RS_MULTICAST) |
6fb7298c | 1690 | dev->stats.multicast++; |
1da177e4 LT |
1691 | } else { |
1692 | /* error ... */ | |
6fb7298c | 1693 | dev->stats.rx_errors++; |
1da177e4 | 1694 | |
6fb7298c | 1695 | if (rx_status & RS_ALGNERR) dev->stats.rx_frame_errors++; |
1da177e4 | 1696 | if (rx_status & (RS_TOOSHORT | RS_TOOLONG)) |
6fb7298c SH |
1697 | dev->stats.rx_length_errors++; |
1698 | if (rx_status & RS_BADCRC) dev->stats.rx_crc_errors++; | |
1da177e4 LT |
1699 | } |
1700 | /* Let the MMU free the memory of this packet. */ | |
1701 | outw(MC_RELEASE, ioaddr + MMU_CMD); | |
1702 | ||
1703 | return; | |
1704 | } | |
1705 | ||
1da177e4 LT |
1706 | /*====================================================================== |
1707 | ||
1708 | Calculate values for the hardware multicast filter hash table. | |
1709 | ||
1710 | ======================================================================*/ | |
1711 | ||
1712 | static void fill_multicast_tbl(int count, struct dev_mc_list *addrs, | |
1713 | u_char *multicast_table) | |
1714 | { | |
1715 | struct dev_mc_list *mc_addr; | |
1716 | ||
bb53d6d0 | 1717 | for (mc_addr = addrs; mc_addr && count-- > 0; mc_addr = mc_addr->next) { |
1da177e4 LT |
1718 | u_int position = ether_crc(6, mc_addr->dmi_addr); |
1719 | #ifndef final_version /* Verify multicast address. */ | |
1720 | if ((mc_addr->dmi_addr[0] & 1) == 0) | |
1721 | continue; | |
1722 | #endif | |
1723 | multicast_table[position >> 29] |= 1 << ((position >> 26) & 7); | |
1724 | } | |
1725 | } | |
1726 | ||
1727 | /*====================================================================== | |
1728 | ||
1729 | Set the receive mode. | |
1730 | ||
1731 | This routine is used by both the protocol level to notify us of | |
1732 | promiscuous/multicast mode changes, and by the open/reset code to | |
1733 | initialize the Rx registers. We always set the multicast list and | |
1734 | leave the receiver running. | |
1735 | ||
1736 | ======================================================================*/ | |
1737 | ||
1738 | static void set_rx_mode(struct net_device *dev) | |
1739 | { | |
906da809 | 1740 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1741 | struct smc_private *smc = netdev_priv(dev); |
1742 | u_int multicast_table[ 2 ] = { 0, }; | |
1743 | unsigned long flags; | |
1744 | u_short rx_cfg_setting; | |
1745 | ||
1746 | if (dev->flags & IFF_PROMISC) { | |
1da177e4 LT |
1747 | rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti; |
1748 | } else if (dev->flags & IFF_ALLMULTI) | |
1749 | rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti; | |
1750 | else { | |
1751 | if (dev->mc_count) { | |
1752 | fill_multicast_tbl(dev->mc_count, dev->mc_list, | |
1753 | (u_char *)multicast_table); | |
1754 | } | |
1755 | rx_cfg_setting = RxStripCRC | RxEnable; | |
1756 | } | |
1757 | ||
1758 | /* Load MC table and Rx setting into the chip without interrupts. */ | |
1759 | spin_lock_irqsave(&smc->lock, flags); | |
1760 | SMC_SELECT_BANK(3); | |
1761 | outl(multicast_table[0], ioaddr + MULTICAST0); | |
1762 | outl(multicast_table[1], ioaddr + MULTICAST4); | |
1763 | SMC_SELECT_BANK(0); | |
1764 | outw(rx_cfg_setting, ioaddr + RCR); | |
1765 | SMC_SELECT_BANK(2); | |
1766 | spin_unlock_irqrestore(&smc->lock, flags); | |
1767 | ||
1768 | return; | |
1769 | } | |
1770 | ||
1771 | /*====================================================================== | |
1772 | ||
1773 | Senses when a card's config changes. Here, it's coax or TP. | |
1774 | ||
1775 | ======================================================================*/ | |
1776 | ||
1777 | static int s9k_config(struct net_device *dev, struct ifmap *map) | |
1778 | { | |
1779 | struct smc_private *smc = netdev_priv(dev); | |
1780 | if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) { | |
1781 | if (smc->cfg & CFG_MII_SELECT) | |
1782 | return -EOPNOTSUPP; | |
1783 | else if (map->port > 2) | |
1784 | return -EINVAL; | |
1785 | dev->if_port = map->port; | |
1786 | printk(KERN_INFO "%s: switched to %s port\n", | |
1787 | dev->name, if_names[dev->if_port]); | |
1788 | smc_reset(dev); | |
1789 | } | |
1790 | return 0; | |
1791 | } | |
1792 | ||
1793 | /*====================================================================== | |
1794 | ||
1795 | Reset the chip, reloading every register that might be corrupted. | |
1796 | ||
1797 | ======================================================================*/ | |
1798 | ||
1799 | /* | |
1800 | Set transceiver type, perhaps to something other than what the user | |
1801 | specified in dev->if_port. | |
1802 | */ | |
1803 | static void smc_set_xcvr(struct net_device *dev, int if_port) | |
1804 | { | |
1805 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1806 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1807 | u_short saved_bank; |
1808 | ||
1809 | saved_bank = inw(ioaddr + BANK_SELECT); | |
1810 | SMC_SELECT_BANK(1); | |
1811 | if (if_port == 2) { | |
1812 | outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG); | |
1813 | if ((smc->manfid == MANFID_OSITECH) && | |
1814 | (smc->cardid != PRODID_OSITECH_SEVEN)) | |
1815 | set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR); | |
1816 | smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002); | |
1817 | } else { | |
1818 | outw(smc->cfg, ioaddr + CONFIG); | |
1819 | if ((smc->manfid == MANFID_OSITECH) && | |
1820 | (smc->cardid != PRODID_OSITECH_SEVEN)) | |
1821 | mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR); | |
1822 | smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001); | |
1823 | } | |
1824 | SMC_SELECT_BANK(saved_bank); | |
1825 | } | |
1826 | ||
1827 | static void smc_reset(struct net_device *dev) | |
1828 | { | |
906da809 | 1829 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1830 | struct smc_private *smc = netdev_priv(dev); |
1831 | int i; | |
1832 | ||
1833 | DEBUG(0, "%s: smc91c92 reset called.\n", dev->name); | |
1834 | ||
1835 | /* The first interaction must be a write to bring the chip out | |
1836 | of sleep mode. */ | |
1837 | SMC_SELECT_BANK(0); | |
1838 | /* Reset the chip. */ | |
1839 | outw(RCR_SOFTRESET, ioaddr + RCR); | |
1840 | udelay(10); | |
1841 | ||
1842 | /* Clear the transmit and receive configuration registers. */ | |
1843 | outw(RCR_CLEAR, ioaddr + RCR); | |
1844 | outw(TCR_CLEAR, ioaddr + TCR); | |
1845 | ||
1846 | /* Set the Window 1 control, configuration and station addr registers. | |
1847 | No point in writing the I/O base register ;-> */ | |
1848 | SMC_SELECT_BANK(1); | |
d6e05edc | 1849 | /* Automatically release successfully transmitted packets, |
1da177e4 LT |
1850 | Accept link errors, counter and Tx error interrupts. */ |
1851 | outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE, | |
1852 | ioaddr + CONTROL); | |
1853 | smc_set_xcvr(dev, dev->if_port); | |
1854 | if ((smc->manfid == MANFID_OSITECH) && | |
1855 | (smc->cardid != PRODID_OSITECH_SEVEN)) | |
1856 | outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) | | |
1857 | (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00), | |
1858 | ioaddr - 0x10 + OSITECH_AUI_PWR); | |
1859 | ||
1860 | /* Fill in the physical address. The databook is wrong about the order! */ | |
1861 | for (i = 0; i < 6; i += 2) | |
1862 | outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i], | |
1863 | ioaddr + ADDR0 + i); | |
1864 | ||
1865 | /* Reset the MMU */ | |
1866 | SMC_SELECT_BANK(2); | |
1867 | outw(MC_RESET, ioaddr + MMU_CMD); | |
1868 | outw(0, ioaddr + INTERRUPT); | |
1869 | ||
1870 | /* Re-enable the chip. */ | |
1871 | SMC_SELECT_BANK(0); | |
1872 | outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) | | |
1873 | TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR); | |
1874 | set_rx_mode(dev); | |
1875 | ||
1876 | if (smc->cfg & CFG_MII_SELECT) { | |
1877 | SMC_SELECT_BANK(3); | |
1878 | ||
1879 | /* Reset MII */ | |
1880 | mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000); | |
1881 | ||
1882 | /* Advertise 100F, 100H, 10F, 10H */ | |
1883 | mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1); | |
1884 | ||
1885 | /* Restart MII autonegotiation */ | |
1886 | mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000); | |
1887 | mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200); | |
1888 | } | |
1889 | ||
1890 | /* Enable interrupts. */ | |
1891 | SMC_SELECT_BANK(2); | |
1892 | outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8, | |
1893 | ioaddr + INTERRUPT); | |
1894 | } | |
1895 | ||
1896 | /*====================================================================== | |
1897 | ||
1898 | Media selection timer routine | |
1899 | ||
1900 | ======================================================================*/ | |
1901 | ||
1902 | static void media_check(u_long arg) | |
1903 | { | |
1904 | struct net_device *dev = (struct net_device *) arg; | |
1905 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1906 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1907 | u_short i, media, saved_bank; |
1908 | u_short link; | |
85e27831 K |
1909 | unsigned long flags; |
1910 | ||
1911 | spin_lock_irqsave(&smc->lock, flags); | |
1da177e4 LT |
1912 | |
1913 | saved_bank = inw(ioaddr + BANK_SELECT); | |
1914 | ||
1915 | if (!netif_device_present(dev)) | |
1916 | goto reschedule; | |
1917 | ||
1918 | SMC_SELECT_BANK(2); | |
1919 | ||
1920 | /* need MC_RESET to keep the memory consistent. errata? */ | |
1921 | if (smc->rx_ovrn) { | |
1922 | outw(MC_RESET, ioaddr + MMU_CMD); | |
1923 | smc->rx_ovrn = 0; | |
1924 | } | |
1925 | i = inw(ioaddr + INTERRUPT); | |
1926 | SMC_SELECT_BANK(0); | |
1927 | media = inw(ioaddr + EPH) & EPH_LINK_OK; | |
1928 | SMC_SELECT_BANK(1); | |
1929 | media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1; | |
1930 | ||
1931 | /* Check for pending interrupt with watchdog flag set: with | |
1932 | this, we can limp along even if the interrupt is blocked */ | |
1933 | if (smc->watchdog++ && ((i>>8) & i)) { | |
1934 | if (!smc->fast_poll) | |
1935 | printk(KERN_INFO "%s: interrupt(s) dropped!\n", dev->name); | |
e363d138 | 1936 | smc_interrupt(dev->irq, dev); |
1da177e4 LT |
1937 | smc->fast_poll = HZ; |
1938 | } | |
1939 | if (smc->fast_poll) { | |
1940 | smc->fast_poll--; | |
1941 | smc->media.expires = jiffies + HZ/100; | |
1942 | add_timer(&smc->media); | |
1943 | SMC_SELECT_BANK(saved_bank); | |
85e27831 | 1944 | spin_unlock_irqrestore(&smc->lock, flags); |
1da177e4 LT |
1945 | return; |
1946 | } | |
1947 | ||
1948 | if (smc->cfg & CFG_MII_SELECT) { | |
1949 | if (smc->mii_if.phy_id < 0) | |
1950 | goto reschedule; | |
1951 | ||
1952 | SMC_SELECT_BANK(3); | |
1953 | link = mdio_read(dev, smc->mii_if.phy_id, 1); | |
1954 | if (!link || (link == 0xffff)) { | |
1955 | printk(KERN_INFO "%s: MII is missing!\n", dev->name); | |
1956 | smc->mii_if.phy_id = -1; | |
1957 | goto reschedule; | |
1958 | } | |
1959 | ||
1960 | link &= 0x0004; | |
1961 | if (link != smc->link_status) { | |
1962 | u_short p = mdio_read(dev, smc->mii_if.phy_id, 5); | |
1963 | printk(KERN_INFO "%s: %s link beat\n", dev->name, | |
1964 | (link) ? "found" : "lost"); | |
1965 | smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40)) | |
1966 | ? TCR_FDUPLX : 0); | |
1967 | if (link) { | |
1968 | printk(KERN_INFO "%s: autonegotiation complete: " | |
1969 | "%sbaseT-%cD selected\n", dev->name, | |
1970 | ((p & 0x0180) ? "100" : "10"), | |
1971 | (smc->duplex ? 'F' : 'H')); | |
1972 | } | |
1973 | SMC_SELECT_BANK(0); | |
1974 | outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR); | |
1975 | smc->link_status = link; | |
1976 | } | |
1977 | goto reschedule; | |
1978 | } | |
1979 | ||
1980 | /* Ignore collisions unless we've had no rx's recently */ | |
4851d3aa | 1981 | if (time_after(jiffies, dev->last_rx + HZ)) { |
1da177e4 LT |
1982 | if (smc->tx_err || (smc->media_status & EPH_16COL)) |
1983 | media |= EPH_16COL; | |
1984 | } | |
1985 | smc->tx_err = 0; | |
1986 | ||
1987 | if (media != smc->media_status) { | |
1988 | if ((media & smc->media_status & 1) && | |
1989 | ((smc->media_status ^ media) & EPH_LINK_OK)) | |
1990 | printk(KERN_INFO "%s: %s link beat\n", dev->name, | |
1991 | (smc->media_status & EPH_LINK_OK ? "lost" : "found")); | |
1992 | else if ((media & smc->media_status & 2) && | |
1993 | ((smc->media_status ^ media) & EPH_16COL)) | |
1994 | printk(KERN_INFO "%s: coax cable %s\n", dev->name, | |
1995 | (media & EPH_16COL ? "problem" : "ok")); | |
1996 | if (dev->if_port == 0) { | |
1997 | if (media & 1) { | |
1998 | if (media & EPH_LINK_OK) | |
1999 | printk(KERN_INFO "%s: flipped to 10baseT\n", | |
2000 | dev->name); | |
2001 | else | |
2002 | smc_set_xcvr(dev, 2); | |
2003 | } else { | |
2004 | if (media & EPH_16COL) | |
2005 | smc_set_xcvr(dev, 1); | |
2006 | else | |
2007 | printk(KERN_INFO "%s: flipped to 10base2\n", | |
2008 | dev->name); | |
2009 | } | |
2010 | } | |
2011 | smc->media_status = media; | |
2012 | } | |
2013 | ||
2014 | reschedule: | |
2015 | smc->media.expires = jiffies + HZ; | |
2016 | add_timer(&smc->media); | |
2017 | SMC_SELECT_BANK(saved_bank); | |
85e27831 | 2018 | spin_unlock_irqrestore(&smc->lock, flags); |
1da177e4 LT |
2019 | } |
2020 | ||
2021 | static int smc_link_ok(struct net_device *dev) | |
2022 | { | |
906da809 | 2023 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
2024 | struct smc_private *smc = netdev_priv(dev); |
2025 | ||
2026 | if (smc->cfg & CFG_MII_SELECT) { | |
2027 | return mii_link_ok(&smc->mii_if); | |
2028 | } else { | |
2029 | SMC_SELECT_BANK(0); | |
2030 | return inw(ioaddr + EPH) & EPH_LINK_OK; | |
2031 | } | |
2032 | } | |
2033 | ||
2034 | static int smc_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd) | |
2035 | { | |
2036 | u16 tmp; | |
906da809 | 2037 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
2038 | |
2039 | ecmd->supported = (SUPPORTED_TP | SUPPORTED_AUI | | |
2040 | SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full); | |
2041 | ||
2042 | SMC_SELECT_BANK(1); | |
2043 | tmp = inw(ioaddr + CONFIG); | |
2044 | ecmd->port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP; | |
2045 | ecmd->transceiver = XCVR_INTERNAL; | |
2046 | ecmd->speed = SPEED_10; | |
2047 | ecmd->phy_address = ioaddr + MGMT; | |
2048 | ||
2049 | SMC_SELECT_BANK(0); | |
2050 | tmp = inw(ioaddr + TCR); | |
2051 | ecmd->duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF; | |
2052 | ||
2053 | return 0; | |
2054 | } | |
2055 | ||
2056 | static int smc_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd) | |
2057 | { | |
2058 | u16 tmp; | |
906da809 | 2059 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
2060 | |
2061 | if (ecmd->speed != SPEED_10) | |
2062 | return -EINVAL; | |
2063 | if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL) | |
2064 | return -EINVAL; | |
2065 | if (ecmd->port != PORT_TP && ecmd->port != PORT_AUI) | |
2066 | return -EINVAL; | |
2067 | if (ecmd->transceiver != XCVR_INTERNAL) | |
2068 | return -EINVAL; | |
2069 | ||
2070 | if (ecmd->port == PORT_AUI) | |
2071 | smc_set_xcvr(dev, 1); | |
2072 | else | |
2073 | smc_set_xcvr(dev, 0); | |
2074 | ||
2075 | SMC_SELECT_BANK(0); | |
2076 | tmp = inw(ioaddr + TCR); | |
2077 | if (ecmd->duplex == DUPLEX_FULL) | |
2078 | tmp |= TCR_FDUPLX; | |
2079 | else | |
2080 | tmp &= ~TCR_FDUPLX; | |
2081 | outw(tmp, ioaddr + TCR); | |
2082 | ||
2083 | return 0; | |
2084 | } | |
2085 | ||
2086 | static int check_if_running(struct net_device *dev) | |
2087 | { | |
2088 | if (!netif_running(dev)) | |
2089 | return -EINVAL; | |
2090 | return 0; | |
2091 | } | |
2092 | ||
2093 | static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) | |
2094 | { | |
2095 | strcpy(info->driver, DRV_NAME); | |
2096 | strcpy(info->version, DRV_VERSION); | |
2097 | } | |
2098 | ||
2099 | static int smc_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | |
2100 | { | |
2101 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 2102 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
2103 | u16 saved_bank = inw(ioaddr + BANK_SELECT); |
2104 | int ret; | |
2105 | ||
1da177e4 | 2106 | spin_lock_irq(&smc->lock); |
85e27831 | 2107 | SMC_SELECT_BANK(3); |
1da177e4 LT |
2108 | if (smc->cfg & CFG_MII_SELECT) |
2109 | ret = mii_ethtool_gset(&smc->mii_if, ecmd); | |
2110 | else | |
2111 | ret = smc_netdev_get_ecmd(dev, ecmd); | |
1da177e4 | 2112 | SMC_SELECT_BANK(saved_bank); |
85e27831 | 2113 | spin_unlock_irq(&smc->lock); |
1da177e4 LT |
2114 | return ret; |
2115 | } | |
2116 | ||
2117 | static int smc_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | |
2118 | { | |
2119 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 2120 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
2121 | u16 saved_bank = inw(ioaddr + BANK_SELECT); |
2122 | int ret; | |
2123 | ||
1da177e4 | 2124 | spin_lock_irq(&smc->lock); |
85e27831 | 2125 | SMC_SELECT_BANK(3); |
1da177e4 LT |
2126 | if (smc->cfg & CFG_MII_SELECT) |
2127 | ret = mii_ethtool_sset(&smc->mii_if, ecmd); | |
2128 | else | |
2129 | ret = smc_netdev_set_ecmd(dev, ecmd); | |
1da177e4 | 2130 | SMC_SELECT_BANK(saved_bank); |
85e27831 | 2131 | spin_unlock_irq(&smc->lock); |
1da177e4 LT |
2132 | return ret; |
2133 | } | |
2134 | ||
2135 | static u32 smc_get_link(struct net_device *dev) | |
2136 | { | |
2137 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 2138 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
2139 | u16 saved_bank = inw(ioaddr + BANK_SELECT); |
2140 | u32 ret; | |
2141 | ||
1da177e4 | 2142 | spin_lock_irq(&smc->lock); |
85e27831 | 2143 | SMC_SELECT_BANK(3); |
1da177e4 | 2144 | ret = smc_link_ok(dev); |
1da177e4 | 2145 | SMC_SELECT_BANK(saved_bank); |
85e27831 | 2146 | spin_unlock_irq(&smc->lock); |
1da177e4 LT |
2147 | return ret; |
2148 | } | |
2149 | ||
2150 | #ifdef PCMCIA_DEBUG | |
2151 | static u32 smc_get_msglevel(struct net_device *dev) | |
2152 | { | |
2153 | return pc_debug; | |
2154 | } | |
2155 | ||
2156 | static void smc_set_msglevel(struct net_device *dev, u32 val) | |
2157 | { | |
2158 | pc_debug = val; | |
2159 | } | |
2160 | #endif | |
2161 | ||
2162 | static int smc_nway_reset(struct net_device *dev) | |
2163 | { | |
2164 | struct smc_private *smc = netdev_priv(dev); | |
2165 | if (smc->cfg & CFG_MII_SELECT) { | |
906da809 | 2166 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
2167 | u16 saved_bank = inw(ioaddr + BANK_SELECT); |
2168 | int res; | |
2169 | ||
2170 | SMC_SELECT_BANK(3); | |
2171 | res = mii_nway_restart(&smc->mii_if); | |
2172 | SMC_SELECT_BANK(saved_bank); | |
2173 | ||
2174 | return res; | |
2175 | } else | |
2176 | return -EOPNOTSUPP; | |
2177 | } | |
2178 | ||
7282d491 | 2179 | static const struct ethtool_ops ethtool_ops = { |
1da177e4 LT |
2180 | .begin = check_if_running, |
2181 | .get_drvinfo = smc_get_drvinfo, | |
2182 | .get_settings = smc_get_settings, | |
2183 | .set_settings = smc_set_settings, | |
2184 | .get_link = smc_get_link, | |
2185 | #ifdef PCMCIA_DEBUG | |
2186 | .get_msglevel = smc_get_msglevel, | |
2187 | .set_msglevel = smc_set_msglevel, | |
2188 | #endif | |
2189 | .nway_reset = smc_nway_reset, | |
2190 | }; | |
2191 | ||
2192 | static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd) | |
2193 | { | |
2194 | struct smc_private *smc = netdev_priv(dev); | |
2195 | struct mii_ioctl_data *mii = if_mii(rq); | |
2196 | int rc = 0; | |
2197 | u16 saved_bank; | |
906da809 | 2198 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
2199 | |
2200 | if (!netif_running(dev)) | |
2201 | return -EINVAL; | |
2202 | ||
2203 | spin_lock_irq(&smc->lock); | |
2204 | saved_bank = inw(ioaddr + BANK_SELECT); | |
2205 | SMC_SELECT_BANK(3); | |
2206 | rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL); | |
2207 | SMC_SELECT_BANK(saved_bank); | |
2208 | spin_unlock_irq(&smc->lock); | |
2209 | return rc; | |
2210 | } | |
2211 | ||
5c672220 DB |
2212 | static struct pcmcia_device_id smc91c92_ids[] = { |
2213 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501), | |
2214 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a), | |
2215 | PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63), | |
2216 | PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63), | |
2217 | PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef), | |
2218 | PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef), | |
2219 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c), | |
2220 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e), | |
d277ad0e K |
2221 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9), |
2222 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed), | |
5c672220 DB |
2223 | PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020), |
2224 | PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023), | |
2225 | PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb), | |
2226 | PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc), | |
2227 | PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1), | |
2228 | PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5), | |
2229 | PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9), | |
2230 | PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953), | |
2231 | PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a), | |
d277ad0e K |
2232 | PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314), |
2233 | PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a), | |
5c672220 DB |
2234 | PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc), |
2235 | PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9), | |
2236 | PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d), | |
2237 | /* These conflict with other cards! */ | |
2238 | /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */ | |
2239 | /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */ | |
2240 | PCMCIA_DEVICE_NULL, | |
2241 | }; | |
2242 | MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids); | |
2243 | ||
1da177e4 LT |
2244 | static struct pcmcia_driver smc91c92_cs_driver = { |
2245 | .owner = THIS_MODULE, | |
2246 | .drv = { | |
2247 | .name = "smc91c92_cs", | |
2248 | }, | |
15b99ac1 | 2249 | .probe = smc91c92_probe, |
cc3b4866 | 2250 | .remove = smc91c92_detach, |
5c672220 | 2251 | .id_table = smc91c92_ids, |
98e4c28b DB |
2252 | .suspend = smc91c92_suspend, |
2253 | .resume = smc91c92_resume, | |
1da177e4 LT |
2254 | }; |
2255 | ||
2256 | static int __init init_smc91c92_cs(void) | |
2257 | { | |
2258 | return pcmcia_register_driver(&smc91c92_cs_driver); | |
2259 | } | |
2260 | ||
2261 | static void __exit exit_smc91c92_cs(void) | |
2262 | { | |
2263 | pcmcia_unregister_driver(&smc91c92_cs_driver); | |
1da177e4 LT |
2264 | } |
2265 | ||
2266 | module_init(init_smc91c92_cs); | |
2267 | module_exit(exit_smc91c92_cs); |