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[mirror_ubuntu-jammy-kernel.git] / drivers / net / pcmcia / smc91c92_cs.c
CommitLineData
1da177e4
LT		 1/*======================================================================
2
3 A PCMCIA ethernet driver for SMC91c92-based cards.
4
5 This driver supports Megahertz PCMCIA ethernet cards; and
6 Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem
7 multifunction cards.
8
9 Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net
10
11 smc91c92_cs.c 1.122 2002/10/25 06:26:39
12
13 This driver contains code written by Donald Becker
14 (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au),
15 David Hinds (dahinds@users.sourceforge.net), and Erik Stahlman
16 (erik@vt.edu). Donald wrote the SMC 91c92 code using parts of
17 Erik's SMC 91c94 driver. Rowan wrote a similar driver, and I've
18 incorporated some parts of his driver here. I (Dave) wrote most
19 of the PCMCIA glue code, and the Ositech support code. Kelly
20 Stephens (kstephen@holli.com) added support for the Motorola
21 Mariner, with help from Allen Brost.
22
23 This software may be used and distributed according to the terms of
24 the GNU General Public License, incorporated herein by reference.
25
26======================================================================*/
27
636b8116
JP		 28#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29
1da177e4
LT		 30#include <linux/module.h>
31#include <linux/kernel.h>
32#include <linux/init.h>
33#include <linux/slab.h>
34#include <linux/string.h>
35#include <linux/timer.h>
36#include <linux/interrupt.h>
37#include <linux/delay.h>
38#include <linux/crc32.h>
39#include <linux/netdevice.h>
40#include <linux/etherdevice.h>
41#include <linux/skbuff.h>
42#include <linux/if_arp.h>
43#include <linux/ioport.h>
44#include <linux/ethtool.h>
45#include <linux/mii.h>
4851d3aa 46#include <linux/jiffies.h>
75bf758f 47#include <linux/firmware.h>
1da177e4 48
1da177e4
LT		 49#include <pcmcia/cs.h>
50#include <pcmcia/cistpl.h>
51#include <pcmcia/cisreg.h>
52#include <pcmcia/ciscode.h>
53#include <pcmcia/ds.h>
50db3fdb 54#include <pcmcia/ss.h>
1da177e4
LT		 55
56#include <asm/io.h>
57#include <asm/system.h>
58#include <asm/uaccess.h>
59
1da177e4
LT		 60/*====================================================================*/
61
f71e1309 62static const char *if_names[] = { "auto", "10baseT", "10base2"};
1da177e4 63
75bf758f
JSR		 64/* Firmware name */
65#define FIRMWARE_NAME "ositech/Xilinx7OD.bin"
66
1da177e4
LT		 67/* Module parameters */
68
69MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver");
70MODULE_LICENSE("GPL");
75bf758f 71MODULE_FIRMWARE(FIRMWARE_NAME);
1da177e4
LT		 72
73#define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
74
75/*
76 Transceiver/media type.
77 0 = auto
78 1 = 10baseT (and autoselect if #define AUTOSELECT),
79 2 = AUI/10base2,
80*/
81INT_MODULE_PARM(if_port, 0);
82
1da177e4
LT		 83
84#define DRV_NAME "smc91c92_cs"
d5b20697 85#define DRV_VERSION "1.123"
1da177e4
LT		 86
87/*====================================================================*/
88
89/* Operational parameter that usually are not changed. */
90
91/* Time in jiffies before concluding Tx hung */
92#define TX_TIMEOUT ((400*HZ)/1000)
93
94/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
95#define INTR_WORK 4
96
97/* Times to check the check the chip before concluding that it doesn't
98 currently have room for another Tx packet. */
99#define MEMORY_WAIT_TIME 8
100
1da177e4 101struct smc_private {
fd238232 102 struct pcmcia_device *p_dev;
1da177e4
LT		 103 spinlock_t lock;
104 u_short manfid;
105 u_short cardid;
6fb7298c 106
1da177e4
LT		 107 struct sk_buff *saved_skb;
108 int packets_waiting;
109 void __iomem *base;
110 u_short cfg;
111 struct timer_list media;
112 int watchdog, tx_err;
113 u_short media_status;
114 u_short fast_poll;
115 u_short link_status;
116 struct mii_if_info mii_if;
117 int duplex;
118 int rx_ovrn;
119};
120
121/* Special definitions for Megahertz multifunction cards */
122#define MEGAHERTZ_ISR 0x0380
123
124/* Special function registers for Motorola Mariner */
125#define MOT_LAN 0x0000
126#define MOT_UART 0x0020
127#define MOT_EEPROM 0x20
128
129#define MOT_NORMAL \
130(COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA)
131
132/* Special function registers for Ositech cards */
133#define OSITECH_AUI_CTL 0x0c
134#define OSITECH_PWRDOWN 0x0d
135#define OSITECH_RESET 0x0e
136#define OSITECH_ISR 0x0f
137#define OSITECH_AUI_PWR 0x0c
138#define OSITECH_RESET_ISR 0x0e
139
140#define OSI_AUI_PWR 0x40
141#define OSI_LAN_PWRDOWN 0x02
142#define OSI_MODEM_PWRDOWN 0x01
143#define OSI_LAN_RESET 0x02
144#define OSI_MODEM_RESET 0x01
145
146/* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */
147#define BANK_SELECT 14 /* Window select register. */
148#define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); }
149
150/* Bank 0 registers. */
151#define TCR 0 /* transmit control register */
152#define TCR_CLEAR 0 /* do NOTHING */
153#define TCR_ENABLE 0x0001 /* if this is 1, we can transmit */
154#define TCR_PAD_EN 0x0080 /* pads short packets to 64 bytes */
155#define TCR_MONCSN 0x0400 /* Monitor Carrier. */
156#define TCR_FDUPLX 0x0800 /* Full duplex mode. */
157#define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN
158
159#define EPH 2 /* Ethernet Protocol Handler report. */
160#define EPH_TX_SUC 0x0001
161#define EPH_SNGLCOL 0x0002
162#define EPH_MULCOL 0x0004
163#define EPH_LTX_MULT 0x0008
164#define EPH_16COL 0x0010
165#define EPH_SQET 0x0020
166#define EPH_LTX_BRD 0x0040
167#define EPH_TX_DEFR 0x0080
168#define EPH_LAT_COL 0x0200
169#define EPH_LOST_CAR 0x0400
170#define EPH_EXC_DEF 0x0800
171#define EPH_CTR_ROL 0x1000
172#define EPH_RX_OVRN 0x2000
173#define EPH_LINK_OK 0x4000
174#define EPH_TX_UNRN 0x8000
175#define MEMINFO 8 /* Memory Information Register */
176#define MEMCFG 10 /* Memory Configuration Register */
177
178/* Bank 1 registers. */
179#define CONFIG 0
180#define CFG_MII_SELECT 0x8000 /* 91C100 only */
181#define CFG_NO_WAIT 0x1000
182#define CFG_FULL_STEP 0x0400
183#define CFG_SET_SQLCH 0x0200
184#define CFG_AUI_SELECT 0x0100
185#define CFG_16BIT 0x0080
186#define CFG_DIS_LINK 0x0040
187#define CFG_STATIC 0x0030
188#define CFG_IRQ_SEL_1 0x0004
189#define CFG_IRQ_SEL_0 0x0002
190#define BASE_ADDR 2
191#define ADDR0 4
192#define GENERAL 10
193#define CONTROL 12
194#define CTL_STORE 0x0001
195#define CTL_RELOAD 0x0002
196#define CTL_EE_SELECT 0x0004
197#define CTL_TE_ENABLE 0x0020
198#define CTL_CR_ENABLE 0x0040
199#define CTL_LE_ENABLE 0x0080
200#define CTL_AUTO_RELEASE 0x0800
201#define CTL_POWERDOWN 0x2000
202
203/* Bank 2 registers. */
204#define MMU_CMD 0
205#define MC_ALLOC 0x20 /* or with number of 256 byte packets */
206#define MC_RESET 0x40
207#define MC_RELEASE 0x80 /* remove and release the current rx packet */
208#define MC_FREEPKT 0xA0 /* Release packet in PNR register */
209#define MC_ENQUEUE 0xC0 /* Enqueue the packet for transmit */
210#define PNR_ARR 2
211#define FIFO_PORTS 4
212#define FP_RXEMPTY 0x8000
213#define POINTER 6
214#define PTR_AUTO_INC 0x0040
215#define PTR_READ 0x2000
216#define PTR_AUTOINC 0x4000
217#define PTR_RCV 0x8000
218#define DATA_1 8
219#define INTERRUPT 12
220#define IM_RCV_INT 0x1
221#define IM_TX_INT 0x2
222#define IM_TX_EMPTY_INT 0x4
223#define IM_ALLOC_INT 0x8
224#define IM_RX_OVRN_INT 0x10
225#define IM_EPH_INT 0x20
226
227#define RCR 4
228enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002,
229 RxEnable = 0x0100, RxStripCRC = 0x0200};
230#define RCR_SOFTRESET 0x8000 /* resets the chip */
231#define RCR_STRIP_CRC 0x200 /* strips CRC */
232#define RCR_ENABLE 0x100 /* IFF this is set, we can receive packets */
233#define RCR_ALMUL 0x4 /* receive all multicast packets */
234#define RCR_PROMISC 0x2 /* enable promiscuous mode */
235
236/* the normal settings for the RCR register : */
237#define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE)
238#define RCR_CLEAR 0x0 /* set it to a base state */
239#define COUNTER 6
240
241/* BANK 3 -- not the same values as in smc9194! */
242#define MULTICAST0 0
243#define MULTICAST2 2
244#define MULTICAST4 4
245#define MULTICAST6 6
246#define MGMT 8
247#define REVISION 0x0a
248
249/* Transmit status bits. */
250#define TS_SUCCESS 0x0001
251#define TS_16COL 0x0010
252#define TS_LATCOL 0x0200
253#define TS_LOSTCAR 0x0400
254
255/* Receive status bits. */
256#define RS_ALGNERR 0x8000
257#define RS_BADCRC 0x2000
258#define RS_ODDFRAME 0x1000
259#define RS_TOOLONG 0x0800
260#define RS_TOOSHORT 0x0400
261#define RS_MULTICAST 0x0001
262#define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)
263
264#define set_bits(v, p) outw(inw(p)|(v), (p))
265#define mask_bits(v, p) outw(inw(p)&(v), (p))
266
267/*====================================================================*/
268
cc3b4866 269static void smc91c92_detach(struct pcmcia_device *p_dev);
15b99ac1 270static int smc91c92_config(struct pcmcia_device *link);
fba395ee 271static void smc91c92_release(struct pcmcia_device *link);
1da177e4
LT		 272
273static int smc_open(struct net_device *dev);
274static int smc_close(struct net_device *dev);
275static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
276static void smc_tx_timeout(struct net_device *dev);
dbf02fae
SH		 277static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
278 struct net_device *dev);
7d12e780 279static irqreturn_t smc_interrupt(int irq, void *dev_id);
1da177e4 280static void smc_rx(struct net_device *dev);
1da177e4
LT		 281static void set_rx_mode(struct net_device *dev);
282static int s9k_config(struct net_device *dev, struct ifmap *map);
283static void smc_set_xcvr(struct net_device *dev, int if_port);
284static void smc_reset(struct net_device *dev);
285static void media_check(u_long arg);
906da809 286static void mdio_sync(unsigned int addr);
1da177e4
LT		 287static int mdio_read(struct net_device *dev, int phy_id, int loc);
288static void mdio_write(struct net_device *dev, int phy_id, int loc, int value);
289static int smc_link_ok(struct net_device *dev);
7282d491 290static const struct ethtool_ops ethtool_ops;
1da177e4 291
9b31b697
SH		 292static const struct net_device_ops smc_netdev_ops = {
293 .ndo_open = smc_open,
294 .ndo_stop = smc_close,
295 .ndo_start_xmit = smc_start_xmit,
296 .ndo_tx_timeout = smc_tx_timeout,
297 .ndo_set_config = s9k_config,
298 .ndo_set_multicast_list = set_rx_mode,
c061b18d 299 .ndo_do_ioctl = smc_ioctl,
9b31b697
SH		 300 .ndo_change_mtu = eth_change_mtu,
301 .ndo_set_mac_address = eth_mac_addr,
302 .ndo_validate_addr = eth_validate_addr,
303};
304
1da177e4
LT		 305/*======================================================================
306
307 smc91c92_attach() creates an "instance" of the driver, allocating
308 local data structures for one device. The device is registered
309 with Card Services.
310
311======================================================================*/
312
15b99ac1 313static int smc91c92_probe(struct pcmcia_device *link)
1da177e4 314{
1da177e4 315 struct smc_private *smc;
1da177e4 316 struct net_device *dev;
1da177e4 317
dd0fab5b 318 dev_dbg(&link->dev, "smc91c92_attach()\n");
1da177e4
LT		 319
320 /* Create new ethernet device */
321 dev = alloc_etherdev(sizeof(struct smc_private));
322 if (!dev)
f8cfa618 323 return -ENOMEM;
1da177e4 324 smc = netdev_priv(dev);
fba395ee 325 smc->p_dev = link;
44b496f6 326 link->priv = dev;
1da177e4
LT		 327
328 spin_lock_init(&smc->lock);
90abdc3b
DB		 329 link->resource[0]->end = 16;
330 link->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
1da177e4 331 link->conf.Attributes = CONF_ENABLE_IRQ;
1da177e4
LT		 332 link->conf.IntType = INT_MEMORY_AND_IO;
333
334 /* The SMC91c92-specific entries in the device structure. */
9b31b697 335 dev->netdev_ops = &smc_netdev_ops;
1da177e4 336 SET_ETHTOOL_OPS(dev, &ethtool_ops);
1da177e4 337 dev->watchdog_timeo = TX_TIMEOUT;
1da177e4
LT		 338
339 smc->mii_if.dev = dev;
340 smc->mii_if.mdio_read = mdio_read;
341 smc->mii_if.mdio_write = mdio_write;
342 smc->mii_if.phy_id_mask = 0x1f;
343 smc->mii_if.reg_num_mask = 0x1f;
344
15b99ac1 345 return smc91c92_config(link);
1da177e4
LT		 346} /* smc91c92_attach */
347
348/*======================================================================
349
350 This deletes a driver "instance". The device is de-registered
351 with Card Services. If it has been released, all local data
352 structures are freed. Otherwise, the structures will be freed
353 when the device is released.
354
355======================================================================*/
356
fba395ee 357static void smc91c92_detach(struct pcmcia_device *link)
1da177e4
LT		 358{
359 struct net_device *dev = link->priv;
1da177e4 360
dd0fab5b 361 dev_dbg(&link->dev, "smc91c92_detach\n");
1da177e4 362
c7c2fa07 363 unregister_netdev(dev);
1da177e4 364
e2d40963 365 smc91c92_release(link);
1da177e4 366
1da177e4
LT		 367 free_netdev(dev);
368} /* smc91c92_detach */
369
370/*====================================================================*/
371
372static int cvt_ascii_address(struct net_device *dev, char *s)
373{
374 int i, j, da, c;
375
376 if (strlen(s) != 12)
377 return -1;
378 for (i = 0; i < 6; i++) {
379 da = 0;
380 for (j = 0; j < 2; j++) {
381 c = *s++;
382 da <<= 4;
383 da += ((c >= '0') && (c <= '9')) ?
384 (c - '0') : ((c & 0x0f) + 9);
385 }
386 dev->dev_addr[i] = da;
387 }
388 return 0;
389}
390
dddfbd82 391/*====================================================================
1da177e4
LT		 392
393 Configuration stuff for Megahertz cards
394
395 mhz_3288_power() is used to power up a 3288's ethernet chip.
396 mhz_mfc_config() handles socket setup for multifunction (1144
397 and 3288) cards. mhz_setup() gets a card's hardware ethernet
398 address.
399
400======================================================================*/
401
fba395ee 402static int mhz_3288_power(struct pcmcia_device *link)
1da177e4
LT		 403{
404 struct net_device *dev = link->priv;
405 struct smc_private *smc = netdev_priv(dev);
406 u_char tmp;
407
408 /* Read the ISR twice... */
409 readb(smc->base+MEGAHERTZ_ISR);
410 udelay(5);
411 readb(smc->base+MEGAHERTZ_ISR);
412
413 /* Pause 200ms... */
414 mdelay(200);
415
416 /* Now read and write the COR... */
417 tmp = readb(smc->base + link->conf.ConfigBase + CISREG_COR);
418 udelay(5);
419 writeb(tmp, smc->base + link->conf.ConfigBase + CISREG_COR);
420
421 return 0;
422}
423
b54bf94b
DB		 424static int mhz_mfc_config_check(struct pcmcia_device *p_dev,
425 cistpl_cftable_entry_t *cf,
8e2fc39d 426 cistpl_cftable_entry_t *dflt,
ad913c11 427 unsigned int vcc,
b54bf94b
DB		 428 void *priv_data)
429{
430 int k;
90abdc3b 431 p_dev->resource[1]->start = cf->io.win[0].base;
b54bf94b
DB		 432 for (k = 0; k < 0x400; k += 0x10) {
433 if (k & 0x80)
434 continue;
90abdc3b
DB		 435 p_dev->resource[0]->start = k ^ 0x300;
436 p_dev->io_lines = 16;
437 if (!pcmcia_request_io(p_dev))
b54bf94b
DB		 438 return 0;
439 }
440 return -ENODEV;
441}
442
fba395ee 443static int mhz_mfc_config(struct pcmcia_device *link)
1da177e4
LT		 444{
445 struct net_device *dev = link->priv;
446 struct smc_private *smc = netdev_priv(dev);
1da177e4 447 win_req_t req;
b5cb259e 448 unsigned int offset;
b54bf94b 449 int i;
1da177e4
LT		 450
451 link->conf.Attributes |= CONF_ENABLE_SPKR;
452 link->conf.Status = CCSR_AUDIO_ENA;
90abdc3b
DB		 453 link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
454 link->resource[1]->end = 8;
1da177e4 455
1da177e4
LT		 456 /* The Megahertz combo cards have modem-like CIS entries, so
457 we have to explicitly try a bunch of port combinations. */
b54bf94b 458 if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL))
dddfbd82
DB		 459 return -ENODEV;
460
9a017a91 461 dev->base_addr = link->resource[0]->start;
1da177e4
LT		 462
463 /* Allocate a memory window, for accessing the ISR */
464 req.Attributes = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
465 req.Base = req.Size = 0;
466 req.AccessSpeed = 0;
6838b03f 467 i = pcmcia_request_window(link, &req, &link->win);
4c89e88b 468 if (i != 0)
dddfbd82
DB		 469 return -ENODEV;
470
1da177e4 471 smc->base = ioremap(req.Base, req.Size);
b5cb259e
DB		 472 offset = (smc->manfid == MANFID_MOTOROLA) ? link->conf.ConfigBase : 0;
473 i = pcmcia_map_mem_page(link, link->win, offset);
8e95a202
JP		 474 if ((i == 0) &&
475 (smc->manfid == MANFID_MEGAHERTZ) &&
476 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
477 mhz_3288_power(link);
1da177e4 478
dddfbd82 479 return 0;
1da177e4
LT		 480}
481
dddfbd82
DB		 482static int pcmcia_get_versmac(struct pcmcia_device *p_dev,
483 tuple_t *tuple,
484 void *priv)
1da177e4 485{
dddfbd82
DB		 486 struct net_device *dev = priv;
487 cisparse_t parse;
fb9e2d88 488 u8 *buf;
4638aef4 489
dddfbd82
DB		 490 if (pcmcia_parse_tuple(tuple, &parse))
491 return -EINVAL;
1da177e4 492
fb9e2d88
KK		 493 buf = parse.version_1.str + parse.version_1.ofs[3];
494
495 if ((parse.version_1.ns > 3) && (cvt_ascii_address(dev, buf) == 0))
dddfbd82 496 return 0;
4638aef4 497
dddfbd82
DB		 498 return -EINVAL;
499};
500
fba395ee 501static int mhz_setup(struct pcmcia_device *link)
1da177e4 502{
1da177e4 503 struct net_device *dev = link->priv;
dddfbd82
DB		 504 size_t len;
505 u8 *buf;
4638aef4 506 int rc;
1da177e4
LT		 507
508 /* Read the station address from the CIS. It is stored as the last
509 (fourth) string in the Version 1 Version/ID tuple. */
7d2e8d00
DB		 510 if ((link->prod_id[3]) &&
511 (cvt_ascii_address(dev, link->prod_id[3]) == 0))
512 return 0;
513
514 /* Workarounds for broken cards start here. */
a1a98b72 515 /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */
dddfbd82
DB		 516 if (!pcmcia_loop_tuple(link, CISTPL_VERS_1, pcmcia_get_versmac, dev))
517 return 0;
1da177e4
LT		 518
519 /* Another possibility: for the EM3288, in a special tuple */
4638aef4 520 rc = -1;
dddfbd82
DB		 521 len = pcmcia_get_tuple(link, 0x81, &buf);
522 if (buf && len >= 13) {
523 buf[12] = '\0';
fb9e2d88 524 if (cvt_ascii_address(dev, buf) == 0)
dddfbd82
DB		 525 rc = 0;
526 }
527 kfree(buf);
528
529 return rc;
530};
1da177e4
LT		 531
532/*======================================================================
533
534 Configuration stuff for the Motorola Mariner
535
536 mot_config() writes directly to the Mariner configuration
537 registers because the CIS is just bogus.
538
539======================================================================*/
540
fba395ee 541static void mot_config(struct pcmcia_device *link)
1da177e4
LT		 542{
543 struct net_device *dev = link->priv;
544 struct smc_private *smc = netdev_priv(dev);
906da809 545 unsigned int ioaddr = dev->base_addr;
9a017a91 546 unsigned int iouart = link->resource[1]->start;
1da177e4
LT		 547
548 /* Set UART base address and force map with COR bit 1 */
549 writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0);
550 writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1);
551 writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR);
552
553 /* Set SMC base address and force map with COR bit 1 */
554 writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0);
555 writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1);
556 writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR);
557
558 /* Wait for things to settle down */
559 mdelay(100);
560}
561
fba395ee 562static int mot_setup(struct pcmcia_device *link)
1da177e4
LT		 563{
564 struct net_device *dev = link->priv;
906da809 565 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 566 int i, wait, loop;
567 u_int addr;
568
569 /* Read Ethernet address from Serial EEPROM */
570
571 for (i = 0; i < 3; i++) {
572 SMC_SELECT_BANK(2);
573 outw(MOT_EEPROM + i, ioaddr + POINTER);
574 SMC_SELECT_BANK(1);
575 outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL);
576
577 for (loop = wait = 0; loop < 200; loop++) {
578 udelay(10);
579 wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL));
580 if (wait == 0) break;
581 }
582
583 if (wait)
584 return -1;
585
586 addr = inw(ioaddr + GENERAL);
587 dev->dev_addr[2*i] = addr & 0xff;
588 dev->dev_addr[2*i+1] = (addr >> 8) & 0xff;
589 }
590
591 return 0;
592}
593
594/*====================================================================*/
595
b54bf94b
DB		 596static int smc_configcheck(struct pcmcia_device *p_dev,
597 cistpl_cftable_entry_t *cf,
8e2fc39d 598 cistpl_cftable_entry_t *dflt,
ad913c11 599 unsigned int vcc,
b54bf94b
DB		 600 void *priv_data)
601{
90abdc3b
DB		 602 p_dev->resource[0]->start = cf->io.win[0].base;
603 p_dev->io_lines = cf->io.flags & CISTPL_IO_LINES_MASK;
604 return pcmcia_request_io(p_dev);
b54bf94b
DB		 605}
606
fba395ee 607static int smc_config(struct pcmcia_device *link)
1da177e4
LT		 608{
609 struct net_device *dev = link->priv;
1da177e4
LT		 610 int i;
611
90abdc3b 612 link->resource[0]->end = 16;
b54bf94b
DB		 613 i = pcmcia_loop_config(link, smc_configcheck, NULL);
614 if (!i)
9a017a91 615 dev->base_addr = link->resource[0]->start;
4638aef4 616
1da177e4
LT		 617 return i;
618}
619
dddfbd82 620
fba395ee 621static int smc_setup(struct pcmcia_device *link)
1da177e4 622{
1da177e4 623 struct net_device *dev = link->priv;
1da177e4
LT		 624
625 /* Check for a LAN function extension tuple */
dddfbd82
DB		 626 if (!pcmcia_get_mac_from_cis(link, dev))
627 return 0;
628
1da177e4 629 /* Try the third string in the Version 1 Version/ID tuple. */
a9606fd3 630 if (link->prod_id[2]) {
dddfbd82
DB		 631 if (cvt_ascii_address(dev, link->prod_id[2]) == 0)
632 return 0;
4638aef4 633 }
dddfbd82 634 return -1;
1da177e4
LT		 635}
636
637/*====================================================================*/
638
fba395ee 639static int osi_config(struct pcmcia_device *link)
1da177e4
LT		 640{
641 struct net_device *dev = link->priv;
906da809 642 static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
1da177e4
LT		 643 int i, j;
644
645 link->conf.Attributes |= CONF_ENABLE_SPKR;
646 link->conf.Status = CCSR_AUDIO_ENA;
90abdc3b
DB		 647 link->resource[0]->end = 64;
648 link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
649 link->resource[1]->end = 8;
1da177e4
LT		 650
651 /* Enable Hard Decode, LAN, Modem */
652 link->conf.ConfigIndex = 0x23;
90abdc3b 653 link->io_lines = 16;
1da177e4
LT		 654
655 for (i = j = 0; j < 4; j++) {
90abdc3b
DB		 656 link->resource[1]->start = com[j];
657 i = pcmcia_request_io(link);
4c89e88b
DB		 658 if (i == 0)
659 break;
1da177e4 660 }
4c89e88b 661 if (i != 0) {
1da177e4
LT		 662 /* Fallback: turn off hard decode */
663 link->conf.ConfigIndex = 0x03;
90abdc3b
DB		 664 link->resource[1]->end = 0;
665 i = pcmcia_request_io(link);
1da177e4 666 }
9a017a91 667 dev->base_addr = link->resource[0]->start + 0x10;
1da177e4
LT		 668 return i;
669}
670
75bf758f
JSR		 671static int osi_load_firmware(struct pcmcia_device *link)
672{
673 const struct firmware *fw;
674 int i, err;
675
676 err = request_firmware(&fw, FIRMWARE_NAME, &link->dev);
677 if (err) {
678 pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME);
679 return err;
680 }
681
682 /* Download the Seven of Diamonds firmware */
683 for (i = 0; i < fw->size; i++) {
9a017a91 684 outb(fw->data[i], link->resource[0]->start + 2);
75bf758f
JSR		 685 udelay(50);
686 }
687 release_firmware(fw);
688 return err;
689}
690
dddfbd82
DB		 691static int pcmcia_osi_mac(struct pcmcia_device *p_dev,
692 tuple_t *tuple,
693 void *priv)
1da177e4 694{
dddfbd82
DB		 695 struct net_device *dev = priv;
696 int i;
1da177e4 697
dddfbd82
DB		 698 if (tuple->TupleDataLen < 8)
699 return -EINVAL;
700 if (tuple->TupleData[0] != 0x04)
701 return -EINVAL;
702 for (i = 0; i < 6; i++)
703 dev->dev_addr[i] = tuple->TupleData[i+2];
704 return 0;
705};
4638aef4 706
4638aef4 707
dddfbd82
DB		 708static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid)
709{
710 struct net_device *dev = link->priv;
711 int rc;
1da177e4
LT		 712
713 /* Read the station address from tuple 0x90, subtuple 0x04 */
dddfbd82
DB		 714 if (pcmcia_loop_tuple(link, 0x90, pcmcia_osi_mac, dev))
715 return -1;
1da177e4
LT		 716
717 if (((manfid == MANFID_OSITECH) &&
718 (cardid == PRODID_OSITECH_SEVEN)) ||
719 ((manfid == MANFID_PSION) &&
720 (cardid == PRODID_PSION_NET100))) {
75bf758f
JSR		 721 rc = osi_load_firmware(link);
722 if (rc)
dddfbd82 723 return rc;
1da177e4
LT		 724 } else if (manfid == MANFID_OSITECH) {
725 /* Make sure both functions are powered up */
9a017a91 726 set_bits(0x300, link->resource[0]->start + OSITECH_AUI_PWR);
1da177e4 727 /* Now, turn on the interrupt for both card functions */
9a017a91 728 set_bits(0x300, link->resource[0]->start + OSITECH_RESET_ISR);
dd0fab5b 729 dev_dbg(&link->dev, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n",
9a017a91
DB		 730 inw(link->resource[0]->start + OSITECH_AUI_PWR),
731 inw(link->resource[0]->start + OSITECH_RESET_ISR));
1da177e4 732 }
dddfbd82 733 return 0;
1da177e4
LT		 734}
735
fba395ee 736static int smc91c92_suspend(struct pcmcia_device *link)
98e4c28b 737{
98e4c28b
DB		 738 struct net_device *dev = link->priv;
739
e2d40963 740 if (link->open)
4bbed523 741 netif_device_detach(dev);
98e4c28b
DB		 742
743 return 0;
744}
745
fba395ee 746static int smc91c92_resume(struct pcmcia_device *link)
98e4c28b 747{
98e4c28b
DB		 748 struct net_device *dev = link->priv;
749 struct smc_private *smc = netdev_priv(dev);
750 int i;
751
e2d40963
DB		 752 if ((smc->manfid == MANFID_MEGAHERTZ) &&
753 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
754 mhz_3288_power(link);
755 if (smc->manfid == MANFID_MOTOROLA)
756 mot_config(link);
757 if ((smc->manfid == MANFID_OSITECH) &&
758 (smc->cardid != PRODID_OSITECH_SEVEN)) {
759 /* Power up the card and enable interrupts */
760 set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR);
761 set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR);
762 }
763 if (((smc->manfid == MANFID_OSITECH) &&
764 (smc->cardid == PRODID_OSITECH_SEVEN)) ||
765 ((smc->manfid == MANFID_PSION) &&
766 (smc->cardid == PRODID_PSION_NET100))) {
75bf758f
JSR		 767 i = osi_load_firmware(link);
768 if (i) {
769 pr_err("smc91c92_cs: Failed to load firmware\n");
770 return i;
98e4c28b
DB		 771 }
772 }
e2d40963
DB		 773 if (link->open) {
774 smc_reset(dev);
775 netif_device_attach(dev);
776 }
98e4c28b
DB		 777
778 return 0;
779}
780
781
1da177e4
LT		 782/*======================================================================
783
784 This verifies that the chip is some SMC91cXX variant, and returns
785 the revision code if successful. Otherwise, it returns -ENODEV.
786
787======================================================================*/
788
fba395ee 789static int check_sig(struct pcmcia_device *link)
1da177e4
LT		 790{
791 struct net_device *dev = link->priv;
906da809 792 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 793 int width;
794 u_short s;
795
796 SMC_SELECT_BANK(1);
797 if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) {
798 /* Try powering up the chip */
799 outw(0, ioaddr + CONTROL);
800 mdelay(55);
801 }
802
803 /* Try setting bus width */
90abdc3b 804 width = (link->resource[0]->flags == IO_DATA_PATH_WIDTH_AUTO);
1da177e4
LT		 805 s = inb(ioaddr + CONFIG);
806 if (width)
807 s |= CFG_16BIT;
808 else
809 s &= ~CFG_16BIT;
810 outb(s, ioaddr + CONFIG);
811
812 /* Check Base Address Register to make sure bus width is OK */
813 s = inw(ioaddr + BASE_ADDR);
814 if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) &&
815 ((s >> 8) != (s & 0xff))) {
816 SMC_SELECT_BANK(3);
817 s = inw(ioaddr + REVISION);
807540ba 818 return s & 0xff;
1da177e4
LT		 819 }
820
821 if (width) {
4bbed523
DB		 822 modconf_t mod = {
823 .Attributes = CONF_IO_CHANGE_WIDTH,
824 };
636b8116 825 pr_info("using 8-bit IO window\n");
4bbed523 826
fba395ee
DB		 827 smc91c92_suspend(link);
828 pcmcia_modify_configuration(link, &mod);
829 smc91c92_resume(link);
4bbed523 830 return check_sig(link);
1da177e4
LT		 831 }
832 return -ENODEV;
833}
834
835/*======================================================================
836
837 smc91c92_config() is scheduled to run after a CARD_INSERTION event
838 is received, to configure the PCMCIA socket, and to make the
839 ethernet device available to the system.
840
841======================================================================*/
842
15b99ac1 843static int smc91c92_config(struct pcmcia_device *link)
1da177e4 844{
1da177e4
LT		 845 struct net_device *dev = link->priv;
846 struct smc_private *smc = netdev_priv(dev);
1da177e4
LT		 847 char *name;
848 int i, j, rev;
906da809 849 unsigned int ioaddr;
1da177e4
LT		 850 u_long mir;
851
dd0fab5b 852 dev_dbg(&link->dev, "smc91c92_config\n");
1da177e4 853
efd50585
DB		 854 smc->manfid = link->manf_id;
855 smc->cardid = link->card_id;
1da177e4 856
1da177e4
LT		 857 if ((smc->manfid == MANFID_OSITECH) &&
858 (smc->cardid != PRODID_OSITECH_SEVEN)) {
859 i = osi_config(link);
860 } else if ((smc->manfid == MANFID_MOTOROLA) ||
861 ((smc->manfid == MANFID_MEGAHERTZ) &&
862 ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) ||
863 (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) {
864 i = mhz_mfc_config(link);
865 } else {
866 i = smc_config(link);
867 }
dd0fab5b
DB		 868 if (i)
869 goto config_failed;
1da177e4 870
eb14120f 871 i = pcmcia_request_irq(link, smc_interrupt);
dd0fab5b
DB		 872 if (i)
873 goto config_failed;
fba395ee 874 i = pcmcia_request_configuration(link, &link->conf);
dd0fab5b
DB		 875 if (i)
876 goto config_failed;
1da177e4
LT		 877
878 if (smc->manfid == MANFID_MOTOROLA)
879 mot_config(link);
880
eb14120f 881 dev->irq = link->irq;
1da177e4
LT		 882
883 if ((if_port >= 0) && (if_port <= 2))
884 dev->if_port = if_port;
885 else
636b8116 886 dev_notice(&link->dev, "invalid if_port requested\n");
1da177e4
LT		 887
888 switch (smc->manfid) {
889 case MANFID_OSITECH:
890 case MANFID_PSION:
891 i = osi_setup(link, smc->manfid, smc->cardid); break;
892 case MANFID_SMC:
893 case MANFID_NEW_MEDIA:
894 i = smc_setup(link); break;
895 case 0x128: /* For broken Megahertz cards */
896 case MANFID_MEGAHERTZ:
897 i = mhz_setup(link); break;
898 case MANFID_MOTOROLA:
899 default: /* get the hw address from EEPROM */
900 i = mot_setup(link); break;
901 }
902
903 if (i != 0) {
636b8116 904 dev_notice(&link->dev, "Unable to find hardware address.\n");
fb9e2d88 905 goto config_failed;
1da177e4
LT		 906 }
907
908 smc->duplex = 0;
909 smc->rx_ovrn = 0;
910
911 rev = check_sig(link);
912 name = "???";
913 if (rev > 0)
914 switch (rev >> 4) {
915 case 3: name = "92"; break;
916 case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break;
917 case 5: name = "95"; break;
918 case 7: name = "100"; break;
919 case 8: name = "100-FD"; break;
920 case 9: name = "110"; break;
921 }
922
923 ioaddr = dev->base_addr;
924 if (rev > 0) {
925 u_long mcr;
926 SMC_SELECT_BANK(0);
927 mir = inw(ioaddr + MEMINFO) & 0xff;
928 if (mir == 0xff) mir++;
929 /* Get scale factor for memory size */
930 mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200;
931 mir *= 128 * (1<<((mcr >> 9) & 7));
932 SMC_SELECT_BANK(1);
933 smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT;
934 smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC;
935 if (smc->manfid == MANFID_OSITECH)
936 smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0;
937 if ((rev >> 4) >= 7)
938 smc->cfg |= CFG_MII_SELECT;
939 } else
940 mir = 0;
941
942 if (smc->cfg & CFG_MII_SELECT) {
943 SMC_SELECT_BANK(3);
944
945 for (i = 0; i < 32; i++) {
946 j = mdio_read(dev, i, 1);
947 if ((j != 0) && (j != 0xffff)) break;
948 }
949 smc->mii_if.phy_id = (i < 32) ? i : -1;
950
951 SMC_SELECT_BANK(0);
952 }
953
dd2e5a15 954 SET_NETDEV_DEV(dev, &link->dev);
1da177e4
LT		 955
956 if (register_netdev(dev) != 0) {
636b8116 957 dev_err(&link->dev, "register_netdev() failed\n");
1da177e4
LT		 958 goto config_undo;
959 }
960
636b8116
JP		 961 netdev_info(dev, "smc91c%s rev %d: io %#3lx, irq %d, hw_addr %pM\n",
962 name, (rev & 0x0f), dev->base_addr, dev->irq, dev->dev_addr);
1da177e4
LT		 963
964 if (rev > 0) {
965 if (mir & 0x3ff)
636b8116 966 netdev_info(dev, " %lu byte", mir);
1da177e4 967 else
636b8116
JP		 968 netdev_info(dev, " %lu kb", mir>>10);
969 pr_cont(" buffer, %s xcvr\n",
970 (smc->cfg & CFG_MII_SELECT) ? "MII" : if_names[dev->if_port]);
1da177e4
LT		 971 }
972
973 if (smc->cfg & CFG_MII_SELECT) {
974 if (smc->mii_if.phy_id != -1) {
636b8116
JP		 975 netdev_dbg(dev, " MII transceiver at index %d, status %x\n",
976 smc->mii_if.phy_id, j);
1da177e4 977 } else {
636b8116 978 netdev_notice(dev, " No MII transceivers found!\n");
1da177e4
LT		 979 }
980 }
15b99ac1 981 return 0;
1da177e4
LT		 982
983config_undo:
984 unregister_netdev(dev);
dd0fab5b 985config_failed:
1da177e4 986 smc91c92_release(link);
fb9e2d88 987 free_netdev(dev);
15b99ac1 988 return -ENODEV;
1da177e4
LT		 989} /* smc91c92_config */
990
991/*======================================================================
992
993 After a card is removed, smc91c92_release() will unregister the net
994 device, and release the PCMCIA configuration. If the device is
995 still open, this will be postponed until it is closed.
996
997======================================================================*/
998
fba395ee 999static void smc91c92_release(struct pcmcia_device *link)
1da177e4 1000{
dd0fab5b 1001 dev_dbg(&link->dev, "smc91c92_release\n");
5f2a71fc
DB		 1002 if (link->win) {
1003 struct net_device *dev = link->priv;
1004 struct smc_private *smc = netdev_priv(dev);
1005 iounmap(smc->base);
1006 }
fba395ee 1007 pcmcia_disable_device(link);
1da177e4
LT		 1008}
1009
1da177e4
LT		 1010/*======================================================================
1011
1012 MII interface support for SMC91cXX based cards
1013======================================================================*/
1014
1015#define MDIO_SHIFT_CLK 0x04
1016#define MDIO_DATA_OUT 0x01
1017#define MDIO_DIR_WRITE 0x08
1018#define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE)
1019#define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT)
1020#define MDIO_DATA_READ 0x02
1021
906da809 1022static void mdio_sync(unsigned int addr)
1da177e4
LT		 1023{
1024 int bits;
1025 for (bits = 0; bits < 32; bits++) {
1026 outb(MDIO_DATA_WRITE1, addr);
1027 outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr);
1028 }
1029}
1030
1031static int mdio_read(struct net_device *dev, int phy_id, int loc)
1032{
906da809 1033 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT		 1034 u_int cmd = (0x06<<10)|(phy_id<<5)|loc;
1035 int i, retval = 0;
1036
1037 mdio_sync(addr);
1038 for (i = 13; i >= 0; i--) {
1039 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1040 outb(dat, addr);
1041 outb(dat | MDIO_SHIFT_CLK, addr);
1042 }
1043 for (i = 19; i > 0; i--) {
1044 outb(0, addr);
1045 retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0);
1046 outb(MDIO_SHIFT_CLK, addr);
1047 }
1048 return (retval>>1) & 0xffff;
1049}
1050
1051static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
1052{
906da809 1053 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT		 1054 u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
1055 int i;
1056
1057 mdio_sync(addr);
1058 for (i = 31; i >= 0; i--) {
1059 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1060 outb(dat, addr);
1061 outb(dat | MDIO_SHIFT_CLK, addr);
1062 }
1063 for (i = 1; i >= 0; i--) {
1064 outb(0, addr);
1065 outb(MDIO_SHIFT_CLK, addr);
1066 }
1067}
1068
1069/*======================================================================
1070
1071 The driver core code, most of which should be common with a
1072 non-PCMCIA implementation.
1073
1074======================================================================*/
1075
1076#ifdef PCMCIA_DEBUG
1077static void smc_dump(struct net_device *dev)
1078{
906da809 1079 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1080 u_short i, w, save;
1081 save = inw(ioaddr + BANK_SELECT);
1082 for (w = 0; w < 4; w++) {
1083 SMC_SELECT_BANK(w);
636b8116 1084 netdev_printk(KERN_DEBUG, dev, "bank %d: ", w);
1da177e4 1085 for (i = 0; i < 14; i += 2)
636b8116
JP		 1086 pr_cont(" %04x", inw(ioaddr + i));
1087 pr_cont("\n");
1da177e4
LT		 1088 }
1089 outw(save, ioaddr + BANK_SELECT);
1090}
1091#endif
1092
1093static int smc_open(struct net_device *dev)
1094{
1095 struct smc_private *smc = netdev_priv(dev);
fba395ee 1096 struct pcmcia_device *link = smc->p_dev;
1da177e4 1097
dd0fab5b 1098 dev_dbg(&link->dev, "%s: smc_open(%p), ID/Window %4.4x.\n",
1da177e4 1099 dev->name, dev, inw(dev->base_addr + BANK_SELECT));
dd0fab5b
DB		 1100#ifdef PCMCIA_DEBUG
1101 smc_dump(dev);
1da177e4
LT		 1102#endif
1103
1104 /* Check that the PCMCIA card is still here. */
9940ec36 1105 if (!pcmcia_dev_present(link))
1da177e4
LT		 1106 return -ENODEV;
1107 /* Physical device present signature. */
1108 if (check_sig(link) < 0) {
636b8116 1109 netdev_info(dev, "Yikes! Bad chip signature!\n");
1da177e4
LT		 1110 return -ENODEV;
1111 }
1112 link->open++;
1113
1114 netif_start_queue(dev);
1115 smc->saved_skb = NULL;
1116 smc->packets_waiting = 0;
1117
1118 smc_reset(dev);
1119 init_timer(&smc->media);
c061b18d 1120 smc->media.function = media_check;
1da177e4
LT		 1121 smc->media.data = (u_long) dev;
1122 smc->media.expires = jiffies + HZ;
1123 add_timer(&smc->media);
1124
1125 return 0;
1126} /* smc_open */
1127
1128/*====================================================================*/
1129
1130static int smc_close(struct net_device *dev)
1131{
1132 struct smc_private *smc = netdev_priv(dev);
fba395ee 1133 struct pcmcia_device *link = smc->p_dev;
906da809 1134 unsigned int ioaddr = dev->base_addr;
1da177e4 1135
dd0fab5b 1136 dev_dbg(&link->dev, "%s: smc_close(), status %4.4x.\n",
1da177e4
LT		 1137 dev->name, inw(ioaddr + BANK_SELECT));
1138
1139 netif_stop_queue(dev);
1140
1141 /* Shut off all interrupts, and turn off the Tx and Rx sections.
1142 Don't bother to check for chip present. */
1143 SMC_SELECT_BANK(2); /* Nominally paranoia, but do no assume... */
1144 outw(0, ioaddr + INTERRUPT);
1145 SMC_SELECT_BANK(0);
1146 mask_bits(0xff00, ioaddr + RCR);
1147 mask_bits(0xff00, ioaddr + TCR);
1148
1149 /* Put the chip into power-down mode. */
1150 SMC_SELECT_BANK(1);
1151 outw(CTL_POWERDOWN, ioaddr + CONTROL );
1152
1153 link->open--;
1154 del_timer_sync(&smc->media);
1155
1156 return 0;
1157} /* smc_close */
1158
1159/*======================================================================
1160
1161 Transfer a packet to the hardware and trigger the packet send.
1162 This may be called at either from either the Tx queue code
1163 or the interrupt handler.
1164
1165======================================================================*/
1166
1167static void smc_hardware_send_packet(struct net_device * dev)
1168{
1169 struct smc_private *smc = netdev_priv(dev);
1170 struct sk_buff *skb = smc->saved_skb;
906da809 1171 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1172 u_char packet_no;
1173
1174 if (!skb) {
636b8116 1175 netdev_err(dev, "In XMIT with no packet to send\n");
1da177e4
LT		 1176 return;
1177 }
1178
1179 /* There should be a packet slot waiting. */
1180 packet_no = inw(ioaddr + PNR_ARR) >> 8;
1181 if (packet_no & 0x80) {
1182 /* If not, there is a hardware problem! Likely an ejected card. */
636b8116
JP		 1183 netdev_warn(dev, "hardware Tx buffer allocation failed, status %#2.2x\n",
1184 packet_no);
1da177e4
LT		 1185 dev_kfree_skb_irq(skb);
1186 smc->saved_skb = NULL;
1187 netif_start_queue(dev);
1188 return;
1189 }
1190
6fb7298c 1191 dev->stats.tx_bytes += skb->len;
1da177e4
LT		 1192 /* The card should use the just-allocated buffer. */
1193 outw(packet_no, ioaddr + PNR_ARR);
1194 /* point to the beginning of the packet */
1195 outw(PTR_AUTOINC , ioaddr + POINTER);
1196
1197 /* Send the packet length (+6 for status, length and ctl byte)
1198 and the status word (set to zeros). */
1199 {
1200 u_char *buf = skb->data;
1201 u_int length = skb->len; /* The chip will pad to ethernet min. */
1202
636b8116 1203 netdev_dbg(dev, "Trying to xmit packet of length %d\n", length);
1da177e4
LT		 1204
1205 /* send the packet length: +6 for status word, length, and ctl */
1206 outw(0, ioaddr + DATA_1);
1207 outw(length + 6, ioaddr + DATA_1);
1208 outsw(ioaddr + DATA_1, buf, length >> 1);
1209
1210 /* The odd last byte, if there is one, goes in the control word. */
1211 outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1);
1212 }
1213
1214 /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */
1215 outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) |
1216 (inw(ioaddr + INTERRUPT) & 0xff00),
1217 ioaddr + INTERRUPT);
1218
1219 /* The chip does the rest of the work. */
1220 outw(MC_ENQUEUE , ioaddr + MMU_CMD);
1221
1222 smc->saved_skb = NULL;
1223 dev_kfree_skb_irq(skb);
1224 dev->trans_start = jiffies;
1225 netif_start_queue(dev);
1da177e4
LT		 1226}
1227
1228/*====================================================================*/
1229
1230static void smc_tx_timeout(struct net_device *dev)
1231{
1232 struct smc_private *smc = netdev_priv(dev);
906da809 1233 unsigned int ioaddr = dev->base_addr;
1da177e4 1234
636b8116
JP		 1235 netdev_notice(dev, "transmit timed out, Tx_status %2.2x status %4.4x.\n",
1236 inw(ioaddr)&0xff, inw(ioaddr + 2));
6fb7298c 1237 dev->stats.tx_errors++;
1da177e4 1238 smc_reset(dev);
1ae5dc34 1239 dev->trans_start = jiffies; /* prevent tx timeout */
1da177e4
LT		 1240 smc->saved_skb = NULL;
1241 netif_wake_queue(dev);
1242}
1243
dbf02fae
SH		 1244static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
1245 struct net_device *dev)
1da177e4
LT		 1246{
1247 struct smc_private *smc = netdev_priv(dev);
906da809 1248 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1249 u_short num_pages;
1250 short time_out, ir;
85e27831 1251 unsigned long flags;
1da177e4
LT		 1252
1253 netif_stop_queue(dev);
1254
636b8116
JP		 1255 netdev_dbg(dev, "smc_start_xmit(length = %d) called, status %04x\n",
1256 skb->len, inw(ioaddr + 2));
1da177e4
LT		 1257
1258 if (smc->saved_skb) {
1259 /* THIS SHOULD NEVER HAPPEN. */
6fb7298c 1260 dev->stats.tx_aborted_errors++;
636b8116
JP		 1261 netdev_printk(KERN_DEBUG, dev,
1262 "Internal error -- sent packet while busy\n");
5b548140 1263 return NETDEV_TX_BUSY;
1da177e4
LT		 1264 }
1265 smc->saved_skb = skb;
1266
1267 num_pages = skb->len >> 8;
1268
1269 if (num_pages > 7) {
636b8116 1270 netdev_err(dev, "Far too big packet error: %d pages\n", num_pages);
1da177e4
LT		 1271 dev_kfree_skb (skb);
1272 smc->saved_skb = NULL;
6fb7298c 1273 dev->stats.tx_dropped++;
6ed10654 1274 return NETDEV_TX_OK; /* Do not re-queue this packet. */
1da177e4
LT		 1275 }
1276 /* A packet is now waiting. */
1277 smc->packets_waiting++;
1278
85e27831 1279 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 1280 SMC_SELECT_BANK(2); /* Paranoia, we should always be in window 2 */
1281
1282 /* need MC_RESET to keep the memory consistent. errata? */
1283 if (smc->rx_ovrn) {
1284 outw(MC_RESET, ioaddr + MMU_CMD);
1285 smc->rx_ovrn = 0;
1286 }
1287
1288 /* Allocate the memory; send the packet now if we win. */
1289 outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD);
1290 for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) {
1291 ir = inw(ioaddr+INTERRUPT);
1292 if (ir & IM_ALLOC_INT) {
1293 /* Acknowledge the interrupt, send the packet. */
1294 outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT);
1295 smc_hardware_send_packet(dev); /* Send the packet now.. */
85e27831 1296 spin_unlock_irqrestore(&smc->lock, flags);
6ed10654 1297 return NETDEV_TX_OK;
1da177e4
LT		 1298 }
1299 }
1300
1301 /* Otherwise defer until the Tx-space-allocated interrupt. */
dd0fab5b 1302 pr_debug("%s: memory allocation deferred.\n", dev->name);
1da177e4 1303 outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT);
85e27831 1304 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4 1305
6ed10654 1306 return NETDEV_TX_OK;
1da177e4
LT		 1307}
1308
1309/*======================================================================
1310
1311 Handle a Tx anomolous event. Entered while in Window 2.
1312
1313======================================================================*/
1314
1315static void smc_tx_err(struct net_device * dev)
1316{
1317 struct smc_private *smc = netdev_priv(dev);
906da809 1318 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1319 int saved_packet = inw(ioaddr + PNR_ARR) & 0xff;
1320 int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f;
1321 int tx_status;
1322
1323 /* select this as the packet to read from */
1324 outw(packet_no, ioaddr + PNR_ARR);
1325
1326 /* read the first word from this packet */
1327 outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER);
1328
1329 tx_status = inw(ioaddr + DATA_1);
1330
6fb7298c
SH		 1331 dev->stats.tx_errors++;
1332 if (tx_status & TS_LOSTCAR) dev->stats.tx_carrier_errors++;
1333 if (tx_status & TS_LATCOL) dev->stats.tx_window_errors++;
1da177e4 1334 if (tx_status & TS_16COL) {
6fb7298c 1335 dev->stats.tx_aborted_errors++;
1da177e4
LT		 1336 smc->tx_err++;
1337 }
1338
1339 if (tx_status & TS_SUCCESS) {
636b8116 1340 netdev_notice(dev, "Successful packet caused error interrupt?\n");
1da177e4
LT		 1341 }
1342 /* re-enable transmit */
1343 SMC_SELECT_BANK(0);
1344 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1345 SMC_SELECT_BANK(2);
1346
1347 outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */
1348
1349 /* one less packet waiting for me */
1350 smc->packets_waiting--;
1351
1352 outw(saved_packet, ioaddr + PNR_ARR);
1da177e4
LT		 1353}
1354
1355/*====================================================================*/
1356
1357static void smc_eph_irq(struct net_device *dev)
1358{
1359 struct smc_private *smc = netdev_priv(dev);
906da809 1360 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1361 u_short card_stats, ephs;
1362
1363 SMC_SELECT_BANK(0);
1364 ephs = inw(ioaddr + EPH);
dd0fab5b 1365 pr_debug("%s: Ethernet protocol handler interrupt, status"
1da177e4
LT		 1366 " %4.4x.\n", dev->name, ephs);
1367 /* Could be a counter roll-over warning: update stats. */
1368 card_stats = inw(ioaddr + COUNTER);
1369 /* single collisions */
6fb7298c 1370 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT		 1371 card_stats >>= 4;
1372 /* multiple collisions */
6fb7298c 1373 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT		 1374#if 0 /* These are for when linux supports these statistics */
1375 card_stats >>= 4; /* deferred */
1376 card_stats >>= 4; /* excess deferred */
1377#endif
1378 /* If we had a transmit error we must re-enable the transmitter. */
1379 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1380
1381 /* Clear a link error interrupt. */
1382 SMC_SELECT_BANK(1);
1383 outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL);
1384 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1385 ioaddr + CONTROL);
1386 SMC_SELECT_BANK(2);
1387}
1388
1389/*====================================================================*/
1390
7d12e780 1391static irqreturn_t smc_interrupt(int irq, void *dev_id)
1da177e4
LT		 1392{
1393 struct net_device *dev = dev_id;
1394 struct smc_private *smc = netdev_priv(dev);
906da809 1395 unsigned int ioaddr;
1da177e4
LT		 1396 u_short saved_bank, saved_pointer, mask, status;
1397 unsigned int handled = 1;
1398 char bogus_cnt = INTR_WORK; /* Work we are willing to do. */
1399
1400 if (!netif_device_present(dev))
1401 return IRQ_NONE;
1402
1403 ioaddr = dev->base_addr;
1404
dd0fab5b 1405 pr_debug("%s: SMC91c92 interrupt %d at %#x.\n", dev->name,
1da177e4
LT		 1406 irq, ioaddr);
1407
85e27831 1408 spin_lock(&smc->lock);
1da177e4
LT		 1409 smc->watchdog = 0;
1410 saved_bank = inw(ioaddr + BANK_SELECT);
1411 if ((saved_bank & 0xff00) != 0x3300) {
1412 /* The device does not exist -- the card could be off-line, or
1413 maybe it has been ejected. */
dd0fab5b 1414 pr_debug("%s: SMC91c92 interrupt %d for non-existent"
1da177e4
LT		 1415 "/ejected device.\n", dev->name, irq);
1416 handled = 0;
1417 goto irq_done;
1418 }
1419
1420 SMC_SELECT_BANK(2);
1421 saved_pointer = inw(ioaddr + POINTER);
1422 mask = inw(ioaddr + INTERRUPT) >> 8;
1423 /* clear all interrupts */
1424 outw(0, ioaddr + INTERRUPT);
1425
1426 do { /* read the status flag, and mask it */
1427 status = inw(ioaddr + INTERRUPT) & 0xff;
dd0fab5b 1428 pr_debug("%s: Status is %#2.2x (mask %#2.2x).\n", dev->name,
1da177e4
LT		 1429 status, mask);
1430 if ((status & mask) == 0) {
1431 if (bogus_cnt == INTR_WORK)
1432 handled = 0;
1433 break;
1434 }
1435 if (status & IM_RCV_INT) {
1436 /* Got a packet(s). */
1437 smc_rx(dev);
1438 }
1439 if (status & IM_TX_INT) {
1440 smc_tx_err(dev);
1441 outw(IM_TX_INT, ioaddr + INTERRUPT);
1442 }
1443 status &= mask;
1444 if (status & IM_TX_EMPTY_INT) {
1445 outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT);
1446 mask &= ~IM_TX_EMPTY_INT;
6fb7298c 1447 dev->stats.tx_packets += smc->packets_waiting;
1da177e4
LT		 1448 smc->packets_waiting = 0;
1449 }
1450 if (status & IM_ALLOC_INT) {
1451 /* Clear this interrupt so it doesn't happen again */
1452 mask &= ~IM_ALLOC_INT;
1453
1454 smc_hardware_send_packet(dev);
1455
1456 /* enable xmit interrupts based on this */
1457 mask |= (IM_TX_EMPTY_INT | IM_TX_INT);
1458
1459 /* and let the card send more packets to me */
1460 netif_wake_queue(dev);
1461 }
1462 if (status & IM_RX_OVRN_INT) {
6fb7298c
SH		 1463 dev->stats.rx_errors++;
1464 dev->stats.rx_fifo_errors++;
1da177e4
LT		 1465 if (smc->duplex)
1466 smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */
1467 outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT);
1468 }
1469 if (status & IM_EPH_INT)
1470 smc_eph_irq(dev);
1471 } while (--bogus_cnt);
1472
dd0fab5b 1473 pr_debug(" Restoring saved registers mask %2.2x bank %4.4x"
1da177e4
LT		 1474 " pointer %4.4x.\n", mask, saved_bank, saved_pointer);
1475
1476 /* restore state register */
1477 outw((mask<<8), ioaddr + INTERRUPT);
1478 outw(saved_pointer, ioaddr + POINTER);
1479 SMC_SELECT_BANK(saved_bank);
1480
dd0fab5b 1481 pr_debug("%s: Exiting interrupt IRQ%d.\n", dev->name, irq);
1da177e4
LT		 1482
1483irq_done:
1484
1485 if ((smc->manfid == MANFID_OSITECH) &&
1486 (smc->cardid != PRODID_OSITECH_SEVEN)) {
1487 /* Retrigger interrupt if needed */
1488 mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR);
1489 set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR);
1490 }
1491 if (smc->manfid == MANFID_MOTOROLA) {
1492 u_char cor;
1493 cor = readb(smc->base + MOT_UART + CISREG_COR);
1494 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR);
1495 writeb(cor, smc->base + MOT_UART + CISREG_COR);
1496 cor = readb(smc->base + MOT_LAN + CISREG_COR);
1497 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR);
1498 writeb(cor, smc->base + MOT_LAN + CISREG_COR);
1499 }
9735b7ef
KK		 1500
1501 if ((smc->base != NULL) && /* Megahertz MFC's */
1502 (smc->manfid == MANFID_MEGAHERTZ) &&
1503 (smc->cardid == PRODID_MEGAHERTZ_EM3288)) {
1504
1505 u_char tmp;
1506 tmp = readb(smc->base+MEGAHERTZ_ISR);
1507 tmp = readb(smc->base+MEGAHERTZ_ISR);
1508
1509 /* Retrigger interrupt if needed */
1510 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1511 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1da177e4 1512 }
9735b7ef 1513
85e27831 1514 spin_unlock(&smc->lock);
1da177e4
LT		 1515 return IRQ_RETVAL(handled);
1516}
1517
1518/*====================================================================*/
1519
1520static void smc_rx(struct net_device *dev)
1521{
906da809 1522 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1523 int rx_status;
1524 int packet_length; /* Caution: not frame length, rather words
1525 to transfer from the chip. */
1526
1527 /* Assertion: we are in Window 2. */
1528
1529 if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) {
636b8116 1530 netdev_err(dev, "smc_rx() with nothing on Rx FIFO\n");
1da177e4
LT		 1531 return;
1532 }
1533
1534 /* Reset the read pointer, and read the status and packet length. */
1535 outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER);
1536 rx_status = inw(ioaddr + DATA_1);
1537 packet_length = inw(ioaddr + DATA_1) & 0x07ff;
1538
dd0fab5b 1539 pr_debug("%s: Receive status %4.4x length %d.\n",
1da177e4
LT		 1540 dev->name, rx_status, packet_length);
1541
1542 if (!(rx_status & RS_ERRORS)) {
1543 /* do stuff to make a new packet */
1544 struct sk_buff *skb;
1545
1546 /* Note: packet_length adds 5 or 6 extra bytes here! */
1547 skb = dev_alloc_skb(packet_length+2);
1548
1549 if (skb == NULL) {
dd0fab5b 1550 pr_debug("%s: Low memory, packet dropped.\n", dev->name);
6fb7298c 1551 dev->stats.rx_dropped++;
1da177e4
LT		 1552 outw(MC_RELEASE, ioaddr + MMU_CMD);
1553 return;
1554 }
1555
1556 packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6);
1557 skb_reserve(skb, 2);
1558 insw(ioaddr+DATA_1, skb_put(skb, packet_length),
1559 (packet_length+1)>>1);
1560 skb->protocol = eth_type_trans(skb, dev);
1561
1da177e4
LT		 1562 netif_rx(skb);
1563 dev->last_rx = jiffies;
6fb7298c
SH		 1564 dev->stats.rx_packets++;
1565 dev->stats.rx_bytes += packet_length;
1da177e4 1566 if (rx_status & RS_MULTICAST)
6fb7298c 1567 dev->stats.multicast++;
1da177e4
LT		 1568 } else {
1569 /* error ... */
6fb7298c 1570 dev->stats.rx_errors++;
1da177e4 1571
6fb7298c 1572 if (rx_status & RS_ALGNERR) dev->stats.rx_frame_errors++;
1da177e4 1573 if (rx_status & (RS_TOOSHORT | RS_TOOLONG))
6fb7298c
SH		 1574 dev->stats.rx_length_errors++;
1575 if (rx_status & RS_BADCRC) dev->stats.rx_crc_errors++;
1da177e4
LT		 1576 }
1577 /* Let the MMU free the memory of this packet. */
1578 outw(MC_RELEASE, ioaddr + MMU_CMD);
1da177e4
LT		 1579}
1580
1da177e4
LT		 1581/*======================================================================
1582
1583 Set the receive mode.
1584
1585 This routine is used by both the protocol level to notify us of
1586 promiscuous/multicast mode changes, and by the open/reset code to
1587 initialize the Rx registers. We always set the multicast list and
1588 leave the receiver running.
1589
1590======================================================================*/
1591
1592static void set_rx_mode(struct net_device *dev)
1593{
906da809 1594 unsigned int ioaddr = dev->base_addr;
1da177e4 1595 struct smc_private *smc = netdev_priv(dev);
a6d37024 1596 unsigned char multicast_table[8];
1da177e4
LT		 1597 unsigned long flags;
1598 u_short rx_cfg_setting;
a6d37024
KK		 1599 int i;
1600
1601 memset(multicast_table, 0, sizeof(multicast_table));
1da177e4
LT		 1602
1603 if (dev->flags & IFF_PROMISC) {
1da177e4
LT		 1604 rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti;
1605 } else if (dev->flags & IFF_ALLMULTI)
1606 rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti;
1607 else {
4cd24eaf 1608 if (!netdev_mc_empty(dev)) {
22bedad3 1609 struct netdev_hw_addr *ha;
91fea585 1610
22bedad3
JP		 1611 netdev_for_each_mc_addr(ha, dev) {
1612 u_int position = ether_crc(6, ha->addr);
91fea585
JP		 1613 multicast_table[position >> 29] |= 1 << ((position >> 26) & 7);
1614 }
1da177e4
LT		 1615 }
1616 rx_cfg_setting = RxStripCRC | RxEnable;
1617 }
1618
1619 /* Load MC table and Rx setting into the chip without interrupts. */
1620 spin_lock_irqsave(&smc->lock, flags);
1621 SMC_SELECT_BANK(3);
a6d37024
KK		 1622 for (i = 0; i < 8; i++)
1623 outb(multicast_table[i], ioaddr + MULTICAST0 + i);
1da177e4
LT		 1624 SMC_SELECT_BANK(0);
1625 outw(rx_cfg_setting, ioaddr + RCR);
1626 SMC_SELECT_BANK(2);
1627 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1628}
1629
1630/*======================================================================
1631
1632 Senses when a card's config changes. Here, it's coax or TP.
1633
1634======================================================================*/
1635
1636static int s9k_config(struct net_device *dev, struct ifmap *map)
1637{
1638 struct smc_private *smc = netdev_priv(dev);
1639 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1640 if (smc->cfg & CFG_MII_SELECT)
1641 return -EOPNOTSUPP;
1642 else if (map->port > 2)
1643 return -EINVAL;
1644 dev->if_port = map->port;
636b8116 1645 netdev_info(dev, "switched to %s port\n", if_names[dev->if_port]);
1da177e4
LT		 1646 smc_reset(dev);
1647 }
1648 return 0;
1649}
1650
1651/*======================================================================
1652
1653 Reset the chip, reloading every register that might be corrupted.
1654
1655======================================================================*/
1656
1657/*
1658 Set transceiver type, perhaps to something other than what the user
1659 specified in dev->if_port.
1660*/
1661static void smc_set_xcvr(struct net_device *dev, int if_port)
1662{
1663 struct smc_private *smc = netdev_priv(dev);
906da809 1664 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1665 u_short saved_bank;
1666
1667 saved_bank = inw(ioaddr + BANK_SELECT);
1668 SMC_SELECT_BANK(1);
1669 if (if_port == 2) {
1670 outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG);
1671 if ((smc->manfid == MANFID_OSITECH) &&
1672 (smc->cardid != PRODID_OSITECH_SEVEN))
1673 set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1674 smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002);
1675 } else {
1676 outw(smc->cfg, ioaddr + CONFIG);
1677 if ((smc->manfid == MANFID_OSITECH) &&
1678 (smc->cardid != PRODID_OSITECH_SEVEN))
1679 mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1680 smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001);
1681 }
1682 SMC_SELECT_BANK(saved_bank);
1683}
1684
1685static void smc_reset(struct net_device *dev)
1686{
906da809 1687 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1688 struct smc_private *smc = netdev_priv(dev);
1689 int i;
1690
dd0fab5b 1691 pr_debug("%s: smc91c92 reset called.\n", dev->name);
1da177e4
LT		 1692
1693 /* The first interaction must be a write to bring the chip out
1694 of sleep mode. */
1695 SMC_SELECT_BANK(0);
1696 /* Reset the chip. */
1697 outw(RCR_SOFTRESET, ioaddr + RCR);
1698 udelay(10);
1699
1700 /* Clear the transmit and receive configuration registers. */
1701 outw(RCR_CLEAR, ioaddr + RCR);
1702 outw(TCR_CLEAR, ioaddr + TCR);
1703
1704 /* Set the Window 1 control, configuration and station addr registers.
1705 No point in writing the I/O base register ;-> */
1706 SMC_SELECT_BANK(1);
d6e05edc 1707 /* Automatically release successfully transmitted packets,
1da177e4
LT		 1708 Accept link errors, counter and Tx error interrupts. */
1709 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1710 ioaddr + CONTROL);
1711 smc_set_xcvr(dev, dev->if_port);
1712 if ((smc->manfid == MANFID_OSITECH) &&
1713 (smc->cardid != PRODID_OSITECH_SEVEN))
1714 outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) |
1715 (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00),
1716 ioaddr - 0x10 + OSITECH_AUI_PWR);
1717
1718 /* Fill in the physical address. The databook is wrong about the order! */
1719 for (i = 0; i < 6; i += 2)
1720 outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i],
1721 ioaddr + ADDR0 + i);
1722
1723 /* Reset the MMU */
1724 SMC_SELECT_BANK(2);
1725 outw(MC_RESET, ioaddr + MMU_CMD);
1726 outw(0, ioaddr + INTERRUPT);
1727
1728 /* Re-enable the chip. */
1729 SMC_SELECT_BANK(0);
1730 outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) |
1731 TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR);
1732 set_rx_mode(dev);
1733
1734 if (smc->cfg & CFG_MII_SELECT) {
1735 SMC_SELECT_BANK(3);
1736
1737 /* Reset MII */
1738 mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000);
1739
1740 /* Advertise 100F, 100H, 10F, 10H */
1741 mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1);
1742
1743 /* Restart MII autonegotiation */
1744 mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000);
1745 mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200);
1746 }
1747
1748 /* Enable interrupts. */
1749 SMC_SELECT_BANK(2);
1750 outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8,
1751 ioaddr + INTERRUPT);
1752}
1753
1754/*======================================================================
1755
1756 Media selection timer routine
1757
1758======================================================================*/
1759
1760static void media_check(u_long arg)
1761{
1762 struct net_device *dev = (struct net_device *) arg;
1763 struct smc_private *smc = netdev_priv(dev);
906da809 1764 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1765 u_short i, media, saved_bank;
1766 u_short link;
85e27831
K		 1767 unsigned long flags;
1768
1769 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 1770
1771 saved_bank = inw(ioaddr + BANK_SELECT);
1772
1773 if (!netif_device_present(dev))
1774 goto reschedule;
1775
1776 SMC_SELECT_BANK(2);
1777
1778 /* need MC_RESET to keep the memory consistent. errata? */
1779 if (smc->rx_ovrn) {
1780 outw(MC_RESET, ioaddr + MMU_CMD);
1781 smc->rx_ovrn = 0;
1782 }
1783 i = inw(ioaddr + INTERRUPT);
1784 SMC_SELECT_BANK(0);
1785 media = inw(ioaddr + EPH) & EPH_LINK_OK;
1786 SMC_SELECT_BANK(1);
1787 media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1;
1788
2a915157
KK		 1789 SMC_SELECT_BANK(saved_bank);
1790 spin_unlock_irqrestore(&smc->lock, flags);
1791
1da177e4
LT		 1792 /* Check for pending interrupt with watchdog flag set: with
1793 this, we can limp along even if the interrupt is blocked */
1794 if (smc->watchdog++ && ((i>>8) & i)) {
1795 if (!smc->fast_poll)
636b8116 1796 netdev_info(dev, "interrupt(s) dropped!\n");
2a915157 1797 local_irq_save(flags);
e363d138 1798 smc_interrupt(dev->irq, dev);
2a915157 1799 local_irq_restore(flags);
1da177e4
LT		 1800 smc->fast_poll = HZ;
1801 }
1802 if (smc->fast_poll) {
1803 smc->fast_poll--;
1804 smc->media.expires = jiffies + HZ/100;
1805 add_timer(&smc->media);
1da177e4
LT		 1806 return;
1807 }
1808
2a915157
KK		 1809 spin_lock_irqsave(&smc->lock, flags);
1810
1811 saved_bank = inw(ioaddr + BANK_SELECT);
1812
1da177e4
LT		 1813 if (smc->cfg & CFG_MII_SELECT) {
1814 if (smc->mii_if.phy_id < 0)
1815 goto reschedule;
1816
1817 SMC_SELECT_BANK(3);
1818 link = mdio_read(dev, smc->mii_if.phy_id, 1);
1819 if (!link || (link == 0xffff)) {
636b8116 1820 netdev_info(dev, "MII is missing!\n");
1da177e4
LT		 1821 smc->mii_if.phy_id = -1;
1822 goto reschedule;
1823 }
1824
1825 link &= 0x0004;
1826 if (link != smc->link_status) {
1827 u_short p = mdio_read(dev, smc->mii_if.phy_id, 5);
636b8116 1828 netdev_info(dev, "%s link beat\n", link ? "found" : "lost");
1da177e4
LT		 1829 smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40))
1830 ? TCR_FDUPLX : 0);
1831 if (link) {
636b8116
JP		 1832 netdev_info(dev, "autonegotiation complete: "
1833 "%dbaseT-%cD selected\n",
1834 (p & 0x0180) ? 100 : 10, smc->duplex ? 'F' : 'H');
1da177e4
LT		 1835 }
1836 SMC_SELECT_BANK(0);
1837 outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR);
1838 smc->link_status = link;
1839 }
1840 goto reschedule;
1841 }
1842
1843 /* Ignore collisions unless we've had no rx's recently */
4851d3aa 1844 if (time_after(jiffies, dev->last_rx + HZ)) {
1da177e4
LT		 1845 if (smc->tx_err || (smc->media_status & EPH_16COL))
1846 media |= EPH_16COL;
1847 }
1848 smc->tx_err = 0;
1849
1850 if (media != smc->media_status) {
1851 if ((media & smc->media_status & 1) &&
1852 ((smc->media_status ^ media) & EPH_LINK_OK))
636b8116
JP		 1853 netdev_info(dev, "%s link beat\n",
1854 smc->media_status & EPH_LINK_OK ? "lost" : "found");
1da177e4
LT		 1855 else if ((media & smc->media_status & 2) &&
1856 ((smc->media_status ^ media) & EPH_16COL))
636b8116
JP		 1857 netdev_info(dev, "coax cable %s\n",
1858 media & EPH_16COL ? "problem" : "ok");
1da177e4
LT		 1859 if (dev->if_port == 0) {
1860 if (media & 1) {
1861 if (media & EPH_LINK_OK)
636b8116 1862 netdev_info(dev, "flipped to 10baseT\n");
1da177e4
LT		 1863 else
1864 smc_set_xcvr(dev, 2);
1865 } else {
1866 if (media & EPH_16COL)
1867 smc_set_xcvr(dev, 1);
1868 else
636b8116 1869 netdev_info(dev, "flipped to 10base2\n");
1da177e4
LT		 1870 }
1871 }
1872 smc->media_status = media;
1873 }
1874
1875reschedule:
1876 smc->media.expires = jiffies + HZ;
1877 add_timer(&smc->media);
1878 SMC_SELECT_BANK(saved_bank);
85e27831 1879 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1880}
1881
1882static int smc_link_ok(struct net_device *dev)
1883{
906da809 1884 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1885 struct smc_private *smc = netdev_priv(dev);
1886
1887 if (smc->cfg & CFG_MII_SELECT) {
1888 return mii_link_ok(&smc->mii_if);
1889 } else {
1890 SMC_SELECT_BANK(0);
1891 return inw(ioaddr + EPH) & EPH_LINK_OK;
1892 }
1893}
1894
1895static int smc_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1896{
1897 u16 tmp;
906da809 1898 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1899
1900 ecmd->supported = (SUPPORTED_TP | SUPPORTED_AUI |
1901 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full);
1902
1903 SMC_SELECT_BANK(1);
1904 tmp = inw(ioaddr + CONFIG);
1905 ecmd->port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP;
1906 ecmd->transceiver = XCVR_INTERNAL;
1907 ecmd->speed = SPEED_10;
1908 ecmd->phy_address = ioaddr + MGMT;
1909
1910 SMC_SELECT_BANK(0);
1911 tmp = inw(ioaddr + TCR);
1912 ecmd->duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF;
1913
1914 return 0;
1915}
1916
1917static int smc_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1918{
1919 u16 tmp;
906da809 1920 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1921
1922 if (ecmd->speed != SPEED_10)
1923 return -EINVAL;
1924 if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
1925 return -EINVAL;
1926 if (ecmd->port != PORT_TP && ecmd->port != PORT_AUI)
1927 return -EINVAL;
1928 if (ecmd->transceiver != XCVR_INTERNAL)
1929 return -EINVAL;
1930
1931 if (ecmd->port == PORT_AUI)
1932 smc_set_xcvr(dev, 1);
1933 else
1934 smc_set_xcvr(dev, 0);
1935
1936 SMC_SELECT_BANK(0);
1937 tmp = inw(ioaddr + TCR);
1938 if (ecmd->duplex == DUPLEX_FULL)
1939 tmp |= TCR_FDUPLX;
1940 else
1941 tmp &= ~TCR_FDUPLX;
1942 outw(tmp, ioaddr + TCR);
1943
1944 return 0;
1945}
1946
1947static int check_if_running(struct net_device *dev)
1948{
1949 if (!netif_running(dev))
1950 return -EINVAL;
1951 return 0;
1952}
1953
1954static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1955{
1956 strcpy(info->driver, DRV_NAME);
1957 strcpy(info->version, DRV_VERSION);
1958}
1959
1960static int smc_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1961{
1962 struct smc_private *smc = netdev_priv(dev);
906da809 1963 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1964 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1965 int ret;
2a915157 1966 unsigned long flags;
1da177e4 1967
2a915157 1968 spin_lock_irqsave(&smc->lock, flags);
85e27831 1969 SMC_SELECT_BANK(3);
1da177e4
LT		 1970 if (smc->cfg & CFG_MII_SELECT)
1971 ret = mii_ethtool_gset(&smc->mii_if, ecmd);
1972 else
1973 ret = smc_netdev_get_ecmd(dev, ecmd);
1da177e4 1974 SMC_SELECT_BANK(saved_bank);
2a915157 1975 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1976 return ret;
1977}
1978
1979static int smc_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1980{
1981 struct smc_private *smc = netdev_priv(dev);
906da809 1982 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1983 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1984 int ret;
2a915157 1985 unsigned long flags;
1da177e4 1986
2a915157 1987 spin_lock_irqsave(&smc->lock, flags);
85e27831 1988 SMC_SELECT_BANK(3);
1da177e4
LT		 1989 if (smc->cfg & CFG_MII_SELECT)
1990 ret = mii_ethtool_sset(&smc->mii_if, ecmd);
1991 else
1992 ret = smc_netdev_set_ecmd(dev, ecmd);
1da177e4 1993 SMC_SELECT_BANK(saved_bank);
2a915157 1994 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1995 return ret;
1996}
1997
1998static u32 smc_get_link(struct net_device *dev)
1999{
2000 struct smc_private *smc = netdev_priv(dev);
906da809 2001 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 2002 u16 saved_bank = inw(ioaddr + BANK_SELECT);
2003 u32 ret;
2a915157 2004 unsigned long flags;
1da177e4 2005
2a915157 2006 spin_lock_irqsave(&smc->lock, flags);
85e27831 2007 SMC_SELECT_BANK(3);
1da177e4 2008 ret = smc_link_ok(dev);
1da177e4 2009 SMC_SELECT_BANK(saved_bank);
2a915157 2010 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 2011 return ret;
2012}
2013
1da177e4
LT		 2014static int smc_nway_reset(struct net_device *dev)
2015{
2016 struct smc_private *smc = netdev_priv(dev);
2017 if (smc->cfg & CFG_MII_SELECT) {
906da809 2018 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 2019 u16 saved_bank = inw(ioaddr + BANK_SELECT);
2020 int res;
2021
2022 SMC_SELECT_BANK(3);
2023 res = mii_nway_restart(&smc->mii_if);
2024 SMC_SELECT_BANK(saved_bank);
2025
2026 return res;
2027 } else
2028 return -EOPNOTSUPP;
2029}
2030
7282d491 2031static const struct ethtool_ops ethtool_ops = {
1da177e4
LT		 2032 .begin = check_if_running,
2033 .get_drvinfo = smc_get_drvinfo,
2034 .get_settings = smc_get_settings,
2035 .set_settings = smc_set_settings,
2036 .get_link = smc_get_link,
1da177e4
LT		 2037 .nway_reset = smc_nway_reset,
2038};
2039
2040static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
2041{
2042 struct smc_private *smc = netdev_priv(dev);
2043 struct mii_ioctl_data *mii = if_mii(rq);
2044 int rc = 0;
2045 u16 saved_bank;
906da809 2046 unsigned int ioaddr = dev->base_addr;
2a915157 2047 unsigned long flags;
1da177e4
LT		 2048
2049 if (!netif_running(dev))
2050 return -EINVAL;
2051
2a915157 2052 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 2053 saved_bank = inw(ioaddr + BANK_SELECT);
2054 SMC_SELECT_BANK(3);
2055 rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL);
2056 SMC_SELECT_BANK(saved_bank);
2a915157 2057 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 2058 return rc;
2059}
2060
5c672220
DB		 2061static struct pcmcia_device_id smc91c92_ids[] = {
2062 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501),
2063 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a),
2064 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63),
2065 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63),
2066 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef),
2067 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef),
2068 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c),
2069 PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e),
d277ad0e
K		 2070 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9),
2071 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed),
5c672220
DB		 2072 PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020),
2073 PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023),
2074 PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb),
2075 PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc),
2076 PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1),
2077 PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5),
2078 PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9),
2079 PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953),
2080 PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a),
d277ad0e
K		 2081 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314),
2082 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a),
5c672220
DB		 2083 PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc),
2084 PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9),
2085 PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d),
2086 /* These conflict with other cards! */
2087 /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */
2088 /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */
2089 PCMCIA_DEVICE_NULL,
2090};
2091MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids);
2092
1da177e4
LT		 2093static struct pcmcia_driver smc91c92_cs_driver = {
2094 .owner = THIS_MODULE,
2095 .drv = {
2096 .name = "smc91c92_cs",
2097 },
15b99ac1 2098 .probe = smc91c92_probe,
cc3b4866 2099 .remove = smc91c92_detach,
5c672220 2100 .id_table = smc91c92_ids,
98e4c28b
DB		 2101 .suspend = smc91c92_suspend,
2102 .resume = smc91c92_resume,
1da177e4
LT		 2103};
2104
2105static int __init init_smc91c92_cs(void)
2106{
2107 return pcmcia_register_driver(&smc91c92_cs_driver);
2108}
2109
2110static void __exit exit_smc91c92_cs(void)
2111{
2112 pcmcia_unregister_driver(&smc91c92_cs_driver);
1da177e4
LT		 2113}
2114
2115module_init(init_smc91c92_cs);
2116module_exit(exit_smc91c92_cs);
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