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pcmcia: move local definitions out of include/pcmcia/cs.h
[mirror_ubuntu-hirsute-kernel.git] / drivers / net / pcmcia / smc91c92_cs.c
CommitLineData
1da177e4
LT		 1/*======================================================================
2
3 A PCMCIA ethernet driver for SMC91c92-based cards.
4
5 This driver supports Megahertz PCMCIA ethernet cards; and
6 Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem
7 multifunction cards.
8
9 Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net
10
11 smc91c92_cs.c 1.122 2002/10/25 06:26:39
12
13 This driver contains code written by Donald Becker
14 (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au),
15 David Hinds (dahinds@users.sourceforge.net), and Erik Stahlman
16 (erik@vt.edu). Donald wrote the SMC 91c92 code using parts of
17 Erik's SMC 91c94 driver. Rowan wrote a similar driver, and I've
18 incorporated some parts of his driver here. I (Dave) wrote most
19 of the PCMCIA glue code, and the Ositech support code. Kelly
20 Stephens (kstephen@holli.com) added support for the Motorola
21 Mariner, with help from Allen Brost.
22
23 This software may be used and distributed according to the terms of
24 the GNU General Public License, incorporated herein by reference.
25
26======================================================================*/
27
28#include <linux/module.h>
29#include <linux/kernel.h>
30#include <linux/init.h>
31#include <linux/slab.h>
32#include <linux/string.h>
33#include <linux/timer.h>
34#include <linux/interrupt.h>
35#include <linux/delay.h>
36#include <linux/crc32.h>
37#include <linux/netdevice.h>
38#include <linux/etherdevice.h>
39#include <linux/skbuff.h>
40#include <linux/if_arp.h>
41#include <linux/ioport.h>
42#include <linux/ethtool.h>
43#include <linux/mii.h>
4851d3aa 44#include <linux/jiffies.h>
75bf758f 45#include <linux/firmware.h>
1da177e4 46
1da177e4
LT		 47#include <pcmcia/cs.h>
48#include <pcmcia/cistpl.h>
49#include <pcmcia/cisreg.h>
50#include <pcmcia/ciscode.h>
51#include <pcmcia/ds.h>
50db3fdb 52#include <pcmcia/ss.h>
1da177e4
LT		 53
54#include <asm/io.h>
55#include <asm/system.h>
56#include <asm/uaccess.h>
57
1da177e4
LT		 58/*====================================================================*/
59
f71e1309 60static const char *if_names[] = { "auto", "10baseT", "10base2"};
1da177e4 61
75bf758f
JSR		 62/* Firmware name */
63#define FIRMWARE_NAME "ositech/Xilinx7OD.bin"
64
1da177e4
LT		 65/* Module parameters */
66
67MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver");
68MODULE_LICENSE("GPL");
75bf758f 69MODULE_FIRMWARE(FIRMWARE_NAME);
1da177e4
LT		 70
71#define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
72
73/*
74 Transceiver/media type.
75 0 = auto
76 1 = 10baseT (and autoselect if #define AUTOSELECT),
77 2 = AUI/10base2,
78*/
79INT_MODULE_PARM(if_port, 0);
80
1da177e4
LT		 81
82#define DRV_NAME "smc91c92_cs"
d5b20697 83#define DRV_VERSION "1.123"
1da177e4
LT		 84
85/*====================================================================*/
86
87/* Operational parameter that usually are not changed. */
88
89/* Time in jiffies before concluding Tx hung */
90#define TX_TIMEOUT ((400*HZ)/1000)
91
92/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
93#define INTR_WORK 4
94
95/* Times to check the check the chip before concluding that it doesn't
96 currently have room for another Tx packet. */
97#define MEMORY_WAIT_TIME 8
98
1da177e4 99struct smc_private {
fd238232 100 struct pcmcia_device *p_dev;
1da177e4
LT		 101 spinlock_t lock;
102 u_short manfid;
103 u_short cardid;
6fb7298c 104
1da177e4
LT		 105 struct sk_buff *saved_skb;
106 int packets_waiting;
107 void __iomem *base;
108 u_short cfg;
109 struct timer_list media;
110 int watchdog, tx_err;
111 u_short media_status;
112 u_short fast_poll;
113 u_short link_status;
114 struct mii_if_info mii_if;
115 int duplex;
116 int rx_ovrn;
117};
118
119/* Special definitions for Megahertz multifunction cards */
120#define MEGAHERTZ_ISR 0x0380
121
122/* Special function registers for Motorola Mariner */
123#define MOT_LAN 0x0000
124#define MOT_UART 0x0020
125#define MOT_EEPROM 0x20
126
127#define MOT_NORMAL \
128(COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA)
129
130/* Special function registers for Ositech cards */
131#define OSITECH_AUI_CTL 0x0c
132#define OSITECH_PWRDOWN 0x0d
133#define OSITECH_RESET 0x0e
134#define OSITECH_ISR 0x0f
135#define OSITECH_AUI_PWR 0x0c
136#define OSITECH_RESET_ISR 0x0e
137
138#define OSI_AUI_PWR 0x40
139#define OSI_LAN_PWRDOWN 0x02
140#define OSI_MODEM_PWRDOWN 0x01
141#define OSI_LAN_RESET 0x02
142#define OSI_MODEM_RESET 0x01
143
144/* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */
145#define BANK_SELECT 14 /* Window select register. */
146#define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); }
147
148/* Bank 0 registers. */
149#define TCR 0 /* transmit control register */
150#define TCR_CLEAR 0 /* do NOTHING */
151#define TCR_ENABLE 0x0001 /* if this is 1, we can transmit */
152#define TCR_PAD_EN 0x0080 /* pads short packets to 64 bytes */
153#define TCR_MONCSN 0x0400 /* Monitor Carrier. */
154#define TCR_FDUPLX 0x0800 /* Full duplex mode. */
155#define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN
156
157#define EPH 2 /* Ethernet Protocol Handler report. */
158#define EPH_TX_SUC 0x0001
159#define EPH_SNGLCOL 0x0002
160#define EPH_MULCOL 0x0004
161#define EPH_LTX_MULT 0x0008
162#define EPH_16COL 0x0010
163#define EPH_SQET 0x0020
164#define EPH_LTX_BRD 0x0040
165#define EPH_TX_DEFR 0x0080
166#define EPH_LAT_COL 0x0200
167#define EPH_LOST_CAR 0x0400
168#define EPH_EXC_DEF 0x0800
169#define EPH_CTR_ROL 0x1000
170#define EPH_RX_OVRN 0x2000
171#define EPH_LINK_OK 0x4000
172#define EPH_TX_UNRN 0x8000
173#define MEMINFO 8 /* Memory Information Register */
174#define MEMCFG 10 /* Memory Configuration Register */
175
176/* Bank 1 registers. */
177#define CONFIG 0
178#define CFG_MII_SELECT 0x8000 /* 91C100 only */
179#define CFG_NO_WAIT 0x1000
180#define CFG_FULL_STEP 0x0400
181#define CFG_SET_SQLCH 0x0200
182#define CFG_AUI_SELECT 0x0100
183#define CFG_16BIT 0x0080
184#define CFG_DIS_LINK 0x0040
185#define CFG_STATIC 0x0030
186#define CFG_IRQ_SEL_1 0x0004
187#define CFG_IRQ_SEL_0 0x0002
188#define BASE_ADDR 2
189#define ADDR0 4
190#define GENERAL 10
191#define CONTROL 12
192#define CTL_STORE 0x0001
193#define CTL_RELOAD 0x0002
194#define CTL_EE_SELECT 0x0004
195#define CTL_TE_ENABLE 0x0020
196#define CTL_CR_ENABLE 0x0040
197#define CTL_LE_ENABLE 0x0080
198#define CTL_AUTO_RELEASE 0x0800
199#define CTL_POWERDOWN 0x2000
200
201/* Bank 2 registers. */
202#define MMU_CMD 0
203#define MC_ALLOC 0x20 /* or with number of 256 byte packets */
204#define MC_RESET 0x40
205#define MC_RELEASE 0x80 /* remove and release the current rx packet */
206#define MC_FREEPKT 0xA0 /* Release packet in PNR register */
207#define MC_ENQUEUE 0xC0 /* Enqueue the packet for transmit */
208#define PNR_ARR 2
209#define FIFO_PORTS 4
210#define FP_RXEMPTY 0x8000
211#define POINTER 6
212#define PTR_AUTO_INC 0x0040
213#define PTR_READ 0x2000
214#define PTR_AUTOINC 0x4000
215#define PTR_RCV 0x8000
216#define DATA_1 8
217#define INTERRUPT 12
218#define IM_RCV_INT 0x1
219#define IM_TX_INT 0x2
220#define IM_TX_EMPTY_INT 0x4
221#define IM_ALLOC_INT 0x8
222#define IM_RX_OVRN_INT 0x10
223#define IM_EPH_INT 0x20
224
225#define RCR 4
226enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002,
227 RxEnable = 0x0100, RxStripCRC = 0x0200};
228#define RCR_SOFTRESET 0x8000 /* resets the chip */
229#define RCR_STRIP_CRC 0x200 /* strips CRC */
230#define RCR_ENABLE 0x100 /* IFF this is set, we can receive packets */
231#define RCR_ALMUL 0x4 /* receive all multicast packets */
232#define RCR_PROMISC 0x2 /* enable promiscuous mode */
233
234/* the normal settings for the RCR register : */
235#define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE)
236#define RCR_CLEAR 0x0 /* set it to a base state */
237#define COUNTER 6
238
239/* BANK 3 -- not the same values as in smc9194! */
240#define MULTICAST0 0
241#define MULTICAST2 2
242#define MULTICAST4 4
243#define MULTICAST6 6
244#define MGMT 8
245#define REVISION 0x0a
246
247/* Transmit status bits. */
248#define TS_SUCCESS 0x0001
249#define TS_16COL 0x0010
250#define TS_LATCOL 0x0200
251#define TS_LOSTCAR 0x0400
252
253/* Receive status bits. */
254#define RS_ALGNERR 0x8000
255#define RS_BADCRC 0x2000
256#define RS_ODDFRAME 0x1000
257#define RS_TOOLONG 0x0800
258#define RS_TOOSHORT 0x0400
259#define RS_MULTICAST 0x0001
260#define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)
261
262#define set_bits(v, p) outw(inw(p)|(v), (p))
263#define mask_bits(v, p) outw(inw(p)&(v), (p))
264
265/*====================================================================*/
266
cc3b4866 267static void smc91c92_detach(struct pcmcia_device *p_dev);
15b99ac1 268static int smc91c92_config(struct pcmcia_device *link);
fba395ee 269static void smc91c92_release(struct pcmcia_device *link);
1da177e4
LT		 270
271static int smc_open(struct net_device *dev);
272static int smc_close(struct net_device *dev);
273static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
274static void smc_tx_timeout(struct net_device *dev);
dbf02fae
SH		 275static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
276 struct net_device *dev);
7d12e780 277static irqreturn_t smc_interrupt(int irq, void *dev_id);
1da177e4 278static void smc_rx(struct net_device *dev);
1da177e4
LT		 279static void set_rx_mode(struct net_device *dev);
280static int s9k_config(struct net_device *dev, struct ifmap *map);
281static void smc_set_xcvr(struct net_device *dev, int if_port);
282static void smc_reset(struct net_device *dev);
283static void media_check(u_long arg);
906da809 284static void mdio_sync(unsigned int addr);
1da177e4
LT		 285static int mdio_read(struct net_device *dev, int phy_id, int loc);
286static void mdio_write(struct net_device *dev, int phy_id, int loc, int value);
287static int smc_link_ok(struct net_device *dev);
7282d491 288static const struct ethtool_ops ethtool_ops;
1da177e4 289
9b31b697
SH		 290static const struct net_device_ops smc_netdev_ops = {
291 .ndo_open = smc_open,
292 .ndo_stop = smc_close,
293 .ndo_start_xmit = smc_start_xmit,
294 .ndo_tx_timeout = smc_tx_timeout,
295 .ndo_set_config = s9k_config,
296 .ndo_set_multicast_list = set_rx_mode,
297 .ndo_do_ioctl = &smc_ioctl,
298 .ndo_change_mtu = eth_change_mtu,
299 .ndo_set_mac_address = eth_mac_addr,
300 .ndo_validate_addr = eth_validate_addr,
301};
302
1da177e4
LT		 303/*======================================================================
304
305 smc91c92_attach() creates an "instance" of the driver, allocating
306 local data structures for one device. The device is registered
307 with Card Services.
308
309======================================================================*/
310
15b99ac1 311static int smc91c92_probe(struct pcmcia_device *link)
1da177e4 312{
1da177e4 313 struct smc_private *smc;
1da177e4 314 struct net_device *dev;
1da177e4 315
dd0fab5b 316 dev_dbg(&link->dev, "smc91c92_attach()\n");
1da177e4
LT		 317
318 /* Create new ethernet device */
319 dev = alloc_etherdev(sizeof(struct smc_private));
320 if (!dev)
f8cfa618 321 return -ENOMEM;
1da177e4 322 smc = netdev_priv(dev);
fba395ee 323 smc->p_dev = link;
44b496f6 324 link->priv = dev;
1da177e4
LT		 325
326 spin_lock_init(&smc->lock);
90abdc3b
DB		 327 link->resource[0]->end = 16;
328 link->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
1da177e4 329 link->conf.Attributes = CONF_ENABLE_IRQ;
1da177e4
LT		 330 link->conf.IntType = INT_MEMORY_AND_IO;
331
332 /* The SMC91c92-specific entries in the device structure. */
9b31b697 333 dev->netdev_ops = &smc_netdev_ops;
1da177e4 334 SET_ETHTOOL_OPS(dev, &ethtool_ops);
1da177e4 335 dev->watchdog_timeo = TX_TIMEOUT;
1da177e4
LT		 336
337 smc->mii_if.dev = dev;
338 smc->mii_if.mdio_read = mdio_read;
339 smc->mii_if.mdio_write = mdio_write;
340 smc->mii_if.phy_id_mask = 0x1f;
341 smc->mii_if.reg_num_mask = 0x1f;
342
15b99ac1 343 return smc91c92_config(link);
1da177e4
LT		 344} /* smc91c92_attach */
345
346/*======================================================================
347
348 This deletes a driver "instance". The device is de-registered
349 with Card Services. If it has been released, all local data
350 structures are freed. Otherwise, the structures will be freed
351 when the device is released.
352
353======================================================================*/
354
fba395ee 355static void smc91c92_detach(struct pcmcia_device *link)
1da177e4
LT		 356{
357 struct net_device *dev = link->priv;
1da177e4 358
dd0fab5b 359 dev_dbg(&link->dev, "smc91c92_detach\n");
1da177e4 360
c7c2fa07 361 unregister_netdev(dev);
1da177e4 362
e2d40963 363 smc91c92_release(link);
1da177e4 364
1da177e4
LT		 365 free_netdev(dev);
366} /* smc91c92_detach */
367
368/*====================================================================*/
369
370static int cvt_ascii_address(struct net_device *dev, char *s)
371{
372 int i, j, da, c;
373
374 if (strlen(s) != 12)
375 return -1;
376 for (i = 0; i < 6; i++) {
377 da = 0;
378 for (j = 0; j < 2; j++) {
379 c = *s++;
380 da <<= 4;
381 da += ((c >= '0') && (c <= '9')) ?
382 (c - '0') : ((c & 0x0f) + 9);
383 }
384 dev->dev_addr[i] = da;
385 }
386 return 0;
387}
388
dddfbd82 389/*====================================================================
1da177e4
LT		 390
391 Configuration stuff for Megahertz cards
392
393 mhz_3288_power() is used to power up a 3288's ethernet chip.
394 mhz_mfc_config() handles socket setup for multifunction (1144
395 and 3288) cards. mhz_setup() gets a card's hardware ethernet
396 address.
397
398======================================================================*/
399
fba395ee 400static int mhz_3288_power(struct pcmcia_device *link)
1da177e4
LT		 401{
402 struct net_device *dev = link->priv;
403 struct smc_private *smc = netdev_priv(dev);
404 u_char tmp;
405
406 /* Read the ISR twice... */
407 readb(smc->base+MEGAHERTZ_ISR);
408 udelay(5);
409 readb(smc->base+MEGAHERTZ_ISR);
410
411 /* Pause 200ms... */
412 mdelay(200);
413
414 /* Now read and write the COR... */
415 tmp = readb(smc->base + link->conf.ConfigBase + CISREG_COR);
416 udelay(5);
417 writeb(tmp, smc->base + link->conf.ConfigBase + CISREG_COR);
418
419 return 0;
420}
421
b54bf94b
DB		 422static int mhz_mfc_config_check(struct pcmcia_device *p_dev,
423 cistpl_cftable_entry_t *cf,
8e2fc39d 424 cistpl_cftable_entry_t *dflt,
ad913c11 425 unsigned int vcc,
b54bf94b
DB		 426 void *priv_data)
427{
428 int k;
90abdc3b 429 p_dev->resource[1]->start = cf->io.win[0].base;
b54bf94b
DB		 430 for (k = 0; k < 0x400; k += 0x10) {
431 if (k & 0x80)
432 continue;
90abdc3b
DB		 433 p_dev->resource[0]->start = k ^ 0x300;
434 p_dev->io_lines = 16;
435 if (!pcmcia_request_io(p_dev))
b54bf94b
DB		 436 return 0;
437 }
438 return -ENODEV;
439}
440
fba395ee 441static int mhz_mfc_config(struct pcmcia_device *link)
1da177e4
LT		 442{
443 struct net_device *dev = link->priv;
444 struct smc_private *smc = netdev_priv(dev);
1da177e4
LT		 445 win_req_t req;
446 memreq_t mem;
b54bf94b 447 int i;
1da177e4
LT		 448
449 link->conf.Attributes |= CONF_ENABLE_SPKR;
450 link->conf.Status = CCSR_AUDIO_ENA;
90abdc3b
DB		 451 link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
452 link->resource[1]->end = 8;
1da177e4 453
1da177e4
LT		 454 /* The Megahertz combo cards have modem-like CIS entries, so
455 we have to explicitly try a bunch of port combinations. */
b54bf94b 456 if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL))
dddfbd82
DB		 457 return -ENODEV;
458
9a017a91 459 dev->base_addr = link->resource[0]->start;
1da177e4
LT		 460
461 /* Allocate a memory window, for accessing the ISR */
462 req.Attributes = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
463 req.Base = req.Size = 0;
464 req.AccessSpeed = 0;
6838b03f 465 i = pcmcia_request_window(link, &req, &link->win);
4c89e88b 466 if (i != 0)
dddfbd82
DB		 467 return -ENODEV;
468
1da177e4
LT		 469 smc->base = ioremap(req.Base, req.Size);
470 mem.CardOffset = mem.Page = 0;
471 if (smc->manfid == MANFID_MOTOROLA)
472 mem.CardOffset = link->conf.ConfigBase;
868575d1 473 i = pcmcia_map_mem_page(link, link->win, &mem);
1da177e4 474
8e95a202
JP		 475 if ((i == 0) &&
476 (smc->manfid == MANFID_MEGAHERTZ) &&
477 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
478 mhz_3288_power(link);
1da177e4 479
dddfbd82 480 return 0;
1da177e4
LT		 481}
482
dddfbd82
DB		 483static int pcmcia_get_versmac(struct pcmcia_device *p_dev,
484 tuple_t *tuple,
485 void *priv)
1da177e4 486{
dddfbd82
DB		 487 struct net_device *dev = priv;
488 cisparse_t parse;
fb9e2d88 489 u8 *buf;
4638aef4 490
dddfbd82
DB		 491 if (pcmcia_parse_tuple(tuple, &parse))
492 return -EINVAL;
1da177e4 493
fb9e2d88
KK		 494 buf = parse.version_1.str + parse.version_1.ofs[3];
495
496 if ((parse.version_1.ns > 3) && (cvt_ascii_address(dev, buf) == 0))
dddfbd82 497 return 0;
4638aef4 498
dddfbd82
DB		 499 return -EINVAL;
500};
501
fba395ee 502static int mhz_setup(struct pcmcia_device *link)
1da177e4 503{
1da177e4 504 struct net_device *dev = link->priv;
dddfbd82
DB		 505 size_t len;
506 u8 *buf;
4638aef4 507 int rc;
1da177e4
LT		 508
509 /* Read the station address from the CIS. It is stored as the last
510 (fourth) string in the Version 1 Version/ID tuple. */
7d2e8d00
DB		 511 if ((link->prod_id[3]) &&
512 (cvt_ascii_address(dev, link->prod_id[3]) == 0))
513 return 0;
514
515 /* Workarounds for broken cards start here. */
a1a98b72 516 /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */
dddfbd82
DB		 517 if (!pcmcia_loop_tuple(link, CISTPL_VERS_1, pcmcia_get_versmac, dev))
518 return 0;
1da177e4
LT		 519
520 /* Another possibility: for the EM3288, in a special tuple */
4638aef4 521 rc = -1;
dddfbd82
DB		 522 len = pcmcia_get_tuple(link, 0x81, &buf);
523 if (buf && len >= 13) {
524 buf[12] = '\0';
fb9e2d88 525 if (cvt_ascii_address(dev, buf) == 0)
dddfbd82
DB		 526 rc = 0;
527 }
528 kfree(buf);
529
530 return rc;
531};
1da177e4
LT		 532
533/*======================================================================
534
535 Configuration stuff for the Motorola Mariner
536
537 mot_config() writes directly to the Mariner configuration
538 registers because the CIS is just bogus.
539
540======================================================================*/
541
fba395ee 542static void mot_config(struct pcmcia_device *link)
1da177e4
LT		 543{
544 struct net_device *dev = link->priv;
545 struct smc_private *smc = netdev_priv(dev);
906da809 546 unsigned int ioaddr = dev->base_addr;
9a017a91 547 unsigned int iouart = link->resource[1]->start;
1da177e4
LT		 548
549 /* Set UART base address and force map with COR bit 1 */
550 writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0);
551 writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1);
552 writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR);
553
554 /* Set SMC base address and force map with COR bit 1 */
555 writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0);
556 writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1);
557 writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR);
558
559 /* Wait for things to settle down */
560 mdelay(100);
561}
562
fba395ee 563static int mot_setup(struct pcmcia_device *link)
1da177e4
LT		 564{
565 struct net_device *dev = link->priv;
906da809 566 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 567 int i, wait, loop;
568 u_int addr;
569
570 /* Read Ethernet address from Serial EEPROM */
571
572 for (i = 0; i < 3; i++) {
573 SMC_SELECT_BANK(2);
574 outw(MOT_EEPROM + i, ioaddr + POINTER);
575 SMC_SELECT_BANK(1);
576 outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL);
577
578 for (loop = wait = 0; loop < 200; loop++) {
579 udelay(10);
580 wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL));
581 if (wait == 0) break;
582 }
583
584 if (wait)
585 return -1;
586
587 addr = inw(ioaddr + GENERAL);
588 dev->dev_addr[2*i] = addr & 0xff;
589 dev->dev_addr[2*i+1] = (addr >> 8) & 0xff;
590 }
591
592 return 0;
593}
594
595/*====================================================================*/
596
b54bf94b
DB		 597static int smc_configcheck(struct pcmcia_device *p_dev,
598 cistpl_cftable_entry_t *cf,
8e2fc39d 599 cistpl_cftable_entry_t *dflt,
ad913c11 600 unsigned int vcc,
b54bf94b
DB		 601 void *priv_data)
602{
90abdc3b
DB		 603 p_dev->resource[0]->start = cf->io.win[0].base;
604 p_dev->io_lines = cf->io.flags & CISTPL_IO_LINES_MASK;
605 return pcmcia_request_io(p_dev);
b54bf94b
DB		 606}
607
fba395ee 608static int smc_config(struct pcmcia_device *link)
1da177e4
LT		 609{
610 struct net_device *dev = link->priv;
1da177e4
LT		 611 int i;
612
90abdc3b 613 link->resource[0]->end = 16;
b54bf94b
DB		 614 i = pcmcia_loop_config(link, smc_configcheck, NULL);
615 if (!i)
9a017a91 616 dev->base_addr = link->resource[0]->start;
4638aef4 617
1da177e4
LT		 618 return i;
619}
620
dddfbd82 621
fba395ee 622static int smc_setup(struct pcmcia_device *link)
1da177e4 623{
1da177e4 624 struct net_device *dev = link->priv;
1da177e4
LT		 625
626 /* Check for a LAN function extension tuple */
dddfbd82
DB		 627 if (!pcmcia_get_mac_from_cis(link, dev))
628 return 0;
629
1da177e4 630 /* Try the third string in the Version 1 Version/ID tuple. */
a9606fd3 631 if (link->prod_id[2]) {
dddfbd82
DB		 632 if (cvt_ascii_address(dev, link->prod_id[2]) == 0)
633 return 0;
4638aef4 634 }
dddfbd82 635 return -1;
1da177e4
LT		 636}
637
638/*====================================================================*/
639
fba395ee 640static int osi_config(struct pcmcia_device *link)
1da177e4
LT		 641{
642 struct net_device *dev = link->priv;
906da809 643 static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
1da177e4
LT		 644 int i, j;
645
646 link->conf.Attributes |= CONF_ENABLE_SPKR;
647 link->conf.Status = CCSR_AUDIO_ENA;
90abdc3b
DB		 648 link->resource[0]->end = 64;
649 link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
650 link->resource[1]->end = 8;
1da177e4
LT		 651
652 /* Enable Hard Decode, LAN, Modem */
653 link->conf.ConfigIndex = 0x23;
90abdc3b 654 link->io_lines = 16;
1da177e4
LT		 655
656 for (i = j = 0; j < 4; j++) {
90abdc3b
DB		 657 link->resource[1]->start = com[j];
658 i = pcmcia_request_io(link);
4c89e88b
DB		 659 if (i == 0)
660 break;
1da177e4 661 }
4c89e88b 662 if (i != 0) {
1da177e4
LT		 663 /* Fallback: turn off hard decode */
664 link->conf.ConfigIndex = 0x03;
90abdc3b
DB		 665 link->resource[1]->end = 0;
666 i = pcmcia_request_io(link);
1da177e4 667 }
9a017a91 668 dev->base_addr = link->resource[0]->start + 0x10;
1da177e4
LT		 669 return i;
670}
671
75bf758f
JSR		 672static int osi_load_firmware(struct pcmcia_device *link)
673{
674 const struct firmware *fw;
675 int i, err;
676
677 err = request_firmware(&fw, FIRMWARE_NAME, &link->dev);
678 if (err) {
679 pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME);
680 return err;
681 }
682
683 /* Download the Seven of Diamonds firmware */
684 for (i = 0; i < fw->size; i++) {
9a017a91 685 outb(fw->data[i], link->resource[0]->start + 2);
75bf758f
JSR		 686 udelay(50);
687 }
688 release_firmware(fw);
689 return err;
690}
691
dddfbd82
DB		 692static int pcmcia_osi_mac(struct pcmcia_device *p_dev,
693 tuple_t *tuple,
694 void *priv)
1da177e4 695{
dddfbd82
DB		 696 struct net_device *dev = priv;
697 int i;
1da177e4 698
dddfbd82
DB		 699 if (tuple->TupleDataLen < 8)
700 return -EINVAL;
701 if (tuple->TupleData[0] != 0x04)
702 return -EINVAL;
703 for (i = 0; i < 6; i++)
704 dev->dev_addr[i] = tuple->TupleData[i+2];
705 return 0;
706};
4638aef4 707
4638aef4 708
dddfbd82
DB		 709static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid)
710{
711 struct net_device *dev = link->priv;
712 int rc;
1da177e4
LT		 713
714 /* Read the station address from tuple 0x90, subtuple 0x04 */
dddfbd82
DB		 715 if (pcmcia_loop_tuple(link, 0x90, pcmcia_osi_mac, dev))
716 return -1;
1da177e4
LT		 717
718 if (((manfid == MANFID_OSITECH) &&
719 (cardid == PRODID_OSITECH_SEVEN)) ||
720 ((manfid == MANFID_PSION) &&
721 (cardid == PRODID_PSION_NET100))) {
75bf758f
JSR		 722 rc = osi_load_firmware(link);
723 if (rc)
dddfbd82 724 return rc;
1da177e4
LT		 725 } else if (manfid == MANFID_OSITECH) {
726 /* Make sure both functions are powered up */
9a017a91 727 set_bits(0x300, link->resource[0]->start + OSITECH_AUI_PWR);
1da177e4 728 /* Now, turn on the interrupt for both card functions */
9a017a91 729 set_bits(0x300, link->resource[0]->start + OSITECH_RESET_ISR);
dd0fab5b 730 dev_dbg(&link->dev, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n",
9a017a91
DB		 731 inw(link->resource[0]->start + OSITECH_AUI_PWR),
732 inw(link->resource[0]->start + OSITECH_RESET_ISR));
1da177e4 733 }
dddfbd82 734 return 0;
1da177e4
LT		 735}
736
fba395ee 737static int smc91c92_suspend(struct pcmcia_device *link)
98e4c28b 738{
98e4c28b
DB		 739 struct net_device *dev = link->priv;
740
e2d40963 741 if (link->open)
4bbed523 742 netif_device_detach(dev);
98e4c28b
DB		 743
744 return 0;
745}
746
fba395ee 747static int smc91c92_resume(struct pcmcia_device *link)
98e4c28b 748{
98e4c28b
DB		 749 struct net_device *dev = link->priv;
750 struct smc_private *smc = netdev_priv(dev);
751 int i;
752
e2d40963
DB		 753 if ((smc->manfid == MANFID_MEGAHERTZ) &&
754 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
755 mhz_3288_power(link);
756 if (smc->manfid == MANFID_MOTOROLA)
757 mot_config(link);
758 if ((smc->manfid == MANFID_OSITECH) &&
759 (smc->cardid != PRODID_OSITECH_SEVEN)) {
760 /* Power up the card and enable interrupts */
761 set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR);
762 set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR);
763 }
764 if (((smc->manfid == MANFID_OSITECH) &&
765 (smc->cardid == PRODID_OSITECH_SEVEN)) ||
766 ((smc->manfid == MANFID_PSION) &&
767 (smc->cardid == PRODID_PSION_NET100))) {
75bf758f
JSR		 768 i = osi_load_firmware(link);
769 if (i) {
770 pr_err("smc91c92_cs: Failed to load firmware\n");
771 return i;
98e4c28b
DB		 772 }
773 }
e2d40963
DB		 774 if (link->open) {
775 smc_reset(dev);
776 netif_device_attach(dev);
777 }
98e4c28b
DB		 778
779 return 0;
780}
781
782
1da177e4
LT		 783/*======================================================================
784
785 This verifies that the chip is some SMC91cXX variant, and returns
786 the revision code if successful. Otherwise, it returns -ENODEV.
787
788======================================================================*/
789
fba395ee 790static int check_sig(struct pcmcia_device *link)
1da177e4
LT		 791{
792 struct net_device *dev = link->priv;
906da809 793 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 794 int width;
795 u_short s;
796
797 SMC_SELECT_BANK(1);
798 if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) {
799 /* Try powering up the chip */
800 outw(0, ioaddr + CONTROL);
801 mdelay(55);
802 }
803
804 /* Try setting bus width */
90abdc3b 805 width = (link->resource[0]->flags == IO_DATA_PATH_WIDTH_AUTO);
1da177e4
LT		 806 s = inb(ioaddr + CONFIG);
807 if (width)
808 s |= CFG_16BIT;
809 else
810 s &= ~CFG_16BIT;
811 outb(s, ioaddr + CONFIG);
812
813 /* Check Base Address Register to make sure bus width is OK */
814 s = inw(ioaddr + BASE_ADDR);
815 if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) &&
816 ((s >> 8) != (s & 0xff))) {
817 SMC_SELECT_BANK(3);
818 s = inw(ioaddr + REVISION);
819 return (s & 0xff);
820 }
821
822 if (width) {
4bbed523
DB		 823 modconf_t mod = {
824 .Attributes = CONF_IO_CHANGE_WIDTH,
825 };
826 printk(KERN_INFO "smc91c92_cs: using 8-bit IO window.\n");
827
fba395ee
DB		 828 smc91c92_suspend(link);
829 pcmcia_modify_configuration(link, &mod);
830 smc91c92_resume(link);
4bbed523 831 return check_sig(link);
1da177e4
LT		 832 }
833 return -ENODEV;
834}
835
836/*======================================================================
837
838 smc91c92_config() is scheduled to run after a CARD_INSERTION event
839 is received, to configure the PCMCIA socket, and to make the
840 ethernet device available to the system.
841
842======================================================================*/
843
15b99ac1 844static int smc91c92_config(struct pcmcia_device *link)
1da177e4 845{
1da177e4
LT		 846 struct net_device *dev = link->priv;
847 struct smc_private *smc = netdev_priv(dev);
1da177e4
LT		 848 char *name;
849 int i, j, rev;
906da809 850 unsigned int ioaddr;
1da177e4
LT		 851 u_long mir;
852
dd0fab5b 853 dev_dbg(&link->dev, "smc91c92_config\n");
1da177e4 854
efd50585
DB		 855 smc->manfid = link->manf_id;
856 smc->cardid = link->card_id;
1da177e4 857
1da177e4
LT		 858 if ((smc->manfid == MANFID_OSITECH) &&
859 (smc->cardid != PRODID_OSITECH_SEVEN)) {
860 i = osi_config(link);
861 } else if ((smc->manfid == MANFID_MOTOROLA) ||
862 ((smc->manfid == MANFID_MEGAHERTZ) &&
863 ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) ||
864 (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) {
865 i = mhz_mfc_config(link);
866 } else {
867 i = smc_config(link);
868 }
dd0fab5b
DB		 869 if (i)
870 goto config_failed;
1da177e4 871
eb14120f 872 i = pcmcia_request_irq(link, smc_interrupt);
dd0fab5b
DB		 873 if (i)
874 goto config_failed;
fba395ee 875 i = pcmcia_request_configuration(link, &link->conf);
dd0fab5b
DB		 876 if (i)
877 goto config_failed;
1da177e4
LT		 878
879 if (smc->manfid == MANFID_MOTOROLA)
880 mot_config(link);
881
eb14120f 882 dev->irq = link->irq;
1da177e4
LT		 883
884 if ((if_port >= 0) && (if_port <= 2))
885 dev->if_port = if_port;
886 else
887 printk(KERN_NOTICE "smc91c92_cs: invalid if_port requested\n");
888
889 switch (smc->manfid) {
890 case MANFID_OSITECH:
891 case MANFID_PSION:
892 i = osi_setup(link, smc->manfid, smc->cardid); break;
893 case MANFID_SMC:
894 case MANFID_NEW_MEDIA:
895 i = smc_setup(link); break;
896 case 0x128: /* For broken Megahertz cards */
897 case MANFID_MEGAHERTZ:
898 i = mhz_setup(link); break;
899 case MANFID_MOTOROLA:
900 default: /* get the hw address from EEPROM */
901 i = mot_setup(link); break;
902 }
903
904 if (i != 0) {
905 printk(KERN_NOTICE "smc91c92_cs: Unable to find hardware address.\n");
fb9e2d88 906 goto config_failed;
1da177e4
LT		 907 }
908
909 smc->duplex = 0;
910 smc->rx_ovrn = 0;
911
912 rev = check_sig(link);
913 name = "???";
914 if (rev > 0)
915 switch (rev >> 4) {
916 case 3: name = "92"; break;
917 case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break;
918 case 5: name = "95"; break;
919 case 7: name = "100"; break;
920 case 8: name = "100-FD"; break;
921 case 9: name = "110"; break;
922 }
923
924 ioaddr = dev->base_addr;
925 if (rev > 0) {
926 u_long mcr;
927 SMC_SELECT_BANK(0);
928 mir = inw(ioaddr + MEMINFO) & 0xff;
929 if (mir == 0xff) mir++;
930 /* Get scale factor for memory size */
931 mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200;
932 mir *= 128 * (1<<((mcr >> 9) & 7));
933 SMC_SELECT_BANK(1);
934 smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT;
935 smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC;
936 if (smc->manfid == MANFID_OSITECH)
937 smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0;
938 if ((rev >> 4) >= 7)
939 smc->cfg |= CFG_MII_SELECT;
940 } else
941 mir = 0;
942
943 if (smc->cfg & CFG_MII_SELECT) {
944 SMC_SELECT_BANK(3);
945
946 for (i = 0; i < 32; i++) {
947 j = mdio_read(dev, i, 1);
948 if ((j != 0) && (j != 0xffff)) break;
949 }
950 smc->mii_if.phy_id = (i < 32) ? i : -1;
951
952 SMC_SELECT_BANK(0);
953 }
954
dd2e5a15 955 SET_NETDEV_DEV(dev, &link->dev);
1da177e4
LT		 956
957 if (register_netdev(dev) != 0) {
958 printk(KERN_ERR "smc91c92_cs: register_netdev() failed\n");
1da177e4
LT		 959 goto config_undo;
960 }
961
1da177e4 962 printk(KERN_INFO "%s: smc91c%s rev %d: io %#3lx, irq %d, "
e174961c 963 "hw_addr %pM\n",
0795af57 964 dev->name, name, (rev & 0x0f), dev->base_addr, dev->irq,
e174961c 965 dev->dev_addr);
1da177e4
LT		 966
967 if (rev > 0) {
968 if (mir & 0x3ff)
969 printk(KERN_INFO " %lu byte", mir);
970 else
971 printk(KERN_INFO " %lu kb", mir>>10);
972 printk(" buffer, %s xcvr\n", (smc->cfg & CFG_MII_SELECT) ?
973 "MII" : if_names[dev->if_port]);
974 }
975
976 if (smc->cfg & CFG_MII_SELECT) {
977 if (smc->mii_if.phy_id != -1) {
dd0fab5b 978 dev_dbg(&link->dev, " MII transceiver at index %d, status %x.\n",
1da177e4
LT		 979 smc->mii_if.phy_id, j);
980 } else {
981 printk(KERN_NOTICE " No MII transceivers found!\n");
982 }
983 }
15b99ac1 984 return 0;
1da177e4
LT		 985
986config_undo:
987 unregister_netdev(dev);
dd0fab5b 988config_failed:
1da177e4 989 smc91c92_release(link);
fb9e2d88 990 free_netdev(dev);
15b99ac1 991 return -ENODEV;
1da177e4
LT		 992} /* smc91c92_config */
993
994/*======================================================================
995
996 After a card is removed, smc91c92_release() will unregister the net
997 device, and release the PCMCIA configuration. If the device is
998 still open, this will be postponed until it is closed.
999
1000======================================================================*/
1001
fba395ee 1002static void smc91c92_release(struct pcmcia_device *link)
1da177e4 1003{
dd0fab5b 1004 dev_dbg(&link->dev, "smc91c92_release\n");
5f2a71fc
DB		 1005 if (link->win) {
1006 struct net_device *dev = link->priv;
1007 struct smc_private *smc = netdev_priv(dev);
1008 iounmap(smc->base);
1009 }
fba395ee 1010 pcmcia_disable_device(link);
1da177e4
LT		 1011}
1012
1da177e4
LT		 1013/*======================================================================
1014
1015 MII interface support for SMC91cXX based cards
1016======================================================================*/
1017
1018#define MDIO_SHIFT_CLK 0x04
1019#define MDIO_DATA_OUT 0x01
1020#define MDIO_DIR_WRITE 0x08
1021#define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE)
1022#define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT)
1023#define MDIO_DATA_READ 0x02
1024
906da809 1025static void mdio_sync(unsigned int addr)
1da177e4
LT		 1026{
1027 int bits;
1028 for (bits = 0; bits < 32; bits++) {
1029 outb(MDIO_DATA_WRITE1, addr);
1030 outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr);
1031 }
1032}
1033
1034static int mdio_read(struct net_device *dev, int phy_id, int loc)
1035{
906da809 1036 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT		 1037 u_int cmd = (0x06<<10)|(phy_id<<5)|loc;
1038 int i, retval = 0;
1039
1040 mdio_sync(addr);
1041 for (i = 13; i >= 0; i--) {
1042 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1043 outb(dat, addr);
1044 outb(dat | MDIO_SHIFT_CLK, addr);
1045 }
1046 for (i = 19; i > 0; i--) {
1047 outb(0, addr);
1048 retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0);
1049 outb(MDIO_SHIFT_CLK, addr);
1050 }
1051 return (retval>>1) & 0xffff;
1052}
1053
1054static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
1055{
906da809 1056 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT		 1057 u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
1058 int i;
1059
1060 mdio_sync(addr);
1061 for (i = 31; i >= 0; i--) {
1062 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1063 outb(dat, addr);
1064 outb(dat | MDIO_SHIFT_CLK, addr);
1065 }
1066 for (i = 1; i >= 0; i--) {
1067 outb(0, addr);
1068 outb(MDIO_SHIFT_CLK, addr);
1069 }
1070}
1071
1072/*======================================================================
1073
1074 The driver core code, most of which should be common with a
1075 non-PCMCIA implementation.
1076
1077======================================================================*/
1078
1079#ifdef PCMCIA_DEBUG
1080static void smc_dump(struct net_device *dev)
1081{
906da809 1082 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1083 u_short i, w, save;
1084 save = inw(ioaddr + BANK_SELECT);
1085 for (w = 0; w < 4; w++) {
1086 SMC_SELECT_BANK(w);
1087 printk(KERN_DEBUG "bank %d: ", w);
1088 for (i = 0; i < 14; i += 2)
1089 printk(" %04x", inw(ioaddr + i));
1090 printk("\n");
1091 }
1092 outw(save, ioaddr + BANK_SELECT);
1093}
1094#endif
1095
1096static int smc_open(struct net_device *dev)
1097{
1098 struct smc_private *smc = netdev_priv(dev);
fba395ee 1099 struct pcmcia_device *link = smc->p_dev;
1da177e4 1100
dd0fab5b 1101 dev_dbg(&link->dev, "%s: smc_open(%p), ID/Window %4.4x.\n",
1da177e4 1102 dev->name, dev, inw(dev->base_addr + BANK_SELECT));
dd0fab5b
DB		 1103#ifdef PCMCIA_DEBUG
1104 smc_dump(dev);
1da177e4
LT		 1105#endif
1106
1107 /* Check that the PCMCIA card is still here. */
9940ec36 1108 if (!pcmcia_dev_present(link))
1da177e4
LT		 1109 return -ENODEV;
1110 /* Physical device present signature. */
1111 if (check_sig(link) < 0) {
1112 printk("smc91c92_cs: Yikes! Bad chip signature!\n");
1113 return -ENODEV;
1114 }
1115 link->open++;
1116
1117 netif_start_queue(dev);
1118 smc->saved_skb = NULL;
1119 smc->packets_waiting = 0;
1120
1121 smc_reset(dev);
1122 init_timer(&smc->media);
1123 smc->media.function = &media_check;
1124 smc->media.data = (u_long) dev;
1125 smc->media.expires = jiffies + HZ;
1126 add_timer(&smc->media);
1127
1128 return 0;
1129} /* smc_open */
1130
1131/*====================================================================*/
1132
1133static int smc_close(struct net_device *dev)
1134{
1135 struct smc_private *smc = netdev_priv(dev);
fba395ee 1136 struct pcmcia_device *link = smc->p_dev;
906da809 1137 unsigned int ioaddr = dev->base_addr;
1da177e4 1138
dd0fab5b 1139 dev_dbg(&link->dev, "%s: smc_close(), status %4.4x.\n",
1da177e4
LT		 1140 dev->name, inw(ioaddr + BANK_SELECT));
1141
1142 netif_stop_queue(dev);
1143
1144 /* Shut off all interrupts, and turn off the Tx and Rx sections.
1145 Don't bother to check for chip present. */
1146 SMC_SELECT_BANK(2); /* Nominally paranoia, but do no assume... */
1147 outw(0, ioaddr + INTERRUPT);
1148 SMC_SELECT_BANK(0);
1149 mask_bits(0xff00, ioaddr + RCR);
1150 mask_bits(0xff00, ioaddr + TCR);
1151
1152 /* Put the chip into power-down mode. */
1153 SMC_SELECT_BANK(1);
1154 outw(CTL_POWERDOWN, ioaddr + CONTROL );
1155
1156 link->open--;
1157 del_timer_sync(&smc->media);
1158
1159 return 0;
1160} /* smc_close */
1161
1162/*======================================================================
1163
1164 Transfer a packet to the hardware and trigger the packet send.
1165 This may be called at either from either the Tx queue code
1166 or the interrupt handler.
1167
1168======================================================================*/
1169
1170static void smc_hardware_send_packet(struct net_device * dev)
1171{
1172 struct smc_private *smc = netdev_priv(dev);
1173 struct sk_buff *skb = smc->saved_skb;
906da809 1174 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1175 u_char packet_no;
1176
1177 if (!skb) {
1178 printk(KERN_ERR "%s: In XMIT with no packet to send.\n", dev->name);
1179 return;
1180 }
1181
1182 /* There should be a packet slot waiting. */
1183 packet_no = inw(ioaddr + PNR_ARR) >> 8;
1184 if (packet_no & 0x80) {
1185 /* If not, there is a hardware problem! Likely an ejected card. */
1186 printk(KERN_WARNING "%s: 91c92 hardware Tx buffer allocation"
1187 " failed, status %#2.2x.\n", dev->name, packet_no);
1188 dev_kfree_skb_irq(skb);
1189 smc->saved_skb = NULL;
1190 netif_start_queue(dev);
1191 return;
1192 }
1193
6fb7298c 1194 dev->stats.tx_bytes += skb->len;
1da177e4
LT		 1195 /* The card should use the just-allocated buffer. */
1196 outw(packet_no, ioaddr + PNR_ARR);
1197 /* point to the beginning of the packet */
1198 outw(PTR_AUTOINC , ioaddr + POINTER);
1199
1200 /* Send the packet length (+6 for status, length and ctl byte)
1201 and the status word (set to zeros). */
1202 {
1203 u_char *buf = skb->data;
1204 u_int length = skb->len; /* The chip will pad to ethernet min. */
1205
dd0fab5b 1206 pr_debug("%s: Trying to xmit packet of length %d.\n",
1da177e4
LT		 1207 dev->name, length);
1208
1209 /* send the packet length: +6 for status word, length, and ctl */
1210 outw(0, ioaddr + DATA_1);
1211 outw(length + 6, ioaddr + DATA_1);
1212 outsw(ioaddr + DATA_1, buf, length >> 1);
1213
1214 /* The odd last byte, if there is one, goes in the control word. */
1215 outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1);
1216 }
1217
1218 /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */
1219 outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) |
1220 (inw(ioaddr + INTERRUPT) & 0xff00),
1221 ioaddr + INTERRUPT);
1222
1223 /* The chip does the rest of the work. */
1224 outw(MC_ENQUEUE , ioaddr + MMU_CMD);
1225
1226 smc->saved_skb = NULL;
1227 dev_kfree_skb_irq(skb);
1228 dev->trans_start = jiffies;
1229 netif_start_queue(dev);
1da177e4
LT		 1230}
1231
1232/*====================================================================*/
1233
1234static void smc_tx_timeout(struct net_device *dev)
1235{
1236 struct smc_private *smc = netdev_priv(dev);
906da809 1237 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1238
1239 printk(KERN_NOTICE "%s: SMC91c92 transmit timed out, "
1240 "Tx_status %2.2x status %4.4x.\n",
1241 dev->name, inw(ioaddr)&0xff, inw(ioaddr + 2));
6fb7298c 1242 dev->stats.tx_errors++;
1da177e4 1243 smc_reset(dev);
1ae5dc34 1244 dev->trans_start = jiffies; /* prevent tx timeout */
1da177e4
LT		 1245 smc->saved_skb = NULL;
1246 netif_wake_queue(dev);
1247}
1248
dbf02fae
SH		 1249static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
1250 struct net_device *dev)
1da177e4
LT		 1251{
1252 struct smc_private *smc = netdev_priv(dev);
906da809 1253 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1254 u_short num_pages;
1255 short time_out, ir;
85e27831 1256 unsigned long flags;
1da177e4
LT		 1257
1258 netif_stop_queue(dev);
1259
dd0fab5b 1260 pr_debug("%s: smc_start_xmit(length = %d) called,"
1da177e4
LT		 1261 " status %4.4x.\n", dev->name, skb->len, inw(ioaddr + 2));
1262
1263 if (smc->saved_skb) {
1264 /* THIS SHOULD NEVER HAPPEN. */
6fb7298c 1265 dev->stats.tx_aborted_errors++;
1da177e4
LT		 1266 printk(KERN_DEBUG "%s: Internal error -- sent packet while busy.\n",
1267 dev->name);
5b548140 1268 return NETDEV_TX_BUSY;
1da177e4
LT		 1269 }
1270 smc->saved_skb = skb;
1271
1272 num_pages = skb->len >> 8;
1273
1274 if (num_pages > 7) {
1275 printk(KERN_ERR "%s: Far too big packet error.\n", dev->name);
1276 dev_kfree_skb (skb);
1277 smc->saved_skb = NULL;
6fb7298c 1278 dev->stats.tx_dropped++;
6ed10654 1279 return NETDEV_TX_OK; /* Do not re-queue this packet. */
1da177e4
LT		 1280 }
1281 /* A packet is now waiting. */
1282 smc->packets_waiting++;
1283
85e27831 1284 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 1285 SMC_SELECT_BANK(2); /* Paranoia, we should always be in window 2 */
1286
1287 /* need MC_RESET to keep the memory consistent. errata? */
1288 if (smc->rx_ovrn) {
1289 outw(MC_RESET, ioaddr + MMU_CMD);
1290 smc->rx_ovrn = 0;
1291 }
1292
1293 /* Allocate the memory; send the packet now if we win. */
1294 outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD);
1295 for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) {
1296 ir = inw(ioaddr+INTERRUPT);
1297 if (ir & IM_ALLOC_INT) {
1298 /* Acknowledge the interrupt, send the packet. */
1299 outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT);
1300 smc_hardware_send_packet(dev); /* Send the packet now.. */
85e27831 1301 spin_unlock_irqrestore(&smc->lock, flags);
6ed10654 1302 return NETDEV_TX_OK;
1da177e4
LT		 1303 }
1304 }
1305
1306 /* Otherwise defer until the Tx-space-allocated interrupt. */
dd0fab5b 1307 pr_debug("%s: memory allocation deferred.\n", dev->name);
1da177e4 1308 outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT);
85e27831 1309 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4 1310
6ed10654 1311 return NETDEV_TX_OK;
1da177e4
LT		 1312}
1313
1314/*======================================================================
1315
1316 Handle a Tx anomolous event. Entered while in Window 2.
1317
1318======================================================================*/
1319
1320static void smc_tx_err(struct net_device * dev)
1321{
1322 struct smc_private *smc = netdev_priv(dev);
906da809 1323 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1324 int saved_packet = inw(ioaddr + PNR_ARR) & 0xff;
1325 int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f;
1326 int tx_status;
1327
1328 /* select this as the packet to read from */
1329 outw(packet_no, ioaddr + PNR_ARR);
1330
1331 /* read the first word from this packet */
1332 outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER);
1333
1334 tx_status = inw(ioaddr + DATA_1);
1335
6fb7298c
SH		 1336 dev->stats.tx_errors++;
1337 if (tx_status & TS_LOSTCAR) dev->stats.tx_carrier_errors++;
1338 if (tx_status & TS_LATCOL) dev->stats.tx_window_errors++;
1da177e4 1339 if (tx_status & TS_16COL) {
6fb7298c 1340 dev->stats.tx_aborted_errors++;
1da177e4
LT		 1341 smc->tx_err++;
1342 }
1343
1344 if (tx_status & TS_SUCCESS) {
1345 printk(KERN_NOTICE "%s: Successful packet caused error "
1346 "interrupt?\n", dev->name);
1347 }
1348 /* re-enable transmit */
1349 SMC_SELECT_BANK(0);
1350 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1351 SMC_SELECT_BANK(2);
1352
1353 outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */
1354
1355 /* one less packet waiting for me */
1356 smc->packets_waiting--;
1357
1358 outw(saved_packet, ioaddr + PNR_ARR);
1da177e4
LT		 1359}
1360
1361/*====================================================================*/
1362
1363static void smc_eph_irq(struct net_device *dev)
1364{
1365 struct smc_private *smc = netdev_priv(dev);
906da809 1366 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1367 u_short card_stats, ephs;
1368
1369 SMC_SELECT_BANK(0);
1370 ephs = inw(ioaddr + EPH);
dd0fab5b 1371 pr_debug("%s: Ethernet protocol handler interrupt, status"
1da177e4
LT		 1372 " %4.4x.\n", dev->name, ephs);
1373 /* Could be a counter roll-over warning: update stats. */
1374 card_stats = inw(ioaddr + COUNTER);
1375 /* single collisions */
6fb7298c 1376 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT		 1377 card_stats >>= 4;
1378 /* multiple collisions */
6fb7298c 1379 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT		 1380#if 0 /* These are for when linux supports these statistics */
1381 card_stats >>= 4; /* deferred */
1382 card_stats >>= 4; /* excess deferred */
1383#endif
1384 /* If we had a transmit error we must re-enable the transmitter. */
1385 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1386
1387 /* Clear a link error interrupt. */
1388 SMC_SELECT_BANK(1);
1389 outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL);
1390 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1391 ioaddr + CONTROL);
1392 SMC_SELECT_BANK(2);
1393}
1394
1395/*====================================================================*/
1396
7d12e780 1397static irqreturn_t smc_interrupt(int irq, void *dev_id)
1da177e4
LT		 1398{
1399 struct net_device *dev = dev_id;
1400 struct smc_private *smc = netdev_priv(dev);
906da809 1401 unsigned int ioaddr;
1da177e4
LT		 1402 u_short saved_bank, saved_pointer, mask, status;
1403 unsigned int handled = 1;
1404 char bogus_cnt = INTR_WORK; /* Work we are willing to do. */
1405
1406 if (!netif_device_present(dev))
1407 return IRQ_NONE;
1408
1409 ioaddr = dev->base_addr;
1410
dd0fab5b 1411 pr_debug("%s: SMC91c92 interrupt %d at %#x.\n", dev->name,
1da177e4
LT		 1412 irq, ioaddr);
1413
85e27831 1414 spin_lock(&smc->lock);
1da177e4
LT		 1415 smc->watchdog = 0;
1416 saved_bank = inw(ioaddr + BANK_SELECT);
1417 if ((saved_bank & 0xff00) != 0x3300) {
1418 /* The device does not exist -- the card could be off-line, or
1419 maybe it has been ejected. */
dd0fab5b 1420 pr_debug("%s: SMC91c92 interrupt %d for non-existent"
1da177e4
LT		 1421 "/ejected device.\n", dev->name, irq);
1422 handled = 0;
1423 goto irq_done;
1424 }
1425
1426 SMC_SELECT_BANK(2);
1427 saved_pointer = inw(ioaddr + POINTER);
1428 mask = inw(ioaddr + INTERRUPT) >> 8;
1429 /* clear all interrupts */
1430 outw(0, ioaddr + INTERRUPT);
1431
1432 do { /* read the status flag, and mask it */
1433 status = inw(ioaddr + INTERRUPT) & 0xff;
dd0fab5b 1434 pr_debug("%s: Status is %#2.2x (mask %#2.2x).\n", dev->name,
1da177e4
LT		 1435 status, mask);
1436 if ((status & mask) == 0) {
1437 if (bogus_cnt == INTR_WORK)
1438 handled = 0;
1439 break;
1440 }
1441 if (status & IM_RCV_INT) {
1442 /* Got a packet(s). */
1443 smc_rx(dev);
1444 }
1445 if (status & IM_TX_INT) {
1446 smc_tx_err(dev);
1447 outw(IM_TX_INT, ioaddr + INTERRUPT);
1448 }
1449 status &= mask;
1450 if (status & IM_TX_EMPTY_INT) {
1451 outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT);
1452 mask &= ~IM_TX_EMPTY_INT;
6fb7298c 1453 dev->stats.tx_packets += smc->packets_waiting;
1da177e4
LT		 1454 smc->packets_waiting = 0;
1455 }
1456 if (status & IM_ALLOC_INT) {
1457 /* Clear this interrupt so it doesn't happen again */
1458 mask &= ~IM_ALLOC_INT;
1459
1460 smc_hardware_send_packet(dev);
1461
1462 /* enable xmit interrupts based on this */
1463 mask |= (IM_TX_EMPTY_INT | IM_TX_INT);
1464
1465 /* and let the card send more packets to me */
1466 netif_wake_queue(dev);
1467 }
1468 if (status & IM_RX_OVRN_INT) {
6fb7298c
SH		 1469 dev->stats.rx_errors++;
1470 dev->stats.rx_fifo_errors++;
1da177e4
LT		 1471 if (smc->duplex)
1472 smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */
1473 outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT);
1474 }
1475 if (status & IM_EPH_INT)
1476 smc_eph_irq(dev);
1477 } while (--bogus_cnt);
1478
dd0fab5b 1479 pr_debug(" Restoring saved registers mask %2.2x bank %4.4x"
1da177e4
LT		 1480 " pointer %4.4x.\n", mask, saved_bank, saved_pointer);
1481
1482 /* restore state register */
1483 outw((mask<<8), ioaddr + INTERRUPT);
1484 outw(saved_pointer, ioaddr + POINTER);
1485 SMC_SELECT_BANK(saved_bank);
1486
dd0fab5b 1487 pr_debug("%s: Exiting interrupt IRQ%d.\n", dev->name, irq);
1da177e4
LT		 1488
1489irq_done:
1490
1491 if ((smc->manfid == MANFID_OSITECH) &&
1492 (smc->cardid != PRODID_OSITECH_SEVEN)) {
1493 /* Retrigger interrupt if needed */
1494 mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR);
1495 set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR);
1496 }
1497 if (smc->manfid == MANFID_MOTOROLA) {
1498 u_char cor;
1499 cor = readb(smc->base + MOT_UART + CISREG_COR);
1500 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR);
1501 writeb(cor, smc->base + MOT_UART + CISREG_COR);
1502 cor = readb(smc->base + MOT_LAN + CISREG_COR);
1503 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR);
1504 writeb(cor, smc->base + MOT_LAN + CISREG_COR);
1505 }
9735b7ef
KK		 1506
1507 if ((smc->base != NULL) && /* Megahertz MFC's */
1508 (smc->manfid == MANFID_MEGAHERTZ) &&
1509 (smc->cardid == PRODID_MEGAHERTZ_EM3288)) {
1510
1511 u_char tmp;
1512 tmp = readb(smc->base+MEGAHERTZ_ISR);
1513 tmp = readb(smc->base+MEGAHERTZ_ISR);
1514
1515 /* Retrigger interrupt if needed */
1516 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1517 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1da177e4 1518 }
9735b7ef 1519
85e27831 1520 spin_unlock(&smc->lock);
1da177e4
LT		 1521 return IRQ_RETVAL(handled);
1522}
1523
1524/*====================================================================*/
1525
1526static void smc_rx(struct net_device *dev)
1527{
906da809 1528 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1529 int rx_status;
1530 int packet_length; /* Caution: not frame length, rather words
1531 to transfer from the chip. */
1532
1533 /* Assertion: we are in Window 2. */
1534
1535 if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) {
1536 printk(KERN_ERR "%s: smc_rx() with nothing on Rx FIFO.\n",
1537 dev->name);
1538 return;
1539 }
1540
1541 /* Reset the read pointer, and read the status and packet length. */
1542 outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER);
1543 rx_status = inw(ioaddr + DATA_1);
1544 packet_length = inw(ioaddr + DATA_1) & 0x07ff;
1545
dd0fab5b 1546 pr_debug("%s: Receive status %4.4x length %d.\n",
1da177e4
LT		 1547 dev->name, rx_status, packet_length);
1548
1549 if (!(rx_status & RS_ERRORS)) {
1550 /* do stuff to make a new packet */
1551 struct sk_buff *skb;
1552
1553 /* Note: packet_length adds 5 or 6 extra bytes here! */
1554 skb = dev_alloc_skb(packet_length+2);
1555
1556 if (skb == NULL) {
dd0fab5b 1557 pr_debug("%s: Low memory, packet dropped.\n", dev->name);
6fb7298c 1558 dev->stats.rx_dropped++;
1da177e4
LT		 1559 outw(MC_RELEASE, ioaddr + MMU_CMD);
1560 return;
1561 }
1562
1563 packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6);
1564 skb_reserve(skb, 2);
1565 insw(ioaddr+DATA_1, skb_put(skb, packet_length),
1566 (packet_length+1)>>1);
1567 skb->protocol = eth_type_trans(skb, dev);
1568
1da177e4
LT		 1569 netif_rx(skb);
1570 dev->last_rx = jiffies;
6fb7298c
SH		 1571 dev->stats.rx_packets++;
1572 dev->stats.rx_bytes += packet_length;
1da177e4 1573 if (rx_status & RS_MULTICAST)
6fb7298c 1574 dev->stats.multicast++;
1da177e4
LT		 1575 } else {
1576 /* error ... */
6fb7298c 1577 dev->stats.rx_errors++;
1da177e4 1578
6fb7298c 1579 if (rx_status & RS_ALGNERR) dev->stats.rx_frame_errors++;
1da177e4 1580 if (rx_status & (RS_TOOSHORT | RS_TOOLONG))
6fb7298c
SH		 1581 dev->stats.rx_length_errors++;
1582 if (rx_status & RS_BADCRC) dev->stats.rx_crc_errors++;
1da177e4
LT		 1583 }
1584 /* Let the MMU free the memory of this packet. */
1585 outw(MC_RELEASE, ioaddr + MMU_CMD);
1da177e4
LT		 1586}
1587
1da177e4
LT		 1588/*======================================================================
1589
1590 Set the receive mode.
1591
1592 This routine is used by both the protocol level to notify us of
1593 promiscuous/multicast mode changes, and by the open/reset code to
1594 initialize the Rx registers. We always set the multicast list and
1595 leave the receiver running.
1596
1597======================================================================*/
1598
1599static void set_rx_mode(struct net_device *dev)
1600{
906da809 1601 unsigned int ioaddr = dev->base_addr;
1da177e4 1602 struct smc_private *smc = netdev_priv(dev);
a6d37024 1603 unsigned char multicast_table[8];
1da177e4
LT		 1604 unsigned long flags;
1605 u_short rx_cfg_setting;
a6d37024
KK		 1606 int i;
1607
1608 memset(multicast_table, 0, sizeof(multicast_table));
1da177e4
LT		 1609
1610 if (dev->flags & IFF_PROMISC) {
1da177e4
LT		 1611 rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti;
1612 } else if (dev->flags & IFF_ALLMULTI)
1613 rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti;
1614 else {
4cd24eaf 1615 if (!netdev_mc_empty(dev)) {
22bedad3 1616 struct netdev_hw_addr *ha;
91fea585 1617
22bedad3
JP		 1618 netdev_for_each_mc_addr(ha, dev) {
1619 u_int position = ether_crc(6, ha->addr);
91fea585
JP		 1620 multicast_table[position >> 29] |= 1 << ((position >> 26) & 7);
1621 }
1da177e4
LT		 1622 }
1623 rx_cfg_setting = RxStripCRC | RxEnable;
1624 }
1625
1626 /* Load MC table and Rx setting into the chip without interrupts. */
1627 spin_lock_irqsave(&smc->lock, flags);
1628 SMC_SELECT_BANK(3);
a6d37024
KK		 1629 for (i = 0; i < 8; i++)
1630 outb(multicast_table[i], ioaddr + MULTICAST0 + i);
1da177e4
LT		 1631 SMC_SELECT_BANK(0);
1632 outw(rx_cfg_setting, ioaddr + RCR);
1633 SMC_SELECT_BANK(2);
1634 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1635}
1636
1637/*======================================================================
1638
1639 Senses when a card's config changes. Here, it's coax or TP.
1640
1641======================================================================*/
1642
1643static int s9k_config(struct net_device *dev, struct ifmap *map)
1644{
1645 struct smc_private *smc = netdev_priv(dev);
1646 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1647 if (smc->cfg & CFG_MII_SELECT)
1648 return -EOPNOTSUPP;
1649 else if (map->port > 2)
1650 return -EINVAL;
1651 dev->if_port = map->port;
1652 printk(KERN_INFO "%s: switched to %s port\n",
1653 dev->name, if_names[dev->if_port]);
1654 smc_reset(dev);
1655 }
1656 return 0;
1657}
1658
1659/*======================================================================
1660
1661 Reset the chip, reloading every register that might be corrupted.
1662
1663======================================================================*/
1664
1665/*
1666 Set transceiver type, perhaps to something other than what the user
1667 specified in dev->if_port.
1668*/
1669static void smc_set_xcvr(struct net_device *dev, int if_port)
1670{
1671 struct smc_private *smc = netdev_priv(dev);
906da809 1672 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1673 u_short saved_bank;
1674
1675 saved_bank = inw(ioaddr + BANK_SELECT);
1676 SMC_SELECT_BANK(1);
1677 if (if_port == 2) {
1678 outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG);
1679 if ((smc->manfid == MANFID_OSITECH) &&
1680 (smc->cardid != PRODID_OSITECH_SEVEN))
1681 set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1682 smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002);
1683 } else {
1684 outw(smc->cfg, ioaddr + CONFIG);
1685 if ((smc->manfid == MANFID_OSITECH) &&
1686 (smc->cardid != PRODID_OSITECH_SEVEN))
1687 mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1688 smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001);
1689 }
1690 SMC_SELECT_BANK(saved_bank);
1691}
1692
1693static void smc_reset(struct net_device *dev)
1694{
906da809 1695 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1696 struct smc_private *smc = netdev_priv(dev);
1697 int i;
1698
dd0fab5b 1699 pr_debug("%s: smc91c92 reset called.\n", dev->name);
1da177e4
LT		 1700
1701 /* The first interaction must be a write to bring the chip out
1702 of sleep mode. */
1703 SMC_SELECT_BANK(0);
1704 /* Reset the chip. */
1705 outw(RCR_SOFTRESET, ioaddr + RCR);
1706 udelay(10);
1707
1708 /* Clear the transmit and receive configuration registers. */
1709 outw(RCR_CLEAR, ioaddr + RCR);
1710 outw(TCR_CLEAR, ioaddr + TCR);
1711
1712 /* Set the Window 1 control, configuration and station addr registers.
1713 No point in writing the I/O base register ;-> */
1714 SMC_SELECT_BANK(1);
d6e05edc 1715 /* Automatically release successfully transmitted packets,
1da177e4
LT		 1716 Accept link errors, counter and Tx error interrupts. */
1717 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1718 ioaddr + CONTROL);
1719 smc_set_xcvr(dev, dev->if_port);
1720 if ((smc->manfid == MANFID_OSITECH) &&
1721 (smc->cardid != PRODID_OSITECH_SEVEN))
1722 outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) |
1723 (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00),
1724 ioaddr - 0x10 + OSITECH_AUI_PWR);
1725
1726 /* Fill in the physical address. The databook is wrong about the order! */
1727 for (i = 0; i < 6; i += 2)
1728 outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i],
1729 ioaddr + ADDR0 + i);
1730
1731 /* Reset the MMU */
1732 SMC_SELECT_BANK(2);
1733 outw(MC_RESET, ioaddr + MMU_CMD);
1734 outw(0, ioaddr + INTERRUPT);
1735
1736 /* Re-enable the chip. */
1737 SMC_SELECT_BANK(0);
1738 outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) |
1739 TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR);
1740 set_rx_mode(dev);
1741
1742 if (smc->cfg & CFG_MII_SELECT) {
1743 SMC_SELECT_BANK(3);
1744
1745 /* Reset MII */
1746 mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000);
1747
1748 /* Advertise 100F, 100H, 10F, 10H */
1749 mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1);
1750
1751 /* Restart MII autonegotiation */
1752 mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000);
1753 mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200);
1754 }
1755
1756 /* Enable interrupts. */
1757 SMC_SELECT_BANK(2);
1758 outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8,
1759 ioaddr + INTERRUPT);
1760}
1761
1762/*======================================================================
1763
1764 Media selection timer routine
1765
1766======================================================================*/
1767
1768static void media_check(u_long arg)
1769{
1770 struct net_device *dev = (struct net_device *) arg;
1771 struct smc_private *smc = netdev_priv(dev);
906da809 1772 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1773 u_short i, media, saved_bank;
1774 u_short link;
85e27831
K		 1775 unsigned long flags;
1776
1777 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 1778
1779 saved_bank = inw(ioaddr + BANK_SELECT);
1780
1781 if (!netif_device_present(dev))
1782 goto reschedule;
1783
1784 SMC_SELECT_BANK(2);
1785
1786 /* need MC_RESET to keep the memory consistent. errata? */
1787 if (smc->rx_ovrn) {
1788 outw(MC_RESET, ioaddr + MMU_CMD);
1789 smc->rx_ovrn = 0;
1790 }
1791 i = inw(ioaddr + INTERRUPT);
1792 SMC_SELECT_BANK(0);
1793 media = inw(ioaddr + EPH) & EPH_LINK_OK;
1794 SMC_SELECT_BANK(1);
1795 media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1;
1796
2a915157
KK		 1797 SMC_SELECT_BANK(saved_bank);
1798 spin_unlock_irqrestore(&smc->lock, flags);
1799
1da177e4
LT		 1800 /* Check for pending interrupt with watchdog flag set: with
1801 this, we can limp along even if the interrupt is blocked */
1802 if (smc->watchdog++ && ((i>>8) & i)) {
1803 if (!smc->fast_poll)
1804 printk(KERN_INFO "%s: interrupt(s) dropped!\n", dev->name);
2a915157 1805 local_irq_save(flags);
e363d138 1806 smc_interrupt(dev->irq, dev);
2a915157 1807 local_irq_restore(flags);
1da177e4
LT		 1808 smc->fast_poll = HZ;
1809 }
1810 if (smc->fast_poll) {
1811 smc->fast_poll--;
1812 smc->media.expires = jiffies + HZ/100;
1813 add_timer(&smc->media);
1da177e4
LT		 1814 return;
1815 }
1816
2a915157
KK		 1817 spin_lock_irqsave(&smc->lock, flags);
1818
1819 saved_bank = inw(ioaddr + BANK_SELECT);
1820
1da177e4
LT		 1821 if (smc->cfg & CFG_MII_SELECT) {
1822 if (smc->mii_if.phy_id < 0)
1823 goto reschedule;
1824
1825 SMC_SELECT_BANK(3);
1826 link = mdio_read(dev, smc->mii_if.phy_id, 1);
1827 if (!link || (link == 0xffff)) {
1828 printk(KERN_INFO "%s: MII is missing!\n", dev->name);
1829 smc->mii_if.phy_id = -1;
1830 goto reschedule;
1831 }
1832
1833 link &= 0x0004;
1834 if (link != smc->link_status) {
1835 u_short p = mdio_read(dev, smc->mii_if.phy_id, 5);
1836 printk(KERN_INFO "%s: %s link beat\n", dev->name,
1837 (link) ? "found" : "lost");
1838 smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40))
1839 ? TCR_FDUPLX : 0);
1840 if (link) {
1841 printk(KERN_INFO "%s: autonegotiation complete: "
1842 "%sbaseT-%cD selected\n", dev->name,
1843 ((p & 0x0180) ? "100" : "10"),
1844 (smc->duplex ? 'F' : 'H'));
1845 }
1846 SMC_SELECT_BANK(0);
1847 outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR);
1848 smc->link_status = link;
1849 }
1850 goto reschedule;
1851 }
1852
1853 /* Ignore collisions unless we've had no rx's recently */
4851d3aa 1854 if (time_after(jiffies, dev->last_rx + HZ)) {
1da177e4
LT		 1855 if (smc->tx_err || (smc->media_status & EPH_16COL))
1856 media |= EPH_16COL;
1857 }
1858 smc->tx_err = 0;
1859
1860 if (media != smc->media_status) {
1861 if ((media & smc->media_status & 1) &&
1862 ((smc->media_status ^ media) & EPH_LINK_OK))
1863 printk(KERN_INFO "%s: %s link beat\n", dev->name,
1864 (smc->media_status & EPH_LINK_OK ? "lost" : "found"));
1865 else if ((media & smc->media_status & 2) &&
1866 ((smc->media_status ^ media) & EPH_16COL))
1867 printk(KERN_INFO "%s: coax cable %s\n", dev->name,
1868 (media & EPH_16COL ? "problem" : "ok"));
1869 if (dev->if_port == 0) {
1870 if (media & 1) {
1871 if (media & EPH_LINK_OK)
1872 printk(KERN_INFO "%s: flipped to 10baseT\n",
1873 dev->name);
1874 else
1875 smc_set_xcvr(dev, 2);
1876 } else {
1877 if (media & EPH_16COL)
1878 smc_set_xcvr(dev, 1);
1879 else
1880 printk(KERN_INFO "%s: flipped to 10base2\n",
1881 dev->name);
1882 }
1883 }
1884 smc->media_status = media;
1885 }
1886
1887reschedule:
1888 smc->media.expires = jiffies + HZ;
1889 add_timer(&smc->media);
1890 SMC_SELECT_BANK(saved_bank);
85e27831 1891 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1892}
1893
1894static int smc_link_ok(struct net_device *dev)
1895{
906da809 1896 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1897 struct smc_private *smc = netdev_priv(dev);
1898
1899 if (smc->cfg & CFG_MII_SELECT) {
1900 return mii_link_ok(&smc->mii_if);
1901 } else {
1902 SMC_SELECT_BANK(0);
1903 return inw(ioaddr + EPH) & EPH_LINK_OK;
1904 }
1905}
1906
1907static int smc_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1908{
1909 u16 tmp;
906da809 1910 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1911
1912 ecmd->supported = (SUPPORTED_TP | SUPPORTED_AUI |
1913 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full);
1914
1915 SMC_SELECT_BANK(1);
1916 tmp = inw(ioaddr + CONFIG);
1917 ecmd->port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP;
1918 ecmd->transceiver = XCVR_INTERNAL;
1919 ecmd->speed = SPEED_10;
1920 ecmd->phy_address = ioaddr + MGMT;
1921
1922 SMC_SELECT_BANK(0);
1923 tmp = inw(ioaddr + TCR);
1924 ecmd->duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF;
1925
1926 return 0;
1927}
1928
1929static int smc_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1930{
1931 u16 tmp;
906da809 1932 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1933
1934 if (ecmd->speed != SPEED_10)
1935 return -EINVAL;
1936 if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
1937 return -EINVAL;
1938 if (ecmd->port != PORT_TP && ecmd->port != PORT_AUI)
1939 return -EINVAL;
1940 if (ecmd->transceiver != XCVR_INTERNAL)
1941 return -EINVAL;
1942
1943 if (ecmd->port == PORT_AUI)
1944 smc_set_xcvr(dev, 1);
1945 else
1946 smc_set_xcvr(dev, 0);
1947
1948 SMC_SELECT_BANK(0);
1949 tmp = inw(ioaddr + TCR);
1950 if (ecmd->duplex == DUPLEX_FULL)
1951 tmp |= TCR_FDUPLX;
1952 else
1953 tmp &= ~TCR_FDUPLX;
1954 outw(tmp, ioaddr + TCR);
1955
1956 return 0;
1957}
1958
1959static int check_if_running(struct net_device *dev)
1960{
1961 if (!netif_running(dev))
1962 return -EINVAL;
1963 return 0;
1964}
1965
1966static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1967{
1968 strcpy(info->driver, DRV_NAME);
1969 strcpy(info->version, DRV_VERSION);
1970}
1971
1972static int smc_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1973{
1974 struct smc_private *smc = netdev_priv(dev);
906da809 1975 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1976 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1977 int ret;
2a915157 1978 unsigned long flags;
1da177e4 1979
2a915157 1980 spin_lock_irqsave(&smc->lock, flags);
85e27831 1981 SMC_SELECT_BANK(3);
1da177e4
LT		 1982 if (smc->cfg & CFG_MII_SELECT)
1983 ret = mii_ethtool_gset(&smc->mii_if, ecmd);
1984 else
1985 ret = smc_netdev_get_ecmd(dev, ecmd);
1da177e4 1986 SMC_SELECT_BANK(saved_bank);
2a915157 1987 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1988 return ret;
1989}
1990
1991static int smc_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1992{
1993 struct smc_private *smc = netdev_priv(dev);
906da809 1994 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1995 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1996 int ret;
2a915157 1997 unsigned long flags;
1da177e4 1998
2a915157 1999 spin_lock_irqsave(&smc->lock, flags);
85e27831 2000 SMC_SELECT_BANK(3);
1da177e4
LT		 2001 if (smc->cfg & CFG_MII_SELECT)
2002 ret = mii_ethtool_sset(&smc->mii_if, ecmd);
2003 else
2004 ret = smc_netdev_set_ecmd(dev, ecmd);
1da177e4 2005 SMC_SELECT_BANK(saved_bank);
2a915157 2006 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 2007 return ret;
2008}
2009
2010static u32 smc_get_link(struct net_device *dev)
2011{
2012 struct smc_private *smc = netdev_priv(dev);
906da809 2013 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 2014 u16 saved_bank = inw(ioaddr + BANK_SELECT);
2015 u32 ret;
2a915157 2016 unsigned long flags;
1da177e4 2017
2a915157 2018 spin_lock_irqsave(&smc->lock, flags);
85e27831 2019 SMC_SELECT_BANK(3);
1da177e4 2020 ret = smc_link_ok(dev);
1da177e4 2021 SMC_SELECT_BANK(saved_bank);
2a915157 2022 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 2023 return ret;
2024}
2025
1da177e4
LT		 2026static int smc_nway_reset(struct net_device *dev)
2027{
2028 struct smc_private *smc = netdev_priv(dev);
2029 if (smc->cfg & CFG_MII_SELECT) {
906da809 2030 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 2031 u16 saved_bank = inw(ioaddr + BANK_SELECT);
2032 int res;
2033
2034 SMC_SELECT_BANK(3);
2035 res = mii_nway_restart(&smc->mii_if);
2036 SMC_SELECT_BANK(saved_bank);
2037
2038 return res;
2039 } else
2040 return -EOPNOTSUPP;
2041}
2042
7282d491 2043static const struct ethtool_ops ethtool_ops = {
1da177e4
LT		 2044 .begin = check_if_running,
2045 .get_drvinfo = smc_get_drvinfo,
2046 .get_settings = smc_get_settings,
2047 .set_settings = smc_set_settings,
2048 .get_link = smc_get_link,
1da177e4
LT		 2049 .nway_reset = smc_nway_reset,
2050};
2051
2052static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
2053{
2054 struct smc_private *smc = netdev_priv(dev);
2055 struct mii_ioctl_data *mii = if_mii(rq);
2056 int rc = 0;
2057 u16 saved_bank;
906da809 2058 unsigned int ioaddr = dev->base_addr;
2a915157 2059 unsigned long flags;
1da177e4
LT		 2060
2061 if (!netif_running(dev))
2062 return -EINVAL;
2063
2a915157 2064 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 2065 saved_bank = inw(ioaddr + BANK_SELECT);
2066 SMC_SELECT_BANK(3);
2067 rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL);
2068 SMC_SELECT_BANK(saved_bank);
2a915157 2069 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 2070 return rc;
2071}
2072
5c672220
DB		 2073static struct pcmcia_device_id smc91c92_ids[] = {
2074 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501),
2075 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a),
2076 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63),
2077 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63),
2078 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef),
2079 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef),
2080 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c),
2081 PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e),
d277ad0e
K		 2082 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9),
2083 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed),
5c672220
DB		 2084 PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020),
2085 PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023),
2086 PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb),
2087 PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc),
2088 PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1),
2089 PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5),
2090 PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9),
2091 PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953),
2092 PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a),
d277ad0e
K		 2093 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314),
2094 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a),
5c672220
DB		 2095 PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc),
2096 PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9),
2097 PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d),
2098 /* These conflict with other cards! */
2099 /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */
2100 /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */
2101 PCMCIA_DEVICE_NULL,
2102};
2103MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids);
2104
1da177e4
LT		 2105static struct pcmcia_driver smc91c92_cs_driver = {
2106 .owner = THIS_MODULE,
2107 .drv = {
2108 .name = "smc91c92_cs",
2109 },
15b99ac1 2110 .probe = smc91c92_probe,
cc3b4866 2111 .remove = smc91c92_detach,
5c672220 2112 .id_table = smc91c92_ids,
98e4c28b
DB		 2113 .suspend = smc91c92_suspend,
2114 .resume = smc91c92_resume,
1da177e4
LT		 2115};
2116
2117static int __init init_smc91c92_cs(void)
2118{
2119 return pcmcia_register_driver(&smc91c92_cs_driver);
2120}
2121
2122static void __exit exit_smc91c92_cs(void)
2123{
2124 pcmcia_unregister_driver(&smc91c92_cs_driver);
1da177e4
LT		 2125}
2126
2127module_init(init_smc91c92_cs);
2128module_exit(exit_smc91c92_cs);
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