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pcmcia: do not use win_req_t when calling pcmcia_request_window()
[mirror_ubuntu-bionic-kernel.git] / drivers / net / pcmcia / smc91c92_cs.c
CommitLineData
1da177e4
LT		 1/*======================================================================
2
3 A PCMCIA ethernet driver for SMC91c92-based cards.
4
5 This driver supports Megahertz PCMCIA ethernet cards; and
6 Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem
7 multifunction cards.
8
9 Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net
10
11 smc91c92_cs.c 1.122 2002/10/25 06:26:39
12
13 This driver contains code written by Donald Becker
14 (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au),
15 David Hinds (dahinds@users.sourceforge.net), and Erik Stahlman
16 (erik@vt.edu). Donald wrote the SMC 91c92 code using parts of
17 Erik's SMC 91c94 driver. Rowan wrote a similar driver, and I've
18 incorporated some parts of his driver here. I (Dave) wrote most
19 of the PCMCIA glue code, and the Ositech support code. Kelly
20 Stephens (kstephen@holli.com) added support for the Motorola
21 Mariner, with help from Allen Brost.
22
23 This software may be used and distributed according to the terms of
24 the GNU General Public License, incorporated herein by reference.
25
26======================================================================*/
27
28#include <linux/module.h>
29#include <linux/kernel.h>
30#include <linux/init.h>
31#include <linux/slab.h>
32#include <linux/string.h>
33#include <linux/timer.h>
34#include <linux/interrupt.h>
35#include <linux/delay.h>
36#include <linux/crc32.h>
37#include <linux/netdevice.h>
38#include <linux/etherdevice.h>
39#include <linux/skbuff.h>
40#include <linux/if_arp.h>
41#include <linux/ioport.h>
42#include <linux/ethtool.h>
43#include <linux/mii.h>
4851d3aa 44#include <linux/jiffies.h>
75bf758f 45#include <linux/firmware.h>
1da177e4 46
1da177e4
LT		 47#include <pcmcia/cs.h>
48#include <pcmcia/cistpl.h>
49#include <pcmcia/cisreg.h>
50#include <pcmcia/ciscode.h>
51#include <pcmcia/ds.h>
50db3fdb 52#include <pcmcia/ss.h>
1da177e4
LT		 53
54#include <asm/io.h>
55#include <asm/system.h>
56#include <asm/uaccess.h>
57
1da177e4
LT		 58/*====================================================================*/
59
f71e1309 60static const char *if_names[] = { "auto", "10baseT", "10base2"};
1da177e4 61
75bf758f
JSR		 62/* Firmware name */
63#define FIRMWARE_NAME "ositech/Xilinx7OD.bin"
64
1da177e4
LT		 65/* Module parameters */
66
67MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver");
68MODULE_LICENSE("GPL");
75bf758f 69MODULE_FIRMWARE(FIRMWARE_NAME);
1da177e4
LT		 70
71#define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
72
73/*
74 Transceiver/media type.
75 0 = auto
76 1 = 10baseT (and autoselect if #define AUTOSELECT),
77 2 = AUI/10base2,
78*/
79INT_MODULE_PARM(if_port, 0);
80
1da177e4
LT		 81
82#define DRV_NAME "smc91c92_cs"
d5b20697 83#define DRV_VERSION "1.123"
1da177e4
LT		 84
85/*====================================================================*/
86
87/* Operational parameter that usually are not changed. */
88
89/* Time in jiffies before concluding Tx hung */
90#define TX_TIMEOUT ((400*HZ)/1000)
91
92/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
93#define INTR_WORK 4
94
95/* Times to check the check the chip before concluding that it doesn't
96 currently have room for another Tx packet. */
97#define MEMORY_WAIT_TIME 8
98
1da177e4 99struct smc_private {
fd238232 100 struct pcmcia_device *p_dev;
1da177e4
LT		 101 spinlock_t lock;
102 u_short manfid;
103 u_short cardid;
6fb7298c 104
1da177e4
LT		 105 struct sk_buff *saved_skb;
106 int packets_waiting;
107 void __iomem *base;
108 u_short cfg;
109 struct timer_list media;
110 int watchdog, tx_err;
111 u_short media_status;
112 u_short fast_poll;
113 u_short link_status;
114 struct mii_if_info mii_if;
115 int duplex;
116 int rx_ovrn;
117};
118
119/* Special definitions for Megahertz multifunction cards */
120#define MEGAHERTZ_ISR 0x0380
121
122/* Special function registers for Motorola Mariner */
123#define MOT_LAN 0x0000
124#define MOT_UART 0x0020
125#define MOT_EEPROM 0x20
126
127#define MOT_NORMAL \
128(COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA)
129
130/* Special function registers for Ositech cards */
131#define OSITECH_AUI_CTL 0x0c
132#define OSITECH_PWRDOWN 0x0d
133#define OSITECH_RESET 0x0e
134#define OSITECH_ISR 0x0f
135#define OSITECH_AUI_PWR 0x0c
136#define OSITECH_RESET_ISR 0x0e
137
138#define OSI_AUI_PWR 0x40
139#define OSI_LAN_PWRDOWN 0x02
140#define OSI_MODEM_PWRDOWN 0x01
141#define OSI_LAN_RESET 0x02
142#define OSI_MODEM_RESET 0x01
143
144/* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */
145#define BANK_SELECT 14 /* Window select register. */
146#define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); }
147
148/* Bank 0 registers. */
149#define TCR 0 /* transmit control register */
150#define TCR_CLEAR 0 /* do NOTHING */
151#define TCR_ENABLE 0x0001 /* if this is 1, we can transmit */
152#define TCR_PAD_EN 0x0080 /* pads short packets to 64 bytes */
153#define TCR_MONCSN 0x0400 /* Monitor Carrier. */
154#define TCR_FDUPLX 0x0800 /* Full duplex mode. */
155#define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN
156
157#define EPH 2 /* Ethernet Protocol Handler report. */
158#define EPH_TX_SUC 0x0001
159#define EPH_SNGLCOL 0x0002
160#define EPH_MULCOL 0x0004
161#define EPH_LTX_MULT 0x0008
162#define EPH_16COL 0x0010
163#define EPH_SQET 0x0020
164#define EPH_LTX_BRD 0x0040
165#define EPH_TX_DEFR 0x0080
166#define EPH_LAT_COL 0x0200
167#define EPH_LOST_CAR 0x0400
168#define EPH_EXC_DEF 0x0800
169#define EPH_CTR_ROL 0x1000
170#define EPH_RX_OVRN 0x2000
171#define EPH_LINK_OK 0x4000
172#define EPH_TX_UNRN 0x8000
173#define MEMINFO 8 /* Memory Information Register */
174#define MEMCFG 10 /* Memory Configuration Register */
175
176/* Bank 1 registers. */
177#define CONFIG 0
178#define CFG_MII_SELECT 0x8000 /* 91C100 only */
179#define CFG_NO_WAIT 0x1000
180#define CFG_FULL_STEP 0x0400
181#define CFG_SET_SQLCH 0x0200
182#define CFG_AUI_SELECT 0x0100
183#define CFG_16BIT 0x0080
184#define CFG_DIS_LINK 0x0040
185#define CFG_STATIC 0x0030
186#define CFG_IRQ_SEL_1 0x0004
187#define CFG_IRQ_SEL_0 0x0002
188#define BASE_ADDR 2
189#define ADDR0 4
190#define GENERAL 10
191#define CONTROL 12
192#define CTL_STORE 0x0001
193#define CTL_RELOAD 0x0002
194#define CTL_EE_SELECT 0x0004
195#define CTL_TE_ENABLE 0x0020
196#define CTL_CR_ENABLE 0x0040
197#define CTL_LE_ENABLE 0x0080
198#define CTL_AUTO_RELEASE 0x0800
199#define CTL_POWERDOWN 0x2000
200
201/* Bank 2 registers. */
202#define MMU_CMD 0
203#define MC_ALLOC 0x20 /* or with number of 256 byte packets */
204#define MC_RESET 0x40
205#define MC_RELEASE 0x80 /* remove and release the current rx packet */
206#define MC_FREEPKT 0xA0 /* Release packet in PNR register */
207#define MC_ENQUEUE 0xC0 /* Enqueue the packet for transmit */
208#define PNR_ARR 2
209#define FIFO_PORTS 4
210#define FP_RXEMPTY 0x8000
211#define POINTER 6
212#define PTR_AUTO_INC 0x0040
213#define PTR_READ 0x2000
214#define PTR_AUTOINC 0x4000
215#define PTR_RCV 0x8000
216#define DATA_1 8
217#define INTERRUPT 12
218#define IM_RCV_INT 0x1
219#define IM_TX_INT 0x2
220#define IM_TX_EMPTY_INT 0x4
221#define IM_ALLOC_INT 0x8
222#define IM_RX_OVRN_INT 0x10
223#define IM_EPH_INT 0x20
224
225#define RCR 4
226enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002,
227 RxEnable = 0x0100, RxStripCRC = 0x0200};
228#define RCR_SOFTRESET 0x8000 /* resets the chip */
229#define RCR_STRIP_CRC 0x200 /* strips CRC */
230#define RCR_ENABLE 0x100 /* IFF this is set, we can receive packets */
231#define RCR_ALMUL 0x4 /* receive all multicast packets */
232#define RCR_PROMISC 0x2 /* enable promiscuous mode */
233
234/* the normal settings for the RCR register : */
235#define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE)
236#define RCR_CLEAR 0x0 /* set it to a base state */
237#define COUNTER 6
238
239/* BANK 3 -- not the same values as in smc9194! */
240#define MULTICAST0 0
241#define MULTICAST2 2
242#define MULTICAST4 4
243#define MULTICAST6 6
244#define MGMT 8
245#define REVISION 0x0a
246
247/* Transmit status bits. */
248#define TS_SUCCESS 0x0001
249#define TS_16COL 0x0010
250#define TS_LATCOL 0x0200
251#define TS_LOSTCAR 0x0400
252
253/* Receive status bits. */
254#define RS_ALGNERR 0x8000
255#define RS_BADCRC 0x2000
256#define RS_ODDFRAME 0x1000
257#define RS_TOOLONG 0x0800
258#define RS_TOOSHORT 0x0400
259#define RS_MULTICAST 0x0001
260#define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)
261
262#define set_bits(v, p) outw(inw(p)|(v), (p))
263#define mask_bits(v, p) outw(inw(p)&(v), (p))
264
265/*====================================================================*/
266
cc3b4866 267static void smc91c92_detach(struct pcmcia_device *p_dev);
15b99ac1 268static int smc91c92_config(struct pcmcia_device *link);
fba395ee 269static void smc91c92_release(struct pcmcia_device *link);
1da177e4
LT		 270
271static int smc_open(struct net_device *dev);
272static int smc_close(struct net_device *dev);
273static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
274static void smc_tx_timeout(struct net_device *dev);
dbf02fae
SH		 275static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
276 struct net_device *dev);
7d12e780 277static irqreturn_t smc_interrupt(int irq, void *dev_id);
1da177e4 278static void smc_rx(struct net_device *dev);
1da177e4
LT		 279static void set_rx_mode(struct net_device *dev);
280static int s9k_config(struct net_device *dev, struct ifmap *map);
281static void smc_set_xcvr(struct net_device *dev, int if_port);
282static void smc_reset(struct net_device *dev);
283static void media_check(u_long arg);
906da809 284static void mdio_sync(unsigned int addr);
1da177e4
LT		 285static int mdio_read(struct net_device *dev, int phy_id, int loc);
286static void mdio_write(struct net_device *dev, int phy_id, int loc, int value);
287static int smc_link_ok(struct net_device *dev);
7282d491 288static const struct ethtool_ops ethtool_ops;
1da177e4 289
9b31b697
SH		 290static const struct net_device_ops smc_netdev_ops = {
291 .ndo_open = smc_open,
292 .ndo_stop = smc_close,
293 .ndo_start_xmit = smc_start_xmit,
294 .ndo_tx_timeout = smc_tx_timeout,
295 .ndo_set_config = s9k_config,
296 .ndo_set_multicast_list = set_rx_mode,
297 .ndo_do_ioctl = &smc_ioctl,
298 .ndo_change_mtu = eth_change_mtu,
299 .ndo_set_mac_address = eth_mac_addr,
300 .ndo_validate_addr = eth_validate_addr,
301};
302
1da177e4
LT		 303/*======================================================================
304
305 smc91c92_attach() creates an "instance" of the driver, allocating
306 local data structures for one device. The device is registered
307 with Card Services.
308
309======================================================================*/
310
15b99ac1 311static int smc91c92_probe(struct pcmcia_device *link)
1da177e4 312{
1da177e4 313 struct smc_private *smc;
1da177e4 314 struct net_device *dev;
1da177e4 315
dd0fab5b 316 dev_dbg(&link->dev, "smc91c92_attach()\n");
1da177e4
LT		 317
318 /* Create new ethernet device */
319 dev = alloc_etherdev(sizeof(struct smc_private));
320 if (!dev)
f8cfa618 321 return -ENOMEM;
1da177e4 322 smc = netdev_priv(dev);
fba395ee 323 smc->p_dev = link;
44b496f6 324 link->priv = dev;
1da177e4
LT		 325
326 spin_lock_init(&smc->lock);
90abdc3b
DB		 327 link->resource[0]->end = 16;
328 link->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
1da177e4 329 link->conf.Attributes = CONF_ENABLE_IRQ;
1da177e4
LT		 330 link->conf.IntType = INT_MEMORY_AND_IO;
331
332 /* The SMC91c92-specific entries in the device structure. */
9b31b697 333 dev->netdev_ops = &smc_netdev_ops;
1da177e4 334 SET_ETHTOOL_OPS(dev, &ethtool_ops);
1da177e4 335 dev->watchdog_timeo = TX_TIMEOUT;
1da177e4
LT		 336
337 smc->mii_if.dev = dev;
338 smc->mii_if.mdio_read = mdio_read;
339 smc->mii_if.mdio_write = mdio_write;
340 smc->mii_if.phy_id_mask = 0x1f;
341 smc->mii_if.reg_num_mask = 0x1f;
342
15b99ac1 343 return smc91c92_config(link);
1da177e4
LT		 344} /* smc91c92_attach */
345
346/*======================================================================
347
348 This deletes a driver "instance". The device is de-registered
349 with Card Services. If it has been released, all local data
350 structures are freed. Otherwise, the structures will be freed
351 when the device is released.
352
353======================================================================*/
354
fba395ee 355static void smc91c92_detach(struct pcmcia_device *link)
1da177e4
LT		 356{
357 struct net_device *dev = link->priv;
1da177e4 358
dd0fab5b 359 dev_dbg(&link->dev, "smc91c92_detach\n");
1da177e4 360
c7c2fa07 361 unregister_netdev(dev);
1da177e4 362
e2d40963 363 smc91c92_release(link);
1da177e4 364
1da177e4
LT		 365 free_netdev(dev);
366} /* smc91c92_detach */
367
368/*====================================================================*/
369
370static int cvt_ascii_address(struct net_device *dev, char *s)
371{
372 int i, j, da, c;
373
374 if (strlen(s) != 12)
375 return -1;
376 for (i = 0; i < 6; i++) {
377 da = 0;
378 for (j = 0; j < 2; j++) {
379 c = *s++;
380 da <<= 4;
381 da += ((c >= '0') && (c <= '9')) ?
382 (c - '0') : ((c & 0x0f) + 9);
383 }
384 dev->dev_addr[i] = da;
385 }
386 return 0;
387}
388
dddfbd82 389/*====================================================================
1da177e4
LT		 390
391 Configuration stuff for Megahertz cards
392
393 mhz_3288_power() is used to power up a 3288's ethernet chip.
394 mhz_mfc_config() handles socket setup for multifunction (1144
395 and 3288) cards. mhz_setup() gets a card's hardware ethernet
396 address.
397
398======================================================================*/
399
fba395ee 400static int mhz_3288_power(struct pcmcia_device *link)
1da177e4
LT		 401{
402 struct net_device *dev = link->priv;
403 struct smc_private *smc = netdev_priv(dev);
404 u_char tmp;
405
406 /* Read the ISR twice... */
407 readb(smc->base+MEGAHERTZ_ISR);
408 udelay(5);
409 readb(smc->base+MEGAHERTZ_ISR);
410
411 /* Pause 200ms... */
412 mdelay(200);
413
414 /* Now read and write the COR... */
415 tmp = readb(smc->base + link->conf.ConfigBase + CISREG_COR);
416 udelay(5);
417 writeb(tmp, smc->base + link->conf.ConfigBase + CISREG_COR);
418
419 return 0;
420}
421
b54bf94b
DB		 422static int mhz_mfc_config_check(struct pcmcia_device *p_dev,
423 cistpl_cftable_entry_t *cf,
8e2fc39d 424 cistpl_cftable_entry_t *dflt,
ad913c11 425 unsigned int vcc,
b54bf94b
DB		 426 void *priv_data)
427{
428 int k;
90abdc3b 429 p_dev->resource[1]->start = cf->io.win[0].base;
b54bf94b
DB		 430 for (k = 0; k < 0x400; k += 0x10) {
431 if (k & 0x80)
432 continue;
90abdc3b
DB		 433 p_dev->resource[0]->start = k ^ 0x300;
434 p_dev->io_lines = 16;
435 if (!pcmcia_request_io(p_dev))
b54bf94b
DB		 436 return 0;
437 }
438 return -ENODEV;
439}
440
fba395ee 441static int mhz_mfc_config(struct pcmcia_device *link)
1da177e4
LT		 442{
443 struct net_device *dev = link->priv;
444 struct smc_private *smc = netdev_priv(dev);
b5cb259e 445 unsigned int offset;
b54bf94b 446 int i;
1da177e4
LT		 447
448 link->conf.Attributes |= CONF_ENABLE_SPKR;
449 link->conf.Status = CCSR_AUDIO_ENA;
90abdc3b
DB		 450 link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
451 link->resource[1]->end = 8;
1da177e4 452
1da177e4
LT		 453 /* The Megahertz combo cards have modem-like CIS entries, so
454 we have to explicitly try a bunch of port combinations. */
b54bf94b 455 if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL))
dddfbd82
DB		 456 return -ENODEV;
457
9a017a91 458 dev->base_addr = link->resource[0]->start;
1da177e4
LT		 459
460 /* Allocate a memory window, for accessing the ISR */
cdb13808
DB		 461 link->resource[2]->flags = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
462 link->resource[2]->start = link->resource[2]->end = 0;
463 i = pcmcia_request_window(link, link->resource[2], 0);
4c89e88b 464 if (i != 0)
dddfbd82
DB		 465 return -ENODEV;
466
cdb13808
DB		 467 smc->base = ioremap(link->resource[2]->start,
468 resource_size(link->resource[2]));
b5cb259e 469 offset = (smc->manfid == MANFID_MOTOROLA) ? link->conf.ConfigBase : 0;
cdb13808 470 i = pcmcia_map_mem_page(link, link->resource[2], offset);
8e95a202
JP		 471 if ((i == 0) &&
472 (smc->manfid == MANFID_MEGAHERTZ) &&
473 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
474 mhz_3288_power(link);
1da177e4 475
dddfbd82 476 return 0;
1da177e4
LT		 477}
478
dddfbd82
DB		 479static int pcmcia_get_versmac(struct pcmcia_device *p_dev,
480 tuple_t *tuple,
481 void *priv)
1da177e4 482{
dddfbd82
DB		 483 struct net_device *dev = priv;
484 cisparse_t parse;
fb9e2d88 485 u8 *buf;
4638aef4 486
dddfbd82
DB		 487 if (pcmcia_parse_tuple(tuple, &parse))
488 return -EINVAL;
1da177e4 489
fb9e2d88
KK		 490 buf = parse.version_1.str + parse.version_1.ofs[3];
491
492 if ((parse.version_1.ns > 3) && (cvt_ascii_address(dev, buf) == 0))
dddfbd82 493 return 0;
4638aef4 494
dddfbd82
DB		 495 return -EINVAL;
496};
497
fba395ee 498static int mhz_setup(struct pcmcia_device *link)
1da177e4 499{
1da177e4 500 struct net_device *dev = link->priv;
dddfbd82
DB		 501 size_t len;
502 u8 *buf;
4638aef4 503 int rc;
1da177e4
LT		 504
505 /* Read the station address from the CIS. It is stored as the last
506 (fourth) string in the Version 1 Version/ID tuple. */
7d2e8d00
DB		 507 if ((link->prod_id[3]) &&
508 (cvt_ascii_address(dev, link->prod_id[3]) == 0))
509 return 0;
510
511 /* Workarounds for broken cards start here. */
a1a98b72 512 /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */
dddfbd82
DB		 513 if (!pcmcia_loop_tuple(link, CISTPL_VERS_1, pcmcia_get_versmac, dev))
514 return 0;
1da177e4
LT		 515
516 /* Another possibility: for the EM3288, in a special tuple */
4638aef4 517 rc = -1;
dddfbd82
DB		 518 len = pcmcia_get_tuple(link, 0x81, &buf);
519 if (buf && len >= 13) {
520 buf[12] = '\0';
fb9e2d88 521 if (cvt_ascii_address(dev, buf) == 0)
dddfbd82
DB		 522 rc = 0;
523 }
524 kfree(buf);
525
526 return rc;
527};
1da177e4
LT		 528
529/*======================================================================
530
531 Configuration stuff for the Motorola Mariner
532
533 mot_config() writes directly to the Mariner configuration
534 registers because the CIS is just bogus.
535
536======================================================================*/
537
fba395ee 538static void mot_config(struct pcmcia_device *link)
1da177e4
LT		 539{
540 struct net_device *dev = link->priv;
541 struct smc_private *smc = netdev_priv(dev);
906da809 542 unsigned int ioaddr = dev->base_addr;
9a017a91 543 unsigned int iouart = link->resource[1]->start;
1da177e4
LT		 544
545 /* Set UART base address and force map with COR bit 1 */
546 writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0);
547 writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1);
548 writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR);
549
550 /* Set SMC base address and force map with COR bit 1 */
551 writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0);
552 writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1);
553 writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR);
554
555 /* Wait for things to settle down */
556 mdelay(100);
557}
558
fba395ee 559static int mot_setup(struct pcmcia_device *link)
1da177e4
LT		 560{
561 struct net_device *dev = link->priv;
906da809 562 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 563 int i, wait, loop;
564 u_int addr;
565
566 /* Read Ethernet address from Serial EEPROM */
567
568 for (i = 0; i < 3; i++) {
569 SMC_SELECT_BANK(2);
570 outw(MOT_EEPROM + i, ioaddr + POINTER);
571 SMC_SELECT_BANK(1);
572 outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL);
573
574 for (loop = wait = 0; loop < 200; loop++) {
575 udelay(10);
576 wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL));
577 if (wait == 0) break;
578 }
579
580 if (wait)
581 return -1;
582
583 addr = inw(ioaddr + GENERAL);
584 dev->dev_addr[2*i] = addr & 0xff;
585 dev->dev_addr[2*i+1] = (addr >> 8) & 0xff;
586 }
587
588 return 0;
589}
590
591/*====================================================================*/
592
b54bf94b
DB		 593static int smc_configcheck(struct pcmcia_device *p_dev,
594 cistpl_cftable_entry_t *cf,
8e2fc39d 595 cistpl_cftable_entry_t *dflt,
ad913c11 596 unsigned int vcc,
b54bf94b
DB		 597 void *priv_data)
598{
90abdc3b
DB		 599 p_dev->resource[0]->start = cf->io.win[0].base;
600 p_dev->io_lines = cf->io.flags & CISTPL_IO_LINES_MASK;
601 return pcmcia_request_io(p_dev);
b54bf94b
DB		 602}
603
fba395ee 604static int smc_config(struct pcmcia_device *link)
1da177e4
LT		 605{
606 struct net_device *dev = link->priv;
1da177e4
LT		 607 int i;
608
90abdc3b 609 link->resource[0]->end = 16;
b54bf94b
DB		 610 i = pcmcia_loop_config(link, smc_configcheck, NULL);
611 if (!i)
9a017a91 612 dev->base_addr = link->resource[0]->start;
4638aef4 613
1da177e4
LT		 614 return i;
615}
616
dddfbd82 617
fba395ee 618static int smc_setup(struct pcmcia_device *link)
1da177e4 619{
1da177e4 620 struct net_device *dev = link->priv;
1da177e4
LT		 621
622 /* Check for a LAN function extension tuple */
dddfbd82
DB		 623 if (!pcmcia_get_mac_from_cis(link, dev))
624 return 0;
625
1da177e4 626 /* Try the third string in the Version 1 Version/ID tuple. */
a9606fd3 627 if (link->prod_id[2]) {
dddfbd82
DB		 628 if (cvt_ascii_address(dev, link->prod_id[2]) == 0)
629 return 0;
4638aef4 630 }
dddfbd82 631 return -1;
1da177e4
LT		 632}
633
634/*====================================================================*/
635
fba395ee 636static int osi_config(struct pcmcia_device *link)
1da177e4
LT		 637{
638 struct net_device *dev = link->priv;
906da809 639 static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
1da177e4
LT		 640 int i, j;
641
642 link->conf.Attributes |= CONF_ENABLE_SPKR;
643 link->conf.Status = CCSR_AUDIO_ENA;
90abdc3b
DB		 644 link->resource[0]->end = 64;
645 link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
646 link->resource[1]->end = 8;
1da177e4
LT		 647
648 /* Enable Hard Decode, LAN, Modem */
649 link->conf.ConfigIndex = 0x23;
90abdc3b 650 link->io_lines = 16;
1da177e4
LT		 651
652 for (i = j = 0; j < 4; j++) {
90abdc3b
DB		 653 link->resource[1]->start = com[j];
654 i = pcmcia_request_io(link);
4c89e88b
DB		 655 if (i == 0)
656 break;
1da177e4 657 }
4c89e88b 658 if (i != 0) {
1da177e4
LT		 659 /* Fallback: turn off hard decode */
660 link->conf.ConfigIndex = 0x03;
90abdc3b
DB		 661 link->resource[1]->end = 0;
662 i = pcmcia_request_io(link);
1da177e4 663 }
9a017a91 664 dev->base_addr = link->resource[0]->start + 0x10;
1da177e4
LT		 665 return i;
666}
667
75bf758f
JSR		 668static int osi_load_firmware(struct pcmcia_device *link)
669{
670 const struct firmware *fw;
671 int i, err;
672
673 err = request_firmware(&fw, FIRMWARE_NAME, &link->dev);
674 if (err) {
675 pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME);
676 return err;
677 }
678
679 /* Download the Seven of Diamonds firmware */
680 for (i = 0; i < fw->size; i++) {
9a017a91 681 outb(fw->data[i], link->resource[0]->start + 2);
75bf758f
JSR		 682 udelay(50);
683 }
684 release_firmware(fw);
685 return err;
686}
687
dddfbd82
DB		 688static int pcmcia_osi_mac(struct pcmcia_device *p_dev,
689 tuple_t *tuple,
690 void *priv)
1da177e4 691{
dddfbd82
DB		 692 struct net_device *dev = priv;
693 int i;
1da177e4 694
dddfbd82
DB		 695 if (tuple->TupleDataLen < 8)
696 return -EINVAL;
697 if (tuple->TupleData[0] != 0x04)
698 return -EINVAL;
699 for (i = 0; i < 6; i++)
700 dev->dev_addr[i] = tuple->TupleData[i+2];
701 return 0;
702};
4638aef4 703
4638aef4 704
dddfbd82
DB		 705static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid)
706{
707 struct net_device *dev = link->priv;
708 int rc;
1da177e4
LT		 709
710 /* Read the station address from tuple 0x90, subtuple 0x04 */
dddfbd82
DB		 711 if (pcmcia_loop_tuple(link, 0x90, pcmcia_osi_mac, dev))
712 return -1;
1da177e4
LT		 713
714 if (((manfid == MANFID_OSITECH) &&
715 (cardid == PRODID_OSITECH_SEVEN)) ||
716 ((manfid == MANFID_PSION) &&
717 (cardid == PRODID_PSION_NET100))) {
75bf758f
JSR		 718 rc = osi_load_firmware(link);
719 if (rc)
dddfbd82 720 return rc;
1da177e4
LT		 721 } else if (manfid == MANFID_OSITECH) {
722 /* Make sure both functions are powered up */
9a017a91 723 set_bits(0x300, link->resource[0]->start + OSITECH_AUI_PWR);
1da177e4 724 /* Now, turn on the interrupt for both card functions */
9a017a91 725 set_bits(0x300, link->resource[0]->start + OSITECH_RESET_ISR);
dd0fab5b 726 dev_dbg(&link->dev, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n",
9a017a91
DB		 727 inw(link->resource[0]->start + OSITECH_AUI_PWR),
728 inw(link->resource[0]->start + OSITECH_RESET_ISR));
1da177e4 729 }
dddfbd82 730 return 0;
1da177e4
LT		 731}
732
fba395ee 733static int smc91c92_suspend(struct pcmcia_device *link)
98e4c28b 734{
98e4c28b
DB		 735 struct net_device *dev = link->priv;
736
e2d40963 737 if (link->open)
4bbed523 738 netif_device_detach(dev);
98e4c28b
DB		 739
740 return 0;
741}
742
fba395ee 743static int smc91c92_resume(struct pcmcia_device *link)
98e4c28b 744{
98e4c28b
DB		 745 struct net_device *dev = link->priv;
746 struct smc_private *smc = netdev_priv(dev);
747 int i;
748
e2d40963
DB		 749 if ((smc->manfid == MANFID_MEGAHERTZ) &&
750 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
751 mhz_3288_power(link);
752 if (smc->manfid == MANFID_MOTOROLA)
753 mot_config(link);
754 if ((smc->manfid == MANFID_OSITECH) &&
755 (smc->cardid != PRODID_OSITECH_SEVEN)) {
756 /* Power up the card and enable interrupts */
757 set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR);
758 set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR);
759 }
760 if (((smc->manfid == MANFID_OSITECH) &&
761 (smc->cardid == PRODID_OSITECH_SEVEN)) ||
762 ((smc->manfid == MANFID_PSION) &&
763 (smc->cardid == PRODID_PSION_NET100))) {
75bf758f
JSR		 764 i = osi_load_firmware(link);
765 if (i) {
766 pr_err("smc91c92_cs: Failed to load firmware\n");
767 return i;
98e4c28b
DB		 768 }
769 }
e2d40963
DB		 770 if (link->open) {
771 smc_reset(dev);
772 netif_device_attach(dev);
773 }
98e4c28b
DB		 774
775 return 0;
776}
777
778
1da177e4
LT		 779/*======================================================================
780
781 This verifies that the chip is some SMC91cXX variant, and returns
782 the revision code if successful. Otherwise, it returns -ENODEV.
783
784======================================================================*/
785
fba395ee 786static int check_sig(struct pcmcia_device *link)
1da177e4
LT		 787{
788 struct net_device *dev = link->priv;
906da809 789 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 790 int width;
791 u_short s;
792
793 SMC_SELECT_BANK(1);
794 if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) {
795 /* Try powering up the chip */
796 outw(0, ioaddr + CONTROL);
797 mdelay(55);
798 }
799
800 /* Try setting bus width */
90abdc3b 801 width = (link->resource[0]->flags == IO_DATA_PATH_WIDTH_AUTO);
1da177e4
LT		 802 s = inb(ioaddr + CONFIG);
803 if (width)
804 s |= CFG_16BIT;
805 else
806 s &= ~CFG_16BIT;
807 outb(s, ioaddr + CONFIG);
808
809 /* Check Base Address Register to make sure bus width is OK */
810 s = inw(ioaddr + BASE_ADDR);
811 if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) &&
812 ((s >> 8) != (s & 0xff))) {
813 SMC_SELECT_BANK(3);
814 s = inw(ioaddr + REVISION);
815 return (s & 0xff);
816 }
817
818 if (width) {
4bbed523
DB		 819 modconf_t mod = {
820 .Attributes = CONF_IO_CHANGE_WIDTH,
821 };
822 printk(KERN_INFO "smc91c92_cs: using 8-bit IO window.\n");
823
fba395ee
DB		 824 smc91c92_suspend(link);
825 pcmcia_modify_configuration(link, &mod);
826 smc91c92_resume(link);
4bbed523 827 return check_sig(link);
1da177e4
LT		 828 }
829 return -ENODEV;
830}
831
832/*======================================================================
833
834 smc91c92_config() is scheduled to run after a CARD_INSERTION event
835 is received, to configure the PCMCIA socket, and to make the
836 ethernet device available to the system.
837
838======================================================================*/
839
15b99ac1 840static int smc91c92_config(struct pcmcia_device *link)
1da177e4 841{
1da177e4
LT		 842 struct net_device *dev = link->priv;
843 struct smc_private *smc = netdev_priv(dev);
1da177e4
LT		 844 char *name;
845 int i, j, rev;
906da809 846 unsigned int ioaddr;
1da177e4
LT		 847 u_long mir;
848
dd0fab5b 849 dev_dbg(&link->dev, "smc91c92_config\n");
1da177e4 850
efd50585
DB		 851 smc->manfid = link->manf_id;
852 smc->cardid = link->card_id;
1da177e4 853
1da177e4
LT		 854 if ((smc->manfid == MANFID_OSITECH) &&
855 (smc->cardid != PRODID_OSITECH_SEVEN)) {
856 i = osi_config(link);
857 } else if ((smc->manfid == MANFID_MOTOROLA) ||
858 ((smc->manfid == MANFID_MEGAHERTZ) &&
859 ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) ||
860 (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) {
861 i = mhz_mfc_config(link);
862 } else {
863 i = smc_config(link);
864 }
dd0fab5b
DB		 865 if (i)
866 goto config_failed;
1da177e4 867
eb14120f 868 i = pcmcia_request_irq(link, smc_interrupt);
dd0fab5b
DB		 869 if (i)
870 goto config_failed;
fba395ee 871 i = pcmcia_request_configuration(link, &link->conf);
dd0fab5b
DB		 872 if (i)
873 goto config_failed;
1da177e4
LT		 874
875 if (smc->manfid == MANFID_MOTOROLA)
876 mot_config(link);
877
eb14120f 878 dev->irq = link->irq;
1da177e4
LT		 879
880 if ((if_port >= 0) && (if_port <= 2))
881 dev->if_port = if_port;
882 else
883 printk(KERN_NOTICE "smc91c92_cs: invalid if_port requested\n");
884
885 switch (smc->manfid) {
886 case MANFID_OSITECH:
887 case MANFID_PSION:
888 i = osi_setup(link, smc->manfid, smc->cardid); break;
889 case MANFID_SMC:
890 case MANFID_NEW_MEDIA:
891 i = smc_setup(link); break;
892 case 0x128: /* For broken Megahertz cards */
893 case MANFID_MEGAHERTZ:
894 i = mhz_setup(link); break;
895 case MANFID_MOTOROLA:
896 default: /* get the hw address from EEPROM */
897 i = mot_setup(link); break;
898 }
899
900 if (i != 0) {
901 printk(KERN_NOTICE "smc91c92_cs: Unable to find hardware address.\n");
fb9e2d88 902 goto config_failed;
1da177e4
LT		 903 }
904
905 smc->duplex = 0;
906 smc->rx_ovrn = 0;
907
908 rev = check_sig(link);
909 name = "???";
910 if (rev > 0)
911 switch (rev >> 4) {
912 case 3: name = "92"; break;
913 case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break;
914 case 5: name = "95"; break;
915 case 7: name = "100"; break;
916 case 8: name = "100-FD"; break;
917 case 9: name = "110"; break;
918 }
919
920 ioaddr = dev->base_addr;
921 if (rev > 0) {
922 u_long mcr;
923 SMC_SELECT_BANK(0);
924 mir = inw(ioaddr + MEMINFO) & 0xff;
925 if (mir == 0xff) mir++;
926 /* Get scale factor for memory size */
927 mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200;
928 mir *= 128 * (1<<((mcr >> 9) & 7));
929 SMC_SELECT_BANK(1);
930 smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT;
931 smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC;
932 if (smc->manfid == MANFID_OSITECH)
933 smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0;
934 if ((rev >> 4) >= 7)
935 smc->cfg |= CFG_MII_SELECT;
936 } else
937 mir = 0;
938
939 if (smc->cfg & CFG_MII_SELECT) {
940 SMC_SELECT_BANK(3);
941
942 for (i = 0; i < 32; i++) {
943 j = mdio_read(dev, i, 1);
944 if ((j != 0) && (j != 0xffff)) break;
945 }
946 smc->mii_if.phy_id = (i < 32) ? i : -1;
947
948 SMC_SELECT_BANK(0);
949 }
950
dd2e5a15 951 SET_NETDEV_DEV(dev, &link->dev);
1da177e4
LT		 952
953 if (register_netdev(dev) != 0) {
954 printk(KERN_ERR "smc91c92_cs: register_netdev() failed\n");
1da177e4
LT		 955 goto config_undo;
956 }
957
1da177e4 958 printk(KERN_INFO "%s: smc91c%s rev %d: io %#3lx, irq %d, "
e174961c 959 "hw_addr %pM\n",
0795af57 960 dev->name, name, (rev & 0x0f), dev->base_addr, dev->irq,
e174961c 961 dev->dev_addr);
1da177e4
LT		 962
963 if (rev > 0) {
964 if (mir & 0x3ff)
965 printk(KERN_INFO " %lu byte", mir);
966 else
967 printk(KERN_INFO " %lu kb", mir>>10);
968 printk(" buffer, %s xcvr\n", (smc->cfg & CFG_MII_SELECT) ?
969 "MII" : if_names[dev->if_port]);
970 }
971
972 if (smc->cfg & CFG_MII_SELECT) {
973 if (smc->mii_if.phy_id != -1) {
dd0fab5b 974 dev_dbg(&link->dev, " MII transceiver at index %d, status %x.\n",
1da177e4
LT		 975 smc->mii_if.phy_id, j);
976 } else {
977 printk(KERN_NOTICE " No MII transceivers found!\n");
978 }
979 }
15b99ac1 980 return 0;
1da177e4
LT		 981
982config_undo:
983 unregister_netdev(dev);
dd0fab5b 984config_failed:
1da177e4 985 smc91c92_release(link);
fb9e2d88 986 free_netdev(dev);
15b99ac1 987 return -ENODEV;
1da177e4
LT		 988} /* smc91c92_config */
989
990/*======================================================================
991
992 After a card is removed, smc91c92_release() will unregister the net
993 device, and release the PCMCIA configuration. If the device is
994 still open, this will be postponed until it is closed.
995
996======================================================================*/
997
fba395ee 998static void smc91c92_release(struct pcmcia_device *link)
1da177e4 999{
dd0fab5b 1000 dev_dbg(&link->dev, "smc91c92_release\n");
cdb13808 1001 if (link->resource[2]->end) {
5f2a71fc
DB		 1002 struct net_device *dev = link->priv;
1003 struct smc_private *smc = netdev_priv(dev);
1004 iounmap(smc->base);
1005 }
fba395ee 1006 pcmcia_disable_device(link);
1da177e4
LT		 1007}
1008
1da177e4
LT		 1009/*======================================================================
1010
1011 MII interface support for SMC91cXX based cards
1012======================================================================*/
1013
1014#define MDIO_SHIFT_CLK 0x04
1015#define MDIO_DATA_OUT 0x01
1016#define MDIO_DIR_WRITE 0x08
1017#define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE)
1018#define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT)
1019#define MDIO_DATA_READ 0x02
1020
906da809 1021static void mdio_sync(unsigned int addr)
1da177e4
LT		 1022{
1023 int bits;
1024 for (bits = 0; bits < 32; bits++) {
1025 outb(MDIO_DATA_WRITE1, addr);
1026 outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr);
1027 }
1028}
1029
1030static int mdio_read(struct net_device *dev, int phy_id, int loc)
1031{
906da809 1032 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT		 1033 u_int cmd = (0x06<<10)|(phy_id<<5)|loc;
1034 int i, retval = 0;
1035
1036 mdio_sync(addr);
1037 for (i = 13; i >= 0; i--) {
1038 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1039 outb(dat, addr);
1040 outb(dat | MDIO_SHIFT_CLK, addr);
1041 }
1042 for (i = 19; i > 0; i--) {
1043 outb(0, addr);
1044 retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0);
1045 outb(MDIO_SHIFT_CLK, addr);
1046 }
1047 return (retval>>1) & 0xffff;
1048}
1049
1050static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
1051{
906da809 1052 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT		 1053 u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
1054 int i;
1055
1056 mdio_sync(addr);
1057 for (i = 31; i >= 0; i--) {
1058 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1059 outb(dat, addr);
1060 outb(dat | MDIO_SHIFT_CLK, addr);
1061 }
1062 for (i = 1; i >= 0; i--) {
1063 outb(0, addr);
1064 outb(MDIO_SHIFT_CLK, addr);
1065 }
1066}
1067
1068/*======================================================================
1069
1070 The driver core code, most of which should be common with a
1071 non-PCMCIA implementation.
1072
1073======================================================================*/
1074
1075#ifdef PCMCIA_DEBUG
1076static void smc_dump(struct net_device *dev)
1077{
906da809 1078 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1079 u_short i, w, save;
1080 save = inw(ioaddr + BANK_SELECT);
1081 for (w = 0; w < 4; w++) {
1082 SMC_SELECT_BANK(w);
1083 printk(KERN_DEBUG "bank %d: ", w);
1084 for (i = 0; i < 14; i += 2)
1085 printk(" %04x", inw(ioaddr + i));
1086 printk("\n");
1087 }
1088 outw(save, ioaddr + BANK_SELECT);
1089}
1090#endif
1091
1092static int smc_open(struct net_device *dev)
1093{
1094 struct smc_private *smc = netdev_priv(dev);
fba395ee 1095 struct pcmcia_device *link = smc->p_dev;
1da177e4 1096
dd0fab5b 1097 dev_dbg(&link->dev, "%s: smc_open(%p), ID/Window %4.4x.\n",
1da177e4 1098 dev->name, dev, inw(dev->base_addr + BANK_SELECT));
dd0fab5b
DB		 1099#ifdef PCMCIA_DEBUG
1100 smc_dump(dev);
1da177e4
LT		 1101#endif
1102
1103 /* Check that the PCMCIA card is still here. */
9940ec36 1104 if (!pcmcia_dev_present(link))
1da177e4
LT		 1105 return -ENODEV;
1106 /* Physical device present signature. */
1107 if (check_sig(link) < 0) {
1108 printk("smc91c92_cs: Yikes! Bad chip signature!\n");
1109 return -ENODEV;
1110 }
1111 link->open++;
1112
1113 netif_start_queue(dev);
1114 smc->saved_skb = NULL;
1115 smc->packets_waiting = 0;
1116
1117 smc_reset(dev);
1118 init_timer(&smc->media);
1119 smc->media.function = &media_check;
1120 smc->media.data = (u_long) dev;
1121 smc->media.expires = jiffies + HZ;
1122 add_timer(&smc->media);
1123
1124 return 0;
1125} /* smc_open */
1126
1127/*====================================================================*/
1128
1129static int smc_close(struct net_device *dev)
1130{
1131 struct smc_private *smc = netdev_priv(dev);
fba395ee 1132 struct pcmcia_device *link = smc->p_dev;
906da809 1133 unsigned int ioaddr = dev->base_addr;
1da177e4 1134
dd0fab5b 1135 dev_dbg(&link->dev, "%s: smc_close(), status %4.4x.\n",
1da177e4
LT		 1136 dev->name, inw(ioaddr + BANK_SELECT));
1137
1138 netif_stop_queue(dev);
1139
1140 /* Shut off all interrupts, and turn off the Tx and Rx sections.
1141 Don't bother to check for chip present. */
1142 SMC_SELECT_BANK(2); /* Nominally paranoia, but do no assume... */
1143 outw(0, ioaddr + INTERRUPT);
1144 SMC_SELECT_BANK(0);
1145 mask_bits(0xff00, ioaddr + RCR);
1146 mask_bits(0xff00, ioaddr + TCR);
1147
1148 /* Put the chip into power-down mode. */
1149 SMC_SELECT_BANK(1);
1150 outw(CTL_POWERDOWN, ioaddr + CONTROL );
1151
1152 link->open--;
1153 del_timer_sync(&smc->media);
1154
1155 return 0;
1156} /* smc_close */
1157
1158/*======================================================================
1159
1160 Transfer a packet to the hardware and trigger the packet send.
1161 This may be called at either from either the Tx queue code
1162 or the interrupt handler.
1163
1164======================================================================*/
1165
1166static void smc_hardware_send_packet(struct net_device * dev)
1167{
1168 struct smc_private *smc = netdev_priv(dev);
1169 struct sk_buff *skb = smc->saved_skb;
906da809 1170 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1171 u_char packet_no;
1172
1173 if (!skb) {
1174 printk(KERN_ERR "%s: In XMIT with no packet to send.\n", dev->name);
1175 return;
1176 }
1177
1178 /* There should be a packet slot waiting. */
1179 packet_no = inw(ioaddr + PNR_ARR) >> 8;
1180 if (packet_no & 0x80) {
1181 /* If not, there is a hardware problem! Likely an ejected card. */
1182 printk(KERN_WARNING "%s: 91c92 hardware Tx buffer allocation"
1183 " failed, status %#2.2x.\n", dev->name, packet_no);
1184 dev_kfree_skb_irq(skb);
1185 smc->saved_skb = NULL;
1186 netif_start_queue(dev);
1187 return;
1188 }
1189
6fb7298c 1190 dev->stats.tx_bytes += skb->len;
1da177e4
LT		 1191 /* The card should use the just-allocated buffer. */
1192 outw(packet_no, ioaddr + PNR_ARR);
1193 /* point to the beginning of the packet */
1194 outw(PTR_AUTOINC , ioaddr + POINTER);
1195
1196 /* Send the packet length (+6 for status, length and ctl byte)
1197 and the status word (set to zeros). */
1198 {
1199 u_char *buf = skb->data;
1200 u_int length = skb->len; /* The chip will pad to ethernet min. */
1201
dd0fab5b 1202 pr_debug("%s: Trying to xmit packet of length %d.\n",
1da177e4
LT		 1203 dev->name, length);
1204
1205 /* send the packet length: +6 for status word, length, and ctl */
1206 outw(0, ioaddr + DATA_1);
1207 outw(length + 6, ioaddr + DATA_1);
1208 outsw(ioaddr + DATA_1, buf, length >> 1);
1209
1210 /* The odd last byte, if there is one, goes in the control word. */
1211 outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1);
1212 }
1213
1214 /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */
1215 outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) |
1216 (inw(ioaddr + INTERRUPT) & 0xff00),
1217 ioaddr + INTERRUPT);
1218
1219 /* The chip does the rest of the work. */
1220 outw(MC_ENQUEUE , ioaddr + MMU_CMD);
1221
1222 smc->saved_skb = NULL;
1223 dev_kfree_skb_irq(skb);
1224 dev->trans_start = jiffies;
1225 netif_start_queue(dev);
1da177e4
LT		 1226}
1227
1228/*====================================================================*/
1229
1230static void smc_tx_timeout(struct net_device *dev)
1231{
1232 struct smc_private *smc = netdev_priv(dev);
906da809 1233 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1234
1235 printk(KERN_NOTICE "%s: SMC91c92 transmit timed out, "
1236 "Tx_status %2.2x status %4.4x.\n",
1237 dev->name, inw(ioaddr)&0xff, inw(ioaddr + 2));
6fb7298c 1238 dev->stats.tx_errors++;
1da177e4 1239 smc_reset(dev);
1ae5dc34 1240 dev->trans_start = jiffies; /* prevent tx timeout */
1da177e4
LT		 1241 smc->saved_skb = NULL;
1242 netif_wake_queue(dev);
1243}
1244
dbf02fae
SH		 1245static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
1246 struct net_device *dev)
1da177e4
LT		 1247{
1248 struct smc_private *smc = netdev_priv(dev);
906da809 1249 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1250 u_short num_pages;
1251 short time_out, ir;
85e27831 1252 unsigned long flags;
1da177e4
LT		 1253
1254 netif_stop_queue(dev);
1255
dd0fab5b 1256 pr_debug("%s: smc_start_xmit(length = %d) called,"
1da177e4
LT		 1257 " status %4.4x.\n", dev->name, skb->len, inw(ioaddr + 2));
1258
1259 if (smc->saved_skb) {
1260 /* THIS SHOULD NEVER HAPPEN. */
6fb7298c 1261 dev->stats.tx_aborted_errors++;
1da177e4
LT		 1262 printk(KERN_DEBUG "%s: Internal error -- sent packet while busy.\n",
1263 dev->name);
5b548140 1264 return NETDEV_TX_BUSY;
1da177e4
LT		 1265 }
1266 smc->saved_skb = skb;
1267
1268 num_pages = skb->len >> 8;
1269
1270 if (num_pages > 7) {
1271 printk(KERN_ERR "%s: Far too big packet error.\n", dev->name);
1272 dev_kfree_skb (skb);
1273 smc->saved_skb = NULL;
6fb7298c 1274 dev->stats.tx_dropped++;
6ed10654 1275 return NETDEV_TX_OK; /* Do not re-queue this packet. */
1da177e4
LT		 1276 }
1277 /* A packet is now waiting. */
1278 smc->packets_waiting++;
1279
85e27831 1280 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 1281 SMC_SELECT_BANK(2); /* Paranoia, we should always be in window 2 */
1282
1283 /* need MC_RESET to keep the memory consistent. errata? */
1284 if (smc->rx_ovrn) {
1285 outw(MC_RESET, ioaddr + MMU_CMD);
1286 smc->rx_ovrn = 0;
1287 }
1288
1289 /* Allocate the memory; send the packet now if we win. */
1290 outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD);
1291 for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) {
1292 ir = inw(ioaddr+INTERRUPT);
1293 if (ir & IM_ALLOC_INT) {
1294 /* Acknowledge the interrupt, send the packet. */
1295 outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT);
1296 smc_hardware_send_packet(dev); /* Send the packet now.. */
85e27831 1297 spin_unlock_irqrestore(&smc->lock, flags);
6ed10654 1298 return NETDEV_TX_OK;
1da177e4
LT		 1299 }
1300 }
1301
1302 /* Otherwise defer until the Tx-space-allocated interrupt. */
dd0fab5b 1303 pr_debug("%s: memory allocation deferred.\n", dev->name);
1da177e4 1304 outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT);
85e27831 1305 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4 1306
6ed10654 1307 return NETDEV_TX_OK;
1da177e4
LT		 1308}
1309
1310/*======================================================================
1311
1312 Handle a Tx anomolous event. Entered while in Window 2.
1313
1314======================================================================*/
1315
1316static void smc_tx_err(struct net_device * dev)
1317{
1318 struct smc_private *smc = netdev_priv(dev);
906da809 1319 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1320 int saved_packet = inw(ioaddr + PNR_ARR) & 0xff;
1321 int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f;
1322 int tx_status;
1323
1324 /* select this as the packet to read from */
1325 outw(packet_no, ioaddr + PNR_ARR);
1326
1327 /* read the first word from this packet */
1328 outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER);
1329
1330 tx_status = inw(ioaddr + DATA_1);
1331
6fb7298c
SH		 1332 dev->stats.tx_errors++;
1333 if (tx_status & TS_LOSTCAR) dev->stats.tx_carrier_errors++;
1334 if (tx_status & TS_LATCOL) dev->stats.tx_window_errors++;
1da177e4 1335 if (tx_status & TS_16COL) {
6fb7298c 1336 dev->stats.tx_aborted_errors++;
1da177e4
LT		 1337 smc->tx_err++;
1338 }
1339
1340 if (tx_status & TS_SUCCESS) {
1341 printk(KERN_NOTICE "%s: Successful packet caused error "
1342 "interrupt?\n", dev->name);
1343 }
1344 /* re-enable transmit */
1345 SMC_SELECT_BANK(0);
1346 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1347 SMC_SELECT_BANK(2);
1348
1349 outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */
1350
1351 /* one less packet waiting for me */
1352 smc->packets_waiting--;
1353
1354 outw(saved_packet, ioaddr + PNR_ARR);
1da177e4
LT		 1355}
1356
1357/*====================================================================*/
1358
1359static void smc_eph_irq(struct net_device *dev)
1360{
1361 struct smc_private *smc = netdev_priv(dev);
906da809 1362 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1363 u_short card_stats, ephs;
1364
1365 SMC_SELECT_BANK(0);
1366 ephs = inw(ioaddr + EPH);
dd0fab5b 1367 pr_debug("%s: Ethernet protocol handler interrupt, status"
1da177e4
LT		 1368 " %4.4x.\n", dev->name, ephs);
1369 /* Could be a counter roll-over warning: update stats. */
1370 card_stats = inw(ioaddr + COUNTER);
1371 /* single collisions */
6fb7298c 1372 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT		 1373 card_stats >>= 4;
1374 /* multiple collisions */
6fb7298c 1375 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT		 1376#if 0 /* These are for when linux supports these statistics */
1377 card_stats >>= 4; /* deferred */
1378 card_stats >>= 4; /* excess deferred */
1379#endif
1380 /* If we had a transmit error we must re-enable the transmitter. */
1381 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1382
1383 /* Clear a link error interrupt. */
1384 SMC_SELECT_BANK(1);
1385 outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL);
1386 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1387 ioaddr + CONTROL);
1388 SMC_SELECT_BANK(2);
1389}
1390
1391/*====================================================================*/
1392
7d12e780 1393static irqreturn_t smc_interrupt(int irq, void *dev_id)
1da177e4
LT		 1394{
1395 struct net_device *dev = dev_id;
1396 struct smc_private *smc = netdev_priv(dev);
906da809 1397 unsigned int ioaddr;
1da177e4
LT		 1398 u_short saved_bank, saved_pointer, mask, status;
1399 unsigned int handled = 1;
1400 char bogus_cnt = INTR_WORK; /* Work we are willing to do. */
1401
1402 if (!netif_device_present(dev))
1403 return IRQ_NONE;
1404
1405 ioaddr = dev->base_addr;
1406
dd0fab5b 1407 pr_debug("%s: SMC91c92 interrupt %d at %#x.\n", dev->name,
1da177e4
LT		 1408 irq, ioaddr);
1409
85e27831 1410 spin_lock(&smc->lock);
1da177e4
LT		 1411 smc->watchdog = 0;
1412 saved_bank = inw(ioaddr + BANK_SELECT);
1413 if ((saved_bank & 0xff00) != 0x3300) {
1414 /* The device does not exist -- the card could be off-line, or
1415 maybe it has been ejected. */
dd0fab5b 1416 pr_debug("%s: SMC91c92 interrupt %d for non-existent"
1da177e4
LT		 1417 "/ejected device.\n", dev->name, irq);
1418 handled = 0;
1419 goto irq_done;
1420 }
1421
1422 SMC_SELECT_BANK(2);
1423 saved_pointer = inw(ioaddr + POINTER);
1424 mask = inw(ioaddr + INTERRUPT) >> 8;
1425 /* clear all interrupts */
1426 outw(0, ioaddr + INTERRUPT);
1427
1428 do { /* read the status flag, and mask it */
1429 status = inw(ioaddr + INTERRUPT) & 0xff;
dd0fab5b 1430 pr_debug("%s: Status is %#2.2x (mask %#2.2x).\n", dev->name,
1da177e4
LT		 1431 status, mask);
1432 if ((status & mask) == 0) {
1433 if (bogus_cnt == INTR_WORK)
1434 handled = 0;
1435 break;
1436 }
1437 if (status & IM_RCV_INT) {
1438 /* Got a packet(s). */
1439 smc_rx(dev);
1440 }
1441 if (status & IM_TX_INT) {
1442 smc_tx_err(dev);
1443 outw(IM_TX_INT, ioaddr + INTERRUPT);
1444 }
1445 status &= mask;
1446 if (status & IM_TX_EMPTY_INT) {
1447 outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT);
1448 mask &= ~IM_TX_EMPTY_INT;
6fb7298c 1449 dev->stats.tx_packets += smc->packets_waiting;
1da177e4
LT		 1450 smc->packets_waiting = 0;
1451 }
1452 if (status & IM_ALLOC_INT) {
1453 /* Clear this interrupt so it doesn't happen again */
1454 mask &= ~IM_ALLOC_INT;
1455
1456 smc_hardware_send_packet(dev);
1457
1458 /* enable xmit interrupts based on this */
1459 mask |= (IM_TX_EMPTY_INT | IM_TX_INT);
1460
1461 /* and let the card send more packets to me */
1462 netif_wake_queue(dev);
1463 }
1464 if (status & IM_RX_OVRN_INT) {
6fb7298c
SH		 1465 dev->stats.rx_errors++;
1466 dev->stats.rx_fifo_errors++;
1da177e4
LT		 1467 if (smc->duplex)
1468 smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */
1469 outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT);
1470 }
1471 if (status & IM_EPH_INT)
1472 smc_eph_irq(dev);
1473 } while (--bogus_cnt);
1474
dd0fab5b 1475 pr_debug(" Restoring saved registers mask %2.2x bank %4.4x"
1da177e4
LT		 1476 " pointer %4.4x.\n", mask, saved_bank, saved_pointer);
1477
1478 /* restore state register */
1479 outw((mask<<8), ioaddr + INTERRUPT);
1480 outw(saved_pointer, ioaddr + POINTER);
1481 SMC_SELECT_BANK(saved_bank);
1482
dd0fab5b 1483 pr_debug("%s: Exiting interrupt IRQ%d.\n", dev->name, irq);
1da177e4
LT		 1484
1485irq_done:
1486
1487 if ((smc->manfid == MANFID_OSITECH) &&
1488 (smc->cardid != PRODID_OSITECH_SEVEN)) {
1489 /* Retrigger interrupt if needed */
1490 mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR);
1491 set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR);
1492 }
1493 if (smc->manfid == MANFID_MOTOROLA) {
1494 u_char cor;
1495 cor = readb(smc->base + MOT_UART + CISREG_COR);
1496 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR);
1497 writeb(cor, smc->base + MOT_UART + CISREG_COR);
1498 cor = readb(smc->base + MOT_LAN + CISREG_COR);
1499 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR);
1500 writeb(cor, smc->base + MOT_LAN + CISREG_COR);
1501 }
9735b7ef
KK		 1502
1503 if ((smc->base != NULL) && /* Megahertz MFC's */
1504 (smc->manfid == MANFID_MEGAHERTZ) &&
1505 (smc->cardid == PRODID_MEGAHERTZ_EM3288)) {
1506
1507 u_char tmp;
1508 tmp = readb(smc->base+MEGAHERTZ_ISR);
1509 tmp = readb(smc->base+MEGAHERTZ_ISR);
1510
1511 /* Retrigger interrupt if needed */
1512 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1513 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1da177e4 1514 }
9735b7ef 1515
85e27831 1516 spin_unlock(&smc->lock);
1da177e4
LT		 1517 return IRQ_RETVAL(handled);
1518}
1519
1520/*====================================================================*/
1521
1522static void smc_rx(struct net_device *dev)
1523{
906da809 1524 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1525 int rx_status;
1526 int packet_length; /* Caution: not frame length, rather words
1527 to transfer from the chip. */
1528
1529 /* Assertion: we are in Window 2. */
1530
1531 if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) {
1532 printk(KERN_ERR "%s: smc_rx() with nothing on Rx FIFO.\n",
1533 dev->name);
1534 return;
1535 }
1536
1537 /* Reset the read pointer, and read the status and packet length. */
1538 outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER);
1539 rx_status = inw(ioaddr + DATA_1);
1540 packet_length = inw(ioaddr + DATA_1) & 0x07ff;
1541
dd0fab5b 1542 pr_debug("%s: Receive status %4.4x length %d.\n",
1da177e4
LT		 1543 dev->name, rx_status, packet_length);
1544
1545 if (!(rx_status & RS_ERRORS)) {
1546 /* do stuff to make a new packet */
1547 struct sk_buff *skb;
1548
1549 /* Note: packet_length adds 5 or 6 extra bytes here! */
1550 skb = dev_alloc_skb(packet_length+2);
1551
1552 if (skb == NULL) {
dd0fab5b 1553 pr_debug("%s: Low memory, packet dropped.\n", dev->name);
6fb7298c 1554 dev->stats.rx_dropped++;
1da177e4
LT		 1555 outw(MC_RELEASE, ioaddr + MMU_CMD);
1556 return;
1557 }
1558
1559 packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6);
1560 skb_reserve(skb, 2);
1561 insw(ioaddr+DATA_1, skb_put(skb, packet_length),
1562 (packet_length+1)>>1);
1563 skb->protocol = eth_type_trans(skb, dev);
1564
1da177e4
LT		 1565 netif_rx(skb);
1566 dev->last_rx = jiffies;
6fb7298c
SH		 1567 dev->stats.rx_packets++;
1568 dev->stats.rx_bytes += packet_length;
1da177e4 1569 if (rx_status & RS_MULTICAST)
6fb7298c 1570 dev->stats.multicast++;
1da177e4
LT		 1571 } else {
1572 /* error ... */
6fb7298c 1573 dev->stats.rx_errors++;
1da177e4 1574
6fb7298c 1575 if (rx_status & RS_ALGNERR) dev->stats.rx_frame_errors++;
1da177e4 1576 if (rx_status & (RS_TOOSHORT | RS_TOOLONG))
6fb7298c
SH		 1577 dev->stats.rx_length_errors++;
1578 if (rx_status & RS_BADCRC) dev->stats.rx_crc_errors++;
1da177e4
LT		 1579 }
1580 /* Let the MMU free the memory of this packet. */
1581 outw(MC_RELEASE, ioaddr + MMU_CMD);
1da177e4
LT		 1582}
1583
1da177e4
LT		 1584/*======================================================================
1585
1586 Set the receive mode.
1587
1588 This routine is used by both the protocol level to notify us of
1589 promiscuous/multicast mode changes, and by the open/reset code to
1590 initialize the Rx registers. We always set the multicast list and
1591 leave the receiver running.
1592
1593======================================================================*/
1594
1595static void set_rx_mode(struct net_device *dev)
1596{
906da809 1597 unsigned int ioaddr = dev->base_addr;
1da177e4 1598 struct smc_private *smc = netdev_priv(dev);
a6d37024 1599 unsigned char multicast_table[8];
1da177e4
LT		 1600 unsigned long flags;
1601 u_short rx_cfg_setting;
a6d37024
KK		 1602 int i;
1603
1604 memset(multicast_table, 0, sizeof(multicast_table));
1da177e4
LT		 1605
1606 if (dev->flags & IFF_PROMISC) {
1da177e4
LT		 1607 rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti;
1608 } else if (dev->flags & IFF_ALLMULTI)
1609 rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti;
1610 else {
4cd24eaf 1611 if (!netdev_mc_empty(dev)) {
22bedad3 1612 struct netdev_hw_addr *ha;
91fea585 1613
22bedad3
JP		 1614 netdev_for_each_mc_addr(ha, dev) {
1615 u_int position = ether_crc(6, ha->addr);
91fea585
JP		 1616 multicast_table[position >> 29] |= 1 << ((position >> 26) & 7);
1617 }
1da177e4
LT		 1618 }
1619 rx_cfg_setting = RxStripCRC | RxEnable;
1620 }
1621
1622 /* Load MC table and Rx setting into the chip without interrupts. */
1623 spin_lock_irqsave(&smc->lock, flags);
1624 SMC_SELECT_BANK(3);
a6d37024
KK		 1625 for (i = 0; i < 8; i++)
1626 outb(multicast_table[i], ioaddr + MULTICAST0 + i);
1da177e4
LT		 1627 SMC_SELECT_BANK(0);
1628 outw(rx_cfg_setting, ioaddr + RCR);
1629 SMC_SELECT_BANK(2);
1630 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1631}
1632
1633/*======================================================================
1634
1635 Senses when a card's config changes. Here, it's coax or TP.
1636
1637======================================================================*/
1638
1639static int s9k_config(struct net_device *dev, struct ifmap *map)
1640{
1641 struct smc_private *smc = netdev_priv(dev);
1642 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1643 if (smc->cfg & CFG_MII_SELECT)
1644 return -EOPNOTSUPP;
1645 else if (map->port > 2)
1646 return -EINVAL;
1647 dev->if_port = map->port;
1648 printk(KERN_INFO "%s: switched to %s port\n",
1649 dev->name, if_names[dev->if_port]);
1650 smc_reset(dev);
1651 }
1652 return 0;
1653}
1654
1655/*======================================================================
1656
1657 Reset the chip, reloading every register that might be corrupted.
1658
1659======================================================================*/
1660
1661/*
1662 Set transceiver type, perhaps to something other than what the user
1663 specified in dev->if_port.
1664*/
1665static void smc_set_xcvr(struct net_device *dev, int if_port)
1666{
1667 struct smc_private *smc = netdev_priv(dev);
906da809 1668 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1669 u_short saved_bank;
1670
1671 saved_bank = inw(ioaddr + BANK_SELECT);
1672 SMC_SELECT_BANK(1);
1673 if (if_port == 2) {
1674 outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG);
1675 if ((smc->manfid == MANFID_OSITECH) &&
1676 (smc->cardid != PRODID_OSITECH_SEVEN))
1677 set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1678 smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002);
1679 } else {
1680 outw(smc->cfg, ioaddr + CONFIG);
1681 if ((smc->manfid == MANFID_OSITECH) &&
1682 (smc->cardid != PRODID_OSITECH_SEVEN))
1683 mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1684 smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001);
1685 }
1686 SMC_SELECT_BANK(saved_bank);
1687}
1688
1689static void smc_reset(struct net_device *dev)
1690{
906da809 1691 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1692 struct smc_private *smc = netdev_priv(dev);
1693 int i;
1694
dd0fab5b 1695 pr_debug("%s: smc91c92 reset called.\n", dev->name);
1da177e4
LT		 1696
1697 /* The first interaction must be a write to bring the chip out
1698 of sleep mode. */
1699 SMC_SELECT_BANK(0);
1700 /* Reset the chip. */
1701 outw(RCR_SOFTRESET, ioaddr + RCR);
1702 udelay(10);
1703
1704 /* Clear the transmit and receive configuration registers. */
1705 outw(RCR_CLEAR, ioaddr + RCR);
1706 outw(TCR_CLEAR, ioaddr + TCR);
1707
1708 /* Set the Window 1 control, configuration and station addr registers.
1709 No point in writing the I/O base register ;-> */
1710 SMC_SELECT_BANK(1);
d6e05edc 1711 /* Automatically release successfully transmitted packets,
1da177e4
LT		 1712 Accept link errors, counter and Tx error interrupts. */
1713 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1714 ioaddr + CONTROL);
1715 smc_set_xcvr(dev, dev->if_port);
1716 if ((smc->manfid == MANFID_OSITECH) &&
1717 (smc->cardid != PRODID_OSITECH_SEVEN))
1718 outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) |
1719 (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00),
1720 ioaddr - 0x10 + OSITECH_AUI_PWR);
1721
1722 /* Fill in the physical address. The databook is wrong about the order! */
1723 for (i = 0; i < 6; i += 2)
1724 outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i],
1725 ioaddr + ADDR0 + i);
1726
1727 /* Reset the MMU */
1728 SMC_SELECT_BANK(2);
1729 outw(MC_RESET, ioaddr + MMU_CMD);
1730 outw(0, ioaddr + INTERRUPT);
1731
1732 /* Re-enable the chip. */
1733 SMC_SELECT_BANK(0);
1734 outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) |
1735 TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR);
1736 set_rx_mode(dev);
1737
1738 if (smc->cfg & CFG_MII_SELECT) {
1739 SMC_SELECT_BANK(3);
1740
1741 /* Reset MII */
1742 mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000);
1743
1744 /* Advertise 100F, 100H, 10F, 10H */
1745 mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1);
1746
1747 /* Restart MII autonegotiation */
1748 mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000);
1749 mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200);
1750 }
1751
1752 /* Enable interrupts. */
1753 SMC_SELECT_BANK(2);
1754 outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8,
1755 ioaddr + INTERRUPT);
1756}
1757
1758/*======================================================================
1759
1760 Media selection timer routine
1761
1762======================================================================*/
1763
1764static void media_check(u_long arg)
1765{
1766 struct net_device *dev = (struct net_device *) arg;
1767 struct smc_private *smc = netdev_priv(dev);
906da809 1768 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1769 u_short i, media, saved_bank;
1770 u_short link;
85e27831
K		 1771 unsigned long flags;
1772
1773 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 1774
1775 saved_bank = inw(ioaddr + BANK_SELECT);
1776
1777 if (!netif_device_present(dev))
1778 goto reschedule;
1779
1780 SMC_SELECT_BANK(2);
1781
1782 /* need MC_RESET to keep the memory consistent. errata? */
1783 if (smc->rx_ovrn) {
1784 outw(MC_RESET, ioaddr + MMU_CMD);
1785 smc->rx_ovrn = 0;
1786 }
1787 i = inw(ioaddr + INTERRUPT);
1788 SMC_SELECT_BANK(0);
1789 media = inw(ioaddr + EPH) & EPH_LINK_OK;
1790 SMC_SELECT_BANK(1);
1791 media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1;
1792
2a915157
KK		 1793 SMC_SELECT_BANK(saved_bank);
1794 spin_unlock_irqrestore(&smc->lock, flags);
1795
1da177e4
LT		 1796 /* Check for pending interrupt with watchdog flag set: with
1797 this, we can limp along even if the interrupt is blocked */
1798 if (smc->watchdog++ && ((i>>8) & i)) {
1799 if (!smc->fast_poll)
1800 printk(KERN_INFO "%s: interrupt(s) dropped!\n", dev->name);
2a915157 1801 local_irq_save(flags);
e363d138 1802 smc_interrupt(dev->irq, dev);
2a915157 1803 local_irq_restore(flags);
1da177e4
LT		 1804 smc->fast_poll = HZ;
1805 }
1806 if (smc->fast_poll) {
1807 smc->fast_poll--;
1808 smc->media.expires = jiffies + HZ/100;
1809 add_timer(&smc->media);
1da177e4
LT		 1810 return;
1811 }
1812
2a915157
KK		 1813 spin_lock_irqsave(&smc->lock, flags);
1814
1815 saved_bank = inw(ioaddr + BANK_SELECT);
1816
1da177e4
LT		 1817 if (smc->cfg & CFG_MII_SELECT) {
1818 if (smc->mii_if.phy_id < 0)
1819 goto reschedule;
1820
1821 SMC_SELECT_BANK(3);
1822 link = mdio_read(dev, smc->mii_if.phy_id, 1);
1823 if (!link || (link == 0xffff)) {
1824 printk(KERN_INFO "%s: MII is missing!\n", dev->name);
1825 smc->mii_if.phy_id = -1;
1826 goto reschedule;
1827 }
1828
1829 link &= 0x0004;
1830 if (link != smc->link_status) {
1831 u_short p = mdio_read(dev, smc->mii_if.phy_id, 5);
1832 printk(KERN_INFO "%s: %s link beat\n", dev->name,
1833 (link) ? "found" : "lost");
1834 smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40))
1835 ? TCR_FDUPLX : 0);
1836 if (link) {
1837 printk(KERN_INFO "%s: autonegotiation complete: "
1838 "%sbaseT-%cD selected\n", dev->name,
1839 ((p & 0x0180) ? "100" : "10"),
1840 (smc->duplex ? 'F' : 'H'));
1841 }
1842 SMC_SELECT_BANK(0);
1843 outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR);
1844 smc->link_status = link;
1845 }
1846 goto reschedule;
1847 }
1848
1849 /* Ignore collisions unless we've had no rx's recently */
4851d3aa 1850 if (time_after(jiffies, dev->last_rx + HZ)) {
1da177e4
LT		 1851 if (smc->tx_err || (smc->media_status & EPH_16COL))
1852 media |= EPH_16COL;
1853 }
1854 smc->tx_err = 0;
1855
1856 if (media != smc->media_status) {
1857 if ((media & smc->media_status & 1) &&
1858 ((smc->media_status ^ media) & EPH_LINK_OK))
1859 printk(KERN_INFO "%s: %s link beat\n", dev->name,
1860 (smc->media_status & EPH_LINK_OK ? "lost" : "found"));
1861 else if ((media & smc->media_status & 2) &&
1862 ((smc->media_status ^ media) & EPH_16COL))
1863 printk(KERN_INFO "%s: coax cable %s\n", dev->name,
1864 (media & EPH_16COL ? "problem" : "ok"));
1865 if (dev->if_port == 0) {
1866 if (media & 1) {
1867 if (media & EPH_LINK_OK)
1868 printk(KERN_INFO "%s: flipped to 10baseT\n",
1869 dev->name);
1870 else
1871 smc_set_xcvr(dev, 2);
1872 } else {
1873 if (media & EPH_16COL)
1874 smc_set_xcvr(dev, 1);
1875 else
1876 printk(KERN_INFO "%s: flipped to 10base2\n",
1877 dev->name);
1878 }
1879 }
1880 smc->media_status = media;
1881 }
1882
1883reschedule:
1884 smc->media.expires = jiffies + HZ;
1885 add_timer(&smc->media);
1886 SMC_SELECT_BANK(saved_bank);
85e27831 1887 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1888}
1889
1890static int smc_link_ok(struct net_device *dev)
1891{
906da809 1892 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1893 struct smc_private *smc = netdev_priv(dev);
1894
1895 if (smc->cfg & CFG_MII_SELECT) {
1896 return mii_link_ok(&smc->mii_if);
1897 } else {
1898 SMC_SELECT_BANK(0);
1899 return inw(ioaddr + EPH) & EPH_LINK_OK;
1900 }
1901}
1902
1903static int smc_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1904{
1905 u16 tmp;
906da809 1906 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1907
1908 ecmd->supported = (SUPPORTED_TP | SUPPORTED_AUI |
1909 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full);
1910
1911 SMC_SELECT_BANK(1);
1912 tmp = inw(ioaddr + CONFIG);
1913 ecmd->port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP;
1914 ecmd->transceiver = XCVR_INTERNAL;
1915 ecmd->speed = SPEED_10;
1916 ecmd->phy_address = ioaddr + MGMT;
1917
1918 SMC_SELECT_BANK(0);
1919 tmp = inw(ioaddr + TCR);
1920 ecmd->duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF;
1921
1922 return 0;
1923}
1924
1925static int smc_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1926{
1927 u16 tmp;
906da809 1928 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1929
1930 if (ecmd->speed != SPEED_10)
1931 return -EINVAL;
1932 if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
1933 return -EINVAL;
1934 if (ecmd->port != PORT_TP && ecmd->port != PORT_AUI)
1935 return -EINVAL;
1936 if (ecmd->transceiver != XCVR_INTERNAL)
1937 return -EINVAL;
1938
1939 if (ecmd->port == PORT_AUI)
1940 smc_set_xcvr(dev, 1);
1941 else
1942 smc_set_xcvr(dev, 0);
1943
1944 SMC_SELECT_BANK(0);
1945 tmp = inw(ioaddr + TCR);
1946 if (ecmd->duplex == DUPLEX_FULL)
1947 tmp |= TCR_FDUPLX;
1948 else
1949 tmp &= ~TCR_FDUPLX;
1950 outw(tmp, ioaddr + TCR);
1951
1952 return 0;
1953}
1954
1955static int check_if_running(struct net_device *dev)
1956{
1957 if (!netif_running(dev))
1958 return -EINVAL;
1959 return 0;
1960}
1961
1962static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1963{
1964 strcpy(info->driver, DRV_NAME);
1965 strcpy(info->version, DRV_VERSION);
1966}
1967
1968static int smc_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1969{
1970 struct smc_private *smc = netdev_priv(dev);
906da809 1971 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1972 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1973 int ret;
2a915157 1974 unsigned long flags;
1da177e4 1975
2a915157 1976 spin_lock_irqsave(&smc->lock, flags);
85e27831 1977 SMC_SELECT_BANK(3);
1da177e4
LT		 1978 if (smc->cfg & CFG_MII_SELECT)
1979 ret = mii_ethtool_gset(&smc->mii_if, ecmd);
1980 else
1981 ret = smc_netdev_get_ecmd(dev, ecmd);
1da177e4 1982 SMC_SELECT_BANK(saved_bank);
2a915157 1983 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1984 return ret;
1985}
1986
1987static int smc_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1988{
1989 struct smc_private *smc = netdev_priv(dev);
906da809 1990 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1991 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1992 int ret;
2a915157 1993 unsigned long flags;
1da177e4 1994
2a915157 1995 spin_lock_irqsave(&smc->lock, flags);
85e27831 1996 SMC_SELECT_BANK(3);
1da177e4
LT		 1997 if (smc->cfg & CFG_MII_SELECT)
1998 ret = mii_ethtool_sset(&smc->mii_if, ecmd);
1999 else
2000 ret = smc_netdev_set_ecmd(dev, ecmd);
1da177e4 2001 SMC_SELECT_BANK(saved_bank);
2a915157 2002 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 2003 return ret;
2004}
2005
2006static u32 smc_get_link(struct net_device *dev)
2007{
2008 struct smc_private *smc = netdev_priv(dev);
906da809 2009 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 2010 u16 saved_bank = inw(ioaddr + BANK_SELECT);
2011 u32 ret;
2a915157 2012 unsigned long flags;
1da177e4 2013
2a915157 2014 spin_lock_irqsave(&smc->lock, flags);
85e27831 2015 SMC_SELECT_BANK(3);
1da177e4 2016 ret = smc_link_ok(dev);
1da177e4 2017 SMC_SELECT_BANK(saved_bank);
2a915157 2018 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 2019 return ret;
2020}
2021
1da177e4
LT		 2022static int smc_nway_reset(struct net_device *dev)
2023{
2024 struct smc_private *smc = netdev_priv(dev);
2025 if (smc->cfg & CFG_MII_SELECT) {
906da809 2026 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 2027 u16 saved_bank = inw(ioaddr + BANK_SELECT);
2028 int res;
2029
2030 SMC_SELECT_BANK(3);
2031 res = mii_nway_restart(&smc->mii_if);
2032 SMC_SELECT_BANK(saved_bank);
2033
2034 return res;
2035 } else
2036 return -EOPNOTSUPP;
2037}
2038
7282d491 2039static const struct ethtool_ops ethtool_ops = {
1da177e4
LT		 2040 .begin = check_if_running,
2041 .get_drvinfo = smc_get_drvinfo,
2042 .get_settings = smc_get_settings,
2043 .set_settings = smc_set_settings,
2044 .get_link = smc_get_link,
1da177e4
LT		 2045 .nway_reset = smc_nway_reset,
2046};
2047
2048static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
2049{
2050 struct smc_private *smc = netdev_priv(dev);
2051 struct mii_ioctl_data *mii = if_mii(rq);
2052 int rc = 0;
2053 u16 saved_bank;
906da809 2054 unsigned int ioaddr = dev->base_addr;
2a915157 2055 unsigned long flags;
1da177e4
LT		 2056
2057 if (!netif_running(dev))
2058 return -EINVAL;
2059
2a915157 2060 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 2061 saved_bank = inw(ioaddr + BANK_SELECT);
2062 SMC_SELECT_BANK(3);
2063 rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL);
2064 SMC_SELECT_BANK(saved_bank);
2a915157 2065 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 2066 return rc;
2067}
2068
5c672220
DB		 2069static struct pcmcia_device_id smc91c92_ids[] = {
2070 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501),
2071 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a),
2072 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63),
2073 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63),
2074 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef),
2075 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef),
2076 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c),
2077 PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e),
d277ad0e
K		 2078 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9),
2079 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed),
5c672220
DB		 2080 PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020),
2081 PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023),
2082 PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb),
2083 PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc),
2084 PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1),
2085 PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5),
2086 PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9),
2087 PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953),
2088 PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a),
d277ad0e
K		 2089 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314),
2090 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a),
5c672220
DB		 2091 PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc),
2092 PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9),
2093 PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d),
2094 /* These conflict with other cards! */
2095 /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */
2096 /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */
2097 PCMCIA_DEVICE_NULL,
2098};
2099MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids);
2100
1da177e4
LT		 2101static struct pcmcia_driver smc91c92_cs_driver = {
2102 .owner = THIS_MODULE,
2103 .drv = {
2104 .name = "smc91c92_cs",
2105 },
15b99ac1 2106 .probe = smc91c92_probe,
cc3b4866 2107 .remove = smc91c92_detach,
5c672220 2108 .id_table = smc91c92_ids,
98e4c28b
DB		 2109 .suspend = smc91c92_suspend,
2110 .resume = smc91c92_resume,
1da177e4
LT		 2111};
2112
2113static int __init init_smc91c92_cs(void)
2114{
2115 return pcmcia_register_driver(&smc91c92_cs_driver);
2116}
2117
2118static void __exit exit_smc91c92_cs(void)
2119{
2120 pcmcia_unregister_driver(&smc91c92_cs_driver);
1da177e4
LT		 2121}
2122
2123module_init(init_smc91c92_cs);
2124module_exit(exit_smc91c92_cs);
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