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pcmcia: split up modify_configuration() into two fixup functions
[mirror_ubuntu-artful-kernel.git] / drivers / net / pcmcia / smc91c92_cs.c
CommitLineData
1da177e4
LT		 1/*======================================================================
2
3 A PCMCIA ethernet driver for SMC91c92-based cards.
4
5 This driver supports Megahertz PCMCIA ethernet cards; and
6 Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem
7 multifunction cards.
8
9 Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net
10
11 smc91c92_cs.c 1.122 2002/10/25 06:26:39
12
13 This driver contains code written by Donald Becker
14 (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au),
15 David Hinds (dahinds@users.sourceforge.net), and Erik Stahlman
16 (erik@vt.edu). Donald wrote the SMC 91c92 code using parts of
17 Erik's SMC 91c94 driver. Rowan wrote a similar driver, and I've
18 incorporated some parts of his driver here. I (Dave) wrote most
19 of the PCMCIA glue code, and the Ositech support code. Kelly
20 Stephens (kstephen@holli.com) added support for the Motorola
21 Mariner, with help from Allen Brost.
22
23 This software may be used and distributed according to the terms of
24 the GNU General Public License, incorporated herein by reference.
25
26======================================================================*/
27
28#include <linux/module.h>
29#include <linux/kernel.h>
30#include <linux/init.h>
31#include <linux/slab.h>
32#include <linux/string.h>
33#include <linux/timer.h>
34#include <linux/interrupt.h>
35#include <linux/delay.h>
36#include <linux/crc32.h>
37#include <linux/netdevice.h>
38#include <linux/etherdevice.h>
39#include <linux/skbuff.h>
40#include <linux/if_arp.h>
41#include <linux/ioport.h>
42#include <linux/ethtool.h>
43#include <linux/mii.h>
4851d3aa 44#include <linux/jiffies.h>
75bf758f 45#include <linux/firmware.h>
1da177e4 46
1da177e4
LT		 47#include <pcmcia/cs.h>
48#include <pcmcia/cistpl.h>
49#include <pcmcia/cisreg.h>
50#include <pcmcia/ciscode.h>
51#include <pcmcia/ds.h>
50db3fdb 52#include <pcmcia/ss.h>
1da177e4
LT		 53
54#include <asm/io.h>
55#include <asm/system.h>
56#include <asm/uaccess.h>
57
1da177e4
LT		 58/*====================================================================*/
59
f71e1309 60static const char *if_names[] = { "auto", "10baseT", "10base2"};
1da177e4 61
75bf758f
JSR		 62/* Firmware name */
63#define FIRMWARE_NAME "ositech/Xilinx7OD.bin"
64
1da177e4
LT		 65/* Module parameters */
66
67MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver");
68MODULE_LICENSE("GPL");
75bf758f 69MODULE_FIRMWARE(FIRMWARE_NAME);
1da177e4
LT		 70
71#define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
72
73/*
74 Transceiver/media type.
75 0 = auto
76 1 = 10baseT (and autoselect if #define AUTOSELECT),
77 2 = AUI/10base2,
78*/
79INT_MODULE_PARM(if_port, 0);
80
1da177e4
LT		 81
82#define DRV_NAME "smc91c92_cs"
d5b20697 83#define DRV_VERSION "1.123"
1da177e4
LT		 84
85/*====================================================================*/
86
87/* Operational parameter that usually are not changed. */
88
89/* Time in jiffies before concluding Tx hung */
90#define TX_TIMEOUT ((400*HZ)/1000)
91
92/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
93#define INTR_WORK 4
94
95/* Times to check the check the chip before concluding that it doesn't
96 currently have room for another Tx packet. */
97#define MEMORY_WAIT_TIME 8
98
1da177e4 99struct smc_private {
fd238232 100 struct pcmcia_device *p_dev;
1da177e4
LT		 101 spinlock_t lock;
102 u_short manfid;
103 u_short cardid;
6fb7298c 104
1da177e4
LT		 105 struct sk_buff *saved_skb;
106 int packets_waiting;
107 void __iomem *base;
108 u_short cfg;
109 struct timer_list media;
110 int watchdog, tx_err;
111 u_short media_status;
112 u_short fast_poll;
113 u_short link_status;
114 struct mii_if_info mii_if;
115 int duplex;
116 int rx_ovrn;
117};
118
119/* Special definitions for Megahertz multifunction cards */
120#define MEGAHERTZ_ISR 0x0380
121
122/* Special function registers for Motorola Mariner */
123#define MOT_LAN 0x0000
124#define MOT_UART 0x0020
125#define MOT_EEPROM 0x20
126
127#define MOT_NORMAL \
128(COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA)
129
130/* Special function registers for Ositech cards */
131#define OSITECH_AUI_CTL 0x0c
132#define OSITECH_PWRDOWN 0x0d
133#define OSITECH_RESET 0x0e
134#define OSITECH_ISR 0x0f
135#define OSITECH_AUI_PWR 0x0c
136#define OSITECH_RESET_ISR 0x0e
137
138#define OSI_AUI_PWR 0x40
139#define OSI_LAN_PWRDOWN 0x02
140#define OSI_MODEM_PWRDOWN 0x01
141#define OSI_LAN_RESET 0x02
142#define OSI_MODEM_RESET 0x01
143
144/* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */
145#define BANK_SELECT 14 /* Window select register. */
146#define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); }
147
148/* Bank 0 registers. */
149#define TCR 0 /* transmit control register */
150#define TCR_CLEAR 0 /* do NOTHING */
151#define TCR_ENABLE 0x0001 /* if this is 1, we can transmit */
152#define TCR_PAD_EN 0x0080 /* pads short packets to 64 bytes */
153#define TCR_MONCSN 0x0400 /* Monitor Carrier. */
154#define TCR_FDUPLX 0x0800 /* Full duplex mode. */
155#define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN
156
157#define EPH 2 /* Ethernet Protocol Handler report. */
158#define EPH_TX_SUC 0x0001
159#define EPH_SNGLCOL 0x0002
160#define EPH_MULCOL 0x0004
161#define EPH_LTX_MULT 0x0008
162#define EPH_16COL 0x0010
163#define EPH_SQET 0x0020
164#define EPH_LTX_BRD 0x0040
165#define EPH_TX_DEFR 0x0080
166#define EPH_LAT_COL 0x0200
167#define EPH_LOST_CAR 0x0400
168#define EPH_EXC_DEF 0x0800
169#define EPH_CTR_ROL 0x1000
170#define EPH_RX_OVRN 0x2000
171#define EPH_LINK_OK 0x4000
172#define EPH_TX_UNRN 0x8000
173#define MEMINFO 8 /* Memory Information Register */
174#define MEMCFG 10 /* Memory Configuration Register */
175
176/* Bank 1 registers. */
177#define CONFIG 0
178#define CFG_MII_SELECT 0x8000 /* 91C100 only */
179#define CFG_NO_WAIT 0x1000
180#define CFG_FULL_STEP 0x0400
181#define CFG_SET_SQLCH 0x0200
182#define CFG_AUI_SELECT 0x0100
183#define CFG_16BIT 0x0080
184#define CFG_DIS_LINK 0x0040
185#define CFG_STATIC 0x0030
186#define CFG_IRQ_SEL_1 0x0004
187#define CFG_IRQ_SEL_0 0x0002
188#define BASE_ADDR 2
189#define ADDR0 4
190#define GENERAL 10
191#define CONTROL 12
192#define CTL_STORE 0x0001
193#define CTL_RELOAD 0x0002
194#define CTL_EE_SELECT 0x0004
195#define CTL_TE_ENABLE 0x0020
196#define CTL_CR_ENABLE 0x0040
197#define CTL_LE_ENABLE 0x0080
198#define CTL_AUTO_RELEASE 0x0800
199#define CTL_POWERDOWN 0x2000
200
201/* Bank 2 registers. */
202#define MMU_CMD 0
203#define MC_ALLOC 0x20 /* or with number of 256 byte packets */
204#define MC_RESET 0x40
205#define MC_RELEASE 0x80 /* remove and release the current rx packet */
206#define MC_FREEPKT 0xA0 /* Release packet in PNR register */
207#define MC_ENQUEUE 0xC0 /* Enqueue the packet for transmit */
208#define PNR_ARR 2
209#define FIFO_PORTS 4
210#define FP_RXEMPTY 0x8000
211#define POINTER 6
212#define PTR_AUTO_INC 0x0040
213#define PTR_READ 0x2000
214#define PTR_AUTOINC 0x4000
215#define PTR_RCV 0x8000
216#define DATA_1 8
217#define INTERRUPT 12
218#define IM_RCV_INT 0x1
219#define IM_TX_INT 0x2
220#define IM_TX_EMPTY_INT 0x4
221#define IM_ALLOC_INT 0x8
222#define IM_RX_OVRN_INT 0x10
223#define IM_EPH_INT 0x20
224
225#define RCR 4
226enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002,
227 RxEnable = 0x0100, RxStripCRC = 0x0200};
228#define RCR_SOFTRESET 0x8000 /* resets the chip */
229#define RCR_STRIP_CRC 0x200 /* strips CRC */
230#define RCR_ENABLE 0x100 /* IFF this is set, we can receive packets */
231#define RCR_ALMUL 0x4 /* receive all multicast packets */
232#define RCR_PROMISC 0x2 /* enable promiscuous mode */
233
234/* the normal settings for the RCR register : */
235#define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE)
236#define RCR_CLEAR 0x0 /* set it to a base state */
237#define COUNTER 6
238
239/* BANK 3 -- not the same values as in smc9194! */
240#define MULTICAST0 0
241#define MULTICAST2 2
242#define MULTICAST4 4
243#define MULTICAST6 6
244#define MGMT 8
245#define REVISION 0x0a
246
247/* Transmit status bits. */
248#define TS_SUCCESS 0x0001
249#define TS_16COL 0x0010
250#define TS_LATCOL 0x0200
251#define TS_LOSTCAR 0x0400
252
253/* Receive status bits. */
254#define RS_ALGNERR 0x8000
255#define RS_BADCRC 0x2000
256#define RS_ODDFRAME 0x1000
257#define RS_TOOLONG 0x0800
258#define RS_TOOSHORT 0x0400
259#define RS_MULTICAST 0x0001
260#define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)
261
262#define set_bits(v, p) outw(inw(p)|(v), (p))
263#define mask_bits(v, p) outw(inw(p)&(v), (p))
264
265/*====================================================================*/
266
cc3b4866 267static void smc91c92_detach(struct pcmcia_device *p_dev);
15b99ac1 268static int smc91c92_config(struct pcmcia_device *link);
fba395ee 269static void smc91c92_release(struct pcmcia_device *link);
1da177e4
LT		 270
271static int smc_open(struct net_device *dev);
272static int smc_close(struct net_device *dev);
273static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
274static void smc_tx_timeout(struct net_device *dev);
dbf02fae
SH		 275static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
276 struct net_device *dev);
7d12e780 277static irqreturn_t smc_interrupt(int irq, void *dev_id);
1da177e4 278static void smc_rx(struct net_device *dev);
1da177e4
LT		 279static void set_rx_mode(struct net_device *dev);
280static int s9k_config(struct net_device *dev, struct ifmap *map);
281static void smc_set_xcvr(struct net_device *dev, int if_port);
282static void smc_reset(struct net_device *dev);
283static void media_check(u_long arg);
906da809 284static void mdio_sync(unsigned int addr);
1da177e4
LT		 285static int mdio_read(struct net_device *dev, int phy_id, int loc);
286static void mdio_write(struct net_device *dev, int phy_id, int loc, int value);
287static int smc_link_ok(struct net_device *dev);
7282d491 288static const struct ethtool_ops ethtool_ops;
1da177e4 289
9b31b697
SH		 290static const struct net_device_ops smc_netdev_ops = {
291 .ndo_open = smc_open,
292 .ndo_stop = smc_close,
293 .ndo_start_xmit = smc_start_xmit,
294 .ndo_tx_timeout = smc_tx_timeout,
295 .ndo_set_config = s9k_config,
296 .ndo_set_multicast_list = set_rx_mode,
297 .ndo_do_ioctl = &smc_ioctl,
298 .ndo_change_mtu = eth_change_mtu,
299 .ndo_set_mac_address = eth_mac_addr,
300 .ndo_validate_addr = eth_validate_addr,
301};
302
1da177e4
LT		 303/*======================================================================
304
305 smc91c92_attach() creates an "instance" of the driver, allocating
306 local data structures for one device. The device is registered
307 with Card Services.
308
309======================================================================*/
310
15b99ac1 311static int smc91c92_probe(struct pcmcia_device *link)
1da177e4 312{
1da177e4 313 struct smc_private *smc;
1da177e4 314 struct net_device *dev;
1da177e4 315
dd0fab5b 316 dev_dbg(&link->dev, "smc91c92_attach()\n");
1da177e4
LT		 317
318 /* Create new ethernet device */
319 dev = alloc_etherdev(sizeof(struct smc_private));
320 if (!dev)
f8cfa618 321 return -ENOMEM;
1da177e4 322 smc = netdev_priv(dev);
fba395ee 323 smc->p_dev = link;
44b496f6 324 link->priv = dev;
1da177e4
LT		 325
326 spin_lock_init(&smc->lock);
90abdc3b
DB		 327 link->resource[0]->end = 16;
328 link->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
1da177e4 329 link->conf.Attributes = CONF_ENABLE_IRQ;
1da177e4
LT		 330 link->conf.IntType = INT_MEMORY_AND_IO;
331
332 /* The SMC91c92-specific entries in the device structure. */
9b31b697 333 dev->netdev_ops = &smc_netdev_ops;
1da177e4 334 SET_ETHTOOL_OPS(dev, &ethtool_ops);
1da177e4 335 dev->watchdog_timeo = TX_TIMEOUT;
1da177e4
LT		 336
337 smc->mii_if.dev = dev;
338 smc->mii_if.mdio_read = mdio_read;
339 smc->mii_if.mdio_write = mdio_write;
340 smc->mii_if.phy_id_mask = 0x1f;
341 smc->mii_if.reg_num_mask = 0x1f;
342
15b99ac1 343 return smc91c92_config(link);
1da177e4
LT		 344} /* smc91c92_attach */
345
346/*======================================================================
347
348 This deletes a driver "instance". The device is de-registered
349 with Card Services. If it has been released, all local data
350 structures are freed. Otherwise, the structures will be freed
351 when the device is released.
352
353======================================================================*/
354
fba395ee 355static void smc91c92_detach(struct pcmcia_device *link)
1da177e4
LT		 356{
357 struct net_device *dev = link->priv;
1da177e4 358
dd0fab5b 359 dev_dbg(&link->dev, "smc91c92_detach\n");
1da177e4 360
c7c2fa07 361 unregister_netdev(dev);
1da177e4 362
e2d40963 363 smc91c92_release(link);
1da177e4 364
1da177e4
LT		 365 free_netdev(dev);
366} /* smc91c92_detach */
367
368/*====================================================================*/
369
370static int cvt_ascii_address(struct net_device *dev, char *s)
371{
372 int i, j, da, c;
373
374 if (strlen(s) != 12)
375 return -1;
376 for (i = 0; i < 6; i++) {
377 da = 0;
378 for (j = 0; j < 2; j++) {
379 c = *s++;
380 da <<= 4;
381 da += ((c >= '0') && (c <= '9')) ?
382 (c - '0') : ((c & 0x0f) + 9);
383 }
384 dev->dev_addr[i] = da;
385 }
386 return 0;
387}
388
dddfbd82 389/*====================================================================
1da177e4
LT		 390
391 Configuration stuff for Megahertz cards
392
393 mhz_3288_power() is used to power up a 3288's ethernet chip.
394 mhz_mfc_config() handles socket setup for multifunction (1144
395 and 3288) cards. mhz_setup() gets a card's hardware ethernet
396 address.
397
398======================================================================*/
399
fba395ee 400static int mhz_3288_power(struct pcmcia_device *link)
1da177e4
LT		 401{
402 struct net_device *dev = link->priv;
403 struct smc_private *smc = netdev_priv(dev);
404 u_char tmp;
405
406 /* Read the ISR twice... */
407 readb(smc->base+MEGAHERTZ_ISR);
408 udelay(5);
409 readb(smc->base+MEGAHERTZ_ISR);
410
411 /* Pause 200ms... */
412 mdelay(200);
413
414 /* Now read and write the COR... */
415 tmp = readb(smc->base + link->conf.ConfigBase + CISREG_COR);
416 udelay(5);
417 writeb(tmp, smc->base + link->conf.ConfigBase + CISREG_COR);
418
419 return 0;
420}
421
b54bf94b
DB		 422static int mhz_mfc_config_check(struct pcmcia_device *p_dev,
423 cistpl_cftable_entry_t *cf,
8e2fc39d 424 cistpl_cftable_entry_t *dflt,
ad913c11 425 unsigned int vcc,
b54bf94b
DB		 426 void *priv_data)
427{
428 int k;
90abdc3b 429 p_dev->resource[1]->start = cf->io.win[0].base;
b54bf94b
DB		 430 for (k = 0; k < 0x400; k += 0x10) {
431 if (k & 0x80)
432 continue;
90abdc3b
DB		 433 p_dev->resource[0]->start = k ^ 0x300;
434 p_dev->io_lines = 16;
435 if (!pcmcia_request_io(p_dev))
b54bf94b
DB		 436 return 0;
437 }
438 return -ENODEV;
439}
440
fba395ee 441static int mhz_mfc_config(struct pcmcia_device *link)
1da177e4
LT		 442{
443 struct net_device *dev = link->priv;
444 struct smc_private *smc = netdev_priv(dev);
b5cb259e 445 unsigned int offset;
b54bf94b 446 int i;
1da177e4
LT		 447
448 link->conf.Attributes |= CONF_ENABLE_SPKR;
449 link->conf.Status = CCSR_AUDIO_ENA;
90abdc3b
DB		 450 link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
451 link->resource[1]->end = 8;
1da177e4 452
1da177e4
LT		 453 /* The Megahertz combo cards have modem-like CIS entries, so
454 we have to explicitly try a bunch of port combinations. */
b54bf94b 455 if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL))
dddfbd82
DB		 456 return -ENODEV;
457
9a017a91 458 dev->base_addr = link->resource[0]->start;
1da177e4
LT		 459
460 /* Allocate a memory window, for accessing the ISR */
cdb13808
DB		 461 link->resource[2]->flags = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
462 link->resource[2]->start = link->resource[2]->end = 0;
463 i = pcmcia_request_window(link, link->resource[2], 0);
4c89e88b 464 if (i != 0)
dddfbd82
DB		 465 return -ENODEV;
466
cdb13808
DB		 467 smc->base = ioremap(link->resource[2]->start,
468 resource_size(link->resource[2]));
b5cb259e 469 offset = (smc->manfid == MANFID_MOTOROLA) ? link->conf.ConfigBase : 0;
cdb13808 470 i = pcmcia_map_mem_page(link, link->resource[2], offset);
8e95a202
JP		 471 if ((i == 0) &&
472 (smc->manfid == MANFID_MEGAHERTZ) &&
473 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
474 mhz_3288_power(link);
1da177e4 475
dddfbd82 476 return 0;
1da177e4
LT		 477}
478
dddfbd82
DB		 479static int pcmcia_get_versmac(struct pcmcia_device *p_dev,
480 tuple_t *tuple,
481 void *priv)
1da177e4 482{
dddfbd82
DB		 483 struct net_device *dev = priv;
484 cisparse_t parse;
fb9e2d88 485 u8 *buf;
4638aef4 486
dddfbd82
DB		 487 if (pcmcia_parse_tuple(tuple, &parse))
488 return -EINVAL;
1da177e4 489
fb9e2d88
KK		 490 buf = parse.version_1.str + parse.version_1.ofs[3];
491
492 if ((parse.version_1.ns > 3) && (cvt_ascii_address(dev, buf) == 0))
dddfbd82 493 return 0;
4638aef4 494
dddfbd82
DB		 495 return -EINVAL;
496};
497
fba395ee 498static int mhz_setup(struct pcmcia_device *link)
1da177e4 499{
1da177e4 500 struct net_device *dev = link->priv;
dddfbd82
DB		 501 size_t len;
502 u8 *buf;
4638aef4 503 int rc;
1da177e4
LT		 504
505 /* Read the station address from the CIS. It is stored as the last
506 (fourth) string in the Version 1 Version/ID tuple. */
7d2e8d00
DB		 507 if ((link->prod_id[3]) &&
508 (cvt_ascii_address(dev, link->prod_id[3]) == 0))
509 return 0;
510
511 /* Workarounds for broken cards start here. */
a1a98b72 512 /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */
dddfbd82
DB		 513 if (!pcmcia_loop_tuple(link, CISTPL_VERS_1, pcmcia_get_versmac, dev))
514 return 0;
1da177e4
LT		 515
516 /* Another possibility: for the EM3288, in a special tuple */
4638aef4 517 rc = -1;
dddfbd82
DB		 518 len = pcmcia_get_tuple(link, 0x81, &buf);
519 if (buf && len >= 13) {
520 buf[12] = '\0';
fb9e2d88 521 if (cvt_ascii_address(dev, buf) == 0)
dddfbd82
DB		 522 rc = 0;
523 }
524 kfree(buf);
525
526 return rc;
527};
1da177e4
LT		 528
529/*======================================================================
530
531 Configuration stuff for the Motorola Mariner
532
533 mot_config() writes directly to the Mariner configuration
534 registers because the CIS is just bogus.
535
536======================================================================*/
537
fba395ee 538static void mot_config(struct pcmcia_device *link)
1da177e4
LT		 539{
540 struct net_device *dev = link->priv;
541 struct smc_private *smc = netdev_priv(dev);
906da809 542 unsigned int ioaddr = dev->base_addr;
9a017a91 543 unsigned int iouart = link->resource[1]->start;
1da177e4
LT		 544
545 /* Set UART base address and force map with COR bit 1 */
546 writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0);
547 writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1);
548 writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR);
549
550 /* Set SMC base address and force map with COR bit 1 */
551 writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0);
552 writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1);
553 writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR);
554
555 /* Wait for things to settle down */
556 mdelay(100);
557}
558
fba395ee 559static int mot_setup(struct pcmcia_device *link)
1da177e4
LT		 560{
561 struct net_device *dev = link->priv;
906da809 562 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 563 int i, wait, loop;
564 u_int addr;
565
566 /* Read Ethernet address from Serial EEPROM */
567
568 for (i = 0; i < 3; i++) {
569 SMC_SELECT_BANK(2);
570 outw(MOT_EEPROM + i, ioaddr + POINTER);
571 SMC_SELECT_BANK(1);
572 outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL);
573
574 for (loop = wait = 0; loop < 200; loop++) {
575 udelay(10);
576 wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL));
577 if (wait == 0) break;
578 }
579
580 if (wait)
581 return -1;
582
583 addr = inw(ioaddr + GENERAL);
584 dev->dev_addr[2*i] = addr & 0xff;
585 dev->dev_addr[2*i+1] = (addr >> 8) & 0xff;
586 }
587
588 return 0;
589}
590
591/*====================================================================*/
592
b54bf94b
DB		 593static int smc_configcheck(struct pcmcia_device *p_dev,
594 cistpl_cftable_entry_t *cf,
8e2fc39d 595 cistpl_cftable_entry_t *dflt,
ad913c11 596 unsigned int vcc,
b54bf94b
DB		 597 void *priv_data)
598{
90abdc3b
DB		 599 p_dev->resource[0]->start = cf->io.win[0].base;
600 p_dev->io_lines = cf->io.flags & CISTPL_IO_LINES_MASK;
601 return pcmcia_request_io(p_dev);
b54bf94b
DB		 602}
603
fba395ee 604static int smc_config(struct pcmcia_device *link)
1da177e4
LT		 605{
606 struct net_device *dev = link->priv;
1da177e4
LT		 607 int i;
608
90abdc3b 609 link->resource[0]->end = 16;
b54bf94b
DB		 610 i = pcmcia_loop_config(link, smc_configcheck, NULL);
611 if (!i)
9a017a91 612 dev->base_addr = link->resource[0]->start;
4638aef4 613
1da177e4
LT		 614 return i;
615}
616
dddfbd82 617
fba395ee 618static int smc_setup(struct pcmcia_device *link)
1da177e4 619{
1da177e4 620 struct net_device *dev = link->priv;
1da177e4
LT		 621
622 /* Check for a LAN function extension tuple */
dddfbd82
DB		 623 if (!pcmcia_get_mac_from_cis(link, dev))
624 return 0;
625
1da177e4 626 /* Try the third string in the Version 1 Version/ID tuple. */
a9606fd3 627 if (link->prod_id[2]) {
dddfbd82
DB		 628 if (cvt_ascii_address(dev, link->prod_id[2]) == 0)
629 return 0;
4638aef4 630 }
dddfbd82 631 return -1;
1da177e4
LT		 632}
633
634/*====================================================================*/
635
fba395ee 636static int osi_config(struct pcmcia_device *link)
1da177e4
LT		 637{
638 struct net_device *dev = link->priv;
906da809 639 static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
1da177e4
LT		 640 int i, j;
641
642 link->conf.Attributes |= CONF_ENABLE_SPKR;
643 link->conf.Status = CCSR_AUDIO_ENA;
90abdc3b
DB		 644 link->resource[0]->end = 64;
645 link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
646 link->resource[1]->end = 8;
1da177e4
LT		 647
648 /* Enable Hard Decode, LAN, Modem */
649 link->conf.ConfigIndex = 0x23;
90abdc3b 650 link->io_lines = 16;
1da177e4
LT		 651
652 for (i = j = 0; j < 4; j++) {
90abdc3b
DB		 653 link->resource[1]->start = com[j];
654 i = pcmcia_request_io(link);
4c89e88b
DB		 655 if (i == 0)
656 break;
1da177e4 657 }
4c89e88b 658 if (i != 0) {
1da177e4
LT		 659 /* Fallback: turn off hard decode */
660 link->conf.ConfigIndex = 0x03;
90abdc3b
DB		 661 link->resource[1]->end = 0;
662 i = pcmcia_request_io(link);
1da177e4 663 }
9a017a91 664 dev->base_addr = link->resource[0]->start + 0x10;
1da177e4
LT		 665 return i;
666}
667
75bf758f
JSR		 668static int osi_load_firmware(struct pcmcia_device *link)
669{
670 const struct firmware *fw;
671 int i, err;
672
673 err = request_firmware(&fw, FIRMWARE_NAME, &link->dev);
674 if (err) {
675 pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME);
676 return err;
677 }
678
679 /* Download the Seven of Diamonds firmware */
680 for (i = 0; i < fw->size; i++) {
9a017a91 681 outb(fw->data[i], link->resource[0]->start + 2);
75bf758f
JSR		 682 udelay(50);
683 }
684 release_firmware(fw);
685 return err;
686}
687
dddfbd82
DB		 688static int pcmcia_osi_mac(struct pcmcia_device *p_dev,
689 tuple_t *tuple,
690 void *priv)
1da177e4 691{
dddfbd82
DB		 692 struct net_device *dev = priv;
693 int i;
1da177e4 694
dddfbd82
DB		 695 if (tuple->TupleDataLen < 8)
696 return -EINVAL;
697 if (tuple->TupleData[0] != 0x04)
698 return -EINVAL;
699 for (i = 0; i < 6; i++)
700 dev->dev_addr[i] = tuple->TupleData[i+2];
701 return 0;
702};
4638aef4 703
4638aef4 704
dddfbd82
DB		 705static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid)
706{
707 struct net_device *dev = link->priv;
708 int rc;
1da177e4
LT		 709
710 /* Read the station address from tuple 0x90, subtuple 0x04 */
dddfbd82
DB		 711 if (pcmcia_loop_tuple(link, 0x90, pcmcia_osi_mac, dev))
712 return -1;
1da177e4
LT		 713
714 if (((manfid == MANFID_OSITECH) &&
715 (cardid == PRODID_OSITECH_SEVEN)) ||
716 ((manfid == MANFID_PSION) &&
717 (cardid == PRODID_PSION_NET100))) {
75bf758f
JSR		 718 rc = osi_load_firmware(link);
719 if (rc)
dddfbd82 720 return rc;
1da177e4
LT		 721 } else if (manfid == MANFID_OSITECH) {
722 /* Make sure both functions are powered up */
9a017a91 723 set_bits(0x300, link->resource[0]->start + OSITECH_AUI_PWR);
1da177e4 724 /* Now, turn on the interrupt for both card functions */
9a017a91 725 set_bits(0x300, link->resource[0]->start + OSITECH_RESET_ISR);
dd0fab5b 726 dev_dbg(&link->dev, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n",
9a017a91
DB		 727 inw(link->resource[0]->start + OSITECH_AUI_PWR),
728 inw(link->resource[0]->start + OSITECH_RESET_ISR));
1da177e4 729 }
dddfbd82 730 return 0;
1da177e4
LT		 731}
732
fba395ee 733static int smc91c92_suspend(struct pcmcia_device *link)
98e4c28b 734{
98e4c28b
DB		 735 struct net_device *dev = link->priv;
736
e2d40963 737 if (link->open)
4bbed523 738 netif_device_detach(dev);
98e4c28b
DB		 739
740 return 0;
741}
742
fba395ee 743static int smc91c92_resume(struct pcmcia_device *link)
98e4c28b 744{
98e4c28b
DB		 745 struct net_device *dev = link->priv;
746 struct smc_private *smc = netdev_priv(dev);
747 int i;
748
e2d40963
DB		 749 if ((smc->manfid == MANFID_MEGAHERTZ) &&
750 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
751 mhz_3288_power(link);
752 if (smc->manfid == MANFID_MOTOROLA)
753 mot_config(link);
754 if ((smc->manfid == MANFID_OSITECH) &&
755 (smc->cardid != PRODID_OSITECH_SEVEN)) {
756 /* Power up the card and enable interrupts */
757 set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR);
758 set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR);
759 }
760 if (((smc->manfid == MANFID_OSITECH) &&
761 (smc->cardid == PRODID_OSITECH_SEVEN)) ||
762 ((smc->manfid == MANFID_PSION) &&
763 (smc->cardid == PRODID_PSION_NET100))) {
75bf758f
JSR		 764 i = osi_load_firmware(link);
765 if (i) {
766 pr_err("smc91c92_cs: Failed to load firmware\n");
767 return i;
98e4c28b
DB		 768 }
769 }
e2d40963
DB		 770 if (link->open) {
771 smc_reset(dev);
772 netif_device_attach(dev);
773 }
98e4c28b
DB		 774
775 return 0;
776}
777
778
1da177e4
LT		 779/*======================================================================
780
781 This verifies that the chip is some SMC91cXX variant, and returns
782 the revision code if successful. Otherwise, it returns -ENODEV.
783
784======================================================================*/
785
fba395ee 786static int check_sig(struct pcmcia_device *link)
1da177e4
LT		 787{
788 struct net_device *dev = link->priv;
906da809 789 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 790 int width;
791 u_short s;
792
793 SMC_SELECT_BANK(1);
794 if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) {
795 /* Try powering up the chip */
796 outw(0, ioaddr + CONTROL);
797 mdelay(55);
798 }
799
800 /* Try setting bus width */
90abdc3b 801 width = (link->resource[0]->flags == IO_DATA_PATH_WIDTH_AUTO);
1da177e4
LT		 802 s = inb(ioaddr + CONFIG);
803 if (width)
804 s |= CFG_16BIT;
805 else
806 s &= ~CFG_16BIT;
807 outb(s, ioaddr + CONFIG);
808
809 /* Check Base Address Register to make sure bus width is OK */
810 s = inw(ioaddr + BASE_ADDR);
811 if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) &&
812 ((s >> 8) != (s & 0xff))) {
813 SMC_SELECT_BANK(3);
814 s = inw(ioaddr + REVISION);
815 return (s & 0xff);
816 }
817
818 if (width) {
4bbed523
DB		 819 printk(KERN_INFO "smc91c92_cs: using 8-bit IO window.\n");
820
fba395ee 821 smc91c92_suspend(link);
fb49fa53 822 pcmcia_fixup_iowidth(link);
fba395ee 823 smc91c92_resume(link);
4bbed523 824 return check_sig(link);
1da177e4
LT		 825 }
826 return -ENODEV;
827}
828
829/*======================================================================
830
831 smc91c92_config() is scheduled to run after a CARD_INSERTION event
832 is received, to configure the PCMCIA socket, and to make the
833 ethernet device available to the system.
834
835======================================================================*/
836
15b99ac1 837static int smc91c92_config(struct pcmcia_device *link)
1da177e4 838{
1da177e4
LT		 839 struct net_device *dev = link->priv;
840 struct smc_private *smc = netdev_priv(dev);
1da177e4
LT		 841 char *name;
842 int i, j, rev;
906da809 843 unsigned int ioaddr;
1da177e4
LT		 844 u_long mir;
845
dd0fab5b 846 dev_dbg(&link->dev, "smc91c92_config\n");
1da177e4 847
efd50585
DB		 848 smc->manfid = link->manf_id;
849 smc->cardid = link->card_id;
1da177e4 850
1da177e4
LT		 851 if ((smc->manfid == MANFID_OSITECH) &&
852 (smc->cardid != PRODID_OSITECH_SEVEN)) {
853 i = osi_config(link);
854 } else if ((smc->manfid == MANFID_MOTOROLA) ||
855 ((smc->manfid == MANFID_MEGAHERTZ) &&
856 ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) ||
857 (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) {
858 i = mhz_mfc_config(link);
859 } else {
860 i = smc_config(link);
861 }
dd0fab5b
DB		 862 if (i)
863 goto config_failed;
1da177e4 864
eb14120f 865 i = pcmcia_request_irq(link, smc_interrupt);
dd0fab5b
DB		 866 if (i)
867 goto config_failed;
fba395ee 868 i = pcmcia_request_configuration(link, &link->conf);
dd0fab5b
DB		 869 if (i)
870 goto config_failed;
1da177e4
LT		 871
872 if (smc->manfid == MANFID_MOTOROLA)
873 mot_config(link);
874
eb14120f 875 dev->irq = link->irq;
1da177e4
LT		 876
877 if ((if_port >= 0) && (if_port <= 2))
878 dev->if_port = if_port;
879 else
880 printk(KERN_NOTICE "smc91c92_cs: invalid if_port requested\n");
881
882 switch (smc->manfid) {
883 case MANFID_OSITECH:
884 case MANFID_PSION:
885 i = osi_setup(link, smc->manfid, smc->cardid); break;
886 case MANFID_SMC:
887 case MANFID_NEW_MEDIA:
888 i = smc_setup(link); break;
889 case 0x128: /* For broken Megahertz cards */
890 case MANFID_MEGAHERTZ:
891 i = mhz_setup(link); break;
892 case MANFID_MOTOROLA:
893 default: /* get the hw address from EEPROM */
894 i = mot_setup(link); break;
895 }
896
897 if (i != 0) {
898 printk(KERN_NOTICE "smc91c92_cs: Unable to find hardware address.\n");
fb9e2d88 899 goto config_failed;
1da177e4
LT		 900 }
901
902 smc->duplex = 0;
903 smc->rx_ovrn = 0;
904
905 rev = check_sig(link);
906 name = "???";
907 if (rev > 0)
908 switch (rev >> 4) {
909 case 3: name = "92"; break;
910 case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break;
911 case 5: name = "95"; break;
912 case 7: name = "100"; break;
913 case 8: name = "100-FD"; break;
914 case 9: name = "110"; break;
915 }
916
917 ioaddr = dev->base_addr;
918 if (rev > 0) {
919 u_long mcr;
920 SMC_SELECT_BANK(0);
921 mir = inw(ioaddr + MEMINFO) & 0xff;
922 if (mir == 0xff) mir++;
923 /* Get scale factor for memory size */
924 mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200;
925 mir *= 128 * (1<<((mcr >> 9) & 7));
926 SMC_SELECT_BANK(1);
927 smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT;
928 smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC;
929 if (smc->manfid == MANFID_OSITECH)
930 smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0;
931 if ((rev >> 4) >= 7)
932 smc->cfg |= CFG_MII_SELECT;
933 } else
934 mir = 0;
935
936 if (smc->cfg & CFG_MII_SELECT) {
937 SMC_SELECT_BANK(3);
938
939 for (i = 0; i < 32; i++) {
940 j = mdio_read(dev, i, 1);
941 if ((j != 0) && (j != 0xffff)) break;
942 }
943 smc->mii_if.phy_id = (i < 32) ? i : -1;
944
945 SMC_SELECT_BANK(0);
946 }
947
dd2e5a15 948 SET_NETDEV_DEV(dev, &link->dev);
1da177e4
LT		 949
950 if (register_netdev(dev) != 0) {
951 printk(KERN_ERR "smc91c92_cs: register_netdev() failed\n");
1da177e4
LT		 952 goto config_undo;
953 }
954
1da177e4 955 printk(KERN_INFO "%s: smc91c%s rev %d: io %#3lx, irq %d, "
e174961c 956 "hw_addr %pM\n",
0795af57 957 dev->name, name, (rev & 0x0f), dev->base_addr, dev->irq,
e174961c 958 dev->dev_addr);
1da177e4
LT		 959
960 if (rev > 0) {
961 if (mir & 0x3ff)
962 printk(KERN_INFO " %lu byte", mir);
963 else
964 printk(KERN_INFO " %lu kb", mir>>10);
965 printk(" buffer, %s xcvr\n", (smc->cfg & CFG_MII_SELECT) ?
966 "MII" : if_names[dev->if_port]);
967 }
968
969 if (smc->cfg & CFG_MII_SELECT) {
970 if (smc->mii_if.phy_id != -1) {
dd0fab5b 971 dev_dbg(&link->dev, " MII transceiver at index %d, status %x.\n",
1da177e4
LT		 972 smc->mii_if.phy_id, j);
973 } else {
974 printk(KERN_NOTICE " No MII transceivers found!\n");
975 }
976 }
15b99ac1 977 return 0;
1da177e4
LT		 978
979config_undo:
980 unregister_netdev(dev);
dd0fab5b 981config_failed:
1da177e4 982 smc91c92_release(link);
fb9e2d88 983 free_netdev(dev);
15b99ac1 984 return -ENODEV;
1da177e4
LT		 985} /* smc91c92_config */
986
987/*======================================================================
988
989 After a card is removed, smc91c92_release() will unregister the net
990 device, and release the PCMCIA configuration. If the device is
991 still open, this will be postponed until it is closed.
992
993======================================================================*/
994
fba395ee 995static void smc91c92_release(struct pcmcia_device *link)
1da177e4 996{
dd0fab5b 997 dev_dbg(&link->dev, "smc91c92_release\n");
cdb13808 998 if (link->resource[2]->end) {
5f2a71fc
DB		 999 struct net_device *dev = link->priv;
1000 struct smc_private *smc = netdev_priv(dev);
1001 iounmap(smc->base);
1002 }
fba395ee 1003 pcmcia_disable_device(link);
1da177e4
LT		 1004}
1005
1da177e4
LT		 1006/*======================================================================
1007
1008 MII interface support for SMC91cXX based cards
1009======================================================================*/
1010
1011#define MDIO_SHIFT_CLK 0x04
1012#define MDIO_DATA_OUT 0x01
1013#define MDIO_DIR_WRITE 0x08
1014#define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE)
1015#define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT)
1016#define MDIO_DATA_READ 0x02
1017
906da809 1018static void mdio_sync(unsigned int addr)
1da177e4
LT		 1019{
1020 int bits;
1021 for (bits = 0; bits < 32; bits++) {
1022 outb(MDIO_DATA_WRITE1, addr);
1023 outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr);
1024 }
1025}
1026
1027static int mdio_read(struct net_device *dev, int phy_id, int loc)
1028{
906da809 1029 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT		 1030 u_int cmd = (0x06<<10)|(phy_id<<5)|loc;
1031 int i, retval = 0;
1032
1033 mdio_sync(addr);
1034 for (i = 13; i >= 0; i--) {
1035 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1036 outb(dat, addr);
1037 outb(dat | MDIO_SHIFT_CLK, addr);
1038 }
1039 for (i = 19; i > 0; i--) {
1040 outb(0, addr);
1041 retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0);
1042 outb(MDIO_SHIFT_CLK, addr);
1043 }
1044 return (retval>>1) & 0xffff;
1045}
1046
1047static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
1048{
906da809 1049 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT		 1050 u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
1051 int i;
1052
1053 mdio_sync(addr);
1054 for (i = 31; i >= 0; i--) {
1055 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1056 outb(dat, addr);
1057 outb(dat | MDIO_SHIFT_CLK, addr);
1058 }
1059 for (i = 1; i >= 0; i--) {
1060 outb(0, addr);
1061 outb(MDIO_SHIFT_CLK, addr);
1062 }
1063}
1064
1065/*======================================================================
1066
1067 The driver core code, most of which should be common with a
1068 non-PCMCIA implementation.
1069
1070======================================================================*/
1071
1072#ifdef PCMCIA_DEBUG
1073static void smc_dump(struct net_device *dev)
1074{
906da809 1075 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1076 u_short i, w, save;
1077 save = inw(ioaddr + BANK_SELECT);
1078 for (w = 0; w < 4; w++) {
1079 SMC_SELECT_BANK(w);
1080 printk(KERN_DEBUG "bank %d: ", w);
1081 for (i = 0; i < 14; i += 2)
1082 printk(" %04x", inw(ioaddr + i));
1083 printk("\n");
1084 }
1085 outw(save, ioaddr + BANK_SELECT);
1086}
1087#endif
1088
1089static int smc_open(struct net_device *dev)
1090{
1091 struct smc_private *smc = netdev_priv(dev);
fba395ee 1092 struct pcmcia_device *link = smc->p_dev;
1da177e4 1093
dd0fab5b 1094 dev_dbg(&link->dev, "%s: smc_open(%p), ID/Window %4.4x.\n",
1da177e4 1095 dev->name, dev, inw(dev->base_addr + BANK_SELECT));
dd0fab5b
DB		 1096#ifdef PCMCIA_DEBUG
1097 smc_dump(dev);
1da177e4
LT		 1098#endif
1099
1100 /* Check that the PCMCIA card is still here. */
9940ec36 1101 if (!pcmcia_dev_present(link))
1da177e4
LT		 1102 return -ENODEV;
1103 /* Physical device present signature. */
1104 if (check_sig(link) < 0) {
1105 printk("smc91c92_cs: Yikes! Bad chip signature!\n");
1106 return -ENODEV;
1107 }
1108 link->open++;
1109
1110 netif_start_queue(dev);
1111 smc->saved_skb = NULL;
1112 smc->packets_waiting = 0;
1113
1114 smc_reset(dev);
1115 init_timer(&smc->media);
1116 smc->media.function = &media_check;
1117 smc->media.data = (u_long) dev;
1118 smc->media.expires = jiffies + HZ;
1119 add_timer(&smc->media);
1120
1121 return 0;
1122} /* smc_open */
1123
1124/*====================================================================*/
1125
1126static int smc_close(struct net_device *dev)
1127{
1128 struct smc_private *smc = netdev_priv(dev);
fba395ee 1129 struct pcmcia_device *link = smc->p_dev;
906da809 1130 unsigned int ioaddr = dev->base_addr;
1da177e4 1131
dd0fab5b 1132 dev_dbg(&link->dev, "%s: smc_close(), status %4.4x.\n",
1da177e4
LT		 1133 dev->name, inw(ioaddr + BANK_SELECT));
1134
1135 netif_stop_queue(dev);
1136
1137 /* Shut off all interrupts, and turn off the Tx and Rx sections.
1138 Don't bother to check for chip present. */
1139 SMC_SELECT_BANK(2); /* Nominally paranoia, but do no assume... */
1140 outw(0, ioaddr + INTERRUPT);
1141 SMC_SELECT_BANK(0);
1142 mask_bits(0xff00, ioaddr + RCR);
1143 mask_bits(0xff00, ioaddr + TCR);
1144
1145 /* Put the chip into power-down mode. */
1146 SMC_SELECT_BANK(1);
1147 outw(CTL_POWERDOWN, ioaddr + CONTROL );
1148
1149 link->open--;
1150 del_timer_sync(&smc->media);
1151
1152 return 0;
1153} /* smc_close */
1154
1155/*======================================================================
1156
1157 Transfer a packet to the hardware and trigger the packet send.
1158 This may be called at either from either the Tx queue code
1159 or the interrupt handler.
1160
1161======================================================================*/
1162
1163static void smc_hardware_send_packet(struct net_device * dev)
1164{
1165 struct smc_private *smc = netdev_priv(dev);
1166 struct sk_buff *skb = smc->saved_skb;
906da809 1167 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1168 u_char packet_no;
1169
1170 if (!skb) {
1171 printk(KERN_ERR "%s: In XMIT with no packet to send.\n", dev->name);
1172 return;
1173 }
1174
1175 /* There should be a packet slot waiting. */
1176 packet_no = inw(ioaddr + PNR_ARR) >> 8;
1177 if (packet_no & 0x80) {
1178 /* If not, there is a hardware problem! Likely an ejected card. */
1179 printk(KERN_WARNING "%s: 91c92 hardware Tx buffer allocation"
1180 " failed, status %#2.2x.\n", dev->name, packet_no);
1181 dev_kfree_skb_irq(skb);
1182 smc->saved_skb = NULL;
1183 netif_start_queue(dev);
1184 return;
1185 }
1186
6fb7298c 1187 dev->stats.tx_bytes += skb->len;
1da177e4
LT		 1188 /* The card should use the just-allocated buffer. */
1189 outw(packet_no, ioaddr + PNR_ARR);
1190 /* point to the beginning of the packet */
1191 outw(PTR_AUTOINC , ioaddr + POINTER);
1192
1193 /* Send the packet length (+6 for status, length and ctl byte)
1194 and the status word (set to zeros). */
1195 {
1196 u_char *buf = skb->data;
1197 u_int length = skb->len; /* The chip will pad to ethernet min. */
1198
dd0fab5b 1199 pr_debug("%s: Trying to xmit packet of length %d.\n",
1da177e4
LT		 1200 dev->name, length);
1201
1202 /* send the packet length: +6 for status word, length, and ctl */
1203 outw(0, ioaddr + DATA_1);
1204 outw(length + 6, ioaddr + DATA_1);
1205 outsw(ioaddr + DATA_1, buf, length >> 1);
1206
1207 /* The odd last byte, if there is one, goes in the control word. */
1208 outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1);
1209 }
1210
1211 /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */
1212 outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) |
1213 (inw(ioaddr + INTERRUPT) & 0xff00),
1214 ioaddr + INTERRUPT);
1215
1216 /* The chip does the rest of the work. */
1217 outw(MC_ENQUEUE , ioaddr + MMU_CMD);
1218
1219 smc->saved_skb = NULL;
1220 dev_kfree_skb_irq(skb);
1221 dev->trans_start = jiffies;
1222 netif_start_queue(dev);
1da177e4
LT		 1223}
1224
1225/*====================================================================*/
1226
1227static void smc_tx_timeout(struct net_device *dev)
1228{
1229 struct smc_private *smc = netdev_priv(dev);
906da809 1230 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1231
1232 printk(KERN_NOTICE "%s: SMC91c92 transmit timed out, "
1233 "Tx_status %2.2x status %4.4x.\n",
1234 dev->name, inw(ioaddr)&0xff, inw(ioaddr + 2));
6fb7298c 1235 dev->stats.tx_errors++;
1da177e4 1236 smc_reset(dev);
1ae5dc34 1237 dev->trans_start = jiffies; /* prevent tx timeout */
1da177e4
LT		 1238 smc->saved_skb = NULL;
1239 netif_wake_queue(dev);
1240}
1241
dbf02fae
SH		 1242static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
1243 struct net_device *dev)
1da177e4
LT		 1244{
1245 struct smc_private *smc = netdev_priv(dev);
906da809 1246 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1247 u_short num_pages;
1248 short time_out, ir;
85e27831 1249 unsigned long flags;
1da177e4
LT		 1250
1251 netif_stop_queue(dev);
1252
dd0fab5b 1253 pr_debug("%s: smc_start_xmit(length = %d) called,"
1da177e4
LT		 1254 " status %4.4x.\n", dev->name, skb->len, inw(ioaddr + 2));
1255
1256 if (smc->saved_skb) {
1257 /* THIS SHOULD NEVER HAPPEN. */
6fb7298c 1258 dev->stats.tx_aborted_errors++;
1da177e4
LT		 1259 printk(KERN_DEBUG "%s: Internal error -- sent packet while busy.\n",
1260 dev->name);
5b548140 1261 return NETDEV_TX_BUSY;
1da177e4
LT		 1262 }
1263 smc->saved_skb = skb;
1264
1265 num_pages = skb->len >> 8;
1266
1267 if (num_pages > 7) {
1268 printk(KERN_ERR "%s: Far too big packet error.\n", dev->name);
1269 dev_kfree_skb (skb);
1270 smc->saved_skb = NULL;
6fb7298c 1271 dev->stats.tx_dropped++;
6ed10654 1272 return NETDEV_TX_OK; /* Do not re-queue this packet. */
1da177e4
LT		 1273 }
1274 /* A packet is now waiting. */
1275 smc->packets_waiting++;
1276
85e27831 1277 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 1278 SMC_SELECT_BANK(2); /* Paranoia, we should always be in window 2 */
1279
1280 /* need MC_RESET to keep the memory consistent. errata? */
1281 if (smc->rx_ovrn) {
1282 outw(MC_RESET, ioaddr + MMU_CMD);
1283 smc->rx_ovrn = 0;
1284 }
1285
1286 /* Allocate the memory; send the packet now if we win. */
1287 outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD);
1288 for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) {
1289 ir = inw(ioaddr+INTERRUPT);
1290 if (ir & IM_ALLOC_INT) {
1291 /* Acknowledge the interrupt, send the packet. */
1292 outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT);
1293 smc_hardware_send_packet(dev); /* Send the packet now.. */
85e27831 1294 spin_unlock_irqrestore(&smc->lock, flags);
6ed10654 1295 return NETDEV_TX_OK;
1da177e4
LT		 1296 }
1297 }
1298
1299 /* Otherwise defer until the Tx-space-allocated interrupt. */
dd0fab5b 1300 pr_debug("%s: memory allocation deferred.\n", dev->name);
1da177e4 1301 outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT);
85e27831 1302 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4 1303
6ed10654 1304 return NETDEV_TX_OK;
1da177e4
LT		 1305}
1306
1307/*======================================================================
1308
1309 Handle a Tx anomolous event. Entered while in Window 2.
1310
1311======================================================================*/
1312
1313static void smc_tx_err(struct net_device * dev)
1314{
1315 struct smc_private *smc = netdev_priv(dev);
906da809 1316 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1317 int saved_packet = inw(ioaddr + PNR_ARR) & 0xff;
1318 int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f;
1319 int tx_status;
1320
1321 /* select this as the packet to read from */
1322 outw(packet_no, ioaddr + PNR_ARR);
1323
1324 /* read the first word from this packet */
1325 outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER);
1326
1327 tx_status = inw(ioaddr + DATA_1);
1328
6fb7298c
SH		 1329 dev->stats.tx_errors++;
1330 if (tx_status & TS_LOSTCAR) dev->stats.tx_carrier_errors++;
1331 if (tx_status & TS_LATCOL) dev->stats.tx_window_errors++;
1da177e4 1332 if (tx_status & TS_16COL) {
6fb7298c 1333 dev->stats.tx_aborted_errors++;
1da177e4
LT		 1334 smc->tx_err++;
1335 }
1336
1337 if (tx_status & TS_SUCCESS) {
1338 printk(KERN_NOTICE "%s: Successful packet caused error "
1339 "interrupt?\n", dev->name);
1340 }
1341 /* re-enable transmit */
1342 SMC_SELECT_BANK(0);
1343 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1344 SMC_SELECT_BANK(2);
1345
1346 outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */
1347
1348 /* one less packet waiting for me */
1349 smc->packets_waiting--;
1350
1351 outw(saved_packet, ioaddr + PNR_ARR);
1da177e4
LT		 1352}
1353
1354/*====================================================================*/
1355
1356static void smc_eph_irq(struct net_device *dev)
1357{
1358 struct smc_private *smc = netdev_priv(dev);
906da809 1359 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1360 u_short card_stats, ephs;
1361
1362 SMC_SELECT_BANK(0);
1363 ephs = inw(ioaddr + EPH);
dd0fab5b 1364 pr_debug("%s: Ethernet protocol handler interrupt, status"
1da177e4
LT		 1365 " %4.4x.\n", dev->name, ephs);
1366 /* Could be a counter roll-over warning: update stats. */
1367 card_stats = inw(ioaddr + COUNTER);
1368 /* single collisions */
6fb7298c 1369 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT		 1370 card_stats >>= 4;
1371 /* multiple collisions */
6fb7298c 1372 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT		 1373#if 0 /* These are for when linux supports these statistics */
1374 card_stats >>= 4; /* deferred */
1375 card_stats >>= 4; /* excess deferred */
1376#endif
1377 /* If we had a transmit error we must re-enable the transmitter. */
1378 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1379
1380 /* Clear a link error interrupt. */
1381 SMC_SELECT_BANK(1);
1382 outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL);
1383 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1384 ioaddr + CONTROL);
1385 SMC_SELECT_BANK(2);
1386}
1387
1388/*====================================================================*/
1389
7d12e780 1390static irqreturn_t smc_interrupt(int irq, void *dev_id)
1da177e4
LT		 1391{
1392 struct net_device *dev = dev_id;
1393 struct smc_private *smc = netdev_priv(dev);
906da809 1394 unsigned int ioaddr;
1da177e4
LT		 1395 u_short saved_bank, saved_pointer, mask, status;
1396 unsigned int handled = 1;
1397 char bogus_cnt = INTR_WORK; /* Work we are willing to do. */
1398
1399 if (!netif_device_present(dev))
1400 return IRQ_NONE;
1401
1402 ioaddr = dev->base_addr;
1403
dd0fab5b 1404 pr_debug("%s: SMC91c92 interrupt %d at %#x.\n", dev->name,
1da177e4
LT		 1405 irq, ioaddr);
1406
85e27831 1407 spin_lock(&smc->lock);
1da177e4
LT		 1408 smc->watchdog = 0;
1409 saved_bank = inw(ioaddr + BANK_SELECT);
1410 if ((saved_bank & 0xff00) != 0x3300) {
1411 /* The device does not exist -- the card could be off-line, or
1412 maybe it has been ejected. */
dd0fab5b 1413 pr_debug("%s: SMC91c92 interrupt %d for non-existent"
1da177e4
LT		 1414 "/ejected device.\n", dev->name, irq);
1415 handled = 0;
1416 goto irq_done;
1417 }
1418
1419 SMC_SELECT_BANK(2);
1420 saved_pointer = inw(ioaddr + POINTER);
1421 mask = inw(ioaddr + INTERRUPT) >> 8;
1422 /* clear all interrupts */
1423 outw(0, ioaddr + INTERRUPT);
1424
1425 do { /* read the status flag, and mask it */
1426 status = inw(ioaddr + INTERRUPT) & 0xff;
dd0fab5b 1427 pr_debug("%s: Status is %#2.2x (mask %#2.2x).\n", dev->name,
1da177e4
LT		 1428 status, mask);
1429 if ((status & mask) == 0) {
1430 if (bogus_cnt == INTR_WORK)
1431 handled = 0;
1432 break;
1433 }
1434 if (status & IM_RCV_INT) {
1435 /* Got a packet(s). */
1436 smc_rx(dev);
1437 }
1438 if (status & IM_TX_INT) {
1439 smc_tx_err(dev);
1440 outw(IM_TX_INT, ioaddr + INTERRUPT);
1441 }
1442 status &= mask;
1443 if (status & IM_TX_EMPTY_INT) {
1444 outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT);
1445 mask &= ~IM_TX_EMPTY_INT;
6fb7298c 1446 dev->stats.tx_packets += smc->packets_waiting;
1da177e4
LT		 1447 smc->packets_waiting = 0;
1448 }
1449 if (status & IM_ALLOC_INT) {
1450 /* Clear this interrupt so it doesn't happen again */
1451 mask &= ~IM_ALLOC_INT;
1452
1453 smc_hardware_send_packet(dev);
1454
1455 /* enable xmit interrupts based on this */
1456 mask |= (IM_TX_EMPTY_INT | IM_TX_INT);
1457
1458 /* and let the card send more packets to me */
1459 netif_wake_queue(dev);
1460 }
1461 if (status & IM_RX_OVRN_INT) {
6fb7298c
SH		 1462 dev->stats.rx_errors++;
1463 dev->stats.rx_fifo_errors++;
1da177e4
LT		 1464 if (smc->duplex)
1465 smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */
1466 outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT);
1467 }
1468 if (status & IM_EPH_INT)
1469 smc_eph_irq(dev);
1470 } while (--bogus_cnt);
1471
dd0fab5b 1472 pr_debug(" Restoring saved registers mask %2.2x bank %4.4x"
1da177e4
LT		 1473 " pointer %4.4x.\n", mask, saved_bank, saved_pointer);
1474
1475 /* restore state register */
1476 outw((mask<<8), ioaddr + INTERRUPT);
1477 outw(saved_pointer, ioaddr + POINTER);
1478 SMC_SELECT_BANK(saved_bank);
1479
dd0fab5b 1480 pr_debug("%s: Exiting interrupt IRQ%d.\n", dev->name, irq);
1da177e4
LT		 1481
1482irq_done:
1483
1484 if ((smc->manfid == MANFID_OSITECH) &&
1485 (smc->cardid != PRODID_OSITECH_SEVEN)) {
1486 /* Retrigger interrupt if needed */
1487 mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR);
1488 set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR);
1489 }
1490 if (smc->manfid == MANFID_MOTOROLA) {
1491 u_char cor;
1492 cor = readb(smc->base + MOT_UART + CISREG_COR);
1493 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR);
1494 writeb(cor, smc->base + MOT_UART + CISREG_COR);
1495 cor = readb(smc->base + MOT_LAN + CISREG_COR);
1496 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR);
1497 writeb(cor, smc->base + MOT_LAN + CISREG_COR);
1498 }
9735b7ef
KK		 1499
1500 if ((smc->base != NULL) && /* Megahertz MFC's */
1501 (smc->manfid == MANFID_MEGAHERTZ) &&
1502 (smc->cardid == PRODID_MEGAHERTZ_EM3288)) {
1503
1504 u_char tmp;
1505 tmp = readb(smc->base+MEGAHERTZ_ISR);
1506 tmp = readb(smc->base+MEGAHERTZ_ISR);
1507
1508 /* Retrigger interrupt if needed */
1509 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1510 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1da177e4 1511 }
9735b7ef 1512
85e27831 1513 spin_unlock(&smc->lock);
1da177e4
LT		 1514 return IRQ_RETVAL(handled);
1515}
1516
1517/*====================================================================*/
1518
1519static void smc_rx(struct net_device *dev)
1520{
906da809 1521 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1522 int rx_status;
1523 int packet_length; /* Caution: not frame length, rather words
1524 to transfer from the chip. */
1525
1526 /* Assertion: we are in Window 2. */
1527
1528 if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) {
1529 printk(KERN_ERR "%s: smc_rx() with nothing on Rx FIFO.\n",
1530 dev->name);
1531 return;
1532 }
1533
1534 /* Reset the read pointer, and read the status and packet length. */
1535 outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER);
1536 rx_status = inw(ioaddr + DATA_1);
1537 packet_length = inw(ioaddr + DATA_1) & 0x07ff;
1538
dd0fab5b 1539 pr_debug("%s: Receive status %4.4x length %d.\n",
1da177e4
LT		 1540 dev->name, rx_status, packet_length);
1541
1542 if (!(rx_status & RS_ERRORS)) {
1543 /* do stuff to make a new packet */
1544 struct sk_buff *skb;
1545
1546 /* Note: packet_length adds 5 or 6 extra bytes here! */
1547 skb = dev_alloc_skb(packet_length+2);
1548
1549 if (skb == NULL) {
dd0fab5b 1550 pr_debug("%s: Low memory, packet dropped.\n", dev->name);
6fb7298c 1551 dev->stats.rx_dropped++;
1da177e4
LT		 1552 outw(MC_RELEASE, ioaddr + MMU_CMD);
1553 return;
1554 }
1555
1556 packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6);
1557 skb_reserve(skb, 2);
1558 insw(ioaddr+DATA_1, skb_put(skb, packet_length),
1559 (packet_length+1)>>1);
1560 skb->protocol = eth_type_trans(skb, dev);
1561
1da177e4
LT		 1562 netif_rx(skb);
1563 dev->last_rx = jiffies;
6fb7298c
SH		 1564 dev->stats.rx_packets++;
1565 dev->stats.rx_bytes += packet_length;
1da177e4 1566 if (rx_status & RS_MULTICAST)
6fb7298c 1567 dev->stats.multicast++;
1da177e4
LT		 1568 } else {
1569 /* error ... */
6fb7298c 1570 dev->stats.rx_errors++;
1da177e4 1571
6fb7298c 1572 if (rx_status & RS_ALGNERR) dev->stats.rx_frame_errors++;
1da177e4 1573 if (rx_status & (RS_TOOSHORT | RS_TOOLONG))
6fb7298c
SH		 1574 dev->stats.rx_length_errors++;
1575 if (rx_status & RS_BADCRC) dev->stats.rx_crc_errors++;
1da177e4
LT		 1576 }
1577 /* Let the MMU free the memory of this packet. */
1578 outw(MC_RELEASE, ioaddr + MMU_CMD);
1da177e4
LT		 1579}
1580
1da177e4
LT		 1581/*======================================================================
1582
1583 Set the receive mode.
1584
1585 This routine is used by both the protocol level to notify us of
1586 promiscuous/multicast mode changes, and by the open/reset code to
1587 initialize the Rx registers. We always set the multicast list and
1588 leave the receiver running.
1589
1590======================================================================*/
1591
1592static void set_rx_mode(struct net_device *dev)
1593{
906da809 1594 unsigned int ioaddr = dev->base_addr;
1da177e4 1595 struct smc_private *smc = netdev_priv(dev);
a6d37024 1596 unsigned char multicast_table[8];
1da177e4
LT		 1597 unsigned long flags;
1598 u_short rx_cfg_setting;
a6d37024
KK		 1599 int i;
1600
1601 memset(multicast_table, 0, sizeof(multicast_table));
1da177e4
LT		 1602
1603 if (dev->flags & IFF_PROMISC) {
1da177e4
LT		 1604 rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti;
1605 } else if (dev->flags & IFF_ALLMULTI)
1606 rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti;
1607 else {
4cd24eaf 1608 if (!netdev_mc_empty(dev)) {
22bedad3 1609 struct netdev_hw_addr *ha;
91fea585 1610
22bedad3
JP		 1611 netdev_for_each_mc_addr(ha, dev) {
1612 u_int position = ether_crc(6, ha->addr);
91fea585
JP		 1613 multicast_table[position >> 29] |= 1 << ((position >> 26) & 7);
1614 }
1da177e4
LT		 1615 }
1616 rx_cfg_setting = RxStripCRC | RxEnable;
1617 }
1618
1619 /* Load MC table and Rx setting into the chip without interrupts. */
1620 spin_lock_irqsave(&smc->lock, flags);
1621 SMC_SELECT_BANK(3);
a6d37024
KK		 1622 for (i = 0; i < 8; i++)
1623 outb(multicast_table[i], ioaddr + MULTICAST0 + i);
1da177e4
LT		 1624 SMC_SELECT_BANK(0);
1625 outw(rx_cfg_setting, ioaddr + RCR);
1626 SMC_SELECT_BANK(2);
1627 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1628}
1629
1630/*======================================================================
1631
1632 Senses when a card's config changes. Here, it's coax or TP.
1633
1634======================================================================*/
1635
1636static int s9k_config(struct net_device *dev, struct ifmap *map)
1637{
1638 struct smc_private *smc = netdev_priv(dev);
1639 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1640 if (smc->cfg & CFG_MII_SELECT)
1641 return -EOPNOTSUPP;
1642 else if (map->port > 2)
1643 return -EINVAL;
1644 dev->if_port = map->port;
1645 printk(KERN_INFO "%s: switched to %s port\n",
1646 dev->name, if_names[dev->if_port]);
1647 smc_reset(dev);
1648 }
1649 return 0;
1650}
1651
1652/*======================================================================
1653
1654 Reset the chip, reloading every register that might be corrupted.
1655
1656======================================================================*/
1657
1658/*
1659 Set transceiver type, perhaps to something other than what the user
1660 specified in dev->if_port.
1661*/
1662static void smc_set_xcvr(struct net_device *dev, int if_port)
1663{
1664 struct smc_private *smc = netdev_priv(dev);
906da809 1665 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1666 u_short saved_bank;
1667
1668 saved_bank = inw(ioaddr + BANK_SELECT);
1669 SMC_SELECT_BANK(1);
1670 if (if_port == 2) {
1671 outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG);
1672 if ((smc->manfid == MANFID_OSITECH) &&
1673 (smc->cardid != PRODID_OSITECH_SEVEN))
1674 set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1675 smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002);
1676 } else {
1677 outw(smc->cfg, ioaddr + CONFIG);
1678 if ((smc->manfid == MANFID_OSITECH) &&
1679 (smc->cardid != PRODID_OSITECH_SEVEN))
1680 mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1681 smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001);
1682 }
1683 SMC_SELECT_BANK(saved_bank);
1684}
1685
1686static void smc_reset(struct net_device *dev)
1687{
906da809 1688 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1689 struct smc_private *smc = netdev_priv(dev);
1690 int i;
1691
dd0fab5b 1692 pr_debug("%s: smc91c92 reset called.\n", dev->name);
1da177e4
LT		 1693
1694 /* The first interaction must be a write to bring the chip out
1695 of sleep mode. */
1696 SMC_SELECT_BANK(0);
1697 /* Reset the chip. */
1698 outw(RCR_SOFTRESET, ioaddr + RCR);
1699 udelay(10);
1700
1701 /* Clear the transmit and receive configuration registers. */
1702 outw(RCR_CLEAR, ioaddr + RCR);
1703 outw(TCR_CLEAR, ioaddr + TCR);
1704
1705 /* Set the Window 1 control, configuration and station addr registers.
1706 No point in writing the I/O base register ;-> */
1707 SMC_SELECT_BANK(1);
d6e05edc 1708 /* Automatically release successfully transmitted packets,
1da177e4
LT		 1709 Accept link errors, counter and Tx error interrupts. */
1710 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1711 ioaddr + CONTROL);
1712 smc_set_xcvr(dev, dev->if_port);
1713 if ((smc->manfid == MANFID_OSITECH) &&
1714 (smc->cardid != PRODID_OSITECH_SEVEN))
1715 outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) |
1716 (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00),
1717 ioaddr - 0x10 + OSITECH_AUI_PWR);
1718
1719 /* Fill in the physical address. The databook is wrong about the order! */
1720 for (i = 0; i < 6; i += 2)
1721 outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i],
1722 ioaddr + ADDR0 + i);
1723
1724 /* Reset the MMU */
1725 SMC_SELECT_BANK(2);
1726 outw(MC_RESET, ioaddr + MMU_CMD);
1727 outw(0, ioaddr + INTERRUPT);
1728
1729 /* Re-enable the chip. */
1730 SMC_SELECT_BANK(0);
1731 outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) |
1732 TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR);
1733 set_rx_mode(dev);
1734
1735 if (smc->cfg & CFG_MII_SELECT) {
1736 SMC_SELECT_BANK(3);
1737
1738 /* Reset MII */
1739 mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000);
1740
1741 /* Advertise 100F, 100H, 10F, 10H */
1742 mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1);
1743
1744 /* Restart MII autonegotiation */
1745 mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000);
1746 mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200);
1747 }
1748
1749 /* Enable interrupts. */
1750 SMC_SELECT_BANK(2);
1751 outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8,
1752 ioaddr + INTERRUPT);
1753}
1754
1755/*======================================================================
1756
1757 Media selection timer routine
1758
1759======================================================================*/
1760
1761static void media_check(u_long arg)
1762{
1763 struct net_device *dev = (struct net_device *) arg;
1764 struct smc_private *smc = netdev_priv(dev);
906da809 1765 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1766 u_short i, media, saved_bank;
1767 u_short link;
85e27831
K		 1768 unsigned long flags;
1769
1770 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 1771
1772 saved_bank = inw(ioaddr + BANK_SELECT);
1773
1774 if (!netif_device_present(dev))
1775 goto reschedule;
1776
1777 SMC_SELECT_BANK(2);
1778
1779 /* need MC_RESET to keep the memory consistent. errata? */
1780 if (smc->rx_ovrn) {
1781 outw(MC_RESET, ioaddr + MMU_CMD);
1782 smc->rx_ovrn = 0;
1783 }
1784 i = inw(ioaddr + INTERRUPT);
1785 SMC_SELECT_BANK(0);
1786 media = inw(ioaddr + EPH) & EPH_LINK_OK;
1787 SMC_SELECT_BANK(1);
1788 media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1;
1789
2a915157
KK		 1790 SMC_SELECT_BANK(saved_bank);
1791 spin_unlock_irqrestore(&smc->lock, flags);
1792
1da177e4
LT		 1793 /* Check for pending interrupt with watchdog flag set: with
1794 this, we can limp along even if the interrupt is blocked */
1795 if (smc->watchdog++ && ((i>>8) & i)) {
1796 if (!smc->fast_poll)
1797 printk(KERN_INFO "%s: interrupt(s) dropped!\n", dev->name);
2a915157 1798 local_irq_save(flags);
e363d138 1799 smc_interrupt(dev->irq, dev);
2a915157 1800 local_irq_restore(flags);
1da177e4
LT		 1801 smc->fast_poll = HZ;
1802 }
1803 if (smc->fast_poll) {
1804 smc->fast_poll--;
1805 smc->media.expires = jiffies + HZ/100;
1806 add_timer(&smc->media);
1da177e4
LT		 1807 return;
1808 }
1809
2a915157
KK		 1810 spin_lock_irqsave(&smc->lock, flags);
1811
1812 saved_bank = inw(ioaddr + BANK_SELECT);
1813
1da177e4
LT		 1814 if (smc->cfg & CFG_MII_SELECT) {
1815 if (smc->mii_if.phy_id < 0)
1816 goto reschedule;
1817
1818 SMC_SELECT_BANK(3);
1819 link = mdio_read(dev, smc->mii_if.phy_id, 1);
1820 if (!link || (link == 0xffff)) {
1821 printk(KERN_INFO "%s: MII is missing!\n", dev->name);
1822 smc->mii_if.phy_id = -1;
1823 goto reschedule;
1824 }
1825
1826 link &= 0x0004;
1827 if (link != smc->link_status) {
1828 u_short p = mdio_read(dev, smc->mii_if.phy_id, 5);
1829 printk(KERN_INFO "%s: %s link beat\n", dev->name,
1830 (link) ? "found" : "lost");
1831 smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40))
1832 ? TCR_FDUPLX : 0);
1833 if (link) {
1834 printk(KERN_INFO "%s: autonegotiation complete: "
1835 "%sbaseT-%cD selected\n", dev->name,
1836 ((p & 0x0180) ? "100" : "10"),
1837 (smc->duplex ? 'F' : 'H'));
1838 }
1839 SMC_SELECT_BANK(0);
1840 outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR);
1841 smc->link_status = link;
1842 }
1843 goto reschedule;
1844 }
1845
1846 /* Ignore collisions unless we've had no rx's recently */
4851d3aa 1847 if (time_after(jiffies, dev->last_rx + HZ)) {
1da177e4
LT		 1848 if (smc->tx_err || (smc->media_status & EPH_16COL))
1849 media |= EPH_16COL;
1850 }
1851 smc->tx_err = 0;
1852
1853 if (media != smc->media_status) {
1854 if ((media & smc->media_status & 1) &&
1855 ((smc->media_status ^ media) & EPH_LINK_OK))
1856 printk(KERN_INFO "%s: %s link beat\n", dev->name,
1857 (smc->media_status & EPH_LINK_OK ? "lost" : "found"));
1858 else if ((media & smc->media_status & 2) &&
1859 ((smc->media_status ^ media) & EPH_16COL))
1860 printk(KERN_INFO "%s: coax cable %s\n", dev->name,
1861 (media & EPH_16COL ? "problem" : "ok"));
1862 if (dev->if_port == 0) {
1863 if (media & 1) {
1864 if (media & EPH_LINK_OK)
1865 printk(KERN_INFO "%s: flipped to 10baseT\n",
1866 dev->name);
1867 else
1868 smc_set_xcvr(dev, 2);
1869 } else {
1870 if (media & EPH_16COL)
1871 smc_set_xcvr(dev, 1);
1872 else
1873 printk(KERN_INFO "%s: flipped to 10base2\n",
1874 dev->name);
1875 }
1876 }
1877 smc->media_status = media;
1878 }
1879
1880reschedule:
1881 smc->media.expires = jiffies + HZ;
1882 add_timer(&smc->media);
1883 SMC_SELECT_BANK(saved_bank);
85e27831 1884 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1885}
1886
1887static int smc_link_ok(struct net_device *dev)
1888{
906da809 1889 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1890 struct smc_private *smc = netdev_priv(dev);
1891
1892 if (smc->cfg & CFG_MII_SELECT) {
1893 return mii_link_ok(&smc->mii_if);
1894 } else {
1895 SMC_SELECT_BANK(0);
1896 return inw(ioaddr + EPH) & EPH_LINK_OK;
1897 }
1898}
1899
1900static int smc_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1901{
1902 u16 tmp;
906da809 1903 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1904
1905 ecmd->supported = (SUPPORTED_TP | SUPPORTED_AUI |
1906 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full);
1907
1908 SMC_SELECT_BANK(1);
1909 tmp = inw(ioaddr + CONFIG);
1910 ecmd->port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP;
1911 ecmd->transceiver = XCVR_INTERNAL;
1912 ecmd->speed = SPEED_10;
1913 ecmd->phy_address = ioaddr + MGMT;
1914
1915 SMC_SELECT_BANK(0);
1916 tmp = inw(ioaddr + TCR);
1917 ecmd->duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF;
1918
1919 return 0;
1920}
1921
1922static int smc_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1923{
1924 u16 tmp;
906da809 1925 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1926
1927 if (ecmd->speed != SPEED_10)
1928 return -EINVAL;
1929 if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
1930 return -EINVAL;
1931 if (ecmd->port != PORT_TP && ecmd->port != PORT_AUI)
1932 return -EINVAL;
1933 if (ecmd->transceiver != XCVR_INTERNAL)
1934 return -EINVAL;
1935
1936 if (ecmd->port == PORT_AUI)
1937 smc_set_xcvr(dev, 1);
1938 else
1939 smc_set_xcvr(dev, 0);
1940
1941 SMC_SELECT_BANK(0);
1942 tmp = inw(ioaddr + TCR);
1943 if (ecmd->duplex == DUPLEX_FULL)
1944 tmp |= TCR_FDUPLX;
1945 else
1946 tmp &= ~TCR_FDUPLX;
1947 outw(tmp, ioaddr + TCR);
1948
1949 return 0;
1950}
1951
1952static int check_if_running(struct net_device *dev)
1953{
1954 if (!netif_running(dev))
1955 return -EINVAL;
1956 return 0;
1957}
1958
1959static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1960{
1961 strcpy(info->driver, DRV_NAME);
1962 strcpy(info->version, DRV_VERSION);
1963}
1964
1965static int smc_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1966{
1967 struct smc_private *smc = netdev_priv(dev);
906da809 1968 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1969 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1970 int ret;
2a915157 1971 unsigned long flags;
1da177e4 1972
2a915157 1973 spin_lock_irqsave(&smc->lock, flags);
85e27831 1974 SMC_SELECT_BANK(3);
1da177e4
LT		 1975 if (smc->cfg & CFG_MII_SELECT)
1976 ret = mii_ethtool_gset(&smc->mii_if, ecmd);
1977 else
1978 ret = smc_netdev_get_ecmd(dev, ecmd);
1da177e4 1979 SMC_SELECT_BANK(saved_bank);
2a915157 1980 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1981 return ret;
1982}
1983
1984static int smc_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1985{
1986 struct smc_private *smc = netdev_priv(dev);
906da809 1987 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1988 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1989 int ret;
2a915157 1990 unsigned long flags;
1da177e4 1991
2a915157 1992 spin_lock_irqsave(&smc->lock, flags);
85e27831 1993 SMC_SELECT_BANK(3);
1da177e4
LT		 1994 if (smc->cfg & CFG_MII_SELECT)
1995 ret = mii_ethtool_sset(&smc->mii_if, ecmd);
1996 else
1997 ret = smc_netdev_set_ecmd(dev, ecmd);
1da177e4 1998 SMC_SELECT_BANK(saved_bank);
2a915157 1999 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 2000 return ret;
2001}
2002
2003static u32 smc_get_link(struct net_device *dev)
2004{
2005 struct smc_private *smc = netdev_priv(dev);
906da809 2006 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 2007 u16 saved_bank = inw(ioaddr + BANK_SELECT);
2008 u32 ret;
2a915157 2009 unsigned long flags;
1da177e4 2010
2a915157 2011 spin_lock_irqsave(&smc->lock, flags);
85e27831 2012 SMC_SELECT_BANK(3);
1da177e4 2013 ret = smc_link_ok(dev);
1da177e4 2014 SMC_SELECT_BANK(saved_bank);
2a915157 2015 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 2016 return ret;
2017}
2018
1da177e4
LT		 2019static int smc_nway_reset(struct net_device *dev)
2020{
2021 struct smc_private *smc = netdev_priv(dev);
2022 if (smc->cfg & CFG_MII_SELECT) {
906da809 2023 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 2024 u16 saved_bank = inw(ioaddr + BANK_SELECT);
2025 int res;
2026
2027 SMC_SELECT_BANK(3);
2028 res = mii_nway_restart(&smc->mii_if);
2029 SMC_SELECT_BANK(saved_bank);
2030
2031 return res;
2032 } else
2033 return -EOPNOTSUPP;
2034}
2035
7282d491 2036static const struct ethtool_ops ethtool_ops = {
1da177e4
LT		 2037 .begin = check_if_running,
2038 .get_drvinfo = smc_get_drvinfo,
2039 .get_settings = smc_get_settings,
2040 .set_settings = smc_set_settings,
2041 .get_link = smc_get_link,
1da177e4
LT		 2042 .nway_reset = smc_nway_reset,
2043};
2044
2045static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
2046{
2047 struct smc_private *smc = netdev_priv(dev);
2048 struct mii_ioctl_data *mii = if_mii(rq);
2049 int rc = 0;
2050 u16 saved_bank;
906da809 2051 unsigned int ioaddr = dev->base_addr;
2a915157 2052 unsigned long flags;
1da177e4
LT		 2053
2054 if (!netif_running(dev))
2055 return -EINVAL;
2056
2a915157 2057 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 2058 saved_bank = inw(ioaddr + BANK_SELECT);
2059 SMC_SELECT_BANK(3);
2060 rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL);
2061 SMC_SELECT_BANK(saved_bank);
2a915157 2062 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 2063 return rc;
2064}
2065
5c672220
DB		 2066static struct pcmcia_device_id smc91c92_ids[] = {
2067 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501),
2068 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a),
2069 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63),
2070 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63),
2071 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef),
2072 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef),
2073 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c),
2074 PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e),
d277ad0e
K		 2075 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9),
2076 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed),
5c672220
DB		 2077 PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020),
2078 PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023),
2079 PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb),
2080 PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc),
2081 PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1),
2082 PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5),
2083 PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9),
2084 PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953),
2085 PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a),
d277ad0e
K		 2086 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314),
2087 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a),
5c672220
DB		 2088 PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc),
2089 PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9),
2090 PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d),
2091 /* These conflict with other cards! */
2092 /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */
2093 /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */
2094 PCMCIA_DEVICE_NULL,
2095};
2096MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids);
2097
1da177e4
LT		 2098static struct pcmcia_driver smc91c92_cs_driver = {
2099 .owner = THIS_MODULE,
2100 .drv = {
2101 .name = "smc91c92_cs",
2102 },
15b99ac1 2103 .probe = smc91c92_probe,
cc3b4866 2104 .remove = smc91c92_detach,
5c672220 2105 .id_table = smc91c92_ids,
98e4c28b
DB		 2106 .suspend = smc91c92_suspend,
2107 .resume = smc91c92_resume,
1da177e4
LT		 2108};
2109
2110static int __init init_smc91c92_cs(void)
2111{
2112 return pcmcia_register_driver(&smc91c92_cs_driver);
2113}
2114
2115static void __exit exit_smc91c92_cs(void)
2116{
2117 pcmcia_unregister_driver(&smc91c92_cs_driver);
1da177e4
LT		 2118}
2119
2120module_init(init_smc91c92_cs);
2121module_exit(exit_smc91c92_cs);
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