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2f53e904 1/* Framework for configuring and reading PHY devices
00db8189
AF
2 * Based on code in sungem_phy.c and gianfar_phy.c
3 *
4 * Author: Andy Fleming
5 *
6 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 7 * Copyright (c) 2006, 2007 Maciej W. Rozycki
00db8189
AF
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
8d242488
JP
15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
00db8189 18#include <linux/kernel.h>
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AF
19#include <linux/string.h>
20#include <linux/errno.h>
21#include <linux/unistd.h>
00db8189 22#include <linux/interrupt.h>
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AF
23#include <linux/delay.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/skbuff.h>
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AF
27#include <linux/mm.h>
28#include <linux/module.h>
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AF
29#include <linux/mii.h>
30#include <linux/ethtool.h>
31#include <linux/phy.h>
3c3070d7
MR
32#include <linux/timer.h>
33#include <linux/workqueue.h>
a59a4d19 34#include <linux/mdio.h>
2f53e904
SS
35#include <linux/io.h>
36#include <linux/uaccess.h>
60063497 37#include <linux/atomic.h>
2f53e904 38
00db8189 39#include <asm/irq.h>
00db8189 40
766d1d38
FF
41static const char *phy_speed_to_str(int speed)
42{
43 switch (speed) {
44 case SPEED_10:
45 return "10Mbps";
46 case SPEED_100:
47 return "100Mbps";
48 case SPEED_1000:
49 return "1Gbps";
50 case SPEED_2500:
51 return "2.5Gbps";
52 case SPEED_10000:
53 return "10Gbps";
54 case SPEED_UNKNOWN:
55 return "Unknown";
56 default:
57 return "Unsupported (update phy.c)";
58 }
59}
60
3e2186e0
FF
61#define PHY_STATE_STR(_state) \
62 case PHY_##_state: \
63 return __stringify(_state); \
64
65static const char *phy_state_to_str(enum phy_state st)
66{
67 switch (st) {
68 PHY_STATE_STR(DOWN)
69 PHY_STATE_STR(STARTING)
70 PHY_STATE_STR(READY)
71 PHY_STATE_STR(PENDING)
72 PHY_STATE_STR(UP)
73 PHY_STATE_STR(AN)
74 PHY_STATE_STR(RUNNING)
75 PHY_STATE_STR(NOLINK)
76 PHY_STATE_STR(FORCING)
77 PHY_STATE_STR(CHANGELINK)
78 PHY_STATE_STR(HALTED)
79 PHY_STATE_STR(RESUMING)
80 }
81
82 return NULL;
83}
84
85
b3df0da8
RD
86/**
87 * phy_print_status - Convenience function to print out the current phy status
88 * @phydev: the phy_device struct
e1393456
AF
89 */
90void phy_print_status(struct phy_device *phydev)
91{
2f53e904 92 if (phydev->link) {
df40cc88 93 netdev_info(phydev->attached_dev,
766d1d38
FF
94 "Link is Up - %s/%s - flow control %s\n",
95 phy_speed_to_str(phydev->speed),
df40cc88
FF
96 DUPLEX_FULL == phydev->duplex ? "Full" : "Half",
97 phydev->pause ? "rx/tx" : "off");
2f53e904 98 } else {
43b6329f 99 netdev_info(phydev->attached_dev, "Link is Down\n");
2f53e904 100 }
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AF
101}
102EXPORT_SYMBOL(phy_print_status);
00db8189 103
b3df0da8
RD
104/**
105 * phy_clear_interrupt - Ack the phy device's interrupt
106 * @phydev: the phy_device struct
107 *
108 * If the @phydev driver has an ack_interrupt function, call it to
109 * ack and clear the phy device's interrupt.
110 *
ad033506 111 * Returns 0 on success or < 0 on error.
b3df0da8 112 */
89ff05ec 113static int phy_clear_interrupt(struct phy_device *phydev)
00db8189 114{
00db8189 115 if (phydev->drv->ack_interrupt)
e62a768f 116 return phydev->drv->ack_interrupt(phydev);
00db8189 117
e62a768f 118 return 0;
00db8189
AF
119}
120
b3df0da8
RD
121/**
122 * phy_config_interrupt - configure the PHY device for the requested interrupts
123 * @phydev: the phy_device struct
124 * @interrupts: interrupt flags to configure for this @phydev
125 *
ad033506 126 * Returns 0 on success or < 0 on error.
b3df0da8 127 */
89ff05ec 128static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
00db8189 129{
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AF
130 phydev->interrupts = interrupts;
131 if (phydev->drv->config_intr)
e62a768f 132 return phydev->drv->config_intr(phydev);
00db8189 133
e62a768f 134 return 0;
00db8189
AF
135}
136
137
b3df0da8
RD
138/**
139 * phy_aneg_done - return auto-negotiation status
140 * @phydev: target phy_device struct
00db8189 141 *
76a423a3
FF
142 * Description: Return the auto-negotiation status from this @phydev
143 * Returns > 0 on success or < 0 on error. 0 means that auto-negotiation
144 * is still pending.
00db8189
AF
145 */
146static inline int phy_aneg_done(struct phy_device *phydev)
147{
76a423a3
FF
148 if (phydev->drv->aneg_done)
149 return phydev->drv->aneg_done(phydev);
150
a9fa6e6a 151 return genphy_aneg_done(phydev);
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AF
152}
153
00db8189 154/* A structure for mapping a particular speed and duplex
2f53e904
SS
155 * combination to a particular SUPPORTED and ADVERTISED value
156 */
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AF
157struct phy_setting {
158 int speed;
159 int duplex;
160 u32 setting;
161};
162
163/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 164static const struct phy_setting settings[] = {
00db8189 165 {
3e707706
LT
166 .speed = SPEED_10000,
167 .duplex = DUPLEX_FULL,
168 .setting = SUPPORTED_10000baseKR_Full,
169 },
170 {
171 .speed = SPEED_10000,
172 .duplex = DUPLEX_FULL,
173 .setting = SUPPORTED_10000baseKX4_Full,
174 },
175 {
176 .speed = SPEED_10000,
00db8189
AF
177 .duplex = DUPLEX_FULL,
178 .setting = SUPPORTED_10000baseT_Full,
179 },
3e707706
LT
180 {
181 .speed = SPEED_2500,
182 .duplex = DUPLEX_FULL,
183 .setting = SUPPORTED_2500baseX_Full,
184 },
185 {
186 .speed = SPEED_1000,
187 .duplex = DUPLEX_FULL,
188 .setting = SUPPORTED_1000baseKX_Full,
189 },
00db8189
AF
190 {
191 .speed = SPEED_1000,
192 .duplex = DUPLEX_FULL,
193 .setting = SUPPORTED_1000baseT_Full,
194 },
195 {
196 .speed = SPEED_1000,
197 .duplex = DUPLEX_HALF,
198 .setting = SUPPORTED_1000baseT_Half,
199 },
200 {
201 .speed = SPEED_100,
202 .duplex = DUPLEX_FULL,
203 .setting = SUPPORTED_100baseT_Full,
204 },
205 {
206 .speed = SPEED_100,
207 .duplex = DUPLEX_HALF,
208 .setting = SUPPORTED_100baseT_Half,
209 },
210 {
211 .speed = SPEED_10,
212 .duplex = DUPLEX_FULL,
213 .setting = SUPPORTED_10baseT_Full,
214 },
215 {
216 .speed = SPEED_10,
217 .duplex = DUPLEX_HALF,
218 .setting = SUPPORTED_10baseT_Half,
219 },
220};
221
ff8ac609 222#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 223
b3df0da8
RD
224/**
225 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
226 * @speed: speed to match
227 * @duplex: duplex to match
00db8189 228 *
b3df0da8 229 * Description: Searches the settings array for the setting which
00db8189
AF
230 * matches the desired speed and duplex, and returns the index
231 * of that setting. Returns the index of the last setting if
232 * none of the others match.
233 */
4ae6e50c 234static inline unsigned int phy_find_setting(int speed, int duplex)
00db8189 235{
4ae6e50c 236 unsigned int idx = 0;
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AF
237
238 while (idx < ARRAY_SIZE(settings) &&
2f53e904 239 (settings[idx].speed != speed || settings[idx].duplex != duplex))
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AF
240 idx++;
241
242 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
243}
244
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RD
245/**
246 * phy_find_valid - find a PHY setting that matches the requested features mask
247 * @idx: The first index in settings[] to search
248 * @features: A mask of the valid settings
00db8189 249 *
b3df0da8 250 * Description: Returns the index of the first valid setting less
00db8189
AF
251 * than or equal to the one pointed to by idx, as determined by
252 * the mask in features. Returns the index of the last setting
253 * if nothing else matches.
254 */
4ae6e50c 255static inline unsigned int phy_find_valid(unsigned int idx, u32 features)
00db8189
AF
256{
257 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
258 idx++;
259
260 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
261}
262
54da5a8b
GR
263/**
264 * phy_check_valid - check if there is a valid PHY setting which matches
265 * speed, duplex, and feature mask
266 * @speed: speed to match
267 * @duplex: duplex to match
268 * @features: A mask of the valid settings
269 *
270 * Description: Returns true if there is a valid setting, false otherwise.
271 */
272static inline bool phy_check_valid(int speed, int duplex, u32 features)
273{
274 unsigned int idx;
275
276 idx = phy_find_valid(phy_find_setting(speed, duplex), features);
277
278 return settings[idx].speed == speed && settings[idx].duplex == duplex &&
279 (settings[idx].setting & features);
280}
281
b3df0da8
RD
282/**
283 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
284 * @phydev: the target phy_device struct
00db8189 285 *
b3df0da8 286 * Description: Make sure the PHY is set to supported speeds and
00db8189 287 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 288 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 289 */
89ff05ec 290static void phy_sanitize_settings(struct phy_device *phydev)
00db8189
AF
291{
292 u32 features = phydev->supported;
4ae6e50c 293 unsigned int idx;
00db8189
AF
294
295 /* Sanitize settings based on PHY capabilities */
296 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 297 phydev->autoneg = AUTONEG_DISABLE;
00db8189
AF
298
299 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
300 features);
301
302 phydev->speed = settings[idx].speed;
303 phydev->duplex = settings[idx].duplex;
304}
00db8189 305
b3df0da8
RD
306/**
307 * phy_ethtool_sset - generic ethtool sset function, handles all the details
308 * @phydev: target phy_device struct
309 * @cmd: ethtool_cmd
00db8189
AF
310 *
311 * A few notes about parameter checking:
312 * - We don't set port or transceiver, so we don't care what they
313 * were set to.
314 * - phy_start_aneg() will make sure forced settings are sane, and
315 * choose the next best ones from the ones selected, so we don't
b3df0da8 316 * care if ethtool tries to give us bad values.
00db8189
AF
317 */
318int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
319{
25db0338
DD
320 u32 speed = ethtool_cmd_speed(cmd);
321
e5a03bfd 322 if (cmd->phy_address != phydev->mdio.addr)
00db8189
AF
323 return -EINVAL;
324
2f53e904 325 /* We make sure that we don't pass unsupported values in to the PHY */
00db8189
AF
326 cmd->advertising &= phydev->supported;
327
328 /* Verify the settings we care about. */
329 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
330 return -EINVAL;
331
332 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
333 return -EINVAL;
334
8e95a202 335 if (cmd->autoneg == AUTONEG_DISABLE &&
25db0338
DD
336 ((speed != SPEED_1000 &&
337 speed != SPEED_100 &&
338 speed != SPEED_10) ||
8e95a202
JP
339 (cmd->duplex != DUPLEX_HALF &&
340 cmd->duplex != DUPLEX_FULL)))
00db8189
AF
341 return -EINVAL;
342
343 phydev->autoneg = cmd->autoneg;
344
25db0338 345 phydev->speed = speed;
00db8189
AF
346
347 phydev->advertising = cmd->advertising;
348
349 if (AUTONEG_ENABLE == cmd->autoneg)
350 phydev->advertising |= ADVERTISED_Autoneg;
351 else
352 phydev->advertising &= ~ADVERTISED_Autoneg;
353
354 phydev->duplex = cmd->duplex;
355
634ec36c
DT
356 phydev->mdix = cmd->eth_tp_mdix_ctrl;
357
00db8189
AF
358 /* Restart the PHY */
359 phy_start_aneg(phydev);
360
361 return 0;
362}
9f6d55d0 363EXPORT_SYMBOL(phy_ethtool_sset);
00db8189 364
2d55173e
PR
365int phy_ethtool_ksettings_set(struct phy_device *phydev,
366 const struct ethtool_link_ksettings *cmd)
367{
368 u8 autoneg = cmd->base.autoneg;
369 u8 duplex = cmd->base.duplex;
370 u32 speed = cmd->base.speed;
371 u32 advertising;
372
373 if (cmd->base.phy_address != phydev->mdio.addr)
374 return -EINVAL;
375
376 ethtool_convert_link_mode_to_legacy_u32(&advertising,
377 cmd->link_modes.advertising);
378
379 /* We make sure that we don't pass unsupported values in to the PHY */
380 advertising &= phydev->supported;
381
382 /* Verify the settings we care about. */
383 if (autoneg != AUTONEG_ENABLE && autoneg != AUTONEG_DISABLE)
384 return -EINVAL;
385
386 if (autoneg == AUTONEG_ENABLE && advertising == 0)
387 return -EINVAL;
388
389 if (autoneg == AUTONEG_DISABLE &&
390 ((speed != SPEED_1000 &&
391 speed != SPEED_100 &&
392 speed != SPEED_10) ||
393 (duplex != DUPLEX_HALF &&
394 duplex != DUPLEX_FULL)))
395 return -EINVAL;
396
397 phydev->autoneg = autoneg;
398
399 phydev->speed = speed;
400
401 phydev->advertising = advertising;
402
403 if (autoneg == AUTONEG_ENABLE)
404 phydev->advertising |= ADVERTISED_Autoneg;
405 else
406 phydev->advertising &= ~ADVERTISED_Autoneg;
407
408 phydev->duplex = duplex;
409
410 phydev->mdix = cmd->base.eth_tp_mdix_ctrl;
411
412 /* Restart the PHY */
413 phy_start_aneg(phydev);
414
415 return 0;
416}
417EXPORT_SYMBOL(phy_ethtool_ksettings_set);
418
00db8189
AF
419int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
420{
421 cmd->supported = phydev->supported;
422
423 cmd->advertising = phydev->advertising;
114002bc 424 cmd->lp_advertising = phydev->lp_advertising;
00db8189 425
70739497 426 ethtool_cmd_speed_set(cmd, phydev->speed);
00db8189 427 cmd->duplex = phydev->duplex;
c88838ce
FF
428 if (phydev->interface == PHY_INTERFACE_MODE_MOCA)
429 cmd->port = PORT_BNC;
430 else
431 cmd->port = PORT_MII;
e5a03bfd 432 cmd->phy_address = phydev->mdio.addr;
4284b6a5
FF
433 cmd->transceiver = phy_is_internal(phydev) ?
434 XCVR_INTERNAL : XCVR_EXTERNAL;
00db8189 435 cmd->autoneg = phydev->autoneg;
239aa55b 436 cmd->eth_tp_mdix_ctrl = phydev->mdix;
00db8189
AF
437
438 return 0;
439}
9f6d55d0 440EXPORT_SYMBOL(phy_ethtool_gset);
2d55173e
PR
441
442int phy_ethtool_ksettings_get(struct phy_device *phydev,
443 struct ethtool_link_ksettings *cmd)
444{
445 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
446 phydev->supported);
447
448 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
449 phydev->advertising);
450
451 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.lp_advertising,
452 phydev->lp_advertising);
453
454 cmd->base.speed = phydev->speed;
455 cmd->base.duplex = phydev->duplex;
456 if (phydev->interface == PHY_INTERFACE_MODE_MOCA)
457 cmd->base.port = PORT_BNC;
458 else
459 cmd->base.port = PORT_MII;
460
461 cmd->base.phy_address = phydev->mdio.addr;
462 cmd->base.autoneg = phydev->autoneg;
463 cmd->base.eth_tp_mdix_ctrl = phydev->mdix;
464
465 return 0;
466}
467EXPORT_SYMBOL(phy_ethtool_ksettings_get);
00db8189 468
b3df0da8
RD
469/**
470 * phy_mii_ioctl - generic PHY MII ioctl interface
471 * @phydev: the phy_device struct
00c7d920 472 * @ifr: &struct ifreq for socket ioctl's
b3df0da8
RD
473 * @cmd: ioctl cmd to execute
474 *
475 * Note that this function is currently incompatible with the
00db8189 476 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 477 * current state. Use at own risk.
00db8189 478 */
2f53e904 479int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd)
00db8189 480{
28b04113 481 struct mii_ioctl_data *mii_data = if_mii(ifr);
00db8189 482 u16 val = mii_data->val_in;
79ce0477 483 bool change_autoneg = false;
00db8189
AF
484
485 switch (cmd) {
486 case SIOCGMIIPHY:
e5a03bfd 487 mii_data->phy_id = phydev->mdio.addr;
c6d6a511
LB
488 /* fall through */
489
00db8189 490 case SIOCGMIIREG:
e5a03bfd
AL
491 mii_data->val_out = mdiobus_read(phydev->mdio.bus,
492 mii_data->phy_id,
af1dc13e 493 mii_data->reg_num);
e62a768f 494 return 0;
00db8189
AF
495
496 case SIOCSMIIREG:
e5a03bfd 497 if (mii_data->phy_id == phydev->mdio.addr) {
e109374f 498 switch (mii_data->reg_num) {
00db8189 499 case MII_BMCR:
79ce0477
BH
500 if ((val & (BMCR_RESET | BMCR_ANENABLE)) == 0) {
501 if (phydev->autoneg == AUTONEG_ENABLE)
502 change_autoneg = true;
00db8189 503 phydev->autoneg = AUTONEG_DISABLE;
79ce0477
BH
504 if (val & BMCR_FULLDPLX)
505 phydev->duplex = DUPLEX_FULL;
506 else
507 phydev->duplex = DUPLEX_HALF;
508 if (val & BMCR_SPEED1000)
509 phydev->speed = SPEED_1000;
510 else if (val & BMCR_SPEED100)
511 phydev->speed = SPEED_100;
512 else phydev->speed = SPEED_10;
513 }
514 else {
515 if (phydev->autoneg == AUTONEG_DISABLE)
516 change_autoneg = true;
00db8189 517 phydev->autoneg = AUTONEG_ENABLE;
79ce0477 518 }
00db8189
AF
519 break;
520 case MII_ADVERTISE:
79ce0477
BH
521 phydev->advertising = mii_adv_to_ethtool_adv_t(val);
522 change_autoneg = true;
00db8189
AF
523 break;
524 default:
525 /* do nothing */
526 break;
527 }
528 }
529
e5a03bfd 530 mdiobus_write(phydev->mdio.bus, mii_data->phy_id,
af1dc13e
PK
531 mii_data->reg_num, val);
532
e5a03bfd 533 if (mii_data->phy_id == phydev->mdio.addr &&
cf18b778 534 mii_data->reg_num == MII_BMCR &&
2613f95f 535 val & BMCR_RESET)
e62a768f 536 return phy_init_hw(phydev);
79ce0477
BH
537
538 if (change_autoneg)
539 return phy_start_aneg(phydev);
540
e62a768f 541 return 0;
dda93b48 542
c1f19b51
RC
543 case SIOCSHWTSTAMP:
544 if (phydev->drv->hwtstamp)
545 return phydev->drv->hwtstamp(phydev, ifr);
546 /* fall through */
547
dda93b48 548 default:
c6d6a511 549 return -EOPNOTSUPP;
00db8189 550 }
00db8189 551}
680e9fe9 552EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 553
b3df0da8
RD
554/**
555 * phy_start_aneg - start auto-negotiation for this PHY device
556 * @phydev: the phy_device struct
e1393456 557 *
b3df0da8
RD
558 * Description: Sanitizes the settings (if we're not autonegotiating
559 * them), and then calls the driver's config_aneg function.
560 * If the PHYCONTROL Layer is operating, we change the state to
561 * reflect the beginning of Auto-negotiation or forcing.
e1393456
AF
562 */
563int phy_start_aneg(struct phy_device *phydev)
564{
565 int err;
566
35b5f6b1 567 mutex_lock(&phydev->lock);
e1393456
AF
568
569 if (AUTONEG_DISABLE == phydev->autoneg)
570 phy_sanitize_settings(phydev);
571
9b3320ef
BH
572 /* Invalidate LP advertising flags */
573 phydev->lp_advertising = 0;
574
e1393456 575 err = phydev->drv->config_aneg(phydev);
e1393456
AF
576 if (err < 0)
577 goto out_unlock;
578
579 if (phydev->state != PHY_HALTED) {
580 if (AUTONEG_ENABLE == phydev->autoneg) {
581 phydev->state = PHY_AN;
582 phydev->link_timeout = PHY_AN_TIMEOUT;
583 } else {
584 phydev->state = PHY_FORCING;
585 phydev->link_timeout = PHY_FORCE_TIMEOUT;
586 }
587 }
588
589out_unlock:
35b5f6b1 590 mutex_unlock(&phydev->lock);
e1393456
AF
591 return err;
592}
593EXPORT_SYMBOL(phy_start_aneg);
594
b3df0da8
RD
595/**
596 * phy_start_machine - start PHY state machine tracking
597 * @phydev: the phy_device struct
00db8189 598 *
b3df0da8 599 * Description: The PHY infrastructure can run a state machine
00db8189
AF
600 * which tracks whether the PHY is starting up, negotiating,
601 * etc. This function starts the timer which tracks the state
29935aeb
SS
602 * of the PHY. If you want to maintain your own state machine,
603 * do not call this function.
b3df0da8 604 */
29935aeb 605void phy_start_machine(struct phy_device *phydev)
00db8189 606{
bbb47bde 607 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
00db8189
AF
608}
609
3c293f4e
AL
610/**
611 * phy_trigger_machine - trigger the state machine to run
612 *
613 * @phydev: the phy_device struct
614 *
615 * Description: There has been a change in state which requires that the
616 * state machine runs.
617 */
618
619static void phy_trigger_machine(struct phy_device *phydev)
620{
621 cancel_delayed_work_sync(&phydev->state_queue);
622 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
623}
624
b3df0da8
RD
625/**
626 * phy_stop_machine - stop the PHY state machine tracking
627 * @phydev: target phy_device struct
00db8189 628 *
b3df0da8 629 * Description: Stops the state machine timer, sets the state to UP
817acf5e 630 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
631 * phy_detach.
632 */
633void phy_stop_machine(struct phy_device *phydev)
634{
a390d1f3 635 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 636
35b5f6b1 637 mutex_lock(&phydev->lock);
00db8189
AF
638 if (phydev->state > PHY_UP)
639 phydev->state = PHY_UP;
35b5f6b1 640 mutex_unlock(&phydev->lock);
00db8189
AF
641}
642
b3df0da8
RD
643/**
644 * phy_error - enter HALTED state for this PHY device
645 * @phydev: target phy_device struct
00db8189
AF
646 *
647 * Moves the PHY to the HALTED state in response to a read
648 * or write error, and tells the controller the link is down.
649 * Must not be called from interrupt context, or while the
650 * phydev->lock is held.
651 */
9b9a8bfc 652static void phy_error(struct phy_device *phydev)
00db8189 653{
35b5f6b1 654 mutex_lock(&phydev->lock);
00db8189 655 phydev->state = PHY_HALTED;
35b5f6b1 656 mutex_unlock(&phydev->lock);
3c293f4e
AL
657
658 phy_trigger_machine(phydev);
00db8189
AF
659}
660
b3df0da8
RD
661/**
662 * phy_interrupt - PHY interrupt handler
663 * @irq: interrupt line
664 * @phy_dat: phy_device pointer
e1393456 665 *
b3df0da8 666 * Description: When a PHY interrupt occurs, the handler disables
664fcf12 667 * interrupts, and uses phy_change to handle the interrupt.
e1393456 668 */
7d12e780 669static irqreturn_t phy_interrupt(int irq, void *phy_dat)
e1393456
AF
670{
671 struct phy_device *phydev = phy_dat;
672
3c3070d7
MR
673 if (PHY_HALTED == phydev->state)
674 return IRQ_NONE; /* It can't be ours. */
675
e1393456 676 disable_irq_nosync(irq);
0ac49527 677 atomic_inc(&phydev->irq_disable);
e1393456 678
664fcf12 679 phy_change(phydev);
e1393456
AF
680
681 return IRQ_HANDLED;
682}
683
b3df0da8
RD
684/**
685 * phy_enable_interrupts - Enable the interrupts from the PHY side
686 * @phydev: target phy_device struct
687 */
89ff05ec 688static int phy_enable_interrupts(struct phy_device *phydev)
00db8189 689{
553fe92b 690 int err = phy_clear_interrupt(phydev);
00db8189 691
e1393456
AF
692 if (err < 0)
693 return err;
00db8189 694
553fe92b 695 return phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189 696}
00db8189 697
b3df0da8
RD
698/**
699 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
700 * @phydev: target phy_device struct
701 */
89ff05ec 702static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
703{
704 int err;
705
706 /* Disable PHY interrupts */
707 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
00db8189
AF
708 if (err)
709 goto phy_err;
710
711 /* Clear the interrupt */
712 err = phy_clear_interrupt(phydev);
00db8189
AF
713 if (err)
714 goto phy_err;
715
716 return 0;
717
718phy_err:
719 phy_error(phydev);
720
721 return err;
722}
e1393456 723
b3df0da8
RD
724/**
725 * phy_start_interrupts - request and enable interrupts for a PHY device
726 * @phydev: target phy_device struct
e1393456 727 *
b3df0da8
RD
728 * Description: Request the interrupt for the given PHY.
729 * If this fails, then we set irq to PHY_POLL.
e1393456 730 * Otherwise, we enable the interrupts in the PHY.
e1393456 731 * This should only be called with a valid IRQ number.
b3df0da8 732 * Returns 0 on success or < 0 on error.
e1393456
AF
733 */
734int phy_start_interrupts(struct phy_device *phydev)
735{
0ac49527 736 atomic_set(&phydev->irq_disable, 0);
c974bdbc
AL
737 if (request_threaded_irq(phydev->irq, NULL, phy_interrupt,
738 IRQF_ONESHOT | IRQF_SHARED,
ae0219cb 739 phydev_name(phydev), phydev) < 0) {
8d242488 740 pr_warn("%s: Can't get IRQ %d (PHY)\n",
e5a03bfd 741 phydev->mdio.bus->name, phydev->irq);
e1393456
AF
742 phydev->irq = PHY_POLL;
743 return 0;
744 }
745
e62a768f 746 return phy_enable_interrupts(phydev);
e1393456
AF
747}
748EXPORT_SYMBOL(phy_start_interrupts);
749
b3df0da8
RD
750/**
751 * phy_stop_interrupts - disable interrupts from a PHY device
752 * @phydev: target phy_device struct
753 */
e1393456
AF
754int phy_stop_interrupts(struct phy_device *phydev)
755{
553fe92b 756 int err = phy_disable_interrupts(phydev);
e1393456
AF
757
758 if (err)
759 phy_error(phydev);
760
0ac49527
MR
761 free_irq(phydev->irq, phydev);
762
2f53e904 763 /* If work indeed has been cancelled, disable_irq() will have
0ac49527
MR
764 * been left unbalanced from phy_interrupt() and enable_irq()
765 * has to be called so that other devices on the line work.
766 */
767 while (atomic_dec_return(&phydev->irq_disable) >= 0)
768 enable_irq(phydev->irq);
e1393456
AF
769
770 return err;
771}
772EXPORT_SYMBOL(phy_stop_interrupts);
773
b3df0da8 774/**
664fcf12
AL
775 * phy_change - Called by the phy_interrupt to handle PHY changes
776 * @phydev: phy_device struct that interrupted
b3df0da8 777 */
664fcf12 778void phy_change(struct phy_device *phydev)
e1393456 779{
deccd16f
FF
780 if (phy_interrupt_is_valid(phydev)) {
781 if (phydev->drv->did_interrupt &&
782 !phydev->drv->did_interrupt(phydev))
783 goto ignore;
a8729eb3 784
deccd16f
FF
785 if (phy_disable_interrupts(phydev))
786 goto phy_err;
787 }
e1393456 788
35b5f6b1 789 mutex_lock(&phydev->lock);
e1393456
AF
790 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
791 phydev->state = PHY_CHANGELINK;
35b5f6b1 792 mutex_unlock(&phydev->lock);
e1393456 793
deccd16f
FF
794 if (phy_interrupt_is_valid(phydev)) {
795 atomic_dec(&phydev->irq_disable);
796 enable_irq(phydev->irq);
e1393456 797
deccd16f
FF
798 /* Reenable interrupts */
799 if (PHY_HALTED != phydev->state &&
800 phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED))
801 goto irq_enable_err;
802 }
e1393456 803
a390d1f3 804 /* reschedule state queue work to run as soon as possible */
3c293f4e 805 phy_trigger_machine(phydev);
e1393456
AF
806 return;
807
a8729eb3
AG
808ignore:
809 atomic_dec(&phydev->irq_disable);
810 enable_irq(phydev->irq);
811 return;
812
e1393456
AF
813irq_enable_err:
814 disable_irq(phydev->irq);
0ac49527 815 atomic_inc(&phydev->irq_disable);
e1393456
AF
816phy_err:
817 phy_error(phydev);
818}
819
664fcf12
AL
820/**
821 * phy_change_work - Scheduled by the phy_mac_interrupt to handle PHY changes
822 * @work: work_struct that describes the work to be done
823 */
824void phy_change_work(struct work_struct *work)
825{
826 struct phy_device *phydev =
827 container_of(work, struct phy_device, phy_queue);
828
829 phy_change(phydev);
830}
831
b3df0da8
RD
832/**
833 * phy_stop - Bring down the PHY link, and stop checking the status
834 * @phydev: target phy_device struct
835 */
e1393456
AF
836void phy_stop(struct phy_device *phydev)
837{
35b5f6b1 838 mutex_lock(&phydev->lock);
e1393456
AF
839
840 if (PHY_HALTED == phydev->state)
841 goto out_unlock;
842
2c7b4921 843 if (phy_interrupt_is_valid(phydev)) {
e1393456
AF
844 /* Disable PHY Interrupts */
845 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 846
3c3070d7
MR
847 /* Clear any pending interrupts */
848 phy_clear_interrupt(phydev);
849 }
e1393456 850
6daf6531
MR
851 phydev->state = PHY_HALTED;
852
e1393456 853out_unlock:
35b5f6b1 854 mutex_unlock(&phydev->lock);
3c3070d7 855
2f53e904 856 /* Cannot call flush_scheduled_work() here as desired because
3c3070d7
MR
857 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
858 * will not reenable interrupts.
859 */
e1393456 860}
2f53e904 861EXPORT_SYMBOL(phy_stop);
e1393456 862
b3df0da8
RD
863/**
864 * phy_start - start or restart a PHY device
865 * @phydev: target phy_device struct
e1393456 866 *
b3df0da8 867 * Description: Indicates the attached device's readiness to
e1393456
AF
868 * handle PHY-related work. Used during startup to start the
869 * PHY, and after a call to phy_stop() to resume operation.
870 * Also used to indicate the MDIO bus has cleared an error
871 * condition.
872 */
873void phy_start(struct phy_device *phydev)
874{
c15e10e7
TB
875 bool do_resume = false;
876 int err = 0;
877
35b5f6b1 878 mutex_lock(&phydev->lock);
e1393456
AF
879
880 switch (phydev->state) {
e109374f
FF
881 case PHY_STARTING:
882 phydev->state = PHY_PENDING;
883 break;
884 case PHY_READY:
885 phydev->state = PHY_UP;
886 break;
887 case PHY_HALTED:
c15e10e7 888 /* make sure interrupts are re-enabled for the PHY */
84a527a4
SX
889 if (phydev->irq != PHY_POLL) {
890 err = phy_enable_interrupts(phydev);
891 if (err < 0)
892 break;
893 }
c15e10e7 894
e109374f 895 phydev->state = PHY_RESUMING;
c15e10e7
TB
896 do_resume = true;
897 break;
e109374f
FF
898 default:
899 break;
e1393456 900 }
35b5f6b1 901 mutex_unlock(&phydev->lock);
c15e10e7
TB
902
903 /* if phy was suspended, bring the physical link up again */
904 if (do_resume)
905 phy_resume(phydev);
3c293f4e
AL
906
907 phy_trigger_machine(phydev);
e1393456 908}
e1393456 909EXPORT_SYMBOL(phy_start);
67c4f3fa 910
35b5f6b1
NC
911/**
912 * phy_state_machine - Handle the state machine
913 * @work: work_struct that describes the work to be done
35b5f6b1 914 */
4f9c85a1 915void phy_state_machine(struct work_struct *work)
00db8189 916{
bf6aede7 917 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 918 struct phy_device *phydev =
a390d1f3 919 container_of(dwork, struct phy_device, state_queue);
c15e10e7 920 bool needs_aneg = false, do_suspend = false;
3e2186e0 921 enum phy_state old_state;
00db8189 922 int err = 0;
11e122cb 923 int old_link;
00db8189 924
35b5f6b1 925 mutex_lock(&phydev->lock);
00db8189 926
3e2186e0
FF
927 old_state = phydev->state;
928
2b8f2a28
DM
929 if (phydev->drv->link_change_notify)
930 phydev->drv->link_change_notify(phydev);
931
e109374f
FF
932 switch (phydev->state) {
933 case PHY_DOWN:
934 case PHY_STARTING:
935 case PHY_READY:
936 case PHY_PENDING:
937 break;
938 case PHY_UP:
6e14a5ee 939 needs_aneg = true;
00db8189 940
e109374f
FF
941 phydev->link_timeout = PHY_AN_TIMEOUT;
942
943 break;
944 case PHY_AN:
945 err = phy_read_status(phydev);
e109374f 946 if (err < 0)
00db8189 947 break;
6b655529 948
2f53e904 949 /* If the link is down, give up on negotiation for now */
e109374f
FF
950 if (!phydev->link) {
951 phydev->state = PHY_NOLINK;
952 netif_carrier_off(phydev->attached_dev);
953 phydev->adjust_link(phydev->attached_dev);
954 break;
955 }
6b655529 956
2f53e904 957 /* Check if negotiation is done. Break if there's an error */
e109374f
FF
958 err = phy_aneg_done(phydev);
959 if (err < 0)
960 break;
6b655529 961
e109374f
FF
962 /* If AN is done, we're running */
963 if (err > 0) {
964 phydev->state = PHY_RUNNING;
965 netif_carrier_on(phydev->attached_dev);
966 phydev->adjust_link(phydev->attached_dev);
00db8189 967
fa8cddaf 968 } else if (0 == phydev->link_timeout--)
6e14a5ee 969 needs_aneg = true;
e109374f
FF
970 break;
971 case PHY_NOLINK:
321beec5
AL
972 if (phy_interrupt_is_valid(phydev))
973 break;
974
e109374f 975 err = phy_read_status(phydev);
e109374f 976 if (err)
00db8189 977 break;
00db8189 978
e109374f 979 if (phydev->link) {
e46e08b8
BK
980 if (AUTONEG_ENABLE == phydev->autoneg) {
981 err = phy_aneg_done(phydev);
982 if (err < 0)
983 break;
984
985 if (!err) {
986 phydev->state = PHY_AN;
987 phydev->link_timeout = PHY_AN_TIMEOUT;
988 break;
989 }
990 }
e109374f
FF
991 phydev->state = PHY_RUNNING;
992 netif_carrier_on(phydev->attached_dev);
993 phydev->adjust_link(phydev->attached_dev);
994 }
995 break;
996 case PHY_FORCING:
997 err = genphy_update_link(phydev);
e109374f 998 if (err)
00db8189 999 break;
00db8189 1000
e109374f
FF
1001 if (phydev->link) {
1002 phydev->state = PHY_RUNNING;
1003 netif_carrier_on(phydev->attached_dev);
1004 } else {
1005 if (0 == phydev->link_timeout--)
6e14a5ee 1006 needs_aneg = true;
e109374f 1007 }
00db8189 1008
e109374f
FF
1009 phydev->adjust_link(phydev->attached_dev);
1010 break;
1011 case PHY_RUNNING:
d5c3d846
FF
1012 /* Only register a CHANGE if we are polling and link changed
1013 * since latest checking.
e109374f 1014 */
d5c3d846 1015 if (phydev->irq == PHY_POLL) {
11e122cb
SX
1016 old_link = phydev->link;
1017 err = phy_read_status(phydev);
1018 if (err)
1019 break;
1020
1021 if (old_link != phydev->link)
1022 phydev->state = PHY_CHANGELINK;
1023 }
e109374f
FF
1024 break;
1025 case PHY_CHANGELINK:
1026 err = phy_read_status(phydev);
e109374f 1027 if (err)
00db8189 1028 break;
00db8189 1029
e109374f
FF
1030 if (phydev->link) {
1031 phydev->state = PHY_RUNNING;
1032 netif_carrier_on(phydev->attached_dev);
1033 } else {
1034 phydev->state = PHY_NOLINK;
1035 netif_carrier_off(phydev->attached_dev);
1036 }
00db8189 1037
e109374f 1038 phydev->adjust_link(phydev->attached_dev);
00db8189 1039
e109374f
FF
1040 if (phy_interrupt_is_valid(phydev))
1041 err = phy_config_interrupt(phydev,
2f53e904 1042 PHY_INTERRUPT_ENABLED);
e109374f
FF
1043 break;
1044 case PHY_HALTED:
1045 if (phydev->link) {
1046 phydev->link = 0;
1047 netif_carrier_off(phydev->attached_dev);
00db8189 1048 phydev->adjust_link(phydev->attached_dev);
6e14a5ee 1049 do_suspend = true;
e109374f
FF
1050 }
1051 break;
1052 case PHY_RESUMING:
e109374f
FF
1053 if (AUTONEG_ENABLE == phydev->autoneg) {
1054 err = phy_aneg_done(phydev);
1055 if (err < 0)
00db8189
AF
1056 break;
1057
e109374f 1058 /* err > 0 if AN is done.
2f53e904
SS
1059 * Otherwise, it's 0, and we're still waiting for AN
1060 */
e109374f 1061 if (err > 0) {
42caa074
WF
1062 err = phy_read_status(phydev);
1063 if (err)
1064 break;
1065
1066 if (phydev->link) {
1067 phydev->state = PHY_RUNNING;
1068 netif_carrier_on(phydev->attached_dev);
2f53e904 1069 } else {
42caa074 1070 phydev->state = PHY_NOLINK;
2f53e904 1071 }
42caa074 1072 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
1073 } else {
1074 phydev->state = PHY_AN;
1075 phydev->link_timeout = PHY_AN_TIMEOUT;
42caa074 1076 }
e109374f
FF
1077 } else {
1078 err = phy_read_status(phydev);
1079 if (err)
1080 break;
1081
1082 if (phydev->link) {
1083 phydev->state = PHY_RUNNING;
1084 netif_carrier_on(phydev->attached_dev);
2f53e904 1085 } else {
e109374f 1086 phydev->state = PHY_NOLINK;
2f53e904 1087 }
e109374f
FF
1088 phydev->adjust_link(phydev->attached_dev);
1089 }
1090 break;
00db8189
AF
1091 }
1092
35b5f6b1 1093 mutex_unlock(&phydev->lock);
00db8189
AF
1094
1095 if (needs_aneg)
1096 err = phy_start_aneg(phydev);
6e14a5ee 1097 else if (do_suspend)
be9dad1f
SH
1098 phy_suspend(phydev);
1099
00db8189
AF
1100 if (err < 0)
1101 phy_error(phydev);
1102
72ba48be
AL
1103 phydev_dbg(phydev, "PHY state change %s -> %s\n",
1104 phy_state_to_str(old_state),
1105 phy_state_to_str(phydev->state));
3e2186e0 1106
d5c3d846
FF
1107 /* Only re-schedule a PHY state machine change if we are polling the
1108 * PHY, if PHY_IGNORE_INTERRUPT is set, then we will be moving
1109 * between states from phy_mac_interrupt()
1110 */
1111 if (phydev->irq == PHY_POLL)
1112 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
1113 PHY_STATE_TIME * HZ);
35b5f6b1 1114}
a59a4d19 1115
664fcf12
AL
1116/**
1117 * phy_mac_interrupt - MAC says the link has changed
1118 * @phydev: phy_device struct with changed link
1119 * @new_link: Link is Up/Down.
1120 *
1121 * Description: The MAC layer is able indicate there has been a change
1122 * in the PHY link status. Set the new link status, and trigger the
1123 * state machine, work a work queue.
1124 */
5ea94e76
FF
1125void phy_mac_interrupt(struct phy_device *phydev, int new_link)
1126{
5ea94e76 1127 phydev->link = new_link;
deccd16f
FF
1128
1129 /* Trigger a state machine change */
1130 queue_work(system_power_efficient_wq, &phydev->phy_queue);
5ea94e76
FF
1131}
1132EXPORT_SYMBOL(phy_mac_interrupt);
1133
a59a4d19
GC
1134static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
1135 int addr)
1136{
1137 /* Write the desired MMD Devad */
1138 bus->write(bus, addr, MII_MMD_CTRL, devad);
1139
1140 /* Write the desired MMD register address */
1141 bus->write(bus, addr, MII_MMD_DATA, prtad);
1142
1143 /* Select the Function : DATA with no post increment */
1144 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
1145}
1146
1147/**
1148 * phy_read_mmd_indirect - reads data from the MMD registers
0c1d77df 1149 * @phydev: The PHY device bus
a59a4d19
GC
1150 * @prtad: MMD Address
1151 * @devad: MMD DEVAD
a59a4d19
GC
1152 *
1153 * Description: it reads data from the MMD registers (clause 22 to access to
1154 * clause 45) of the specified phy address.
1155 * To read these register we have:
1156 * 1) Write reg 13 // DEVAD
1157 * 2) Write reg 14 // MMD Address
1158 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
1159 * 3) Read reg 14 // Read MMD data
1160 */
053e7e16 1161int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad)
a59a4d19 1162{
0c1d77df 1163 struct phy_driver *phydrv = phydev->drv;
e5a03bfd 1164 int addr = phydev->mdio.addr;
0c1d77df 1165 int value = -1;
a59a4d19 1166
ef899c07 1167 if (!phydrv->read_mmd_indirect) {
e5a03bfd 1168 struct mii_bus *bus = phydev->mdio.bus;
05a7f582
RK
1169
1170 mutex_lock(&bus->mdio_lock);
1171 mmd_phy_indirect(bus, prtad, devad, addr);
0c1d77df
VB
1172
1173 /* Read the content of the MMD's selected register */
05a7f582
RK
1174 value = bus->read(bus, addr, MII_MMD_DATA);
1175 mutex_unlock(&bus->mdio_lock);
0c1d77df
VB
1176 } else {
1177 value = phydrv->read_mmd_indirect(phydev, prtad, devad, addr);
1178 }
1179 return value;
a59a4d19 1180}
66ce7fb9 1181EXPORT_SYMBOL(phy_read_mmd_indirect);
a59a4d19
GC
1182
1183/**
1184 * phy_write_mmd_indirect - writes data to the MMD registers
0c1d77df 1185 * @phydev: The PHY device
a59a4d19
GC
1186 * @prtad: MMD Address
1187 * @devad: MMD DEVAD
a59a4d19
GC
1188 * @data: data to write in the MMD register
1189 *
1190 * Description: Write data from the MMD registers of the specified
1191 * phy address.
1192 * To write these register we have:
1193 * 1) Write reg 13 // DEVAD
1194 * 2) Write reg 14 // MMD Address
1195 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
1196 * 3) Write reg 14 // Write MMD data
1197 */
66ce7fb9 1198void phy_write_mmd_indirect(struct phy_device *phydev, int prtad,
053e7e16 1199 int devad, u32 data)
a59a4d19 1200{
0c1d77df 1201 struct phy_driver *phydrv = phydev->drv;
e5a03bfd 1202 int addr = phydev->mdio.addr;
a59a4d19 1203
ef899c07 1204 if (!phydrv->write_mmd_indirect) {
e5a03bfd 1205 struct mii_bus *bus = phydev->mdio.bus;
05a7f582
RK
1206
1207 mutex_lock(&bus->mdio_lock);
1208 mmd_phy_indirect(bus, prtad, devad, addr);
0c1d77df
VB
1209
1210 /* Write the data into MMD's selected register */
05a7f582
RK
1211 bus->write(bus, addr, MII_MMD_DATA, data);
1212 mutex_unlock(&bus->mdio_lock);
0c1d77df
VB
1213 } else {
1214 phydrv->write_mmd_indirect(phydev, prtad, devad, addr, data);
1215 }
a59a4d19 1216}
66ce7fb9 1217EXPORT_SYMBOL(phy_write_mmd_indirect);
a59a4d19 1218
a59a4d19
GC
1219/**
1220 * phy_init_eee - init and check the EEE feature
1221 * @phydev: target phy_device struct
1222 * @clk_stop_enable: PHY may stop the clock during LPI
1223 *
1224 * Description: it checks if the Energy-Efficient Ethernet (EEE)
1225 * is supported by looking at the MMD registers 3.20 and 7.60/61
1226 * and it programs the MMD register 3.0 setting the "Clock stop enable"
1227 * bit if required.
1228 */
1229int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
1230{
a59a4d19
GC
1231 /* According to 802.3az,the EEE is supported only in full duplex-mode.
1232 * Also EEE feature is active when core is operating with MII, GMII
7e140696
FF
1233 * or RGMII (all kinds). Internal PHYs are also allowed to proceed and
1234 * should return an error if they do not support EEE.
a59a4d19
GC
1235 */
1236 if ((phydev->duplex == DUPLEX_FULL) &&
1237 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
1238 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
32a64161 1239 phy_interface_is_rgmii(phydev) ||
a9f63095 1240 phy_is_internal(phydev))) {
a59a4d19
GC
1241 int eee_lp, eee_cap, eee_adv;
1242 u32 lp, cap, adv;
4ae6e50c 1243 int status;
a59a4d19
GC
1244
1245 /* Read phy status to properly get the right settings */
1246 status = phy_read_status(phydev);
1247 if (status)
1248 return status;
1249
1250 /* First check if the EEE ability is supported */
0c1d77df 1251 eee_cap = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE,
053e7e16 1252 MDIO_MMD_PCS);
7a4cecf7
GC
1253 if (eee_cap <= 0)
1254 goto eee_exit_err;
a59a4d19 1255
b32607dd 1256 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19 1257 if (!cap)
7a4cecf7 1258 goto eee_exit_err;
a59a4d19
GC
1259
1260 /* Check which link settings negotiated and verify it in
1261 * the EEE advertising registers.
1262 */
0c1d77df 1263 eee_lp = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE,
053e7e16 1264 MDIO_MMD_AN);
7a4cecf7
GC
1265 if (eee_lp <= 0)
1266 goto eee_exit_err;
a59a4d19 1267
0c1d77df 1268 eee_adv = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV,
053e7e16 1269 MDIO_MMD_AN);
7a4cecf7
GC
1270 if (eee_adv <= 0)
1271 goto eee_exit_err;
a59a4d19 1272
b32607dd
AB
1273 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
1274 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
54da5a8b 1275 if (!phy_check_valid(phydev->speed, phydev->duplex, lp & adv))
7a4cecf7 1276 goto eee_exit_err;
a59a4d19
GC
1277
1278 if (clk_stop_enable) {
1279 /* Configure the PHY to stop receiving xMII
1280 * clock while it is signaling LPI.
1281 */
0c1d77df 1282 int val = phy_read_mmd_indirect(phydev, MDIO_CTRL1,
053e7e16 1283 MDIO_MMD_PCS);
a59a4d19
GC
1284 if (val < 0)
1285 return val;
1286
1287 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
0c1d77df 1288 phy_write_mmd_indirect(phydev, MDIO_CTRL1,
053e7e16 1289 MDIO_MMD_PCS, val);
a59a4d19
GC
1290 }
1291
e62a768f 1292 return 0; /* EEE supported */
a59a4d19 1293 }
7a4cecf7 1294eee_exit_err:
e62a768f 1295 return -EPROTONOSUPPORT;
a59a4d19
GC
1296}
1297EXPORT_SYMBOL(phy_init_eee);
1298
1299/**
1300 * phy_get_eee_err - report the EEE wake error count
1301 * @phydev: target phy_device struct
1302 *
1303 * Description: it is to report the number of time where the PHY
1304 * failed to complete its normal wake sequence.
1305 */
1306int phy_get_eee_err(struct phy_device *phydev)
1307{
053e7e16 1308 return phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_WK_ERR, MDIO_MMD_PCS);
a59a4d19
GC
1309}
1310EXPORT_SYMBOL(phy_get_eee_err);
1311
1312/**
1313 * phy_ethtool_get_eee - get EEE supported and status
1314 * @phydev: target phy_device struct
1315 * @data: ethtool_eee data
1316 *
1317 * Description: it reportes the Supported/Advertisement/LP Advertisement
1318 * capabilities.
1319 */
1320int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1321{
1322 int val;
1323
1324 /* Get Supported EEE */
053e7e16 1325 val = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE, MDIO_MMD_PCS);
a59a4d19
GC
1326 if (val < 0)
1327 return val;
b32607dd 1328 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
a59a4d19
GC
1329
1330 /* Get advertisement EEE */
053e7e16 1331 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN);
a59a4d19
GC
1332 if (val < 0)
1333 return val;
b32607dd 1334 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1335
1336 /* Get LP advertisement EEE */
053e7e16 1337 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE, MDIO_MMD_AN);
a59a4d19
GC
1338 if (val < 0)
1339 return val;
b32607dd 1340 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1341
1342 return 0;
1343}
1344EXPORT_SYMBOL(phy_ethtool_get_eee);
1345
1346/**
1347 * phy_ethtool_set_eee - set EEE supported and status
1348 * @phydev: target phy_device struct
1349 * @data: ethtool_eee data
1350 *
1351 * Description: it is to program the Advertisement EEE register.
1352 */
1353int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1354{
553fe92b 1355 int val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19 1356
053e7e16 1357 phy_write_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN, val);
a59a4d19
GC
1358
1359 return 0;
1360}
1361EXPORT_SYMBOL(phy_ethtool_set_eee);
42e836eb
MS
1362
1363int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1364{
1365 if (phydev->drv->set_wol)
1366 return phydev->drv->set_wol(phydev, wol);
1367
1368 return -EOPNOTSUPP;
1369}
1370EXPORT_SYMBOL(phy_ethtool_set_wol);
1371
1372void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1373{
1374 if (phydev->drv->get_wol)
1375 phydev->drv->get_wol(phydev, wol);
1376}
1377EXPORT_SYMBOL(phy_ethtool_get_wol);
9d9a77ce
PR
1378
1379int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1380 struct ethtool_link_ksettings *cmd)
1381{
1382 struct phy_device *phydev = ndev->phydev;
1383
1384 if (!phydev)
1385 return -ENODEV;
1386
1387 return phy_ethtool_ksettings_get(phydev, cmd);
1388}
1389EXPORT_SYMBOL(phy_ethtool_get_link_ksettings);
1390
1391int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1392 const struct ethtool_link_ksettings *cmd)
1393{
1394 struct phy_device *phydev = ndev->phydev;
1395
1396 if (!phydev)
1397 return -ENODEV;
1398
1399 return phy_ethtool_ksettings_set(phydev, cmd);
1400}
1401EXPORT_SYMBOL(phy_ethtool_set_link_ksettings);