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net: phy: report link partner features through ethtool
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1/*
2 * drivers/net/phy/phy.c
3 *
4 * Framework for configuring and reading PHY devices
5 * Based on code in sungem_phy.c and gianfar_phy.c
6 *
7 * Author: Andy Fleming
8 *
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 10 * Copyright (c) 2006, 2007 Maciej W. Rozycki
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AF
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 */
8d242488
JP
18
19#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
00db8189 21#include <linux/kernel.h>
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22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/unistd.h>
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25#include <linux/interrupt.h>
26#include <linux/init.h>
27#include <linux/delay.h>
28#include <linux/netdevice.h>
29#include <linux/etherdevice.h>
30#include <linux/skbuff.h>
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AF
31#include <linux/mm.h>
32#include <linux/module.h>
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33#include <linux/mii.h>
34#include <linux/ethtool.h>
35#include <linux/phy.h>
3c3070d7
MR
36#include <linux/timer.h>
37#include <linux/workqueue.h>
a59a4d19 38#include <linux/mdio.h>
00db8189 39
60063497 40#include <linux/atomic.h>
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41#include <asm/io.h>
42#include <asm/irq.h>
43#include <asm/uaccess.h>
44
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RD
45/**
46 * phy_print_status - Convenience function to print out the current phy status
47 * @phydev: the phy_device struct
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AF
48 */
49void phy_print_status(struct phy_device *phydev)
50{
e1393456 51 if (phydev->link)
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JP
52 pr_info("%s - Link is Up - %d/%s\n",
53 dev_name(&phydev->dev),
54 phydev->speed,
55 DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
56 else
57 pr_info("%s - Link is Down\n", dev_name(&phydev->dev));
e1393456
AF
58}
59EXPORT_SYMBOL(phy_print_status);
00db8189 60
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RD
61/**
62 * phy_clear_interrupt - Ack the phy device's interrupt
63 * @phydev: the phy_device struct
64 *
65 * If the @phydev driver has an ack_interrupt function, call it to
66 * ack and clear the phy device's interrupt.
67 *
68 * Returns 0 on success on < 0 on error.
69 */
89ff05ec 70static int phy_clear_interrupt(struct phy_device *phydev)
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AF
71{
72 int err = 0;
73
74 if (phydev->drv->ack_interrupt)
75 err = phydev->drv->ack_interrupt(phydev);
76
77 return err;
78}
79
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RD
80/**
81 * phy_config_interrupt - configure the PHY device for the requested interrupts
82 * @phydev: the phy_device struct
83 * @interrupts: interrupt flags to configure for this @phydev
84 *
85 * Returns 0 on success on < 0 on error.
86 */
89ff05ec 87static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
00db8189
AF
88{
89 int err = 0;
90
91 phydev->interrupts = interrupts;
92 if (phydev->drv->config_intr)
93 err = phydev->drv->config_intr(phydev);
94
95 return err;
96}
97
98
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99/**
100 * phy_aneg_done - return auto-negotiation status
101 * @phydev: target phy_device struct
00db8189 102 *
b3df0da8 103 * Description: Reads the status register and returns 0 either if
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AF
104 * auto-negotiation is incomplete, or if there was an error.
105 * Returns BMSR_ANEGCOMPLETE if auto-negotiation is done.
106 */
107static inline int phy_aneg_done(struct phy_device *phydev)
108{
109 int retval;
110
111 retval = phy_read(phydev, MII_BMSR);
112
113 return (retval < 0) ? retval : (retval & BMSR_ANEGCOMPLETE);
114}
115
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116/* A structure for mapping a particular speed and duplex
117 * combination to a particular SUPPORTED and ADVERTISED value */
118struct phy_setting {
119 int speed;
120 int duplex;
121 u32 setting;
122};
123
124/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 125static const struct phy_setting settings[] = {
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AF
126 {
127 .speed = 10000,
128 .duplex = DUPLEX_FULL,
129 .setting = SUPPORTED_10000baseT_Full,
130 },
131 {
132 .speed = SPEED_1000,
133 .duplex = DUPLEX_FULL,
134 .setting = SUPPORTED_1000baseT_Full,
135 },
136 {
137 .speed = SPEED_1000,
138 .duplex = DUPLEX_HALF,
139 .setting = SUPPORTED_1000baseT_Half,
140 },
141 {
142 .speed = SPEED_100,
143 .duplex = DUPLEX_FULL,
144 .setting = SUPPORTED_100baseT_Full,
145 },
146 {
147 .speed = SPEED_100,
148 .duplex = DUPLEX_HALF,
149 .setting = SUPPORTED_100baseT_Half,
150 },
151 {
152 .speed = SPEED_10,
153 .duplex = DUPLEX_FULL,
154 .setting = SUPPORTED_10baseT_Full,
155 },
156 {
157 .speed = SPEED_10,
158 .duplex = DUPLEX_HALF,
159 .setting = SUPPORTED_10baseT_Half,
160 },
161};
162
ff8ac609 163#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 164
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RD
165/**
166 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
167 * @speed: speed to match
168 * @duplex: duplex to match
00db8189 169 *
b3df0da8 170 * Description: Searches the settings array for the setting which
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AF
171 * matches the desired speed and duplex, and returns the index
172 * of that setting. Returns the index of the last setting if
173 * none of the others match.
174 */
175static inline int phy_find_setting(int speed, int duplex)
176{
177 int idx = 0;
178
179 while (idx < ARRAY_SIZE(settings) &&
180 (settings[idx].speed != speed ||
181 settings[idx].duplex != duplex))
182 idx++;
183
184 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
185}
186
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187/**
188 * phy_find_valid - find a PHY setting that matches the requested features mask
189 * @idx: The first index in settings[] to search
190 * @features: A mask of the valid settings
00db8189 191 *
b3df0da8 192 * Description: Returns the index of the first valid setting less
00db8189
AF
193 * than or equal to the one pointed to by idx, as determined by
194 * the mask in features. Returns the index of the last setting
195 * if nothing else matches.
196 */
197static inline int phy_find_valid(int idx, u32 features)
198{
199 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
200 idx++;
201
202 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
203}
204
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205/**
206 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
207 * @phydev: the target phy_device struct
00db8189 208 *
b3df0da8 209 * Description: Make sure the PHY is set to supported speeds and
00db8189 210 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 211 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 212 */
89ff05ec 213static void phy_sanitize_settings(struct phy_device *phydev)
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AF
214{
215 u32 features = phydev->supported;
216 int idx;
217
218 /* Sanitize settings based on PHY capabilities */
219 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 220 phydev->autoneg = AUTONEG_DISABLE;
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221
222 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
223 features);
224
225 phydev->speed = settings[idx].speed;
226 phydev->duplex = settings[idx].duplex;
227}
00db8189 228
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229/**
230 * phy_ethtool_sset - generic ethtool sset function, handles all the details
231 * @phydev: target phy_device struct
232 * @cmd: ethtool_cmd
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233 *
234 * A few notes about parameter checking:
235 * - We don't set port or transceiver, so we don't care what they
236 * were set to.
237 * - phy_start_aneg() will make sure forced settings are sane, and
238 * choose the next best ones from the ones selected, so we don't
b3df0da8 239 * care if ethtool tries to give us bad values.
00db8189
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240 */
241int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
242{
25db0338
DD
243 u32 speed = ethtool_cmd_speed(cmd);
244
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245 if (cmd->phy_address != phydev->addr)
246 return -EINVAL;
247
248 /* We make sure that we don't pass unsupported
249 * values in to the PHY */
250 cmd->advertising &= phydev->supported;
251
252 /* Verify the settings we care about. */
253 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
254 return -EINVAL;
255
256 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
257 return -EINVAL;
258
8e95a202 259 if (cmd->autoneg == AUTONEG_DISABLE &&
25db0338
DD
260 ((speed != SPEED_1000 &&
261 speed != SPEED_100 &&
262 speed != SPEED_10) ||
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JP
263 (cmd->duplex != DUPLEX_HALF &&
264 cmd->duplex != DUPLEX_FULL)))
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265 return -EINVAL;
266
267 phydev->autoneg = cmd->autoneg;
268
25db0338 269 phydev->speed = speed;
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270
271 phydev->advertising = cmd->advertising;
272
273 if (AUTONEG_ENABLE == cmd->autoneg)
274 phydev->advertising |= ADVERTISED_Autoneg;
275 else
276 phydev->advertising &= ~ADVERTISED_Autoneg;
277
278 phydev->duplex = cmd->duplex;
279
280 /* Restart the PHY */
281 phy_start_aneg(phydev);
282
283 return 0;
284}
9f6d55d0 285EXPORT_SYMBOL(phy_ethtool_sset);
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286
287int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
288{
289 cmd->supported = phydev->supported;
290
291 cmd->advertising = phydev->advertising;
114002bc 292 cmd->lp_advertising = phydev->lp_advertising;
00db8189 293
70739497 294 ethtool_cmd_speed_set(cmd, phydev->speed);
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AF
295 cmd->duplex = phydev->duplex;
296 cmd->port = PORT_MII;
297 cmd->phy_address = phydev->addr;
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FF
298 cmd->transceiver = phy_is_internal(phydev) ?
299 XCVR_INTERNAL : XCVR_EXTERNAL;
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300 cmd->autoneg = phydev->autoneg;
301
302 return 0;
303}
9f6d55d0 304EXPORT_SYMBOL(phy_ethtool_gset);
00db8189 305
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RD
306/**
307 * phy_mii_ioctl - generic PHY MII ioctl interface
308 * @phydev: the phy_device struct
00c7d920 309 * @ifr: &struct ifreq for socket ioctl's
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RD
310 * @cmd: ioctl cmd to execute
311 *
312 * Note that this function is currently incompatible with the
00db8189 313 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 314 * current state. Use at own risk.
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AF
315 */
316int phy_mii_ioctl(struct phy_device *phydev,
28b04113 317 struct ifreq *ifr, int cmd)
00db8189 318{
28b04113 319 struct mii_ioctl_data *mii_data = if_mii(ifr);
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AF
320 u16 val = mii_data->val_in;
321
322 switch (cmd) {
323 case SIOCGMIIPHY:
324 mii_data->phy_id = phydev->addr;
c6d6a511
LB
325 /* fall through */
326
00db8189 327 case SIOCGMIIREG:
af1dc13e
PK
328 mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
329 mii_data->reg_num);
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330 break;
331
332 case SIOCSMIIREG:
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333 if (mii_data->phy_id == phydev->addr) {
334 switch(mii_data->reg_num) {
335 case MII_BMCR:
163642a2 336 if ((val & (BMCR_RESET|BMCR_ANENABLE)) == 0)
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AF
337 phydev->autoneg = AUTONEG_DISABLE;
338 else
339 phydev->autoneg = AUTONEG_ENABLE;
340 if ((!phydev->autoneg) && (val & BMCR_FULLDPLX))
341 phydev->duplex = DUPLEX_FULL;
342 else
343 phydev->duplex = DUPLEX_HALF;
024a0a3c
SL
344 if ((!phydev->autoneg) &&
345 (val & BMCR_SPEED1000))
346 phydev->speed = SPEED_1000;
347 else if ((!phydev->autoneg) &&
348 (val & BMCR_SPEED100))
349 phydev->speed = SPEED_100;
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AF
350 break;
351 case MII_ADVERTISE:
352 phydev->advertising = val;
353 break;
354 default:
355 /* do nothing */
356 break;
357 }
358 }
359
af1dc13e
PK
360 mdiobus_write(phydev->bus, mii_data->phy_id,
361 mii_data->reg_num, val);
362
8e95a202
JP
363 if (mii_data->reg_num == MII_BMCR &&
364 val & BMCR_RESET &&
365 phydev->drv->config_init) {
f62220d3 366 phy_scan_fixups(phydev);
00db8189 367 phydev->drv->config_init(phydev);
f62220d3 368 }
00db8189 369 break;
dda93b48 370
c1f19b51
RC
371 case SIOCSHWTSTAMP:
372 if (phydev->drv->hwtstamp)
373 return phydev->drv->hwtstamp(phydev, ifr);
374 /* fall through */
375
dda93b48 376 default:
c6d6a511 377 return -EOPNOTSUPP;
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378 }
379
380 return 0;
381}
680e9fe9 382EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 383
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RD
384/**
385 * phy_start_aneg - start auto-negotiation for this PHY device
386 * @phydev: the phy_device struct
e1393456 387 *
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388 * Description: Sanitizes the settings (if we're not autonegotiating
389 * them), and then calls the driver's config_aneg function.
390 * If the PHYCONTROL Layer is operating, we change the state to
391 * reflect the beginning of Auto-negotiation or forcing.
e1393456
AF
392 */
393int phy_start_aneg(struct phy_device *phydev)
394{
395 int err;
396
35b5f6b1 397 mutex_lock(&phydev->lock);
e1393456
AF
398
399 if (AUTONEG_DISABLE == phydev->autoneg)
400 phy_sanitize_settings(phydev);
401
402 err = phydev->drv->config_aneg(phydev);
403
e1393456
AF
404 if (err < 0)
405 goto out_unlock;
406
407 if (phydev->state != PHY_HALTED) {
408 if (AUTONEG_ENABLE == phydev->autoneg) {
409 phydev->state = PHY_AN;
410 phydev->link_timeout = PHY_AN_TIMEOUT;
411 } else {
412 phydev->state = PHY_FORCING;
413 phydev->link_timeout = PHY_FORCE_TIMEOUT;
414 }
415 }
416
417out_unlock:
35b5f6b1 418 mutex_unlock(&phydev->lock);
e1393456
AF
419 return err;
420}
421EXPORT_SYMBOL(phy_start_aneg);
422
423
b3df0da8
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424/**
425 * phy_start_machine - start PHY state machine tracking
426 * @phydev: the phy_device struct
427 * @handler: callback function for state change notifications
00db8189 428 *
b3df0da8 429 * Description: The PHY infrastructure can run a state machine
00db8189
AF
430 * which tracks whether the PHY is starting up, negotiating,
431 * etc. This function starts the timer which tracks the state
b3df0da8
RD
432 * of the PHY. If you want to be notified when the state changes,
433 * pass in the callback @handler, otherwise, pass NULL. If you
00db8189 434 * want to maintain your own state machine, do not call this
b3df0da8
RD
435 * function.
436 */
00db8189
AF
437void phy_start_machine(struct phy_device *phydev,
438 void (*handler)(struct net_device *))
439{
440 phydev->adjust_state = handler;
441
bbb47bde 442 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
00db8189
AF
443}
444
b3df0da8
RD
445/**
446 * phy_stop_machine - stop the PHY state machine tracking
447 * @phydev: target phy_device struct
00db8189 448 *
b3df0da8 449 * Description: Stops the state machine timer, sets the state to UP
817acf5e 450 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
451 * phy_detach.
452 */
453void phy_stop_machine(struct phy_device *phydev)
454{
a390d1f3 455 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 456
35b5f6b1 457 mutex_lock(&phydev->lock);
00db8189
AF
458 if (phydev->state > PHY_UP)
459 phydev->state = PHY_UP;
35b5f6b1 460 mutex_unlock(&phydev->lock);
00db8189 461
00db8189
AF
462 phydev->adjust_state = NULL;
463}
464
b3df0da8
RD
465/**
466 * phy_error - enter HALTED state for this PHY device
467 * @phydev: target phy_device struct
00db8189
AF
468 *
469 * Moves the PHY to the HALTED state in response to a read
470 * or write error, and tells the controller the link is down.
471 * Must not be called from interrupt context, or while the
472 * phydev->lock is held.
473 */
9b9a8bfc 474static void phy_error(struct phy_device *phydev)
00db8189 475{
35b5f6b1 476 mutex_lock(&phydev->lock);
00db8189 477 phydev->state = PHY_HALTED;
35b5f6b1 478 mutex_unlock(&phydev->lock);
00db8189
AF
479}
480
b3df0da8
RD
481/**
482 * phy_interrupt - PHY interrupt handler
483 * @irq: interrupt line
484 * @phy_dat: phy_device pointer
e1393456 485 *
b3df0da8 486 * Description: When a PHY interrupt occurs, the handler disables
e1393456
AF
487 * interrupts, and schedules a work task to clear the interrupt.
488 */
7d12e780 489static irqreturn_t phy_interrupt(int irq, void *phy_dat)
e1393456
AF
490{
491 struct phy_device *phydev = phy_dat;
492
3c3070d7
MR
493 if (PHY_HALTED == phydev->state)
494 return IRQ_NONE; /* It can't be ours. */
495
e1393456
AF
496 /* The MDIO bus is not allowed to be written in interrupt
497 * context, so we need to disable the irq here. A work
498 * queue will write the PHY to disable and clear the
499 * interrupt, and then reenable the irq line. */
500 disable_irq_nosync(irq);
0ac49527 501 atomic_inc(&phydev->irq_disable);
e1393456 502
bbb47bde 503 queue_work(system_power_efficient_wq, &phydev->phy_queue);
e1393456
AF
504
505 return IRQ_HANDLED;
506}
507
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RD
508/**
509 * phy_enable_interrupts - Enable the interrupts from the PHY side
510 * @phydev: target phy_device struct
511 */
89ff05ec 512static int phy_enable_interrupts(struct phy_device *phydev)
00db8189
AF
513{
514 int err;
515
e1393456 516 err = phy_clear_interrupt(phydev);
00db8189 517
e1393456
AF
518 if (err < 0)
519 return err;
00db8189 520
e1393456 521 err = phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189
AF
522
523 return err;
524}
00db8189 525
b3df0da8
RD
526/**
527 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
528 * @phydev: target phy_device struct
529 */
89ff05ec 530static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
531{
532 int err;
533
534 /* Disable PHY interrupts */
535 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
536
537 if (err)
538 goto phy_err;
539
540 /* Clear the interrupt */
541 err = phy_clear_interrupt(phydev);
542
543 if (err)
544 goto phy_err;
545
546 return 0;
547
548phy_err:
549 phy_error(phydev);
550
551 return err;
552}
e1393456 553
b3df0da8
RD
554/**
555 * phy_start_interrupts - request and enable interrupts for a PHY device
556 * @phydev: target phy_device struct
e1393456 557 *
b3df0da8
RD
558 * Description: Request the interrupt for the given PHY.
559 * If this fails, then we set irq to PHY_POLL.
e1393456 560 * Otherwise, we enable the interrupts in the PHY.
e1393456 561 * This should only be called with a valid IRQ number.
b3df0da8 562 * Returns 0 on success or < 0 on error.
e1393456
AF
563 */
564int phy_start_interrupts(struct phy_device *phydev)
565{
566 int err = 0;
567
0ac49527 568 atomic_set(&phydev->irq_disable, 0);
e1393456 569 if (request_irq(phydev->irq, phy_interrupt,
1fb9df5d 570 IRQF_SHARED,
e1393456
AF
571 "phy_interrupt",
572 phydev) < 0) {
8d242488
JP
573 pr_warn("%s: Can't get IRQ %d (PHY)\n",
574 phydev->bus->name, phydev->irq);
e1393456
AF
575 phydev->irq = PHY_POLL;
576 return 0;
577 }
578
579 err = phy_enable_interrupts(phydev);
580
581 return err;
582}
583EXPORT_SYMBOL(phy_start_interrupts);
584
b3df0da8
RD
585/**
586 * phy_stop_interrupts - disable interrupts from a PHY device
587 * @phydev: target phy_device struct
588 */
e1393456
AF
589int phy_stop_interrupts(struct phy_device *phydev)
590{
591 int err;
592
593 err = phy_disable_interrupts(phydev);
594
595 if (err)
596 phy_error(phydev);
597
0ac49527
MR
598 free_irq(phydev->irq, phydev);
599
3c3070d7 600 /*
0ac49527
MR
601 * Cannot call flush_scheduled_work() here as desired because
602 * of rtnl_lock(), but we do not really care about what would
603 * be done, except from enable_irq(), so cancel any work
604 * possibly pending and take care of the matter below.
3c3070d7 605 */
28e53bdd 606 cancel_work_sync(&phydev->phy_queue);
0ac49527
MR
607 /*
608 * If work indeed has been cancelled, disable_irq() will have
609 * been left unbalanced from phy_interrupt() and enable_irq()
610 * has to be called so that other devices on the line work.
611 */
612 while (atomic_dec_return(&phydev->irq_disable) >= 0)
613 enable_irq(phydev->irq);
e1393456
AF
614
615 return err;
616}
617EXPORT_SYMBOL(phy_stop_interrupts);
618
619
b3df0da8
RD
620/**
621 * phy_change - Scheduled by the phy_interrupt/timer to handle PHY changes
622 * @work: work_struct that describes the work to be done
623 */
5ea94e76 624void phy_change(struct work_struct *work)
e1393456
AF
625{
626 int err;
c4028958
DH
627 struct phy_device *phydev =
628 container_of(work, struct phy_device, phy_queue);
e1393456 629
a8729eb3
AG
630 if (phydev->drv->did_interrupt &&
631 !phydev->drv->did_interrupt(phydev))
632 goto ignore;
633
e1393456
AF
634 err = phy_disable_interrupts(phydev);
635
636 if (err)
637 goto phy_err;
638
35b5f6b1 639 mutex_lock(&phydev->lock);
e1393456
AF
640 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
641 phydev->state = PHY_CHANGELINK;
35b5f6b1 642 mutex_unlock(&phydev->lock);
e1393456 643
0ac49527 644 atomic_dec(&phydev->irq_disable);
e1393456
AF
645 enable_irq(phydev->irq);
646
647 /* Reenable interrupts */
3c3070d7
MR
648 if (PHY_HALTED != phydev->state)
649 err = phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
e1393456
AF
650
651 if (err)
652 goto irq_enable_err;
653
a390d1f3
MS
654 /* reschedule state queue work to run as soon as possible */
655 cancel_delayed_work_sync(&phydev->state_queue);
bbb47bde 656 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
0acb2839 657
e1393456
AF
658 return;
659
a8729eb3
AG
660ignore:
661 atomic_dec(&phydev->irq_disable);
662 enable_irq(phydev->irq);
663 return;
664
e1393456
AF
665irq_enable_err:
666 disable_irq(phydev->irq);
0ac49527 667 atomic_inc(&phydev->irq_disable);
e1393456
AF
668phy_err:
669 phy_error(phydev);
670}
671
b3df0da8
RD
672/**
673 * phy_stop - Bring down the PHY link, and stop checking the status
674 * @phydev: target phy_device struct
675 */
e1393456
AF
676void phy_stop(struct phy_device *phydev)
677{
35b5f6b1 678 mutex_lock(&phydev->lock);
e1393456
AF
679
680 if (PHY_HALTED == phydev->state)
681 goto out_unlock;
682
2c7b4921 683 if (phy_interrupt_is_valid(phydev)) {
e1393456
AF
684 /* Disable PHY Interrupts */
685 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 686
3c3070d7
MR
687 /* Clear any pending interrupts */
688 phy_clear_interrupt(phydev);
689 }
e1393456 690
6daf6531
MR
691 phydev->state = PHY_HALTED;
692
e1393456 693out_unlock:
35b5f6b1 694 mutex_unlock(&phydev->lock);
3c3070d7
MR
695
696 /*
697 * Cannot call flush_scheduled_work() here as desired because
698 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
699 * will not reenable interrupts.
700 */
e1393456
AF
701}
702
703
b3df0da8
RD
704/**
705 * phy_start - start or restart a PHY device
706 * @phydev: target phy_device struct
e1393456 707 *
b3df0da8 708 * Description: Indicates the attached device's readiness to
e1393456
AF
709 * handle PHY-related work. Used during startup to start the
710 * PHY, and after a call to phy_stop() to resume operation.
711 * Also used to indicate the MDIO bus has cleared an error
712 * condition.
713 */
714void phy_start(struct phy_device *phydev)
715{
35b5f6b1 716 mutex_lock(&phydev->lock);
e1393456
AF
717
718 switch (phydev->state) {
719 case PHY_STARTING:
720 phydev->state = PHY_PENDING;
721 break;
722 case PHY_READY:
723 phydev->state = PHY_UP;
724 break;
725 case PHY_HALTED:
726 phydev->state = PHY_RESUMING;
727 default:
728 break;
729 }
35b5f6b1 730 mutex_unlock(&phydev->lock);
e1393456
AF
731}
732EXPORT_SYMBOL(phy_stop);
733EXPORT_SYMBOL(phy_start);
67c4f3fa 734
35b5f6b1
NC
735/**
736 * phy_state_machine - Handle the state machine
737 * @work: work_struct that describes the work to be done
35b5f6b1 738 */
4f9c85a1 739void phy_state_machine(struct work_struct *work)
00db8189 740{
bf6aede7 741 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 742 struct phy_device *phydev =
a390d1f3 743 container_of(dwork, struct phy_device, state_queue);
00db8189
AF
744 int needs_aneg = 0;
745 int err = 0;
746
35b5f6b1 747 mutex_lock(&phydev->lock);
00db8189
AF
748
749 if (phydev->adjust_state)
750 phydev->adjust_state(phydev->attached_dev);
751
752 switch(phydev->state) {
753 case PHY_DOWN:
754 case PHY_STARTING:
755 case PHY_READY:
756 case PHY_PENDING:
757 break;
758 case PHY_UP:
759 needs_aneg = 1;
760
761 phydev->link_timeout = PHY_AN_TIMEOUT;
762
763 break;
764 case PHY_AN:
6b655529
AF
765 err = phy_read_status(phydev);
766
767 if (err < 0)
768 break;
769
770 /* If the link is down, give up on
771 * negotiation for now */
772 if (!phydev->link) {
773 phydev->state = PHY_NOLINK;
774 netif_carrier_off(phydev->attached_dev);
775 phydev->adjust_link(phydev->attached_dev);
776 break;
777 }
778
00db8189
AF
779 /* Check if negotiation is done. Break
780 * if there's an error */
781 err = phy_aneg_done(phydev);
782 if (err < 0)
783 break;
784
6b655529 785 /* If AN is done, we're running */
00db8189 786 if (err > 0) {
6b655529
AF
787 phydev->state = PHY_RUNNING;
788 netif_carrier_on(phydev->attached_dev);
789 phydev->adjust_link(phydev->attached_dev);
00db8189 790
6b655529 791 } else if (0 == phydev->link_timeout--) {
6b655529
AF
792 needs_aneg = 1;
793 /* If we have the magic_aneg bit,
794 * we try again */
795 if (phydev->drv->flags & PHY_HAS_MAGICANEG)
00db8189 796 break;
00db8189
AF
797 }
798 break;
799 case PHY_NOLINK:
800 err = phy_read_status(phydev);
801
802 if (err)
803 break;
804
805 if (phydev->link) {
806 phydev->state = PHY_RUNNING;
807 netif_carrier_on(phydev->attached_dev);
808 phydev->adjust_link(phydev->attached_dev);
809 }
810 break;
811 case PHY_FORCING:
6b655529 812 err = genphy_update_link(phydev);
00db8189
AF
813
814 if (err)
815 break;
816
817 if (phydev->link) {
818 phydev->state = PHY_RUNNING;
819 netif_carrier_on(phydev->attached_dev);
820 } else {
a33e6112 821 if (0 == phydev->link_timeout--)
00db8189 822 needs_aneg = 1;
00db8189
AF
823 }
824
825 phydev->adjust_link(phydev->attached_dev);
826 break;
827 case PHY_RUNNING:
828 /* Only register a CHANGE if we are
2c7b4921
FF
829 * polling or ignoring interrupts
830 */
831 if (!phy_interrupt_is_valid(phydev))
00db8189
AF
832 phydev->state = PHY_CHANGELINK;
833 break;
834 case PHY_CHANGELINK:
835 err = phy_read_status(phydev);
836
837 if (err)
838 break;
839
840 if (phydev->link) {
841 phydev->state = PHY_RUNNING;
842 netif_carrier_on(phydev->attached_dev);
843 } else {
844 phydev->state = PHY_NOLINK;
845 netif_carrier_off(phydev->attached_dev);
846 }
847
848 phydev->adjust_link(phydev->attached_dev);
849
2c7b4921 850 if (phy_interrupt_is_valid(phydev))
00db8189
AF
851 err = phy_config_interrupt(phydev,
852 PHY_INTERRUPT_ENABLED);
853 break;
854 case PHY_HALTED:
855 if (phydev->link) {
856 phydev->link = 0;
857 netif_carrier_off(phydev->attached_dev);
858 phydev->adjust_link(phydev->attached_dev);
859 }
860 break;
861 case PHY_RESUMING:
862
863 err = phy_clear_interrupt(phydev);
864
865 if (err)
866 break;
867
868 err = phy_config_interrupt(phydev,
869 PHY_INTERRUPT_ENABLED);
870
871 if (err)
872 break;
873
874 if (AUTONEG_ENABLE == phydev->autoneg) {
875 err = phy_aneg_done(phydev);
876 if (err < 0)
877 break;
878
879 /* err > 0 if AN is done.
880 * Otherwise, it's 0, and we're
881 * still waiting for AN */
882 if (err > 0) {
42caa074
WF
883 err = phy_read_status(phydev);
884 if (err)
885 break;
886
887 if (phydev->link) {
888 phydev->state = PHY_RUNNING;
889 netif_carrier_on(phydev->attached_dev);
890 } else
891 phydev->state = PHY_NOLINK;
892 phydev->adjust_link(phydev->attached_dev);
00db8189
AF
893 } else {
894 phydev->state = PHY_AN;
895 phydev->link_timeout = PHY_AN_TIMEOUT;
896 }
42caa074
WF
897 } else {
898 err = phy_read_status(phydev);
899 if (err)
900 break;
901
902 if (phydev->link) {
903 phydev->state = PHY_RUNNING;
904 netif_carrier_on(phydev->attached_dev);
905 } else
906 phydev->state = PHY_NOLINK;
907 phydev->adjust_link(phydev->attached_dev);
908 }
00db8189
AF
909 break;
910 }
911
35b5f6b1 912 mutex_unlock(&phydev->lock);
00db8189
AF
913
914 if (needs_aneg)
915 err = phy_start_aneg(phydev);
916
917 if (err < 0)
918 phy_error(phydev);
919
bbb47bde
VK
920 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
921 PHY_STATE_TIME * HZ);
35b5f6b1 922}
a59a4d19 923
5ea94e76
FF
924void phy_mac_interrupt(struct phy_device *phydev, int new_link)
925{
926 cancel_work_sync(&phydev->phy_queue);
927 phydev->link = new_link;
928 schedule_work(&phydev->phy_queue);
929}
930EXPORT_SYMBOL(phy_mac_interrupt);
931
a59a4d19
GC
932static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
933 int addr)
934{
935 /* Write the desired MMD Devad */
936 bus->write(bus, addr, MII_MMD_CTRL, devad);
937
938 /* Write the desired MMD register address */
939 bus->write(bus, addr, MII_MMD_DATA, prtad);
940
941 /* Select the Function : DATA with no post increment */
942 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
943}
944
945/**
946 * phy_read_mmd_indirect - reads data from the MMD registers
947 * @bus: the target MII bus
948 * @prtad: MMD Address
949 * @devad: MMD DEVAD
950 * @addr: PHY address on the MII bus
951 *
952 * Description: it reads data from the MMD registers (clause 22 to access to
953 * clause 45) of the specified phy address.
954 * To read these register we have:
955 * 1) Write reg 13 // DEVAD
956 * 2) Write reg 14 // MMD Address
957 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
958 * 3) Read reg 14 // Read MMD data
959 */
960static int phy_read_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
961 int addr)
962{
963 u32 ret;
964
965 mmd_phy_indirect(bus, prtad, devad, addr);
966
967 /* Read the content of the MMD's selected register */
968 ret = bus->read(bus, addr, MII_MMD_DATA);
969
970 return ret;
971}
972
973/**
974 * phy_write_mmd_indirect - writes data to the MMD registers
975 * @bus: the target MII bus
976 * @prtad: MMD Address
977 * @devad: MMD DEVAD
978 * @addr: PHY address on the MII bus
979 * @data: data to write in the MMD register
980 *
981 * Description: Write data from the MMD registers of the specified
982 * phy address.
983 * To write these register we have:
984 * 1) Write reg 13 // DEVAD
985 * 2) Write reg 14 // MMD Address
986 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
987 * 3) Write reg 14 // Write MMD data
988 */
989static void phy_write_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
990 int addr, u32 data)
991{
992 mmd_phy_indirect(bus, prtad, devad, addr);
993
994 /* Write the data into MMD's selected register */
995 bus->write(bus, addr, MII_MMD_DATA, data);
996}
997
a59a4d19
GC
998/**
999 * phy_init_eee - init and check the EEE feature
1000 * @phydev: target phy_device struct
1001 * @clk_stop_enable: PHY may stop the clock during LPI
1002 *
1003 * Description: it checks if the Energy-Efficient Ethernet (EEE)
1004 * is supported by looking at the MMD registers 3.20 and 7.60/61
1005 * and it programs the MMD register 3.0 setting the "Clock stop enable"
1006 * bit if required.
1007 */
1008int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
1009{
1010 int ret = -EPROTONOSUPPORT;
1011
1012 /* According to 802.3az,the EEE is supported only in full duplex-mode.
1013 * Also EEE feature is active when core is operating with MII, GMII
1014 * or RGMII.
1015 */
1016 if ((phydev->duplex == DUPLEX_FULL) &&
1017 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
1018 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
1019 (phydev->interface == PHY_INTERFACE_MODE_RGMII))) {
1020 int eee_lp, eee_cap, eee_adv;
1021 u32 lp, cap, adv;
1022 int idx, status;
1023
1024 /* Read phy status to properly get the right settings */
1025 status = phy_read_status(phydev);
1026 if (status)
1027 return status;
1028
1029 /* First check if the EEE ability is supported */
1030 eee_cap = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
1031 MDIO_MMD_PCS, phydev->addr);
1032 if (eee_cap < 0)
1033 return eee_cap;
1034
b32607dd 1035 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19
GC
1036 if (!cap)
1037 goto eee_exit;
1038
1039 /* Check which link settings negotiated and verify it in
1040 * the EEE advertising registers.
1041 */
1042 eee_lp = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
1043 MDIO_MMD_AN, phydev->addr);
1044 if (eee_lp < 0)
1045 return eee_lp;
1046
1047 eee_adv = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1048 MDIO_MMD_AN, phydev->addr);
1049 if (eee_adv < 0)
1050 return eee_adv;
1051
b32607dd
AB
1052 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
1053 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
a59a4d19 1054 idx = phy_find_setting(phydev->speed, phydev->duplex);
9a9c56cb 1055 if (!(lp & adv & settings[idx].setting))
a59a4d19
GC
1056 goto eee_exit;
1057
1058 if (clk_stop_enable) {
1059 /* Configure the PHY to stop receiving xMII
1060 * clock while it is signaling LPI.
1061 */
1062 int val = phy_read_mmd_indirect(phydev->bus, MDIO_CTRL1,
1063 MDIO_MMD_PCS,
1064 phydev->addr);
1065 if (val < 0)
1066 return val;
1067
1068 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
1069 phy_write_mmd_indirect(phydev->bus, MDIO_CTRL1,
1070 MDIO_MMD_PCS, phydev->addr, val);
1071 }
1072
1073 ret = 0; /* EEE supported */
1074 }
1075
1076eee_exit:
1077 return ret;
1078}
1079EXPORT_SYMBOL(phy_init_eee);
1080
1081/**
1082 * phy_get_eee_err - report the EEE wake error count
1083 * @phydev: target phy_device struct
1084 *
1085 * Description: it is to report the number of time where the PHY
1086 * failed to complete its normal wake sequence.
1087 */
1088int phy_get_eee_err(struct phy_device *phydev)
1089{
1090 return phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_WK_ERR,
1091 MDIO_MMD_PCS, phydev->addr);
1092
1093}
1094EXPORT_SYMBOL(phy_get_eee_err);
1095
1096/**
1097 * phy_ethtool_get_eee - get EEE supported and status
1098 * @phydev: target phy_device struct
1099 * @data: ethtool_eee data
1100 *
1101 * Description: it reportes the Supported/Advertisement/LP Advertisement
1102 * capabilities.
1103 */
1104int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1105{
1106 int val;
1107
1108 /* Get Supported EEE */
1109 val = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
1110 MDIO_MMD_PCS, phydev->addr);
1111 if (val < 0)
1112 return val;
b32607dd 1113 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
a59a4d19
GC
1114
1115 /* Get advertisement EEE */
1116 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1117 MDIO_MMD_AN, phydev->addr);
1118 if (val < 0)
1119 return val;
b32607dd 1120 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1121
1122 /* Get LP advertisement EEE */
1123 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
1124 MDIO_MMD_AN, phydev->addr);
1125 if (val < 0)
1126 return val;
b32607dd 1127 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1128
1129 return 0;
1130}
1131EXPORT_SYMBOL(phy_ethtool_get_eee);
1132
1133/**
1134 * phy_ethtool_set_eee - set EEE supported and status
1135 * @phydev: target phy_device struct
1136 * @data: ethtool_eee data
1137 *
1138 * Description: it is to program the Advertisement EEE register.
1139 */
1140int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1141{
1142 int val;
1143
b32607dd 1144 val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19
GC
1145 phy_write_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV, MDIO_MMD_AN,
1146 phydev->addr, val);
1147
1148 return 0;
1149}
1150EXPORT_SYMBOL(phy_ethtool_set_eee);
42e836eb
MS
1151
1152int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1153{
1154 if (phydev->drv->set_wol)
1155 return phydev->drv->set_wol(phydev, wol);
1156
1157 return -EOPNOTSUPP;
1158}
1159EXPORT_SYMBOL(phy_ethtool_set_wol);
1160
1161void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1162{
1163 if (phydev->drv->get_wol)
1164 phydev->drv->get_wol(phydev, wol);
1165}
1166EXPORT_SYMBOL(phy_ethtool_get_wol);