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2f53e904 1/* Framework for configuring and reading PHY devices
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AF
2 * Based on code in sungem_phy.c and gianfar_phy.c
3 *
4 * Author: Andy Fleming
5 *
6 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 7 * Copyright (c) 2006, 2007 Maciej W. Rozycki
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AF
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
8d242488
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15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
00db8189 18#include <linux/kernel.h>
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AF
19#include <linux/string.h>
20#include <linux/errno.h>
21#include <linux/unistd.h>
00db8189 22#include <linux/interrupt.h>
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AF
23#include <linux/delay.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/skbuff.h>
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AF
27#include <linux/mm.h>
28#include <linux/module.h>
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AF
29#include <linux/mii.h>
30#include <linux/ethtool.h>
31#include <linux/phy.h>
3c3070d7
MR
32#include <linux/timer.h>
33#include <linux/workqueue.h>
a59a4d19 34#include <linux/mdio.h>
2f53e904
SS
35#include <linux/io.h>
36#include <linux/uaccess.h>
60063497 37#include <linux/atomic.h>
2f53e904 38
00db8189 39#include <asm/irq.h>
00db8189 40
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RD
41/**
42 * phy_print_status - Convenience function to print out the current phy status
43 * @phydev: the phy_device struct
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AF
44 */
45void phy_print_status(struct phy_device *phydev)
46{
2f53e904 47 if (phydev->link) {
43b6329f 48 netdev_info(phydev->attached_dev, "Link is Up - %d/%s\n",
8d242488
JP
49 phydev->speed,
50 DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
2f53e904 51 } else {
43b6329f 52 netdev_info(phydev->attached_dev, "Link is Down\n");
2f53e904 53 }
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AF
54}
55EXPORT_SYMBOL(phy_print_status);
00db8189 56
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RD
57/**
58 * phy_clear_interrupt - Ack the phy device's interrupt
59 * @phydev: the phy_device struct
60 *
61 * If the @phydev driver has an ack_interrupt function, call it to
62 * ack and clear the phy device's interrupt.
63 *
64 * Returns 0 on success on < 0 on error.
65 */
89ff05ec 66static int phy_clear_interrupt(struct phy_device *phydev)
00db8189 67{
00db8189 68 if (phydev->drv->ack_interrupt)
e62a768f 69 return phydev->drv->ack_interrupt(phydev);
00db8189 70
e62a768f 71 return 0;
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AF
72}
73
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RD
74/**
75 * phy_config_interrupt - configure the PHY device for the requested interrupts
76 * @phydev: the phy_device struct
77 * @interrupts: interrupt flags to configure for this @phydev
78 *
79 * Returns 0 on success on < 0 on error.
80 */
89ff05ec 81static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
00db8189 82{
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AF
83 phydev->interrupts = interrupts;
84 if (phydev->drv->config_intr)
e62a768f 85 return phydev->drv->config_intr(phydev);
00db8189 86
e62a768f 87 return 0;
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AF
88}
89
90
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RD
91/**
92 * phy_aneg_done - return auto-negotiation status
93 * @phydev: target phy_device struct
00db8189 94 *
b3df0da8 95 * Description: Reads the status register and returns 0 either if
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AF
96 * auto-negotiation is incomplete, or if there was an error.
97 * Returns BMSR_ANEGCOMPLETE if auto-negotiation is done.
98 */
99static inline int phy_aneg_done(struct phy_device *phydev)
100{
553fe92b 101 int retval = phy_read(phydev, MII_BMSR);
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102
103 return (retval < 0) ? retval : (retval & BMSR_ANEGCOMPLETE);
104}
105
00db8189 106/* A structure for mapping a particular speed and duplex
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SS
107 * combination to a particular SUPPORTED and ADVERTISED value
108 */
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AF
109struct phy_setting {
110 int speed;
111 int duplex;
112 u32 setting;
113};
114
115/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 116static const struct phy_setting settings[] = {
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AF
117 {
118 .speed = 10000,
119 .duplex = DUPLEX_FULL,
120 .setting = SUPPORTED_10000baseT_Full,
121 },
122 {
123 .speed = SPEED_1000,
124 .duplex = DUPLEX_FULL,
125 .setting = SUPPORTED_1000baseT_Full,
126 },
127 {
128 .speed = SPEED_1000,
129 .duplex = DUPLEX_HALF,
130 .setting = SUPPORTED_1000baseT_Half,
131 },
132 {
133 .speed = SPEED_100,
134 .duplex = DUPLEX_FULL,
135 .setting = SUPPORTED_100baseT_Full,
136 },
137 {
138 .speed = SPEED_100,
139 .duplex = DUPLEX_HALF,
140 .setting = SUPPORTED_100baseT_Half,
141 },
142 {
143 .speed = SPEED_10,
144 .duplex = DUPLEX_FULL,
145 .setting = SUPPORTED_10baseT_Full,
146 },
147 {
148 .speed = SPEED_10,
149 .duplex = DUPLEX_HALF,
150 .setting = SUPPORTED_10baseT_Half,
151 },
152};
153
ff8ac609 154#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 155
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RD
156/**
157 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
158 * @speed: speed to match
159 * @duplex: duplex to match
00db8189 160 *
b3df0da8 161 * Description: Searches the settings array for the setting which
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AF
162 * matches the desired speed and duplex, and returns the index
163 * of that setting. Returns the index of the last setting if
164 * none of the others match.
165 */
166static inline int phy_find_setting(int speed, int duplex)
167{
168 int idx = 0;
169
170 while (idx < ARRAY_SIZE(settings) &&
2f53e904 171 (settings[idx].speed != speed || settings[idx].duplex != duplex))
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AF
172 idx++;
173
174 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
175}
176
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RD
177/**
178 * phy_find_valid - find a PHY setting that matches the requested features mask
179 * @idx: The first index in settings[] to search
180 * @features: A mask of the valid settings
00db8189 181 *
b3df0da8 182 * Description: Returns the index of the first valid setting less
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AF
183 * than or equal to the one pointed to by idx, as determined by
184 * the mask in features. Returns the index of the last setting
185 * if nothing else matches.
186 */
187static inline int phy_find_valid(int idx, u32 features)
188{
189 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
190 idx++;
191
192 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
193}
194
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RD
195/**
196 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
197 * @phydev: the target phy_device struct
00db8189 198 *
b3df0da8 199 * Description: Make sure the PHY is set to supported speeds and
00db8189 200 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 201 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 202 */
89ff05ec 203static void phy_sanitize_settings(struct phy_device *phydev)
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AF
204{
205 u32 features = phydev->supported;
206 int idx;
207
208 /* Sanitize settings based on PHY capabilities */
209 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 210 phydev->autoneg = AUTONEG_DISABLE;
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AF
211
212 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
213 features);
214
215 phydev->speed = settings[idx].speed;
216 phydev->duplex = settings[idx].duplex;
217}
00db8189 218
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RD
219/**
220 * phy_ethtool_sset - generic ethtool sset function, handles all the details
221 * @phydev: target phy_device struct
222 * @cmd: ethtool_cmd
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223 *
224 * A few notes about parameter checking:
225 * - We don't set port or transceiver, so we don't care what they
226 * were set to.
227 * - phy_start_aneg() will make sure forced settings are sane, and
228 * choose the next best ones from the ones selected, so we don't
b3df0da8 229 * care if ethtool tries to give us bad values.
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230 */
231int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
232{
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DD
233 u32 speed = ethtool_cmd_speed(cmd);
234
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235 if (cmd->phy_address != phydev->addr)
236 return -EINVAL;
237
2f53e904 238 /* We make sure that we don't pass unsupported values in to the PHY */
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AF
239 cmd->advertising &= phydev->supported;
240
241 /* Verify the settings we care about. */
242 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
243 return -EINVAL;
244
245 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
246 return -EINVAL;
247
8e95a202 248 if (cmd->autoneg == AUTONEG_DISABLE &&
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DD
249 ((speed != SPEED_1000 &&
250 speed != SPEED_100 &&
251 speed != SPEED_10) ||
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JP
252 (cmd->duplex != DUPLEX_HALF &&
253 cmd->duplex != DUPLEX_FULL)))
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254 return -EINVAL;
255
256 phydev->autoneg = cmd->autoneg;
257
25db0338 258 phydev->speed = speed;
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259
260 phydev->advertising = cmd->advertising;
261
262 if (AUTONEG_ENABLE == cmd->autoneg)
263 phydev->advertising |= ADVERTISED_Autoneg;
264 else
265 phydev->advertising &= ~ADVERTISED_Autoneg;
266
267 phydev->duplex = cmd->duplex;
268
269 /* Restart the PHY */
270 phy_start_aneg(phydev);
271
272 return 0;
273}
9f6d55d0 274EXPORT_SYMBOL(phy_ethtool_sset);
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AF
275
276int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
277{
278 cmd->supported = phydev->supported;
279
280 cmd->advertising = phydev->advertising;
114002bc 281 cmd->lp_advertising = phydev->lp_advertising;
00db8189 282
70739497 283 ethtool_cmd_speed_set(cmd, phydev->speed);
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AF
284 cmd->duplex = phydev->duplex;
285 cmd->port = PORT_MII;
286 cmd->phy_address = phydev->addr;
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FF
287 cmd->transceiver = phy_is_internal(phydev) ?
288 XCVR_INTERNAL : XCVR_EXTERNAL;
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AF
289 cmd->autoneg = phydev->autoneg;
290
291 return 0;
292}
9f6d55d0 293EXPORT_SYMBOL(phy_ethtool_gset);
00db8189 294
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RD
295/**
296 * phy_mii_ioctl - generic PHY MII ioctl interface
297 * @phydev: the phy_device struct
00c7d920 298 * @ifr: &struct ifreq for socket ioctl's
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RD
299 * @cmd: ioctl cmd to execute
300 *
301 * Note that this function is currently incompatible with the
00db8189 302 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 303 * current state. Use at own risk.
00db8189 304 */
2f53e904 305int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd)
00db8189 306{
28b04113 307 struct mii_ioctl_data *mii_data = if_mii(ifr);
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AF
308 u16 val = mii_data->val_in;
309
310 switch (cmd) {
311 case SIOCGMIIPHY:
312 mii_data->phy_id = phydev->addr;
c6d6a511
LB
313 /* fall through */
314
00db8189 315 case SIOCGMIIREG:
af1dc13e
PK
316 mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
317 mii_data->reg_num);
e62a768f 318 return 0;
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AF
319
320 case SIOCSMIIREG:
00db8189 321 if (mii_data->phy_id == phydev->addr) {
e109374f 322 switch (mii_data->reg_num) {
00db8189 323 case MII_BMCR:
2f53e904 324 if ((val & (BMCR_RESET | BMCR_ANENABLE)) == 0)
00db8189
AF
325 phydev->autoneg = AUTONEG_DISABLE;
326 else
327 phydev->autoneg = AUTONEG_ENABLE;
2f53e904 328 if (!phydev->autoneg && (val & BMCR_FULLDPLX))
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AF
329 phydev->duplex = DUPLEX_FULL;
330 else
331 phydev->duplex = DUPLEX_HALF;
2f53e904 332 if (!phydev->autoneg && (val & BMCR_SPEED1000))
024a0a3c 333 phydev->speed = SPEED_1000;
2f53e904
SS
334 else if (!phydev->autoneg &&
335 (val & BMCR_SPEED100))
024a0a3c 336 phydev->speed = SPEED_100;
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AF
337 break;
338 case MII_ADVERTISE:
339 phydev->advertising = val;
340 break;
341 default:
342 /* do nothing */
343 break;
344 }
345 }
346
af1dc13e
PK
347 mdiobus_write(phydev->bus, mii_data->phy_id,
348 mii_data->reg_num, val);
349
8e95a202 350 if (mii_data->reg_num == MII_BMCR &&
2613f95f 351 val & BMCR_RESET)
e62a768f
SS
352 return phy_init_hw(phydev);
353 return 0;
dda93b48 354
c1f19b51
RC
355 case SIOCSHWTSTAMP:
356 if (phydev->drv->hwtstamp)
357 return phydev->drv->hwtstamp(phydev, ifr);
358 /* fall through */
359
dda93b48 360 default:
c6d6a511 361 return -EOPNOTSUPP;
00db8189 362 }
00db8189 363}
680e9fe9 364EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 365
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RD
366/**
367 * phy_start_aneg - start auto-negotiation for this PHY device
368 * @phydev: the phy_device struct
e1393456 369 *
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RD
370 * Description: Sanitizes the settings (if we're not autonegotiating
371 * them), and then calls the driver's config_aneg function.
372 * If the PHYCONTROL Layer is operating, we change the state to
373 * reflect the beginning of Auto-negotiation or forcing.
e1393456
AF
374 */
375int phy_start_aneg(struct phy_device *phydev)
376{
377 int err;
378
35b5f6b1 379 mutex_lock(&phydev->lock);
e1393456
AF
380
381 if (AUTONEG_DISABLE == phydev->autoneg)
382 phy_sanitize_settings(phydev);
383
384 err = phydev->drv->config_aneg(phydev);
e1393456
AF
385 if (err < 0)
386 goto out_unlock;
387
388 if (phydev->state != PHY_HALTED) {
389 if (AUTONEG_ENABLE == phydev->autoneg) {
390 phydev->state = PHY_AN;
391 phydev->link_timeout = PHY_AN_TIMEOUT;
392 } else {
393 phydev->state = PHY_FORCING;
394 phydev->link_timeout = PHY_FORCE_TIMEOUT;
395 }
396 }
397
398out_unlock:
35b5f6b1 399 mutex_unlock(&phydev->lock);
e1393456
AF
400 return err;
401}
402EXPORT_SYMBOL(phy_start_aneg);
403
b3df0da8
RD
404/**
405 * phy_start_machine - start PHY state machine tracking
406 * @phydev: the phy_device struct
00db8189 407 *
b3df0da8 408 * Description: The PHY infrastructure can run a state machine
00db8189
AF
409 * which tracks whether the PHY is starting up, negotiating,
410 * etc. This function starts the timer which tracks the state
29935aeb
SS
411 * of the PHY. If you want to maintain your own state machine,
412 * do not call this function.
b3df0da8 413 */
29935aeb 414void phy_start_machine(struct phy_device *phydev)
00db8189 415{
bbb47bde 416 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
00db8189
AF
417}
418
b3df0da8
RD
419/**
420 * phy_stop_machine - stop the PHY state machine tracking
421 * @phydev: target phy_device struct
00db8189 422 *
b3df0da8 423 * Description: Stops the state machine timer, sets the state to UP
817acf5e 424 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
425 * phy_detach.
426 */
427void phy_stop_machine(struct phy_device *phydev)
428{
a390d1f3 429 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 430
35b5f6b1 431 mutex_lock(&phydev->lock);
00db8189
AF
432 if (phydev->state > PHY_UP)
433 phydev->state = PHY_UP;
35b5f6b1 434 mutex_unlock(&phydev->lock);
00db8189
AF
435}
436
b3df0da8
RD
437/**
438 * phy_error - enter HALTED state for this PHY device
439 * @phydev: target phy_device struct
00db8189
AF
440 *
441 * Moves the PHY to the HALTED state in response to a read
442 * or write error, and tells the controller the link is down.
443 * Must not be called from interrupt context, or while the
444 * phydev->lock is held.
445 */
9b9a8bfc 446static void phy_error(struct phy_device *phydev)
00db8189 447{
35b5f6b1 448 mutex_lock(&phydev->lock);
00db8189 449 phydev->state = PHY_HALTED;
35b5f6b1 450 mutex_unlock(&phydev->lock);
00db8189
AF
451}
452
b3df0da8
RD
453/**
454 * phy_interrupt - PHY interrupt handler
455 * @irq: interrupt line
456 * @phy_dat: phy_device pointer
e1393456 457 *
b3df0da8 458 * Description: When a PHY interrupt occurs, the handler disables
e1393456
AF
459 * interrupts, and schedules a work task to clear the interrupt.
460 */
7d12e780 461static irqreturn_t phy_interrupt(int irq, void *phy_dat)
e1393456
AF
462{
463 struct phy_device *phydev = phy_dat;
464
3c3070d7
MR
465 if (PHY_HALTED == phydev->state)
466 return IRQ_NONE; /* It can't be ours. */
467
e1393456
AF
468 /* The MDIO bus is not allowed to be written in interrupt
469 * context, so we need to disable the irq here. A work
470 * queue will write the PHY to disable and clear the
2f53e904
SS
471 * interrupt, and then reenable the irq line.
472 */
e1393456 473 disable_irq_nosync(irq);
0ac49527 474 atomic_inc(&phydev->irq_disable);
e1393456 475
bbb47bde 476 queue_work(system_power_efficient_wq, &phydev->phy_queue);
e1393456
AF
477
478 return IRQ_HANDLED;
479}
480
b3df0da8
RD
481/**
482 * phy_enable_interrupts - Enable the interrupts from the PHY side
483 * @phydev: target phy_device struct
484 */
89ff05ec 485static int phy_enable_interrupts(struct phy_device *phydev)
00db8189 486{
553fe92b 487 int err = phy_clear_interrupt(phydev);
00db8189 488
e1393456
AF
489 if (err < 0)
490 return err;
00db8189 491
553fe92b 492 return phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189 493}
00db8189 494
b3df0da8
RD
495/**
496 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
497 * @phydev: target phy_device struct
498 */
89ff05ec 499static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
500{
501 int err;
502
503 /* Disable PHY interrupts */
504 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
00db8189
AF
505 if (err)
506 goto phy_err;
507
508 /* Clear the interrupt */
509 err = phy_clear_interrupt(phydev);
00db8189
AF
510 if (err)
511 goto phy_err;
512
513 return 0;
514
515phy_err:
516 phy_error(phydev);
517
518 return err;
519}
e1393456 520
b3df0da8
RD
521/**
522 * phy_start_interrupts - request and enable interrupts for a PHY device
523 * @phydev: target phy_device struct
e1393456 524 *
b3df0da8
RD
525 * Description: Request the interrupt for the given PHY.
526 * If this fails, then we set irq to PHY_POLL.
e1393456 527 * Otherwise, we enable the interrupts in the PHY.
e1393456 528 * This should only be called with a valid IRQ number.
b3df0da8 529 * Returns 0 on success or < 0 on error.
e1393456
AF
530 */
531int phy_start_interrupts(struct phy_device *phydev)
532{
0ac49527 533 atomic_set(&phydev->irq_disable, 0);
33c133cc
SS
534 if (request_irq(phydev->irq, phy_interrupt, 0, "phy_interrupt",
535 phydev) < 0) {
8d242488
JP
536 pr_warn("%s: Can't get IRQ %d (PHY)\n",
537 phydev->bus->name, phydev->irq);
e1393456
AF
538 phydev->irq = PHY_POLL;
539 return 0;
540 }
541
e62a768f 542 return phy_enable_interrupts(phydev);
e1393456
AF
543}
544EXPORT_SYMBOL(phy_start_interrupts);
545
b3df0da8
RD
546/**
547 * phy_stop_interrupts - disable interrupts from a PHY device
548 * @phydev: target phy_device struct
549 */
e1393456
AF
550int phy_stop_interrupts(struct phy_device *phydev)
551{
553fe92b 552 int err = phy_disable_interrupts(phydev);
e1393456
AF
553
554 if (err)
555 phy_error(phydev);
556
0ac49527
MR
557 free_irq(phydev->irq, phydev);
558
2f53e904 559 /* Cannot call flush_scheduled_work() here as desired because
0ac49527
MR
560 * of rtnl_lock(), but we do not really care about what would
561 * be done, except from enable_irq(), so cancel any work
562 * possibly pending and take care of the matter below.
3c3070d7 563 */
28e53bdd 564 cancel_work_sync(&phydev->phy_queue);
2f53e904 565 /* If work indeed has been cancelled, disable_irq() will have
0ac49527
MR
566 * been left unbalanced from phy_interrupt() and enable_irq()
567 * has to be called so that other devices on the line work.
568 */
569 while (atomic_dec_return(&phydev->irq_disable) >= 0)
570 enable_irq(phydev->irq);
e1393456
AF
571
572 return err;
573}
574EXPORT_SYMBOL(phy_stop_interrupts);
575
b3df0da8
RD
576/**
577 * phy_change - Scheduled by the phy_interrupt/timer to handle PHY changes
578 * @work: work_struct that describes the work to be done
579 */
5ea94e76 580void phy_change(struct work_struct *work)
e1393456 581{
c4028958
DH
582 struct phy_device *phydev =
583 container_of(work, struct phy_device, phy_queue);
e1393456 584
a8729eb3
AG
585 if (phydev->drv->did_interrupt &&
586 !phydev->drv->did_interrupt(phydev))
587 goto ignore;
588
e62a768f 589 if (phy_disable_interrupts(phydev))
e1393456
AF
590 goto phy_err;
591
35b5f6b1 592 mutex_lock(&phydev->lock);
e1393456
AF
593 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
594 phydev->state = PHY_CHANGELINK;
35b5f6b1 595 mutex_unlock(&phydev->lock);
e1393456 596
0ac49527 597 atomic_dec(&phydev->irq_disable);
e1393456
AF
598 enable_irq(phydev->irq);
599
600 /* Reenable interrupts */
e62a768f
SS
601 if (PHY_HALTED != phydev->state &&
602 phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED))
e1393456
AF
603 goto irq_enable_err;
604
a390d1f3
MS
605 /* reschedule state queue work to run as soon as possible */
606 cancel_delayed_work_sync(&phydev->state_queue);
bbb47bde 607 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
e1393456
AF
608 return;
609
a8729eb3
AG
610ignore:
611 atomic_dec(&phydev->irq_disable);
612 enable_irq(phydev->irq);
613 return;
614
e1393456
AF
615irq_enable_err:
616 disable_irq(phydev->irq);
0ac49527 617 atomic_inc(&phydev->irq_disable);
e1393456
AF
618phy_err:
619 phy_error(phydev);
620}
621
b3df0da8
RD
622/**
623 * phy_stop - Bring down the PHY link, and stop checking the status
624 * @phydev: target phy_device struct
625 */
e1393456
AF
626void phy_stop(struct phy_device *phydev)
627{
35b5f6b1 628 mutex_lock(&phydev->lock);
e1393456
AF
629
630 if (PHY_HALTED == phydev->state)
631 goto out_unlock;
632
2c7b4921 633 if (phy_interrupt_is_valid(phydev)) {
e1393456
AF
634 /* Disable PHY Interrupts */
635 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 636
3c3070d7
MR
637 /* Clear any pending interrupts */
638 phy_clear_interrupt(phydev);
639 }
e1393456 640
6daf6531
MR
641 phydev->state = PHY_HALTED;
642
e1393456 643out_unlock:
35b5f6b1 644 mutex_unlock(&phydev->lock);
3c3070d7 645
2f53e904 646 /* Cannot call flush_scheduled_work() here as desired because
3c3070d7
MR
647 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
648 * will not reenable interrupts.
649 */
e1393456 650}
2f53e904 651EXPORT_SYMBOL(phy_stop);
e1393456 652
b3df0da8
RD
653/**
654 * phy_start - start or restart a PHY device
655 * @phydev: target phy_device struct
e1393456 656 *
b3df0da8 657 * Description: Indicates the attached device's readiness to
e1393456
AF
658 * handle PHY-related work. Used during startup to start the
659 * PHY, and after a call to phy_stop() to resume operation.
660 * Also used to indicate the MDIO bus has cleared an error
661 * condition.
662 */
663void phy_start(struct phy_device *phydev)
664{
35b5f6b1 665 mutex_lock(&phydev->lock);
e1393456
AF
666
667 switch (phydev->state) {
e109374f
FF
668 case PHY_STARTING:
669 phydev->state = PHY_PENDING;
670 break;
671 case PHY_READY:
672 phydev->state = PHY_UP;
673 break;
674 case PHY_HALTED:
675 phydev->state = PHY_RESUMING;
676 default:
677 break;
e1393456 678 }
35b5f6b1 679 mutex_unlock(&phydev->lock);
e1393456 680}
e1393456 681EXPORT_SYMBOL(phy_start);
67c4f3fa 682
35b5f6b1
NC
683/**
684 * phy_state_machine - Handle the state machine
685 * @work: work_struct that describes the work to be done
35b5f6b1 686 */
4f9c85a1 687void phy_state_machine(struct work_struct *work)
00db8189 688{
bf6aede7 689 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 690 struct phy_device *phydev =
a390d1f3 691 container_of(dwork, struct phy_device, state_queue);
be9dad1f 692 int needs_aneg = 0, do_suspend = 0;
00db8189
AF
693 int err = 0;
694
35b5f6b1 695 mutex_lock(&phydev->lock);
00db8189 696
e109374f
FF
697 switch (phydev->state) {
698 case PHY_DOWN:
699 case PHY_STARTING:
700 case PHY_READY:
701 case PHY_PENDING:
702 break;
703 case PHY_UP:
704 needs_aneg = 1;
00db8189 705
e109374f
FF
706 phydev->link_timeout = PHY_AN_TIMEOUT;
707
708 break;
709 case PHY_AN:
710 err = phy_read_status(phydev);
e109374f 711 if (err < 0)
00db8189 712 break;
6b655529 713
2f53e904 714 /* If the link is down, give up on negotiation for now */
e109374f
FF
715 if (!phydev->link) {
716 phydev->state = PHY_NOLINK;
717 netif_carrier_off(phydev->attached_dev);
718 phydev->adjust_link(phydev->attached_dev);
719 break;
720 }
6b655529 721
2f53e904 722 /* Check if negotiation is done. Break if there's an error */
e109374f
FF
723 err = phy_aneg_done(phydev);
724 if (err < 0)
725 break;
6b655529 726
e109374f
FF
727 /* If AN is done, we're running */
728 if (err > 0) {
729 phydev->state = PHY_RUNNING;
730 netif_carrier_on(phydev->attached_dev);
731 phydev->adjust_link(phydev->attached_dev);
00db8189 732
e109374f
FF
733 } else if (0 == phydev->link_timeout--) {
734 needs_aneg = 1;
2f53e904 735 /* If we have the magic_aneg bit, we try again */
e109374f
FF
736 if (phydev->drv->flags & PHY_HAS_MAGICANEG)
737 break;
738 }
739 break;
740 case PHY_NOLINK:
741 err = phy_read_status(phydev);
e109374f 742 if (err)
00db8189 743 break;
00db8189 744
e109374f
FF
745 if (phydev->link) {
746 phydev->state = PHY_RUNNING;
747 netif_carrier_on(phydev->attached_dev);
748 phydev->adjust_link(phydev->attached_dev);
749 }
750 break;
751 case PHY_FORCING:
752 err = genphy_update_link(phydev);
e109374f 753 if (err)
00db8189 754 break;
00db8189 755
e109374f
FF
756 if (phydev->link) {
757 phydev->state = PHY_RUNNING;
758 netif_carrier_on(phydev->attached_dev);
759 } else {
760 if (0 == phydev->link_timeout--)
761 needs_aneg = 1;
762 }
00db8189 763
e109374f
FF
764 phydev->adjust_link(phydev->attached_dev);
765 break;
766 case PHY_RUNNING:
767 /* Only register a CHANGE if we are
768 * polling or ignoring interrupts
769 */
770 if (!phy_interrupt_is_valid(phydev))
771 phydev->state = PHY_CHANGELINK;
772 break;
773 case PHY_CHANGELINK:
774 err = phy_read_status(phydev);
e109374f 775 if (err)
00db8189 776 break;
00db8189 777
e109374f
FF
778 if (phydev->link) {
779 phydev->state = PHY_RUNNING;
780 netif_carrier_on(phydev->attached_dev);
781 } else {
782 phydev->state = PHY_NOLINK;
783 netif_carrier_off(phydev->attached_dev);
784 }
00db8189 785
e109374f 786 phydev->adjust_link(phydev->attached_dev);
00db8189 787
e109374f
FF
788 if (phy_interrupt_is_valid(phydev))
789 err = phy_config_interrupt(phydev,
2f53e904 790 PHY_INTERRUPT_ENABLED);
e109374f
FF
791 break;
792 case PHY_HALTED:
793 if (phydev->link) {
794 phydev->link = 0;
795 netif_carrier_off(phydev->attached_dev);
00db8189 796 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
797 do_suspend = 1;
798 }
799 break;
800 case PHY_RESUMING:
e109374f 801 err = phy_clear_interrupt(phydev);
e109374f
FF
802 if (err)
803 break;
00db8189 804
2f53e904 805 err = phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
e109374f
FF
806 if (err)
807 break;
00db8189 808
e109374f
FF
809 if (AUTONEG_ENABLE == phydev->autoneg) {
810 err = phy_aneg_done(phydev);
811 if (err < 0)
00db8189
AF
812 break;
813
e109374f 814 /* err > 0 if AN is done.
2f53e904
SS
815 * Otherwise, it's 0, and we're still waiting for AN
816 */
e109374f 817 if (err > 0) {
42caa074
WF
818 err = phy_read_status(phydev);
819 if (err)
820 break;
821
822 if (phydev->link) {
823 phydev->state = PHY_RUNNING;
824 netif_carrier_on(phydev->attached_dev);
2f53e904 825 } else {
42caa074 826 phydev->state = PHY_NOLINK;
2f53e904 827 }
42caa074 828 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
829 } else {
830 phydev->state = PHY_AN;
831 phydev->link_timeout = PHY_AN_TIMEOUT;
42caa074 832 }
e109374f
FF
833 } else {
834 err = phy_read_status(phydev);
835 if (err)
836 break;
837
838 if (phydev->link) {
839 phydev->state = PHY_RUNNING;
840 netif_carrier_on(phydev->attached_dev);
2f53e904 841 } else {
e109374f 842 phydev->state = PHY_NOLINK;
2f53e904 843 }
e109374f
FF
844 phydev->adjust_link(phydev->attached_dev);
845 }
846 break;
00db8189
AF
847 }
848
35b5f6b1 849 mutex_unlock(&phydev->lock);
00db8189
AF
850
851 if (needs_aneg)
852 err = phy_start_aneg(phydev);
853
be9dad1f
SH
854 if (do_suspend)
855 phy_suspend(phydev);
856
00db8189
AF
857 if (err < 0)
858 phy_error(phydev);
859
bbb47bde 860 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
2f53e904 861 PHY_STATE_TIME * HZ);
35b5f6b1 862}
a59a4d19 863
5ea94e76
FF
864void phy_mac_interrupt(struct phy_device *phydev, int new_link)
865{
866 cancel_work_sync(&phydev->phy_queue);
867 phydev->link = new_link;
868 schedule_work(&phydev->phy_queue);
869}
870EXPORT_SYMBOL(phy_mac_interrupt);
871
a59a4d19
GC
872static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
873 int addr)
874{
875 /* Write the desired MMD Devad */
876 bus->write(bus, addr, MII_MMD_CTRL, devad);
877
878 /* Write the desired MMD register address */
879 bus->write(bus, addr, MII_MMD_DATA, prtad);
880
881 /* Select the Function : DATA with no post increment */
882 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
883}
884
885/**
886 * phy_read_mmd_indirect - reads data from the MMD registers
887 * @bus: the target MII bus
888 * @prtad: MMD Address
889 * @devad: MMD DEVAD
890 * @addr: PHY address on the MII bus
891 *
892 * Description: it reads data from the MMD registers (clause 22 to access to
893 * clause 45) of the specified phy address.
894 * To read these register we have:
895 * 1) Write reg 13 // DEVAD
896 * 2) Write reg 14 // MMD Address
897 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
898 * 3) Read reg 14 // Read MMD data
899 */
900static int phy_read_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
901 int addr)
902{
a59a4d19
GC
903 mmd_phy_indirect(bus, prtad, devad, addr);
904
905 /* Read the content of the MMD's selected register */
e62a768f 906 return bus->read(bus, addr, MII_MMD_DATA);
a59a4d19
GC
907}
908
909/**
910 * phy_write_mmd_indirect - writes data to the MMD registers
911 * @bus: the target MII bus
912 * @prtad: MMD Address
913 * @devad: MMD DEVAD
914 * @addr: PHY address on the MII bus
915 * @data: data to write in the MMD register
916 *
917 * Description: Write data from the MMD registers of the specified
918 * phy address.
919 * To write these register we have:
920 * 1) Write reg 13 // DEVAD
921 * 2) Write reg 14 // MMD Address
922 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
923 * 3) Write reg 14 // Write MMD data
924 */
925static void phy_write_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
926 int addr, u32 data)
927{
928 mmd_phy_indirect(bus, prtad, devad, addr);
929
930 /* Write the data into MMD's selected register */
931 bus->write(bus, addr, MII_MMD_DATA, data);
932}
933
a59a4d19
GC
934/**
935 * phy_init_eee - init and check the EEE feature
936 * @phydev: target phy_device struct
937 * @clk_stop_enable: PHY may stop the clock during LPI
938 *
939 * Description: it checks if the Energy-Efficient Ethernet (EEE)
940 * is supported by looking at the MMD registers 3.20 and 7.60/61
941 * and it programs the MMD register 3.0 setting the "Clock stop enable"
942 * bit if required.
943 */
944int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
945{
a59a4d19
GC
946 /* According to 802.3az,the EEE is supported only in full duplex-mode.
947 * Also EEE feature is active when core is operating with MII, GMII
948 * or RGMII.
949 */
950 if ((phydev->duplex == DUPLEX_FULL) &&
951 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
952 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
953 (phydev->interface == PHY_INTERFACE_MODE_RGMII))) {
954 int eee_lp, eee_cap, eee_adv;
955 u32 lp, cap, adv;
956 int idx, status;
957
958 /* Read phy status to properly get the right settings */
959 status = phy_read_status(phydev);
960 if (status)
961 return status;
962
963 /* First check if the EEE ability is supported */
964 eee_cap = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
965 MDIO_MMD_PCS, phydev->addr);
966 if (eee_cap < 0)
967 return eee_cap;
968
b32607dd 969 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19 970 if (!cap)
e62a768f 971 return -EPROTONOSUPPORT;
a59a4d19
GC
972
973 /* Check which link settings negotiated and verify it in
974 * the EEE advertising registers.
975 */
976 eee_lp = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
977 MDIO_MMD_AN, phydev->addr);
978 if (eee_lp < 0)
979 return eee_lp;
980
981 eee_adv = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
982 MDIO_MMD_AN, phydev->addr);
983 if (eee_adv < 0)
984 return eee_adv;
985
b32607dd
AB
986 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
987 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
a59a4d19 988 idx = phy_find_setting(phydev->speed, phydev->duplex);
9a9c56cb 989 if (!(lp & adv & settings[idx].setting))
e62a768f 990 return -EPROTONOSUPPORT;
a59a4d19
GC
991
992 if (clk_stop_enable) {
993 /* Configure the PHY to stop receiving xMII
994 * clock while it is signaling LPI.
995 */
996 int val = phy_read_mmd_indirect(phydev->bus, MDIO_CTRL1,
997 MDIO_MMD_PCS,
998 phydev->addr);
999 if (val < 0)
1000 return val;
1001
1002 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
1003 phy_write_mmd_indirect(phydev->bus, MDIO_CTRL1,
1004 MDIO_MMD_PCS, phydev->addr, val);
1005 }
1006
e62a768f 1007 return 0; /* EEE supported */
a59a4d19
GC
1008 }
1009
e62a768f 1010 return -EPROTONOSUPPORT;
a59a4d19
GC
1011}
1012EXPORT_SYMBOL(phy_init_eee);
1013
1014/**
1015 * phy_get_eee_err - report the EEE wake error count
1016 * @phydev: target phy_device struct
1017 *
1018 * Description: it is to report the number of time where the PHY
1019 * failed to complete its normal wake sequence.
1020 */
1021int phy_get_eee_err(struct phy_device *phydev)
1022{
1023 return phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_WK_ERR,
1024 MDIO_MMD_PCS, phydev->addr);
a59a4d19
GC
1025}
1026EXPORT_SYMBOL(phy_get_eee_err);
1027
1028/**
1029 * phy_ethtool_get_eee - get EEE supported and status
1030 * @phydev: target phy_device struct
1031 * @data: ethtool_eee data
1032 *
1033 * Description: it reportes the Supported/Advertisement/LP Advertisement
1034 * capabilities.
1035 */
1036int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1037{
1038 int val;
1039
1040 /* Get Supported EEE */
1041 val = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
1042 MDIO_MMD_PCS, phydev->addr);
1043 if (val < 0)
1044 return val;
b32607dd 1045 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
a59a4d19
GC
1046
1047 /* Get advertisement EEE */
1048 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1049 MDIO_MMD_AN, phydev->addr);
1050 if (val < 0)
1051 return val;
b32607dd 1052 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1053
1054 /* Get LP advertisement EEE */
1055 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
1056 MDIO_MMD_AN, phydev->addr);
1057 if (val < 0)
1058 return val;
b32607dd 1059 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1060
1061 return 0;
1062}
1063EXPORT_SYMBOL(phy_ethtool_get_eee);
1064
1065/**
1066 * phy_ethtool_set_eee - set EEE supported and status
1067 * @phydev: target phy_device struct
1068 * @data: ethtool_eee data
1069 *
1070 * Description: it is to program the Advertisement EEE register.
1071 */
1072int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1073{
553fe92b 1074 int val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19 1075
a59a4d19
GC
1076 phy_write_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV, MDIO_MMD_AN,
1077 phydev->addr, val);
1078
1079 return 0;
1080}
1081EXPORT_SYMBOL(phy_ethtool_set_eee);
42e836eb
MS
1082
1083int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1084{
1085 if (phydev->drv->set_wol)
1086 return phydev->drv->set_wol(phydev, wol);
1087
1088 return -EOPNOTSUPP;
1089}
1090EXPORT_SYMBOL(phy_ethtool_set_wol);
1091
1092void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1093{
1094 if (phydev->drv->get_wol)
1095 phydev->drv->get_wol(phydev, wol);
1096}
1097EXPORT_SYMBOL(phy_ethtool_get_wol);