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2f53e904 1/* Framework for configuring and reading PHY devices
00db8189
AF
2 * Based on code in sungem_phy.c and gianfar_phy.c
3 *
4 * Author: Andy Fleming
5 *
6 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 7 * Copyright (c) 2006, 2007 Maciej W. Rozycki
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AF
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
8d242488
JP
15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
00db8189 18#include <linux/kernel.h>
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AF
19#include <linux/string.h>
20#include <linux/errno.h>
21#include <linux/unistd.h>
00db8189 22#include <linux/interrupt.h>
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AF
23#include <linux/delay.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/skbuff.h>
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AF
27#include <linux/mm.h>
28#include <linux/module.h>
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AF
29#include <linux/mii.h>
30#include <linux/ethtool.h>
31#include <linux/phy.h>
3c3070d7
MR
32#include <linux/timer.h>
33#include <linux/workqueue.h>
a59a4d19 34#include <linux/mdio.h>
2f53e904
SS
35#include <linux/io.h>
36#include <linux/uaccess.h>
60063497 37#include <linux/atomic.h>
2f53e904 38
00db8189 39#include <asm/irq.h>
00db8189 40
766d1d38
FF
41static const char *phy_speed_to_str(int speed)
42{
43 switch (speed) {
44 case SPEED_10:
45 return "10Mbps";
46 case SPEED_100:
47 return "100Mbps";
48 case SPEED_1000:
49 return "1Gbps";
50 case SPEED_2500:
51 return "2.5Gbps";
52 case SPEED_10000:
53 return "10Gbps";
54 case SPEED_UNKNOWN:
55 return "Unknown";
56 default:
57 return "Unsupported (update phy.c)";
58 }
59}
60
3e2186e0
FF
61#define PHY_STATE_STR(_state) \
62 case PHY_##_state: \
63 return __stringify(_state); \
64
65static const char *phy_state_to_str(enum phy_state st)
66{
67 switch (st) {
68 PHY_STATE_STR(DOWN)
69 PHY_STATE_STR(STARTING)
70 PHY_STATE_STR(READY)
71 PHY_STATE_STR(PENDING)
72 PHY_STATE_STR(UP)
73 PHY_STATE_STR(AN)
74 PHY_STATE_STR(RUNNING)
75 PHY_STATE_STR(NOLINK)
76 PHY_STATE_STR(FORCING)
77 PHY_STATE_STR(CHANGELINK)
78 PHY_STATE_STR(HALTED)
79 PHY_STATE_STR(RESUMING)
80 }
81
82 return NULL;
83}
84
85
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RD
86/**
87 * phy_print_status - Convenience function to print out the current phy status
88 * @phydev: the phy_device struct
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AF
89 */
90void phy_print_status(struct phy_device *phydev)
91{
2f53e904 92 if (phydev->link) {
df40cc88 93 netdev_info(phydev->attached_dev,
766d1d38
FF
94 "Link is Up - %s/%s - flow control %s\n",
95 phy_speed_to_str(phydev->speed),
df40cc88
FF
96 DUPLEX_FULL == phydev->duplex ? "Full" : "Half",
97 phydev->pause ? "rx/tx" : "off");
2f53e904 98 } else {
43b6329f 99 netdev_info(phydev->attached_dev, "Link is Down\n");
2f53e904 100 }
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AF
101}
102EXPORT_SYMBOL(phy_print_status);
00db8189 103
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RD
104/**
105 * phy_clear_interrupt - Ack the phy device's interrupt
106 * @phydev: the phy_device struct
107 *
108 * If the @phydev driver has an ack_interrupt function, call it to
109 * ack and clear the phy device's interrupt.
110 *
ad033506 111 * Returns 0 on success or < 0 on error.
b3df0da8 112 */
89ff05ec 113static int phy_clear_interrupt(struct phy_device *phydev)
00db8189 114{
00db8189 115 if (phydev->drv->ack_interrupt)
e62a768f 116 return phydev->drv->ack_interrupt(phydev);
00db8189 117
e62a768f 118 return 0;
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AF
119}
120
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RD
121/**
122 * phy_config_interrupt - configure the PHY device for the requested interrupts
123 * @phydev: the phy_device struct
124 * @interrupts: interrupt flags to configure for this @phydev
125 *
ad033506 126 * Returns 0 on success or < 0 on error.
b3df0da8 127 */
89ff05ec 128static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
00db8189 129{
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AF
130 phydev->interrupts = interrupts;
131 if (phydev->drv->config_intr)
e62a768f 132 return phydev->drv->config_intr(phydev);
00db8189 133
e62a768f 134 return 0;
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AF
135}
136
137
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RD
138/**
139 * phy_aneg_done - return auto-negotiation status
140 * @phydev: target phy_device struct
00db8189 141 *
76a423a3
FF
142 * Description: Return the auto-negotiation status from this @phydev
143 * Returns > 0 on success or < 0 on error. 0 means that auto-negotiation
144 * is still pending.
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AF
145 */
146static inline int phy_aneg_done(struct phy_device *phydev)
147{
76a423a3
FF
148 if (phydev->drv->aneg_done)
149 return phydev->drv->aneg_done(phydev);
150
a9fa6e6a 151 return genphy_aneg_done(phydev);
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AF
152}
153
00db8189 154/* A structure for mapping a particular speed and duplex
2f53e904
SS
155 * combination to a particular SUPPORTED and ADVERTISED value
156 */
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157struct phy_setting {
158 int speed;
159 int duplex;
160 u32 setting;
161};
162
163/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 164static const struct phy_setting settings[] = {
00db8189 165 {
3e707706
LT
166 .speed = SPEED_10000,
167 .duplex = DUPLEX_FULL,
168 .setting = SUPPORTED_10000baseKR_Full,
169 },
170 {
171 .speed = SPEED_10000,
172 .duplex = DUPLEX_FULL,
173 .setting = SUPPORTED_10000baseKX4_Full,
174 },
175 {
176 .speed = SPEED_10000,
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AF
177 .duplex = DUPLEX_FULL,
178 .setting = SUPPORTED_10000baseT_Full,
179 },
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LT
180 {
181 .speed = SPEED_2500,
182 .duplex = DUPLEX_FULL,
183 .setting = SUPPORTED_2500baseX_Full,
184 },
185 {
186 .speed = SPEED_1000,
187 .duplex = DUPLEX_FULL,
188 .setting = SUPPORTED_1000baseKX_Full,
189 },
00db8189
AF
190 {
191 .speed = SPEED_1000,
192 .duplex = DUPLEX_FULL,
193 .setting = SUPPORTED_1000baseT_Full,
194 },
195 {
196 .speed = SPEED_1000,
197 .duplex = DUPLEX_HALF,
198 .setting = SUPPORTED_1000baseT_Half,
199 },
200 {
201 .speed = SPEED_100,
202 .duplex = DUPLEX_FULL,
203 .setting = SUPPORTED_100baseT_Full,
204 },
205 {
206 .speed = SPEED_100,
207 .duplex = DUPLEX_HALF,
208 .setting = SUPPORTED_100baseT_Half,
209 },
210 {
211 .speed = SPEED_10,
212 .duplex = DUPLEX_FULL,
213 .setting = SUPPORTED_10baseT_Full,
214 },
215 {
216 .speed = SPEED_10,
217 .duplex = DUPLEX_HALF,
218 .setting = SUPPORTED_10baseT_Half,
219 },
220};
221
ff8ac609 222#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 223
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RD
224/**
225 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
226 * @speed: speed to match
227 * @duplex: duplex to match
00db8189 228 *
b3df0da8 229 * Description: Searches the settings array for the setting which
00db8189
AF
230 * matches the desired speed and duplex, and returns the index
231 * of that setting. Returns the index of the last setting if
232 * none of the others match.
233 */
4ae6e50c 234static inline unsigned int phy_find_setting(int speed, int duplex)
00db8189 235{
4ae6e50c 236 unsigned int idx = 0;
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AF
237
238 while (idx < ARRAY_SIZE(settings) &&
2f53e904 239 (settings[idx].speed != speed || settings[idx].duplex != duplex))
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AF
240 idx++;
241
242 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
243}
244
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RD
245/**
246 * phy_find_valid - find a PHY setting that matches the requested features mask
247 * @idx: The first index in settings[] to search
248 * @features: A mask of the valid settings
00db8189 249 *
b3df0da8 250 * Description: Returns the index of the first valid setting less
00db8189
AF
251 * than or equal to the one pointed to by idx, as determined by
252 * the mask in features. Returns the index of the last setting
253 * if nothing else matches.
254 */
4ae6e50c 255static inline unsigned int phy_find_valid(unsigned int idx, u32 features)
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AF
256{
257 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
258 idx++;
259
260 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
261}
262
54da5a8b
GR
263/**
264 * phy_check_valid - check if there is a valid PHY setting which matches
265 * speed, duplex, and feature mask
266 * @speed: speed to match
267 * @duplex: duplex to match
268 * @features: A mask of the valid settings
269 *
270 * Description: Returns true if there is a valid setting, false otherwise.
271 */
272static inline bool phy_check_valid(int speed, int duplex, u32 features)
273{
274 unsigned int idx;
275
276 idx = phy_find_valid(phy_find_setting(speed, duplex), features);
277
278 return settings[idx].speed == speed && settings[idx].duplex == duplex &&
279 (settings[idx].setting & features);
280}
281
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RD
282/**
283 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
284 * @phydev: the target phy_device struct
00db8189 285 *
b3df0da8 286 * Description: Make sure the PHY is set to supported speeds and
00db8189 287 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 288 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 289 */
89ff05ec 290static void phy_sanitize_settings(struct phy_device *phydev)
00db8189
AF
291{
292 u32 features = phydev->supported;
4ae6e50c 293 unsigned int idx;
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AF
294
295 /* Sanitize settings based on PHY capabilities */
296 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 297 phydev->autoneg = AUTONEG_DISABLE;
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AF
298
299 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
300 features);
301
302 phydev->speed = settings[idx].speed;
303 phydev->duplex = settings[idx].duplex;
304}
00db8189 305
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RD
306/**
307 * phy_ethtool_sset - generic ethtool sset function, handles all the details
308 * @phydev: target phy_device struct
309 * @cmd: ethtool_cmd
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AF
310 *
311 * A few notes about parameter checking:
312 * - We don't set port or transceiver, so we don't care what they
313 * were set to.
314 * - phy_start_aneg() will make sure forced settings are sane, and
315 * choose the next best ones from the ones selected, so we don't
b3df0da8 316 * care if ethtool tries to give us bad values.
00db8189
AF
317 */
318int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
319{
25db0338
DD
320 u32 speed = ethtool_cmd_speed(cmd);
321
00db8189
AF
322 if (cmd->phy_address != phydev->addr)
323 return -EINVAL;
324
2f53e904 325 /* We make sure that we don't pass unsupported values in to the PHY */
00db8189
AF
326 cmd->advertising &= phydev->supported;
327
328 /* Verify the settings we care about. */
329 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
330 return -EINVAL;
331
332 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
333 return -EINVAL;
334
8e95a202 335 if (cmd->autoneg == AUTONEG_DISABLE &&
25db0338
DD
336 ((speed != SPEED_1000 &&
337 speed != SPEED_100 &&
338 speed != SPEED_10) ||
8e95a202
JP
339 (cmd->duplex != DUPLEX_HALF &&
340 cmd->duplex != DUPLEX_FULL)))
00db8189
AF
341 return -EINVAL;
342
343 phydev->autoneg = cmd->autoneg;
344
25db0338 345 phydev->speed = speed;
00db8189
AF
346
347 phydev->advertising = cmd->advertising;
348
349 if (AUTONEG_ENABLE == cmd->autoneg)
350 phydev->advertising |= ADVERTISED_Autoneg;
351 else
352 phydev->advertising &= ~ADVERTISED_Autoneg;
353
354 phydev->duplex = cmd->duplex;
355
356 /* Restart the PHY */
357 phy_start_aneg(phydev);
358
359 return 0;
360}
9f6d55d0 361EXPORT_SYMBOL(phy_ethtool_sset);
00db8189
AF
362
363int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
364{
365 cmd->supported = phydev->supported;
366
367 cmd->advertising = phydev->advertising;
114002bc 368 cmd->lp_advertising = phydev->lp_advertising;
00db8189 369
70739497 370 ethtool_cmd_speed_set(cmd, phydev->speed);
00db8189 371 cmd->duplex = phydev->duplex;
c88838ce
FF
372 if (phydev->interface == PHY_INTERFACE_MODE_MOCA)
373 cmd->port = PORT_BNC;
374 else
375 cmd->port = PORT_MII;
00db8189 376 cmd->phy_address = phydev->addr;
4284b6a5
FF
377 cmd->transceiver = phy_is_internal(phydev) ?
378 XCVR_INTERNAL : XCVR_EXTERNAL;
00db8189
AF
379 cmd->autoneg = phydev->autoneg;
380
381 return 0;
382}
9f6d55d0 383EXPORT_SYMBOL(phy_ethtool_gset);
00db8189 384
b3df0da8
RD
385/**
386 * phy_mii_ioctl - generic PHY MII ioctl interface
387 * @phydev: the phy_device struct
00c7d920 388 * @ifr: &struct ifreq for socket ioctl's
b3df0da8
RD
389 * @cmd: ioctl cmd to execute
390 *
391 * Note that this function is currently incompatible with the
00db8189 392 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 393 * current state. Use at own risk.
00db8189 394 */
2f53e904 395int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd)
00db8189 396{
28b04113 397 struct mii_ioctl_data *mii_data = if_mii(ifr);
00db8189 398 u16 val = mii_data->val_in;
79ce0477 399 bool change_autoneg = false;
00db8189
AF
400
401 switch (cmd) {
402 case SIOCGMIIPHY:
403 mii_data->phy_id = phydev->addr;
c6d6a511
LB
404 /* fall through */
405
00db8189 406 case SIOCGMIIREG:
af1dc13e
PK
407 mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
408 mii_data->reg_num);
e62a768f 409 return 0;
00db8189
AF
410
411 case SIOCSMIIREG:
00db8189 412 if (mii_data->phy_id == phydev->addr) {
e109374f 413 switch (mii_data->reg_num) {
00db8189 414 case MII_BMCR:
79ce0477
BH
415 if ((val & (BMCR_RESET | BMCR_ANENABLE)) == 0) {
416 if (phydev->autoneg == AUTONEG_ENABLE)
417 change_autoneg = true;
00db8189 418 phydev->autoneg = AUTONEG_DISABLE;
79ce0477
BH
419 if (val & BMCR_FULLDPLX)
420 phydev->duplex = DUPLEX_FULL;
421 else
422 phydev->duplex = DUPLEX_HALF;
423 if (val & BMCR_SPEED1000)
424 phydev->speed = SPEED_1000;
425 else if (val & BMCR_SPEED100)
426 phydev->speed = SPEED_100;
427 else phydev->speed = SPEED_10;
428 }
429 else {
430 if (phydev->autoneg == AUTONEG_DISABLE)
431 change_autoneg = true;
00db8189 432 phydev->autoneg = AUTONEG_ENABLE;
79ce0477 433 }
00db8189
AF
434 break;
435 case MII_ADVERTISE:
79ce0477
BH
436 phydev->advertising = mii_adv_to_ethtool_adv_t(val);
437 change_autoneg = true;
00db8189
AF
438 break;
439 default:
440 /* do nothing */
441 break;
442 }
443 }
444
af1dc13e
PK
445 mdiobus_write(phydev->bus, mii_data->phy_id,
446 mii_data->reg_num, val);
447
8e95a202 448 if (mii_data->reg_num == MII_BMCR &&
2613f95f 449 val & BMCR_RESET)
e62a768f 450 return phy_init_hw(phydev);
79ce0477
BH
451
452 if (change_autoneg)
453 return phy_start_aneg(phydev);
454
e62a768f 455 return 0;
dda93b48 456
c1f19b51
RC
457 case SIOCSHWTSTAMP:
458 if (phydev->drv->hwtstamp)
459 return phydev->drv->hwtstamp(phydev, ifr);
460 /* fall through */
461
dda93b48 462 default:
c6d6a511 463 return -EOPNOTSUPP;
00db8189 464 }
00db8189 465}
680e9fe9 466EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 467
b3df0da8
RD
468/**
469 * phy_start_aneg - start auto-negotiation for this PHY device
470 * @phydev: the phy_device struct
e1393456 471 *
b3df0da8
RD
472 * Description: Sanitizes the settings (if we're not autonegotiating
473 * them), and then calls the driver's config_aneg function.
474 * If the PHYCONTROL Layer is operating, we change the state to
475 * reflect the beginning of Auto-negotiation or forcing.
e1393456
AF
476 */
477int phy_start_aneg(struct phy_device *phydev)
478{
479 int err;
480
35b5f6b1 481 mutex_lock(&phydev->lock);
e1393456
AF
482
483 if (AUTONEG_DISABLE == phydev->autoneg)
484 phy_sanitize_settings(phydev);
485
9b3320ef
BH
486 /* Invalidate LP advertising flags */
487 phydev->lp_advertising = 0;
488
e1393456 489 err = phydev->drv->config_aneg(phydev);
e1393456
AF
490 if (err < 0)
491 goto out_unlock;
492
493 if (phydev->state != PHY_HALTED) {
494 if (AUTONEG_ENABLE == phydev->autoneg) {
495 phydev->state = PHY_AN;
496 phydev->link_timeout = PHY_AN_TIMEOUT;
497 } else {
498 phydev->state = PHY_FORCING;
499 phydev->link_timeout = PHY_FORCE_TIMEOUT;
500 }
501 }
502
503out_unlock:
35b5f6b1 504 mutex_unlock(&phydev->lock);
e1393456
AF
505 return err;
506}
507EXPORT_SYMBOL(phy_start_aneg);
508
b3df0da8
RD
509/**
510 * phy_start_machine - start PHY state machine tracking
511 * @phydev: the phy_device struct
00db8189 512 *
b3df0da8 513 * Description: The PHY infrastructure can run a state machine
00db8189
AF
514 * which tracks whether the PHY is starting up, negotiating,
515 * etc. This function starts the timer which tracks the state
29935aeb
SS
516 * of the PHY. If you want to maintain your own state machine,
517 * do not call this function.
b3df0da8 518 */
29935aeb 519void phy_start_machine(struct phy_device *phydev)
00db8189 520{
bbb47bde 521 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
00db8189
AF
522}
523
b3df0da8
RD
524/**
525 * phy_stop_machine - stop the PHY state machine tracking
526 * @phydev: target phy_device struct
00db8189 527 *
b3df0da8 528 * Description: Stops the state machine timer, sets the state to UP
817acf5e 529 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
530 * phy_detach.
531 */
532void phy_stop_machine(struct phy_device *phydev)
533{
a390d1f3 534 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 535
35b5f6b1 536 mutex_lock(&phydev->lock);
00db8189
AF
537 if (phydev->state > PHY_UP)
538 phydev->state = PHY_UP;
35b5f6b1 539 mutex_unlock(&phydev->lock);
00db8189
AF
540}
541
b3df0da8
RD
542/**
543 * phy_error - enter HALTED state for this PHY device
544 * @phydev: target phy_device struct
00db8189
AF
545 *
546 * Moves the PHY to the HALTED state in response to a read
547 * or write error, and tells the controller the link is down.
548 * Must not be called from interrupt context, or while the
549 * phydev->lock is held.
550 */
9b9a8bfc 551static void phy_error(struct phy_device *phydev)
00db8189 552{
35b5f6b1 553 mutex_lock(&phydev->lock);
00db8189 554 phydev->state = PHY_HALTED;
35b5f6b1 555 mutex_unlock(&phydev->lock);
00db8189
AF
556}
557
b3df0da8
RD
558/**
559 * phy_interrupt - PHY interrupt handler
560 * @irq: interrupt line
561 * @phy_dat: phy_device pointer
e1393456 562 *
b3df0da8 563 * Description: When a PHY interrupt occurs, the handler disables
e1393456
AF
564 * interrupts, and schedules a work task to clear the interrupt.
565 */
7d12e780 566static irqreturn_t phy_interrupt(int irq, void *phy_dat)
e1393456
AF
567{
568 struct phy_device *phydev = phy_dat;
569
3c3070d7
MR
570 if (PHY_HALTED == phydev->state)
571 return IRQ_NONE; /* It can't be ours. */
572
e1393456
AF
573 /* The MDIO bus is not allowed to be written in interrupt
574 * context, so we need to disable the irq here. A work
575 * queue will write the PHY to disable and clear the
2f53e904
SS
576 * interrupt, and then reenable the irq line.
577 */
e1393456 578 disable_irq_nosync(irq);
0ac49527 579 atomic_inc(&phydev->irq_disable);
e1393456 580
bbb47bde 581 queue_work(system_power_efficient_wq, &phydev->phy_queue);
e1393456
AF
582
583 return IRQ_HANDLED;
584}
585
b3df0da8
RD
586/**
587 * phy_enable_interrupts - Enable the interrupts from the PHY side
588 * @phydev: target phy_device struct
589 */
89ff05ec 590static int phy_enable_interrupts(struct phy_device *phydev)
00db8189 591{
553fe92b 592 int err = phy_clear_interrupt(phydev);
00db8189 593
e1393456
AF
594 if (err < 0)
595 return err;
00db8189 596
553fe92b 597 return phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189 598}
00db8189 599
b3df0da8
RD
600/**
601 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
602 * @phydev: target phy_device struct
603 */
89ff05ec 604static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
605{
606 int err;
607
608 /* Disable PHY interrupts */
609 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
00db8189
AF
610 if (err)
611 goto phy_err;
612
613 /* Clear the interrupt */
614 err = phy_clear_interrupt(phydev);
00db8189
AF
615 if (err)
616 goto phy_err;
617
618 return 0;
619
620phy_err:
621 phy_error(phydev);
622
623 return err;
624}
e1393456 625
b3df0da8
RD
626/**
627 * phy_start_interrupts - request and enable interrupts for a PHY device
628 * @phydev: target phy_device struct
e1393456 629 *
b3df0da8
RD
630 * Description: Request the interrupt for the given PHY.
631 * If this fails, then we set irq to PHY_POLL.
e1393456 632 * Otherwise, we enable the interrupts in the PHY.
e1393456 633 * This should only be called with a valid IRQ number.
b3df0da8 634 * Returns 0 on success or < 0 on error.
e1393456
AF
635 */
636int phy_start_interrupts(struct phy_device *phydev)
637{
0ac49527 638 atomic_set(&phydev->irq_disable, 0);
33c133cc
SS
639 if (request_irq(phydev->irq, phy_interrupt, 0, "phy_interrupt",
640 phydev) < 0) {
8d242488
JP
641 pr_warn("%s: Can't get IRQ %d (PHY)\n",
642 phydev->bus->name, phydev->irq);
e1393456
AF
643 phydev->irq = PHY_POLL;
644 return 0;
645 }
646
e62a768f 647 return phy_enable_interrupts(phydev);
e1393456
AF
648}
649EXPORT_SYMBOL(phy_start_interrupts);
650
b3df0da8
RD
651/**
652 * phy_stop_interrupts - disable interrupts from a PHY device
653 * @phydev: target phy_device struct
654 */
e1393456
AF
655int phy_stop_interrupts(struct phy_device *phydev)
656{
553fe92b 657 int err = phy_disable_interrupts(phydev);
e1393456
AF
658
659 if (err)
660 phy_error(phydev);
661
0ac49527
MR
662 free_irq(phydev->irq, phydev);
663
2f53e904 664 /* Cannot call flush_scheduled_work() here as desired because
0ac49527
MR
665 * of rtnl_lock(), but we do not really care about what would
666 * be done, except from enable_irq(), so cancel any work
667 * possibly pending and take care of the matter below.
3c3070d7 668 */
28e53bdd 669 cancel_work_sync(&phydev->phy_queue);
2f53e904 670 /* If work indeed has been cancelled, disable_irq() will have
0ac49527
MR
671 * been left unbalanced from phy_interrupt() and enable_irq()
672 * has to be called so that other devices on the line work.
673 */
674 while (atomic_dec_return(&phydev->irq_disable) >= 0)
675 enable_irq(phydev->irq);
e1393456
AF
676
677 return err;
678}
679EXPORT_SYMBOL(phy_stop_interrupts);
680
b3df0da8
RD
681/**
682 * phy_change - Scheduled by the phy_interrupt/timer to handle PHY changes
683 * @work: work_struct that describes the work to be done
684 */
5ea94e76 685void phy_change(struct work_struct *work)
e1393456 686{
c4028958
DH
687 struct phy_device *phydev =
688 container_of(work, struct phy_device, phy_queue);
e1393456 689
a8729eb3
AG
690 if (phydev->drv->did_interrupt &&
691 !phydev->drv->did_interrupt(phydev))
692 goto ignore;
693
e62a768f 694 if (phy_disable_interrupts(phydev))
e1393456
AF
695 goto phy_err;
696
35b5f6b1 697 mutex_lock(&phydev->lock);
e1393456
AF
698 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
699 phydev->state = PHY_CHANGELINK;
35b5f6b1 700 mutex_unlock(&phydev->lock);
e1393456 701
0ac49527 702 atomic_dec(&phydev->irq_disable);
e1393456
AF
703 enable_irq(phydev->irq);
704
705 /* Reenable interrupts */
e62a768f
SS
706 if (PHY_HALTED != phydev->state &&
707 phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED))
e1393456
AF
708 goto irq_enable_err;
709
a390d1f3
MS
710 /* reschedule state queue work to run as soon as possible */
711 cancel_delayed_work_sync(&phydev->state_queue);
bbb47bde 712 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
e1393456
AF
713 return;
714
a8729eb3
AG
715ignore:
716 atomic_dec(&phydev->irq_disable);
717 enable_irq(phydev->irq);
718 return;
719
e1393456
AF
720irq_enable_err:
721 disable_irq(phydev->irq);
0ac49527 722 atomic_inc(&phydev->irq_disable);
e1393456
AF
723phy_err:
724 phy_error(phydev);
725}
726
b3df0da8
RD
727/**
728 * phy_stop - Bring down the PHY link, and stop checking the status
729 * @phydev: target phy_device struct
730 */
e1393456
AF
731void phy_stop(struct phy_device *phydev)
732{
35b5f6b1 733 mutex_lock(&phydev->lock);
e1393456
AF
734
735 if (PHY_HALTED == phydev->state)
736 goto out_unlock;
737
2c7b4921 738 if (phy_interrupt_is_valid(phydev)) {
e1393456
AF
739 /* Disable PHY Interrupts */
740 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 741
3c3070d7
MR
742 /* Clear any pending interrupts */
743 phy_clear_interrupt(phydev);
744 }
e1393456 745
6daf6531
MR
746 phydev->state = PHY_HALTED;
747
e1393456 748out_unlock:
35b5f6b1 749 mutex_unlock(&phydev->lock);
3c3070d7 750
2f53e904 751 /* Cannot call flush_scheduled_work() here as desired because
3c3070d7
MR
752 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
753 * will not reenable interrupts.
754 */
e1393456 755}
2f53e904 756EXPORT_SYMBOL(phy_stop);
e1393456 757
b3df0da8
RD
758/**
759 * phy_start - start or restart a PHY device
760 * @phydev: target phy_device struct
e1393456 761 *
b3df0da8 762 * Description: Indicates the attached device's readiness to
e1393456
AF
763 * handle PHY-related work. Used during startup to start the
764 * PHY, and after a call to phy_stop() to resume operation.
765 * Also used to indicate the MDIO bus has cleared an error
766 * condition.
767 */
768void phy_start(struct phy_device *phydev)
769{
c15e10e7
TB
770 bool do_resume = false;
771 int err = 0;
772
35b5f6b1 773 mutex_lock(&phydev->lock);
e1393456
AF
774
775 switch (phydev->state) {
e109374f
FF
776 case PHY_STARTING:
777 phydev->state = PHY_PENDING;
778 break;
779 case PHY_READY:
780 phydev->state = PHY_UP;
781 break;
782 case PHY_HALTED:
c15e10e7
TB
783 /* make sure interrupts are re-enabled for the PHY */
784 err = phy_enable_interrupts(phydev);
785 if (err < 0)
786 break;
787
e109374f 788 phydev->state = PHY_RESUMING;
c15e10e7
TB
789 do_resume = true;
790 break;
e109374f
FF
791 default:
792 break;
e1393456 793 }
35b5f6b1 794 mutex_unlock(&phydev->lock);
c15e10e7
TB
795
796 /* if phy was suspended, bring the physical link up again */
797 if (do_resume)
798 phy_resume(phydev);
e1393456 799}
e1393456 800EXPORT_SYMBOL(phy_start);
67c4f3fa 801
35b5f6b1
NC
802/**
803 * phy_state_machine - Handle the state machine
804 * @work: work_struct that describes the work to be done
35b5f6b1 805 */
4f9c85a1 806void phy_state_machine(struct work_struct *work)
00db8189 807{
bf6aede7 808 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 809 struct phy_device *phydev =
a390d1f3 810 container_of(dwork, struct phy_device, state_queue);
c15e10e7 811 bool needs_aneg = false, do_suspend = false;
3e2186e0 812 enum phy_state old_state;
00db8189 813 int err = 0;
11e122cb 814 int old_link;
00db8189 815
35b5f6b1 816 mutex_lock(&phydev->lock);
00db8189 817
3e2186e0
FF
818 old_state = phydev->state;
819
2b8f2a28
DM
820 if (phydev->drv->link_change_notify)
821 phydev->drv->link_change_notify(phydev);
822
e109374f
FF
823 switch (phydev->state) {
824 case PHY_DOWN:
825 case PHY_STARTING:
826 case PHY_READY:
827 case PHY_PENDING:
828 break;
829 case PHY_UP:
6e14a5ee 830 needs_aneg = true;
00db8189 831
e109374f
FF
832 phydev->link_timeout = PHY_AN_TIMEOUT;
833
834 break;
835 case PHY_AN:
836 err = phy_read_status(phydev);
e109374f 837 if (err < 0)
00db8189 838 break;
6b655529 839
2f53e904 840 /* If the link is down, give up on negotiation for now */
e109374f
FF
841 if (!phydev->link) {
842 phydev->state = PHY_NOLINK;
843 netif_carrier_off(phydev->attached_dev);
844 phydev->adjust_link(phydev->attached_dev);
845 break;
846 }
6b655529 847
2f53e904 848 /* Check if negotiation is done. Break if there's an error */
e109374f
FF
849 err = phy_aneg_done(phydev);
850 if (err < 0)
851 break;
6b655529 852
e109374f
FF
853 /* If AN is done, we're running */
854 if (err > 0) {
855 phydev->state = PHY_RUNNING;
856 netif_carrier_on(phydev->attached_dev);
857 phydev->adjust_link(phydev->attached_dev);
00db8189 858
fa8cddaf 859 } else if (0 == phydev->link_timeout--)
6e14a5ee 860 needs_aneg = true;
e109374f
FF
861 break;
862 case PHY_NOLINK:
863 err = phy_read_status(phydev);
e109374f 864 if (err)
00db8189 865 break;
00db8189 866
e109374f 867 if (phydev->link) {
e46e08b8
BK
868 if (AUTONEG_ENABLE == phydev->autoneg) {
869 err = phy_aneg_done(phydev);
870 if (err < 0)
871 break;
872
873 if (!err) {
874 phydev->state = PHY_AN;
875 phydev->link_timeout = PHY_AN_TIMEOUT;
876 break;
877 }
878 }
e109374f
FF
879 phydev->state = PHY_RUNNING;
880 netif_carrier_on(phydev->attached_dev);
881 phydev->adjust_link(phydev->attached_dev);
882 }
883 break;
884 case PHY_FORCING:
885 err = genphy_update_link(phydev);
e109374f 886 if (err)
00db8189 887 break;
00db8189 888
e109374f
FF
889 if (phydev->link) {
890 phydev->state = PHY_RUNNING;
891 netif_carrier_on(phydev->attached_dev);
892 } else {
893 if (0 == phydev->link_timeout--)
6e14a5ee 894 needs_aneg = true;
e109374f 895 }
00db8189 896
e109374f
FF
897 phydev->adjust_link(phydev->attached_dev);
898 break;
899 case PHY_RUNNING:
11e122cb
SX
900 /* Only register a CHANGE if we are polling or ignoring
901 * interrupts and link changed since latest checking.
e109374f 902 */
11e122cb
SX
903 if (!phy_interrupt_is_valid(phydev)) {
904 old_link = phydev->link;
905 err = phy_read_status(phydev);
906 if (err)
907 break;
908
909 if (old_link != phydev->link)
910 phydev->state = PHY_CHANGELINK;
911 }
e109374f
FF
912 break;
913 case PHY_CHANGELINK:
914 err = phy_read_status(phydev);
e109374f 915 if (err)
00db8189 916 break;
00db8189 917
e109374f
FF
918 if (phydev->link) {
919 phydev->state = PHY_RUNNING;
920 netif_carrier_on(phydev->attached_dev);
921 } else {
922 phydev->state = PHY_NOLINK;
923 netif_carrier_off(phydev->attached_dev);
924 }
00db8189 925
e109374f 926 phydev->adjust_link(phydev->attached_dev);
00db8189 927
e109374f
FF
928 if (phy_interrupt_is_valid(phydev))
929 err = phy_config_interrupt(phydev,
2f53e904 930 PHY_INTERRUPT_ENABLED);
e109374f
FF
931 break;
932 case PHY_HALTED:
933 if (phydev->link) {
934 phydev->link = 0;
935 netif_carrier_off(phydev->attached_dev);
00db8189 936 phydev->adjust_link(phydev->attached_dev);
6e14a5ee 937 do_suspend = true;
e109374f
FF
938 }
939 break;
940 case PHY_RESUMING:
e109374f
FF
941 if (AUTONEG_ENABLE == phydev->autoneg) {
942 err = phy_aneg_done(phydev);
943 if (err < 0)
00db8189
AF
944 break;
945
e109374f 946 /* err > 0 if AN is done.
2f53e904
SS
947 * Otherwise, it's 0, and we're still waiting for AN
948 */
e109374f 949 if (err > 0) {
42caa074
WF
950 err = phy_read_status(phydev);
951 if (err)
952 break;
953
954 if (phydev->link) {
955 phydev->state = PHY_RUNNING;
956 netif_carrier_on(phydev->attached_dev);
2f53e904 957 } else {
42caa074 958 phydev->state = PHY_NOLINK;
2f53e904 959 }
42caa074 960 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
961 } else {
962 phydev->state = PHY_AN;
963 phydev->link_timeout = PHY_AN_TIMEOUT;
42caa074 964 }
e109374f
FF
965 } else {
966 err = phy_read_status(phydev);
967 if (err)
968 break;
969
970 if (phydev->link) {
971 phydev->state = PHY_RUNNING;
972 netif_carrier_on(phydev->attached_dev);
2f53e904 973 } else {
e109374f 974 phydev->state = PHY_NOLINK;
2f53e904 975 }
e109374f
FF
976 phydev->adjust_link(phydev->attached_dev);
977 }
978 break;
00db8189
AF
979 }
980
35b5f6b1 981 mutex_unlock(&phydev->lock);
00db8189
AF
982
983 if (needs_aneg)
984 err = phy_start_aneg(phydev);
6e14a5ee 985 else if (do_suspend)
be9dad1f
SH
986 phy_suspend(phydev);
987
00db8189
AF
988 if (err < 0)
989 phy_error(phydev);
990
3e2186e0
FF
991 dev_dbg(&phydev->dev, "PHY state change %s -> %s\n",
992 phy_state_to_str(old_state), phy_state_to_str(phydev->state));
993
bbb47bde 994 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
2f53e904 995 PHY_STATE_TIME * HZ);
35b5f6b1 996}
a59a4d19 997
5ea94e76
FF
998void phy_mac_interrupt(struct phy_device *phydev, int new_link)
999{
1000 cancel_work_sync(&phydev->phy_queue);
1001 phydev->link = new_link;
1002 schedule_work(&phydev->phy_queue);
1003}
1004EXPORT_SYMBOL(phy_mac_interrupt);
1005
a59a4d19
GC
1006static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
1007 int addr)
1008{
1009 /* Write the desired MMD Devad */
1010 bus->write(bus, addr, MII_MMD_CTRL, devad);
1011
1012 /* Write the desired MMD register address */
1013 bus->write(bus, addr, MII_MMD_DATA, prtad);
1014
1015 /* Select the Function : DATA with no post increment */
1016 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
1017}
1018
1019/**
1020 * phy_read_mmd_indirect - reads data from the MMD registers
0c1d77df 1021 * @phydev: The PHY device bus
a59a4d19
GC
1022 * @prtad: MMD Address
1023 * @devad: MMD DEVAD
1024 * @addr: PHY address on the MII bus
1025 *
1026 * Description: it reads data from the MMD registers (clause 22 to access to
1027 * clause 45) of the specified phy address.
1028 * To read these register we have:
1029 * 1) Write reg 13 // DEVAD
1030 * 2) Write reg 14 // MMD Address
1031 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
1032 * 3) Read reg 14 // Read MMD data
1033 */
66ce7fb9 1034int phy_read_mmd_indirect(struct phy_device *phydev, int prtad,
0c1d77df 1035 int devad, int addr)
a59a4d19 1036{
0c1d77df
VB
1037 struct phy_driver *phydrv = phydev->drv;
1038 int value = -1;
a59a4d19 1039
0c1d77df
VB
1040 if (phydrv->read_mmd_indirect == NULL) {
1041 mmd_phy_indirect(phydev->bus, prtad, devad, addr);
1042
1043 /* Read the content of the MMD's selected register */
1044 value = phydev->bus->read(phydev->bus, addr, MII_MMD_DATA);
1045 } else {
1046 value = phydrv->read_mmd_indirect(phydev, prtad, devad, addr);
1047 }
1048 return value;
a59a4d19 1049}
66ce7fb9 1050EXPORT_SYMBOL(phy_read_mmd_indirect);
a59a4d19
GC
1051
1052/**
1053 * phy_write_mmd_indirect - writes data to the MMD registers
0c1d77df 1054 * @phydev: The PHY device
a59a4d19
GC
1055 * @prtad: MMD Address
1056 * @devad: MMD DEVAD
1057 * @addr: PHY address on the MII bus
1058 * @data: data to write in the MMD register
1059 *
1060 * Description: Write data from the MMD registers of the specified
1061 * phy address.
1062 * To write these register we have:
1063 * 1) Write reg 13 // DEVAD
1064 * 2) Write reg 14 // MMD Address
1065 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
1066 * 3) Write reg 14 // Write MMD data
1067 */
66ce7fb9 1068void phy_write_mmd_indirect(struct phy_device *phydev, int prtad,
0c1d77df 1069 int devad, int addr, u32 data)
a59a4d19 1070{
0c1d77df 1071 struct phy_driver *phydrv = phydev->drv;
a59a4d19 1072
0c1d77df
VB
1073 if (phydrv->write_mmd_indirect == NULL) {
1074 mmd_phy_indirect(phydev->bus, prtad, devad, addr);
1075
1076 /* Write the data into MMD's selected register */
1077 phydev->bus->write(phydev->bus, addr, MII_MMD_DATA, data);
1078 } else {
1079 phydrv->write_mmd_indirect(phydev, prtad, devad, addr, data);
1080 }
a59a4d19 1081}
66ce7fb9 1082EXPORT_SYMBOL(phy_write_mmd_indirect);
a59a4d19 1083
a59a4d19
GC
1084/**
1085 * phy_init_eee - init and check the EEE feature
1086 * @phydev: target phy_device struct
1087 * @clk_stop_enable: PHY may stop the clock during LPI
1088 *
1089 * Description: it checks if the Energy-Efficient Ethernet (EEE)
1090 * is supported by looking at the MMD registers 3.20 and 7.60/61
1091 * and it programs the MMD register 3.0 setting the "Clock stop enable"
1092 * bit if required.
1093 */
1094int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
1095{
a59a4d19
GC
1096 /* According to 802.3az,the EEE is supported only in full duplex-mode.
1097 * Also EEE feature is active when core is operating with MII, GMII
7e140696
FF
1098 * or RGMII (all kinds). Internal PHYs are also allowed to proceed and
1099 * should return an error if they do not support EEE.
a59a4d19
GC
1100 */
1101 if ((phydev->duplex == DUPLEX_FULL) &&
1102 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
1103 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
32a64161 1104 phy_interface_is_rgmii(phydev) ||
a9f63095 1105 phy_is_internal(phydev))) {
a59a4d19
GC
1106 int eee_lp, eee_cap, eee_adv;
1107 u32 lp, cap, adv;
4ae6e50c 1108 int status;
a59a4d19
GC
1109
1110 /* Read phy status to properly get the right settings */
1111 status = phy_read_status(phydev);
1112 if (status)
1113 return status;
1114
1115 /* First check if the EEE ability is supported */
0c1d77df 1116 eee_cap = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE,
a59a4d19 1117 MDIO_MMD_PCS, phydev->addr);
7a4cecf7
GC
1118 if (eee_cap <= 0)
1119 goto eee_exit_err;
a59a4d19 1120
b32607dd 1121 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19 1122 if (!cap)
7a4cecf7 1123 goto eee_exit_err;
a59a4d19
GC
1124
1125 /* Check which link settings negotiated and verify it in
1126 * the EEE advertising registers.
1127 */
0c1d77df 1128 eee_lp = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE,
a59a4d19 1129 MDIO_MMD_AN, phydev->addr);
7a4cecf7
GC
1130 if (eee_lp <= 0)
1131 goto eee_exit_err;
a59a4d19 1132
0c1d77df 1133 eee_adv = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV,
a59a4d19 1134 MDIO_MMD_AN, phydev->addr);
7a4cecf7
GC
1135 if (eee_adv <= 0)
1136 goto eee_exit_err;
a59a4d19 1137
b32607dd
AB
1138 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
1139 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
54da5a8b 1140 if (!phy_check_valid(phydev->speed, phydev->duplex, lp & adv))
7a4cecf7 1141 goto eee_exit_err;
a59a4d19
GC
1142
1143 if (clk_stop_enable) {
1144 /* Configure the PHY to stop receiving xMII
1145 * clock while it is signaling LPI.
1146 */
0c1d77df 1147 int val = phy_read_mmd_indirect(phydev, MDIO_CTRL1,
a59a4d19
GC
1148 MDIO_MMD_PCS,
1149 phydev->addr);
1150 if (val < 0)
1151 return val;
1152
1153 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
0c1d77df
VB
1154 phy_write_mmd_indirect(phydev, MDIO_CTRL1,
1155 MDIO_MMD_PCS, phydev->addr,
1156 val);
a59a4d19
GC
1157 }
1158
e62a768f 1159 return 0; /* EEE supported */
a59a4d19 1160 }
7a4cecf7 1161eee_exit_err:
e62a768f 1162 return -EPROTONOSUPPORT;
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1163}
1164EXPORT_SYMBOL(phy_init_eee);
1165
1166/**
1167 * phy_get_eee_err - report the EEE wake error count
1168 * @phydev: target phy_device struct
1169 *
1170 * Description: it is to report the number of time where the PHY
1171 * failed to complete its normal wake sequence.
1172 */
1173int phy_get_eee_err(struct phy_device *phydev)
1174{
0c1d77df 1175 return phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_WK_ERR,
a59a4d19 1176 MDIO_MMD_PCS, phydev->addr);
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GC
1177}
1178EXPORT_SYMBOL(phy_get_eee_err);
1179
1180/**
1181 * phy_ethtool_get_eee - get EEE supported and status
1182 * @phydev: target phy_device struct
1183 * @data: ethtool_eee data
1184 *
1185 * Description: it reportes the Supported/Advertisement/LP Advertisement
1186 * capabilities.
1187 */
1188int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1189{
1190 int val;
1191
1192 /* Get Supported EEE */
0c1d77df 1193 val = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE,
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GC
1194 MDIO_MMD_PCS, phydev->addr);
1195 if (val < 0)
1196 return val;
b32607dd 1197 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
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1198
1199 /* Get advertisement EEE */
0c1d77df 1200 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV,
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1201 MDIO_MMD_AN, phydev->addr);
1202 if (val < 0)
1203 return val;
b32607dd 1204 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
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1205
1206 /* Get LP advertisement EEE */
0c1d77df 1207 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE,
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1208 MDIO_MMD_AN, phydev->addr);
1209 if (val < 0)
1210 return val;
b32607dd 1211 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
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1212
1213 return 0;
1214}
1215EXPORT_SYMBOL(phy_ethtool_get_eee);
1216
1217/**
1218 * phy_ethtool_set_eee - set EEE supported and status
1219 * @phydev: target phy_device struct
1220 * @data: ethtool_eee data
1221 *
1222 * Description: it is to program the Advertisement EEE register.
1223 */
1224int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1225{
553fe92b 1226 int val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19 1227
0c1d77df 1228 phy_write_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN,
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1229 phydev->addr, val);
1230
1231 return 0;
1232}
1233EXPORT_SYMBOL(phy_ethtool_set_eee);
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MS
1234
1235int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1236{
1237 if (phydev->drv->set_wol)
1238 return phydev->drv->set_wol(phydev, wol);
1239
1240 return -EOPNOTSUPP;
1241}
1242EXPORT_SYMBOL(phy_ethtool_set_wol);
1243
1244void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1245{
1246 if (phydev->drv->get_wol)
1247 phydev->drv->get_wol(phydev, wol);
1248}
1249EXPORT_SYMBOL(phy_ethtool_get_wol);