]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - drivers/net/phy/phy.c
net: phy: display human readable PHY speed settings
[mirror_ubuntu-bionic-kernel.git] / drivers / net / phy / phy.c
CommitLineData
2f53e904 1/* Framework for configuring and reading PHY devices
00db8189
AF
2 * Based on code in sungem_phy.c and gianfar_phy.c
3 *
4 * Author: Andy Fleming
5 *
6 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 7 * Copyright (c) 2006, 2007 Maciej W. Rozycki
00db8189
AF
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
8d242488
JP
15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
00db8189 18#include <linux/kernel.h>
00db8189
AF
19#include <linux/string.h>
20#include <linux/errno.h>
21#include <linux/unistd.h>
00db8189 22#include <linux/interrupt.h>
00db8189
AF
23#include <linux/delay.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/skbuff.h>
00db8189
AF
27#include <linux/mm.h>
28#include <linux/module.h>
00db8189
AF
29#include <linux/mii.h>
30#include <linux/ethtool.h>
31#include <linux/phy.h>
3c3070d7
MR
32#include <linux/timer.h>
33#include <linux/workqueue.h>
a59a4d19 34#include <linux/mdio.h>
2f53e904
SS
35#include <linux/io.h>
36#include <linux/uaccess.h>
60063497 37#include <linux/atomic.h>
2f53e904 38
00db8189 39#include <asm/irq.h>
00db8189 40
766d1d38
FF
41static const char *phy_speed_to_str(int speed)
42{
43 switch (speed) {
44 case SPEED_10:
45 return "10Mbps";
46 case SPEED_100:
47 return "100Mbps";
48 case SPEED_1000:
49 return "1Gbps";
50 case SPEED_2500:
51 return "2.5Gbps";
52 case SPEED_10000:
53 return "10Gbps";
54 case SPEED_UNKNOWN:
55 return "Unknown";
56 default:
57 return "Unsupported (update phy.c)";
58 }
59}
60
b3df0da8
RD
61/**
62 * phy_print_status - Convenience function to print out the current phy status
63 * @phydev: the phy_device struct
e1393456
AF
64 */
65void phy_print_status(struct phy_device *phydev)
66{
2f53e904 67 if (phydev->link) {
df40cc88 68 netdev_info(phydev->attached_dev,
766d1d38
FF
69 "Link is Up - %s/%s - flow control %s\n",
70 phy_speed_to_str(phydev->speed),
df40cc88
FF
71 DUPLEX_FULL == phydev->duplex ? "Full" : "Half",
72 phydev->pause ? "rx/tx" : "off");
2f53e904 73 } else {
43b6329f 74 netdev_info(phydev->attached_dev, "Link is Down\n");
2f53e904 75 }
e1393456
AF
76}
77EXPORT_SYMBOL(phy_print_status);
00db8189 78
b3df0da8
RD
79/**
80 * phy_clear_interrupt - Ack the phy device's interrupt
81 * @phydev: the phy_device struct
82 *
83 * If the @phydev driver has an ack_interrupt function, call it to
84 * ack and clear the phy device's interrupt.
85 *
86 * Returns 0 on success on < 0 on error.
87 */
89ff05ec 88static int phy_clear_interrupt(struct phy_device *phydev)
00db8189 89{
00db8189 90 if (phydev->drv->ack_interrupt)
e62a768f 91 return phydev->drv->ack_interrupt(phydev);
00db8189 92
e62a768f 93 return 0;
00db8189
AF
94}
95
b3df0da8
RD
96/**
97 * phy_config_interrupt - configure the PHY device for the requested interrupts
98 * @phydev: the phy_device struct
99 * @interrupts: interrupt flags to configure for this @phydev
100 *
101 * Returns 0 on success on < 0 on error.
102 */
89ff05ec 103static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
00db8189 104{
00db8189
AF
105 phydev->interrupts = interrupts;
106 if (phydev->drv->config_intr)
e62a768f 107 return phydev->drv->config_intr(phydev);
00db8189 108
e62a768f 109 return 0;
00db8189
AF
110}
111
112
b3df0da8
RD
113/**
114 * phy_aneg_done - return auto-negotiation status
115 * @phydev: target phy_device struct
00db8189 116 *
b3df0da8 117 * Description: Reads the status register and returns 0 either if
00db8189
AF
118 * auto-negotiation is incomplete, or if there was an error.
119 * Returns BMSR_ANEGCOMPLETE if auto-negotiation is done.
120 */
121static inline int phy_aneg_done(struct phy_device *phydev)
122{
553fe92b 123 int retval = phy_read(phydev, MII_BMSR);
00db8189
AF
124
125 return (retval < 0) ? retval : (retval & BMSR_ANEGCOMPLETE);
126}
127
00db8189 128/* A structure for mapping a particular speed and duplex
2f53e904
SS
129 * combination to a particular SUPPORTED and ADVERTISED value
130 */
00db8189
AF
131struct phy_setting {
132 int speed;
133 int duplex;
134 u32 setting;
135};
136
137/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 138static const struct phy_setting settings[] = {
00db8189
AF
139 {
140 .speed = 10000,
141 .duplex = DUPLEX_FULL,
142 .setting = SUPPORTED_10000baseT_Full,
143 },
144 {
145 .speed = SPEED_1000,
146 .duplex = DUPLEX_FULL,
147 .setting = SUPPORTED_1000baseT_Full,
148 },
149 {
150 .speed = SPEED_1000,
151 .duplex = DUPLEX_HALF,
152 .setting = SUPPORTED_1000baseT_Half,
153 },
154 {
155 .speed = SPEED_100,
156 .duplex = DUPLEX_FULL,
157 .setting = SUPPORTED_100baseT_Full,
158 },
159 {
160 .speed = SPEED_100,
161 .duplex = DUPLEX_HALF,
162 .setting = SUPPORTED_100baseT_Half,
163 },
164 {
165 .speed = SPEED_10,
166 .duplex = DUPLEX_FULL,
167 .setting = SUPPORTED_10baseT_Full,
168 },
169 {
170 .speed = SPEED_10,
171 .duplex = DUPLEX_HALF,
172 .setting = SUPPORTED_10baseT_Half,
173 },
174};
175
ff8ac609 176#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 177
b3df0da8
RD
178/**
179 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
180 * @speed: speed to match
181 * @duplex: duplex to match
00db8189 182 *
b3df0da8 183 * Description: Searches the settings array for the setting which
00db8189
AF
184 * matches the desired speed and duplex, and returns the index
185 * of that setting. Returns the index of the last setting if
186 * none of the others match.
187 */
188static inline int phy_find_setting(int speed, int duplex)
189{
190 int idx = 0;
191
192 while (idx < ARRAY_SIZE(settings) &&
2f53e904 193 (settings[idx].speed != speed || settings[idx].duplex != duplex))
00db8189
AF
194 idx++;
195
196 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
197}
198
b3df0da8
RD
199/**
200 * phy_find_valid - find a PHY setting that matches the requested features mask
201 * @idx: The first index in settings[] to search
202 * @features: A mask of the valid settings
00db8189 203 *
b3df0da8 204 * Description: Returns the index of the first valid setting less
00db8189
AF
205 * than or equal to the one pointed to by idx, as determined by
206 * the mask in features. Returns the index of the last setting
207 * if nothing else matches.
208 */
209static inline int phy_find_valid(int idx, u32 features)
210{
211 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
212 idx++;
213
214 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
215}
216
b3df0da8
RD
217/**
218 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
219 * @phydev: the target phy_device struct
00db8189 220 *
b3df0da8 221 * Description: Make sure the PHY is set to supported speeds and
00db8189 222 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 223 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 224 */
89ff05ec 225static void phy_sanitize_settings(struct phy_device *phydev)
00db8189
AF
226{
227 u32 features = phydev->supported;
228 int idx;
229
230 /* Sanitize settings based on PHY capabilities */
231 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 232 phydev->autoneg = AUTONEG_DISABLE;
00db8189
AF
233
234 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
235 features);
236
237 phydev->speed = settings[idx].speed;
238 phydev->duplex = settings[idx].duplex;
239}
00db8189 240
b3df0da8
RD
241/**
242 * phy_ethtool_sset - generic ethtool sset function, handles all the details
243 * @phydev: target phy_device struct
244 * @cmd: ethtool_cmd
00db8189
AF
245 *
246 * A few notes about parameter checking:
247 * - We don't set port or transceiver, so we don't care what they
248 * were set to.
249 * - phy_start_aneg() will make sure forced settings are sane, and
250 * choose the next best ones from the ones selected, so we don't
b3df0da8 251 * care if ethtool tries to give us bad values.
00db8189
AF
252 */
253int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
254{
25db0338
DD
255 u32 speed = ethtool_cmd_speed(cmd);
256
00db8189
AF
257 if (cmd->phy_address != phydev->addr)
258 return -EINVAL;
259
2f53e904 260 /* We make sure that we don't pass unsupported values in to the PHY */
00db8189
AF
261 cmd->advertising &= phydev->supported;
262
263 /* Verify the settings we care about. */
264 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
265 return -EINVAL;
266
267 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
268 return -EINVAL;
269
8e95a202 270 if (cmd->autoneg == AUTONEG_DISABLE &&
25db0338
DD
271 ((speed != SPEED_1000 &&
272 speed != SPEED_100 &&
273 speed != SPEED_10) ||
8e95a202
JP
274 (cmd->duplex != DUPLEX_HALF &&
275 cmd->duplex != DUPLEX_FULL)))
00db8189
AF
276 return -EINVAL;
277
278 phydev->autoneg = cmd->autoneg;
279
25db0338 280 phydev->speed = speed;
00db8189
AF
281
282 phydev->advertising = cmd->advertising;
283
284 if (AUTONEG_ENABLE == cmd->autoneg)
285 phydev->advertising |= ADVERTISED_Autoneg;
286 else
287 phydev->advertising &= ~ADVERTISED_Autoneg;
288
289 phydev->duplex = cmd->duplex;
290
291 /* Restart the PHY */
292 phy_start_aneg(phydev);
293
294 return 0;
295}
9f6d55d0 296EXPORT_SYMBOL(phy_ethtool_sset);
00db8189
AF
297
298int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
299{
300 cmd->supported = phydev->supported;
301
302 cmd->advertising = phydev->advertising;
114002bc 303 cmd->lp_advertising = phydev->lp_advertising;
00db8189 304
70739497 305 ethtool_cmd_speed_set(cmd, phydev->speed);
00db8189
AF
306 cmd->duplex = phydev->duplex;
307 cmd->port = PORT_MII;
308 cmd->phy_address = phydev->addr;
4284b6a5
FF
309 cmd->transceiver = phy_is_internal(phydev) ?
310 XCVR_INTERNAL : XCVR_EXTERNAL;
00db8189
AF
311 cmd->autoneg = phydev->autoneg;
312
313 return 0;
314}
9f6d55d0 315EXPORT_SYMBOL(phy_ethtool_gset);
00db8189 316
b3df0da8
RD
317/**
318 * phy_mii_ioctl - generic PHY MII ioctl interface
319 * @phydev: the phy_device struct
00c7d920 320 * @ifr: &struct ifreq for socket ioctl's
b3df0da8
RD
321 * @cmd: ioctl cmd to execute
322 *
323 * Note that this function is currently incompatible with the
00db8189 324 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 325 * current state. Use at own risk.
00db8189 326 */
2f53e904 327int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd)
00db8189 328{
28b04113 329 struct mii_ioctl_data *mii_data = if_mii(ifr);
00db8189
AF
330 u16 val = mii_data->val_in;
331
332 switch (cmd) {
333 case SIOCGMIIPHY:
334 mii_data->phy_id = phydev->addr;
c6d6a511
LB
335 /* fall through */
336
00db8189 337 case SIOCGMIIREG:
af1dc13e
PK
338 mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
339 mii_data->reg_num);
e62a768f 340 return 0;
00db8189
AF
341
342 case SIOCSMIIREG:
00db8189 343 if (mii_data->phy_id == phydev->addr) {
e109374f 344 switch (mii_data->reg_num) {
00db8189 345 case MII_BMCR:
2f53e904 346 if ((val & (BMCR_RESET | BMCR_ANENABLE)) == 0)
00db8189
AF
347 phydev->autoneg = AUTONEG_DISABLE;
348 else
349 phydev->autoneg = AUTONEG_ENABLE;
2f53e904 350 if (!phydev->autoneg && (val & BMCR_FULLDPLX))
00db8189
AF
351 phydev->duplex = DUPLEX_FULL;
352 else
353 phydev->duplex = DUPLEX_HALF;
2f53e904 354 if (!phydev->autoneg && (val & BMCR_SPEED1000))
024a0a3c 355 phydev->speed = SPEED_1000;
2f53e904
SS
356 else if (!phydev->autoneg &&
357 (val & BMCR_SPEED100))
024a0a3c 358 phydev->speed = SPEED_100;
00db8189
AF
359 break;
360 case MII_ADVERTISE:
361 phydev->advertising = val;
362 break;
363 default:
364 /* do nothing */
365 break;
366 }
367 }
368
af1dc13e
PK
369 mdiobus_write(phydev->bus, mii_data->phy_id,
370 mii_data->reg_num, val);
371
8e95a202 372 if (mii_data->reg_num == MII_BMCR &&
2613f95f 373 val & BMCR_RESET)
e62a768f
SS
374 return phy_init_hw(phydev);
375 return 0;
dda93b48 376
c1f19b51
RC
377 case SIOCSHWTSTAMP:
378 if (phydev->drv->hwtstamp)
379 return phydev->drv->hwtstamp(phydev, ifr);
380 /* fall through */
381
dda93b48 382 default:
c6d6a511 383 return -EOPNOTSUPP;
00db8189 384 }
00db8189 385}
680e9fe9 386EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 387
b3df0da8
RD
388/**
389 * phy_start_aneg - start auto-negotiation for this PHY device
390 * @phydev: the phy_device struct
e1393456 391 *
b3df0da8
RD
392 * Description: Sanitizes the settings (if we're not autonegotiating
393 * them), and then calls the driver's config_aneg function.
394 * If the PHYCONTROL Layer is operating, we change the state to
395 * reflect the beginning of Auto-negotiation or forcing.
e1393456
AF
396 */
397int phy_start_aneg(struct phy_device *phydev)
398{
399 int err;
400
35b5f6b1 401 mutex_lock(&phydev->lock);
e1393456
AF
402
403 if (AUTONEG_DISABLE == phydev->autoneg)
404 phy_sanitize_settings(phydev);
405
406 err = phydev->drv->config_aneg(phydev);
e1393456
AF
407 if (err < 0)
408 goto out_unlock;
409
410 if (phydev->state != PHY_HALTED) {
411 if (AUTONEG_ENABLE == phydev->autoneg) {
412 phydev->state = PHY_AN;
413 phydev->link_timeout = PHY_AN_TIMEOUT;
414 } else {
415 phydev->state = PHY_FORCING;
416 phydev->link_timeout = PHY_FORCE_TIMEOUT;
417 }
418 }
419
420out_unlock:
35b5f6b1 421 mutex_unlock(&phydev->lock);
e1393456
AF
422 return err;
423}
424EXPORT_SYMBOL(phy_start_aneg);
425
b3df0da8
RD
426/**
427 * phy_start_machine - start PHY state machine tracking
428 * @phydev: the phy_device struct
00db8189 429 *
b3df0da8 430 * Description: The PHY infrastructure can run a state machine
00db8189
AF
431 * which tracks whether the PHY is starting up, negotiating,
432 * etc. This function starts the timer which tracks the state
29935aeb
SS
433 * of the PHY. If you want to maintain your own state machine,
434 * do not call this function.
b3df0da8 435 */
29935aeb 436void phy_start_machine(struct phy_device *phydev)
00db8189 437{
bbb47bde 438 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
00db8189
AF
439}
440
b3df0da8
RD
441/**
442 * phy_stop_machine - stop the PHY state machine tracking
443 * @phydev: target phy_device struct
00db8189 444 *
b3df0da8 445 * Description: Stops the state machine timer, sets the state to UP
817acf5e 446 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
447 * phy_detach.
448 */
449void phy_stop_machine(struct phy_device *phydev)
450{
a390d1f3 451 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 452
35b5f6b1 453 mutex_lock(&phydev->lock);
00db8189
AF
454 if (phydev->state > PHY_UP)
455 phydev->state = PHY_UP;
35b5f6b1 456 mutex_unlock(&phydev->lock);
00db8189
AF
457}
458
b3df0da8
RD
459/**
460 * phy_error - enter HALTED state for this PHY device
461 * @phydev: target phy_device struct
00db8189
AF
462 *
463 * Moves the PHY to the HALTED state in response to a read
464 * or write error, and tells the controller the link is down.
465 * Must not be called from interrupt context, or while the
466 * phydev->lock is held.
467 */
9b9a8bfc 468static void phy_error(struct phy_device *phydev)
00db8189 469{
35b5f6b1 470 mutex_lock(&phydev->lock);
00db8189 471 phydev->state = PHY_HALTED;
35b5f6b1 472 mutex_unlock(&phydev->lock);
00db8189
AF
473}
474
b3df0da8
RD
475/**
476 * phy_interrupt - PHY interrupt handler
477 * @irq: interrupt line
478 * @phy_dat: phy_device pointer
e1393456 479 *
b3df0da8 480 * Description: When a PHY interrupt occurs, the handler disables
e1393456
AF
481 * interrupts, and schedules a work task to clear the interrupt.
482 */
7d12e780 483static irqreturn_t phy_interrupt(int irq, void *phy_dat)
e1393456
AF
484{
485 struct phy_device *phydev = phy_dat;
486
3c3070d7
MR
487 if (PHY_HALTED == phydev->state)
488 return IRQ_NONE; /* It can't be ours. */
489
e1393456
AF
490 /* The MDIO bus is not allowed to be written in interrupt
491 * context, so we need to disable the irq here. A work
492 * queue will write the PHY to disable and clear the
2f53e904
SS
493 * interrupt, and then reenable the irq line.
494 */
e1393456 495 disable_irq_nosync(irq);
0ac49527 496 atomic_inc(&phydev->irq_disable);
e1393456 497
bbb47bde 498 queue_work(system_power_efficient_wq, &phydev->phy_queue);
e1393456
AF
499
500 return IRQ_HANDLED;
501}
502
b3df0da8
RD
503/**
504 * phy_enable_interrupts - Enable the interrupts from the PHY side
505 * @phydev: target phy_device struct
506 */
89ff05ec 507static int phy_enable_interrupts(struct phy_device *phydev)
00db8189 508{
553fe92b 509 int err = phy_clear_interrupt(phydev);
00db8189 510
e1393456
AF
511 if (err < 0)
512 return err;
00db8189 513
553fe92b 514 return phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189 515}
00db8189 516
b3df0da8
RD
517/**
518 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
519 * @phydev: target phy_device struct
520 */
89ff05ec 521static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
522{
523 int err;
524
525 /* Disable PHY interrupts */
526 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
00db8189
AF
527 if (err)
528 goto phy_err;
529
530 /* Clear the interrupt */
531 err = phy_clear_interrupt(phydev);
00db8189
AF
532 if (err)
533 goto phy_err;
534
535 return 0;
536
537phy_err:
538 phy_error(phydev);
539
540 return err;
541}
e1393456 542
b3df0da8
RD
543/**
544 * phy_start_interrupts - request and enable interrupts for a PHY device
545 * @phydev: target phy_device struct
e1393456 546 *
b3df0da8
RD
547 * Description: Request the interrupt for the given PHY.
548 * If this fails, then we set irq to PHY_POLL.
e1393456 549 * Otherwise, we enable the interrupts in the PHY.
e1393456 550 * This should only be called with a valid IRQ number.
b3df0da8 551 * Returns 0 on success or < 0 on error.
e1393456
AF
552 */
553int phy_start_interrupts(struct phy_device *phydev)
554{
0ac49527 555 atomic_set(&phydev->irq_disable, 0);
33c133cc
SS
556 if (request_irq(phydev->irq, phy_interrupt, 0, "phy_interrupt",
557 phydev) < 0) {
8d242488
JP
558 pr_warn("%s: Can't get IRQ %d (PHY)\n",
559 phydev->bus->name, phydev->irq);
e1393456
AF
560 phydev->irq = PHY_POLL;
561 return 0;
562 }
563
e62a768f 564 return phy_enable_interrupts(phydev);
e1393456
AF
565}
566EXPORT_SYMBOL(phy_start_interrupts);
567
b3df0da8
RD
568/**
569 * phy_stop_interrupts - disable interrupts from a PHY device
570 * @phydev: target phy_device struct
571 */
e1393456
AF
572int phy_stop_interrupts(struct phy_device *phydev)
573{
553fe92b 574 int err = phy_disable_interrupts(phydev);
e1393456
AF
575
576 if (err)
577 phy_error(phydev);
578
0ac49527
MR
579 free_irq(phydev->irq, phydev);
580
2f53e904 581 /* Cannot call flush_scheduled_work() here as desired because
0ac49527
MR
582 * of rtnl_lock(), but we do not really care about what would
583 * be done, except from enable_irq(), so cancel any work
584 * possibly pending and take care of the matter below.
3c3070d7 585 */
28e53bdd 586 cancel_work_sync(&phydev->phy_queue);
2f53e904 587 /* If work indeed has been cancelled, disable_irq() will have
0ac49527
MR
588 * been left unbalanced from phy_interrupt() and enable_irq()
589 * has to be called so that other devices on the line work.
590 */
591 while (atomic_dec_return(&phydev->irq_disable) >= 0)
592 enable_irq(phydev->irq);
e1393456
AF
593
594 return err;
595}
596EXPORT_SYMBOL(phy_stop_interrupts);
597
b3df0da8
RD
598/**
599 * phy_change - Scheduled by the phy_interrupt/timer to handle PHY changes
600 * @work: work_struct that describes the work to be done
601 */
5ea94e76 602void phy_change(struct work_struct *work)
e1393456 603{
c4028958
DH
604 struct phy_device *phydev =
605 container_of(work, struct phy_device, phy_queue);
e1393456 606
a8729eb3
AG
607 if (phydev->drv->did_interrupt &&
608 !phydev->drv->did_interrupt(phydev))
609 goto ignore;
610
e62a768f 611 if (phy_disable_interrupts(phydev))
e1393456
AF
612 goto phy_err;
613
35b5f6b1 614 mutex_lock(&phydev->lock);
e1393456
AF
615 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
616 phydev->state = PHY_CHANGELINK;
35b5f6b1 617 mutex_unlock(&phydev->lock);
e1393456 618
0ac49527 619 atomic_dec(&phydev->irq_disable);
e1393456
AF
620 enable_irq(phydev->irq);
621
622 /* Reenable interrupts */
e62a768f
SS
623 if (PHY_HALTED != phydev->state &&
624 phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED))
e1393456
AF
625 goto irq_enable_err;
626
a390d1f3
MS
627 /* reschedule state queue work to run as soon as possible */
628 cancel_delayed_work_sync(&phydev->state_queue);
bbb47bde 629 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
e1393456
AF
630 return;
631
a8729eb3
AG
632ignore:
633 atomic_dec(&phydev->irq_disable);
634 enable_irq(phydev->irq);
635 return;
636
e1393456
AF
637irq_enable_err:
638 disable_irq(phydev->irq);
0ac49527 639 atomic_inc(&phydev->irq_disable);
e1393456
AF
640phy_err:
641 phy_error(phydev);
642}
643
b3df0da8
RD
644/**
645 * phy_stop - Bring down the PHY link, and stop checking the status
646 * @phydev: target phy_device struct
647 */
e1393456
AF
648void phy_stop(struct phy_device *phydev)
649{
35b5f6b1 650 mutex_lock(&phydev->lock);
e1393456
AF
651
652 if (PHY_HALTED == phydev->state)
653 goto out_unlock;
654
2c7b4921 655 if (phy_interrupt_is_valid(phydev)) {
e1393456
AF
656 /* Disable PHY Interrupts */
657 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 658
3c3070d7
MR
659 /* Clear any pending interrupts */
660 phy_clear_interrupt(phydev);
661 }
e1393456 662
6daf6531
MR
663 phydev->state = PHY_HALTED;
664
e1393456 665out_unlock:
35b5f6b1 666 mutex_unlock(&phydev->lock);
3c3070d7 667
2f53e904 668 /* Cannot call flush_scheduled_work() here as desired because
3c3070d7
MR
669 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
670 * will not reenable interrupts.
671 */
e1393456 672}
2f53e904 673EXPORT_SYMBOL(phy_stop);
e1393456 674
b3df0da8
RD
675/**
676 * phy_start - start or restart a PHY device
677 * @phydev: target phy_device struct
e1393456 678 *
b3df0da8 679 * Description: Indicates the attached device's readiness to
e1393456
AF
680 * handle PHY-related work. Used during startup to start the
681 * PHY, and after a call to phy_stop() to resume operation.
682 * Also used to indicate the MDIO bus has cleared an error
683 * condition.
684 */
685void phy_start(struct phy_device *phydev)
686{
35b5f6b1 687 mutex_lock(&phydev->lock);
e1393456
AF
688
689 switch (phydev->state) {
e109374f
FF
690 case PHY_STARTING:
691 phydev->state = PHY_PENDING;
692 break;
693 case PHY_READY:
694 phydev->state = PHY_UP;
695 break;
696 case PHY_HALTED:
697 phydev->state = PHY_RESUMING;
698 default:
699 break;
e1393456 700 }
35b5f6b1 701 mutex_unlock(&phydev->lock);
e1393456 702}
e1393456 703EXPORT_SYMBOL(phy_start);
67c4f3fa 704
35b5f6b1
NC
705/**
706 * phy_state_machine - Handle the state machine
707 * @work: work_struct that describes the work to be done
35b5f6b1 708 */
4f9c85a1 709void phy_state_machine(struct work_struct *work)
00db8189 710{
bf6aede7 711 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 712 struct phy_device *phydev =
a390d1f3 713 container_of(dwork, struct phy_device, state_queue);
be9dad1f 714 int needs_aneg = 0, do_suspend = 0;
00db8189
AF
715 int err = 0;
716
35b5f6b1 717 mutex_lock(&phydev->lock);
00db8189 718
e109374f
FF
719 switch (phydev->state) {
720 case PHY_DOWN:
721 case PHY_STARTING:
722 case PHY_READY:
723 case PHY_PENDING:
724 break;
725 case PHY_UP:
726 needs_aneg = 1;
00db8189 727
e109374f
FF
728 phydev->link_timeout = PHY_AN_TIMEOUT;
729
730 break;
731 case PHY_AN:
732 err = phy_read_status(phydev);
e109374f 733 if (err < 0)
00db8189 734 break;
6b655529 735
2f53e904 736 /* If the link is down, give up on negotiation for now */
e109374f
FF
737 if (!phydev->link) {
738 phydev->state = PHY_NOLINK;
739 netif_carrier_off(phydev->attached_dev);
740 phydev->adjust_link(phydev->attached_dev);
741 break;
742 }
6b655529 743
2f53e904 744 /* Check if negotiation is done. Break if there's an error */
e109374f
FF
745 err = phy_aneg_done(phydev);
746 if (err < 0)
747 break;
6b655529 748
e109374f
FF
749 /* If AN is done, we're running */
750 if (err > 0) {
751 phydev->state = PHY_RUNNING;
752 netif_carrier_on(phydev->attached_dev);
753 phydev->adjust_link(phydev->attached_dev);
00db8189 754
e109374f
FF
755 } else if (0 == phydev->link_timeout--) {
756 needs_aneg = 1;
2f53e904 757 /* If we have the magic_aneg bit, we try again */
e109374f
FF
758 if (phydev->drv->flags & PHY_HAS_MAGICANEG)
759 break;
760 }
761 break;
762 case PHY_NOLINK:
763 err = phy_read_status(phydev);
e109374f 764 if (err)
00db8189 765 break;
00db8189 766
e109374f
FF
767 if (phydev->link) {
768 phydev->state = PHY_RUNNING;
769 netif_carrier_on(phydev->attached_dev);
770 phydev->adjust_link(phydev->attached_dev);
771 }
772 break;
773 case PHY_FORCING:
774 err = genphy_update_link(phydev);
e109374f 775 if (err)
00db8189 776 break;
00db8189 777
e109374f
FF
778 if (phydev->link) {
779 phydev->state = PHY_RUNNING;
780 netif_carrier_on(phydev->attached_dev);
781 } else {
782 if (0 == phydev->link_timeout--)
783 needs_aneg = 1;
784 }
00db8189 785
e109374f
FF
786 phydev->adjust_link(phydev->attached_dev);
787 break;
788 case PHY_RUNNING:
789 /* Only register a CHANGE if we are
790 * polling or ignoring interrupts
791 */
792 if (!phy_interrupt_is_valid(phydev))
793 phydev->state = PHY_CHANGELINK;
794 break;
795 case PHY_CHANGELINK:
796 err = phy_read_status(phydev);
e109374f 797 if (err)
00db8189 798 break;
00db8189 799
e109374f
FF
800 if (phydev->link) {
801 phydev->state = PHY_RUNNING;
802 netif_carrier_on(phydev->attached_dev);
803 } else {
804 phydev->state = PHY_NOLINK;
805 netif_carrier_off(phydev->attached_dev);
806 }
00db8189 807
e109374f 808 phydev->adjust_link(phydev->attached_dev);
00db8189 809
e109374f
FF
810 if (phy_interrupt_is_valid(phydev))
811 err = phy_config_interrupt(phydev,
2f53e904 812 PHY_INTERRUPT_ENABLED);
e109374f
FF
813 break;
814 case PHY_HALTED:
815 if (phydev->link) {
816 phydev->link = 0;
817 netif_carrier_off(phydev->attached_dev);
00db8189 818 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
819 do_suspend = 1;
820 }
821 break;
822 case PHY_RESUMING:
e109374f 823 err = phy_clear_interrupt(phydev);
e109374f
FF
824 if (err)
825 break;
00db8189 826
2f53e904 827 err = phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
e109374f
FF
828 if (err)
829 break;
00db8189 830
e109374f
FF
831 if (AUTONEG_ENABLE == phydev->autoneg) {
832 err = phy_aneg_done(phydev);
833 if (err < 0)
00db8189
AF
834 break;
835
e109374f 836 /* err > 0 if AN is done.
2f53e904
SS
837 * Otherwise, it's 0, and we're still waiting for AN
838 */
e109374f 839 if (err > 0) {
42caa074
WF
840 err = phy_read_status(phydev);
841 if (err)
842 break;
843
844 if (phydev->link) {
845 phydev->state = PHY_RUNNING;
846 netif_carrier_on(phydev->attached_dev);
2f53e904 847 } else {
42caa074 848 phydev->state = PHY_NOLINK;
2f53e904 849 }
42caa074 850 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
851 } else {
852 phydev->state = PHY_AN;
853 phydev->link_timeout = PHY_AN_TIMEOUT;
42caa074 854 }
e109374f
FF
855 } else {
856 err = phy_read_status(phydev);
857 if (err)
858 break;
859
860 if (phydev->link) {
861 phydev->state = PHY_RUNNING;
862 netif_carrier_on(phydev->attached_dev);
2f53e904 863 } else {
e109374f 864 phydev->state = PHY_NOLINK;
2f53e904 865 }
e109374f
FF
866 phydev->adjust_link(phydev->attached_dev);
867 }
868 break;
00db8189
AF
869 }
870
35b5f6b1 871 mutex_unlock(&phydev->lock);
00db8189
AF
872
873 if (needs_aneg)
874 err = phy_start_aneg(phydev);
875
be9dad1f
SH
876 if (do_suspend)
877 phy_suspend(phydev);
878
00db8189
AF
879 if (err < 0)
880 phy_error(phydev);
881
bbb47bde 882 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
2f53e904 883 PHY_STATE_TIME * HZ);
35b5f6b1 884}
a59a4d19 885
5ea94e76
FF
886void phy_mac_interrupt(struct phy_device *phydev, int new_link)
887{
888 cancel_work_sync(&phydev->phy_queue);
889 phydev->link = new_link;
890 schedule_work(&phydev->phy_queue);
891}
892EXPORT_SYMBOL(phy_mac_interrupt);
893
a59a4d19
GC
894static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
895 int addr)
896{
897 /* Write the desired MMD Devad */
898 bus->write(bus, addr, MII_MMD_CTRL, devad);
899
900 /* Write the desired MMD register address */
901 bus->write(bus, addr, MII_MMD_DATA, prtad);
902
903 /* Select the Function : DATA with no post increment */
904 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
905}
906
907/**
908 * phy_read_mmd_indirect - reads data from the MMD registers
909 * @bus: the target MII bus
910 * @prtad: MMD Address
911 * @devad: MMD DEVAD
912 * @addr: PHY address on the MII bus
913 *
914 * Description: it reads data from the MMD registers (clause 22 to access to
915 * clause 45) of the specified phy address.
916 * To read these register we have:
917 * 1) Write reg 13 // DEVAD
918 * 2) Write reg 14 // MMD Address
919 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
920 * 3) Read reg 14 // Read MMD data
921 */
922static int phy_read_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
923 int addr)
924{
a59a4d19
GC
925 mmd_phy_indirect(bus, prtad, devad, addr);
926
927 /* Read the content of the MMD's selected register */
e62a768f 928 return bus->read(bus, addr, MII_MMD_DATA);
a59a4d19
GC
929}
930
931/**
932 * phy_write_mmd_indirect - writes data to the MMD registers
933 * @bus: the target MII bus
934 * @prtad: MMD Address
935 * @devad: MMD DEVAD
936 * @addr: PHY address on the MII bus
937 * @data: data to write in the MMD register
938 *
939 * Description: Write data from the MMD registers of the specified
940 * phy address.
941 * To write these register we have:
942 * 1) Write reg 13 // DEVAD
943 * 2) Write reg 14 // MMD Address
944 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
945 * 3) Write reg 14 // Write MMD data
946 */
947static void phy_write_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
948 int addr, u32 data)
949{
950 mmd_phy_indirect(bus, prtad, devad, addr);
951
952 /* Write the data into MMD's selected register */
953 bus->write(bus, addr, MII_MMD_DATA, data);
954}
955
a59a4d19
GC
956/**
957 * phy_init_eee - init and check the EEE feature
958 * @phydev: target phy_device struct
959 * @clk_stop_enable: PHY may stop the clock during LPI
960 *
961 * Description: it checks if the Energy-Efficient Ethernet (EEE)
962 * is supported by looking at the MMD registers 3.20 and 7.60/61
963 * and it programs the MMD register 3.0 setting the "Clock stop enable"
964 * bit if required.
965 */
966int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
967{
a59a4d19
GC
968 /* According to 802.3az,the EEE is supported only in full duplex-mode.
969 * Also EEE feature is active when core is operating with MII, GMII
970 * or RGMII.
971 */
972 if ((phydev->duplex == DUPLEX_FULL) &&
973 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
974 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
975 (phydev->interface == PHY_INTERFACE_MODE_RGMII))) {
976 int eee_lp, eee_cap, eee_adv;
977 u32 lp, cap, adv;
978 int idx, status;
979
980 /* Read phy status to properly get the right settings */
981 status = phy_read_status(phydev);
982 if (status)
983 return status;
984
985 /* First check if the EEE ability is supported */
986 eee_cap = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
987 MDIO_MMD_PCS, phydev->addr);
988 if (eee_cap < 0)
989 return eee_cap;
990
b32607dd 991 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19 992 if (!cap)
e62a768f 993 return -EPROTONOSUPPORT;
a59a4d19
GC
994
995 /* Check which link settings negotiated and verify it in
996 * the EEE advertising registers.
997 */
998 eee_lp = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
999 MDIO_MMD_AN, phydev->addr);
1000 if (eee_lp < 0)
1001 return eee_lp;
1002
1003 eee_adv = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1004 MDIO_MMD_AN, phydev->addr);
1005 if (eee_adv < 0)
1006 return eee_adv;
1007
b32607dd
AB
1008 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
1009 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
a59a4d19 1010 idx = phy_find_setting(phydev->speed, phydev->duplex);
9a9c56cb 1011 if (!(lp & adv & settings[idx].setting))
e62a768f 1012 return -EPROTONOSUPPORT;
a59a4d19
GC
1013
1014 if (clk_stop_enable) {
1015 /* Configure the PHY to stop receiving xMII
1016 * clock while it is signaling LPI.
1017 */
1018 int val = phy_read_mmd_indirect(phydev->bus, MDIO_CTRL1,
1019 MDIO_MMD_PCS,
1020 phydev->addr);
1021 if (val < 0)
1022 return val;
1023
1024 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
1025 phy_write_mmd_indirect(phydev->bus, MDIO_CTRL1,
1026 MDIO_MMD_PCS, phydev->addr, val);
1027 }
1028
e62a768f 1029 return 0; /* EEE supported */
a59a4d19
GC
1030 }
1031
e62a768f 1032 return -EPROTONOSUPPORT;
a59a4d19
GC
1033}
1034EXPORT_SYMBOL(phy_init_eee);
1035
1036/**
1037 * phy_get_eee_err - report the EEE wake error count
1038 * @phydev: target phy_device struct
1039 *
1040 * Description: it is to report the number of time where the PHY
1041 * failed to complete its normal wake sequence.
1042 */
1043int phy_get_eee_err(struct phy_device *phydev)
1044{
1045 return phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_WK_ERR,
1046 MDIO_MMD_PCS, phydev->addr);
a59a4d19
GC
1047}
1048EXPORT_SYMBOL(phy_get_eee_err);
1049
1050/**
1051 * phy_ethtool_get_eee - get EEE supported and status
1052 * @phydev: target phy_device struct
1053 * @data: ethtool_eee data
1054 *
1055 * Description: it reportes the Supported/Advertisement/LP Advertisement
1056 * capabilities.
1057 */
1058int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1059{
1060 int val;
1061
1062 /* Get Supported EEE */
1063 val = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
1064 MDIO_MMD_PCS, phydev->addr);
1065 if (val < 0)
1066 return val;
b32607dd 1067 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
a59a4d19
GC
1068
1069 /* Get advertisement EEE */
1070 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1071 MDIO_MMD_AN, phydev->addr);
1072 if (val < 0)
1073 return val;
b32607dd 1074 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1075
1076 /* Get LP advertisement EEE */
1077 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
1078 MDIO_MMD_AN, phydev->addr);
1079 if (val < 0)
1080 return val;
b32607dd 1081 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1082
1083 return 0;
1084}
1085EXPORT_SYMBOL(phy_ethtool_get_eee);
1086
1087/**
1088 * phy_ethtool_set_eee - set EEE supported and status
1089 * @phydev: target phy_device struct
1090 * @data: ethtool_eee data
1091 *
1092 * Description: it is to program the Advertisement EEE register.
1093 */
1094int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1095{
553fe92b 1096 int val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19 1097
a59a4d19
GC
1098 phy_write_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV, MDIO_MMD_AN,
1099 phydev->addr, val);
1100
1101 return 0;
1102}
1103EXPORT_SYMBOL(phy_ethtool_set_eee);
42e836eb
MS
1104
1105int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1106{
1107 if (phydev->drv->set_wol)
1108 return phydev->drv->set_wol(phydev, wol);
1109
1110 return -EOPNOTSUPP;
1111}
1112EXPORT_SYMBOL(phy_ethtool_set_wol);
1113
1114void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1115{
1116 if (phydev->drv->get_wol)
1117 phydev->drv->get_wol(phydev, wol);
1118}
1119EXPORT_SYMBOL(phy_ethtool_get_wol);