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1/*
2 * drivers/net/phy/phy.c
3 *
4 * Framework for configuring and reading PHY devices
5 * Based on code in sungem_phy.c and gianfar_phy.c
6 *
7 * Author: Andy Fleming
8 *
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 10 * Copyright (c) 2006, 2007 Maciej W. Rozycki
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AF
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 */
8d242488
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18
19#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
00db8189 21#include <linux/kernel.h>
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22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/unistd.h>
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25#include <linux/interrupt.h>
26#include <linux/init.h>
27#include <linux/delay.h>
28#include <linux/netdevice.h>
29#include <linux/etherdevice.h>
30#include <linux/skbuff.h>
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31#include <linux/mm.h>
32#include <linux/module.h>
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AF
33#include <linux/mii.h>
34#include <linux/ethtool.h>
35#include <linux/phy.h>
3c3070d7
MR
36#include <linux/timer.h>
37#include <linux/workqueue.h>
a59a4d19 38#include <linux/mdio.h>
00db8189 39
60063497 40#include <linux/atomic.h>
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41#include <asm/io.h>
42#include <asm/irq.h>
43#include <asm/uaccess.h>
44
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RD
45/**
46 * phy_print_status - Convenience function to print out the current phy status
47 * @phydev: the phy_device struct
e1393456
AF
48 */
49void phy_print_status(struct phy_device *phydev)
50{
e1393456 51 if (phydev->link)
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JP
52 pr_info("%s - Link is Up - %d/%s\n",
53 dev_name(&phydev->dev),
54 phydev->speed,
55 DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
56 else
57 pr_info("%s - Link is Down\n", dev_name(&phydev->dev));
e1393456
AF
58}
59EXPORT_SYMBOL(phy_print_status);
00db8189 60
b3df0da8
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61/**
62 * phy_clear_interrupt - Ack the phy device's interrupt
63 * @phydev: the phy_device struct
64 *
65 * If the @phydev driver has an ack_interrupt function, call it to
66 * ack and clear the phy device's interrupt.
67 *
68 * Returns 0 on success on < 0 on error.
69 */
89ff05ec 70static int phy_clear_interrupt(struct phy_device *phydev)
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AF
71{
72 int err = 0;
73
74 if (phydev->drv->ack_interrupt)
75 err = phydev->drv->ack_interrupt(phydev);
76
77 return err;
78}
79
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RD
80/**
81 * phy_config_interrupt - configure the PHY device for the requested interrupts
82 * @phydev: the phy_device struct
83 * @interrupts: interrupt flags to configure for this @phydev
84 *
85 * Returns 0 on success on < 0 on error.
86 */
89ff05ec 87static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
00db8189
AF
88{
89 int err = 0;
90
91 phydev->interrupts = interrupts;
92 if (phydev->drv->config_intr)
93 err = phydev->drv->config_intr(phydev);
94
95 return err;
96}
97
98
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99/**
100 * phy_aneg_done - return auto-negotiation status
101 * @phydev: target phy_device struct
00db8189 102 *
b3df0da8 103 * Description: Reads the status register and returns 0 either if
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AF
104 * auto-negotiation is incomplete, or if there was an error.
105 * Returns BMSR_ANEGCOMPLETE if auto-negotiation is done.
106 */
107static inline int phy_aneg_done(struct phy_device *phydev)
108{
109 int retval;
110
111 retval = phy_read(phydev, MII_BMSR);
112
113 return (retval < 0) ? retval : (retval & BMSR_ANEGCOMPLETE);
114}
115
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116/* A structure for mapping a particular speed and duplex
117 * combination to a particular SUPPORTED and ADVERTISED value */
118struct phy_setting {
119 int speed;
120 int duplex;
121 u32 setting;
122};
123
124/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 125static const struct phy_setting settings[] = {
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AF
126 {
127 .speed = 10000,
128 .duplex = DUPLEX_FULL,
129 .setting = SUPPORTED_10000baseT_Full,
130 },
131 {
132 .speed = SPEED_1000,
133 .duplex = DUPLEX_FULL,
134 .setting = SUPPORTED_1000baseT_Full,
135 },
136 {
137 .speed = SPEED_1000,
138 .duplex = DUPLEX_HALF,
139 .setting = SUPPORTED_1000baseT_Half,
140 },
141 {
142 .speed = SPEED_100,
143 .duplex = DUPLEX_FULL,
144 .setting = SUPPORTED_100baseT_Full,
145 },
146 {
147 .speed = SPEED_100,
148 .duplex = DUPLEX_HALF,
149 .setting = SUPPORTED_100baseT_Half,
150 },
151 {
152 .speed = SPEED_10,
153 .duplex = DUPLEX_FULL,
154 .setting = SUPPORTED_10baseT_Full,
155 },
156 {
157 .speed = SPEED_10,
158 .duplex = DUPLEX_HALF,
159 .setting = SUPPORTED_10baseT_Half,
160 },
161};
162
ff8ac609 163#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 164
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165/**
166 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
167 * @speed: speed to match
168 * @duplex: duplex to match
00db8189 169 *
b3df0da8 170 * Description: Searches the settings array for the setting which
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AF
171 * matches the desired speed and duplex, and returns the index
172 * of that setting. Returns the index of the last setting if
173 * none of the others match.
174 */
175static inline int phy_find_setting(int speed, int duplex)
176{
177 int idx = 0;
178
179 while (idx < ARRAY_SIZE(settings) &&
180 (settings[idx].speed != speed ||
181 settings[idx].duplex != duplex))
182 idx++;
183
184 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
185}
186
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187/**
188 * phy_find_valid - find a PHY setting that matches the requested features mask
189 * @idx: The first index in settings[] to search
190 * @features: A mask of the valid settings
00db8189 191 *
b3df0da8 192 * Description: Returns the index of the first valid setting less
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AF
193 * than or equal to the one pointed to by idx, as determined by
194 * the mask in features. Returns the index of the last setting
195 * if nothing else matches.
196 */
197static inline int phy_find_valid(int idx, u32 features)
198{
199 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
200 idx++;
201
202 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
203}
204
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205/**
206 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
207 * @phydev: the target phy_device struct
00db8189 208 *
b3df0da8 209 * Description: Make sure the PHY is set to supported speeds and
00db8189 210 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 211 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 212 */
89ff05ec 213static void phy_sanitize_settings(struct phy_device *phydev)
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AF
214{
215 u32 features = phydev->supported;
216 int idx;
217
218 /* Sanitize settings based on PHY capabilities */
219 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 220 phydev->autoneg = AUTONEG_DISABLE;
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221
222 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
223 features);
224
225 phydev->speed = settings[idx].speed;
226 phydev->duplex = settings[idx].duplex;
227}
00db8189 228
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229/**
230 * phy_ethtool_sset - generic ethtool sset function, handles all the details
231 * @phydev: target phy_device struct
232 * @cmd: ethtool_cmd
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233 *
234 * A few notes about parameter checking:
235 * - We don't set port or transceiver, so we don't care what they
236 * were set to.
237 * - phy_start_aneg() will make sure forced settings are sane, and
238 * choose the next best ones from the ones selected, so we don't
b3df0da8 239 * care if ethtool tries to give us bad values.
00db8189
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240 */
241int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
242{
25db0338
DD
243 u32 speed = ethtool_cmd_speed(cmd);
244
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245 if (cmd->phy_address != phydev->addr)
246 return -EINVAL;
247
248 /* We make sure that we don't pass unsupported
249 * values in to the PHY */
250 cmd->advertising &= phydev->supported;
251
252 /* Verify the settings we care about. */
253 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
254 return -EINVAL;
255
256 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
257 return -EINVAL;
258
8e95a202 259 if (cmd->autoneg == AUTONEG_DISABLE &&
25db0338
DD
260 ((speed != SPEED_1000 &&
261 speed != SPEED_100 &&
262 speed != SPEED_10) ||
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JP
263 (cmd->duplex != DUPLEX_HALF &&
264 cmd->duplex != DUPLEX_FULL)))
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265 return -EINVAL;
266
267 phydev->autoneg = cmd->autoneg;
268
25db0338 269 phydev->speed = speed;
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270
271 phydev->advertising = cmd->advertising;
272
273 if (AUTONEG_ENABLE == cmd->autoneg)
274 phydev->advertising |= ADVERTISED_Autoneg;
275 else
276 phydev->advertising &= ~ADVERTISED_Autoneg;
277
278 phydev->duplex = cmd->duplex;
279
280 /* Restart the PHY */
281 phy_start_aneg(phydev);
282
283 return 0;
284}
9f6d55d0 285EXPORT_SYMBOL(phy_ethtool_sset);
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286
287int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
288{
289 cmd->supported = phydev->supported;
290
291 cmd->advertising = phydev->advertising;
292
70739497 293 ethtool_cmd_speed_set(cmd, phydev->speed);
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AF
294 cmd->duplex = phydev->duplex;
295 cmd->port = PORT_MII;
296 cmd->phy_address = phydev->addr;
297 cmd->transceiver = XCVR_EXTERNAL;
298 cmd->autoneg = phydev->autoneg;
299
300 return 0;
301}
9f6d55d0 302EXPORT_SYMBOL(phy_ethtool_gset);
00db8189 303
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RD
304/**
305 * phy_mii_ioctl - generic PHY MII ioctl interface
306 * @phydev: the phy_device struct
00c7d920 307 * @ifr: &struct ifreq for socket ioctl's
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308 * @cmd: ioctl cmd to execute
309 *
310 * Note that this function is currently incompatible with the
00db8189 311 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 312 * current state. Use at own risk.
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AF
313 */
314int phy_mii_ioctl(struct phy_device *phydev,
28b04113 315 struct ifreq *ifr, int cmd)
00db8189 316{
28b04113 317 struct mii_ioctl_data *mii_data = if_mii(ifr);
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AF
318 u16 val = mii_data->val_in;
319
320 switch (cmd) {
321 case SIOCGMIIPHY:
322 mii_data->phy_id = phydev->addr;
c6d6a511
LB
323 /* fall through */
324
00db8189 325 case SIOCGMIIREG:
af1dc13e
PK
326 mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
327 mii_data->reg_num);
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328 break;
329
330 case SIOCSMIIREG:
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331 if (mii_data->phy_id == phydev->addr) {
332 switch(mii_data->reg_num) {
333 case MII_BMCR:
163642a2 334 if ((val & (BMCR_RESET|BMCR_ANENABLE)) == 0)
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AF
335 phydev->autoneg = AUTONEG_DISABLE;
336 else
337 phydev->autoneg = AUTONEG_ENABLE;
338 if ((!phydev->autoneg) && (val & BMCR_FULLDPLX))
339 phydev->duplex = DUPLEX_FULL;
340 else
341 phydev->duplex = DUPLEX_HALF;
024a0a3c
SL
342 if ((!phydev->autoneg) &&
343 (val & BMCR_SPEED1000))
344 phydev->speed = SPEED_1000;
345 else if ((!phydev->autoneg) &&
346 (val & BMCR_SPEED100))
347 phydev->speed = SPEED_100;
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AF
348 break;
349 case MII_ADVERTISE:
350 phydev->advertising = val;
351 break;
352 default:
353 /* do nothing */
354 break;
355 }
356 }
357
af1dc13e
PK
358 mdiobus_write(phydev->bus, mii_data->phy_id,
359 mii_data->reg_num, val);
360
8e95a202
JP
361 if (mii_data->reg_num == MII_BMCR &&
362 val & BMCR_RESET &&
363 phydev->drv->config_init) {
f62220d3 364 phy_scan_fixups(phydev);
00db8189 365 phydev->drv->config_init(phydev);
f62220d3 366 }
00db8189 367 break;
dda93b48 368
c1f19b51
RC
369 case SIOCSHWTSTAMP:
370 if (phydev->drv->hwtstamp)
371 return phydev->drv->hwtstamp(phydev, ifr);
372 /* fall through */
373
dda93b48 374 default:
c6d6a511 375 return -EOPNOTSUPP;
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AF
376 }
377
378 return 0;
379}
680e9fe9 380EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 381
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382/**
383 * phy_start_aneg - start auto-negotiation for this PHY device
384 * @phydev: the phy_device struct
e1393456 385 *
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386 * Description: Sanitizes the settings (if we're not autonegotiating
387 * them), and then calls the driver's config_aneg function.
388 * If the PHYCONTROL Layer is operating, we change the state to
389 * reflect the beginning of Auto-negotiation or forcing.
e1393456
AF
390 */
391int phy_start_aneg(struct phy_device *phydev)
392{
393 int err;
394
35b5f6b1 395 mutex_lock(&phydev->lock);
e1393456
AF
396
397 if (AUTONEG_DISABLE == phydev->autoneg)
398 phy_sanitize_settings(phydev);
399
400 err = phydev->drv->config_aneg(phydev);
401
e1393456
AF
402 if (err < 0)
403 goto out_unlock;
404
405 if (phydev->state != PHY_HALTED) {
406 if (AUTONEG_ENABLE == phydev->autoneg) {
407 phydev->state = PHY_AN;
408 phydev->link_timeout = PHY_AN_TIMEOUT;
409 } else {
410 phydev->state = PHY_FORCING;
411 phydev->link_timeout = PHY_FORCE_TIMEOUT;
412 }
413 }
414
415out_unlock:
35b5f6b1 416 mutex_unlock(&phydev->lock);
e1393456
AF
417 return err;
418}
419EXPORT_SYMBOL(phy_start_aneg);
420
421
b3df0da8
RD
422/**
423 * phy_start_machine - start PHY state machine tracking
424 * @phydev: the phy_device struct
425 * @handler: callback function for state change notifications
00db8189 426 *
b3df0da8 427 * Description: The PHY infrastructure can run a state machine
00db8189
AF
428 * which tracks whether the PHY is starting up, negotiating,
429 * etc. This function starts the timer which tracks the state
b3df0da8
RD
430 * of the PHY. If you want to be notified when the state changes,
431 * pass in the callback @handler, otherwise, pass NULL. If you
00db8189 432 * want to maintain your own state machine, do not call this
b3df0da8
RD
433 * function.
434 */
00db8189
AF
435void phy_start_machine(struct phy_device *phydev,
436 void (*handler)(struct net_device *))
437{
438 phydev->adjust_state = handler;
439
3664090e 440 schedule_delayed_work(&phydev->state_queue, HZ);
00db8189
AF
441}
442
b3df0da8
RD
443/**
444 * phy_stop_machine - stop the PHY state machine tracking
445 * @phydev: target phy_device struct
00db8189 446 *
b3df0da8 447 * Description: Stops the state machine timer, sets the state to UP
817acf5e 448 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
449 * phy_detach.
450 */
451void phy_stop_machine(struct phy_device *phydev)
452{
a390d1f3 453 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 454
35b5f6b1 455 mutex_lock(&phydev->lock);
00db8189
AF
456 if (phydev->state > PHY_UP)
457 phydev->state = PHY_UP;
35b5f6b1 458 mutex_unlock(&phydev->lock);
00db8189 459
00db8189
AF
460 phydev->adjust_state = NULL;
461}
462
b3df0da8
RD
463/**
464 * phy_error - enter HALTED state for this PHY device
465 * @phydev: target phy_device struct
00db8189
AF
466 *
467 * Moves the PHY to the HALTED state in response to a read
468 * or write error, and tells the controller the link is down.
469 * Must not be called from interrupt context, or while the
470 * phydev->lock is held.
471 */
9b9a8bfc 472static void phy_error(struct phy_device *phydev)
00db8189 473{
35b5f6b1 474 mutex_lock(&phydev->lock);
00db8189 475 phydev->state = PHY_HALTED;
35b5f6b1 476 mutex_unlock(&phydev->lock);
00db8189
AF
477}
478
b3df0da8
RD
479/**
480 * phy_interrupt - PHY interrupt handler
481 * @irq: interrupt line
482 * @phy_dat: phy_device pointer
e1393456 483 *
b3df0da8 484 * Description: When a PHY interrupt occurs, the handler disables
e1393456
AF
485 * interrupts, and schedules a work task to clear the interrupt.
486 */
7d12e780 487static irqreturn_t phy_interrupt(int irq, void *phy_dat)
e1393456
AF
488{
489 struct phy_device *phydev = phy_dat;
490
3c3070d7
MR
491 if (PHY_HALTED == phydev->state)
492 return IRQ_NONE; /* It can't be ours. */
493
e1393456
AF
494 /* The MDIO bus is not allowed to be written in interrupt
495 * context, so we need to disable the irq here. A work
496 * queue will write the PHY to disable and clear the
497 * interrupt, and then reenable the irq line. */
498 disable_irq_nosync(irq);
0ac49527 499 atomic_inc(&phydev->irq_disable);
e1393456
AF
500
501 schedule_work(&phydev->phy_queue);
502
503 return IRQ_HANDLED;
504}
505
b3df0da8
RD
506/**
507 * phy_enable_interrupts - Enable the interrupts from the PHY side
508 * @phydev: target phy_device struct
509 */
89ff05ec 510static int phy_enable_interrupts(struct phy_device *phydev)
00db8189
AF
511{
512 int err;
513
e1393456 514 err = phy_clear_interrupt(phydev);
00db8189 515
e1393456
AF
516 if (err < 0)
517 return err;
00db8189 518
e1393456 519 err = phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189
AF
520
521 return err;
522}
00db8189 523
b3df0da8
RD
524/**
525 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
526 * @phydev: target phy_device struct
527 */
89ff05ec 528static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
529{
530 int err;
531
532 /* Disable PHY interrupts */
533 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
534
535 if (err)
536 goto phy_err;
537
538 /* Clear the interrupt */
539 err = phy_clear_interrupt(phydev);
540
541 if (err)
542 goto phy_err;
543
544 return 0;
545
546phy_err:
547 phy_error(phydev);
548
549 return err;
550}
e1393456 551
b3df0da8
RD
552/**
553 * phy_start_interrupts - request and enable interrupts for a PHY device
554 * @phydev: target phy_device struct
e1393456 555 *
b3df0da8
RD
556 * Description: Request the interrupt for the given PHY.
557 * If this fails, then we set irq to PHY_POLL.
e1393456 558 * Otherwise, we enable the interrupts in the PHY.
e1393456 559 * This should only be called with a valid IRQ number.
b3df0da8 560 * Returns 0 on success or < 0 on error.
e1393456
AF
561 */
562int phy_start_interrupts(struct phy_device *phydev)
563{
564 int err = 0;
565
0ac49527 566 atomic_set(&phydev->irq_disable, 0);
e1393456 567 if (request_irq(phydev->irq, phy_interrupt,
1fb9df5d 568 IRQF_SHARED,
e1393456
AF
569 "phy_interrupt",
570 phydev) < 0) {
8d242488
JP
571 pr_warn("%s: Can't get IRQ %d (PHY)\n",
572 phydev->bus->name, phydev->irq);
e1393456
AF
573 phydev->irq = PHY_POLL;
574 return 0;
575 }
576
577 err = phy_enable_interrupts(phydev);
578
579 return err;
580}
581EXPORT_SYMBOL(phy_start_interrupts);
582
b3df0da8
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583/**
584 * phy_stop_interrupts - disable interrupts from a PHY device
585 * @phydev: target phy_device struct
586 */
e1393456
AF
587int phy_stop_interrupts(struct phy_device *phydev)
588{
589 int err;
590
591 err = phy_disable_interrupts(phydev);
592
593 if (err)
594 phy_error(phydev);
595
0ac49527
MR
596 free_irq(phydev->irq, phydev);
597
3c3070d7 598 /*
0ac49527
MR
599 * Cannot call flush_scheduled_work() here as desired because
600 * of rtnl_lock(), but we do not really care about what would
601 * be done, except from enable_irq(), so cancel any work
602 * possibly pending and take care of the matter below.
3c3070d7 603 */
28e53bdd 604 cancel_work_sync(&phydev->phy_queue);
0ac49527
MR
605 /*
606 * If work indeed has been cancelled, disable_irq() will have
607 * been left unbalanced from phy_interrupt() and enable_irq()
608 * has to be called so that other devices on the line work.
609 */
610 while (atomic_dec_return(&phydev->irq_disable) >= 0)
611 enable_irq(phydev->irq);
e1393456
AF
612
613 return err;
614}
615EXPORT_SYMBOL(phy_stop_interrupts);
616
617
b3df0da8
RD
618/**
619 * phy_change - Scheduled by the phy_interrupt/timer to handle PHY changes
620 * @work: work_struct that describes the work to be done
621 */
5ea94e76 622void phy_change(struct work_struct *work)
e1393456
AF
623{
624 int err;
c4028958
DH
625 struct phy_device *phydev =
626 container_of(work, struct phy_device, phy_queue);
e1393456 627
a8729eb3
AG
628 if (phydev->drv->did_interrupt &&
629 !phydev->drv->did_interrupt(phydev))
630 goto ignore;
631
e1393456
AF
632 err = phy_disable_interrupts(phydev);
633
634 if (err)
635 goto phy_err;
636
35b5f6b1 637 mutex_lock(&phydev->lock);
e1393456
AF
638 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
639 phydev->state = PHY_CHANGELINK;
35b5f6b1 640 mutex_unlock(&phydev->lock);
e1393456 641
0ac49527 642 atomic_dec(&phydev->irq_disable);
e1393456
AF
643 enable_irq(phydev->irq);
644
645 /* Reenable interrupts */
3c3070d7
MR
646 if (PHY_HALTED != phydev->state)
647 err = phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
e1393456
AF
648
649 if (err)
650 goto irq_enable_err;
651
a390d1f3
MS
652 /* reschedule state queue work to run as soon as possible */
653 cancel_delayed_work_sync(&phydev->state_queue);
654 schedule_delayed_work(&phydev->state_queue, 0);
0acb2839 655
e1393456
AF
656 return;
657
a8729eb3
AG
658ignore:
659 atomic_dec(&phydev->irq_disable);
660 enable_irq(phydev->irq);
661 return;
662
e1393456
AF
663irq_enable_err:
664 disable_irq(phydev->irq);
0ac49527 665 atomic_inc(&phydev->irq_disable);
e1393456
AF
666phy_err:
667 phy_error(phydev);
668}
669
b3df0da8
RD
670/**
671 * phy_stop - Bring down the PHY link, and stop checking the status
672 * @phydev: target phy_device struct
673 */
e1393456
AF
674void phy_stop(struct phy_device *phydev)
675{
35b5f6b1 676 mutex_lock(&phydev->lock);
e1393456
AF
677
678 if (PHY_HALTED == phydev->state)
679 goto out_unlock;
680
2c7b4921 681 if (phy_interrupt_is_valid(phydev)) {
e1393456
AF
682 /* Disable PHY Interrupts */
683 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 684
3c3070d7
MR
685 /* Clear any pending interrupts */
686 phy_clear_interrupt(phydev);
687 }
e1393456 688
6daf6531
MR
689 phydev->state = PHY_HALTED;
690
e1393456 691out_unlock:
35b5f6b1 692 mutex_unlock(&phydev->lock);
3c3070d7
MR
693
694 /*
695 * Cannot call flush_scheduled_work() here as desired because
696 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
697 * will not reenable interrupts.
698 */
e1393456
AF
699}
700
701
b3df0da8
RD
702/**
703 * phy_start - start or restart a PHY device
704 * @phydev: target phy_device struct
e1393456 705 *
b3df0da8 706 * Description: Indicates the attached device's readiness to
e1393456
AF
707 * handle PHY-related work. Used during startup to start the
708 * PHY, and after a call to phy_stop() to resume operation.
709 * Also used to indicate the MDIO bus has cleared an error
710 * condition.
711 */
712void phy_start(struct phy_device *phydev)
713{
35b5f6b1 714 mutex_lock(&phydev->lock);
e1393456
AF
715
716 switch (phydev->state) {
717 case PHY_STARTING:
718 phydev->state = PHY_PENDING;
719 break;
720 case PHY_READY:
721 phydev->state = PHY_UP;
722 break;
723 case PHY_HALTED:
724 phydev->state = PHY_RESUMING;
725 default:
726 break;
727 }
35b5f6b1 728 mutex_unlock(&phydev->lock);
e1393456
AF
729}
730EXPORT_SYMBOL(phy_stop);
731EXPORT_SYMBOL(phy_start);
67c4f3fa 732
35b5f6b1
NC
733/**
734 * phy_state_machine - Handle the state machine
735 * @work: work_struct that describes the work to be done
35b5f6b1 736 */
4f9c85a1 737void phy_state_machine(struct work_struct *work)
00db8189 738{
bf6aede7 739 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 740 struct phy_device *phydev =
a390d1f3 741 container_of(dwork, struct phy_device, state_queue);
00db8189
AF
742 int needs_aneg = 0;
743 int err = 0;
744
35b5f6b1 745 mutex_lock(&phydev->lock);
00db8189
AF
746
747 if (phydev->adjust_state)
748 phydev->adjust_state(phydev->attached_dev);
749
750 switch(phydev->state) {
751 case PHY_DOWN:
752 case PHY_STARTING:
753 case PHY_READY:
754 case PHY_PENDING:
755 break;
756 case PHY_UP:
757 needs_aneg = 1;
758
759 phydev->link_timeout = PHY_AN_TIMEOUT;
760
761 break;
762 case PHY_AN:
6b655529
AF
763 err = phy_read_status(phydev);
764
765 if (err < 0)
766 break;
767
768 /* If the link is down, give up on
769 * negotiation for now */
770 if (!phydev->link) {
771 phydev->state = PHY_NOLINK;
772 netif_carrier_off(phydev->attached_dev);
773 phydev->adjust_link(phydev->attached_dev);
774 break;
775 }
776
00db8189
AF
777 /* Check if negotiation is done. Break
778 * if there's an error */
779 err = phy_aneg_done(phydev);
780 if (err < 0)
781 break;
782
6b655529 783 /* If AN is done, we're running */
00db8189 784 if (err > 0) {
6b655529
AF
785 phydev->state = PHY_RUNNING;
786 netif_carrier_on(phydev->attached_dev);
787 phydev->adjust_link(phydev->attached_dev);
00db8189 788
6b655529 789 } else if (0 == phydev->link_timeout--) {
6b655529
AF
790 needs_aneg = 1;
791 /* If we have the magic_aneg bit,
792 * we try again */
793 if (phydev->drv->flags & PHY_HAS_MAGICANEG)
00db8189 794 break;
00db8189
AF
795 }
796 break;
797 case PHY_NOLINK:
798 err = phy_read_status(phydev);
799
800 if (err)
801 break;
802
803 if (phydev->link) {
804 phydev->state = PHY_RUNNING;
805 netif_carrier_on(phydev->attached_dev);
806 phydev->adjust_link(phydev->attached_dev);
807 }
808 break;
809 case PHY_FORCING:
6b655529 810 err = genphy_update_link(phydev);
00db8189
AF
811
812 if (err)
813 break;
814
815 if (phydev->link) {
816 phydev->state = PHY_RUNNING;
817 netif_carrier_on(phydev->attached_dev);
818 } else {
a33e6112 819 if (0 == phydev->link_timeout--)
00db8189 820 needs_aneg = 1;
00db8189
AF
821 }
822
823 phydev->adjust_link(phydev->attached_dev);
824 break;
825 case PHY_RUNNING:
826 /* Only register a CHANGE if we are
2c7b4921
FF
827 * polling or ignoring interrupts
828 */
829 if (!phy_interrupt_is_valid(phydev))
00db8189
AF
830 phydev->state = PHY_CHANGELINK;
831 break;
832 case PHY_CHANGELINK:
833 err = phy_read_status(phydev);
834
835 if (err)
836 break;
837
838 if (phydev->link) {
839 phydev->state = PHY_RUNNING;
840 netif_carrier_on(phydev->attached_dev);
841 } else {
842 phydev->state = PHY_NOLINK;
843 netif_carrier_off(phydev->attached_dev);
844 }
845
846 phydev->adjust_link(phydev->attached_dev);
847
2c7b4921 848 if (phy_interrupt_is_valid(phydev))
00db8189
AF
849 err = phy_config_interrupt(phydev,
850 PHY_INTERRUPT_ENABLED);
851 break;
852 case PHY_HALTED:
853 if (phydev->link) {
854 phydev->link = 0;
855 netif_carrier_off(phydev->attached_dev);
856 phydev->adjust_link(phydev->attached_dev);
857 }
858 break;
859 case PHY_RESUMING:
860
861 err = phy_clear_interrupt(phydev);
862
863 if (err)
864 break;
865
866 err = phy_config_interrupt(phydev,
867 PHY_INTERRUPT_ENABLED);
868
869 if (err)
870 break;
871
872 if (AUTONEG_ENABLE == phydev->autoneg) {
873 err = phy_aneg_done(phydev);
874 if (err < 0)
875 break;
876
877 /* err > 0 if AN is done.
878 * Otherwise, it's 0, and we're
879 * still waiting for AN */
880 if (err > 0) {
42caa074
WF
881 err = phy_read_status(phydev);
882 if (err)
883 break;
884
885 if (phydev->link) {
886 phydev->state = PHY_RUNNING;
887 netif_carrier_on(phydev->attached_dev);
888 } else
889 phydev->state = PHY_NOLINK;
890 phydev->adjust_link(phydev->attached_dev);
00db8189
AF
891 } else {
892 phydev->state = PHY_AN;
893 phydev->link_timeout = PHY_AN_TIMEOUT;
894 }
42caa074
WF
895 } else {
896 err = phy_read_status(phydev);
897 if (err)
898 break;
899
900 if (phydev->link) {
901 phydev->state = PHY_RUNNING;
902 netif_carrier_on(phydev->attached_dev);
903 } else
904 phydev->state = PHY_NOLINK;
905 phydev->adjust_link(phydev->attached_dev);
906 }
00db8189
AF
907 break;
908 }
909
35b5f6b1 910 mutex_unlock(&phydev->lock);
00db8189
AF
911
912 if (needs_aneg)
913 err = phy_start_aneg(phydev);
914
915 if (err < 0)
916 phy_error(phydev);
917
3664090e 918 schedule_delayed_work(&phydev->state_queue, PHY_STATE_TIME * HZ);
35b5f6b1 919}
a59a4d19 920
5ea94e76
FF
921void phy_mac_interrupt(struct phy_device *phydev, int new_link)
922{
923 cancel_work_sync(&phydev->phy_queue);
924 phydev->link = new_link;
925 schedule_work(&phydev->phy_queue);
926}
927EXPORT_SYMBOL(phy_mac_interrupt);
928
a59a4d19
GC
929static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
930 int addr)
931{
932 /* Write the desired MMD Devad */
933 bus->write(bus, addr, MII_MMD_CTRL, devad);
934
935 /* Write the desired MMD register address */
936 bus->write(bus, addr, MII_MMD_DATA, prtad);
937
938 /* Select the Function : DATA with no post increment */
939 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
940}
941
942/**
943 * phy_read_mmd_indirect - reads data from the MMD registers
944 * @bus: the target MII bus
945 * @prtad: MMD Address
946 * @devad: MMD DEVAD
947 * @addr: PHY address on the MII bus
948 *
949 * Description: it reads data from the MMD registers (clause 22 to access to
950 * clause 45) of the specified phy address.
951 * To read these register we have:
952 * 1) Write reg 13 // DEVAD
953 * 2) Write reg 14 // MMD Address
954 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
955 * 3) Read reg 14 // Read MMD data
956 */
957static int phy_read_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
958 int addr)
959{
960 u32 ret;
961
962 mmd_phy_indirect(bus, prtad, devad, addr);
963
964 /* Read the content of the MMD's selected register */
965 ret = bus->read(bus, addr, MII_MMD_DATA);
966
967 return ret;
968}
969
970/**
971 * phy_write_mmd_indirect - writes data to the MMD registers
972 * @bus: the target MII bus
973 * @prtad: MMD Address
974 * @devad: MMD DEVAD
975 * @addr: PHY address on the MII bus
976 * @data: data to write in the MMD register
977 *
978 * Description: Write data from the MMD registers of the specified
979 * phy address.
980 * To write these register we have:
981 * 1) Write reg 13 // DEVAD
982 * 2) Write reg 14 // MMD Address
983 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
984 * 3) Write reg 14 // Write MMD data
985 */
986static void phy_write_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
987 int addr, u32 data)
988{
989 mmd_phy_indirect(bus, prtad, devad, addr);
990
991 /* Write the data into MMD's selected register */
992 bus->write(bus, addr, MII_MMD_DATA, data);
993}
994
a59a4d19
GC
995/**
996 * phy_init_eee - init and check the EEE feature
997 * @phydev: target phy_device struct
998 * @clk_stop_enable: PHY may stop the clock during LPI
999 *
1000 * Description: it checks if the Energy-Efficient Ethernet (EEE)
1001 * is supported by looking at the MMD registers 3.20 and 7.60/61
1002 * and it programs the MMD register 3.0 setting the "Clock stop enable"
1003 * bit if required.
1004 */
1005int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
1006{
1007 int ret = -EPROTONOSUPPORT;
1008
1009 /* According to 802.3az,the EEE is supported only in full duplex-mode.
1010 * Also EEE feature is active when core is operating with MII, GMII
1011 * or RGMII.
1012 */
1013 if ((phydev->duplex == DUPLEX_FULL) &&
1014 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
1015 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
1016 (phydev->interface == PHY_INTERFACE_MODE_RGMII))) {
1017 int eee_lp, eee_cap, eee_adv;
1018 u32 lp, cap, adv;
1019 int idx, status;
1020
1021 /* Read phy status to properly get the right settings */
1022 status = phy_read_status(phydev);
1023 if (status)
1024 return status;
1025
1026 /* First check if the EEE ability is supported */
1027 eee_cap = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
1028 MDIO_MMD_PCS, phydev->addr);
1029 if (eee_cap < 0)
1030 return eee_cap;
1031
b32607dd 1032 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19
GC
1033 if (!cap)
1034 goto eee_exit;
1035
1036 /* Check which link settings negotiated and verify it in
1037 * the EEE advertising registers.
1038 */
1039 eee_lp = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
1040 MDIO_MMD_AN, phydev->addr);
1041 if (eee_lp < 0)
1042 return eee_lp;
1043
1044 eee_adv = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1045 MDIO_MMD_AN, phydev->addr);
1046 if (eee_adv < 0)
1047 return eee_adv;
1048
b32607dd
AB
1049 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
1050 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
a59a4d19
GC
1051 idx = phy_find_setting(phydev->speed, phydev->duplex);
1052 if ((lp & adv & settings[idx].setting))
1053 goto eee_exit;
1054
1055 if (clk_stop_enable) {
1056 /* Configure the PHY to stop receiving xMII
1057 * clock while it is signaling LPI.
1058 */
1059 int val = phy_read_mmd_indirect(phydev->bus, MDIO_CTRL1,
1060 MDIO_MMD_PCS,
1061 phydev->addr);
1062 if (val < 0)
1063 return val;
1064
1065 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
1066 phy_write_mmd_indirect(phydev->bus, MDIO_CTRL1,
1067 MDIO_MMD_PCS, phydev->addr, val);
1068 }
1069
1070 ret = 0; /* EEE supported */
1071 }
1072
1073eee_exit:
1074 return ret;
1075}
1076EXPORT_SYMBOL(phy_init_eee);
1077
1078/**
1079 * phy_get_eee_err - report the EEE wake error count
1080 * @phydev: target phy_device struct
1081 *
1082 * Description: it is to report the number of time where the PHY
1083 * failed to complete its normal wake sequence.
1084 */
1085int phy_get_eee_err(struct phy_device *phydev)
1086{
1087 return phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_WK_ERR,
1088 MDIO_MMD_PCS, phydev->addr);
1089
1090}
1091EXPORT_SYMBOL(phy_get_eee_err);
1092
1093/**
1094 * phy_ethtool_get_eee - get EEE supported and status
1095 * @phydev: target phy_device struct
1096 * @data: ethtool_eee data
1097 *
1098 * Description: it reportes the Supported/Advertisement/LP Advertisement
1099 * capabilities.
1100 */
1101int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1102{
1103 int val;
1104
1105 /* Get Supported EEE */
1106 val = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
1107 MDIO_MMD_PCS, phydev->addr);
1108 if (val < 0)
1109 return val;
b32607dd 1110 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
a59a4d19
GC
1111
1112 /* Get advertisement EEE */
1113 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1114 MDIO_MMD_AN, phydev->addr);
1115 if (val < 0)
1116 return val;
b32607dd 1117 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1118
1119 /* Get LP advertisement EEE */
1120 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
1121 MDIO_MMD_AN, phydev->addr);
1122 if (val < 0)
1123 return val;
b32607dd 1124 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1125
1126 return 0;
1127}
1128EXPORT_SYMBOL(phy_ethtool_get_eee);
1129
1130/**
1131 * phy_ethtool_set_eee - set EEE supported and status
1132 * @phydev: target phy_device struct
1133 * @data: ethtool_eee data
1134 *
1135 * Description: it is to program the Advertisement EEE register.
1136 */
1137int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1138{
1139 int val;
1140
b32607dd 1141 val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19
GC
1142 phy_write_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV, MDIO_MMD_AN,
1143 phydev->addr, val);
1144
1145 return 0;
1146}
1147EXPORT_SYMBOL(phy_ethtool_set_eee);
42e836eb
MS
1148
1149int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1150{
1151 if (phydev->drv->set_wol)
1152 return phydev->drv->set_wol(phydev, wol);
1153
1154 return -EOPNOTSUPP;
1155}
1156EXPORT_SYMBOL(phy_ethtool_set_wol);
1157
1158void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1159{
1160 if (phydev->drv->get_wol)
1161 phydev->drv->get_wol(phydev, wol);
1162}
1163EXPORT_SYMBOL(phy_ethtool_get_wol);