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2f53e904 1/* Framework for configuring and reading PHY devices
00db8189
AF
2 * Based on code in sungem_phy.c and gianfar_phy.c
3 *
4 * Author: Andy Fleming
5 *
6 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 7 * Copyright (c) 2006, 2007 Maciej W. Rozycki
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AF
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
8d242488
JP
15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
00db8189 18#include <linux/kernel.h>
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AF
19#include <linux/string.h>
20#include <linux/errno.h>
21#include <linux/unistd.h>
00db8189 22#include <linux/interrupt.h>
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AF
23#include <linux/delay.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/skbuff.h>
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AF
27#include <linux/mm.h>
28#include <linux/module.h>
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AF
29#include <linux/mii.h>
30#include <linux/ethtool.h>
31#include <linux/phy.h>
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MR
32#include <linux/timer.h>
33#include <linux/workqueue.h>
a59a4d19 34#include <linux/mdio.h>
2f53e904
SS
35#include <linux/io.h>
36#include <linux/uaccess.h>
60063497 37#include <linux/atomic.h>
2f53e904 38
00db8189 39#include <asm/irq.h>
00db8189 40
766d1d38
FF
41static const char *phy_speed_to_str(int speed)
42{
43 switch (speed) {
44 case SPEED_10:
45 return "10Mbps";
46 case SPEED_100:
47 return "100Mbps";
48 case SPEED_1000:
49 return "1Gbps";
50 case SPEED_2500:
51 return "2.5Gbps";
52 case SPEED_10000:
53 return "10Gbps";
54 case SPEED_UNKNOWN:
55 return "Unknown";
56 default:
57 return "Unsupported (update phy.c)";
58 }
59}
60
3e2186e0
FF
61#define PHY_STATE_STR(_state) \
62 case PHY_##_state: \
63 return __stringify(_state); \
64
65static const char *phy_state_to_str(enum phy_state st)
66{
67 switch (st) {
68 PHY_STATE_STR(DOWN)
69 PHY_STATE_STR(STARTING)
70 PHY_STATE_STR(READY)
71 PHY_STATE_STR(PENDING)
72 PHY_STATE_STR(UP)
73 PHY_STATE_STR(AN)
74 PHY_STATE_STR(RUNNING)
75 PHY_STATE_STR(NOLINK)
76 PHY_STATE_STR(FORCING)
77 PHY_STATE_STR(CHANGELINK)
78 PHY_STATE_STR(HALTED)
79 PHY_STATE_STR(RESUMING)
80 }
81
82 return NULL;
83}
84
85
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RD
86/**
87 * phy_print_status - Convenience function to print out the current phy status
88 * @phydev: the phy_device struct
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AF
89 */
90void phy_print_status(struct phy_device *phydev)
91{
2f53e904 92 if (phydev->link) {
df40cc88 93 netdev_info(phydev->attached_dev,
766d1d38
FF
94 "Link is Up - %s/%s - flow control %s\n",
95 phy_speed_to_str(phydev->speed),
df40cc88
FF
96 DUPLEX_FULL == phydev->duplex ? "Full" : "Half",
97 phydev->pause ? "rx/tx" : "off");
2f53e904 98 } else {
43b6329f 99 netdev_info(phydev->attached_dev, "Link is Down\n");
2f53e904 100 }
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AF
101}
102EXPORT_SYMBOL(phy_print_status);
00db8189 103
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RD
104/**
105 * phy_clear_interrupt - Ack the phy device's interrupt
106 * @phydev: the phy_device struct
107 *
108 * If the @phydev driver has an ack_interrupt function, call it to
109 * ack and clear the phy device's interrupt.
110 *
ad033506 111 * Returns 0 on success or < 0 on error.
b3df0da8 112 */
89ff05ec 113static int phy_clear_interrupt(struct phy_device *phydev)
00db8189 114{
00db8189 115 if (phydev->drv->ack_interrupt)
e62a768f 116 return phydev->drv->ack_interrupt(phydev);
00db8189 117
e62a768f 118 return 0;
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AF
119}
120
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RD
121/**
122 * phy_config_interrupt - configure the PHY device for the requested interrupts
123 * @phydev: the phy_device struct
124 * @interrupts: interrupt flags to configure for this @phydev
125 *
ad033506 126 * Returns 0 on success or < 0 on error.
b3df0da8 127 */
89ff05ec 128static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
00db8189 129{
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AF
130 phydev->interrupts = interrupts;
131 if (phydev->drv->config_intr)
e62a768f 132 return phydev->drv->config_intr(phydev);
00db8189 133
e62a768f 134 return 0;
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AF
135}
136
137
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RD
138/**
139 * phy_aneg_done - return auto-negotiation status
140 * @phydev: target phy_device struct
00db8189 141 *
76a423a3
FF
142 * Description: Return the auto-negotiation status from this @phydev
143 * Returns > 0 on success or < 0 on error. 0 means that auto-negotiation
144 * is still pending.
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AF
145 */
146static inline int phy_aneg_done(struct phy_device *phydev)
147{
76a423a3
FF
148 if (phydev->drv->aneg_done)
149 return phydev->drv->aneg_done(phydev);
150
a9fa6e6a 151 return genphy_aneg_done(phydev);
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AF
152}
153
00db8189 154/* A structure for mapping a particular speed and duplex
2f53e904
SS
155 * combination to a particular SUPPORTED and ADVERTISED value
156 */
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157struct phy_setting {
158 int speed;
159 int duplex;
160 u32 setting;
161};
162
163/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 164static const struct phy_setting settings[] = {
00db8189 165 {
3e707706
LT
166 .speed = SPEED_10000,
167 .duplex = DUPLEX_FULL,
168 .setting = SUPPORTED_10000baseKR_Full,
169 },
170 {
171 .speed = SPEED_10000,
172 .duplex = DUPLEX_FULL,
173 .setting = SUPPORTED_10000baseKX4_Full,
174 },
175 {
176 .speed = SPEED_10000,
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AF
177 .duplex = DUPLEX_FULL,
178 .setting = SUPPORTED_10000baseT_Full,
179 },
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LT
180 {
181 .speed = SPEED_2500,
182 .duplex = DUPLEX_FULL,
183 .setting = SUPPORTED_2500baseX_Full,
184 },
185 {
186 .speed = SPEED_1000,
187 .duplex = DUPLEX_FULL,
188 .setting = SUPPORTED_1000baseKX_Full,
189 },
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AF
190 {
191 .speed = SPEED_1000,
192 .duplex = DUPLEX_FULL,
193 .setting = SUPPORTED_1000baseT_Full,
194 },
195 {
196 .speed = SPEED_1000,
197 .duplex = DUPLEX_HALF,
198 .setting = SUPPORTED_1000baseT_Half,
199 },
200 {
201 .speed = SPEED_100,
202 .duplex = DUPLEX_FULL,
203 .setting = SUPPORTED_100baseT_Full,
204 },
205 {
206 .speed = SPEED_100,
207 .duplex = DUPLEX_HALF,
208 .setting = SUPPORTED_100baseT_Half,
209 },
210 {
211 .speed = SPEED_10,
212 .duplex = DUPLEX_FULL,
213 .setting = SUPPORTED_10baseT_Full,
214 },
215 {
216 .speed = SPEED_10,
217 .duplex = DUPLEX_HALF,
218 .setting = SUPPORTED_10baseT_Half,
219 },
220};
221
ff8ac609 222#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 223
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RD
224/**
225 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
226 * @speed: speed to match
227 * @duplex: duplex to match
00db8189 228 *
b3df0da8 229 * Description: Searches the settings array for the setting which
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AF
230 * matches the desired speed and duplex, and returns the index
231 * of that setting. Returns the index of the last setting if
232 * none of the others match.
233 */
4ae6e50c 234static inline unsigned int phy_find_setting(int speed, int duplex)
00db8189 235{
4ae6e50c 236 unsigned int idx = 0;
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AF
237
238 while (idx < ARRAY_SIZE(settings) &&
2f53e904 239 (settings[idx].speed != speed || settings[idx].duplex != duplex))
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240 idx++;
241
242 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
243}
244
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245/**
246 * phy_find_valid - find a PHY setting that matches the requested features mask
247 * @idx: The first index in settings[] to search
248 * @features: A mask of the valid settings
00db8189 249 *
b3df0da8 250 * Description: Returns the index of the first valid setting less
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AF
251 * than or equal to the one pointed to by idx, as determined by
252 * the mask in features. Returns the index of the last setting
253 * if nothing else matches.
254 */
4ae6e50c 255static inline unsigned int phy_find_valid(unsigned int idx, u32 features)
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AF
256{
257 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
258 idx++;
259
260 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
261}
262
54da5a8b
GR
263/**
264 * phy_check_valid - check if there is a valid PHY setting which matches
265 * speed, duplex, and feature mask
266 * @speed: speed to match
267 * @duplex: duplex to match
268 * @features: A mask of the valid settings
269 *
270 * Description: Returns true if there is a valid setting, false otherwise.
271 */
272static inline bool phy_check_valid(int speed, int duplex, u32 features)
273{
274 unsigned int idx;
275
276 idx = phy_find_valid(phy_find_setting(speed, duplex), features);
277
278 return settings[idx].speed == speed && settings[idx].duplex == duplex &&
279 (settings[idx].setting & features);
280}
281
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RD
282/**
283 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
284 * @phydev: the target phy_device struct
00db8189 285 *
b3df0da8 286 * Description: Make sure the PHY is set to supported speeds and
00db8189 287 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 288 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 289 */
89ff05ec 290static void phy_sanitize_settings(struct phy_device *phydev)
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AF
291{
292 u32 features = phydev->supported;
4ae6e50c 293 unsigned int idx;
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AF
294
295 /* Sanitize settings based on PHY capabilities */
296 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 297 phydev->autoneg = AUTONEG_DISABLE;
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AF
298
299 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
300 features);
301
302 phydev->speed = settings[idx].speed;
303 phydev->duplex = settings[idx].duplex;
304}
00db8189 305
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306/**
307 * phy_ethtool_sset - generic ethtool sset function, handles all the details
308 * @phydev: target phy_device struct
309 * @cmd: ethtool_cmd
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AF
310 *
311 * A few notes about parameter checking:
312 * - We don't set port or transceiver, so we don't care what they
313 * were set to.
314 * - phy_start_aneg() will make sure forced settings are sane, and
315 * choose the next best ones from the ones selected, so we don't
b3df0da8 316 * care if ethtool tries to give us bad values.
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AF
317 */
318int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
319{
25db0338
DD
320 u32 speed = ethtool_cmd_speed(cmd);
321
00db8189
AF
322 if (cmd->phy_address != phydev->addr)
323 return -EINVAL;
324
2f53e904 325 /* We make sure that we don't pass unsupported values in to the PHY */
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AF
326 cmd->advertising &= phydev->supported;
327
328 /* Verify the settings we care about. */
329 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
330 return -EINVAL;
331
332 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
333 return -EINVAL;
334
8e95a202 335 if (cmd->autoneg == AUTONEG_DISABLE &&
25db0338
DD
336 ((speed != SPEED_1000 &&
337 speed != SPEED_100 &&
338 speed != SPEED_10) ||
8e95a202
JP
339 (cmd->duplex != DUPLEX_HALF &&
340 cmd->duplex != DUPLEX_FULL)))
00db8189
AF
341 return -EINVAL;
342
343 phydev->autoneg = cmd->autoneg;
344
25db0338 345 phydev->speed = speed;
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AF
346
347 phydev->advertising = cmd->advertising;
348
349 if (AUTONEG_ENABLE == cmd->autoneg)
350 phydev->advertising |= ADVERTISED_Autoneg;
351 else
352 phydev->advertising &= ~ADVERTISED_Autoneg;
353
354 phydev->duplex = cmd->duplex;
355
634ec36c
DT
356 phydev->mdix = cmd->eth_tp_mdix_ctrl;
357
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AF
358 /* Restart the PHY */
359 phy_start_aneg(phydev);
360
361 return 0;
362}
9f6d55d0 363EXPORT_SYMBOL(phy_ethtool_sset);
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AF
364
365int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
366{
367 cmd->supported = phydev->supported;
368
369 cmd->advertising = phydev->advertising;
114002bc 370 cmd->lp_advertising = phydev->lp_advertising;
00db8189 371
70739497 372 ethtool_cmd_speed_set(cmd, phydev->speed);
00db8189 373 cmd->duplex = phydev->duplex;
c88838ce
FF
374 if (phydev->interface == PHY_INTERFACE_MODE_MOCA)
375 cmd->port = PORT_BNC;
376 else
377 cmd->port = PORT_MII;
00db8189 378 cmd->phy_address = phydev->addr;
4284b6a5
FF
379 cmd->transceiver = phy_is_internal(phydev) ?
380 XCVR_INTERNAL : XCVR_EXTERNAL;
00db8189 381 cmd->autoneg = phydev->autoneg;
239aa55b 382 cmd->eth_tp_mdix_ctrl = phydev->mdix;
00db8189
AF
383
384 return 0;
385}
9f6d55d0 386EXPORT_SYMBOL(phy_ethtool_gset);
00db8189 387
b3df0da8
RD
388/**
389 * phy_mii_ioctl - generic PHY MII ioctl interface
390 * @phydev: the phy_device struct
00c7d920 391 * @ifr: &struct ifreq for socket ioctl's
b3df0da8
RD
392 * @cmd: ioctl cmd to execute
393 *
394 * Note that this function is currently incompatible with the
00db8189 395 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 396 * current state. Use at own risk.
00db8189 397 */
2f53e904 398int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd)
00db8189 399{
28b04113 400 struct mii_ioctl_data *mii_data = if_mii(ifr);
00db8189 401 u16 val = mii_data->val_in;
79ce0477 402 bool change_autoneg = false;
00db8189
AF
403
404 switch (cmd) {
405 case SIOCGMIIPHY:
406 mii_data->phy_id = phydev->addr;
c6d6a511
LB
407 /* fall through */
408
00db8189 409 case SIOCGMIIREG:
af1dc13e
PK
410 mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
411 mii_data->reg_num);
e62a768f 412 return 0;
00db8189
AF
413
414 case SIOCSMIIREG:
00db8189 415 if (mii_data->phy_id == phydev->addr) {
e109374f 416 switch (mii_data->reg_num) {
00db8189 417 case MII_BMCR:
79ce0477
BH
418 if ((val & (BMCR_RESET | BMCR_ANENABLE)) == 0) {
419 if (phydev->autoneg == AUTONEG_ENABLE)
420 change_autoneg = true;
00db8189 421 phydev->autoneg = AUTONEG_DISABLE;
79ce0477
BH
422 if (val & BMCR_FULLDPLX)
423 phydev->duplex = DUPLEX_FULL;
424 else
425 phydev->duplex = DUPLEX_HALF;
426 if (val & BMCR_SPEED1000)
427 phydev->speed = SPEED_1000;
428 else if (val & BMCR_SPEED100)
429 phydev->speed = SPEED_100;
430 else phydev->speed = SPEED_10;
431 }
432 else {
433 if (phydev->autoneg == AUTONEG_DISABLE)
434 change_autoneg = true;
00db8189 435 phydev->autoneg = AUTONEG_ENABLE;
79ce0477 436 }
00db8189
AF
437 break;
438 case MII_ADVERTISE:
79ce0477
BH
439 phydev->advertising = mii_adv_to_ethtool_adv_t(val);
440 change_autoneg = true;
00db8189
AF
441 break;
442 default:
443 /* do nothing */
444 break;
445 }
446 }
447
af1dc13e
PK
448 mdiobus_write(phydev->bus, mii_data->phy_id,
449 mii_data->reg_num, val);
450
8e95a202 451 if (mii_data->reg_num == MII_BMCR &&
2613f95f 452 val & BMCR_RESET)
e62a768f 453 return phy_init_hw(phydev);
79ce0477
BH
454
455 if (change_autoneg)
456 return phy_start_aneg(phydev);
457
e62a768f 458 return 0;
dda93b48 459
c1f19b51
RC
460 case SIOCSHWTSTAMP:
461 if (phydev->drv->hwtstamp)
462 return phydev->drv->hwtstamp(phydev, ifr);
463 /* fall through */
464
dda93b48 465 default:
c6d6a511 466 return -EOPNOTSUPP;
00db8189 467 }
00db8189 468}
680e9fe9 469EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 470
b3df0da8
RD
471/**
472 * phy_start_aneg - start auto-negotiation for this PHY device
473 * @phydev: the phy_device struct
e1393456 474 *
b3df0da8
RD
475 * Description: Sanitizes the settings (if we're not autonegotiating
476 * them), and then calls the driver's config_aneg function.
477 * If the PHYCONTROL Layer is operating, we change the state to
478 * reflect the beginning of Auto-negotiation or forcing.
e1393456
AF
479 */
480int phy_start_aneg(struct phy_device *phydev)
481{
482 int err;
483
35b5f6b1 484 mutex_lock(&phydev->lock);
e1393456
AF
485
486 if (AUTONEG_DISABLE == phydev->autoneg)
487 phy_sanitize_settings(phydev);
488
9b3320ef
BH
489 /* Invalidate LP advertising flags */
490 phydev->lp_advertising = 0;
491
e1393456 492 err = phydev->drv->config_aneg(phydev);
e1393456
AF
493 if (err < 0)
494 goto out_unlock;
495
496 if (phydev->state != PHY_HALTED) {
497 if (AUTONEG_ENABLE == phydev->autoneg) {
498 phydev->state = PHY_AN;
499 phydev->link_timeout = PHY_AN_TIMEOUT;
500 } else {
501 phydev->state = PHY_FORCING;
502 phydev->link_timeout = PHY_FORCE_TIMEOUT;
503 }
504 }
505
506out_unlock:
35b5f6b1 507 mutex_unlock(&phydev->lock);
e1393456
AF
508 return err;
509}
510EXPORT_SYMBOL(phy_start_aneg);
511
b3df0da8
RD
512/**
513 * phy_start_machine - start PHY state machine tracking
514 * @phydev: the phy_device struct
00db8189 515 *
b3df0da8 516 * Description: The PHY infrastructure can run a state machine
00db8189
AF
517 * which tracks whether the PHY is starting up, negotiating,
518 * etc. This function starts the timer which tracks the state
29935aeb
SS
519 * of the PHY. If you want to maintain your own state machine,
520 * do not call this function.
b3df0da8 521 */
29935aeb 522void phy_start_machine(struct phy_device *phydev)
00db8189 523{
bbb47bde 524 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
00db8189
AF
525}
526
b3df0da8
RD
527/**
528 * phy_stop_machine - stop the PHY state machine tracking
529 * @phydev: target phy_device struct
00db8189 530 *
b3df0da8 531 * Description: Stops the state machine timer, sets the state to UP
817acf5e 532 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
533 * phy_detach.
534 */
535void phy_stop_machine(struct phy_device *phydev)
536{
a390d1f3 537 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 538
35b5f6b1 539 mutex_lock(&phydev->lock);
00db8189
AF
540 if (phydev->state > PHY_UP)
541 phydev->state = PHY_UP;
35b5f6b1 542 mutex_unlock(&phydev->lock);
00db8189
AF
543}
544
b3df0da8
RD
545/**
546 * phy_error - enter HALTED state for this PHY device
547 * @phydev: target phy_device struct
00db8189
AF
548 *
549 * Moves the PHY to the HALTED state in response to a read
550 * or write error, and tells the controller the link is down.
551 * Must not be called from interrupt context, or while the
552 * phydev->lock is held.
553 */
9b9a8bfc 554static void phy_error(struct phy_device *phydev)
00db8189 555{
35b5f6b1 556 mutex_lock(&phydev->lock);
00db8189 557 phydev->state = PHY_HALTED;
35b5f6b1 558 mutex_unlock(&phydev->lock);
00db8189
AF
559}
560
b3df0da8
RD
561/**
562 * phy_interrupt - PHY interrupt handler
563 * @irq: interrupt line
564 * @phy_dat: phy_device pointer
e1393456 565 *
b3df0da8 566 * Description: When a PHY interrupt occurs, the handler disables
e1393456
AF
567 * interrupts, and schedules a work task to clear the interrupt.
568 */
7d12e780 569static irqreturn_t phy_interrupt(int irq, void *phy_dat)
e1393456
AF
570{
571 struct phy_device *phydev = phy_dat;
572
3c3070d7
MR
573 if (PHY_HALTED == phydev->state)
574 return IRQ_NONE; /* It can't be ours. */
575
e1393456
AF
576 /* The MDIO bus is not allowed to be written in interrupt
577 * context, so we need to disable the irq here. A work
578 * queue will write the PHY to disable and clear the
2f53e904
SS
579 * interrupt, and then reenable the irq line.
580 */
e1393456 581 disable_irq_nosync(irq);
0ac49527 582 atomic_inc(&phydev->irq_disable);
e1393456 583
bbb47bde 584 queue_work(system_power_efficient_wq, &phydev->phy_queue);
e1393456
AF
585
586 return IRQ_HANDLED;
587}
588
b3df0da8
RD
589/**
590 * phy_enable_interrupts - Enable the interrupts from the PHY side
591 * @phydev: target phy_device struct
592 */
89ff05ec 593static int phy_enable_interrupts(struct phy_device *phydev)
00db8189 594{
553fe92b 595 int err = phy_clear_interrupt(phydev);
00db8189 596
e1393456
AF
597 if (err < 0)
598 return err;
00db8189 599
553fe92b 600 return phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189 601}
00db8189 602
b3df0da8
RD
603/**
604 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
605 * @phydev: target phy_device struct
606 */
89ff05ec 607static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
608{
609 int err;
610
611 /* Disable PHY interrupts */
612 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
00db8189
AF
613 if (err)
614 goto phy_err;
615
616 /* Clear the interrupt */
617 err = phy_clear_interrupt(phydev);
00db8189
AF
618 if (err)
619 goto phy_err;
620
621 return 0;
622
623phy_err:
624 phy_error(phydev);
625
626 return err;
627}
e1393456 628
b3df0da8
RD
629/**
630 * phy_start_interrupts - request and enable interrupts for a PHY device
631 * @phydev: target phy_device struct
e1393456 632 *
b3df0da8
RD
633 * Description: Request the interrupt for the given PHY.
634 * If this fails, then we set irq to PHY_POLL.
e1393456 635 * Otherwise, we enable the interrupts in the PHY.
e1393456 636 * This should only be called with a valid IRQ number.
b3df0da8 637 * Returns 0 on success or < 0 on error.
e1393456
AF
638 */
639int phy_start_interrupts(struct phy_device *phydev)
640{
0ac49527 641 atomic_set(&phydev->irq_disable, 0);
33c133cc
SS
642 if (request_irq(phydev->irq, phy_interrupt, 0, "phy_interrupt",
643 phydev) < 0) {
8d242488
JP
644 pr_warn("%s: Can't get IRQ %d (PHY)\n",
645 phydev->bus->name, phydev->irq);
e1393456
AF
646 phydev->irq = PHY_POLL;
647 return 0;
648 }
649
e62a768f 650 return phy_enable_interrupts(phydev);
e1393456
AF
651}
652EXPORT_SYMBOL(phy_start_interrupts);
653
b3df0da8
RD
654/**
655 * phy_stop_interrupts - disable interrupts from a PHY device
656 * @phydev: target phy_device struct
657 */
e1393456
AF
658int phy_stop_interrupts(struct phy_device *phydev)
659{
553fe92b 660 int err = phy_disable_interrupts(phydev);
e1393456
AF
661
662 if (err)
663 phy_error(phydev);
664
0ac49527
MR
665 free_irq(phydev->irq, phydev);
666
2f53e904 667 /* Cannot call flush_scheduled_work() here as desired because
0ac49527
MR
668 * of rtnl_lock(), but we do not really care about what would
669 * be done, except from enable_irq(), so cancel any work
670 * possibly pending and take care of the matter below.
3c3070d7 671 */
28e53bdd 672 cancel_work_sync(&phydev->phy_queue);
2f53e904 673 /* If work indeed has been cancelled, disable_irq() will have
0ac49527
MR
674 * been left unbalanced from phy_interrupt() and enable_irq()
675 * has to be called so that other devices on the line work.
676 */
677 while (atomic_dec_return(&phydev->irq_disable) >= 0)
678 enable_irq(phydev->irq);
e1393456
AF
679
680 return err;
681}
682EXPORT_SYMBOL(phy_stop_interrupts);
683
b3df0da8
RD
684/**
685 * phy_change - Scheduled by the phy_interrupt/timer to handle PHY changes
686 * @work: work_struct that describes the work to be done
687 */
5ea94e76 688void phy_change(struct work_struct *work)
e1393456 689{
c4028958
DH
690 struct phy_device *phydev =
691 container_of(work, struct phy_device, phy_queue);
e1393456 692
a8729eb3
AG
693 if (phydev->drv->did_interrupt &&
694 !phydev->drv->did_interrupt(phydev))
695 goto ignore;
696
e62a768f 697 if (phy_disable_interrupts(phydev))
e1393456
AF
698 goto phy_err;
699
35b5f6b1 700 mutex_lock(&phydev->lock);
e1393456
AF
701 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
702 phydev->state = PHY_CHANGELINK;
35b5f6b1 703 mutex_unlock(&phydev->lock);
e1393456 704
0ac49527 705 atomic_dec(&phydev->irq_disable);
e1393456
AF
706 enable_irq(phydev->irq);
707
708 /* Reenable interrupts */
e62a768f
SS
709 if (PHY_HALTED != phydev->state &&
710 phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED))
e1393456
AF
711 goto irq_enable_err;
712
a390d1f3
MS
713 /* reschedule state queue work to run as soon as possible */
714 cancel_delayed_work_sync(&phydev->state_queue);
bbb47bde 715 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
e1393456
AF
716 return;
717
a8729eb3
AG
718ignore:
719 atomic_dec(&phydev->irq_disable);
720 enable_irq(phydev->irq);
721 return;
722
e1393456
AF
723irq_enable_err:
724 disable_irq(phydev->irq);
0ac49527 725 atomic_inc(&phydev->irq_disable);
e1393456
AF
726phy_err:
727 phy_error(phydev);
728}
729
b3df0da8
RD
730/**
731 * phy_stop - Bring down the PHY link, and stop checking the status
732 * @phydev: target phy_device struct
733 */
e1393456
AF
734void phy_stop(struct phy_device *phydev)
735{
35b5f6b1 736 mutex_lock(&phydev->lock);
e1393456
AF
737
738 if (PHY_HALTED == phydev->state)
739 goto out_unlock;
740
2c7b4921 741 if (phy_interrupt_is_valid(phydev)) {
e1393456
AF
742 /* Disable PHY Interrupts */
743 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 744
3c3070d7
MR
745 /* Clear any pending interrupts */
746 phy_clear_interrupt(phydev);
747 }
e1393456 748
6daf6531
MR
749 phydev->state = PHY_HALTED;
750
e1393456 751out_unlock:
35b5f6b1 752 mutex_unlock(&phydev->lock);
3c3070d7 753
2f53e904 754 /* Cannot call flush_scheduled_work() here as desired because
3c3070d7
MR
755 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
756 * will not reenable interrupts.
757 */
e1393456 758}
2f53e904 759EXPORT_SYMBOL(phy_stop);
e1393456 760
b3df0da8
RD
761/**
762 * phy_start - start or restart a PHY device
763 * @phydev: target phy_device struct
e1393456 764 *
b3df0da8 765 * Description: Indicates the attached device's readiness to
e1393456
AF
766 * handle PHY-related work. Used during startup to start the
767 * PHY, and after a call to phy_stop() to resume operation.
768 * Also used to indicate the MDIO bus has cleared an error
769 * condition.
770 */
771void phy_start(struct phy_device *phydev)
772{
c15e10e7
TB
773 bool do_resume = false;
774 int err = 0;
775
35b5f6b1 776 mutex_lock(&phydev->lock);
e1393456
AF
777
778 switch (phydev->state) {
e109374f
FF
779 case PHY_STARTING:
780 phydev->state = PHY_PENDING;
781 break;
782 case PHY_READY:
783 phydev->state = PHY_UP;
784 break;
785 case PHY_HALTED:
c15e10e7
TB
786 /* make sure interrupts are re-enabled for the PHY */
787 err = phy_enable_interrupts(phydev);
788 if (err < 0)
789 break;
790
e109374f 791 phydev->state = PHY_RESUMING;
c15e10e7
TB
792 do_resume = true;
793 break;
e109374f
FF
794 default:
795 break;
e1393456 796 }
35b5f6b1 797 mutex_unlock(&phydev->lock);
c15e10e7
TB
798
799 /* if phy was suspended, bring the physical link up again */
800 if (do_resume)
801 phy_resume(phydev);
e1393456 802}
e1393456 803EXPORT_SYMBOL(phy_start);
67c4f3fa 804
35b5f6b1
NC
805/**
806 * phy_state_machine - Handle the state machine
807 * @work: work_struct that describes the work to be done
35b5f6b1 808 */
4f9c85a1 809void phy_state_machine(struct work_struct *work)
00db8189 810{
bf6aede7 811 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 812 struct phy_device *phydev =
a390d1f3 813 container_of(dwork, struct phy_device, state_queue);
c15e10e7 814 bool needs_aneg = false, do_suspend = false;
3e2186e0 815 enum phy_state old_state;
00db8189 816 int err = 0;
11e122cb 817 int old_link;
00db8189 818
35b5f6b1 819 mutex_lock(&phydev->lock);
00db8189 820
3e2186e0
FF
821 old_state = phydev->state;
822
2b8f2a28
DM
823 if (phydev->drv->link_change_notify)
824 phydev->drv->link_change_notify(phydev);
825
e109374f
FF
826 switch (phydev->state) {
827 case PHY_DOWN:
828 case PHY_STARTING:
829 case PHY_READY:
830 case PHY_PENDING:
831 break;
832 case PHY_UP:
6e14a5ee 833 needs_aneg = true;
00db8189 834
e109374f
FF
835 phydev->link_timeout = PHY_AN_TIMEOUT;
836
837 break;
838 case PHY_AN:
839 err = phy_read_status(phydev);
e109374f 840 if (err < 0)
00db8189 841 break;
6b655529 842
2f53e904 843 /* If the link is down, give up on negotiation for now */
e109374f
FF
844 if (!phydev->link) {
845 phydev->state = PHY_NOLINK;
846 netif_carrier_off(phydev->attached_dev);
847 phydev->adjust_link(phydev->attached_dev);
848 break;
849 }
6b655529 850
2f53e904 851 /* Check if negotiation is done. Break if there's an error */
e109374f
FF
852 err = phy_aneg_done(phydev);
853 if (err < 0)
854 break;
6b655529 855
e109374f
FF
856 /* If AN is done, we're running */
857 if (err > 0) {
858 phydev->state = PHY_RUNNING;
859 netif_carrier_on(phydev->attached_dev);
860 phydev->adjust_link(phydev->attached_dev);
00db8189 861
fa8cddaf 862 } else if (0 == phydev->link_timeout--)
6e14a5ee 863 needs_aneg = true;
e109374f
FF
864 break;
865 case PHY_NOLINK:
866 err = phy_read_status(phydev);
e109374f 867 if (err)
00db8189 868 break;
00db8189 869
e109374f 870 if (phydev->link) {
e46e08b8
BK
871 if (AUTONEG_ENABLE == phydev->autoneg) {
872 err = phy_aneg_done(phydev);
873 if (err < 0)
874 break;
875
876 if (!err) {
877 phydev->state = PHY_AN;
878 phydev->link_timeout = PHY_AN_TIMEOUT;
879 break;
880 }
881 }
e109374f
FF
882 phydev->state = PHY_RUNNING;
883 netif_carrier_on(phydev->attached_dev);
884 phydev->adjust_link(phydev->attached_dev);
885 }
886 break;
887 case PHY_FORCING:
888 err = genphy_update_link(phydev);
e109374f 889 if (err)
00db8189 890 break;
00db8189 891
e109374f
FF
892 if (phydev->link) {
893 phydev->state = PHY_RUNNING;
894 netif_carrier_on(phydev->attached_dev);
895 } else {
896 if (0 == phydev->link_timeout--)
6e14a5ee 897 needs_aneg = true;
e109374f 898 }
00db8189 899
e109374f
FF
900 phydev->adjust_link(phydev->attached_dev);
901 break;
902 case PHY_RUNNING:
11e122cb
SX
903 /* Only register a CHANGE if we are polling or ignoring
904 * interrupts and link changed since latest checking.
e109374f 905 */
11e122cb
SX
906 if (!phy_interrupt_is_valid(phydev)) {
907 old_link = phydev->link;
908 err = phy_read_status(phydev);
909 if (err)
910 break;
911
912 if (old_link != phydev->link)
913 phydev->state = PHY_CHANGELINK;
914 }
e109374f
FF
915 break;
916 case PHY_CHANGELINK:
917 err = phy_read_status(phydev);
e109374f 918 if (err)
00db8189 919 break;
00db8189 920
e109374f
FF
921 if (phydev->link) {
922 phydev->state = PHY_RUNNING;
923 netif_carrier_on(phydev->attached_dev);
924 } else {
925 phydev->state = PHY_NOLINK;
926 netif_carrier_off(phydev->attached_dev);
927 }
00db8189 928
e109374f 929 phydev->adjust_link(phydev->attached_dev);
00db8189 930
e109374f
FF
931 if (phy_interrupt_is_valid(phydev))
932 err = phy_config_interrupt(phydev,
2f53e904 933 PHY_INTERRUPT_ENABLED);
e109374f
FF
934 break;
935 case PHY_HALTED:
936 if (phydev->link) {
937 phydev->link = 0;
938 netif_carrier_off(phydev->attached_dev);
00db8189 939 phydev->adjust_link(phydev->attached_dev);
6e14a5ee 940 do_suspend = true;
e109374f
FF
941 }
942 break;
943 case PHY_RESUMING:
e109374f
FF
944 if (AUTONEG_ENABLE == phydev->autoneg) {
945 err = phy_aneg_done(phydev);
946 if (err < 0)
00db8189
AF
947 break;
948
e109374f 949 /* err > 0 if AN is done.
2f53e904
SS
950 * Otherwise, it's 0, and we're still waiting for AN
951 */
e109374f 952 if (err > 0) {
42caa074
WF
953 err = phy_read_status(phydev);
954 if (err)
955 break;
956
957 if (phydev->link) {
958 phydev->state = PHY_RUNNING;
959 netif_carrier_on(phydev->attached_dev);
2f53e904 960 } else {
42caa074 961 phydev->state = PHY_NOLINK;
2f53e904 962 }
42caa074 963 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
964 } else {
965 phydev->state = PHY_AN;
966 phydev->link_timeout = PHY_AN_TIMEOUT;
42caa074 967 }
e109374f
FF
968 } else {
969 err = phy_read_status(phydev);
970 if (err)
971 break;
972
973 if (phydev->link) {
974 phydev->state = PHY_RUNNING;
975 netif_carrier_on(phydev->attached_dev);
2f53e904 976 } else {
e109374f 977 phydev->state = PHY_NOLINK;
2f53e904 978 }
e109374f
FF
979 phydev->adjust_link(phydev->attached_dev);
980 }
981 break;
00db8189
AF
982 }
983
35b5f6b1 984 mutex_unlock(&phydev->lock);
00db8189
AF
985
986 if (needs_aneg)
987 err = phy_start_aneg(phydev);
6e14a5ee 988 else if (do_suspend)
be9dad1f
SH
989 phy_suspend(phydev);
990
00db8189
AF
991 if (err < 0)
992 phy_error(phydev);
993
3e2186e0
FF
994 dev_dbg(&phydev->dev, "PHY state change %s -> %s\n",
995 phy_state_to_str(old_state), phy_state_to_str(phydev->state));
996
bbb47bde 997 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
2f53e904 998 PHY_STATE_TIME * HZ);
35b5f6b1 999}
a59a4d19 1000
5ea94e76
FF
1001void phy_mac_interrupt(struct phy_device *phydev, int new_link)
1002{
1003 cancel_work_sync(&phydev->phy_queue);
1004 phydev->link = new_link;
1005 schedule_work(&phydev->phy_queue);
1006}
1007EXPORT_SYMBOL(phy_mac_interrupt);
1008
a59a4d19
GC
1009static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
1010 int addr)
1011{
1012 /* Write the desired MMD Devad */
1013 bus->write(bus, addr, MII_MMD_CTRL, devad);
1014
1015 /* Write the desired MMD register address */
1016 bus->write(bus, addr, MII_MMD_DATA, prtad);
1017
1018 /* Select the Function : DATA with no post increment */
1019 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
1020}
1021
1022/**
1023 * phy_read_mmd_indirect - reads data from the MMD registers
0c1d77df 1024 * @phydev: The PHY device bus
a59a4d19
GC
1025 * @prtad: MMD Address
1026 * @devad: MMD DEVAD
1027 * @addr: PHY address on the MII bus
1028 *
1029 * Description: it reads data from the MMD registers (clause 22 to access to
1030 * clause 45) of the specified phy address.
1031 * To read these register we have:
1032 * 1) Write reg 13 // DEVAD
1033 * 2) Write reg 14 // MMD Address
1034 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
1035 * 3) Read reg 14 // Read MMD data
1036 */
66ce7fb9 1037int phy_read_mmd_indirect(struct phy_device *phydev, int prtad,
0c1d77df 1038 int devad, int addr)
a59a4d19 1039{
0c1d77df
VB
1040 struct phy_driver *phydrv = phydev->drv;
1041 int value = -1;
a59a4d19 1042
ef899c07 1043 if (!phydrv->read_mmd_indirect) {
05a7f582
RK
1044 struct mii_bus *bus = phydev->bus;
1045
1046 mutex_lock(&bus->mdio_lock);
1047 mmd_phy_indirect(bus, prtad, devad, addr);
0c1d77df
VB
1048
1049 /* Read the content of the MMD's selected register */
05a7f582
RK
1050 value = bus->read(bus, addr, MII_MMD_DATA);
1051 mutex_unlock(&bus->mdio_lock);
0c1d77df
VB
1052 } else {
1053 value = phydrv->read_mmd_indirect(phydev, prtad, devad, addr);
1054 }
1055 return value;
a59a4d19 1056}
66ce7fb9 1057EXPORT_SYMBOL(phy_read_mmd_indirect);
a59a4d19
GC
1058
1059/**
1060 * phy_write_mmd_indirect - writes data to the MMD registers
0c1d77df 1061 * @phydev: The PHY device
a59a4d19
GC
1062 * @prtad: MMD Address
1063 * @devad: MMD DEVAD
1064 * @addr: PHY address on the MII bus
1065 * @data: data to write in the MMD register
1066 *
1067 * Description: Write data from the MMD registers of the specified
1068 * phy address.
1069 * To write these register we have:
1070 * 1) Write reg 13 // DEVAD
1071 * 2) Write reg 14 // MMD Address
1072 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
1073 * 3) Write reg 14 // Write MMD data
1074 */
66ce7fb9 1075void phy_write_mmd_indirect(struct phy_device *phydev, int prtad,
0c1d77df 1076 int devad, int addr, u32 data)
a59a4d19 1077{
0c1d77df 1078 struct phy_driver *phydrv = phydev->drv;
a59a4d19 1079
ef899c07 1080 if (!phydrv->write_mmd_indirect) {
05a7f582
RK
1081 struct mii_bus *bus = phydev->bus;
1082
1083 mutex_lock(&bus->mdio_lock);
1084 mmd_phy_indirect(bus, prtad, devad, addr);
0c1d77df
VB
1085
1086 /* Write the data into MMD's selected register */
05a7f582
RK
1087 bus->write(bus, addr, MII_MMD_DATA, data);
1088 mutex_unlock(&bus->mdio_lock);
0c1d77df
VB
1089 } else {
1090 phydrv->write_mmd_indirect(phydev, prtad, devad, addr, data);
1091 }
a59a4d19 1092}
66ce7fb9 1093EXPORT_SYMBOL(phy_write_mmd_indirect);
a59a4d19 1094
a59a4d19
GC
1095/**
1096 * phy_init_eee - init and check the EEE feature
1097 * @phydev: target phy_device struct
1098 * @clk_stop_enable: PHY may stop the clock during LPI
1099 *
1100 * Description: it checks if the Energy-Efficient Ethernet (EEE)
1101 * is supported by looking at the MMD registers 3.20 and 7.60/61
1102 * and it programs the MMD register 3.0 setting the "Clock stop enable"
1103 * bit if required.
1104 */
1105int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
1106{
a59a4d19
GC
1107 /* According to 802.3az,the EEE is supported only in full duplex-mode.
1108 * Also EEE feature is active when core is operating with MII, GMII
7e140696
FF
1109 * or RGMII (all kinds). Internal PHYs are also allowed to proceed and
1110 * should return an error if they do not support EEE.
a59a4d19
GC
1111 */
1112 if ((phydev->duplex == DUPLEX_FULL) &&
1113 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
1114 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
32a64161 1115 phy_interface_is_rgmii(phydev) ||
a9f63095 1116 phy_is_internal(phydev))) {
a59a4d19
GC
1117 int eee_lp, eee_cap, eee_adv;
1118 u32 lp, cap, adv;
4ae6e50c 1119 int status;
a59a4d19
GC
1120
1121 /* Read phy status to properly get the right settings */
1122 status = phy_read_status(phydev);
1123 if (status)
1124 return status;
1125
1126 /* First check if the EEE ability is supported */
0c1d77df 1127 eee_cap = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE,
a59a4d19 1128 MDIO_MMD_PCS, phydev->addr);
7a4cecf7
GC
1129 if (eee_cap <= 0)
1130 goto eee_exit_err;
a59a4d19 1131
b32607dd 1132 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19 1133 if (!cap)
7a4cecf7 1134 goto eee_exit_err;
a59a4d19
GC
1135
1136 /* Check which link settings negotiated and verify it in
1137 * the EEE advertising registers.
1138 */
0c1d77df 1139 eee_lp = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE,
a59a4d19 1140 MDIO_MMD_AN, phydev->addr);
7a4cecf7
GC
1141 if (eee_lp <= 0)
1142 goto eee_exit_err;
a59a4d19 1143
0c1d77df 1144 eee_adv = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV,
a59a4d19 1145 MDIO_MMD_AN, phydev->addr);
7a4cecf7
GC
1146 if (eee_adv <= 0)
1147 goto eee_exit_err;
a59a4d19 1148
b32607dd
AB
1149 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
1150 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
54da5a8b 1151 if (!phy_check_valid(phydev->speed, phydev->duplex, lp & adv))
7a4cecf7 1152 goto eee_exit_err;
a59a4d19
GC
1153
1154 if (clk_stop_enable) {
1155 /* Configure the PHY to stop receiving xMII
1156 * clock while it is signaling LPI.
1157 */
0c1d77df 1158 int val = phy_read_mmd_indirect(phydev, MDIO_CTRL1,
a59a4d19
GC
1159 MDIO_MMD_PCS,
1160 phydev->addr);
1161 if (val < 0)
1162 return val;
1163
1164 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
0c1d77df
VB
1165 phy_write_mmd_indirect(phydev, MDIO_CTRL1,
1166 MDIO_MMD_PCS, phydev->addr,
1167 val);
a59a4d19
GC
1168 }
1169
e62a768f 1170 return 0; /* EEE supported */
a59a4d19 1171 }
7a4cecf7 1172eee_exit_err:
e62a768f 1173 return -EPROTONOSUPPORT;
a59a4d19
GC
1174}
1175EXPORT_SYMBOL(phy_init_eee);
1176
1177/**
1178 * phy_get_eee_err - report the EEE wake error count
1179 * @phydev: target phy_device struct
1180 *
1181 * Description: it is to report the number of time where the PHY
1182 * failed to complete its normal wake sequence.
1183 */
1184int phy_get_eee_err(struct phy_device *phydev)
1185{
0c1d77df 1186 return phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_WK_ERR,
a59a4d19 1187 MDIO_MMD_PCS, phydev->addr);
a59a4d19
GC
1188}
1189EXPORT_SYMBOL(phy_get_eee_err);
1190
1191/**
1192 * phy_ethtool_get_eee - get EEE supported and status
1193 * @phydev: target phy_device struct
1194 * @data: ethtool_eee data
1195 *
1196 * Description: it reportes the Supported/Advertisement/LP Advertisement
1197 * capabilities.
1198 */
1199int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1200{
1201 int val;
1202
1203 /* Get Supported EEE */
0c1d77df 1204 val = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE,
a59a4d19
GC
1205 MDIO_MMD_PCS, phydev->addr);
1206 if (val < 0)
1207 return val;
b32607dd 1208 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
a59a4d19
GC
1209
1210 /* Get advertisement EEE */
0c1d77df 1211 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV,
a59a4d19
GC
1212 MDIO_MMD_AN, phydev->addr);
1213 if (val < 0)
1214 return val;
b32607dd 1215 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
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GC
1216
1217 /* Get LP advertisement EEE */
0c1d77df 1218 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE,
a59a4d19
GC
1219 MDIO_MMD_AN, phydev->addr);
1220 if (val < 0)
1221 return val;
b32607dd 1222 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1223
1224 return 0;
1225}
1226EXPORT_SYMBOL(phy_ethtool_get_eee);
1227
1228/**
1229 * phy_ethtool_set_eee - set EEE supported and status
1230 * @phydev: target phy_device struct
1231 * @data: ethtool_eee data
1232 *
1233 * Description: it is to program the Advertisement EEE register.
1234 */
1235int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1236{
553fe92b 1237 int val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19 1238
0c1d77df 1239 phy_write_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN,
a59a4d19
GC
1240 phydev->addr, val);
1241
1242 return 0;
1243}
1244EXPORT_SYMBOL(phy_ethtool_set_eee);
42e836eb
MS
1245
1246int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1247{
1248 if (phydev->drv->set_wol)
1249 return phydev->drv->set_wol(phydev, wol);
1250
1251 return -EOPNOTSUPP;
1252}
1253EXPORT_SYMBOL(phy_ethtool_set_wol);
1254
1255void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1256{
1257 if (phydev->drv->get_wol)
1258 phydev->drv->get_wol(phydev, wol);
1259}
1260EXPORT_SYMBOL(phy_ethtool_get_wol);