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2f53e904 1/* Framework for configuring and reading PHY devices
00db8189
AF
2 * Based on code in sungem_phy.c and gianfar_phy.c
3 *
4 * Author: Andy Fleming
5 *
6 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 7 * Copyright (c) 2006, 2007 Maciej W. Rozycki
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AF
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
8d242488
JP
15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
00db8189 18#include <linux/kernel.h>
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AF
19#include <linux/string.h>
20#include <linux/errno.h>
21#include <linux/unistd.h>
00db8189 22#include <linux/interrupt.h>
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AF
23#include <linux/delay.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/skbuff.h>
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AF
27#include <linux/mm.h>
28#include <linux/module.h>
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AF
29#include <linux/mii.h>
30#include <linux/ethtool.h>
31#include <linux/phy.h>
3c3070d7
MR
32#include <linux/timer.h>
33#include <linux/workqueue.h>
a59a4d19 34#include <linux/mdio.h>
2f53e904
SS
35#include <linux/io.h>
36#include <linux/uaccess.h>
60063497 37#include <linux/atomic.h>
2f53e904 38
00db8189 39#include <asm/irq.h>
00db8189 40
766d1d38
FF
41static const char *phy_speed_to_str(int speed)
42{
43 switch (speed) {
44 case SPEED_10:
45 return "10Mbps";
46 case SPEED_100:
47 return "100Mbps";
48 case SPEED_1000:
49 return "1Gbps";
50 case SPEED_2500:
51 return "2.5Gbps";
52 case SPEED_10000:
53 return "10Gbps";
54 case SPEED_UNKNOWN:
55 return "Unknown";
56 default:
57 return "Unsupported (update phy.c)";
58 }
59}
60
3e2186e0
FF
61#define PHY_STATE_STR(_state) \
62 case PHY_##_state: \
63 return __stringify(_state); \
64
65static const char *phy_state_to_str(enum phy_state st)
66{
67 switch (st) {
68 PHY_STATE_STR(DOWN)
69 PHY_STATE_STR(STARTING)
70 PHY_STATE_STR(READY)
71 PHY_STATE_STR(PENDING)
72 PHY_STATE_STR(UP)
73 PHY_STATE_STR(AN)
74 PHY_STATE_STR(RUNNING)
75 PHY_STATE_STR(NOLINK)
76 PHY_STATE_STR(FORCING)
77 PHY_STATE_STR(CHANGELINK)
78 PHY_STATE_STR(HALTED)
79 PHY_STATE_STR(RESUMING)
80 }
81
82 return NULL;
83}
84
85
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RD
86/**
87 * phy_print_status - Convenience function to print out the current phy status
88 * @phydev: the phy_device struct
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AF
89 */
90void phy_print_status(struct phy_device *phydev)
91{
2f53e904 92 if (phydev->link) {
df40cc88 93 netdev_info(phydev->attached_dev,
766d1d38
FF
94 "Link is Up - %s/%s - flow control %s\n",
95 phy_speed_to_str(phydev->speed),
df40cc88
FF
96 DUPLEX_FULL == phydev->duplex ? "Full" : "Half",
97 phydev->pause ? "rx/tx" : "off");
2f53e904 98 } else {
43b6329f 99 netdev_info(phydev->attached_dev, "Link is Down\n");
2f53e904 100 }
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AF
101}
102EXPORT_SYMBOL(phy_print_status);
00db8189 103
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RD
104/**
105 * phy_clear_interrupt - Ack the phy device's interrupt
106 * @phydev: the phy_device struct
107 *
108 * If the @phydev driver has an ack_interrupt function, call it to
109 * ack and clear the phy device's interrupt.
110 *
ad033506 111 * Returns 0 on success or < 0 on error.
b3df0da8 112 */
89ff05ec 113static int phy_clear_interrupt(struct phy_device *phydev)
00db8189 114{
00db8189 115 if (phydev->drv->ack_interrupt)
e62a768f 116 return phydev->drv->ack_interrupt(phydev);
00db8189 117
e62a768f 118 return 0;
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AF
119}
120
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RD
121/**
122 * phy_config_interrupt - configure the PHY device for the requested interrupts
123 * @phydev: the phy_device struct
124 * @interrupts: interrupt flags to configure for this @phydev
125 *
ad033506 126 * Returns 0 on success or < 0 on error.
b3df0da8 127 */
89ff05ec 128static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
00db8189 129{
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AF
130 phydev->interrupts = interrupts;
131 if (phydev->drv->config_intr)
e62a768f 132 return phydev->drv->config_intr(phydev);
00db8189 133
e62a768f 134 return 0;
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AF
135}
136
137
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RD
138/**
139 * phy_aneg_done - return auto-negotiation status
140 * @phydev: target phy_device struct
00db8189 141 *
76a423a3
FF
142 * Description: Return the auto-negotiation status from this @phydev
143 * Returns > 0 on success or < 0 on error. 0 means that auto-negotiation
144 * is still pending.
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AF
145 */
146static inline int phy_aneg_done(struct phy_device *phydev)
147{
76a423a3
FF
148 if (phydev->drv->aneg_done)
149 return phydev->drv->aneg_done(phydev);
150
a9fa6e6a 151 return genphy_aneg_done(phydev);
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AF
152}
153
00db8189 154/* A structure for mapping a particular speed and duplex
2f53e904
SS
155 * combination to a particular SUPPORTED and ADVERTISED value
156 */
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AF
157struct phy_setting {
158 int speed;
159 int duplex;
160 u32 setting;
161};
162
163/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 164static const struct phy_setting settings[] = {
00db8189 165 {
3e707706
LT
166 .speed = SPEED_10000,
167 .duplex = DUPLEX_FULL,
168 .setting = SUPPORTED_10000baseKR_Full,
169 },
170 {
171 .speed = SPEED_10000,
172 .duplex = DUPLEX_FULL,
173 .setting = SUPPORTED_10000baseKX4_Full,
174 },
175 {
176 .speed = SPEED_10000,
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AF
177 .duplex = DUPLEX_FULL,
178 .setting = SUPPORTED_10000baseT_Full,
179 },
3e707706
LT
180 {
181 .speed = SPEED_2500,
182 .duplex = DUPLEX_FULL,
183 .setting = SUPPORTED_2500baseX_Full,
184 },
185 {
186 .speed = SPEED_1000,
187 .duplex = DUPLEX_FULL,
188 .setting = SUPPORTED_1000baseKX_Full,
189 },
00db8189
AF
190 {
191 .speed = SPEED_1000,
192 .duplex = DUPLEX_FULL,
193 .setting = SUPPORTED_1000baseT_Full,
194 },
195 {
196 .speed = SPEED_1000,
197 .duplex = DUPLEX_HALF,
198 .setting = SUPPORTED_1000baseT_Half,
199 },
200 {
201 .speed = SPEED_100,
202 .duplex = DUPLEX_FULL,
203 .setting = SUPPORTED_100baseT_Full,
204 },
205 {
206 .speed = SPEED_100,
207 .duplex = DUPLEX_HALF,
208 .setting = SUPPORTED_100baseT_Half,
209 },
210 {
211 .speed = SPEED_10,
212 .duplex = DUPLEX_FULL,
213 .setting = SUPPORTED_10baseT_Full,
214 },
215 {
216 .speed = SPEED_10,
217 .duplex = DUPLEX_HALF,
218 .setting = SUPPORTED_10baseT_Half,
219 },
220};
221
ff8ac609 222#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 223
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RD
224/**
225 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
226 * @speed: speed to match
227 * @duplex: duplex to match
00db8189 228 *
b3df0da8 229 * Description: Searches the settings array for the setting which
00db8189
AF
230 * matches the desired speed and duplex, and returns the index
231 * of that setting. Returns the index of the last setting if
232 * none of the others match.
233 */
4ae6e50c 234static inline unsigned int phy_find_setting(int speed, int duplex)
00db8189 235{
4ae6e50c 236 unsigned int idx = 0;
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AF
237
238 while (idx < ARRAY_SIZE(settings) &&
2f53e904 239 (settings[idx].speed != speed || settings[idx].duplex != duplex))
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AF
240 idx++;
241
242 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
243}
244
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RD
245/**
246 * phy_find_valid - find a PHY setting that matches the requested features mask
247 * @idx: The first index in settings[] to search
248 * @features: A mask of the valid settings
00db8189 249 *
b3df0da8 250 * Description: Returns the index of the first valid setting less
00db8189
AF
251 * than or equal to the one pointed to by idx, as determined by
252 * the mask in features. Returns the index of the last setting
253 * if nothing else matches.
254 */
4ae6e50c 255static inline unsigned int phy_find_valid(unsigned int idx, u32 features)
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AF
256{
257 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
258 idx++;
259
260 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
261}
262
54da5a8b
GR
263/**
264 * phy_check_valid - check if there is a valid PHY setting which matches
265 * speed, duplex, and feature mask
266 * @speed: speed to match
267 * @duplex: duplex to match
268 * @features: A mask of the valid settings
269 *
270 * Description: Returns true if there is a valid setting, false otherwise.
271 */
272static inline bool phy_check_valid(int speed, int duplex, u32 features)
273{
274 unsigned int idx;
275
276 idx = phy_find_valid(phy_find_setting(speed, duplex), features);
277
278 return settings[idx].speed == speed && settings[idx].duplex == duplex &&
279 (settings[idx].setting & features);
280}
281
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RD
282/**
283 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
284 * @phydev: the target phy_device struct
00db8189 285 *
b3df0da8 286 * Description: Make sure the PHY is set to supported speeds and
00db8189 287 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 288 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 289 */
89ff05ec 290static void phy_sanitize_settings(struct phy_device *phydev)
00db8189
AF
291{
292 u32 features = phydev->supported;
4ae6e50c 293 unsigned int idx;
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AF
294
295 /* Sanitize settings based on PHY capabilities */
296 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 297 phydev->autoneg = AUTONEG_DISABLE;
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AF
298
299 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
300 features);
301
302 phydev->speed = settings[idx].speed;
303 phydev->duplex = settings[idx].duplex;
304}
00db8189 305
b3df0da8
RD
306/**
307 * phy_ethtool_sset - generic ethtool sset function, handles all the details
308 * @phydev: target phy_device struct
309 * @cmd: ethtool_cmd
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AF
310 *
311 * A few notes about parameter checking:
312 * - We don't set port or transceiver, so we don't care what they
313 * were set to.
314 * - phy_start_aneg() will make sure forced settings are sane, and
315 * choose the next best ones from the ones selected, so we don't
b3df0da8 316 * care if ethtool tries to give us bad values.
00db8189
AF
317 */
318int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
319{
25db0338
DD
320 u32 speed = ethtool_cmd_speed(cmd);
321
e5a03bfd 322 if (cmd->phy_address != phydev->mdio.addr)
00db8189
AF
323 return -EINVAL;
324
2f53e904 325 /* We make sure that we don't pass unsupported values in to the PHY */
00db8189
AF
326 cmd->advertising &= phydev->supported;
327
328 /* Verify the settings we care about. */
329 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
330 return -EINVAL;
331
332 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
333 return -EINVAL;
334
8e95a202 335 if (cmd->autoneg == AUTONEG_DISABLE &&
25db0338
DD
336 ((speed != SPEED_1000 &&
337 speed != SPEED_100 &&
338 speed != SPEED_10) ||
8e95a202
JP
339 (cmd->duplex != DUPLEX_HALF &&
340 cmd->duplex != DUPLEX_FULL)))
00db8189
AF
341 return -EINVAL;
342
343 phydev->autoneg = cmd->autoneg;
344
25db0338 345 phydev->speed = speed;
00db8189
AF
346
347 phydev->advertising = cmd->advertising;
348
349 if (AUTONEG_ENABLE == cmd->autoneg)
350 phydev->advertising |= ADVERTISED_Autoneg;
351 else
352 phydev->advertising &= ~ADVERTISED_Autoneg;
353
354 phydev->duplex = cmd->duplex;
355
634ec36c
DT
356 phydev->mdix = cmd->eth_tp_mdix_ctrl;
357
00db8189
AF
358 /* Restart the PHY */
359 phy_start_aneg(phydev);
360
361 return 0;
362}
9f6d55d0 363EXPORT_SYMBOL(phy_ethtool_sset);
00db8189
AF
364
365int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
366{
367 cmd->supported = phydev->supported;
368
369 cmd->advertising = phydev->advertising;
114002bc 370 cmd->lp_advertising = phydev->lp_advertising;
00db8189 371
70739497 372 ethtool_cmd_speed_set(cmd, phydev->speed);
00db8189 373 cmd->duplex = phydev->duplex;
c88838ce
FF
374 if (phydev->interface == PHY_INTERFACE_MODE_MOCA)
375 cmd->port = PORT_BNC;
376 else
377 cmd->port = PORT_MII;
e5a03bfd 378 cmd->phy_address = phydev->mdio.addr;
4284b6a5
FF
379 cmd->transceiver = phy_is_internal(phydev) ?
380 XCVR_INTERNAL : XCVR_EXTERNAL;
00db8189 381 cmd->autoneg = phydev->autoneg;
239aa55b 382 cmd->eth_tp_mdix_ctrl = phydev->mdix;
00db8189
AF
383
384 return 0;
385}
9f6d55d0 386EXPORT_SYMBOL(phy_ethtool_gset);
00db8189 387
b3df0da8
RD
388/**
389 * phy_mii_ioctl - generic PHY MII ioctl interface
390 * @phydev: the phy_device struct
00c7d920 391 * @ifr: &struct ifreq for socket ioctl's
b3df0da8
RD
392 * @cmd: ioctl cmd to execute
393 *
394 * Note that this function is currently incompatible with the
00db8189 395 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 396 * current state. Use at own risk.
00db8189 397 */
2f53e904 398int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd)
00db8189 399{
28b04113 400 struct mii_ioctl_data *mii_data = if_mii(ifr);
00db8189 401 u16 val = mii_data->val_in;
79ce0477 402 bool change_autoneg = false;
00db8189
AF
403
404 switch (cmd) {
405 case SIOCGMIIPHY:
e5a03bfd 406 mii_data->phy_id = phydev->mdio.addr;
c6d6a511
LB
407 /* fall through */
408
00db8189 409 case SIOCGMIIREG:
e5a03bfd
AL
410 mii_data->val_out = mdiobus_read(phydev->mdio.bus,
411 mii_data->phy_id,
af1dc13e 412 mii_data->reg_num);
e62a768f 413 return 0;
00db8189
AF
414
415 case SIOCSMIIREG:
e5a03bfd 416 if (mii_data->phy_id == phydev->mdio.addr) {
e109374f 417 switch (mii_data->reg_num) {
00db8189 418 case MII_BMCR:
79ce0477
BH
419 if ((val & (BMCR_RESET | BMCR_ANENABLE)) == 0) {
420 if (phydev->autoneg == AUTONEG_ENABLE)
421 change_autoneg = true;
00db8189 422 phydev->autoneg = AUTONEG_DISABLE;
79ce0477
BH
423 if (val & BMCR_FULLDPLX)
424 phydev->duplex = DUPLEX_FULL;
425 else
426 phydev->duplex = DUPLEX_HALF;
427 if (val & BMCR_SPEED1000)
428 phydev->speed = SPEED_1000;
429 else if (val & BMCR_SPEED100)
430 phydev->speed = SPEED_100;
431 else phydev->speed = SPEED_10;
432 }
433 else {
434 if (phydev->autoneg == AUTONEG_DISABLE)
435 change_autoneg = true;
00db8189 436 phydev->autoneg = AUTONEG_ENABLE;
79ce0477 437 }
00db8189
AF
438 break;
439 case MII_ADVERTISE:
79ce0477
BH
440 phydev->advertising = mii_adv_to_ethtool_adv_t(val);
441 change_autoneg = true;
00db8189
AF
442 break;
443 default:
444 /* do nothing */
445 break;
446 }
447 }
448
e5a03bfd 449 mdiobus_write(phydev->mdio.bus, mii_data->phy_id,
af1dc13e
PK
450 mii_data->reg_num, val);
451
e5a03bfd 452 if (mii_data->phy_id == phydev->mdio.addr &&
cf18b778 453 mii_data->reg_num == MII_BMCR &&
2613f95f 454 val & BMCR_RESET)
e62a768f 455 return phy_init_hw(phydev);
79ce0477
BH
456
457 if (change_autoneg)
458 return phy_start_aneg(phydev);
459
e62a768f 460 return 0;
dda93b48 461
c1f19b51
RC
462 case SIOCSHWTSTAMP:
463 if (phydev->drv->hwtstamp)
464 return phydev->drv->hwtstamp(phydev, ifr);
465 /* fall through */
466
dda93b48 467 default:
c6d6a511 468 return -EOPNOTSUPP;
00db8189 469 }
00db8189 470}
680e9fe9 471EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 472
b3df0da8
RD
473/**
474 * phy_start_aneg - start auto-negotiation for this PHY device
475 * @phydev: the phy_device struct
e1393456 476 *
b3df0da8
RD
477 * Description: Sanitizes the settings (if we're not autonegotiating
478 * them), and then calls the driver's config_aneg function.
479 * If the PHYCONTROL Layer is operating, we change the state to
480 * reflect the beginning of Auto-negotiation or forcing.
e1393456
AF
481 */
482int phy_start_aneg(struct phy_device *phydev)
483{
484 int err;
485
35b5f6b1 486 mutex_lock(&phydev->lock);
e1393456
AF
487
488 if (AUTONEG_DISABLE == phydev->autoneg)
489 phy_sanitize_settings(phydev);
490
9b3320ef
BH
491 /* Invalidate LP advertising flags */
492 phydev->lp_advertising = 0;
493
e1393456 494 err = phydev->drv->config_aneg(phydev);
e1393456
AF
495 if (err < 0)
496 goto out_unlock;
497
498 if (phydev->state != PHY_HALTED) {
499 if (AUTONEG_ENABLE == phydev->autoneg) {
500 phydev->state = PHY_AN;
501 phydev->link_timeout = PHY_AN_TIMEOUT;
502 } else {
503 phydev->state = PHY_FORCING;
504 phydev->link_timeout = PHY_FORCE_TIMEOUT;
505 }
506 }
507
508out_unlock:
35b5f6b1 509 mutex_unlock(&phydev->lock);
e1393456
AF
510 return err;
511}
512EXPORT_SYMBOL(phy_start_aneg);
513
b3df0da8
RD
514/**
515 * phy_start_machine - start PHY state machine tracking
516 * @phydev: the phy_device struct
00db8189 517 *
b3df0da8 518 * Description: The PHY infrastructure can run a state machine
00db8189
AF
519 * which tracks whether the PHY is starting up, negotiating,
520 * etc. This function starts the timer which tracks the state
29935aeb
SS
521 * of the PHY. If you want to maintain your own state machine,
522 * do not call this function.
b3df0da8 523 */
29935aeb 524void phy_start_machine(struct phy_device *phydev)
00db8189 525{
bbb47bde 526 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
00db8189
AF
527}
528
b3df0da8
RD
529/**
530 * phy_stop_machine - stop the PHY state machine tracking
531 * @phydev: target phy_device struct
00db8189 532 *
b3df0da8 533 * Description: Stops the state machine timer, sets the state to UP
817acf5e 534 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
535 * phy_detach.
536 */
537void phy_stop_machine(struct phy_device *phydev)
538{
a390d1f3 539 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 540
35b5f6b1 541 mutex_lock(&phydev->lock);
00db8189
AF
542 if (phydev->state > PHY_UP)
543 phydev->state = PHY_UP;
35b5f6b1 544 mutex_unlock(&phydev->lock);
00db8189
AF
545}
546
b3df0da8
RD
547/**
548 * phy_error - enter HALTED state for this PHY device
549 * @phydev: target phy_device struct
00db8189
AF
550 *
551 * Moves the PHY to the HALTED state in response to a read
552 * or write error, and tells the controller the link is down.
553 * Must not be called from interrupt context, or while the
554 * phydev->lock is held.
555 */
9b9a8bfc 556static void phy_error(struct phy_device *phydev)
00db8189 557{
35b5f6b1 558 mutex_lock(&phydev->lock);
00db8189 559 phydev->state = PHY_HALTED;
35b5f6b1 560 mutex_unlock(&phydev->lock);
00db8189
AF
561}
562
b3df0da8
RD
563/**
564 * phy_interrupt - PHY interrupt handler
565 * @irq: interrupt line
566 * @phy_dat: phy_device pointer
e1393456 567 *
b3df0da8 568 * Description: When a PHY interrupt occurs, the handler disables
e1393456
AF
569 * interrupts, and schedules a work task to clear the interrupt.
570 */
7d12e780 571static irqreturn_t phy_interrupt(int irq, void *phy_dat)
e1393456
AF
572{
573 struct phy_device *phydev = phy_dat;
574
3c3070d7
MR
575 if (PHY_HALTED == phydev->state)
576 return IRQ_NONE; /* It can't be ours. */
577
e1393456
AF
578 /* The MDIO bus is not allowed to be written in interrupt
579 * context, so we need to disable the irq here. A work
580 * queue will write the PHY to disable and clear the
2f53e904
SS
581 * interrupt, and then reenable the irq line.
582 */
e1393456 583 disable_irq_nosync(irq);
0ac49527 584 atomic_inc(&phydev->irq_disable);
e1393456 585
bbb47bde 586 queue_work(system_power_efficient_wq, &phydev->phy_queue);
e1393456
AF
587
588 return IRQ_HANDLED;
589}
590
b3df0da8
RD
591/**
592 * phy_enable_interrupts - Enable the interrupts from the PHY side
593 * @phydev: target phy_device struct
594 */
89ff05ec 595static int phy_enable_interrupts(struct phy_device *phydev)
00db8189 596{
553fe92b 597 int err = phy_clear_interrupt(phydev);
00db8189 598
e1393456
AF
599 if (err < 0)
600 return err;
00db8189 601
553fe92b 602 return phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189 603}
00db8189 604
b3df0da8
RD
605/**
606 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
607 * @phydev: target phy_device struct
608 */
89ff05ec 609static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
610{
611 int err;
612
613 /* Disable PHY interrupts */
614 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
00db8189
AF
615 if (err)
616 goto phy_err;
617
618 /* Clear the interrupt */
619 err = phy_clear_interrupt(phydev);
00db8189
AF
620 if (err)
621 goto phy_err;
622
623 return 0;
624
625phy_err:
626 phy_error(phydev);
627
628 return err;
629}
e1393456 630
b3df0da8
RD
631/**
632 * phy_start_interrupts - request and enable interrupts for a PHY device
633 * @phydev: target phy_device struct
e1393456 634 *
b3df0da8
RD
635 * Description: Request the interrupt for the given PHY.
636 * If this fails, then we set irq to PHY_POLL.
e1393456 637 * Otherwise, we enable the interrupts in the PHY.
e1393456 638 * This should only be called with a valid IRQ number.
b3df0da8 639 * Returns 0 on success or < 0 on error.
e1393456
AF
640 */
641int phy_start_interrupts(struct phy_device *phydev)
642{
0ac49527 643 atomic_set(&phydev->irq_disable, 0);
33c133cc
SS
644 if (request_irq(phydev->irq, phy_interrupt, 0, "phy_interrupt",
645 phydev) < 0) {
8d242488 646 pr_warn("%s: Can't get IRQ %d (PHY)\n",
e5a03bfd 647 phydev->mdio.bus->name, phydev->irq);
e1393456
AF
648 phydev->irq = PHY_POLL;
649 return 0;
650 }
651
e62a768f 652 return phy_enable_interrupts(phydev);
e1393456
AF
653}
654EXPORT_SYMBOL(phy_start_interrupts);
655
b3df0da8
RD
656/**
657 * phy_stop_interrupts - disable interrupts from a PHY device
658 * @phydev: target phy_device struct
659 */
e1393456
AF
660int phy_stop_interrupts(struct phy_device *phydev)
661{
553fe92b 662 int err = phy_disable_interrupts(phydev);
e1393456
AF
663
664 if (err)
665 phy_error(phydev);
666
0ac49527
MR
667 free_irq(phydev->irq, phydev);
668
2f53e904 669 /* Cannot call flush_scheduled_work() here as desired because
0ac49527
MR
670 * of rtnl_lock(), but we do not really care about what would
671 * be done, except from enable_irq(), so cancel any work
672 * possibly pending and take care of the matter below.
3c3070d7 673 */
28e53bdd 674 cancel_work_sync(&phydev->phy_queue);
2f53e904 675 /* If work indeed has been cancelled, disable_irq() will have
0ac49527
MR
676 * been left unbalanced from phy_interrupt() and enable_irq()
677 * has to be called so that other devices on the line work.
678 */
679 while (atomic_dec_return(&phydev->irq_disable) >= 0)
680 enable_irq(phydev->irq);
e1393456
AF
681
682 return err;
683}
684EXPORT_SYMBOL(phy_stop_interrupts);
685
b3df0da8
RD
686/**
687 * phy_change - Scheduled by the phy_interrupt/timer to handle PHY changes
688 * @work: work_struct that describes the work to be done
689 */
5ea94e76 690void phy_change(struct work_struct *work)
e1393456 691{
c4028958
DH
692 struct phy_device *phydev =
693 container_of(work, struct phy_device, phy_queue);
e1393456 694
deccd16f
FF
695 if (phy_interrupt_is_valid(phydev)) {
696 if (phydev->drv->did_interrupt &&
697 !phydev->drv->did_interrupt(phydev))
698 goto ignore;
a8729eb3 699
deccd16f
FF
700 if (phy_disable_interrupts(phydev))
701 goto phy_err;
702 }
e1393456 703
35b5f6b1 704 mutex_lock(&phydev->lock);
e1393456
AF
705 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
706 phydev->state = PHY_CHANGELINK;
35b5f6b1 707 mutex_unlock(&phydev->lock);
e1393456 708
deccd16f
FF
709 if (phy_interrupt_is_valid(phydev)) {
710 atomic_dec(&phydev->irq_disable);
711 enable_irq(phydev->irq);
e1393456 712
deccd16f
FF
713 /* Reenable interrupts */
714 if (PHY_HALTED != phydev->state &&
715 phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED))
716 goto irq_enable_err;
717 }
e1393456 718
a390d1f3
MS
719 /* reschedule state queue work to run as soon as possible */
720 cancel_delayed_work_sync(&phydev->state_queue);
bbb47bde 721 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
e1393456
AF
722 return;
723
a8729eb3
AG
724ignore:
725 atomic_dec(&phydev->irq_disable);
726 enable_irq(phydev->irq);
727 return;
728
e1393456
AF
729irq_enable_err:
730 disable_irq(phydev->irq);
0ac49527 731 atomic_inc(&phydev->irq_disable);
e1393456
AF
732phy_err:
733 phy_error(phydev);
734}
735
b3df0da8
RD
736/**
737 * phy_stop - Bring down the PHY link, and stop checking the status
738 * @phydev: target phy_device struct
739 */
e1393456
AF
740void phy_stop(struct phy_device *phydev)
741{
35b5f6b1 742 mutex_lock(&phydev->lock);
e1393456
AF
743
744 if (PHY_HALTED == phydev->state)
745 goto out_unlock;
746
2c7b4921 747 if (phy_interrupt_is_valid(phydev)) {
e1393456
AF
748 /* Disable PHY Interrupts */
749 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 750
3c3070d7
MR
751 /* Clear any pending interrupts */
752 phy_clear_interrupt(phydev);
753 }
e1393456 754
6daf6531
MR
755 phydev->state = PHY_HALTED;
756
e1393456 757out_unlock:
35b5f6b1 758 mutex_unlock(&phydev->lock);
3c3070d7 759
2f53e904 760 /* Cannot call flush_scheduled_work() here as desired because
3c3070d7
MR
761 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
762 * will not reenable interrupts.
763 */
e1393456 764}
2f53e904 765EXPORT_SYMBOL(phy_stop);
e1393456 766
b3df0da8
RD
767/**
768 * phy_start - start or restart a PHY device
769 * @phydev: target phy_device struct
e1393456 770 *
b3df0da8 771 * Description: Indicates the attached device's readiness to
e1393456
AF
772 * handle PHY-related work. Used during startup to start the
773 * PHY, and after a call to phy_stop() to resume operation.
774 * Also used to indicate the MDIO bus has cleared an error
775 * condition.
776 */
777void phy_start(struct phy_device *phydev)
778{
c15e10e7
TB
779 bool do_resume = false;
780 int err = 0;
781
35b5f6b1 782 mutex_lock(&phydev->lock);
e1393456
AF
783
784 switch (phydev->state) {
e109374f
FF
785 case PHY_STARTING:
786 phydev->state = PHY_PENDING;
787 break;
788 case PHY_READY:
789 phydev->state = PHY_UP;
790 break;
791 case PHY_HALTED:
c15e10e7 792 /* make sure interrupts are re-enabled for the PHY */
84a527a4
SX
793 if (phydev->irq != PHY_POLL) {
794 err = phy_enable_interrupts(phydev);
795 if (err < 0)
796 break;
797 }
c15e10e7 798
e109374f 799 phydev->state = PHY_RESUMING;
c15e10e7
TB
800 do_resume = true;
801 break;
e109374f
FF
802 default:
803 break;
e1393456 804 }
35b5f6b1 805 mutex_unlock(&phydev->lock);
c15e10e7
TB
806
807 /* if phy was suspended, bring the physical link up again */
808 if (do_resume)
809 phy_resume(phydev);
e1393456 810}
e1393456 811EXPORT_SYMBOL(phy_start);
67c4f3fa 812
35b5f6b1
NC
813/**
814 * phy_state_machine - Handle the state machine
815 * @work: work_struct that describes the work to be done
35b5f6b1 816 */
4f9c85a1 817void phy_state_machine(struct work_struct *work)
00db8189 818{
bf6aede7 819 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 820 struct phy_device *phydev =
a390d1f3 821 container_of(dwork, struct phy_device, state_queue);
c15e10e7 822 bool needs_aneg = false, do_suspend = false;
3e2186e0 823 enum phy_state old_state;
00db8189 824 int err = 0;
11e122cb 825 int old_link;
00db8189 826
35b5f6b1 827 mutex_lock(&phydev->lock);
00db8189 828
3e2186e0
FF
829 old_state = phydev->state;
830
2b8f2a28
DM
831 if (phydev->drv->link_change_notify)
832 phydev->drv->link_change_notify(phydev);
833
e109374f
FF
834 switch (phydev->state) {
835 case PHY_DOWN:
836 case PHY_STARTING:
837 case PHY_READY:
838 case PHY_PENDING:
839 break;
840 case PHY_UP:
6e14a5ee 841 needs_aneg = true;
00db8189 842
e109374f
FF
843 phydev->link_timeout = PHY_AN_TIMEOUT;
844
845 break;
846 case PHY_AN:
847 err = phy_read_status(phydev);
e109374f 848 if (err < 0)
00db8189 849 break;
6b655529 850
2f53e904 851 /* If the link is down, give up on negotiation for now */
e109374f
FF
852 if (!phydev->link) {
853 phydev->state = PHY_NOLINK;
854 netif_carrier_off(phydev->attached_dev);
855 phydev->adjust_link(phydev->attached_dev);
856 break;
857 }
6b655529 858
2f53e904 859 /* Check if negotiation is done. Break if there's an error */
e109374f
FF
860 err = phy_aneg_done(phydev);
861 if (err < 0)
862 break;
6b655529 863
e109374f
FF
864 /* If AN is done, we're running */
865 if (err > 0) {
866 phydev->state = PHY_RUNNING;
867 netif_carrier_on(phydev->attached_dev);
868 phydev->adjust_link(phydev->attached_dev);
00db8189 869
fa8cddaf 870 } else if (0 == phydev->link_timeout--)
6e14a5ee 871 needs_aneg = true;
e109374f
FF
872 break;
873 case PHY_NOLINK:
321beec5
AL
874 if (phy_interrupt_is_valid(phydev))
875 break;
876
e109374f 877 err = phy_read_status(phydev);
e109374f 878 if (err)
00db8189 879 break;
00db8189 880
e109374f 881 if (phydev->link) {
e46e08b8
BK
882 if (AUTONEG_ENABLE == phydev->autoneg) {
883 err = phy_aneg_done(phydev);
884 if (err < 0)
885 break;
886
887 if (!err) {
888 phydev->state = PHY_AN;
889 phydev->link_timeout = PHY_AN_TIMEOUT;
890 break;
891 }
892 }
e109374f
FF
893 phydev->state = PHY_RUNNING;
894 netif_carrier_on(phydev->attached_dev);
895 phydev->adjust_link(phydev->attached_dev);
896 }
897 break;
898 case PHY_FORCING:
899 err = genphy_update_link(phydev);
e109374f 900 if (err)
00db8189 901 break;
00db8189 902
e109374f
FF
903 if (phydev->link) {
904 phydev->state = PHY_RUNNING;
905 netif_carrier_on(phydev->attached_dev);
906 } else {
907 if (0 == phydev->link_timeout--)
6e14a5ee 908 needs_aneg = true;
e109374f 909 }
00db8189 910
e109374f
FF
911 phydev->adjust_link(phydev->attached_dev);
912 break;
913 case PHY_RUNNING:
d5c3d846
FF
914 /* Only register a CHANGE if we are polling and link changed
915 * since latest checking.
e109374f 916 */
d5c3d846 917 if (phydev->irq == PHY_POLL) {
11e122cb
SX
918 old_link = phydev->link;
919 err = phy_read_status(phydev);
920 if (err)
921 break;
922
923 if (old_link != phydev->link)
924 phydev->state = PHY_CHANGELINK;
925 }
e109374f
FF
926 break;
927 case PHY_CHANGELINK:
928 err = phy_read_status(phydev);
e109374f 929 if (err)
00db8189 930 break;
00db8189 931
e109374f
FF
932 if (phydev->link) {
933 phydev->state = PHY_RUNNING;
934 netif_carrier_on(phydev->attached_dev);
935 } else {
936 phydev->state = PHY_NOLINK;
937 netif_carrier_off(phydev->attached_dev);
938 }
00db8189 939
e109374f 940 phydev->adjust_link(phydev->attached_dev);
00db8189 941
e109374f
FF
942 if (phy_interrupt_is_valid(phydev))
943 err = phy_config_interrupt(phydev,
2f53e904 944 PHY_INTERRUPT_ENABLED);
e109374f
FF
945 break;
946 case PHY_HALTED:
947 if (phydev->link) {
948 phydev->link = 0;
949 netif_carrier_off(phydev->attached_dev);
00db8189 950 phydev->adjust_link(phydev->attached_dev);
6e14a5ee 951 do_suspend = true;
e109374f
FF
952 }
953 break;
954 case PHY_RESUMING:
e109374f
FF
955 if (AUTONEG_ENABLE == phydev->autoneg) {
956 err = phy_aneg_done(phydev);
957 if (err < 0)
00db8189
AF
958 break;
959
e109374f 960 /* err > 0 if AN is done.
2f53e904
SS
961 * Otherwise, it's 0, and we're still waiting for AN
962 */
e109374f 963 if (err > 0) {
42caa074
WF
964 err = phy_read_status(phydev);
965 if (err)
966 break;
967
968 if (phydev->link) {
969 phydev->state = PHY_RUNNING;
970 netif_carrier_on(phydev->attached_dev);
2f53e904 971 } else {
42caa074 972 phydev->state = PHY_NOLINK;
2f53e904 973 }
42caa074 974 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
975 } else {
976 phydev->state = PHY_AN;
977 phydev->link_timeout = PHY_AN_TIMEOUT;
42caa074 978 }
e109374f
FF
979 } else {
980 err = phy_read_status(phydev);
981 if (err)
982 break;
983
984 if (phydev->link) {
985 phydev->state = PHY_RUNNING;
986 netif_carrier_on(phydev->attached_dev);
2f53e904 987 } else {
e109374f 988 phydev->state = PHY_NOLINK;
2f53e904 989 }
e109374f
FF
990 phydev->adjust_link(phydev->attached_dev);
991 }
992 break;
00db8189
AF
993 }
994
35b5f6b1 995 mutex_unlock(&phydev->lock);
00db8189
AF
996
997 if (needs_aneg)
998 err = phy_start_aneg(phydev);
6e14a5ee 999 else if (do_suspend)
be9dad1f
SH
1000 phy_suspend(phydev);
1001
00db8189
AF
1002 if (err < 0)
1003 phy_error(phydev);
1004
72ba48be
AL
1005 phydev_dbg(phydev, "PHY state change %s -> %s\n",
1006 phy_state_to_str(old_state),
1007 phy_state_to_str(phydev->state));
3e2186e0 1008
d5c3d846
FF
1009 /* Only re-schedule a PHY state machine change if we are polling the
1010 * PHY, if PHY_IGNORE_INTERRUPT is set, then we will be moving
1011 * between states from phy_mac_interrupt()
1012 */
1013 if (phydev->irq == PHY_POLL)
1014 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
1015 PHY_STATE_TIME * HZ);
35b5f6b1 1016}
a59a4d19 1017
5ea94e76
FF
1018void phy_mac_interrupt(struct phy_device *phydev, int new_link)
1019{
5ea94e76 1020 phydev->link = new_link;
deccd16f
FF
1021
1022 /* Trigger a state machine change */
1023 queue_work(system_power_efficient_wq, &phydev->phy_queue);
5ea94e76
FF
1024}
1025EXPORT_SYMBOL(phy_mac_interrupt);
1026
a59a4d19
GC
1027static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
1028 int addr)
1029{
1030 /* Write the desired MMD Devad */
1031 bus->write(bus, addr, MII_MMD_CTRL, devad);
1032
1033 /* Write the desired MMD register address */
1034 bus->write(bus, addr, MII_MMD_DATA, prtad);
1035
1036 /* Select the Function : DATA with no post increment */
1037 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
1038}
1039
1040/**
1041 * phy_read_mmd_indirect - reads data from the MMD registers
0c1d77df 1042 * @phydev: The PHY device bus
a59a4d19
GC
1043 * @prtad: MMD Address
1044 * @devad: MMD DEVAD
a59a4d19
GC
1045 *
1046 * Description: it reads data from the MMD registers (clause 22 to access to
1047 * clause 45) of the specified phy address.
1048 * To read these register we have:
1049 * 1) Write reg 13 // DEVAD
1050 * 2) Write reg 14 // MMD Address
1051 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
1052 * 3) Read reg 14 // Read MMD data
1053 */
053e7e16 1054int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad)
a59a4d19 1055{
0c1d77df 1056 struct phy_driver *phydrv = phydev->drv;
e5a03bfd 1057 int addr = phydev->mdio.addr;
0c1d77df 1058 int value = -1;
a59a4d19 1059
ef899c07 1060 if (!phydrv->read_mmd_indirect) {
e5a03bfd 1061 struct mii_bus *bus = phydev->mdio.bus;
05a7f582
RK
1062
1063 mutex_lock(&bus->mdio_lock);
1064 mmd_phy_indirect(bus, prtad, devad, addr);
0c1d77df
VB
1065
1066 /* Read the content of the MMD's selected register */
05a7f582
RK
1067 value = bus->read(bus, addr, MII_MMD_DATA);
1068 mutex_unlock(&bus->mdio_lock);
0c1d77df
VB
1069 } else {
1070 value = phydrv->read_mmd_indirect(phydev, prtad, devad, addr);
1071 }
1072 return value;
a59a4d19 1073}
66ce7fb9 1074EXPORT_SYMBOL(phy_read_mmd_indirect);
a59a4d19
GC
1075
1076/**
1077 * phy_write_mmd_indirect - writes data to the MMD registers
0c1d77df 1078 * @phydev: The PHY device
a59a4d19
GC
1079 * @prtad: MMD Address
1080 * @devad: MMD DEVAD
a59a4d19
GC
1081 * @data: data to write in the MMD register
1082 *
1083 * Description: Write data from the MMD registers of the specified
1084 * phy address.
1085 * To write these register we have:
1086 * 1) Write reg 13 // DEVAD
1087 * 2) Write reg 14 // MMD Address
1088 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
1089 * 3) Write reg 14 // Write MMD data
1090 */
66ce7fb9 1091void phy_write_mmd_indirect(struct phy_device *phydev, int prtad,
053e7e16 1092 int devad, u32 data)
a59a4d19 1093{
0c1d77df 1094 struct phy_driver *phydrv = phydev->drv;
e5a03bfd 1095 int addr = phydev->mdio.addr;
a59a4d19 1096
ef899c07 1097 if (!phydrv->write_mmd_indirect) {
e5a03bfd 1098 struct mii_bus *bus = phydev->mdio.bus;
05a7f582
RK
1099
1100 mutex_lock(&bus->mdio_lock);
1101 mmd_phy_indirect(bus, prtad, devad, addr);
0c1d77df
VB
1102
1103 /* Write the data into MMD's selected register */
05a7f582
RK
1104 bus->write(bus, addr, MII_MMD_DATA, data);
1105 mutex_unlock(&bus->mdio_lock);
0c1d77df
VB
1106 } else {
1107 phydrv->write_mmd_indirect(phydev, prtad, devad, addr, data);
1108 }
a59a4d19 1109}
66ce7fb9 1110EXPORT_SYMBOL(phy_write_mmd_indirect);
a59a4d19 1111
a59a4d19
GC
1112/**
1113 * phy_init_eee - init and check the EEE feature
1114 * @phydev: target phy_device struct
1115 * @clk_stop_enable: PHY may stop the clock during LPI
1116 *
1117 * Description: it checks if the Energy-Efficient Ethernet (EEE)
1118 * is supported by looking at the MMD registers 3.20 and 7.60/61
1119 * and it programs the MMD register 3.0 setting the "Clock stop enable"
1120 * bit if required.
1121 */
1122int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
1123{
a59a4d19
GC
1124 /* According to 802.3az,the EEE is supported only in full duplex-mode.
1125 * Also EEE feature is active when core is operating with MII, GMII
7e140696
FF
1126 * or RGMII (all kinds). Internal PHYs are also allowed to proceed and
1127 * should return an error if they do not support EEE.
a59a4d19
GC
1128 */
1129 if ((phydev->duplex == DUPLEX_FULL) &&
1130 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
1131 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
32a64161 1132 phy_interface_is_rgmii(phydev) ||
a9f63095 1133 phy_is_internal(phydev))) {
a59a4d19
GC
1134 int eee_lp, eee_cap, eee_adv;
1135 u32 lp, cap, adv;
4ae6e50c 1136 int status;
a59a4d19
GC
1137
1138 /* Read phy status to properly get the right settings */
1139 status = phy_read_status(phydev);
1140 if (status)
1141 return status;
1142
1143 /* First check if the EEE ability is supported */
0c1d77df 1144 eee_cap = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE,
053e7e16 1145 MDIO_MMD_PCS);
7a4cecf7
GC
1146 if (eee_cap <= 0)
1147 goto eee_exit_err;
a59a4d19 1148
b32607dd 1149 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19 1150 if (!cap)
7a4cecf7 1151 goto eee_exit_err;
a59a4d19
GC
1152
1153 /* Check which link settings negotiated and verify it in
1154 * the EEE advertising registers.
1155 */
0c1d77df 1156 eee_lp = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE,
053e7e16 1157 MDIO_MMD_AN);
7a4cecf7
GC
1158 if (eee_lp <= 0)
1159 goto eee_exit_err;
a59a4d19 1160
0c1d77df 1161 eee_adv = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV,
053e7e16 1162 MDIO_MMD_AN);
7a4cecf7
GC
1163 if (eee_adv <= 0)
1164 goto eee_exit_err;
a59a4d19 1165
b32607dd
AB
1166 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
1167 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
54da5a8b 1168 if (!phy_check_valid(phydev->speed, phydev->duplex, lp & adv))
7a4cecf7 1169 goto eee_exit_err;
a59a4d19
GC
1170
1171 if (clk_stop_enable) {
1172 /* Configure the PHY to stop receiving xMII
1173 * clock while it is signaling LPI.
1174 */
0c1d77df 1175 int val = phy_read_mmd_indirect(phydev, MDIO_CTRL1,
053e7e16 1176 MDIO_MMD_PCS);
a59a4d19
GC
1177 if (val < 0)
1178 return val;
1179
1180 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
0c1d77df 1181 phy_write_mmd_indirect(phydev, MDIO_CTRL1,
053e7e16 1182 MDIO_MMD_PCS, val);
a59a4d19
GC
1183 }
1184
e62a768f 1185 return 0; /* EEE supported */
a59a4d19 1186 }
7a4cecf7 1187eee_exit_err:
e62a768f 1188 return -EPROTONOSUPPORT;
a59a4d19
GC
1189}
1190EXPORT_SYMBOL(phy_init_eee);
1191
1192/**
1193 * phy_get_eee_err - report the EEE wake error count
1194 * @phydev: target phy_device struct
1195 *
1196 * Description: it is to report the number of time where the PHY
1197 * failed to complete its normal wake sequence.
1198 */
1199int phy_get_eee_err(struct phy_device *phydev)
1200{
053e7e16 1201 return phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_WK_ERR, MDIO_MMD_PCS);
a59a4d19
GC
1202}
1203EXPORT_SYMBOL(phy_get_eee_err);
1204
1205/**
1206 * phy_ethtool_get_eee - get EEE supported and status
1207 * @phydev: target phy_device struct
1208 * @data: ethtool_eee data
1209 *
1210 * Description: it reportes the Supported/Advertisement/LP Advertisement
1211 * capabilities.
1212 */
1213int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1214{
1215 int val;
1216
1217 /* Get Supported EEE */
053e7e16 1218 val = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE, MDIO_MMD_PCS);
a59a4d19
GC
1219 if (val < 0)
1220 return val;
b32607dd 1221 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
a59a4d19
GC
1222
1223 /* Get advertisement EEE */
053e7e16 1224 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN);
a59a4d19
GC
1225 if (val < 0)
1226 return val;
b32607dd 1227 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1228
1229 /* Get LP advertisement EEE */
053e7e16 1230 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE, MDIO_MMD_AN);
a59a4d19
GC
1231 if (val < 0)
1232 return val;
b32607dd 1233 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1234
1235 return 0;
1236}
1237EXPORT_SYMBOL(phy_ethtool_get_eee);
1238
1239/**
1240 * phy_ethtool_set_eee - set EEE supported and status
1241 * @phydev: target phy_device struct
1242 * @data: ethtool_eee data
1243 *
1244 * Description: it is to program the Advertisement EEE register.
1245 */
1246int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1247{
553fe92b 1248 int val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19 1249
053e7e16 1250 phy_write_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN, val);
a59a4d19
GC
1251
1252 return 0;
1253}
1254EXPORT_SYMBOL(phy_ethtool_set_eee);
42e836eb
MS
1255
1256int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1257{
1258 if (phydev->drv->set_wol)
1259 return phydev->drv->set_wol(phydev, wol);
1260
1261 return -EOPNOTSUPP;
1262}
1263EXPORT_SYMBOL(phy_ethtool_set_wol);
1264
1265void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1266{
1267 if (phydev->drv->get_wol)
1268 phydev->drv->get_wol(phydev, wol);
1269}
1270EXPORT_SYMBOL(phy_ethtool_get_wol);