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2f53e904 1/* Framework for configuring and reading PHY devices
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2 * Based on code in sungem_phy.c and gianfar_phy.c
3 *
4 * Author: Andy Fleming
5 *
6 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 7 * Copyright (c) 2006, 2007 Maciej W. Rozycki
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AF
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
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15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
00db8189 18#include <linux/kernel.h>
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19#include <linux/string.h>
20#include <linux/errno.h>
21#include <linux/unistd.h>
00db8189 22#include <linux/interrupt.h>
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23#include <linux/delay.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/skbuff.h>
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27#include <linux/mm.h>
28#include <linux/module.h>
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29#include <linux/mii.h>
30#include <linux/ethtool.h>
31#include <linux/phy.h>
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32#include <linux/timer.h>
33#include <linux/workqueue.h>
a59a4d19 34#include <linux/mdio.h>
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SS
35#include <linux/io.h>
36#include <linux/uaccess.h>
60063497 37#include <linux/atomic.h>
2f53e904 38
00db8189 39#include <asm/irq.h>
00db8189 40
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FF
41static const char *phy_speed_to_str(int speed)
42{
43 switch (speed) {
44 case SPEED_10:
45 return "10Mbps";
46 case SPEED_100:
47 return "100Mbps";
48 case SPEED_1000:
49 return "1Gbps";
50 case SPEED_2500:
51 return "2.5Gbps";
52 case SPEED_10000:
53 return "10Gbps";
54 case SPEED_UNKNOWN:
55 return "Unknown";
56 default:
57 return "Unsupported (update phy.c)";
58 }
59}
60
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61/**
62 * phy_print_status - Convenience function to print out the current phy status
63 * @phydev: the phy_device struct
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64 */
65void phy_print_status(struct phy_device *phydev)
66{
2f53e904 67 if (phydev->link) {
df40cc88 68 netdev_info(phydev->attached_dev,
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FF
69 "Link is Up - %s/%s - flow control %s\n",
70 phy_speed_to_str(phydev->speed),
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71 DUPLEX_FULL == phydev->duplex ? "Full" : "Half",
72 phydev->pause ? "rx/tx" : "off");
2f53e904 73 } else {
43b6329f 74 netdev_info(phydev->attached_dev, "Link is Down\n");
2f53e904 75 }
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AF
76}
77EXPORT_SYMBOL(phy_print_status);
00db8189 78
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79/**
80 * phy_clear_interrupt - Ack the phy device's interrupt
81 * @phydev: the phy_device struct
82 *
83 * If the @phydev driver has an ack_interrupt function, call it to
84 * ack and clear the phy device's interrupt.
85 *
86 * Returns 0 on success on < 0 on error.
87 */
89ff05ec 88static int phy_clear_interrupt(struct phy_device *phydev)
00db8189 89{
00db8189 90 if (phydev->drv->ack_interrupt)
e62a768f 91 return phydev->drv->ack_interrupt(phydev);
00db8189 92
e62a768f 93 return 0;
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94}
95
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96/**
97 * phy_config_interrupt - configure the PHY device for the requested interrupts
98 * @phydev: the phy_device struct
99 * @interrupts: interrupt flags to configure for this @phydev
100 *
101 * Returns 0 on success on < 0 on error.
102 */
89ff05ec 103static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
00db8189 104{
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105 phydev->interrupts = interrupts;
106 if (phydev->drv->config_intr)
e62a768f 107 return phydev->drv->config_intr(phydev);
00db8189 108
e62a768f 109 return 0;
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110}
111
112
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113/**
114 * phy_aneg_done - return auto-negotiation status
115 * @phydev: target phy_device struct
00db8189 116 *
b3df0da8 117 * Description: Reads the status register and returns 0 either if
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118 * auto-negotiation is incomplete, or if there was an error.
119 * Returns BMSR_ANEGCOMPLETE if auto-negotiation is done.
120 */
121static inline int phy_aneg_done(struct phy_device *phydev)
122{
a9fa6e6a 123 return genphy_aneg_done(phydev);
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124}
125
00db8189 126/* A structure for mapping a particular speed and duplex
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127 * combination to a particular SUPPORTED and ADVERTISED value
128 */
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129struct phy_setting {
130 int speed;
131 int duplex;
132 u32 setting;
133};
134
135/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 136static const struct phy_setting settings[] = {
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137 {
138 .speed = 10000,
139 .duplex = DUPLEX_FULL,
140 .setting = SUPPORTED_10000baseT_Full,
141 },
142 {
143 .speed = SPEED_1000,
144 .duplex = DUPLEX_FULL,
145 .setting = SUPPORTED_1000baseT_Full,
146 },
147 {
148 .speed = SPEED_1000,
149 .duplex = DUPLEX_HALF,
150 .setting = SUPPORTED_1000baseT_Half,
151 },
152 {
153 .speed = SPEED_100,
154 .duplex = DUPLEX_FULL,
155 .setting = SUPPORTED_100baseT_Full,
156 },
157 {
158 .speed = SPEED_100,
159 .duplex = DUPLEX_HALF,
160 .setting = SUPPORTED_100baseT_Half,
161 },
162 {
163 .speed = SPEED_10,
164 .duplex = DUPLEX_FULL,
165 .setting = SUPPORTED_10baseT_Full,
166 },
167 {
168 .speed = SPEED_10,
169 .duplex = DUPLEX_HALF,
170 .setting = SUPPORTED_10baseT_Half,
171 },
172};
173
ff8ac609 174#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 175
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176/**
177 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
178 * @speed: speed to match
179 * @duplex: duplex to match
00db8189 180 *
b3df0da8 181 * Description: Searches the settings array for the setting which
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AF
182 * matches the desired speed and duplex, and returns the index
183 * of that setting. Returns the index of the last setting if
184 * none of the others match.
185 */
186static inline int phy_find_setting(int speed, int duplex)
187{
188 int idx = 0;
189
190 while (idx < ARRAY_SIZE(settings) &&
2f53e904 191 (settings[idx].speed != speed || settings[idx].duplex != duplex))
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192 idx++;
193
194 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
195}
196
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197/**
198 * phy_find_valid - find a PHY setting that matches the requested features mask
199 * @idx: The first index in settings[] to search
200 * @features: A mask of the valid settings
00db8189 201 *
b3df0da8 202 * Description: Returns the index of the first valid setting less
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AF
203 * than or equal to the one pointed to by idx, as determined by
204 * the mask in features. Returns the index of the last setting
205 * if nothing else matches.
206 */
207static inline int phy_find_valid(int idx, u32 features)
208{
209 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
210 idx++;
211
212 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
213}
214
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215/**
216 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
217 * @phydev: the target phy_device struct
00db8189 218 *
b3df0da8 219 * Description: Make sure the PHY is set to supported speeds and
00db8189 220 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 221 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 222 */
89ff05ec 223static void phy_sanitize_settings(struct phy_device *phydev)
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AF
224{
225 u32 features = phydev->supported;
226 int idx;
227
228 /* Sanitize settings based on PHY capabilities */
229 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 230 phydev->autoneg = AUTONEG_DISABLE;
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231
232 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
233 features);
234
235 phydev->speed = settings[idx].speed;
236 phydev->duplex = settings[idx].duplex;
237}
00db8189 238
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239/**
240 * phy_ethtool_sset - generic ethtool sset function, handles all the details
241 * @phydev: target phy_device struct
242 * @cmd: ethtool_cmd
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243 *
244 * A few notes about parameter checking:
245 * - We don't set port or transceiver, so we don't care what they
246 * were set to.
247 * - phy_start_aneg() will make sure forced settings are sane, and
248 * choose the next best ones from the ones selected, so we don't
b3df0da8 249 * care if ethtool tries to give us bad values.
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250 */
251int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
252{
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DD
253 u32 speed = ethtool_cmd_speed(cmd);
254
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255 if (cmd->phy_address != phydev->addr)
256 return -EINVAL;
257
2f53e904 258 /* We make sure that we don't pass unsupported values in to the PHY */
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259 cmd->advertising &= phydev->supported;
260
261 /* Verify the settings we care about. */
262 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
263 return -EINVAL;
264
265 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
266 return -EINVAL;
267
8e95a202 268 if (cmd->autoneg == AUTONEG_DISABLE &&
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DD
269 ((speed != SPEED_1000 &&
270 speed != SPEED_100 &&
271 speed != SPEED_10) ||
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JP
272 (cmd->duplex != DUPLEX_HALF &&
273 cmd->duplex != DUPLEX_FULL)))
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274 return -EINVAL;
275
276 phydev->autoneg = cmd->autoneg;
277
25db0338 278 phydev->speed = speed;
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279
280 phydev->advertising = cmd->advertising;
281
282 if (AUTONEG_ENABLE == cmd->autoneg)
283 phydev->advertising |= ADVERTISED_Autoneg;
284 else
285 phydev->advertising &= ~ADVERTISED_Autoneg;
286
287 phydev->duplex = cmd->duplex;
288
289 /* Restart the PHY */
290 phy_start_aneg(phydev);
291
292 return 0;
293}
9f6d55d0 294EXPORT_SYMBOL(phy_ethtool_sset);
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295
296int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
297{
298 cmd->supported = phydev->supported;
299
300 cmd->advertising = phydev->advertising;
114002bc 301 cmd->lp_advertising = phydev->lp_advertising;
00db8189 302
70739497 303 ethtool_cmd_speed_set(cmd, phydev->speed);
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AF
304 cmd->duplex = phydev->duplex;
305 cmd->port = PORT_MII;
306 cmd->phy_address = phydev->addr;
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FF
307 cmd->transceiver = phy_is_internal(phydev) ?
308 XCVR_INTERNAL : XCVR_EXTERNAL;
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AF
309 cmd->autoneg = phydev->autoneg;
310
311 return 0;
312}
9f6d55d0 313EXPORT_SYMBOL(phy_ethtool_gset);
00db8189 314
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315/**
316 * phy_mii_ioctl - generic PHY MII ioctl interface
317 * @phydev: the phy_device struct
00c7d920 318 * @ifr: &struct ifreq for socket ioctl's
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319 * @cmd: ioctl cmd to execute
320 *
321 * Note that this function is currently incompatible with the
00db8189 322 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 323 * current state. Use at own risk.
00db8189 324 */
2f53e904 325int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd)
00db8189 326{
28b04113 327 struct mii_ioctl_data *mii_data = if_mii(ifr);
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AF
328 u16 val = mii_data->val_in;
329
330 switch (cmd) {
331 case SIOCGMIIPHY:
332 mii_data->phy_id = phydev->addr;
c6d6a511
LB
333 /* fall through */
334
00db8189 335 case SIOCGMIIREG:
af1dc13e
PK
336 mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
337 mii_data->reg_num);
e62a768f 338 return 0;
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339
340 case SIOCSMIIREG:
00db8189 341 if (mii_data->phy_id == phydev->addr) {
e109374f 342 switch (mii_data->reg_num) {
00db8189 343 case MII_BMCR:
2f53e904 344 if ((val & (BMCR_RESET | BMCR_ANENABLE)) == 0)
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AF
345 phydev->autoneg = AUTONEG_DISABLE;
346 else
347 phydev->autoneg = AUTONEG_ENABLE;
2f53e904 348 if (!phydev->autoneg && (val & BMCR_FULLDPLX))
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AF
349 phydev->duplex = DUPLEX_FULL;
350 else
351 phydev->duplex = DUPLEX_HALF;
2f53e904 352 if (!phydev->autoneg && (val & BMCR_SPEED1000))
024a0a3c 353 phydev->speed = SPEED_1000;
2f53e904
SS
354 else if (!phydev->autoneg &&
355 (val & BMCR_SPEED100))
024a0a3c 356 phydev->speed = SPEED_100;
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AF
357 break;
358 case MII_ADVERTISE:
359 phydev->advertising = val;
360 break;
361 default:
362 /* do nothing */
363 break;
364 }
365 }
366
af1dc13e
PK
367 mdiobus_write(phydev->bus, mii_data->phy_id,
368 mii_data->reg_num, val);
369
8e95a202 370 if (mii_data->reg_num == MII_BMCR &&
2613f95f 371 val & BMCR_RESET)
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SS
372 return phy_init_hw(phydev);
373 return 0;
dda93b48 374
c1f19b51
RC
375 case SIOCSHWTSTAMP:
376 if (phydev->drv->hwtstamp)
377 return phydev->drv->hwtstamp(phydev, ifr);
378 /* fall through */
379
dda93b48 380 default:
c6d6a511 381 return -EOPNOTSUPP;
00db8189 382 }
00db8189 383}
680e9fe9 384EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 385
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386/**
387 * phy_start_aneg - start auto-negotiation for this PHY device
388 * @phydev: the phy_device struct
e1393456 389 *
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390 * Description: Sanitizes the settings (if we're not autonegotiating
391 * them), and then calls the driver's config_aneg function.
392 * If the PHYCONTROL Layer is operating, we change the state to
393 * reflect the beginning of Auto-negotiation or forcing.
e1393456
AF
394 */
395int phy_start_aneg(struct phy_device *phydev)
396{
397 int err;
398
35b5f6b1 399 mutex_lock(&phydev->lock);
e1393456
AF
400
401 if (AUTONEG_DISABLE == phydev->autoneg)
402 phy_sanitize_settings(phydev);
403
404 err = phydev->drv->config_aneg(phydev);
e1393456
AF
405 if (err < 0)
406 goto out_unlock;
407
408 if (phydev->state != PHY_HALTED) {
409 if (AUTONEG_ENABLE == phydev->autoneg) {
410 phydev->state = PHY_AN;
411 phydev->link_timeout = PHY_AN_TIMEOUT;
412 } else {
413 phydev->state = PHY_FORCING;
414 phydev->link_timeout = PHY_FORCE_TIMEOUT;
415 }
416 }
417
418out_unlock:
35b5f6b1 419 mutex_unlock(&phydev->lock);
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AF
420 return err;
421}
422EXPORT_SYMBOL(phy_start_aneg);
423
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424/**
425 * phy_start_machine - start PHY state machine tracking
426 * @phydev: the phy_device struct
00db8189 427 *
b3df0da8 428 * Description: The PHY infrastructure can run a state machine
00db8189
AF
429 * which tracks whether the PHY is starting up, negotiating,
430 * etc. This function starts the timer which tracks the state
29935aeb
SS
431 * of the PHY. If you want to maintain your own state machine,
432 * do not call this function.
b3df0da8 433 */
29935aeb 434void phy_start_machine(struct phy_device *phydev)
00db8189 435{
bbb47bde 436 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
00db8189
AF
437}
438
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RD
439/**
440 * phy_stop_machine - stop the PHY state machine tracking
441 * @phydev: target phy_device struct
00db8189 442 *
b3df0da8 443 * Description: Stops the state machine timer, sets the state to UP
817acf5e 444 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
445 * phy_detach.
446 */
447void phy_stop_machine(struct phy_device *phydev)
448{
a390d1f3 449 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 450
35b5f6b1 451 mutex_lock(&phydev->lock);
00db8189
AF
452 if (phydev->state > PHY_UP)
453 phydev->state = PHY_UP;
35b5f6b1 454 mutex_unlock(&phydev->lock);
00db8189
AF
455}
456
b3df0da8
RD
457/**
458 * phy_error - enter HALTED state for this PHY device
459 * @phydev: target phy_device struct
00db8189
AF
460 *
461 * Moves the PHY to the HALTED state in response to a read
462 * or write error, and tells the controller the link is down.
463 * Must not be called from interrupt context, or while the
464 * phydev->lock is held.
465 */
9b9a8bfc 466static void phy_error(struct phy_device *phydev)
00db8189 467{
35b5f6b1 468 mutex_lock(&phydev->lock);
00db8189 469 phydev->state = PHY_HALTED;
35b5f6b1 470 mutex_unlock(&phydev->lock);
00db8189
AF
471}
472
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RD
473/**
474 * phy_interrupt - PHY interrupt handler
475 * @irq: interrupt line
476 * @phy_dat: phy_device pointer
e1393456 477 *
b3df0da8 478 * Description: When a PHY interrupt occurs, the handler disables
e1393456
AF
479 * interrupts, and schedules a work task to clear the interrupt.
480 */
7d12e780 481static irqreturn_t phy_interrupt(int irq, void *phy_dat)
e1393456
AF
482{
483 struct phy_device *phydev = phy_dat;
484
3c3070d7
MR
485 if (PHY_HALTED == phydev->state)
486 return IRQ_NONE; /* It can't be ours. */
487
e1393456
AF
488 /* The MDIO bus is not allowed to be written in interrupt
489 * context, so we need to disable the irq here. A work
490 * queue will write the PHY to disable and clear the
2f53e904
SS
491 * interrupt, and then reenable the irq line.
492 */
e1393456 493 disable_irq_nosync(irq);
0ac49527 494 atomic_inc(&phydev->irq_disable);
e1393456 495
bbb47bde 496 queue_work(system_power_efficient_wq, &phydev->phy_queue);
e1393456
AF
497
498 return IRQ_HANDLED;
499}
500
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501/**
502 * phy_enable_interrupts - Enable the interrupts from the PHY side
503 * @phydev: target phy_device struct
504 */
89ff05ec 505static int phy_enable_interrupts(struct phy_device *phydev)
00db8189 506{
553fe92b 507 int err = phy_clear_interrupt(phydev);
00db8189 508
e1393456
AF
509 if (err < 0)
510 return err;
00db8189 511
553fe92b 512 return phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189 513}
00db8189 514
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RD
515/**
516 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
517 * @phydev: target phy_device struct
518 */
89ff05ec 519static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
520{
521 int err;
522
523 /* Disable PHY interrupts */
524 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
00db8189
AF
525 if (err)
526 goto phy_err;
527
528 /* Clear the interrupt */
529 err = phy_clear_interrupt(phydev);
00db8189
AF
530 if (err)
531 goto phy_err;
532
533 return 0;
534
535phy_err:
536 phy_error(phydev);
537
538 return err;
539}
e1393456 540
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RD
541/**
542 * phy_start_interrupts - request and enable interrupts for a PHY device
543 * @phydev: target phy_device struct
e1393456 544 *
b3df0da8
RD
545 * Description: Request the interrupt for the given PHY.
546 * If this fails, then we set irq to PHY_POLL.
e1393456 547 * Otherwise, we enable the interrupts in the PHY.
e1393456 548 * This should only be called with a valid IRQ number.
b3df0da8 549 * Returns 0 on success or < 0 on error.
e1393456
AF
550 */
551int phy_start_interrupts(struct phy_device *phydev)
552{
0ac49527 553 atomic_set(&phydev->irq_disable, 0);
33c133cc
SS
554 if (request_irq(phydev->irq, phy_interrupt, 0, "phy_interrupt",
555 phydev) < 0) {
8d242488
JP
556 pr_warn("%s: Can't get IRQ %d (PHY)\n",
557 phydev->bus->name, phydev->irq);
e1393456
AF
558 phydev->irq = PHY_POLL;
559 return 0;
560 }
561
e62a768f 562 return phy_enable_interrupts(phydev);
e1393456
AF
563}
564EXPORT_SYMBOL(phy_start_interrupts);
565
b3df0da8
RD
566/**
567 * phy_stop_interrupts - disable interrupts from a PHY device
568 * @phydev: target phy_device struct
569 */
e1393456
AF
570int phy_stop_interrupts(struct phy_device *phydev)
571{
553fe92b 572 int err = phy_disable_interrupts(phydev);
e1393456
AF
573
574 if (err)
575 phy_error(phydev);
576
0ac49527
MR
577 free_irq(phydev->irq, phydev);
578
2f53e904 579 /* Cannot call flush_scheduled_work() here as desired because
0ac49527
MR
580 * of rtnl_lock(), but we do not really care about what would
581 * be done, except from enable_irq(), so cancel any work
582 * possibly pending and take care of the matter below.
3c3070d7 583 */
28e53bdd 584 cancel_work_sync(&phydev->phy_queue);
2f53e904 585 /* If work indeed has been cancelled, disable_irq() will have
0ac49527
MR
586 * been left unbalanced from phy_interrupt() and enable_irq()
587 * has to be called so that other devices on the line work.
588 */
589 while (atomic_dec_return(&phydev->irq_disable) >= 0)
590 enable_irq(phydev->irq);
e1393456
AF
591
592 return err;
593}
594EXPORT_SYMBOL(phy_stop_interrupts);
595
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RD
596/**
597 * phy_change - Scheduled by the phy_interrupt/timer to handle PHY changes
598 * @work: work_struct that describes the work to be done
599 */
5ea94e76 600void phy_change(struct work_struct *work)
e1393456 601{
c4028958
DH
602 struct phy_device *phydev =
603 container_of(work, struct phy_device, phy_queue);
e1393456 604
a8729eb3
AG
605 if (phydev->drv->did_interrupt &&
606 !phydev->drv->did_interrupt(phydev))
607 goto ignore;
608
e62a768f 609 if (phy_disable_interrupts(phydev))
e1393456
AF
610 goto phy_err;
611
35b5f6b1 612 mutex_lock(&phydev->lock);
e1393456
AF
613 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
614 phydev->state = PHY_CHANGELINK;
35b5f6b1 615 mutex_unlock(&phydev->lock);
e1393456 616
0ac49527 617 atomic_dec(&phydev->irq_disable);
e1393456
AF
618 enable_irq(phydev->irq);
619
620 /* Reenable interrupts */
e62a768f
SS
621 if (PHY_HALTED != phydev->state &&
622 phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED))
e1393456
AF
623 goto irq_enable_err;
624
a390d1f3
MS
625 /* reschedule state queue work to run as soon as possible */
626 cancel_delayed_work_sync(&phydev->state_queue);
bbb47bde 627 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
e1393456
AF
628 return;
629
a8729eb3
AG
630ignore:
631 atomic_dec(&phydev->irq_disable);
632 enable_irq(phydev->irq);
633 return;
634
e1393456
AF
635irq_enable_err:
636 disable_irq(phydev->irq);
0ac49527 637 atomic_inc(&phydev->irq_disable);
e1393456
AF
638phy_err:
639 phy_error(phydev);
640}
641
b3df0da8
RD
642/**
643 * phy_stop - Bring down the PHY link, and stop checking the status
644 * @phydev: target phy_device struct
645 */
e1393456
AF
646void phy_stop(struct phy_device *phydev)
647{
35b5f6b1 648 mutex_lock(&phydev->lock);
e1393456
AF
649
650 if (PHY_HALTED == phydev->state)
651 goto out_unlock;
652
2c7b4921 653 if (phy_interrupt_is_valid(phydev)) {
e1393456
AF
654 /* Disable PHY Interrupts */
655 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 656
3c3070d7
MR
657 /* Clear any pending interrupts */
658 phy_clear_interrupt(phydev);
659 }
e1393456 660
6daf6531
MR
661 phydev->state = PHY_HALTED;
662
e1393456 663out_unlock:
35b5f6b1 664 mutex_unlock(&phydev->lock);
3c3070d7 665
2f53e904 666 /* Cannot call flush_scheduled_work() here as desired because
3c3070d7
MR
667 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
668 * will not reenable interrupts.
669 */
e1393456 670}
2f53e904 671EXPORT_SYMBOL(phy_stop);
e1393456 672
b3df0da8
RD
673/**
674 * phy_start - start or restart a PHY device
675 * @phydev: target phy_device struct
e1393456 676 *
b3df0da8 677 * Description: Indicates the attached device's readiness to
e1393456
AF
678 * handle PHY-related work. Used during startup to start the
679 * PHY, and after a call to phy_stop() to resume operation.
680 * Also used to indicate the MDIO bus has cleared an error
681 * condition.
682 */
683void phy_start(struct phy_device *phydev)
684{
35b5f6b1 685 mutex_lock(&phydev->lock);
e1393456
AF
686
687 switch (phydev->state) {
e109374f
FF
688 case PHY_STARTING:
689 phydev->state = PHY_PENDING;
690 break;
691 case PHY_READY:
692 phydev->state = PHY_UP;
693 break;
694 case PHY_HALTED:
695 phydev->state = PHY_RESUMING;
696 default:
697 break;
e1393456 698 }
35b5f6b1 699 mutex_unlock(&phydev->lock);
e1393456 700}
e1393456 701EXPORT_SYMBOL(phy_start);
67c4f3fa 702
35b5f6b1
NC
703/**
704 * phy_state_machine - Handle the state machine
705 * @work: work_struct that describes the work to be done
35b5f6b1 706 */
4f9c85a1 707void phy_state_machine(struct work_struct *work)
00db8189 708{
bf6aede7 709 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 710 struct phy_device *phydev =
a390d1f3 711 container_of(dwork, struct phy_device, state_queue);
be9dad1f 712 int needs_aneg = 0, do_suspend = 0;
00db8189
AF
713 int err = 0;
714
35b5f6b1 715 mutex_lock(&phydev->lock);
00db8189 716
e109374f
FF
717 switch (phydev->state) {
718 case PHY_DOWN:
719 case PHY_STARTING:
720 case PHY_READY:
721 case PHY_PENDING:
722 break;
723 case PHY_UP:
724 needs_aneg = 1;
00db8189 725
e109374f
FF
726 phydev->link_timeout = PHY_AN_TIMEOUT;
727
728 break;
729 case PHY_AN:
730 err = phy_read_status(phydev);
e109374f 731 if (err < 0)
00db8189 732 break;
6b655529 733
2f53e904 734 /* If the link is down, give up on negotiation for now */
e109374f
FF
735 if (!phydev->link) {
736 phydev->state = PHY_NOLINK;
737 netif_carrier_off(phydev->attached_dev);
738 phydev->adjust_link(phydev->attached_dev);
739 break;
740 }
6b655529 741
2f53e904 742 /* Check if negotiation is done. Break if there's an error */
e109374f
FF
743 err = phy_aneg_done(phydev);
744 if (err < 0)
745 break;
6b655529 746
e109374f
FF
747 /* If AN is done, we're running */
748 if (err > 0) {
749 phydev->state = PHY_RUNNING;
750 netif_carrier_on(phydev->attached_dev);
751 phydev->adjust_link(phydev->attached_dev);
00db8189 752
e109374f
FF
753 } else if (0 == phydev->link_timeout--) {
754 needs_aneg = 1;
2f53e904 755 /* If we have the magic_aneg bit, we try again */
e109374f
FF
756 if (phydev->drv->flags & PHY_HAS_MAGICANEG)
757 break;
758 }
759 break;
760 case PHY_NOLINK:
761 err = phy_read_status(phydev);
e109374f 762 if (err)
00db8189 763 break;
00db8189 764
e109374f
FF
765 if (phydev->link) {
766 phydev->state = PHY_RUNNING;
767 netif_carrier_on(phydev->attached_dev);
768 phydev->adjust_link(phydev->attached_dev);
769 }
770 break;
771 case PHY_FORCING:
772 err = genphy_update_link(phydev);
e109374f 773 if (err)
00db8189 774 break;
00db8189 775
e109374f
FF
776 if (phydev->link) {
777 phydev->state = PHY_RUNNING;
778 netif_carrier_on(phydev->attached_dev);
779 } else {
780 if (0 == phydev->link_timeout--)
781 needs_aneg = 1;
782 }
00db8189 783
e109374f
FF
784 phydev->adjust_link(phydev->attached_dev);
785 break;
786 case PHY_RUNNING:
787 /* Only register a CHANGE if we are
788 * polling or ignoring interrupts
789 */
790 if (!phy_interrupt_is_valid(phydev))
791 phydev->state = PHY_CHANGELINK;
792 break;
793 case PHY_CHANGELINK:
794 err = phy_read_status(phydev);
e109374f 795 if (err)
00db8189 796 break;
00db8189 797
e109374f
FF
798 if (phydev->link) {
799 phydev->state = PHY_RUNNING;
800 netif_carrier_on(phydev->attached_dev);
801 } else {
802 phydev->state = PHY_NOLINK;
803 netif_carrier_off(phydev->attached_dev);
804 }
00db8189 805
e109374f 806 phydev->adjust_link(phydev->attached_dev);
00db8189 807
e109374f
FF
808 if (phy_interrupt_is_valid(phydev))
809 err = phy_config_interrupt(phydev,
2f53e904 810 PHY_INTERRUPT_ENABLED);
e109374f
FF
811 break;
812 case PHY_HALTED:
813 if (phydev->link) {
814 phydev->link = 0;
815 netif_carrier_off(phydev->attached_dev);
00db8189 816 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
817 do_suspend = 1;
818 }
819 break;
820 case PHY_RESUMING:
e109374f 821 err = phy_clear_interrupt(phydev);
e109374f
FF
822 if (err)
823 break;
00db8189 824
2f53e904 825 err = phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
e109374f
FF
826 if (err)
827 break;
00db8189 828
e109374f
FF
829 if (AUTONEG_ENABLE == phydev->autoneg) {
830 err = phy_aneg_done(phydev);
831 if (err < 0)
00db8189
AF
832 break;
833
e109374f 834 /* err > 0 if AN is done.
2f53e904
SS
835 * Otherwise, it's 0, and we're still waiting for AN
836 */
e109374f 837 if (err > 0) {
42caa074
WF
838 err = phy_read_status(phydev);
839 if (err)
840 break;
841
842 if (phydev->link) {
843 phydev->state = PHY_RUNNING;
844 netif_carrier_on(phydev->attached_dev);
2f53e904 845 } else {
42caa074 846 phydev->state = PHY_NOLINK;
2f53e904 847 }
42caa074 848 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
849 } else {
850 phydev->state = PHY_AN;
851 phydev->link_timeout = PHY_AN_TIMEOUT;
42caa074 852 }
e109374f
FF
853 } else {
854 err = phy_read_status(phydev);
855 if (err)
856 break;
857
858 if (phydev->link) {
859 phydev->state = PHY_RUNNING;
860 netif_carrier_on(phydev->attached_dev);
2f53e904 861 } else {
e109374f 862 phydev->state = PHY_NOLINK;
2f53e904 863 }
e109374f
FF
864 phydev->adjust_link(phydev->attached_dev);
865 }
866 break;
00db8189
AF
867 }
868
35b5f6b1 869 mutex_unlock(&phydev->lock);
00db8189
AF
870
871 if (needs_aneg)
872 err = phy_start_aneg(phydev);
873
be9dad1f
SH
874 if (do_suspend)
875 phy_suspend(phydev);
876
00db8189
AF
877 if (err < 0)
878 phy_error(phydev);
879
bbb47bde 880 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
2f53e904 881 PHY_STATE_TIME * HZ);
35b5f6b1 882}
a59a4d19 883
5ea94e76
FF
884void phy_mac_interrupt(struct phy_device *phydev, int new_link)
885{
886 cancel_work_sync(&phydev->phy_queue);
887 phydev->link = new_link;
888 schedule_work(&phydev->phy_queue);
889}
890EXPORT_SYMBOL(phy_mac_interrupt);
891
a59a4d19
GC
892static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
893 int addr)
894{
895 /* Write the desired MMD Devad */
896 bus->write(bus, addr, MII_MMD_CTRL, devad);
897
898 /* Write the desired MMD register address */
899 bus->write(bus, addr, MII_MMD_DATA, prtad);
900
901 /* Select the Function : DATA with no post increment */
902 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
903}
904
905/**
906 * phy_read_mmd_indirect - reads data from the MMD registers
907 * @bus: the target MII bus
908 * @prtad: MMD Address
909 * @devad: MMD DEVAD
910 * @addr: PHY address on the MII bus
911 *
912 * Description: it reads data from the MMD registers (clause 22 to access to
913 * clause 45) of the specified phy address.
914 * To read these register we have:
915 * 1) Write reg 13 // DEVAD
916 * 2) Write reg 14 // MMD Address
917 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
918 * 3) Read reg 14 // Read MMD data
919 */
920static int phy_read_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
921 int addr)
922{
a59a4d19
GC
923 mmd_phy_indirect(bus, prtad, devad, addr);
924
925 /* Read the content of the MMD's selected register */
e62a768f 926 return bus->read(bus, addr, MII_MMD_DATA);
a59a4d19
GC
927}
928
929/**
930 * phy_write_mmd_indirect - writes data to the MMD registers
931 * @bus: the target MII bus
932 * @prtad: MMD Address
933 * @devad: MMD DEVAD
934 * @addr: PHY address on the MII bus
935 * @data: data to write in the MMD register
936 *
937 * Description: Write data from the MMD registers of the specified
938 * phy address.
939 * To write these register we have:
940 * 1) Write reg 13 // DEVAD
941 * 2) Write reg 14 // MMD Address
942 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
943 * 3) Write reg 14 // Write MMD data
944 */
945static void phy_write_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
946 int addr, u32 data)
947{
948 mmd_phy_indirect(bus, prtad, devad, addr);
949
950 /* Write the data into MMD's selected register */
951 bus->write(bus, addr, MII_MMD_DATA, data);
952}
953
a59a4d19
GC
954/**
955 * phy_init_eee - init and check the EEE feature
956 * @phydev: target phy_device struct
957 * @clk_stop_enable: PHY may stop the clock during LPI
958 *
959 * Description: it checks if the Energy-Efficient Ethernet (EEE)
960 * is supported by looking at the MMD registers 3.20 and 7.60/61
961 * and it programs the MMD register 3.0 setting the "Clock stop enable"
962 * bit if required.
963 */
964int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
965{
a59a4d19
GC
966 /* According to 802.3az,the EEE is supported only in full duplex-mode.
967 * Also EEE feature is active when core is operating with MII, GMII
968 * or RGMII.
969 */
970 if ((phydev->duplex == DUPLEX_FULL) &&
971 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
972 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
973 (phydev->interface == PHY_INTERFACE_MODE_RGMII))) {
974 int eee_lp, eee_cap, eee_adv;
975 u32 lp, cap, adv;
976 int idx, status;
977
978 /* Read phy status to properly get the right settings */
979 status = phy_read_status(phydev);
980 if (status)
981 return status;
982
983 /* First check if the EEE ability is supported */
984 eee_cap = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
985 MDIO_MMD_PCS, phydev->addr);
986 if (eee_cap < 0)
987 return eee_cap;
988
b32607dd 989 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19 990 if (!cap)
e62a768f 991 return -EPROTONOSUPPORT;
a59a4d19
GC
992
993 /* Check which link settings negotiated and verify it in
994 * the EEE advertising registers.
995 */
996 eee_lp = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
997 MDIO_MMD_AN, phydev->addr);
998 if (eee_lp < 0)
999 return eee_lp;
1000
1001 eee_adv = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1002 MDIO_MMD_AN, phydev->addr);
1003 if (eee_adv < 0)
1004 return eee_adv;
1005
b32607dd
AB
1006 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
1007 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
a59a4d19 1008 idx = phy_find_setting(phydev->speed, phydev->duplex);
9a9c56cb 1009 if (!(lp & adv & settings[idx].setting))
e62a768f 1010 return -EPROTONOSUPPORT;
a59a4d19
GC
1011
1012 if (clk_stop_enable) {
1013 /* Configure the PHY to stop receiving xMII
1014 * clock while it is signaling LPI.
1015 */
1016 int val = phy_read_mmd_indirect(phydev->bus, MDIO_CTRL1,
1017 MDIO_MMD_PCS,
1018 phydev->addr);
1019 if (val < 0)
1020 return val;
1021
1022 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
1023 phy_write_mmd_indirect(phydev->bus, MDIO_CTRL1,
1024 MDIO_MMD_PCS, phydev->addr, val);
1025 }
1026
e62a768f 1027 return 0; /* EEE supported */
a59a4d19
GC
1028 }
1029
e62a768f 1030 return -EPROTONOSUPPORT;
a59a4d19
GC
1031}
1032EXPORT_SYMBOL(phy_init_eee);
1033
1034/**
1035 * phy_get_eee_err - report the EEE wake error count
1036 * @phydev: target phy_device struct
1037 *
1038 * Description: it is to report the number of time where the PHY
1039 * failed to complete its normal wake sequence.
1040 */
1041int phy_get_eee_err(struct phy_device *phydev)
1042{
1043 return phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_WK_ERR,
1044 MDIO_MMD_PCS, phydev->addr);
a59a4d19
GC
1045}
1046EXPORT_SYMBOL(phy_get_eee_err);
1047
1048/**
1049 * phy_ethtool_get_eee - get EEE supported and status
1050 * @phydev: target phy_device struct
1051 * @data: ethtool_eee data
1052 *
1053 * Description: it reportes the Supported/Advertisement/LP Advertisement
1054 * capabilities.
1055 */
1056int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1057{
1058 int val;
1059
1060 /* Get Supported EEE */
1061 val = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
1062 MDIO_MMD_PCS, phydev->addr);
1063 if (val < 0)
1064 return val;
b32607dd 1065 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
a59a4d19
GC
1066
1067 /* Get advertisement EEE */
1068 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1069 MDIO_MMD_AN, phydev->addr);
1070 if (val < 0)
1071 return val;
b32607dd 1072 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1073
1074 /* Get LP advertisement EEE */
1075 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
1076 MDIO_MMD_AN, phydev->addr);
1077 if (val < 0)
1078 return val;
b32607dd 1079 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1080
1081 return 0;
1082}
1083EXPORT_SYMBOL(phy_ethtool_get_eee);
1084
1085/**
1086 * phy_ethtool_set_eee - set EEE supported and status
1087 * @phydev: target phy_device struct
1088 * @data: ethtool_eee data
1089 *
1090 * Description: it is to program the Advertisement EEE register.
1091 */
1092int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1093{
553fe92b 1094 int val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19 1095
a59a4d19
GC
1096 phy_write_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV, MDIO_MMD_AN,
1097 phydev->addr, val);
1098
1099 return 0;
1100}
1101EXPORT_SYMBOL(phy_ethtool_set_eee);
42e836eb
MS
1102
1103int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1104{
1105 if (phydev->drv->set_wol)
1106 return phydev->drv->set_wol(phydev, wol);
1107
1108 return -EOPNOTSUPP;
1109}
1110EXPORT_SYMBOL(phy_ethtool_set_wol);
1111
1112void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1113{
1114 if (phydev->drv->get_wol)
1115 phydev->drv->get_wol(phydev, wol);
1116}
1117EXPORT_SYMBOL(phy_ethtool_get_wol);