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2f53e904 1/* Framework for configuring and reading PHY devices
00db8189
AF
2 * Based on code in sungem_phy.c and gianfar_phy.c
3 *
4 * Author: Andy Fleming
5 *
6 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 7 * Copyright (c) 2006, 2007 Maciej W. Rozycki
00db8189
AF
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
8d242488
JP
15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
00db8189 18#include <linux/kernel.h>
00db8189
AF
19#include <linux/string.h>
20#include <linux/errno.h>
21#include <linux/unistd.h>
00db8189 22#include <linux/interrupt.h>
00db8189
AF
23#include <linux/delay.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/skbuff.h>
00db8189
AF
27#include <linux/mm.h>
28#include <linux/module.h>
00db8189
AF
29#include <linux/mii.h>
30#include <linux/ethtool.h>
31#include <linux/phy.h>
3c3070d7
MR
32#include <linux/timer.h>
33#include <linux/workqueue.h>
a59a4d19 34#include <linux/mdio.h>
2f53e904
SS
35#include <linux/io.h>
36#include <linux/uaccess.h>
60063497 37#include <linux/atomic.h>
2f53e904 38
00db8189 39#include <asm/irq.h>
00db8189 40
766d1d38
FF
41static const char *phy_speed_to_str(int speed)
42{
43 switch (speed) {
44 case SPEED_10:
45 return "10Mbps";
46 case SPEED_100:
47 return "100Mbps";
48 case SPEED_1000:
49 return "1Gbps";
50 case SPEED_2500:
51 return "2.5Gbps";
52 case SPEED_10000:
53 return "10Gbps";
54 case SPEED_UNKNOWN:
55 return "Unknown";
56 default:
57 return "Unsupported (update phy.c)";
58 }
59}
60
3e2186e0
FF
61#define PHY_STATE_STR(_state) \
62 case PHY_##_state: \
63 return __stringify(_state); \
64
65static const char *phy_state_to_str(enum phy_state st)
66{
67 switch (st) {
68 PHY_STATE_STR(DOWN)
69 PHY_STATE_STR(STARTING)
70 PHY_STATE_STR(READY)
71 PHY_STATE_STR(PENDING)
72 PHY_STATE_STR(UP)
73 PHY_STATE_STR(AN)
74 PHY_STATE_STR(RUNNING)
75 PHY_STATE_STR(NOLINK)
76 PHY_STATE_STR(FORCING)
77 PHY_STATE_STR(CHANGELINK)
78 PHY_STATE_STR(HALTED)
79 PHY_STATE_STR(RESUMING)
80 }
81
82 return NULL;
83}
84
85
b3df0da8
RD
86/**
87 * phy_print_status - Convenience function to print out the current phy status
88 * @phydev: the phy_device struct
e1393456
AF
89 */
90void phy_print_status(struct phy_device *phydev)
91{
2f53e904 92 if (phydev->link) {
df40cc88 93 netdev_info(phydev->attached_dev,
766d1d38
FF
94 "Link is Up - %s/%s - flow control %s\n",
95 phy_speed_to_str(phydev->speed),
df40cc88
FF
96 DUPLEX_FULL == phydev->duplex ? "Full" : "Half",
97 phydev->pause ? "rx/tx" : "off");
2f53e904 98 } else {
43b6329f 99 netdev_info(phydev->attached_dev, "Link is Down\n");
2f53e904 100 }
e1393456
AF
101}
102EXPORT_SYMBOL(phy_print_status);
00db8189 103
b3df0da8
RD
104/**
105 * phy_clear_interrupt - Ack the phy device's interrupt
106 * @phydev: the phy_device struct
107 *
108 * If the @phydev driver has an ack_interrupt function, call it to
109 * ack and clear the phy device's interrupt.
110 *
ad033506 111 * Returns 0 on success or < 0 on error.
b3df0da8 112 */
89ff05ec 113static int phy_clear_interrupt(struct phy_device *phydev)
00db8189 114{
00db8189 115 if (phydev->drv->ack_interrupt)
e62a768f 116 return phydev->drv->ack_interrupt(phydev);
00db8189 117
e62a768f 118 return 0;
00db8189
AF
119}
120
b3df0da8
RD
121/**
122 * phy_config_interrupt - configure the PHY device for the requested interrupts
123 * @phydev: the phy_device struct
124 * @interrupts: interrupt flags to configure for this @phydev
125 *
ad033506 126 * Returns 0 on success or < 0 on error.
b3df0da8 127 */
89ff05ec 128static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
00db8189 129{
00db8189
AF
130 phydev->interrupts = interrupts;
131 if (phydev->drv->config_intr)
e62a768f 132 return phydev->drv->config_intr(phydev);
00db8189 133
e62a768f 134 return 0;
00db8189
AF
135}
136
137
b3df0da8
RD
138/**
139 * phy_aneg_done - return auto-negotiation status
140 * @phydev: target phy_device struct
00db8189 141 *
76a423a3
FF
142 * Description: Return the auto-negotiation status from this @phydev
143 * Returns > 0 on success or < 0 on error. 0 means that auto-negotiation
144 * is still pending.
00db8189 145 */
372788f9 146int phy_aneg_done(struct phy_device *phydev)
00db8189 147{
76a423a3
FF
148 if (phydev->drv->aneg_done)
149 return phydev->drv->aneg_done(phydev);
150
a9fa6e6a 151 return genphy_aneg_done(phydev);
00db8189 152}
372788f9 153EXPORT_SYMBOL(phy_aneg_done);
00db8189 154
00db8189 155/* A structure for mapping a particular speed and duplex
2f53e904
SS
156 * combination to a particular SUPPORTED and ADVERTISED value
157 */
00db8189
AF
158struct phy_setting {
159 int speed;
160 int duplex;
161 u32 setting;
162};
163
164/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 165static const struct phy_setting settings[] = {
00db8189 166 {
3e707706
LT
167 .speed = SPEED_10000,
168 .duplex = DUPLEX_FULL,
169 .setting = SUPPORTED_10000baseKR_Full,
170 },
171 {
172 .speed = SPEED_10000,
173 .duplex = DUPLEX_FULL,
174 .setting = SUPPORTED_10000baseKX4_Full,
175 },
176 {
177 .speed = SPEED_10000,
00db8189
AF
178 .duplex = DUPLEX_FULL,
179 .setting = SUPPORTED_10000baseT_Full,
180 },
3e707706
LT
181 {
182 .speed = SPEED_2500,
183 .duplex = DUPLEX_FULL,
184 .setting = SUPPORTED_2500baseX_Full,
185 },
186 {
187 .speed = SPEED_1000,
188 .duplex = DUPLEX_FULL,
189 .setting = SUPPORTED_1000baseKX_Full,
190 },
00db8189
AF
191 {
192 .speed = SPEED_1000,
193 .duplex = DUPLEX_FULL,
194 .setting = SUPPORTED_1000baseT_Full,
195 },
196 {
197 .speed = SPEED_1000,
198 .duplex = DUPLEX_HALF,
199 .setting = SUPPORTED_1000baseT_Half,
200 },
201 {
202 .speed = SPEED_100,
203 .duplex = DUPLEX_FULL,
204 .setting = SUPPORTED_100baseT_Full,
205 },
206 {
207 .speed = SPEED_100,
208 .duplex = DUPLEX_HALF,
209 .setting = SUPPORTED_100baseT_Half,
210 },
211 {
212 .speed = SPEED_10,
213 .duplex = DUPLEX_FULL,
214 .setting = SUPPORTED_10baseT_Full,
215 },
216 {
217 .speed = SPEED_10,
218 .duplex = DUPLEX_HALF,
219 .setting = SUPPORTED_10baseT_Half,
220 },
221};
222
ff8ac609 223#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 224
b3df0da8
RD
225/**
226 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
227 * @speed: speed to match
228 * @duplex: duplex to match
00db8189 229 *
b3df0da8 230 * Description: Searches the settings array for the setting which
00db8189
AF
231 * matches the desired speed and duplex, and returns the index
232 * of that setting. Returns the index of the last setting if
233 * none of the others match.
234 */
4ae6e50c 235static inline unsigned int phy_find_setting(int speed, int duplex)
00db8189 236{
4ae6e50c 237 unsigned int idx = 0;
00db8189
AF
238
239 while (idx < ARRAY_SIZE(settings) &&
2f53e904 240 (settings[idx].speed != speed || settings[idx].duplex != duplex))
00db8189
AF
241 idx++;
242
243 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
244}
245
b3df0da8
RD
246/**
247 * phy_find_valid - find a PHY setting that matches the requested features mask
248 * @idx: The first index in settings[] to search
249 * @features: A mask of the valid settings
00db8189 250 *
b3df0da8 251 * Description: Returns the index of the first valid setting less
00db8189
AF
252 * than or equal to the one pointed to by idx, as determined by
253 * the mask in features. Returns the index of the last setting
254 * if nothing else matches.
255 */
4ae6e50c 256static inline unsigned int phy_find_valid(unsigned int idx, u32 features)
00db8189
AF
257{
258 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
259 idx++;
260
261 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
262}
263
1f9127ca
ZB
264/**
265 * phy_supported_speeds - return all speeds currently supported by a phy device
266 * @phy: The phy device to return supported speeds of.
267 * @speeds: buffer to store supported speeds in.
268 * @size: size of speeds buffer.
269 *
270 * Description: Returns the number of supported speeds, and fills the speeds
271 * buffer with the supported speeds. If speeds buffer is too small to contain
272 * all currently supported speeds, will return as many speeds as can fit.
273 */
274unsigned int phy_supported_speeds(struct phy_device *phy,
275 unsigned int *speeds,
276 unsigned int size)
277{
278 unsigned int count = 0;
279 unsigned int idx = 0;
280
281 while (idx < MAX_NUM_SETTINGS && count < size) {
282 idx = phy_find_valid(idx, phy->supported);
283
284 if (!(settings[idx].setting & phy->supported))
285 break;
286
287 /* Assumes settings are grouped by speed */
288 if ((count == 0) ||
289 (speeds[count - 1] != settings[idx].speed)) {
290 speeds[count] = settings[idx].speed;
291 count++;
292 }
293 idx++;
294 }
295
296 return count;
297}
298
54da5a8b
GR
299/**
300 * phy_check_valid - check if there is a valid PHY setting which matches
301 * speed, duplex, and feature mask
302 * @speed: speed to match
303 * @duplex: duplex to match
304 * @features: A mask of the valid settings
305 *
306 * Description: Returns true if there is a valid setting, false otherwise.
307 */
308static inline bool phy_check_valid(int speed, int duplex, u32 features)
309{
310 unsigned int idx;
311
312 idx = phy_find_valid(phy_find_setting(speed, duplex), features);
313
314 return settings[idx].speed == speed && settings[idx].duplex == duplex &&
315 (settings[idx].setting & features);
316}
317
b3df0da8
RD
318/**
319 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
320 * @phydev: the target phy_device struct
00db8189 321 *
b3df0da8 322 * Description: Make sure the PHY is set to supported speeds and
00db8189 323 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 324 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 325 */
89ff05ec 326static void phy_sanitize_settings(struct phy_device *phydev)
00db8189
AF
327{
328 u32 features = phydev->supported;
4ae6e50c 329 unsigned int idx;
00db8189
AF
330
331 /* Sanitize settings based on PHY capabilities */
332 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 333 phydev->autoneg = AUTONEG_DISABLE;
00db8189
AF
334
335 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
336 features);
337
338 phydev->speed = settings[idx].speed;
339 phydev->duplex = settings[idx].duplex;
340}
00db8189 341
b3df0da8
RD
342/**
343 * phy_ethtool_sset - generic ethtool sset function, handles all the details
344 * @phydev: target phy_device struct
345 * @cmd: ethtool_cmd
00db8189
AF
346 *
347 * A few notes about parameter checking:
348 * - We don't set port or transceiver, so we don't care what they
349 * were set to.
350 * - phy_start_aneg() will make sure forced settings are sane, and
351 * choose the next best ones from the ones selected, so we don't
b3df0da8 352 * care if ethtool tries to give us bad values.
00db8189
AF
353 */
354int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
355{
25db0338
DD
356 u32 speed = ethtool_cmd_speed(cmd);
357
e5a03bfd 358 if (cmd->phy_address != phydev->mdio.addr)
00db8189
AF
359 return -EINVAL;
360
2f53e904 361 /* We make sure that we don't pass unsupported values in to the PHY */
00db8189
AF
362 cmd->advertising &= phydev->supported;
363
364 /* Verify the settings we care about. */
365 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
366 return -EINVAL;
367
368 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
369 return -EINVAL;
370
8e95a202 371 if (cmd->autoneg == AUTONEG_DISABLE &&
25db0338
DD
372 ((speed != SPEED_1000 &&
373 speed != SPEED_100 &&
374 speed != SPEED_10) ||
8e95a202
JP
375 (cmd->duplex != DUPLEX_HALF &&
376 cmd->duplex != DUPLEX_FULL)))
00db8189
AF
377 return -EINVAL;
378
379 phydev->autoneg = cmd->autoneg;
380
25db0338 381 phydev->speed = speed;
00db8189
AF
382
383 phydev->advertising = cmd->advertising;
384
385 if (AUTONEG_ENABLE == cmd->autoneg)
386 phydev->advertising |= ADVERTISED_Autoneg;
387 else
388 phydev->advertising &= ~ADVERTISED_Autoneg;
389
390 phydev->duplex = cmd->duplex;
391
1004ee61 392 phydev->mdix_ctrl = cmd->eth_tp_mdix_ctrl;
634ec36c 393
00db8189
AF
394 /* Restart the PHY */
395 phy_start_aneg(phydev);
396
397 return 0;
398}
9f6d55d0 399EXPORT_SYMBOL(phy_ethtool_sset);
00db8189 400
2d55173e
PR
401int phy_ethtool_ksettings_set(struct phy_device *phydev,
402 const struct ethtool_link_ksettings *cmd)
403{
404 u8 autoneg = cmd->base.autoneg;
405 u8 duplex = cmd->base.duplex;
406 u32 speed = cmd->base.speed;
407 u32 advertising;
408
409 if (cmd->base.phy_address != phydev->mdio.addr)
410 return -EINVAL;
411
412 ethtool_convert_link_mode_to_legacy_u32(&advertising,
413 cmd->link_modes.advertising);
414
415 /* We make sure that we don't pass unsupported values in to the PHY */
416 advertising &= phydev->supported;
417
418 /* Verify the settings we care about. */
419 if (autoneg != AUTONEG_ENABLE && autoneg != AUTONEG_DISABLE)
420 return -EINVAL;
421
422 if (autoneg == AUTONEG_ENABLE && advertising == 0)
423 return -EINVAL;
424
425 if (autoneg == AUTONEG_DISABLE &&
426 ((speed != SPEED_1000 &&
427 speed != SPEED_100 &&
428 speed != SPEED_10) ||
429 (duplex != DUPLEX_HALF &&
430 duplex != DUPLEX_FULL)))
431 return -EINVAL;
432
433 phydev->autoneg = autoneg;
434
435 phydev->speed = speed;
436
437 phydev->advertising = advertising;
438
439 if (autoneg == AUTONEG_ENABLE)
440 phydev->advertising |= ADVERTISED_Autoneg;
441 else
442 phydev->advertising &= ~ADVERTISED_Autoneg;
443
444 phydev->duplex = duplex;
445
1004ee61 446 phydev->mdix_ctrl = cmd->base.eth_tp_mdix_ctrl;
2d55173e
PR
447
448 /* Restart the PHY */
449 phy_start_aneg(phydev);
450
451 return 0;
452}
453EXPORT_SYMBOL(phy_ethtool_ksettings_set);
454
00db8189
AF
455int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
456{
457 cmd->supported = phydev->supported;
458
459 cmd->advertising = phydev->advertising;
114002bc 460 cmd->lp_advertising = phydev->lp_advertising;
00db8189 461
70739497 462 ethtool_cmd_speed_set(cmd, phydev->speed);
00db8189 463 cmd->duplex = phydev->duplex;
c88838ce
FF
464 if (phydev->interface == PHY_INTERFACE_MODE_MOCA)
465 cmd->port = PORT_BNC;
466 else
467 cmd->port = PORT_MII;
e5a03bfd 468 cmd->phy_address = phydev->mdio.addr;
4284b6a5
FF
469 cmd->transceiver = phy_is_internal(phydev) ?
470 XCVR_INTERNAL : XCVR_EXTERNAL;
00db8189 471 cmd->autoneg = phydev->autoneg;
1004ee61
RL
472 cmd->eth_tp_mdix_ctrl = phydev->mdix_ctrl;
473 cmd->eth_tp_mdix = phydev->mdix;
00db8189
AF
474
475 return 0;
476}
9f6d55d0 477EXPORT_SYMBOL(phy_ethtool_gset);
2d55173e
PR
478
479int phy_ethtool_ksettings_get(struct phy_device *phydev,
480 struct ethtool_link_ksettings *cmd)
481{
482 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
483 phydev->supported);
484
485 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
486 phydev->advertising);
487
488 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.lp_advertising,
489 phydev->lp_advertising);
490
491 cmd->base.speed = phydev->speed;
492 cmd->base.duplex = phydev->duplex;
493 if (phydev->interface == PHY_INTERFACE_MODE_MOCA)
494 cmd->base.port = PORT_BNC;
495 else
496 cmd->base.port = PORT_MII;
497
498 cmd->base.phy_address = phydev->mdio.addr;
499 cmd->base.autoneg = phydev->autoneg;
1004ee61
RL
500 cmd->base.eth_tp_mdix_ctrl = phydev->mdix_ctrl;
501 cmd->base.eth_tp_mdix = phydev->mdix;
2d55173e
PR
502
503 return 0;
504}
505EXPORT_SYMBOL(phy_ethtool_ksettings_get);
00db8189 506
b3df0da8
RD
507/**
508 * phy_mii_ioctl - generic PHY MII ioctl interface
509 * @phydev: the phy_device struct
00c7d920 510 * @ifr: &struct ifreq for socket ioctl's
b3df0da8
RD
511 * @cmd: ioctl cmd to execute
512 *
513 * Note that this function is currently incompatible with the
00db8189 514 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 515 * current state. Use at own risk.
00db8189 516 */
2f53e904 517int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd)
00db8189 518{
28b04113 519 struct mii_ioctl_data *mii_data = if_mii(ifr);
00db8189 520 u16 val = mii_data->val_in;
79ce0477 521 bool change_autoneg = false;
00db8189
AF
522
523 switch (cmd) {
524 case SIOCGMIIPHY:
e5a03bfd 525 mii_data->phy_id = phydev->mdio.addr;
c6d6a511
LB
526 /* fall through */
527
00db8189 528 case SIOCGMIIREG:
e5a03bfd
AL
529 mii_data->val_out = mdiobus_read(phydev->mdio.bus,
530 mii_data->phy_id,
af1dc13e 531 mii_data->reg_num);
e62a768f 532 return 0;
00db8189
AF
533
534 case SIOCSMIIREG:
e5a03bfd 535 if (mii_data->phy_id == phydev->mdio.addr) {
e109374f 536 switch (mii_data->reg_num) {
00db8189 537 case MII_BMCR:
79ce0477
BH
538 if ((val & (BMCR_RESET | BMCR_ANENABLE)) == 0) {
539 if (phydev->autoneg == AUTONEG_ENABLE)
540 change_autoneg = true;
00db8189 541 phydev->autoneg = AUTONEG_DISABLE;
79ce0477
BH
542 if (val & BMCR_FULLDPLX)
543 phydev->duplex = DUPLEX_FULL;
544 else
545 phydev->duplex = DUPLEX_HALF;
546 if (val & BMCR_SPEED1000)
547 phydev->speed = SPEED_1000;
548 else if (val & BMCR_SPEED100)
549 phydev->speed = SPEED_100;
550 else phydev->speed = SPEED_10;
551 }
552 else {
553 if (phydev->autoneg == AUTONEG_DISABLE)
554 change_autoneg = true;
00db8189 555 phydev->autoneg = AUTONEG_ENABLE;
79ce0477 556 }
00db8189
AF
557 break;
558 case MII_ADVERTISE:
79ce0477
BH
559 phydev->advertising = mii_adv_to_ethtool_adv_t(val);
560 change_autoneg = true;
00db8189
AF
561 break;
562 default:
563 /* do nothing */
564 break;
565 }
566 }
567
e5a03bfd 568 mdiobus_write(phydev->mdio.bus, mii_data->phy_id,
af1dc13e
PK
569 mii_data->reg_num, val);
570
e5a03bfd 571 if (mii_data->phy_id == phydev->mdio.addr &&
cf18b778 572 mii_data->reg_num == MII_BMCR &&
2613f95f 573 val & BMCR_RESET)
e62a768f 574 return phy_init_hw(phydev);
79ce0477
BH
575
576 if (change_autoneg)
577 return phy_start_aneg(phydev);
578
e62a768f 579 return 0;
dda93b48 580
c1f19b51
RC
581 case SIOCSHWTSTAMP:
582 if (phydev->drv->hwtstamp)
583 return phydev->drv->hwtstamp(phydev, ifr);
584 /* fall through */
585
dda93b48 586 default:
c6d6a511 587 return -EOPNOTSUPP;
00db8189 588 }
00db8189 589}
680e9fe9 590EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 591
b3df0da8
RD
592/**
593 * phy_start_aneg - start auto-negotiation for this PHY device
594 * @phydev: the phy_device struct
e1393456 595 *
b3df0da8
RD
596 * Description: Sanitizes the settings (if we're not autonegotiating
597 * them), and then calls the driver's config_aneg function.
598 * If the PHYCONTROL Layer is operating, we change the state to
599 * reflect the beginning of Auto-negotiation or forcing.
e1393456
AF
600 */
601int phy_start_aneg(struct phy_device *phydev)
602{
603 int err;
604
35b5f6b1 605 mutex_lock(&phydev->lock);
e1393456
AF
606
607 if (AUTONEG_DISABLE == phydev->autoneg)
608 phy_sanitize_settings(phydev);
609
9b3320ef
BH
610 /* Invalidate LP advertising flags */
611 phydev->lp_advertising = 0;
612
e1393456 613 err = phydev->drv->config_aneg(phydev);
e1393456
AF
614 if (err < 0)
615 goto out_unlock;
616
617 if (phydev->state != PHY_HALTED) {
618 if (AUTONEG_ENABLE == phydev->autoneg) {
619 phydev->state = PHY_AN;
620 phydev->link_timeout = PHY_AN_TIMEOUT;
621 } else {
622 phydev->state = PHY_FORCING;
623 phydev->link_timeout = PHY_FORCE_TIMEOUT;
624 }
625 }
626
627out_unlock:
35b5f6b1 628 mutex_unlock(&phydev->lock);
e1393456
AF
629 return err;
630}
631EXPORT_SYMBOL(phy_start_aneg);
632
b3df0da8
RD
633/**
634 * phy_start_machine - start PHY state machine tracking
635 * @phydev: the phy_device struct
00db8189 636 *
b3df0da8 637 * Description: The PHY infrastructure can run a state machine
00db8189
AF
638 * which tracks whether the PHY is starting up, negotiating,
639 * etc. This function starts the timer which tracks the state
29935aeb
SS
640 * of the PHY. If you want to maintain your own state machine,
641 * do not call this function.
b3df0da8 642 */
29935aeb 643void phy_start_machine(struct phy_device *phydev)
00db8189 644{
bbb47bde 645 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
00db8189
AF
646}
647
3c293f4e
AL
648/**
649 * phy_trigger_machine - trigger the state machine to run
650 *
651 * @phydev: the phy_device struct
652 *
653 * Description: There has been a change in state which requires that the
654 * state machine runs.
655 */
656
657static void phy_trigger_machine(struct phy_device *phydev)
658{
659 cancel_delayed_work_sync(&phydev->state_queue);
660 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
661}
662
b3df0da8
RD
663/**
664 * phy_stop_machine - stop the PHY state machine tracking
665 * @phydev: target phy_device struct
00db8189 666 *
b3df0da8 667 * Description: Stops the state machine timer, sets the state to UP
817acf5e 668 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
669 * phy_detach.
670 */
671void phy_stop_machine(struct phy_device *phydev)
672{
a390d1f3 673 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 674
35b5f6b1 675 mutex_lock(&phydev->lock);
00db8189
AF
676 if (phydev->state > PHY_UP)
677 phydev->state = PHY_UP;
35b5f6b1 678 mutex_unlock(&phydev->lock);
00db8189
AF
679}
680
b3df0da8
RD
681/**
682 * phy_error - enter HALTED state for this PHY device
683 * @phydev: target phy_device struct
00db8189
AF
684 *
685 * Moves the PHY to the HALTED state in response to a read
686 * or write error, and tells the controller the link is down.
687 * Must not be called from interrupt context, or while the
688 * phydev->lock is held.
689 */
9b9a8bfc 690static void phy_error(struct phy_device *phydev)
00db8189 691{
35b5f6b1 692 mutex_lock(&phydev->lock);
00db8189 693 phydev->state = PHY_HALTED;
35b5f6b1 694 mutex_unlock(&phydev->lock);
3c293f4e
AL
695
696 phy_trigger_machine(phydev);
00db8189
AF
697}
698
b3df0da8
RD
699/**
700 * phy_interrupt - PHY interrupt handler
701 * @irq: interrupt line
702 * @phy_dat: phy_device pointer
e1393456 703 *
b3df0da8 704 * Description: When a PHY interrupt occurs, the handler disables
664fcf12 705 * interrupts, and uses phy_change to handle the interrupt.
e1393456 706 */
7d12e780 707static irqreturn_t phy_interrupt(int irq, void *phy_dat)
e1393456
AF
708{
709 struct phy_device *phydev = phy_dat;
710
3c3070d7
MR
711 if (PHY_HALTED == phydev->state)
712 return IRQ_NONE; /* It can't be ours. */
713
e1393456 714 disable_irq_nosync(irq);
0ac49527 715 atomic_inc(&phydev->irq_disable);
e1393456 716
664fcf12 717 phy_change(phydev);
e1393456
AF
718
719 return IRQ_HANDLED;
720}
721
b3df0da8
RD
722/**
723 * phy_enable_interrupts - Enable the interrupts from the PHY side
724 * @phydev: target phy_device struct
725 */
89ff05ec 726static int phy_enable_interrupts(struct phy_device *phydev)
00db8189 727{
553fe92b 728 int err = phy_clear_interrupt(phydev);
00db8189 729
e1393456
AF
730 if (err < 0)
731 return err;
00db8189 732
553fe92b 733 return phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189 734}
00db8189 735
b3df0da8
RD
736/**
737 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
738 * @phydev: target phy_device struct
739 */
89ff05ec 740static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
741{
742 int err;
743
744 /* Disable PHY interrupts */
745 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
00db8189
AF
746 if (err)
747 goto phy_err;
748
749 /* Clear the interrupt */
750 err = phy_clear_interrupt(phydev);
00db8189
AF
751 if (err)
752 goto phy_err;
753
754 return 0;
755
756phy_err:
757 phy_error(phydev);
758
759 return err;
760}
e1393456 761
b3df0da8
RD
762/**
763 * phy_start_interrupts - request and enable interrupts for a PHY device
764 * @phydev: target phy_device struct
e1393456 765 *
b3df0da8
RD
766 * Description: Request the interrupt for the given PHY.
767 * If this fails, then we set irq to PHY_POLL.
e1393456 768 * Otherwise, we enable the interrupts in the PHY.
e1393456 769 * This should only be called with a valid IRQ number.
b3df0da8 770 * Returns 0 on success or < 0 on error.
e1393456
AF
771 */
772int phy_start_interrupts(struct phy_device *phydev)
773{
0ac49527 774 atomic_set(&phydev->irq_disable, 0);
c974bdbc
AL
775 if (request_threaded_irq(phydev->irq, NULL, phy_interrupt,
776 IRQF_ONESHOT | IRQF_SHARED,
ae0219cb 777 phydev_name(phydev), phydev) < 0) {
8d242488 778 pr_warn("%s: Can't get IRQ %d (PHY)\n",
e5a03bfd 779 phydev->mdio.bus->name, phydev->irq);
e1393456
AF
780 phydev->irq = PHY_POLL;
781 return 0;
782 }
783
e62a768f 784 return phy_enable_interrupts(phydev);
e1393456
AF
785}
786EXPORT_SYMBOL(phy_start_interrupts);
787
b3df0da8
RD
788/**
789 * phy_stop_interrupts - disable interrupts from a PHY device
790 * @phydev: target phy_device struct
791 */
e1393456
AF
792int phy_stop_interrupts(struct phy_device *phydev)
793{
553fe92b 794 int err = phy_disable_interrupts(phydev);
e1393456
AF
795
796 if (err)
797 phy_error(phydev);
798
0ac49527
MR
799 free_irq(phydev->irq, phydev);
800
2f53e904 801 /* If work indeed has been cancelled, disable_irq() will have
0ac49527
MR
802 * been left unbalanced from phy_interrupt() and enable_irq()
803 * has to be called so that other devices on the line work.
804 */
805 while (atomic_dec_return(&phydev->irq_disable) >= 0)
806 enable_irq(phydev->irq);
e1393456
AF
807
808 return err;
809}
810EXPORT_SYMBOL(phy_stop_interrupts);
811
b3df0da8 812/**
664fcf12
AL
813 * phy_change - Called by the phy_interrupt to handle PHY changes
814 * @phydev: phy_device struct that interrupted
b3df0da8 815 */
664fcf12 816void phy_change(struct phy_device *phydev)
e1393456 817{
deccd16f
FF
818 if (phy_interrupt_is_valid(phydev)) {
819 if (phydev->drv->did_interrupt &&
820 !phydev->drv->did_interrupt(phydev))
821 goto ignore;
a8729eb3 822
deccd16f
FF
823 if (phy_disable_interrupts(phydev))
824 goto phy_err;
825 }
e1393456 826
35b5f6b1 827 mutex_lock(&phydev->lock);
e1393456
AF
828 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
829 phydev->state = PHY_CHANGELINK;
35b5f6b1 830 mutex_unlock(&phydev->lock);
e1393456 831
deccd16f
FF
832 if (phy_interrupt_is_valid(phydev)) {
833 atomic_dec(&phydev->irq_disable);
834 enable_irq(phydev->irq);
e1393456 835
deccd16f
FF
836 /* Reenable interrupts */
837 if (PHY_HALTED != phydev->state &&
838 phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED))
839 goto irq_enable_err;
840 }
e1393456 841
a390d1f3 842 /* reschedule state queue work to run as soon as possible */
3c293f4e 843 phy_trigger_machine(phydev);
e1393456
AF
844 return;
845
a8729eb3
AG
846ignore:
847 atomic_dec(&phydev->irq_disable);
848 enable_irq(phydev->irq);
849 return;
850
e1393456
AF
851irq_enable_err:
852 disable_irq(phydev->irq);
0ac49527 853 atomic_inc(&phydev->irq_disable);
e1393456
AF
854phy_err:
855 phy_error(phydev);
856}
857
664fcf12
AL
858/**
859 * phy_change_work - Scheduled by the phy_mac_interrupt to handle PHY changes
860 * @work: work_struct that describes the work to be done
861 */
862void phy_change_work(struct work_struct *work)
863{
864 struct phy_device *phydev =
865 container_of(work, struct phy_device, phy_queue);
866
867 phy_change(phydev);
868}
869
b3df0da8
RD
870/**
871 * phy_stop - Bring down the PHY link, and stop checking the status
872 * @phydev: target phy_device struct
873 */
e1393456
AF
874void phy_stop(struct phy_device *phydev)
875{
35b5f6b1 876 mutex_lock(&phydev->lock);
e1393456
AF
877
878 if (PHY_HALTED == phydev->state)
879 goto out_unlock;
880
2c7b4921 881 if (phy_interrupt_is_valid(phydev)) {
e1393456
AF
882 /* Disable PHY Interrupts */
883 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 884
3c3070d7
MR
885 /* Clear any pending interrupts */
886 phy_clear_interrupt(phydev);
887 }
e1393456 888
6daf6531
MR
889 phydev->state = PHY_HALTED;
890
e1393456 891out_unlock:
35b5f6b1 892 mutex_unlock(&phydev->lock);
3c3070d7 893
2f53e904 894 /* Cannot call flush_scheduled_work() here as desired because
3c3070d7
MR
895 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
896 * will not reenable interrupts.
897 */
e1393456 898}
2f53e904 899EXPORT_SYMBOL(phy_stop);
e1393456 900
b3df0da8
RD
901/**
902 * phy_start - start or restart a PHY device
903 * @phydev: target phy_device struct
e1393456 904 *
b3df0da8 905 * Description: Indicates the attached device's readiness to
e1393456
AF
906 * handle PHY-related work. Used during startup to start the
907 * PHY, and after a call to phy_stop() to resume operation.
908 * Also used to indicate the MDIO bus has cleared an error
909 * condition.
910 */
911void phy_start(struct phy_device *phydev)
912{
c15e10e7
TB
913 bool do_resume = false;
914 int err = 0;
915
35b5f6b1 916 mutex_lock(&phydev->lock);
e1393456
AF
917
918 switch (phydev->state) {
e109374f
FF
919 case PHY_STARTING:
920 phydev->state = PHY_PENDING;
921 break;
922 case PHY_READY:
923 phydev->state = PHY_UP;
924 break;
925 case PHY_HALTED:
c15e10e7 926 /* make sure interrupts are re-enabled for the PHY */
84a527a4
SX
927 if (phydev->irq != PHY_POLL) {
928 err = phy_enable_interrupts(phydev);
929 if (err < 0)
930 break;
931 }
c15e10e7 932
e109374f 933 phydev->state = PHY_RESUMING;
c15e10e7
TB
934 do_resume = true;
935 break;
e109374f
FF
936 default:
937 break;
e1393456 938 }
35b5f6b1 939 mutex_unlock(&phydev->lock);
c15e10e7
TB
940
941 /* if phy was suspended, bring the physical link up again */
942 if (do_resume)
943 phy_resume(phydev);
3c293f4e
AL
944
945 phy_trigger_machine(phydev);
e1393456 946}
e1393456 947EXPORT_SYMBOL(phy_start);
67c4f3fa 948
61a17965
ZB
949static void phy_adjust_link(struct phy_device *phydev)
950{
951 phydev->adjust_link(phydev->attached_dev);
2e0bc452 952 phy_led_trigger_change_speed(phydev);
61a17965
ZB
953}
954
35b5f6b1
NC
955/**
956 * phy_state_machine - Handle the state machine
957 * @work: work_struct that describes the work to be done
35b5f6b1 958 */
4f9c85a1 959void phy_state_machine(struct work_struct *work)
00db8189 960{
bf6aede7 961 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 962 struct phy_device *phydev =
a390d1f3 963 container_of(dwork, struct phy_device, state_queue);
c15e10e7 964 bool needs_aneg = false, do_suspend = false;
3e2186e0 965 enum phy_state old_state;
00db8189 966 int err = 0;
11e122cb 967 int old_link;
00db8189 968
35b5f6b1 969 mutex_lock(&phydev->lock);
00db8189 970
3e2186e0
FF
971 old_state = phydev->state;
972
2b8f2a28
DM
973 if (phydev->drv->link_change_notify)
974 phydev->drv->link_change_notify(phydev);
975
e109374f
FF
976 switch (phydev->state) {
977 case PHY_DOWN:
978 case PHY_STARTING:
979 case PHY_READY:
980 case PHY_PENDING:
981 break;
982 case PHY_UP:
6e14a5ee 983 needs_aneg = true;
00db8189 984
e109374f
FF
985 phydev->link_timeout = PHY_AN_TIMEOUT;
986
987 break;
988 case PHY_AN:
989 err = phy_read_status(phydev);
e109374f 990 if (err < 0)
00db8189 991 break;
6b655529 992
2f53e904 993 /* If the link is down, give up on negotiation for now */
e109374f
FF
994 if (!phydev->link) {
995 phydev->state = PHY_NOLINK;
996 netif_carrier_off(phydev->attached_dev);
61a17965 997 phy_adjust_link(phydev);
e109374f
FF
998 break;
999 }
6b655529 1000
2f53e904 1001 /* Check if negotiation is done. Break if there's an error */
e109374f
FF
1002 err = phy_aneg_done(phydev);
1003 if (err < 0)
1004 break;
6b655529 1005
e109374f
FF
1006 /* If AN is done, we're running */
1007 if (err > 0) {
1008 phydev->state = PHY_RUNNING;
1009 netif_carrier_on(phydev->attached_dev);
61a17965 1010 phy_adjust_link(phydev);
00db8189 1011
fa8cddaf 1012 } else if (0 == phydev->link_timeout--)
6e14a5ee 1013 needs_aneg = true;
e109374f
FF
1014 break;
1015 case PHY_NOLINK:
321beec5
AL
1016 if (phy_interrupt_is_valid(phydev))
1017 break;
1018
e109374f 1019 err = phy_read_status(phydev);
e109374f 1020 if (err)
00db8189 1021 break;
00db8189 1022
e109374f 1023 if (phydev->link) {
e46e08b8
BK
1024 if (AUTONEG_ENABLE == phydev->autoneg) {
1025 err = phy_aneg_done(phydev);
1026 if (err < 0)
1027 break;
1028
1029 if (!err) {
1030 phydev->state = PHY_AN;
1031 phydev->link_timeout = PHY_AN_TIMEOUT;
1032 break;
1033 }
1034 }
e109374f
FF
1035 phydev->state = PHY_RUNNING;
1036 netif_carrier_on(phydev->attached_dev);
61a17965 1037 phy_adjust_link(phydev);
e109374f
FF
1038 }
1039 break;
1040 case PHY_FORCING:
1041 err = genphy_update_link(phydev);
e109374f 1042 if (err)
00db8189 1043 break;
00db8189 1044
e109374f
FF
1045 if (phydev->link) {
1046 phydev->state = PHY_RUNNING;
1047 netif_carrier_on(phydev->attached_dev);
1048 } else {
1049 if (0 == phydev->link_timeout--)
6e14a5ee 1050 needs_aneg = true;
e109374f 1051 }
00db8189 1052
61a17965 1053 phy_adjust_link(phydev);
e109374f
FF
1054 break;
1055 case PHY_RUNNING:
d5c3d846
FF
1056 /* Only register a CHANGE if we are polling and link changed
1057 * since latest checking.
e109374f 1058 */
d5c3d846 1059 if (phydev->irq == PHY_POLL) {
11e122cb
SX
1060 old_link = phydev->link;
1061 err = phy_read_status(phydev);
1062 if (err)
1063 break;
1064
1065 if (old_link != phydev->link)
1066 phydev->state = PHY_CHANGELINK;
1067 }
e109374f
FF
1068 break;
1069 case PHY_CHANGELINK:
1070 err = phy_read_status(phydev);
e109374f 1071 if (err)
00db8189 1072 break;
00db8189 1073
e109374f
FF
1074 if (phydev->link) {
1075 phydev->state = PHY_RUNNING;
1076 netif_carrier_on(phydev->attached_dev);
1077 } else {
1078 phydev->state = PHY_NOLINK;
1079 netif_carrier_off(phydev->attached_dev);
1080 }
00db8189 1081
61a17965 1082 phy_adjust_link(phydev);
00db8189 1083
e109374f
FF
1084 if (phy_interrupt_is_valid(phydev))
1085 err = phy_config_interrupt(phydev,
2f53e904 1086 PHY_INTERRUPT_ENABLED);
e109374f
FF
1087 break;
1088 case PHY_HALTED:
1089 if (phydev->link) {
1090 phydev->link = 0;
1091 netif_carrier_off(phydev->attached_dev);
61a17965 1092 phy_adjust_link(phydev);
6e14a5ee 1093 do_suspend = true;
e109374f
FF
1094 }
1095 break;
1096 case PHY_RESUMING:
e109374f
FF
1097 if (AUTONEG_ENABLE == phydev->autoneg) {
1098 err = phy_aneg_done(phydev);
1099 if (err < 0)
00db8189
AF
1100 break;
1101
e109374f 1102 /* err > 0 if AN is done.
2f53e904
SS
1103 * Otherwise, it's 0, and we're still waiting for AN
1104 */
e109374f 1105 if (err > 0) {
42caa074
WF
1106 err = phy_read_status(phydev);
1107 if (err)
1108 break;
1109
1110 if (phydev->link) {
1111 phydev->state = PHY_RUNNING;
1112 netif_carrier_on(phydev->attached_dev);
2f53e904 1113 } else {
42caa074 1114 phydev->state = PHY_NOLINK;
2f53e904 1115 }
61a17965 1116 phy_adjust_link(phydev);
e109374f
FF
1117 } else {
1118 phydev->state = PHY_AN;
1119 phydev->link_timeout = PHY_AN_TIMEOUT;
42caa074 1120 }
e109374f
FF
1121 } else {
1122 err = phy_read_status(phydev);
1123 if (err)
1124 break;
1125
1126 if (phydev->link) {
1127 phydev->state = PHY_RUNNING;
1128 netif_carrier_on(phydev->attached_dev);
2f53e904 1129 } else {
e109374f 1130 phydev->state = PHY_NOLINK;
2f53e904 1131 }
61a17965 1132 phy_adjust_link(phydev);
e109374f
FF
1133 }
1134 break;
00db8189
AF
1135 }
1136
35b5f6b1 1137 mutex_unlock(&phydev->lock);
00db8189
AF
1138
1139 if (needs_aneg)
1140 err = phy_start_aneg(phydev);
6e14a5ee 1141 else if (do_suspend)
be9dad1f
SH
1142 phy_suspend(phydev);
1143
00db8189
AF
1144 if (err < 0)
1145 phy_error(phydev);
1146
72ba48be
AL
1147 phydev_dbg(phydev, "PHY state change %s -> %s\n",
1148 phy_state_to_str(old_state),
1149 phy_state_to_str(phydev->state));
3e2186e0 1150
d5c3d846
FF
1151 /* Only re-schedule a PHY state machine change if we are polling the
1152 * PHY, if PHY_IGNORE_INTERRUPT is set, then we will be moving
1153 * between states from phy_mac_interrupt()
1154 */
1155 if (phydev->irq == PHY_POLL)
1156 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
1157 PHY_STATE_TIME * HZ);
35b5f6b1 1158}
a59a4d19 1159
664fcf12
AL
1160/**
1161 * phy_mac_interrupt - MAC says the link has changed
1162 * @phydev: phy_device struct with changed link
1163 * @new_link: Link is Up/Down.
1164 *
1165 * Description: The MAC layer is able indicate there has been a change
1166 * in the PHY link status. Set the new link status, and trigger the
1167 * state machine, work a work queue.
1168 */
5ea94e76
FF
1169void phy_mac_interrupt(struct phy_device *phydev, int new_link)
1170{
5ea94e76 1171 phydev->link = new_link;
deccd16f
FF
1172
1173 /* Trigger a state machine change */
1174 queue_work(system_power_efficient_wq, &phydev->phy_queue);
5ea94e76
FF
1175}
1176EXPORT_SYMBOL(phy_mac_interrupt);
1177
a59a4d19
GC
1178static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
1179 int addr)
1180{
1181 /* Write the desired MMD Devad */
1182 bus->write(bus, addr, MII_MMD_CTRL, devad);
1183
1184 /* Write the desired MMD register address */
1185 bus->write(bus, addr, MII_MMD_DATA, prtad);
1186
1187 /* Select the Function : DATA with no post increment */
1188 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
1189}
1190
1191/**
1192 * phy_read_mmd_indirect - reads data from the MMD registers
0c1d77df 1193 * @phydev: The PHY device bus
a59a4d19
GC
1194 * @prtad: MMD Address
1195 * @devad: MMD DEVAD
a59a4d19
GC
1196 *
1197 * Description: it reads data from the MMD registers (clause 22 to access to
1198 * clause 45) of the specified phy address.
1199 * To read these register we have:
1200 * 1) Write reg 13 // DEVAD
1201 * 2) Write reg 14 // MMD Address
1202 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
1203 * 3) Read reg 14 // Read MMD data
1204 */
053e7e16 1205int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad)
a59a4d19 1206{
0c1d77df 1207 struct phy_driver *phydrv = phydev->drv;
e5a03bfd 1208 int addr = phydev->mdio.addr;
0c1d77df 1209 int value = -1;
a59a4d19 1210
ef899c07 1211 if (!phydrv->read_mmd_indirect) {
e5a03bfd 1212 struct mii_bus *bus = phydev->mdio.bus;
05a7f582
RK
1213
1214 mutex_lock(&bus->mdio_lock);
1215 mmd_phy_indirect(bus, prtad, devad, addr);
0c1d77df
VB
1216
1217 /* Read the content of the MMD's selected register */
05a7f582
RK
1218 value = bus->read(bus, addr, MII_MMD_DATA);
1219 mutex_unlock(&bus->mdio_lock);
0c1d77df
VB
1220 } else {
1221 value = phydrv->read_mmd_indirect(phydev, prtad, devad, addr);
1222 }
1223 return value;
a59a4d19 1224}
66ce7fb9 1225EXPORT_SYMBOL(phy_read_mmd_indirect);
a59a4d19
GC
1226
1227/**
1228 * phy_write_mmd_indirect - writes data to the MMD registers
0c1d77df 1229 * @phydev: The PHY device
a59a4d19
GC
1230 * @prtad: MMD Address
1231 * @devad: MMD DEVAD
a59a4d19
GC
1232 * @data: data to write in the MMD register
1233 *
1234 * Description: Write data from the MMD registers of the specified
1235 * phy address.
1236 * To write these register we have:
1237 * 1) Write reg 13 // DEVAD
1238 * 2) Write reg 14 // MMD Address
1239 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
1240 * 3) Write reg 14 // Write MMD data
1241 */
66ce7fb9 1242void phy_write_mmd_indirect(struct phy_device *phydev, int prtad,
053e7e16 1243 int devad, u32 data)
a59a4d19 1244{
0c1d77df 1245 struct phy_driver *phydrv = phydev->drv;
e5a03bfd 1246 int addr = phydev->mdio.addr;
a59a4d19 1247
ef899c07 1248 if (!phydrv->write_mmd_indirect) {
e5a03bfd 1249 struct mii_bus *bus = phydev->mdio.bus;
05a7f582
RK
1250
1251 mutex_lock(&bus->mdio_lock);
1252 mmd_phy_indirect(bus, prtad, devad, addr);
0c1d77df
VB
1253
1254 /* Write the data into MMD's selected register */
05a7f582
RK
1255 bus->write(bus, addr, MII_MMD_DATA, data);
1256 mutex_unlock(&bus->mdio_lock);
0c1d77df
VB
1257 } else {
1258 phydrv->write_mmd_indirect(phydev, prtad, devad, addr, data);
1259 }
a59a4d19 1260}
66ce7fb9 1261EXPORT_SYMBOL(phy_write_mmd_indirect);
a59a4d19 1262
a59a4d19
GC
1263/**
1264 * phy_init_eee - init and check the EEE feature
1265 * @phydev: target phy_device struct
1266 * @clk_stop_enable: PHY may stop the clock during LPI
1267 *
1268 * Description: it checks if the Energy-Efficient Ethernet (EEE)
1269 * is supported by looking at the MMD registers 3.20 and 7.60/61
1270 * and it programs the MMD register 3.0 setting the "Clock stop enable"
1271 * bit if required.
1272 */
1273int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
1274{
a59a4d19
GC
1275 /* According to 802.3az,the EEE is supported only in full duplex-mode.
1276 * Also EEE feature is active when core is operating with MII, GMII
7e140696
FF
1277 * or RGMII (all kinds). Internal PHYs are also allowed to proceed and
1278 * should return an error if they do not support EEE.
a59a4d19
GC
1279 */
1280 if ((phydev->duplex == DUPLEX_FULL) &&
1281 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
1282 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
32a64161 1283 phy_interface_is_rgmii(phydev) ||
a9f63095 1284 phy_is_internal(phydev))) {
a59a4d19
GC
1285 int eee_lp, eee_cap, eee_adv;
1286 u32 lp, cap, adv;
4ae6e50c 1287 int status;
a59a4d19
GC
1288
1289 /* Read phy status to properly get the right settings */
1290 status = phy_read_status(phydev);
1291 if (status)
1292 return status;
1293
1294 /* First check if the EEE ability is supported */
0c1d77df 1295 eee_cap = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE,
053e7e16 1296 MDIO_MMD_PCS);
7a4cecf7
GC
1297 if (eee_cap <= 0)
1298 goto eee_exit_err;
a59a4d19 1299
b32607dd 1300 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19 1301 if (!cap)
7a4cecf7 1302 goto eee_exit_err;
a59a4d19
GC
1303
1304 /* Check which link settings negotiated and verify it in
1305 * the EEE advertising registers.
1306 */
0c1d77df 1307 eee_lp = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE,
053e7e16 1308 MDIO_MMD_AN);
7a4cecf7
GC
1309 if (eee_lp <= 0)
1310 goto eee_exit_err;
a59a4d19 1311
0c1d77df 1312 eee_adv = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV,
053e7e16 1313 MDIO_MMD_AN);
7a4cecf7
GC
1314 if (eee_adv <= 0)
1315 goto eee_exit_err;
a59a4d19 1316
b32607dd
AB
1317 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
1318 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
54da5a8b 1319 if (!phy_check_valid(phydev->speed, phydev->duplex, lp & adv))
7a4cecf7 1320 goto eee_exit_err;
a59a4d19
GC
1321
1322 if (clk_stop_enable) {
1323 /* Configure the PHY to stop receiving xMII
1324 * clock while it is signaling LPI.
1325 */
0c1d77df 1326 int val = phy_read_mmd_indirect(phydev, MDIO_CTRL1,
053e7e16 1327 MDIO_MMD_PCS);
a59a4d19
GC
1328 if (val < 0)
1329 return val;
1330
1331 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
0c1d77df 1332 phy_write_mmd_indirect(phydev, MDIO_CTRL1,
053e7e16 1333 MDIO_MMD_PCS, val);
a59a4d19
GC
1334 }
1335
e62a768f 1336 return 0; /* EEE supported */
a59a4d19 1337 }
7a4cecf7 1338eee_exit_err:
e62a768f 1339 return -EPROTONOSUPPORT;
a59a4d19
GC
1340}
1341EXPORT_SYMBOL(phy_init_eee);
1342
1343/**
1344 * phy_get_eee_err - report the EEE wake error count
1345 * @phydev: target phy_device struct
1346 *
1347 * Description: it is to report the number of time where the PHY
1348 * failed to complete its normal wake sequence.
1349 */
1350int phy_get_eee_err(struct phy_device *phydev)
1351{
053e7e16 1352 return phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_WK_ERR, MDIO_MMD_PCS);
a59a4d19
GC
1353}
1354EXPORT_SYMBOL(phy_get_eee_err);
1355
1356/**
1357 * phy_ethtool_get_eee - get EEE supported and status
1358 * @phydev: target phy_device struct
1359 * @data: ethtool_eee data
1360 *
1361 * Description: it reportes the Supported/Advertisement/LP Advertisement
1362 * capabilities.
1363 */
1364int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1365{
1366 int val;
1367
1368 /* Get Supported EEE */
053e7e16 1369 val = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE, MDIO_MMD_PCS);
a59a4d19
GC
1370 if (val < 0)
1371 return val;
b32607dd 1372 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
a59a4d19
GC
1373
1374 /* Get advertisement EEE */
053e7e16 1375 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN);
a59a4d19
GC
1376 if (val < 0)
1377 return val;
b32607dd 1378 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1379
1380 /* Get LP advertisement EEE */
053e7e16 1381 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE, MDIO_MMD_AN);
a59a4d19
GC
1382 if (val < 0)
1383 return val;
b32607dd 1384 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1385
1386 return 0;
1387}
1388EXPORT_SYMBOL(phy_ethtool_get_eee);
1389
1390/**
1391 * phy_ethtool_set_eee - set EEE supported and status
1392 * @phydev: target phy_device struct
1393 * @data: ethtool_eee data
1394 *
1395 * Description: it is to program the Advertisement EEE register.
1396 */
1397int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1398{
553fe92b 1399 int val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19 1400
d853d145 1401 /* Mask prohibited EEE modes */
1402 val &= ~phydev->eee_broken_modes;
1403
053e7e16 1404 phy_write_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN, val);
a59a4d19
GC
1405
1406 return 0;
1407}
1408EXPORT_SYMBOL(phy_ethtool_set_eee);
42e836eb
MS
1409
1410int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1411{
1412 if (phydev->drv->set_wol)
1413 return phydev->drv->set_wol(phydev, wol);
1414
1415 return -EOPNOTSUPP;
1416}
1417EXPORT_SYMBOL(phy_ethtool_set_wol);
1418
1419void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1420{
1421 if (phydev->drv->get_wol)
1422 phydev->drv->get_wol(phydev, wol);
1423}
1424EXPORT_SYMBOL(phy_ethtool_get_wol);
9d9a77ce
PR
1425
1426int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1427 struct ethtool_link_ksettings *cmd)
1428{
1429 struct phy_device *phydev = ndev->phydev;
1430
1431 if (!phydev)
1432 return -ENODEV;
1433
1434 return phy_ethtool_ksettings_get(phydev, cmd);
1435}
1436EXPORT_SYMBOL(phy_ethtool_get_link_ksettings);
1437
1438int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1439 const struct ethtool_link_ksettings *cmd)
1440{
1441 struct phy_device *phydev = ndev->phydev;
1442
1443 if (!phydev)
1444 return -ENODEV;
1445
1446 return phy_ethtool_ksettings_set(phydev, cmd);
1447}
1448EXPORT_SYMBOL(phy_ethtool_set_link_ksettings);
e86a8987
FF
1449
1450int phy_ethtool_nway_reset(struct net_device *ndev)
1451{
1452 struct phy_device *phydev = ndev->phydev;
1453
1454 if (!phydev)
1455 return -ENODEV;
1456
1457 return genphy_restart_aneg(phydev);
1458}
1459EXPORT_SYMBOL(phy_ethtool_nway_reset);