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2f53e904 1/* Framework for configuring and reading PHY devices
00db8189
AF
2 * Based on code in sungem_phy.c and gianfar_phy.c
3 *
4 * Author: Andy Fleming
5 *
6 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 7 * Copyright (c) 2006, 2007 Maciej W. Rozycki
00db8189
AF
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
8d242488
JP
15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
00db8189 18#include <linux/kernel.h>
00db8189
AF
19#include <linux/string.h>
20#include <linux/errno.h>
21#include <linux/unistd.h>
00db8189 22#include <linux/interrupt.h>
00db8189
AF
23#include <linux/delay.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/skbuff.h>
00db8189
AF
27#include <linux/mm.h>
28#include <linux/module.h>
00db8189
AF
29#include <linux/mii.h>
30#include <linux/ethtool.h>
31#include <linux/phy.h>
3c3070d7
MR
32#include <linux/timer.h>
33#include <linux/workqueue.h>
a59a4d19 34#include <linux/mdio.h>
2f53e904
SS
35#include <linux/io.h>
36#include <linux/uaccess.h>
60063497 37#include <linux/atomic.h>
2f53e904 38
00db8189 39#include <asm/irq.h>
00db8189 40
766d1d38
FF
41static const char *phy_speed_to_str(int speed)
42{
43 switch (speed) {
44 case SPEED_10:
45 return "10Mbps";
46 case SPEED_100:
47 return "100Mbps";
48 case SPEED_1000:
49 return "1Gbps";
50 case SPEED_2500:
51 return "2.5Gbps";
52 case SPEED_10000:
53 return "10Gbps";
54 case SPEED_UNKNOWN:
55 return "Unknown";
56 default:
57 return "Unsupported (update phy.c)";
58 }
59}
60
3e2186e0
FF
61#define PHY_STATE_STR(_state) \
62 case PHY_##_state: \
63 return __stringify(_state); \
64
65static const char *phy_state_to_str(enum phy_state st)
66{
67 switch (st) {
68 PHY_STATE_STR(DOWN)
69 PHY_STATE_STR(STARTING)
70 PHY_STATE_STR(READY)
71 PHY_STATE_STR(PENDING)
72 PHY_STATE_STR(UP)
73 PHY_STATE_STR(AN)
74 PHY_STATE_STR(RUNNING)
75 PHY_STATE_STR(NOLINK)
76 PHY_STATE_STR(FORCING)
77 PHY_STATE_STR(CHANGELINK)
78 PHY_STATE_STR(HALTED)
79 PHY_STATE_STR(RESUMING)
80 }
81
82 return NULL;
83}
84
85
b3df0da8
RD
86/**
87 * phy_print_status - Convenience function to print out the current phy status
88 * @phydev: the phy_device struct
e1393456
AF
89 */
90void phy_print_status(struct phy_device *phydev)
91{
2f53e904 92 if (phydev->link) {
df40cc88 93 netdev_info(phydev->attached_dev,
766d1d38
FF
94 "Link is Up - %s/%s - flow control %s\n",
95 phy_speed_to_str(phydev->speed),
df40cc88
FF
96 DUPLEX_FULL == phydev->duplex ? "Full" : "Half",
97 phydev->pause ? "rx/tx" : "off");
2f53e904 98 } else {
43b6329f 99 netdev_info(phydev->attached_dev, "Link is Down\n");
2f53e904 100 }
e1393456
AF
101}
102EXPORT_SYMBOL(phy_print_status);
00db8189 103
b3df0da8
RD
104/**
105 * phy_clear_interrupt - Ack the phy device's interrupt
106 * @phydev: the phy_device struct
107 *
108 * If the @phydev driver has an ack_interrupt function, call it to
109 * ack and clear the phy device's interrupt.
110 *
ad033506 111 * Returns 0 on success or < 0 on error.
b3df0da8 112 */
89ff05ec 113static int phy_clear_interrupt(struct phy_device *phydev)
00db8189 114{
00db8189 115 if (phydev->drv->ack_interrupt)
e62a768f 116 return phydev->drv->ack_interrupt(phydev);
00db8189 117
e62a768f 118 return 0;
00db8189
AF
119}
120
b3df0da8
RD
121/**
122 * phy_config_interrupt - configure the PHY device for the requested interrupts
123 * @phydev: the phy_device struct
124 * @interrupts: interrupt flags to configure for this @phydev
125 *
ad033506 126 * Returns 0 on success or < 0 on error.
b3df0da8 127 */
89ff05ec 128static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
00db8189 129{
00db8189
AF
130 phydev->interrupts = interrupts;
131 if (phydev->drv->config_intr)
e62a768f 132 return phydev->drv->config_intr(phydev);
00db8189 133
e62a768f 134 return 0;
00db8189
AF
135}
136
137
b3df0da8
RD
138/**
139 * phy_aneg_done - return auto-negotiation status
140 * @phydev: target phy_device struct
00db8189 141 *
76a423a3
FF
142 * Description: Return the auto-negotiation status from this @phydev
143 * Returns > 0 on success or < 0 on error. 0 means that auto-negotiation
144 * is still pending.
00db8189 145 */
372788f9 146int phy_aneg_done(struct phy_device *phydev)
00db8189 147{
76a423a3
FF
148 if (phydev->drv->aneg_done)
149 return phydev->drv->aneg_done(phydev);
150
a9fa6e6a 151 return genphy_aneg_done(phydev);
00db8189 152}
372788f9 153EXPORT_SYMBOL(phy_aneg_done);
00db8189 154
00db8189 155/* A structure for mapping a particular speed and duplex
2f53e904
SS
156 * combination to a particular SUPPORTED and ADVERTISED value
157 */
00db8189
AF
158struct phy_setting {
159 int speed;
160 int duplex;
161 u32 setting;
162};
163
164/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 165static const struct phy_setting settings[] = {
00db8189 166 {
3e707706
LT
167 .speed = SPEED_10000,
168 .duplex = DUPLEX_FULL,
169 .setting = SUPPORTED_10000baseKR_Full,
170 },
171 {
172 .speed = SPEED_10000,
173 .duplex = DUPLEX_FULL,
174 .setting = SUPPORTED_10000baseKX4_Full,
175 },
176 {
177 .speed = SPEED_10000,
00db8189
AF
178 .duplex = DUPLEX_FULL,
179 .setting = SUPPORTED_10000baseT_Full,
180 },
3e707706
LT
181 {
182 .speed = SPEED_2500,
183 .duplex = DUPLEX_FULL,
184 .setting = SUPPORTED_2500baseX_Full,
185 },
186 {
187 .speed = SPEED_1000,
188 .duplex = DUPLEX_FULL,
189 .setting = SUPPORTED_1000baseKX_Full,
190 },
00db8189
AF
191 {
192 .speed = SPEED_1000,
193 .duplex = DUPLEX_FULL,
194 .setting = SUPPORTED_1000baseT_Full,
195 },
196 {
197 .speed = SPEED_1000,
198 .duplex = DUPLEX_HALF,
199 .setting = SUPPORTED_1000baseT_Half,
200 },
201 {
202 .speed = SPEED_100,
203 .duplex = DUPLEX_FULL,
204 .setting = SUPPORTED_100baseT_Full,
205 },
206 {
207 .speed = SPEED_100,
208 .duplex = DUPLEX_HALF,
209 .setting = SUPPORTED_100baseT_Half,
210 },
211 {
212 .speed = SPEED_10,
213 .duplex = DUPLEX_FULL,
214 .setting = SUPPORTED_10baseT_Full,
215 },
216 {
217 .speed = SPEED_10,
218 .duplex = DUPLEX_HALF,
219 .setting = SUPPORTED_10baseT_Half,
220 },
221};
222
ff8ac609 223#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 224
b3df0da8
RD
225/**
226 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
227 * @speed: speed to match
228 * @duplex: duplex to match
00db8189 229 *
b3df0da8 230 * Description: Searches the settings array for the setting which
00db8189
AF
231 * matches the desired speed and duplex, and returns the index
232 * of that setting. Returns the index of the last setting if
233 * none of the others match.
234 */
4ae6e50c 235static inline unsigned int phy_find_setting(int speed, int duplex)
00db8189 236{
4ae6e50c 237 unsigned int idx = 0;
00db8189
AF
238
239 while (idx < ARRAY_SIZE(settings) &&
2f53e904 240 (settings[idx].speed != speed || settings[idx].duplex != duplex))
00db8189
AF
241 idx++;
242
243 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
244}
245
b3df0da8
RD
246/**
247 * phy_find_valid - find a PHY setting that matches the requested features mask
248 * @idx: The first index in settings[] to search
249 * @features: A mask of the valid settings
00db8189 250 *
b3df0da8 251 * Description: Returns the index of the first valid setting less
00db8189
AF
252 * than or equal to the one pointed to by idx, as determined by
253 * the mask in features. Returns the index of the last setting
254 * if nothing else matches.
255 */
4ae6e50c 256static inline unsigned int phy_find_valid(unsigned int idx, u32 features)
00db8189
AF
257{
258 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
259 idx++;
260
261 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
262}
263
1f9127ca
ZB
264/**
265 * phy_supported_speeds - return all speeds currently supported by a phy device
266 * @phy: The phy device to return supported speeds of.
267 * @speeds: buffer to store supported speeds in.
268 * @size: size of speeds buffer.
269 *
270 * Description: Returns the number of supported speeds, and fills the speeds
271 * buffer with the supported speeds. If speeds buffer is too small to contain
272 * all currently supported speeds, will return as many speeds as can fit.
273 */
274unsigned int phy_supported_speeds(struct phy_device *phy,
275 unsigned int *speeds,
276 unsigned int size)
277{
278 unsigned int count = 0;
279 unsigned int idx = 0;
280
281 while (idx < MAX_NUM_SETTINGS && count < size) {
282 idx = phy_find_valid(idx, phy->supported);
283
284 if (!(settings[idx].setting & phy->supported))
285 break;
286
287 /* Assumes settings are grouped by speed */
288 if ((count == 0) ||
289 (speeds[count - 1] != settings[idx].speed)) {
290 speeds[count] = settings[idx].speed;
291 count++;
292 }
293 idx++;
294 }
295
296 return count;
297}
298
54da5a8b
GR
299/**
300 * phy_check_valid - check if there is a valid PHY setting which matches
301 * speed, duplex, and feature mask
302 * @speed: speed to match
303 * @duplex: duplex to match
304 * @features: A mask of the valid settings
305 *
306 * Description: Returns true if there is a valid setting, false otherwise.
307 */
308static inline bool phy_check_valid(int speed, int duplex, u32 features)
309{
310 unsigned int idx;
311
312 idx = phy_find_valid(phy_find_setting(speed, duplex), features);
313
314 return settings[idx].speed == speed && settings[idx].duplex == duplex &&
315 (settings[idx].setting & features);
316}
317
b3df0da8
RD
318/**
319 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
320 * @phydev: the target phy_device struct
00db8189 321 *
b3df0da8 322 * Description: Make sure the PHY is set to supported speeds and
00db8189 323 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 324 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 325 */
89ff05ec 326static void phy_sanitize_settings(struct phy_device *phydev)
00db8189
AF
327{
328 u32 features = phydev->supported;
4ae6e50c 329 unsigned int idx;
00db8189
AF
330
331 /* Sanitize settings based on PHY capabilities */
332 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 333 phydev->autoneg = AUTONEG_DISABLE;
00db8189
AF
334
335 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
336 features);
337
338 phydev->speed = settings[idx].speed;
339 phydev->duplex = settings[idx].duplex;
340}
00db8189 341
b3df0da8
RD
342/**
343 * phy_ethtool_sset - generic ethtool sset function, handles all the details
344 * @phydev: target phy_device struct
345 * @cmd: ethtool_cmd
00db8189
AF
346 *
347 * A few notes about parameter checking:
348 * - We don't set port or transceiver, so we don't care what they
349 * were set to.
350 * - phy_start_aneg() will make sure forced settings are sane, and
351 * choose the next best ones from the ones selected, so we don't
b3df0da8 352 * care if ethtool tries to give us bad values.
00db8189
AF
353 */
354int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
355{
25db0338
DD
356 u32 speed = ethtool_cmd_speed(cmd);
357
e5a03bfd 358 if (cmd->phy_address != phydev->mdio.addr)
00db8189
AF
359 return -EINVAL;
360
2f53e904 361 /* We make sure that we don't pass unsupported values in to the PHY */
00db8189
AF
362 cmd->advertising &= phydev->supported;
363
364 /* Verify the settings we care about. */
365 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
366 return -EINVAL;
367
368 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
369 return -EINVAL;
370
8e95a202 371 if (cmd->autoneg == AUTONEG_DISABLE &&
25db0338
DD
372 ((speed != SPEED_1000 &&
373 speed != SPEED_100 &&
374 speed != SPEED_10) ||
8e95a202
JP
375 (cmd->duplex != DUPLEX_HALF &&
376 cmd->duplex != DUPLEX_FULL)))
00db8189
AF
377 return -EINVAL;
378
379 phydev->autoneg = cmd->autoneg;
380
25db0338 381 phydev->speed = speed;
00db8189
AF
382
383 phydev->advertising = cmd->advertising;
384
385 if (AUTONEG_ENABLE == cmd->autoneg)
386 phydev->advertising |= ADVERTISED_Autoneg;
387 else
388 phydev->advertising &= ~ADVERTISED_Autoneg;
389
390 phydev->duplex = cmd->duplex;
391
634ec36c
DT
392 phydev->mdix = cmd->eth_tp_mdix_ctrl;
393
00db8189
AF
394 /* Restart the PHY */
395 phy_start_aneg(phydev);
396
397 return 0;
398}
9f6d55d0 399EXPORT_SYMBOL(phy_ethtool_sset);
00db8189 400
2d55173e
PR
401int phy_ethtool_ksettings_set(struct phy_device *phydev,
402 const struct ethtool_link_ksettings *cmd)
403{
404 u8 autoneg = cmd->base.autoneg;
405 u8 duplex = cmd->base.duplex;
406 u32 speed = cmd->base.speed;
407 u32 advertising;
408
409 if (cmd->base.phy_address != phydev->mdio.addr)
410 return -EINVAL;
411
412 ethtool_convert_link_mode_to_legacy_u32(&advertising,
413 cmd->link_modes.advertising);
414
415 /* We make sure that we don't pass unsupported values in to the PHY */
416 advertising &= phydev->supported;
417
418 /* Verify the settings we care about. */
419 if (autoneg != AUTONEG_ENABLE && autoneg != AUTONEG_DISABLE)
420 return -EINVAL;
421
422 if (autoneg == AUTONEG_ENABLE && advertising == 0)
423 return -EINVAL;
424
425 if (autoneg == AUTONEG_DISABLE &&
426 ((speed != SPEED_1000 &&
427 speed != SPEED_100 &&
428 speed != SPEED_10) ||
429 (duplex != DUPLEX_HALF &&
430 duplex != DUPLEX_FULL)))
431 return -EINVAL;
432
433 phydev->autoneg = autoneg;
434
435 phydev->speed = speed;
436
437 phydev->advertising = advertising;
438
439 if (autoneg == AUTONEG_ENABLE)
440 phydev->advertising |= ADVERTISED_Autoneg;
441 else
442 phydev->advertising &= ~ADVERTISED_Autoneg;
443
444 phydev->duplex = duplex;
445
446 phydev->mdix = cmd->base.eth_tp_mdix_ctrl;
447
448 /* Restart the PHY */
449 phy_start_aneg(phydev);
450
451 return 0;
452}
453EXPORT_SYMBOL(phy_ethtool_ksettings_set);
454
00db8189
AF
455int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
456{
457 cmd->supported = phydev->supported;
458
459 cmd->advertising = phydev->advertising;
114002bc 460 cmd->lp_advertising = phydev->lp_advertising;
00db8189 461
70739497 462 ethtool_cmd_speed_set(cmd, phydev->speed);
00db8189 463 cmd->duplex = phydev->duplex;
c88838ce
FF
464 if (phydev->interface == PHY_INTERFACE_MODE_MOCA)
465 cmd->port = PORT_BNC;
466 else
467 cmd->port = PORT_MII;
e5a03bfd 468 cmd->phy_address = phydev->mdio.addr;
4284b6a5
FF
469 cmd->transceiver = phy_is_internal(phydev) ?
470 XCVR_INTERNAL : XCVR_EXTERNAL;
00db8189 471 cmd->autoneg = phydev->autoneg;
239aa55b 472 cmd->eth_tp_mdix_ctrl = phydev->mdix;
00db8189
AF
473
474 return 0;
475}
9f6d55d0 476EXPORT_SYMBOL(phy_ethtool_gset);
2d55173e
PR
477
478int phy_ethtool_ksettings_get(struct phy_device *phydev,
479 struct ethtool_link_ksettings *cmd)
480{
481 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
482 phydev->supported);
483
484 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
485 phydev->advertising);
486
487 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.lp_advertising,
488 phydev->lp_advertising);
489
490 cmd->base.speed = phydev->speed;
491 cmd->base.duplex = phydev->duplex;
492 if (phydev->interface == PHY_INTERFACE_MODE_MOCA)
493 cmd->base.port = PORT_BNC;
494 else
495 cmd->base.port = PORT_MII;
496
497 cmd->base.phy_address = phydev->mdio.addr;
498 cmd->base.autoneg = phydev->autoneg;
499 cmd->base.eth_tp_mdix_ctrl = phydev->mdix;
500
501 return 0;
502}
503EXPORT_SYMBOL(phy_ethtool_ksettings_get);
00db8189 504
b3df0da8
RD
505/**
506 * phy_mii_ioctl - generic PHY MII ioctl interface
507 * @phydev: the phy_device struct
00c7d920 508 * @ifr: &struct ifreq for socket ioctl's
b3df0da8
RD
509 * @cmd: ioctl cmd to execute
510 *
511 * Note that this function is currently incompatible with the
00db8189 512 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 513 * current state. Use at own risk.
00db8189 514 */
2f53e904 515int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd)
00db8189 516{
28b04113 517 struct mii_ioctl_data *mii_data = if_mii(ifr);
00db8189 518 u16 val = mii_data->val_in;
79ce0477 519 bool change_autoneg = false;
00db8189
AF
520
521 switch (cmd) {
522 case SIOCGMIIPHY:
e5a03bfd 523 mii_data->phy_id = phydev->mdio.addr;
c6d6a511
LB
524 /* fall through */
525
00db8189 526 case SIOCGMIIREG:
e5a03bfd
AL
527 mii_data->val_out = mdiobus_read(phydev->mdio.bus,
528 mii_data->phy_id,
af1dc13e 529 mii_data->reg_num);
e62a768f 530 return 0;
00db8189
AF
531
532 case SIOCSMIIREG:
e5a03bfd 533 if (mii_data->phy_id == phydev->mdio.addr) {
e109374f 534 switch (mii_data->reg_num) {
00db8189 535 case MII_BMCR:
79ce0477
BH
536 if ((val & (BMCR_RESET | BMCR_ANENABLE)) == 0) {
537 if (phydev->autoneg == AUTONEG_ENABLE)
538 change_autoneg = true;
00db8189 539 phydev->autoneg = AUTONEG_DISABLE;
79ce0477
BH
540 if (val & BMCR_FULLDPLX)
541 phydev->duplex = DUPLEX_FULL;
542 else
543 phydev->duplex = DUPLEX_HALF;
544 if (val & BMCR_SPEED1000)
545 phydev->speed = SPEED_1000;
546 else if (val & BMCR_SPEED100)
547 phydev->speed = SPEED_100;
548 else phydev->speed = SPEED_10;
549 }
550 else {
551 if (phydev->autoneg == AUTONEG_DISABLE)
552 change_autoneg = true;
00db8189 553 phydev->autoneg = AUTONEG_ENABLE;
79ce0477 554 }
00db8189
AF
555 break;
556 case MII_ADVERTISE:
79ce0477
BH
557 phydev->advertising = mii_adv_to_ethtool_adv_t(val);
558 change_autoneg = true;
00db8189
AF
559 break;
560 default:
561 /* do nothing */
562 break;
563 }
564 }
565
e5a03bfd 566 mdiobus_write(phydev->mdio.bus, mii_data->phy_id,
af1dc13e
PK
567 mii_data->reg_num, val);
568
e5a03bfd 569 if (mii_data->phy_id == phydev->mdio.addr &&
cf18b778 570 mii_data->reg_num == MII_BMCR &&
2613f95f 571 val & BMCR_RESET)
e62a768f 572 return phy_init_hw(phydev);
79ce0477
BH
573
574 if (change_autoneg)
575 return phy_start_aneg(phydev);
576
e62a768f 577 return 0;
dda93b48 578
c1f19b51
RC
579 case SIOCSHWTSTAMP:
580 if (phydev->drv->hwtstamp)
581 return phydev->drv->hwtstamp(phydev, ifr);
582 /* fall through */
583
dda93b48 584 default:
c6d6a511 585 return -EOPNOTSUPP;
00db8189 586 }
00db8189 587}
680e9fe9 588EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 589
b3df0da8
RD
590/**
591 * phy_start_aneg - start auto-negotiation for this PHY device
592 * @phydev: the phy_device struct
e1393456 593 *
b3df0da8
RD
594 * Description: Sanitizes the settings (if we're not autonegotiating
595 * them), and then calls the driver's config_aneg function.
596 * If the PHYCONTROL Layer is operating, we change the state to
597 * reflect the beginning of Auto-negotiation or forcing.
e1393456
AF
598 */
599int phy_start_aneg(struct phy_device *phydev)
600{
601 int err;
602
35b5f6b1 603 mutex_lock(&phydev->lock);
e1393456
AF
604
605 if (AUTONEG_DISABLE == phydev->autoneg)
606 phy_sanitize_settings(phydev);
607
9b3320ef
BH
608 /* Invalidate LP advertising flags */
609 phydev->lp_advertising = 0;
610
e1393456 611 err = phydev->drv->config_aneg(phydev);
e1393456
AF
612 if (err < 0)
613 goto out_unlock;
614
615 if (phydev->state != PHY_HALTED) {
616 if (AUTONEG_ENABLE == phydev->autoneg) {
617 phydev->state = PHY_AN;
618 phydev->link_timeout = PHY_AN_TIMEOUT;
619 } else {
620 phydev->state = PHY_FORCING;
621 phydev->link_timeout = PHY_FORCE_TIMEOUT;
622 }
623 }
624
625out_unlock:
35b5f6b1 626 mutex_unlock(&phydev->lock);
e1393456
AF
627 return err;
628}
629EXPORT_SYMBOL(phy_start_aneg);
630
b3df0da8
RD
631/**
632 * phy_start_machine - start PHY state machine tracking
633 * @phydev: the phy_device struct
00db8189 634 *
b3df0da8 635 * Description: The PHY infrastructure can run a state machine
00db8189
AF
636 * which tracks whether the PHY is starting up, negotiating,
637 * etc. This function starts the timer which tracks the state
29935aeb
SS
638 * of the PHY. If you want to maintain your own state machine,
639 * do not call this function.
b3df0da8 640 */
29935aeb 641void phy_start_machine(struct phy_device *phydev)
00db8189 642{
bbb47bde 643 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
00db8189
AF
644}
645
3c293f4e
AL
646/**
647 * phy_trigger_machine - trigger the state machine to run
648 *
649 * @phydev: the phy_device struct
650 *
651 * Description: There has been a change in state which requires that the
652 * state machine runs.
653 */
654
655static void phy_trigger_machine(struct phy_device *phydev)
656{
657 cancel_delayed_work_sync(&phydev->state_queue);
658 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
659}
660
b3df0da8
RD
661/**
662 * phy_stop_machine - stop the PHY state machine tracking
663 * @phydev: target phy_device struct
00db8189 664 *
b3df0da8 665 * Description: Stops the state machine timer, sets the state to UP
817acf5e 666 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
667 * phy_detach.
668 */
669void phy_stop_machine(struct phy_device *phydev)
670{
a390d1f3 671 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 672
35b5f6b1 673 mutex_lock(&phydev->lock);
00db8189
AF
674 if (phydev->state > PHY_UP)
675 phydev->state = PHY_UP;
35b5f6b1 676 mutex_unlock(&phydev->lock);
00db8189
AF
677}
678
b3df0da8
RD
679/**
680 * phy_error - enter HALTED state for this PHY device
681 * @phydev: target phy_device struct
00db8189
AF
682 *
683 * Moves the PHY to the HALTED state in response to a read
684 * or write error, and tells the controller the link is down.
685 * Must not be called from interrupt context, or while the
686 * phydev->lock is held.
687 */
9b9a8bfc 688static void phy_error(struct phy_device *phydev)
00db8189 689{
35b5f6b1 690 mutex_lock(&phydev->lock);
00db8189 691 phydev->state = PHY_HALTED;
35b5f6b1 692 mutex_unlock(&phydev->lock);
3c293f4e
AL
693
694 phy_trigger_machine(phydev);
00db8189
AF
695}
696
b3df0da8
RD
697/**
698 * phy_interrupt - PHY interrupt handler
699 * @irq: interrupt line
700 * @phy_dat: phy_device pointer
e1393456 701 *
b3df0da8 702 * Description: When a PHY interrupt occurs, the handler disables
664fcf12 703 * interrupts, and uses phy_change to handle the interrupt.
e1393456 704 */
7d12e780 705static irqreturn_t phy_interrupt(int irq, void *phy_dat)
e1393456
AF
706{
707 struct phy_device *phydev = phy_dat;
708
3c3070d7
MR
709 if (PHY_HALTED == phydev->state)
710 return IRQ_NONE; /* It can't be ours. */
711
e1393456 712 disable_irq_nosync(irq);
0ac49527 713 atomic_inc(&phydev->irq_disable);
e1393456 714
664fcf12 715 phy_change(phydev);
e1393456
AF
716
717 return IRQ_HANDLED;
718}
719
b3df0da8
RD
720/**
721 * phy_enable_interrupts - Enable the interrupts from the PHY side
722 * @phydev: target phy_device struct
723 */
89ff05ec 724static int phy_enable_interrupts(struct phy_device *phydev)
00db8189 725{
553fe92b 726 int err = phy_clear_interrupt(phydev);
00db8189 727
e1393456
AF
728 if (err < 0)
729 return err;
00db8189 730
553fe92b 731 return phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189 732}
00db8189 733
b3df0da8
RD
734/**
735 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
736 * @phydev: target phy_device struct
737 */
89ff05ec 738static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
739{
740 int err;
741
742 /* Disable PHY interrupts */
743 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
00db8189
AF
744 if (err)
745 goto phy_err;
746
747 /* Clear the interrupt */
748 err = phy_clear_interrupt(phydev);
00db8189
AF
749 if (err)
750 goto phy_err;
751
752 return 0;
753
754phy_err:
755 phy_error(phydev);
756
757 return err;
758}
e1393456 759
b3df0da8
RD
760/**
761 * phy_start_interrupts - request and enable interrupts for a PHY device
762 * @phydev: target phy_device struct
e1393456 763 *
b3df0da8
RD
764 * Description: Request the interrupt for the given PHY.
765 * If this fails, then we set irq to PHY_POLL.
e1393456 766 * Otherwise, we enable the interrupts in the PHY.
e1393456 767 * This should only be called with a valid IRQ number.
b3df0da8 768 * Returns 0 on success or < 0 on error.
e1393456
AF
769 */
770int phy_start_interrupts(struct phy_device *phydev)
771{
0ac49527 772 atomic_set(&phydev->irq_disable, 0);
c974bdbc
AL
773 if (request_threaded_irq(phydev->irq, NULL, phy_interrupt,
774 IRQF_ONESHOT | IRQF_SHARED,
ae0219cb 775 phydev_name(phydev), phydev) < 0) {
8d242488 776 pr_warn("%s: Can't get IRQ %d (PHY)\n",
e5a03bfd 777 phydev->mdio.bus->name, phydev->irq);
e1393456
AF
778 phydev->irq = PHY_POLL;
779 return 0;
780 }
781
e62a768f 782 return phy_enable_interrupts(phydev);
e1393456
AF
783}
784EXPORT_SYMBOL(phy_start_interrupts);
785
b3df0da8
RD
786/**
787 * phy_stop_interrupts - disable interrupts from a PHY device
788 * @phydev: target phy_device struct
789 */
e1393456
AF
790int phy_stop_interrupts(struct phy_device *phydev)
791{
553fe92b 792 int err = phy_disable_interrupts(phydev);
e1393456
AF
793
794 if (err)
795 phy_error(phydev);
796
0ac49527
MR
797 free_irq(phydev->irq, phydev);
798
2f53e904 799 /* If work indeed has been cancelled, disable_irq() will have
0ac49527
MR
800 * been left unbalanced from phy_interrupt() and enable_irq()
801 * has to be called so that other devices on the line work.
802 */
803 while (atomic_dec_return(&phydev->irq_disable) >= 0)
804 enable_irq(phydev->irq);
e1393456
AF
805
806 return err;
807}
808EXPORT_SYMBOL(phy_stop_interrupts);
809
b3df0da8 810/**
664fcf12
AL
811 * phy_change - Called by the phy_interrupt to handle PHY changes
812 * @phydev: phy_device struct that interrupted
b3df0da8 813 */
664fcf12 814void phy_change(struct phy_device *phydev)
e1393456 815{
deccd16f
FF
816 if (phy_interrupt_is_valid(phydev)) {
817 if (phydev->drv->did_interrupt &&
818 !phydev->drv->did_interrupt(phydev))
819 goto ignore;
a8729eb3 820
deccd16f
FF
821 if (phy_disable_interrupts(phydev))
822 goto phy_err;
823 }
e1393456 824
35b5f6b1 825 mutex_lock(&phydev->lock);
e1393456
AF
826 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
827 phydev->state = PHY_CHANGELINK;
35b5f6b1 828 mutex_unlock(&phydev->lock);
e1393456 829
deccd16f
FF
830 if (phy_interrupt_is_valid(phydev)) {
831 atomic_dec(&phydev->irq_disable);
832 enable_irq(phydev->irq);
e1393456 833
deccd16f
FF
834 /* Reenable interrupts */
835 if (PHY_HALTED != phydev->state &&
836 phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED))
837 goto irq_enable_err;
838 }
e1393456 839
a390d1f3 840 /* reschedule state queue work to run as soon as possible */
3c293f4e 841 phy_trigger_machine(phydev);
e1393456
AF
842 return;
843
a8729eb3
AG
844ignore:
845 atomic_dec(&phydev->irq_disable);
846 enable_irq(phydev->irq);
847 return;
848
e1393456
AF
849irq_enable_err:
850 disable_irq(phydev->irq);
0ac49527 851 atomic_inc(&phydev->irq_disable);
e1393456
AF
852phy_err:
853 phy_error(phydev);
854}
855
664fcf12
AL
856/**
857 * phy_change_work - Scheduled by the phy_mac_interrupt to handle PHY changes
858 * @work: work_struct that describes the work to be done
859 */
860void phy_change_work(struct work_struct *work)
861{
862 struct phy_device *phydev =
863 container_of(work, struct phy_device, phy_queue);
864
865 phy_change(phydev);
866}
867
b3df0da8
RD
868/**
869 * phy_stop - Bring down the PHY link, and stop checking the status
870 * @phydev: target phy_device struct
871 */
e1393456
AF
872void phy_stop(struct phy_device *phydev)
873{
35b5f6b1 874 mutex_lock(&phydev->lock);
e1393456
AF
875
876 if (PHY_HALTED == phydev->state)
877 goto out_unlock;
878
2c7b4921 879 if (phy_interrupt_is_valid(phydev)) {
e1393456
AF
880 /* Disable PHY Interrupts */
881 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 882
3c3070d7
MR
883 /* Clear any pending interrupts */
884 phy_clear_interrupt(phydev);
885 }
e1393456 886
6daf6531
MR
887 phydev->state = PHY_HALTED;
888
e1393456 889out_unlock:
35b5f6b1 890 mutex_unlock(&phydev->lock);
3c3070d7 891
2f53e904 892 /* Cannot call flush_scheduled_work() here as desired because
3c3070d7
MR
893 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
894 * will not reenable interrupts.
895 */
e1393456 896}
2f53e904 897EXPORT_SYMBOL(phy_stop);
e1393456 898
b3df0da8
RD
899/**
900 * phy_start - start or restart a PHY device
901 * @phydev: target phy_device struct
e1393456 902 *
b3df0da8 903 * Description: Indicates the attached device's readiness to
e1393456
AF
904 * handle PHY-related work. Used during startup to start the
905 * PHY, and after a call to phy_stop() to resume operation.
906 * Also used to indicate the MDIO bus has cleared an error
907 * condition.
908 */
909void phy_start(struct phy_device *phydev)
910{
c15e10e7
TB
911 bool do_resume = false;
912 int err = 0;
913
35b5f6b1 914 mutex_lock(&phydev->lock);
e1393456
AF
915
916 switch (phydev->state) {
e109374f
FF
917 case PHY_STARTING:
918 phydev->state = PHY_PENDING;
919 break;
920 case PHY_READY:
921 phydev->state = PHY_UP;
922 break;
923 case PHY_HALTED:
c15e10e7 924 /* make sure interrupts are re-enabled for the PHY */
84a527a4
SX
925 if (phydev->irq != PHY_POLL) {
926 err = phy_enable_interrupts(phydev);
927 if (err < 0)
928 break;
929 }
c15e10e7 930
e109374f 931 phydev->state = PHY_RESUMING;
c15e10e7
TB
932 do_resume = true;
933 break;
e109374f
FF
934 default:
935 break;
e1393456 936 }
35b5f6b1 937 mutex_unlock(&phydev->lock);
c15e10e7
TB
938
939 /* if phy was suspended, bring the physical link up again */
940 if (do_resume)
941 phy_resume(phydev);
3c293f4e
AL
942
943 phy_trigger_machine(phydev);
e1393456 944}
e1393456 945EXPORT_SYMBOL(phy_start);
67c4f3fa 946
61a17965
ZB
947static void phy_adjust_link(struct phy_device *phydev)
948{
949 phydev->adjust_link(phydev->attached_dev);
2e0bc452 950 phy_led_trigger_change_speed(phydev);
61a17965
ZB
951}
952
35b5f6b1
NC
953/**
954 * phy_state_machine - Handle the state machine
955 * @work: work_struct that describes the work to be done
35b5f6b1 956 */
4f9c85a1 957void phy_state_machine(struct work_struct *work)
00db8189 958{
bf6aede7 959 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 960 struct phy_device *phydev =
a390d1f3 961 container_of(dwork, struct phy_device, state_queue);
c15e10e7 962 bool needs_aneg = false, do_suspend = false;
3e2186e0 963 enum phy_state old_state;
00db8189 964 int err = 0;
11e122cb 965 int old_link;
00db8189 966
35b5f6b1 967 mutex_lock(&phydev->lock);
00db8189 968
3e2186e0
FF
969 old_state = phydev->state;
970
2b8f2a28
DM
971 if (phydev->drv->link_change_notify)
972 phydev->drv->link_change_notify(phydev);
973
e109374f
FF
974 switch (phydev->state) {
975 case PHY_DOWN:
976 case PHY_STARTING:
977 case PHY_READY:
978 case PHY_PENDING:
979 break;
980 case PHY_UP:
6e14a5ee 981 needs_aneg = true;
00db8189 982
e109374f
FF
983 phydev->link_timeout = PHY_AN_TIMEOUT;
984
985 break;
986 case PHY_AN:
987 err = phy_read_status(phydev);
e109374f 988 if (err < 0)
00db8189 989 break;
6b655529 990
2f53e904 991 /* If the link is down, give up on negotiation for now */
e109374f
FF
992 if (!phydev->link) {
993 phydev->state = PHY_NOLINK;
994 netif_carrier_off(phydev->attached_dev);
61a17965 995 phy_adjust_link(phydev);
e109374f
FF
996 break;
997 }
6b655529 998
2f53e904 999 /* Check if negotiation is done. Break if there's an error */
e109374f
FF
1000 err = phy_aneg_done(phydev);
1001 if (err < 0)
1002 break;
6b655529 1003
e109374f
FF
1004 /* If AN is done, we're running */
1005 if (err > 0) {
1006 phydev->state = PHY_RUNNING;
1007 netif_carrier_on(phydev->attached_dev);
61a17965 1008 phy_adjust_link(phydev);
00db8189 1009
fa8cddaf 1010 } else if (0 == phydev->link_timeout--)
6e14a5ee 1011 needs_aneg = true;
e109374f
FF
1012 break;
1013 case PHY_NOLINK:
321beec5
AL
1014 if (phy_interrupt_is_valid(phydev))
1015 break;
1016
e109374f 1017 err = phy_read_status(phydev);
e109374f 1018 if (err)
00db8189 1019 break;
00db8189 1020
e109374f 1021 if (phydev->link) {
e46e08b8
BK
1022 if (AUTONEG_ENABLE == phydev->autoneg) {
1023 err = phy_aneg_done(phydev);
1024 if (err < 0)
1025 break;
1026
1027 if (!err) {
1028 phydev->state = PHY_AN;
1029 phydev->link_timeout = PHY_AN_TIMEOUT;
1030 break;
1031 }
1032 }
e109374f
FF
1033 phydev->state = PHY_RUNNING;
1034 netif_carrier_on(phydev->attached_dev);
61a17965 1035 phy_adjust_link(phydev);
e109374f
FF
1036 }
1037 break;
1038 case PHY_FORCING:
1039 err = genphy_update_link(phydev);
e109374f 1040 if (err)
00db8189 1041 break;
00db8189 1042
e109374f
FF
1043 if (phydev->link) {
1044 phydev->state = PHY_RUNNING;
1045 netif_carrier_on(phydev->attached_dev);
1046 } else {
1047 if (0 == phydev->link_timeout--)
6e14a5ee 1048 needs_aneg = true;
e109374f 1049 }
00db8189 1050
61a17965 1051 phy_adjust_link(phydev);
e109374f
FF
1052 break;
1053 case PHY_RUNNING:
d5c3d846
FF
1054 /* Only register a CHANGE if we are polling and link changed
1055 * since latest checking.
e109374f 1056 */
d5c3d846 1057 if (phydev->irq == PHY_POLL) {
11e122cb
SX
1058 old_link = phydev->link;
1059 err = phy_read_status(phydev);
1060 if (err)
1061 break;
1062
1063 if (old_link != phydev->link)
1064 phydev->state = PHY_CHANGELINK;
1065 }
e109374f
FF
1066 break;
1067 case PHY_CHANGELINK:
1068 err = phy_read_status(phydev);
e109374f 1069 if (err)
00db8189 1070 break;
00db8189 1071
e109374f
FF
1072 if (phydev->link) {
1073 phydev->state = PHY_RUNNING;
1074 netif_carrier_on(phydev->attached_dev);
1075 } else {
1076 phydev->state = PHY_NOLINK;
1077 netif_carrier_off(phydev->attached_dev);
1078 }
00db8189 1079
61a17965 1080 phy_adjust_link(phydev);
00db8189 1081
e109374f
FF
1082 if (phy_interrupt_is_valid(phydev))
1083 err = phy_config_interrupt(phydev,
2f53e904 1084 PHY_INTERRUPT_ENABLED);
e109374f
FF
1085 break;
1086 case PHY_HALTED:
1087 if (phydev->link) {
1088 phydev->link = 0;
1089 netif_carrier_off(phydev->attached_dev);
61a17965 1090 phy_adjust_link(phydev);
6e14a5ee 1091 do_suspend = true;
e109374f
FF
1092 }
1093 break;
1094 case PHY_RESUMING:
e109374f
FF
1095 if (AUTONEG_ENABLE == phydev->autoneg) {
1096 err = phy_aneg_done(phydev);
1097 if (err < 0)
00db8189
AF
1098 break;
1099
e109374f 1100 /* err > 0 if AN is done.
2f53e904
SS
1101 * Otherwise, it's 0, and we're still waiting for AN
1102 */
e109374f 1103 if (err > 0) {
42caa074
WF
1104 err = phy_read_status(phydev);
1105 if (err)
1106 break;
1107
1108 if (phydev->link) {
1109 phydev->state = PHY_RUNNING;
1110 netif_carrier_on(phydev->attached_dev);
2f53e904 1111 } else {
42caa074 1112 phydev->state = PHY_NOLINK;
2f53e904 1113 }
61a17965 1114 phy_adjust_link(phydev);
e109374f
FF
1115 } else {
1116 phydev->state = PHY_AN;
1117 phydev->link_timeout = PHY_AN_TIMEOUT;
42caa074 1118 }
e109374f
FF
1119 } else {
1120 err = phy_read_status(phydev);
1121 if (err)
1122 break;
1123
1124 if (phydev->link) {
1125 phydev->state = PHY_RUNNING;
1126 netif_carrier_on(phydev->attached_dev);
2f53e904 1127 } else {
e109374f 1128 phydev->state = PHY_NOLINK;
2f53e904 1129 }
61a17965 1130 phy_adjust_link(phydev);
e109374f
FF
1131 }
1132 break;
00db8189
AF
1133 }
1134
35b5f6b1 1135 mutex_unlock(&phydev->lock);
00db8189
AF
1136
1137 if (needs_aneg)
1138 err = phy_start_aneg(phydev);
6e14a5ee 1139 else if (do_suspend)
be9dad1f
SH
1140 phy_suspend(phydev);
1141
00db8189
AF
1142 if (err < 0)
1143 phy_error(phydev);
1144
72ba48be
AL
1145 phydev_dbg(phydev, "PHY state change %s -> %s\n",
1146 phy_state_to_str(old_state),
1147 phy_state_to_str(phydev->state));
3e2186e0 1148
d5c3d846
FF
1149 /* Only re-schedule a PHY state machine change if we are polling the
1150 * PHY, if PHY_IGNORE_INTERRUPT is set, then we will be moving
1151 * between states from phy_mac_interrupt()
1152 */
1153 if (phydev->irq == PHY_POLL)
1154 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
1155 PHY_STATE_TIME * HZ);
35b5f6b1 1156}
a59a4d19 1157
664fcf12
AL
1158/**
1159 * phy_mac_interrupt - MAC says the link has changed
1160 * @phydev: phy_device struct with changed link
1161 * @new_link: Link is Up/Down.
1162 *
1163 * Description: The MAC layer is able indicate there has been a change
1164 * in the PHY link status. Set the new link status, and trigger the
1165 * state machine, work a work queue.
1166 */
5ea94e76
FF
1167void phy_mac_interrupt(struct phy_device *phydev, int new_link)
1168{
5ea94e76 1169 phydev->link = new_link;
deccd16f
FF
1170
1171 /* Trigger a state machine change */
1172 queue_work(system_power_efficient_wq, &phydev->phy_queue);
5ea94e76
FF
1173}
1174EXPORT_SYMBOL(phy_mac_interrupt);
1175
a59a4d19
GC
1176static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
1177 int addr)
1178{
1179 /* Write the desired MMD Devad */
1180 bus->write(bus, addr, MII_MMD_CTRL, devad);
1181
1182 /* Write the desired MMD register address */
1183 bus->write(bus, addr, MII_MMD_DATA, prtad);
1184
1185 /* Select the Function : DATA with no post increment */
1186 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
1187}
1188
1189/**
1190 * phy_read_mmd_indirect - reads data from the MMD registers
0c1d77df 1191 * @phydev: The PHY device bus
a59a4d19
GC
1192 * @prtad: MMD Address
1193 * @devad: MMD DEVAD
a59a4d19
GC
1194 *
1195 * Description: it reads data from the MMD registers (clause 22 to access to
1196 * clause 45) of the specified phy address.
1197 * To read these register we have:
1198 * 1) Write reg 13 // DEVAD
1199 * 2) Write reg 14 // MMD Address
1200 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
1201 * 3) Read reg 14 // Read MMD data
1202 */
053e7e16 1203int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad)
a59a4d19 1204{
0c1d77df 1205 struct phy_driver *phydrv = phydev->drv;
e5a03bfd 1206 int addr = phydev->mdio.addr;
0c1d77df 1207 int value = -1;
a59a4d19 1208
ef899c07 1209 if (!phydrv->read_mmd_indirect) {
e5a03bfd 1210 struct mii_bus *bus = phydev->mdio.bus;
05a7f582
RK
1211
1212 mutex_lock(&bus->mdio_lock);
1213 mmd_phy_indirect(bus, prtad, devad, addr);
0c1d77df
VB
1214
1215 /* Read the content of the MMD's selected register */
05a7f582
RK
1216 value = bus->read(bus, addr, MII_MMD_DATA);
1217 mutex_unlock(&bus->mdio_lock);
0c1d77df
VB
1218 } else {
1219 value = phydrv->read_mmd_indirect(phydev, prtad, devad, addr);
1220 }
1221 return value;
a59a4d19 1222}
66ce7fb9 1223EXPORT_SYMBOL(phy_read_mmd_indirect);
a59a4d19
GC
1224
1225/**
1226 * phy_write_mmd_indirect - writes data to the MMD registers
0c1d77df 1227 * @phydev: The PHY device
a59a4d19
GC
1228 * @prtad: MMD Address
1229 * @devad: MMD DEVAD
a59a4d19
GC
1230 * @data: data to write in the MMD register
1231 *
1232 * Description: Write data from the MMD registers of the specified
1233 * phy address.
1234 * To write these register we have:
1235 * 1) Write reg 13 // DEVAD
1236 * 2) Write reg 14 // MMD Address
1237 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
1238 * 3) Write reg 14 // Write MMD data
1239 */
66ce7fb9 1240void phy_write_mmd_indirect(struct phy_device *phydev, int prtad,
053e7e16 1241 int devad, u32 data)
a59a4d19 1242{
0c1d77df 1243 struct phy_driver *phydrv = phydev->drv;
e5a03bfd 1244 int addr = phydev->mdio.addr;
a59a4d19 1245
ef899c07 1246 if (!phydrv->write_mmd_indirect) {
e5a03bfd 1247 struct mii_bus *bus = phydev->mdio.bus;
05a7f582
RK
1248
1249 mutex_lock(&bus->mdio_lock);
1250 mmd_phy_indirect(bus, prtad, devad, addr);
0c1d77df
VB
1251
1252 /* Write the data into MMD's selected register */
05a7f582
RK
1253 bus->write(bus, addr, MII_MMD_DATA, data);
1254 mutex_unlock(&bus->mdio_lock);
0c1d77df
VB
1255 } else {
1256 phydrv->write_mmd_indirect(phydev, prtad, devad, addr, data);
1257 }
a59a4d19 1258}
66ce7fb9 1259EXPORT_SYMBOL(phy_write_mmd_indirect);
a59a4d19 1260
a59a4d19
GC
1261/**
1262 * phy_init_eee - init and check the EEE feature
1263 * @phydev: target phy_device struct
1264 * @clk_stop_enable: PHY may stop the clock during LPI
1265 *
1266 * Description: it checks if the Energy-Efficient Ethernet (EEE)
1267 * is supported by looking at the MMD registers 3.20 and 7.60/61
1268 * and it programs the MMD register 3.0 setting the "Clock stop enable"
1269 * bit if required.
1270 */
1271int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
1272{
a59a4d19
GC
1273 /* According to 802.3az,the EEE is supported only in full duplex-mode.
1274 * Also EEE feature is active when core is operating with MII, GMII
7e140696
FF
1275 * or RGMII (all kinds). Internal PHYs are also allowed to proceed and
1276 * should return an error if they do not support EEE.
a59a4d19
GC
1277 */
1278 if ((phydev->duplex == DUPLEX_FULL) &&
1279 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
1280 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
32a64161 1281 phy_interface_is_rgmii(phydev) ||
a9f63095 1282 phy_is_internal(phydev))) {
a59a4d19
GC
1283 int eee_lp, eee_cap, eee_adv;
1284 u32 lp, cap, adv;
4ae6e50c 1285 int status;
a59a4d19
GC
1286
1287 /* Read phy status to properly get the right settings */
1288 status = phy_read_status(phydev);
1289 if (status)
1290 return status;
1291
1292 /* First check if the EEE ability is supported */
0c1d77df 1293 eee_cap = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE,
053e7e16 1294 MDIO_MMD_PCS);
7a4cecf7
GC
1295 if (eee_cap <= 0)
1296 goto eee_exit_err;
a59a4d19 1297
b32607dd 1298 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19 1299 if (!cap)
7a4cecf7 1300 goto eee_exit_err;
a59a4d19
GC
1301
1302 /* Check which link settings negotiated and verify it in
1303 * the EEE advertising registers.
1304 */
0c1d77df 1305 eee_lp = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE,
053e7e16 1306 MDIO_MMD_AN);
7a4cecf7
GC
1307 if (eee_lp <= 0)
1308 goto eee_exit_err;
a59a4d19 1309
0c1d77df 1310 eee_adv = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV,
053e7e16 1311 MDIO_MMD_AN);
7a4cecf7
GC
1312 if (eee_adv <= 0)
1313 goto eee_exit_err;
a59a4d19 1314
b32607dd
AB
1315 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
1316 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
54da5a8b 1317 if (!phy_check_valid(phydev->speed, phydev->duplex, lp & adv))
7a4cecf7 1318 goto eee_exit_err;
a59a4d19
GC
1319
1320 if (clk_stop_enable) {
1321 /* Configure the PHY to stop receiving xMII
1322 * clock while it is signaling LPI.
1323 */
0c1d77df 1324 int val = phy_read_mmd_indirect(phydev, MDIO_CTRL1,
053e7e16 1325 MDIO_MMD_PCS);
a59a4d19
GC
1326 if (val < 0)
1327 return val;
1328
1329 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
0c1d77df 1330 phy_write_mmd_indirect(phydev, MDIO_CTRL1,
053e7e16 1331 MDIO_MMD_PCS, val);
a59a4d19
GC
1332 }
1333
e62a768f 1334 return 0; /* EEE supported */
a59a4d19 1335 }
7a4cecf7 1336eee_exit_err:
e62a768f 1337 return -EPROTONOSUPPORT;
a59a4d19
GC
1338}
1339EXPORT_SYMBOL(phy_init_eee);
1340
1341/**
1342 * phy_get_eee_err - report the EEE wake error count
1343 * @phydev: target phy_device struct
1344 *
1345 * Description: it is to report the number of time where the PHY
1346 * failed to complete its normal wake sequence.
1347 */
1348int phy_get_eee_err(struct phy_device *phydev)
1349{
053e7e16 1350 return phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_WK_ERR, MDIO_MMD_PCS);
a59a4d19
GC
1351}
1352EXPORT_SYMBOL(phy_get_eee_err);
1353
1354/**
1355 * phy_ethtool_get_eee - get EEE supported and status
1356 * @phydev: target phy_device struct
1357 * @data: ethtool_eee data
1358 *
1359 * Description: it reportes the Supported/Advertisement/LP Advertisement
1360 * capabilities.
1361 */
1362int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1363{
1364 int val;
1365
1366 /* Get Supported EEE */
053e7e16 1367 val = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE, MDIO_MMD_PCS);
a59a4d19
GC
1368 if (val < 0)
1369 return val;
b32607dd 1370 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
a59a4d19
GC
1371
1372 /* Get advertisement EEE */
053e7e16 1373 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN);
a59a4d19
GC
1374 if (val < 0)
1375 return val;
b32607dd 1376 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1377
1378 /* Get LP advertisement EEE */
053e7e16 1379 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE, MDIO_MMD_AN);
a59a4d19
GC
1380 if (val < 0)
1381 return val;
b32607dd 1382 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1383
1384 return 0;
1385}
1386EXPORT_SYMBOL(phy_ethtool_get_eee);
1387
1388/**
1389 * phy_ethtool_set_eee - set EEE supported and status
1390 * @phydev: target phy_device struct
1391 * @data: ethtool_eee data
1392 *
1393 * Description: it is to program the Advertisement EEE register.
1394 */
1395int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1396{
553fe92b 1397 int val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19 1398
d853d145 1399 /* Mask prohibited EEE modes */
1400 val &= ~phydev->eee_broken_modes;
1401
053e7e16 1402 phy_write_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN, val);
a59a4d19
GC
1403
1404 return 0;
1405}
1406EXPORT_SYMBOL(phy_ethtool_set_eee);
42e836eb
MS
1407
1408int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1409{
1410 if (phydev->drv->set_wol)
1411 return phydev->drv->set_wol(phydev, wol);
1412
1413 return -EOPNOTSUPP;
1414}
1415EXPORT_SYMBOL(phy_ethtool_set_wol);
1416
1417void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1418{
1419 if (phydev->drv->get_wol)
1420 phydev->drv->get_wol(phydev, wol);
1421}
1422EXPORT_SYMBOL(phy_ethtool_get_wol);
9d9a77ce
PR
1423
1424int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1425 struct ethtool_link_ksettings *cmd)
1426{
1427 struct phy_device *phydev = ndev->phydev;
1428
1429 if (!phydev)
1430 return -ENODEV;
1431
1432 return phy_ethtool_ksettings_get(phydev, cmd);
1433}
1434EXPORT_SYMBOL(phy_ethtool_get_link_ksettings);
1435
1436int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1437 const struct ethtool_link_ksettings *cmd)
1438{
1439 struct phy_device *phydev = ndev->phydev;
1440
1441 if (!phydev)
1442 return -ENODEV;
1443
1444 return phy_ethtool_ksettings_set(phydev, cmd);
1445}
1446EXPORT_SYMBOL(phy_ethtool_set_link_ksettings);
e86a8987
FF
1447
1448int phy_ethtool_nway_reset(struct net_device *ndev)
1449{
1450 struct phy_device *phydev = ndev->phydev;
1451
1452 if (!phydev)
1453 return -ENODEV;
1454
1455 return genphy_restart_aneg(phydev);
1456}
1457EXPORT_SYMBOL(phy_ethtool_nway_reset);