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2f53e904 1/* Framework for configuring and reading PHY devices
00db8189
AF
2 * Based on code in sungem_phy.c and gianfar_phy.c
3 *
4 * Author: Andy Fleming
5 *
6 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 7 * Copyright (c) 2006, 2007 Maciej W. Rozycki
00db8189
AF
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
8d242488
JP
15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
00db8189 18#include <linux/kernel.h>
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AF
19#include <linux/string.h>
20#include <linux/errno.h>
21#include <linux/unistd.h>
00db8189 22#include <linux/interrupt.h>
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AF
23#include <linux/delay.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/skbuff.h>
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AF
27#include <linux/mm.h>
28#include <linux/module.h>
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AF
29#include <linux/mii.h>
30#include <linux/ethtool.h>
31#include <linux/phy.h>
3c3070d7
MR
32#include <linux/timer.h>
33#include <linux/workqueue.h>
a59a4d19 34#include <linux/mdio.h>
2f53e904
SS
35#include <linux/io.h>
36#include <linux/uaccess.h>
60063497 37#include <linux/atomic.h>
2f53e904 38
00db8189 39#include <asm/irq.h>
00db8189 40
766d1d38
FF
41static const char *phy_speed_to_str(int speed)
42{
43 switch (speed) {
44 case SPEED_10:
45 return "10Mbps";
46 case SPEED_100:
47 return "100Mbps";
48 case SPEED_1000:
49 return "1Gbps";
50 case SPEED_2500:
51 return "2.5Gbps";
52 case SPEED_10000:
53 return "10Gbps";
54 case SPEED_UNKNOWN:
55 return "Unknown";
56 default:
57 return "Unsupported (update phy.c)";
58 }
59}
60
3e2186e0
FF
61#define PHY_STATE_STR(_state) \
62 case PHY_##_state: \
63 return __stringify(_state); \
64
65static const char *phy_state_to_str(enum phy_state st)
66{
67 switch (st) {
68 PHY_STATE_STR(DOWN)
69 PHY_STATE_STR(STARTING)
70 PHY_STATE_STR(READY)
71 PHY_STATE_STR(PENDING)
72 PHY_STATE_STR(UP)
73 PHY_STATE_STR(AN)
74 PHY_STATE_STR(RUNNING)
75 PHY_STATE_STR(NOLINK)
76 PHY_STATE_STR(FORCING)
77 PHY_STATE_STR(CHANGELINK)
78 PHY_STATE_STR(HALTED)
79 PHY_STATE_STR(RESUMING)
80 }
81
82 return NULL;
83}
84
85
b3df0da8
RD
86/**
87 * phy_print_status - Convenience function to print out the current phy status
88 * @phydev: the phy_device struct
e1393456
AF
89 */
90void phy_print_status(struct phy_device *phydev)
91{
2f53e904 92 if (phydev->link) {
df40cc88 93 netdev_info(phydev->attached_dev,
766d1d38
FF
94 "Link is Up - %s/%s - flow control %s\n",
95 phy_speed_to_str(phydev->speed),
df40cc88
FF
96 DUPLEX_FULL == phydev->duplex ? "Full" : "Half",
97 phydev->pause ? "rx/tx" : "off");
2f53e904 98 } else {
43b6329f 99 netdev_info(phydev->attached_dev, "Link is Down\n");
2f53e904 100 }
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AF
101}
102EXPORT_SYMBOL(phy_print_status);
00db8189 103
b3df0da8
RD
104/**
105 * phy_clear_interrupt - Ack the phy device's interrupt
106 * @phydev: the phy_device struct
107 *
108 * If the @phydev driver has an ack_interrupt function, call it to
109 * ack and clear the phy device's interrupt.
110 *
ad033506 111 * Returns 0 on success or < 0 on error.
b3df0da8 112 */
89ff05ec 113static int phy_clear_interrupt(struct phy_device *phydev)
00db8189 114{
00db8189 115 if (phydev->drv->ack_interrupt)
e62a768f 116 return phydev->drv->ack_interrupt(phydev);
00db8189 117
e62a768f 118 return 0;
00db8189
AF
119}
120
b3df0da8
RD
121/**
122 * phy_config_interrupt - configure the PHY device for the requested interrupts
123 * @phydev: the phy_device struct
124 * @interrupts: interrupt flags to configure for this @phydev
125 *
ad033506 126 * Returns 0 on success or < 0 on error.
b3df0da8 127 */
89ff05ec 128static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
00db8189 129{
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AF
130 phydev->interrupts = interrupts;
131 if (phydev->drv->config_intr)
e62a768f 132 return phydev->drv->config_intr(phydev);
00db8189 133
e62a768f 134 return 0;
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AF
135}
136
137
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RD
138/**
139 * phy_aneg_done - return auto-negotiation status
140 * @phydev: target phy_device struct
00db8189 141 *
76a423a3
FF
142 * Description: Return the auto-negotiation status from this @phydev
143 * Returns > 0 on success or < 0 on error. 0 means that auto-negotiation
144 * is still pending.
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AF
145 */
146static inline int phy_aneg_done(struct phy_device *phydev)
147{
76a423a3
FF
148 if (phydev->drv->aneg_done)
149 return phydev->drv->aneg_done(phydev);
150
a9fa6e6a 151 return genphy_aneg_done(phydev);
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AF
152}
153
00db8189 154/* A structure for mapping a particular speed and duplex
2f53e904
SS
155 * combination to a particular SUPPORTED and ADVERTISED value
156 */
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AF
157struct phy_setting {
158 int speed;
159 int duplex;
160 u32 setting;
161};
162
163/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 164static const struct phy_setting settings[] = {
00db8189 165 {
3e707706
LT
166 .speed = SPEED_10000,
167 .duplex = DUPLEX_FULL,
168 .setting = SUPPORTED_10000baseKR_Full,
169 },
170 {
171 .speed = SPEED_10000,
172 .duplex = DUPLEX_FULL,
173 .setting = SUPPORTED_10000baseKX4_Full,
174 },
175 {
176 .speed = SPEED_10000,
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AF
177 .duplex = DUPLEX_FULL,
178 .setting = SUPPORTED_10000baseT_Full,
179 },
3e707706
LT
180 {
181 .speed = SPEED_2500,
182 .duplex = DUPLEX_FULL,
183 .setting = SUPPORTED_2500baseX_Full,
184 },
185 {
186 .speed = SPEED_1000,
187 .duplex = DUPLEX_FULL,
188 .setting = SUPPORTED_1000baseKX_Full,
189 },
00db8189
AF
190 {
191 .speed = SPEED_1000,
192 .duplex = DUPLEX_FULL,
193 .setting = SUPPORTED_1000baseT_Full,
194 },
195 {
196 .speed = SPEED_1000,
197 .duplex = DUPLEX_HALF,
198 .setting = SUPPORTED_1000baseT_Half,
199 },
200 {
201 .speed = SPEED_100,
202 .duplex = DUPLEX_FULL,
203 .setting = SUPPORTED_100baseT_Full,
204 },
205 {
206 .speed = SPEED_100,
207 .duplex = DUPLEX_HALF,
208 .setting = SUPPORTED_100baseT_Half,
209 },
210 {
211 .speed = SPEED_10,
212 .duplex = DUPLEX_FULL,
213 .setting = SUPPORTED_10baseT_Full,
214 },
215 {
216 .speed = SPEED_10,
217 .duplex = DUPLEX_HALF,
218 .setting = SUPPORTED_10baseT_Half,
219 },
220};
221
ff8ac609 222#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 223
b3df0da8
RD
224/**
225 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
226 * @speed: speed to match
227 * @duplex: duplex to match
00db8189 228 *
b3df0da8 229 * Description: Searches the settings array for the setting which
00db8189
AF
230 * matches the desired speed and duplex, and returns the index
231 * of that setting. Returns the index of the last setting if
232 * none of the others match.
233 */
4ae6e50c 234static inline unsigned int phy_find_setting(int speed, int duplex)
00db8189 235{
4ae6e50c 236 unsigned int idx = 0;
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AF
237
238 while (idx < ARRAY_SIZE(settings) &&
2f53e904 239 (settings[idx].speed != speed || settings[idx].duplex != duplex))
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AF
240 idx++;
241
242 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
243}
244
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RD
245/**
246 * phy_find_valid - find a PHY setting that matches the requested features mask
247 * @idx: The first index in settings[] to search
248 * @features: A mask of the valid settings
00db8189 249 *
b3df0da8 250 * Description: Returns the index of the first valid setting less
00db8189
AF
251 * than or equal to the one pointed to by idx, as determined by
252 * the mask in features. Returns the index of the last setting
253 * if nothing else matches.
254 */
4ae6e50c 255static inline unsigned int phy_find_valid(unsigned int idx, u32 features)
00db8189
AF
256{
257 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
258 idx++;
259
260 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
261}
262
54da5a8b
GR
263/**
264 * phy_check_valid - check if there is a valid PHY setting which matches
265 * speed, duplex, and feature mask
266 * @speed: speed to match
267 * @duplex: duplex to match
268 * @features: A mask of the valid settings
269 *
270 * Description: Returns true if there is a valid setting, false otherwise.
271 */
272static inline bool phy_check_valid(int speed, int duplex, u32 features)
273{
274 unsigned int idx;
275
276 idx = phy_find_valid(phy_find_setting(speed, duplex), features);
277
278 return settings[idx].speed == speed && settings[idx].duplex == duplex &&
279 (settings[idx].setting & features);
280}
281
b3df0da8
RD
282/**
283 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
284 * @phydev: the target phy_device struct
00db8189 285 *
b3df0da8 286 * Description: Make sure the PHY is set to supported speeds and
00db8189 287 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 288 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 289 */
89ff05ec 290static void phy_sanitize_settings(struct phy_device *phydev)
00db8189
AF
291{
292 u32 features = phydev->supported;
4ae6e50c 293 unsigned int idx;
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AF
294
295 /* Sanitize settings based on PHY capabilities */
296 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 297 phydev->autoneg = AUTONEG_DISABLE;
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AF
298
299 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
300 features);
301
302 phydev->speed = settings[idx].speed;
303 phydev->duplex = settings[idx].duplex;
304}
00db8189 305
b3df0da8
RD
306/**
307 * phy_ethtool_sset - generic ethtool sset function, handles all the details
308 * @phydev: target phy_device struct
309 * @cmd: ethtool_cmd
00db8189
AF
310 *
311 * A few notes about parameter checking:
312 * - We don't set port or transceiver, so we don't care what they
313 * were set to.
314 * - phy_start_aneg() will make sure forced settings are sane, and
315 * choose the next best ones from the ones selected, so we don't
b3df0da8 316 * care if ethtool tries to give us bad values.
00db8189
AF
317 */
318int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
319{
25db0338
DD
320 u32 speed = ethtool_cmd_speed(cmd);
321
e5a03bfd 322 if (cmd->phy_address != phydev->mdio.addr)
00db8189
AF
323 return -EINVAL;
324
2f53e904 325 /* We make sure that we don't pass unsupported values in to the PHY */
00db8189
AF
326 cmd->advertising &= phydev->supported;
327
328 /* Verify the settings we care about. */
329 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
330 return -EINVAL;
331
332 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
333 return -EINVAL;
334
8e95a202 335 if (cmd->autoneg == AUTONEG_DISABLE &&
25db0338
DD
336 ((speed != SPEED_1000 &&
337 speed != SPEED_100 &&
338 speed != SPEED_10) ||
8e95a202
JP
339 (cmd->duplex != DUPLEX_HALF &&
340 cmd->duplex != DUPLEX_FULL)))
00db8189
AF
341 return -EINVAL;
342
343 phydev->autoneg = cmd->autoneg;
344
25db0338 345 phydev->speed = speed;
00db8189
AF
346
347 phydev->advertising = cmd->advertising;
348
349 if (AUTONEG_ENABLE == cmd->autoneg)
350 phydev->advertising |= ADVERTISED_Autoneg;
351 else
352 phydev->advertising &= ~ADVERTISED_Autoneg;
353
354 phydev->duplex = cmd->duplex;
355
634ec36c
DT
356 phydev->mdix = cmd->eth_tp_mdix_ctrl;
357
00db8189
AF
358 /* Restart the PHY */
359 phy_start_aneg(phydev);
360
361 return 0;
362}
9f6d55d0 363EXPORT_SYMBOL(phy_ethtool_sset);
00db8189 364
2d55173e
PR
365int phy_ethtool_ksettings_set(struct phy_device *phydev,
366 const struct ethtool_link_ksettings *cmd)
367{
368 u8 autoneg = cmd->base.autoneg;
369 u8 duplex = cmd->base.duplex;
370 u32 speed = cmd->base.speed;
371 u32 advertising;
372
373 if (cmd->base.phy_address != phydev->mdio.addr)
374 return -EINVAL;
375
376 ethtool_convert_link_mode_to_legacy_u32(&advertising,
377 cmd->link_modes.advertising);
378
379 /* We make sure that we don't pass unsupported values in to the PHY */
380 advertising &= phydev->supported;
381
382 /* Verify the settings we care about. */
383 if (autoneg != AUTONEG_ENABLE && autoneg != AUTONEG_DISABLE)
384 return -EINVAL;
385
386 if (autoneg == AUTONEG_ENABLE && advertising == 0)
387 return -EINVAL;
388
389 if (autoneg == AUTONEG_DISABLE &&
390 ((speed != SPEED_1000 &&
391 speed != SPEED_100 &&
392 speed != SPEED_10) ||
393 (duplex != DUPLEX_HALF &&
394 duplex != DUPLEX_FULL)))
395 return -EINVAL;
396
397 phydev->autoneg = autoneg;
398
399 phydev->speed = speed;
400
401 phydev->advertising = advertising;
402
403 if (autoneg == AUTONEG_ENABLE)
404 phydev->advertising |= ADVERTISED_Autoneg;
405 else
406 phydev->advertising &= ~ADVERTISED_Autoneg;
407
408 phydev->duplex = duplex;
409
410 phydev->mdix = cmd->base.eth_tp_mdix_ctrl;
411
412 /* Restart the PHY */
413 phy_start_aneg(phydev);
414
415 return 0;
416}
417EXPORT_SYMBOL(phy_ethtool_ksettings_set);
418
00db8189
AF
419int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
420{
421 cmd->supported = phydev->supported;
422
423 cmd->advertising = phydev->advertising;
114002bc 424 cmd->lp_advertising = phydev->lp_advertising;
00db8189 425
70739497 426 ethtool_cmd_speed_set(cmd, phydev->speed);
00db8189 427 cmd->duplex = phydev->duplex;
c88838ce
FF
428 if (phydev->interface == PHY_INTERFACE_MODE_MOCA)
429 cmd->port = PORT_BNC;
430 else
431 cmd->port = PORT_MII;
e5a03bfd 432 cmd->phy_address = phydev->mdio.addr;
4284b6a5
FF
433 cmd->transceiver = phy_is_internal(phydev) ?
434 XCVR_INTERNAL : XCVR_EXTERNAL;
00db8189 435 cmd->autoneg = phydev->autoneg;
239aa55b 436 cmd->eth_tp_mdix_ctrl = phydev->mdix;
00db8189
AF
437
438 return 0;
439}
9f6d55d0 440EXPORT_SYMBOL(phy_ethtool_gset);
2d55173e
PR
441
442int phy_ethtool_ksettings_get(struct phy_device *phydev,
443 struct ethtool_link_ksettings *cmd)
444{
445 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
446 phydev->supported);
447
448 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
449 phydev->advertising);
450
451 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.lp_advertising,
452 phydev->lp_advertising);
453
454 cmd->base.speed = phydev->speed;
455 cmd->base.duplex = phydev->duplex;
456 if (phydev->interface == PHY_INTERFACE_MODE_MOCA)
457 cmd->base.port = PORT_BNC;
458 else
459 cmd->base.port = PORT_MII;
460
461 cmd->base.phy_address = phydev->mdio.addr;
462 cmd->base.autoneg = phydev->autoneg;
463 cmd->base.eth_tp_mdix_ctrl = phydev->mdix;
464
465 return 0;
466}
467EXPORT_SYMBOL(phy_ethtool_ksettings_get);
00db8189 468
b3df0da8
RD
469/**
470 * phy_mii_ioctl - generic PHY MII ioctl interface
471 * @phydev: the phy_device struct
00c7d920 472 * @ifr: &struct ifreq for socket ioctl's
b3df0da8
RD
473 * @cmd: ioctl cmd to execute
474 *
475 * Note that this function is currently incompatible with the
00db8189 476 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 477 * current state. Use at own risk.
00db8189 478 */
2f53e904 479int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd)
00db8189 480{
28b04113 481 struct mii_ioctl_data *mii_data = if_mii(ifr);
00db8189 482 u16 val = mii_data->val_in;
79ce0477 483 bool change_autoneg = false;
00db8189
AF
484
485 switch (cmd) {
486 case SIOCGMIIPHY:
e5a03bfd 487 mii_data->phy_id = phydev->mdio.addr;
c6d6a511
LB
488 /* fall through */
489
00db8189 490 case SIOCGMIIREG:
e5a03bfd
AL
491 mii_data->val_out = mdiobus_read(phydev->mdio.bus,
492 mii_data->phy_id,
af1dc13e 493 mii_data->reg_num);
e62a768f 494 return 0;
00db8189
AF
495
496 case SIOCSMIIREG:
e5a03bfd 497 if (mii_data->phy_id == phydev->mdio.addr) {
e109374f 498 switch (mii_data->reg_num) {
00db8189 499 case MII_BMCR:
79ce0477
BH
500 if ((val & (BMCR_RESET | BMCR_ANENABLE)) == 0) {
501 if (phydev->autoneg == AUTONEG_ENABLE)
502 change_autoneg = true;
00db8189 503 phydev->autoneg = AUTONEG_DISABLE;
79ce0477
BH
504 if (val & BMCR_FULLDPLX)
505 phydev->duplex = DUPLEX_FULL;
506 else
507 phydev->duplex = DUPLEX_HALF;
508 if (val & BMCR_SPEED1000)
509 phydev->speed = SPEED_1000;
510 else if (val & BMCR_SPEED100)
511 phydev->speed = SPEED_100;
512 else phydev->speed = SPEED_10;
513 }
514 else {
515 if (phydev->autoneg == AUTONEG_DISABLE)
516 change_autoneg = true;
00db8189 517 phydev->autoneg = AUTONEG_ENABLE;
79ce0477 518 }
00db8189
AF
519 break;
520 case MII_ADVERTISE:
79ce0477
BH
521 phydev->advertising = mii_adv_to_ethtool_adv_t(val);
522 change_autoneg = true;
00db8189
AF
523 break;
524 default:
525 /* do nothing */
526 break;
527 }
528 }
529
e5a03bfd 530 mdiobus_write(phydev->mdio.bus, mii_data->phy_id,
af1dc13e
PK
531 mii_data->reg_num, val);
532
e5a03bfd 533 if (mii_data->phy_id == phydev->mdio.addr &&
cf18b778 534 mii_data->reg_num == MII_BMCR &&
2613f95f 535 val & BMCR_RESET)
e62a768f 536 return phy_init_hw(phydev);
79ce0477
BH
537
538 if (change_autoneg)
539 return phy_start_aneg(phydev);
540
e62a768f 541 return 0;
dda93b48 542
c1f19b51
RC
543 case SIOCSHWTSTAMP:
544 if (phydev->drv->hwtstamp)
545 return phydev->drv->hwtstamp(phydev, ifr);
546 /* fall through */
547
dda93b48 548 default:
c6d6a511 549 return -EOPNOTSUPP;
00db8189 550 }
00db8189 551}
680e9fe9 552EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 553
b3df0da8
RD
554/**
555 * phy_start_aneg - start auto-negotiation for this PHY device
556 * @phydev: the phy_device struct
e1393456 557 *
b3df0da8
RD
558 * Description: Sanitizes the settings (if we're not autonegotiating
559 * them), and then calls the driver's config_aneg function.
560 * If the PHYCONTROL Layer is operating, we change the state to
561 * reflect the beginning of Auto-negotiation or forcing.
e1393456
AF
562 */
563int phy_start_aneg(struct phy_device *phydev)
564{
565 int err;
566
35b5f6b1 567 mutex_lock(&phydev->lock);
e1393456
AF
568
569 if (AUTONEG_DISABLE == phydev->autoneg)
570 phy_sanitize_settings(phydev);
571
9b3320ef
BH
572 /* Invalidate LP advertising flags */
573 phydev->lp_advertising = 0;
574
e1393456 575 err = phydev->drv->config_aneg(phydev);
e1393456
AF
576 if (err < 0)
577 goto out_unlock;
578
579 if (phydev->state != PHY_HALTED) {
580 if (AUTONEG_ENABLE == phydev->autoneg) {
581 phydev->state = PHY_AN;
582 phydev->link_timeout = PHY_AN_TIMEOUT;
583 } else {
584 phydev->state = PHY_FORCING;
585 phydev->link_timeout = PHY_FORCE_TIMEOUT;
586 }
587 }
588
589out_unlock:
35b5f6b1 590 mutex_unlock(&phydev->lock);
e1393456
AF
591 return err;
592}
593EXPORT_SYMBOL(phy_start_aneg);
594
b3df0da8
RD
595/**
596 * phy_start_machine - start PHY state machine tracking
597 * @phydev: the phy_device struct
00db8189 598 *
b3df0da8 599 * Description: The PHY infrastructure can run a state machine
00db8189
AF
600 * which tracks whether the PHY is starting up, negotiating,
601 * etc. This function starts the timer which tracks the state
29935aeb
SS
602 * of the PHY. If you want to maintain your own state machine,
603 * do not call this function.
b3df0da8 604 */
29935aeb 605void phy_start_machine(struct phy_device *phydev)
00db8189 606{
bbb47bde 607 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
00db8189
AF
608}
609
3c293f4e
AL
610/**
611 * phy_trigger_machine - trigger the state machine to run
612 *
613 * @phydev: the phy_device struct
614 *
615 * Description: There has been a change in state which requires that the
616 * state machine runs.
617 */
618
619static void phy_trigger_machine(struct phy_device *phydev)
620{
621 cancel_delayed_work_sync(&phydev->state_queue);
622 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
623}
624
b3df0da8
RD
625/**
626 * phy_stop_machine - stop the PHY state machine tracking
627 * @phydev: target phy_device struct
00db8189 628 *
b3df0da8 629 * Description: Stops the state machine timer, sets the state to UP
817acf5e 630 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
631 * phy_detach.
632 */
633void phy_stop_machine(struct phy_device *phydev)
634{
a390d1f3 635 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 636
35b5f6b1 637 mutex_lock(&phydev->lock);
00db8189
AF
638 if (phydev->state > PHY_UP)
639 phydev->state = PHY_UP;
35b5f6b1 640 mutex_unlock(&phydev->lock);
00db8189
AF
641}
642
b3df0da8
RD
643/**
644 * phy_error - enter HALTED state for this PHY device
645 * @phydev: target phy_device struct
00db8189
AF
646 *
647 * Moves the PHY to the HALTED state in response to a read
648 * or write error, and tells the controller the link is down.
649 * Must not be called from interrupt context, or while the
650 * phydev->lock is held.
651 */
9b9a8bfc 652static void phy_error(struct phy_device *phydev)
00db8189 653{
35b5f6b1 654 mutex_lock(&phydev->lock);
00db8189 655 phydev->state = PHY_HALTED;
35b5f6b1 656 mutex_unlock(&phydev->lock);
3c293f4e
AL
657
658 phy_trigger_machine(phydev);
00db8189
AF
659}
660
b3df0da8
RD
661/**
662 * phy_interrupt - PHY interrupt handler
663 * @irq: interrupt line
664 * @phy_dat: phy_device pointer
e1393456 665 *
b3df0da8 666 * Description: When a PHY interrupt occurs, the handler disables
e1393456
AF
667 * interrupts, and schedules a work task to clear the interrupt.
668 */
7d12e780 669static irqreturn_t phy_interrupt(int irq, void *phy_dat)
e1393456
AF
670{
671 struct phy_device *phydev = phy_dat;
672
3c3070d7
MR
673 if (PHY_HALTED == phydev->state)
674 return IRQ_NONE; /* It can't be ours. */
675
e1393456
AF
676 /* The MDIO bus is not allowed to be written in interrupt
677 * context, so we need to disable the irq here. A work
678 * queue will write the PHY to disable and clear the
2f53e904
SS
679 * interrupt, and then reenable the irq line.
680 */
e1393456 681 disable_irq_nosync(irq);
0ac49527 682 atomic_inc(&phydev->irq_disable);
e1393456 683
bbb47bde 684 queue_work(system_power_efficient_wq, &phydev->phy_queue);
e1393456
AF
685
686 return IRQ_HANDLED;
687}
688
b3df0da8
RD
689/**
690 * phy_enable_interrupts - Enable the interrupts from the PHY side
691 * @phydev: target phy_device struct
692 */
89ff05ec 693static int phy_enable_interrupts(struct phy_device *phydev)
00db8189 694{
553fe92b 695 int err = phy_clear_interrupt(phydev);
00db8189 696
e1393456
AF
697 if (err < 0)
698 return err;
00db8189 699
553fe92b 700 return phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189 701}
00db8189 702
b3df0da8
RD
703/**
704 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
705 * @phydev: target phy_device struct
706 */
89ff05ec 707static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
708{
709 int err;
710
711 /* Disable PHY interrupts */
712 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
00db8189
AF
713 if (err)
714 goto phy_err;
715
716 /* Clear the interrupt */
717 err = phy_clear_interrupt(phydev);
00db8189
AF
718 if (err)
719 goto phy_err;
720
721 return 0;
722
723phy_err:
724 phy_error(phydev);
725
726 return err;
727}
e1393456 728
b3df0da8
RD
729/**
730 * phy_start_interrupts - request and enable interrupts for a PHY device
731 * @phydev: target phy_device struct
e1393456 732 *
b3df0da8
RD
733 * Description: Request the interrupt for the given PHY.
734 * If this fails, then we set irq to PHY_POLL.
e1393456 735 * Otherwise, we enable the interrupts in the PHY.
e1393456 736 * This should only be called with a valid IRQ number.
b3df0da8 737 * Returns 0 on success or < 0 on error.
e1393456
AF
738 */
739int phy_start_interrupts(struct phy_device *phydev)
740{
0ac49527 741 atomic_set(&phydev->irq_disable, 0);
c3e70edd
XH
742 if (request_irq(phydev->irq, phy_interrupt,
743 IRQF_SHARED,
744 "phy_interrupt",
745 phydev) < 0) {
8d242488 746 pr_warn("%s: Can't get IRQ %d (PHY)\n",
e5a03bfd 747 phydev->mdio.bus->name, phydev->irq);
e1393456
AF
748 phydev->irq = PHY_POLL;
749 return 0;
750 }
751
e62a768f 752 return phy_enable_interrupts(phydev);
e1393456
AF
753}
754EXPORT_SYMBOL(phy_start_interrupts);
755
b3df0da8
RD
756/**
757 * phy_stop_interrupts - disable interrupts from a PHY device
758 * @phydev: target phy_device struct
759 */
e1393456
AF
760int phy_stop_interrupts(struct phy_device *phydev)
761{
553fe92b 762 int err = phy_disable_interrupts(phydev);
e1393456
AF
763
764 if (err)
765 phy_error(phydev);
766
0ac49527
MR
767 free_irq(phydev->irq, phydev);
768
2f53e904 769 /* Cannot call flush_scheduled_work() here as desired because
0ac49527
MR
770 * of rtnl_lock(), but we do not really care about what would
771 * be done, except from enable_irq(), so cancel any work
772 * possibly pending and take care of the matter below.
3c3070d7 773 */
28e53bdd 774 cancel_work_sync(&phydev->phy_queue);
2f53e904 775 /* If work indeed has been cancelled, disable_irq() will have
0ac49527
MR
776 * been left unbalanced from phy_interrupt() and enable_irq()
777 * has to be called so that other devices on the line work.
778 */
779 while (atomic_dec_return(&phydev->irq_disable) >= 0)
780 enable_irq(phydev->irq);
e1393456
AF
781
782 return err;
783}
784EXPORT_SYMBOL(phy_stop_interrupts);
785
b3df0da8
RD
786/**
787 * phy_change - Scheduled by the phy_interrupt/timer to handle PHY changes
788 * @work: work_struct that describes the work to be done
789 */
5ea94e76 790void phy_change(struct work_struct *work)
e1393456 791{
c4028958
DH
792 struct phy_device *phydev =
793 container_of(work, struct phy_device, phy_queue);
e1393456 794
deccd16f
FF
795 if (phy_interrupt_is_valid(phydev)) {
796 if (phydev->drv->did_interrupt &&
797 !phydev->drv->did_interrupt(phydev))
798 goto ignore;
a8729eb3 799
deccd16f
FF
800 if (phy_disable_interrupts(phydev))
801 goto phy_err;
802 }
e1393456 803
35b5f6b1 804 mutex_lock(&phydev->lock);
e1393456
AF
805 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
806 phydev->state = PHY_CHANGELINK;
35b5f6b1 807 mutex_unlock(&phydev->lock);
e1393456 808
deccd16f
FF
809 if (phy_interrupt_is_valid(phydev)) {
810 atomic_dec(&phydev->irq_disable);
811 enable_irq(phydev->irq);
e1393456 812
deccd16f
FF
813 /* Reenable interrupts */
814 if (PHY_HALTED != phydev->state &&
815 phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED))
816 goto irq_enable_err;
817 }
e1393456 818
a390d1f3 819 /* reschedule state queue work to run as soon as possible */
3c293f4e 820 phy_trigger_machine(phydev);
e1393456
AF
821 return;
822
a8729eb3
AG
823ignore:
824 atomic_dec(&phydev->irq_disable);
825 enable_irq(phydev->irq);
826 return;
827
e1393456
AF
828irq_enable_err:
829 disable_irq(phydev->irq);
0ac49527 830 atomic_inc(&phydev->irq_disable);
e1393456
AF
831phy_err:
832 phy_error(phydev);
833}
834
b3df0da8
RD
835/**
836 * phy_stop - Bring down the PHY link, and stop checking the status
837 * @phydev: target phy_device struct
838 */
e1393456
AF
839void phy_stop(struct phy_device *phydev)
840{
35b5f6b1 841 mutex_lock(&phydev->lock);
e1393456
AF
842
843 if (PHY_HALTED == phydev->state)
844 goto out_unlock;
845
2c7b4921 846 if (phy_interrupt_is_valid(phydev)) {
e1393456
AF
847 /* Disable PHY Interrupts */
848 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 849
3c3070d7
MR
850 /* Clear any pending interrupts */
851 phy_clear_interrupt(phydev);
852 }
e1393456 853
6daf6531
MR
854 phydev->state = PHY_HALTED;
855
e1393456 856out_unlock:
35b5f6b1 857 mutex_unlock(&phydev->lock);
3c3070d7 858
2f53e904 859 /* Cannot call flush_scheduled_work() here as desired because
3c3070d7
MR
860 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
861 * will not reenable interrupts.
862 */
e1393456 863}
2f53e904 864EXPORT_SYMBOL(phy_stop);
e1393456 865
b3df0da8
RD
866/**
867 * phy_start - start or restart a PHY device
868 * @phydev: target phy_device struct
e1393456 869 *
b3df0da8 870 * Description: Indicates the attached device's readiness to
e1393456
AF
871 * handle PHY-related work. Used during startup to start the
872 * PHY, and after a call to phy_stop() to resume operation.
873 * Also used to indicate the MDIO bus has cleared an error
874 * condition.
875 */
876void phy_start(struct phy_device *phydev)
877{
c15e10e7
TB
878 bool do_resume = false;
879 int err = 0;
880
35b5f6b1 881 mutex_lock(&phydev->lock);
e1393456
AF
882
883 switch (phydev->state) {
e109374f
FF
884 case PHY_STARTING:
885 phydev->state = PHY_PENDING;
886 break;
887 case PHY_READY:
888 phydev->state = PHY_UP;
889 break;
890 case PHY_HALTED:
c15e10e7 891 /* make sure interrupts are re-enabled for the PHY */
84a527a4
SX
892 if (phydev->irq != PHY_POLL) {
893 err = phy_enable_interrupts(phydev);
894 if (err < 0)
895 break;
896 }
c15e10e7 897
e109374f 898 phydev->state = PHY_RESUMING;
c15e10e7
TB
899 do_resume = true;
900 break;
e109374f
FF
901 default:
902 break;
e1393456 903 }
35b5f6b1 904 mutex_unlock(&phydev->lock);
c15e10e7
TB
905
906 /* if phy was suspended, bring the physical link up again */
907 if (do_resume)
908 phy_resume(phydev);
3c293f4e
AL
909
910 phy_trigger_machine(phydev);
e1393456 911}
e1393456 912EXPORT_SYMBOL(phy_start);
67c4f3fa 913
35b5f6b1
NC
914/**
915 * phy_state_machine - Handle the state machine
916 * @work: work_struct that describes the work to be done
35b5f6b1 917 */
4f9c85a1 918void phy_state_machine(struct work_struct *work)
00db8189 919{
bf6aede7 920 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 921 struct phy_device *phydev =
a390d1f3 922 container_of(dwork, struct phy_device, state_queue);
c15e10e7 923 bool needs_aneg = false, do_suspend = false;
3e2186e0 924 enum phy_state old_state;
00db8189 925 int err = 0;
11e122cb 926 int old_link;
00db8189 927
35b5f6b1 928 mutex_lock(&phydev->lock);
00db8189 929
3e2186e0
FF
930 old_state = phydev->state;
931
2b8f2a28
DM
932 if (phydev->drv->link_change_notify)
933 phydev->drv->link_change_notify(phydev);
934
e109374f
FF
935 switch (phydev->state) {
936 case PHY_DOWN:
937 case PHY_STARTING:
938 case PHY_READY:
939 case PHY_PENDING:
940 break;
941 case PHY_UP:
6e14a5ee 942 needs_aneg = true;
00db8189 943
e109374f
FF
944 phydev->link_timeout = PHY_AN_TIMEOUT;
945
946 break;
947 case PHY_AN:
948 err = phy_read_status(phydev);
e109374f 949 if (err < 0)
00db8189 950 break;
6b655529 951
2f53e904 952 /* If the link is down, give up on negotiation for now */
e109374f
FF
953 if (!phydev->link) {
954 phydev->state = PHY_NOLINK;
955 netif_carrier_off(phydev->attached_dev);
956 phydev->adjust_link(phydev->attached_dev);
957 break;
958 }
6b655529 959
2f53e904 960 /* Check if negotiation is done. Break if there's an error */
e109374f
FF
961 err = phy_aneg_done(phydev);
962 if (err < 0)
963 break;
6b655529 964
e109374f
FF
965 /* If AN is done, we're running */
966 if (err > 0) {
967 phydev->state = PHY_RUNNING;
968 netif_carrier_on(phydev->attached_dev);
969 phydev->adjust_link(phydev->attached_dev);
00db8189 970
fa8cddaf 971 } else if (0 == phydev->link_timeout--)
6e14a5ee 972 needs_aneg = true;
e109374f
FF
973 break;
974 case PHY_NOLINK:
321beec5
AL
975 if (phy_interrupt_is_valid(phydev))
976 break;
977
e109374f 978 err = phy_read_status(phydev);
e109374f 979 if (err)
00db8189 980 break;
00db8189 981
e109374f 982 if (phydev->link) {
e46e08b8
BK
983 if (AUTONEG_ENABLE == phydev->autoneg) {
984 err = phy_aneg_done(phydev);
985 if (err < 0)
986 break;
987
988 if (!err) {
989 phydev->state = PHY_AN;
990 phydev->link_timeout = PHY_AN_TIMEOUT;
991 break;
992 }
993 }
e109374f
FF
994 phydev->state = PHY_RUNNING;
995 netif_carrier_on(phydev->attached_dev);
996 phydev->adjust_link(phydev->attached_dev);
997 }
998 break;
999 case PHY_FORCING:
1000 err = genphy_update_link(phydev);
e109374f 1001 if (err)
00db8189 1002 break;
00db8189 1003
e109374f
FF
1004 if (phydev->link) {
1005 phydev->state = PHY_RUNNING;
1006 netif_carrier_on(phydev->attached_dev);
1007 } else {
1008 if (0 == phydev->link_timeout--)
6e14a5ee 1009 needs_aneg = true;
e109374f 1010 }
00db8189 1011
e109374f
FF
1012 phydev->adjust_link(phydev->attached_dev);
1013 break;
1014 case PHY_RUNNING:
d5c3d846
FF
1015 /* Only register a CHANGE if we are polling and link changed
1016 * since latest checking.
e109374f 1017 */
d5c3d846 1018 if (phydev->irq == PHY_POLL) {
11e122cb
SX
1019 old_link = phydev->link;
1020 err = phy_read_status(phydev);
1021 if (err)
1022 break;
1023
1024 if (old_link != phydev->link)
1025 phydev->state = PHY_CHANGELINK;
1026 }
e109374f
FF
1027 break;
1028 case PHY_CHANGELINK:
1029 err = phy_read_status(phydev);
e109374f 1030 if (err)
00db8189 1031 break;
00db8189 1032
e109374f
FF
1033 if (phydev->link) {
1034 phydev->state = PHY_RUNNING;
1035 netif_carrier_on(phydev->attached_dev);
1036 } else {
1037 phydev->state = PHY_NOLINK;
1038 netif_carrier_off(phydev->attached_dev);
1039 }
00db8189 1040
e109374f 1041 phydev->adjust_link(phydev->attached_dev);
00db8189 1042
e109374f
FF
1043 if (phy_interrupt_is_valid(phydev))
1044 err = phy_config_interrupt(phydev,
2f53e904 1045 PHY_INTERRUPT_ENABLED);
e109374f
FF
1046 break;
1047 case PHY_HALTED:
1048 if (phydev->link) {
1049 phydev->link = 0;
1050 netif_carrier_off(phydev->attached_dev);
00db8189 1051 phydev->adjust_link(phydev->attached_dev);
6e14a5ee 1052 do_suspend = true;
e109374f
FF
1053 }
1054 break;
1055 case PHY_RESUMING:
e109374f
FF
1056 if (AUTONEG_ENABLE == phydev->autoneg) {
1057 err = phy_aneg_done(phydev);
1058 if (err < 0)
00db8189
AF
1059 break;
1060
e109374f 1061 /* err > 0 if AN is done.
2f53e904
SS
1062 * Otherwise, it's 0, and we're still waiting for AN
1063 */
e109374f 1064 if (err > 0) {
42caa074
WF
1065 err = phy_read_status(phydev);
1066 if (err)
1067 break;
1068
1069 if (phydev->link) {
1070 phydev->state = PHY_RUNNING;
1071 netif_carrier_on(phydev->attached_dev);
2f53e904 1072 } else {
42caa074 1073 phydev->state = PHY_NOLINK;
2f53e904 1074 }
42caa074 1075 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
1076 } else {
1077 phydev->state = PHY_AN;
1078 phydev->link_timeout = PHY_AN_TIMEOUT;
42caa074 1079 }
e109374f
FF
1080 } else {
1081 err = phy_read_status(phydev);
1082 if (err)
1083 break;
1084
1085 if (phydev->link) {
1086 phydev->state = PHY_RUNNING;
1087 netif_carrier_on(phydev->attached_dev);
2f53e904 1088 } else {
e109374f 1089 phydev->state = PHY_NOLINK;
2f53e904 1090 }
e109374f
FF
1091 phydev->adjust_link(phydev->attached_dev);
1092 }
1093 break;
00db8189
AF
1094 }
1095
35b5f6b1 1096 mutex_unlock(&phydev->lock);
00db8189
AF
1097
1098 if (needs_aneg)
1099 err = phy_start_aneg(phydev);
6e14a5ee 1100 else if (do_suspend)
be9dad1f
SH
1101 phy_suspend(phydev);
1102
00db8189
AF
1103 if (err < 0)
1104 phy_error(phydev);
1105
72ba48be
AL
1106 phydev_dbg(phydev, "PHY state change %s -> %s\n",
1107 phy_state_to_str(old_state),
1108 phy_state_to_str(phydev->state));
3e2186e0 1109
d5c3d846
FF
1110 /* Only re-schedule a PHY state machine change if we are polling the
1111 * PHY, if PHY_IGNORE_INTERRUPT is set, then we will be moving
1112 * between states from phy_mac_interrupt()
1113 */
1114 if (phydev->irq == PHY_POLL)
1115 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
1116 PHY_STATE_TIME * HZ);
35b5f6b1 1117}
a59a4d19 1118
5ea94e76
FF
1119void phy_mac_interrupt(struct phy_device *phydev, int new_link)
1120{
5ea94e76 1121 phydev->link = new_link;
deccd16f
FF
1122
1123 /* Trigger a state machine change */
1124 queue_work(system_power_efficient_wq, &phydev->phy_queue);
5ea94e76
FF
1125}
1126EXPORT_SYMBOL(phy_mac_interrupt);
1127
a59a4d19
GC
1128static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
1129 int addr)
1130{
1131 /* Write the desired MMD Devad */
1132 bus->write(bus, addr, MII_MMD_CTRL, devad);
1133
1134 /* Write the desired MMD register address */
1135 bus->write(bus, addr, MII_MMD_DATA, prtad);
1136
1137 /* Select the Function : DATA with no post increment */
1138 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
1139}
1140
1141/**
1142 * phy_read_mmd_indirect - reads data from the MMD registers
0c1d77df 1143 * @phydev: The PHY device bus
a59a4d19
GC
1144 * @prtad: MMD Address
1145 * @devad: MMD DEVAD
a59a4d19
GC
1146 *
1147 * Description: it reads data from the MMD registers (clause 22 to access to
1148 * clause 45) of the specified phy address.
1149 * To read these register we have:
1150 * 1) Write reg 13 // DEVAD
1151 * 2) Write reg 14 // MMD Address
1152 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
1153 * 3) Read reg 14 // Read MMD data
1154 */
053e7e16 1155int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad)
a59a4d19 1156{
0c1d77df 1157 struct phy_driver *phydrv = phydev->drv;
e5a03bfd 1158 int addr = phydev->mdio.addr;
0c1d77df 1159 int value = -1;
a59a4d19 1160
ef899c07 1161 if (!phydrv->read_mmd_indirect) {
e5a03bfd 1162 struct mii_bus *bus = phydev->mdio.bus;
05a7f582
RK
1163
1164 mutex_lock(&bus->mdio_lock);
1165 mmd_phy_indirect(bus, prtad, devad, addr);
0c1d77df
VB
1166
1167 /* Read the content of the MMD's selected register */
05a7f582
RK
1168 value = bus->read(bus, addr, MII_MMD_DATA);
1169 mutex_unlock(&bus->mdio_lock);
0c1d77df
VB
1170 } else {
1171 value = phydrv->read_mmd_indirect(phydev, prtad, devad, addr);
1172 }
1173 return value;
a59a4d19 1174}
66ce7fb9 1175EXPORT_SYMBOL(phy_read_mmd_indirect);
a59a4d19
GC
1176
1177/**
1178 * phy_write_mmd_indirect - writes data to the MMD registers
0c1d77df 1179 * @phydev: The PHY device
a59a4d19
GC
1180 * @prtad: MMD Address
1181 * @devad: MMD DEVAD
a59a4d19
GC
1182 * @data: data to write in the MMD register
1183 *
1184 * Description: Write data from the MMD registers of the specified
1185 * phy address.
1186 * To write these register we have:
1187 * 1) Write reg 13 // DEVAD
1188 * 2) Write reg 14 // MMD Address
1189 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
1190 * 3) Write reg 14 // Write MMD data
1191 */
66ce7fb9 1192void phy_write_mmd_indirect(struct phy_device *phydev, int prtad,
053e7e16 1193 int devad, u32 data)
a59a4d19 1194{
0c1d77df 1195 struct phy_driver *phydrv = phydev->drv;
e5a03bfd 1196 int addr = phydev->mdio.addr;
a59a4d19 1197
ef899c07 1198 if (!phydrv->write_mmd_indirect) {
e5a03bfd 1199 struct mii_bus *bus = phydev->mdio.bus;
05a7f582
RK
1200
1201 mutex_lock(&bus->mdio_lock);
1202 mmd_phy_indirect(bus, prtad, devad, addr);
0c1d77df
VB
1203
1204 /* Write the data into MMD's selected register */
05a7f582
RK
1205 bus->write(bus, addr, MII_MMD_DATA, data);
1206 mutex_unlock(&bus->mdio_lock);
0c1d77df
VB
1207 } else {
1208 phydrv->write_mmd_indirect(phydev, prtad, devad, addr, data);
1209 }
a59a4d19 1210}
66ce7fb9 1211EXPORT_SYMBOL(phy_write_mmd_indirect);
a59a4d19 1212
a59a4d19
GC
1213/**
1214 * phy_init_eee - init and check the EEE feature
1215 * @phydev: target phy_device struct
1216 * @clk_stop_enable: PHY may stop the clock during LPI
1217 *
1218 * Description: it checks if the Energy-Efficient Ethernet (EEE)
1219 * is supported by looking at the MMD registers 3.20 and 7.60/61
1220 * and it programs the MMD register 3.0 setting the "Clock stop enable"
1221 * bit if required.
1222 */
1223int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
1224{
a59a4d19
GC
1225 /* According to 802.3az,the EEE is supported only in full duplex-mode.
1226 * Also EEE feature is active when core is operating with MII, GMII
7e140696
FF
1227 * or RGMII (all kinds). Internal PHYs are also allowed to proceed and
1228 * should return an error if they do not support EEE.
a59a4d19
GC
1229 */
1230 if ((phydev->duplex == DUPLEX_FULL) &&
1231 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
1232 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
32a64161 1233 phy_interface_is_rgmii(phydev) ||
a9f63095 1234 phy_is_internal(phydev))) {
a59a4d19
GC
1235 int eee_lp, eee_cap, eee_adv;
1236 u32 lp, cap, adv;
4ae6e50c 1237 int status;
a59a4d19
GC
1238
1239 /* Read phy status to properly get the right settings */
1240 status = phy_read_status(phydev);
1241 if (status)
1242 return status;
1243
1244 /* First check if the EEE ability is supported */
0c1d77df 1245 eee_cap = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE,
053e7e16 1246 MDIO_MMD_PCS);
7a4cecf7
GC
1247 if (eee_cap <= 0)
1248 goto eee_exit_err;
a59a4d19 1249
b32607dd 1250 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19 1251 if (!cap)
7a4cecf7 1252 goto eee_exit_err;
a59a4d19
GC
1253
1254 /* Check which link settings negotiated and verify it in
1255 * the EEE advertising registers.
1256 */
0c1d77df 1257 eee_lp = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE,
053e7e16 1258 MDIO_MMD_AN);
7a4cecf7
GC
1259 if (eee_lp <= 0)
1260 goto eee_exit_err;
a59a4d19 1261
0c1d77df 1262 eee_adv = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV,
053e7e16 1263 MDIO_MMD_AN);
7a4cecf7
GC
1264 if (eee_adv <= 0)
1265 goto eee_exit_err;
a59a4d19 1266
b32607dd
AB
1267 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
1268 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
54da5a8b 1269 if (!phy_check_valid(phydev->speed, phydev->duplex, lp & adv))
7a4cecf7 1270 goto eee_exit_err;
a59a4d19
GC
1271
1272 if (clk_stop_enable) {
1273 /* Configure the PHY to stop receiving xMII
1274 * clock while it is signaling LPI.
1275 */
0c1d77df 1276 int val = phy_read_mmd_indirect(phydev, MDIO_CTRL1,
053e7e16 1277 MDIO_MMD_PCS);
a59a4d19
GC
1278 if (val < 0)
1279 return val;
1280
1281 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
0c1d77df 1282 phy_write_mmd_indirect(phydev, MDIO_CTRL1,
053e7e16 1283 MDIO_MMD_PCS, val);
a59a4d19
GC
1284 }
1285
e62a768f 1286 return 0; /* EEE supported */
a59a4d19 1287 }
7a4cecf7 1288eee_exit_err:
e62a768f 1289 return -EPROTONOSUPPORT;
a59a4d19
GC
1290}
1291EXPORT_SYMBOL(phy_init_eee);
1292
1293/**
1294 * phy_get_eee_err - report the EEE wake error count
1295 * @phydev: target phy_device struct
1296 *
1297 * Description: it is to report the number of time where the PHY
1298 * failed to complete its normal wake sequence.
1299 */
1300int phy_get_eee_err(struct phy_device *phydev)
1301{
053e7e16 1302 return phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_WK_ERR, MDIO_MMD_PCS);
a59a4d19
GC
1303}
1304EXPORT_SYMBOL(phy_get_eee_err);
1305
1306/**
1307 * phy_ethtool_get_eee - get EEE supported and status
1308 * @phydev: target phy_device struct
1309 * @data: ethtool_eee data
1310 *
1311 * Description: it reportes the Supported/Advertisement/LP Advertisement
1312 * capabilities.
1313 */
1314int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1315{
1316 int val;
1317
1318 /* Get Supported EEE */
053e7e16 1319 val = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE, MDIO_MMD_PCS);
a59a4d19
GC
1320 if (val < 0)
1321 return val;
b32607dd 1322 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
a59a4d19
GC
1323
1324 /* Get advertisement EEE */
053e7e16 1325 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN);
a59a4d19
GC
1326 if (val < 0)
1327 return val;
b32607dd 1328 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1329
1330 /* Get LP advertisement EEE */
053e7e16 1331 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE, MDIO_MMD_AN);
a59a4d19
GC
1332 if (val < 0)
1333 return val;
b32607dd 1334 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1335
1336 return 0;
1337}
1338EXPORT_SYMBOL(phy_ethtool_get_eee);
1339
1340/**
1341 * phy_ethtool_set_eee - set EEE supported and status
1342 * @phydev: target phy_device struct
1343 * @data: ethtool_eee data
1344 *
1345 * Description: it is to program the Advertisement EEE register.
1346 */
1347int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1348{
553fe92b 1349 int val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19 1350
053e7e16 1351 phy_write_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN, val);
a59a4d19
GC
1352
1353 return 0;
1354}
1355EXPORT_SYMBOL(phy_ethtool_set_eee);
42e836eb
MS
1356
1357int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1358{
1359 if (phydev->drv->set_wol)
1360 return phydev->drv->set_wol(phydev, wol);
1361
1362 return -EOPNOTSUPP;
1363}
1364EXPORT_SYMBOL(phy_ethtool_set_wol);
1365
1366void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1367{
1368 if (phydev->drv->get_wol)
1369 phydev->drv->get_wol(phydev, wol);
1370}
1371EXPORT_SYMBOL(phy_ethtool_get_wol);
9d9a77ce
PR
1372
1373int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1374 struct ethtool_link_ksettings *cmd)
1375{
1376 struct phy_device *phydev = ndev->phydev;
1377
1378 if (!phydev)
1379 return -ENODEV;
1380
1381 return phy_ethtool_ksettings_get(phydev, cmd);
1382}
1383EXPORT_SYMBOL(phy_ethtool_get_link_ksettings);
1384
1385int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1386 const struct ethtool_link_ksettings *cmd)
1387{
1388 struct phy_device *phydev = ndev->phydev;
1389
1390 if (!phydev)
1391 return -ENODEV;
1392
1393 return phy_ethtool_ksettings_set(phydev, cmd);
1394}
1395EXPORT_SYMBOL(phy_ethtool_set_link_ksettings);