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2f53e904 1/* Framework for configuring and reading PHY devices
00db8189
AF
2 * Based on code in sungem_phy.c and gianfar_phy.c
3 *
4 * Author: Andy Fleming
5 *
6 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 7 * Copyright (c) 2006, 2007 Maciej W. Rozycki
00db8189
AF
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
8d242488
JP
15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
00db8189 18#include <linux/kernel.h>
00db8189
AF
19#include <linux/string.h>
20#include <linux/errno.h>
21#include <linux/unistd.h>
00db8189 22#include <linux/interrupt.h>
00db8189
AF
23#include <linux/delay.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/skbuff.h>
00db8189
AF
27#include <linux/mm.h>
28#include <linux/module.h>
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AF
29#include <linux/mii.h>
30#include <linux/ethtool.h>
31#include <linux/phy.h>
3c3070d7
MR
32#include <linux/timer.h>
33#include <linux/workqueue.h>
a59a4d19 34#include <linux/mdio.h>
2f53e904
SS
35#include <linux/io.h>
36#include <linux/uaccess.h>
60063497 37#include <linux/atomic.h>
2f53e904 38
00db8189 39#include <asm/irq.h>
00db8189 40
766d1d38
FF
41static const char *phy_speed_to_str(int speed)
42{
43 switch (speed) {
44 case SPEED_10:
45 return "10Mbps";
46 case SPEED_100:
47 return "100Mbps";
48 case SPEED_1000:
49 return "1Gbps";
50 case SPEED_2500:
51 return "2.5Gbps";
52 case SPEED_10000:
53 return "10Gbps";
54 case SPEED_UNKNOWN:
55 return "Unknown";
56 default:
57 return "Unsupported (update phy.c)";
58 }
59}
60
b3df0da8
RD
61/**
62 * phy_print_status - Convenience function to print out the current phy status
63 * @phydev: the phy_device struct
e1393456
AF
64 */
65void phy_print_status(struct phy_device *phydev)
66{
2f53e904 67 if (phydev->link) {
df40cc88 68 netdev_info(phydev->attached_dev,
766d1d38
FF
69 "Link is Up - %s/%s - flow control %s\n",
70 phy_speed_to_str(phydev->speed),
df40cc88
FF
71 DUPLEX_FULL == phydev->duplex ? "Full" : "Half",
72 phydev->pause ? "rx/tx" : "off");
2f53e904 73 } else {
43b6329f 74 netdev_info(phydev->attached_dev, "Link is Down\n");
2f53e904 75 }
e1393456
AF
76}
77EXPORT_SYMBOL(phy_print_status);
00db8189 78
b3df0da8
RD
79/**
80 * phy_clear_interrupt - Ack the phy device's interrupt
81 * @phydev: the phy_device struct
82 *
83 * If the @phydev driver has an ack_interrupt function, call it to
84 * ack and clear the phy device's interrupt.
85 *
ad033506 86 * Returns 0 on success or < 0 on error.
b3df0da8 87 */
89ff05ec 88static int phy_clear_interrupt(struct phy_device *phydev)
00db8189 89{
00db8189 90 if (phydev->drv->ack_interrupt)
e62a768f 91 return phydev->drv->ack_interrupt(phydev);
00db8189 92
e62a768f 93 return 0;
00db8189
AF
94}
95
b3df0da8
RD
96/**
97 * phy_config_interrupt - configure the PHY device for the requested interrupts
98 * @phydev: the phy_device struct
99 * @interrupts: interrupt flags to configure for this @phydev
100 *
ad033506 101 * Returns 0 on success or < 0 on error.
b3df0da8 102 */
89ff05ec 103static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
00db8189 104{
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AF
105 phydev->interrupts = interrupts;
106 if (phydev->drv->config_intr)
e62a768f 107 return phydev->drv->config_intr(phydev);
00db8189 108
e62a768f 109 return 0;
00db8189
AF
110}
111
112
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RD
113/**
114 * phy_aneg_done - return auto-negotiation status
115 * @phydev: target phy_device struct
00db8189 116 *
76a423a3
FF
117 * Description: Return the auto-negotiation status from this @phydev
118 * Returns > 0 on success or < 0 on error. 0 means that auto-negotiation
119 * is still pending.
00db8189
AF
120 */
121static inline int phy_aneg_done(struct phy_device *phydev)
122{
76a423a3
FF
123 if (phydev->drv->aneg_done)
124 return phydev->drv->aneg_done(phydev);
125
a9fa6e6a 126 return genphy_aneg_done(phydev);
00db8189
AF
127}
128
00db8189 129/* A structure for mapping a particular speed and duplex
2f53e904
SS
130 * combination to a particular SUPPORTED and ADVERTISED value
131 */
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AF
132struct phy_setting {
133 int speed;
134 int duplex;
135 u32 setting;
136};
137
138/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 139static const struct phy_setting settings[] = {
00db8189 140 {
3e707706
LT
141 .speed = SPEED_10000,
142 .duplex = DUPLEX_FULL,
143 .setting = SUPPORTED_10000baseKR_Full,
144 },
145 {
146 .speed = SPEED_10000,
147 .duplex = DUPLEX_FULL,
148 .setting = SUPPORTED_10000baseKX4_Full,
149 },
150 {
151 .speed = SPEED_10000,
00db8189
AF
152 .duplex = DUPLEX_FULL,
153 .setting = SUPPORTED_10000baseT_Full,
154 },
3e707706
LT
155 {
156 .speed = SPEED_2500,
157 .duplex = DUPLEX_FULL,
158 .setting = SUPPORTED_2500baseX_Full,
159 },
160 {
161 .speed = SPEED_1000,
162 .duplex = DUPLEX_FULL,
163 .setting = SUPPORTED_1000baseKX_Full,
164 },
00db8189
AF
165 {
166 .speed = SPEED_1000,
167 .duplex = DUPLEX_FULL,
168 .setting = SUPPORTED_1000baseT_Full,
169 },
170 {
171 .speed = SPEED_1000,
172 .duplex = DUPLEX_HALF,
173 .setting = SUPPORTED_1000baseT_Half,
174 },
175 {
176 .speed = SPEED_100,
177 .duplex = DUPLEX_FULL,
178 .setting = SUPPORTED_100baseT_Full,
179 },
180 {
181 .speed = SPEED_100,
182 .duplex = DUPLEX_HALF,
183 .setting = SUPPORTED_100baseT_Half,
184 },
185 {
186 .speed = SPEED_10,
187 .duplex = DUPLEX_FULL,
188 .setting = SUPPORTED_10baseT_Full,
189 },
190 {
191 .speed = SPEED_10,
192 .duplex = DUPLEX_HALF,
193 .setting = SUPPORTED_10baseT_Half,
194 },
195};
196
ff8ac609 197#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 198
b3df0da8
RD
199/**
200 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
201 * @speed: speed to match
202 * @duplex: duplex to match
00db8189 203 *
b3df0da8 204 * Description: Searches the settings array for the setting which
00db8189
AF
205 * matches the desired speed and duplex, and returns the index
206 * of that setting. Returns the index of the last setting if
207 * none of the others match.
208 */
4ae6e50c 209static inline unsigned int phy_find_setting(int speed, int duplex)
00db8189 210{
4ae6e50c 211 unsigned int idx = 0;
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AF
212
213 while (idx < ARRAY_SIZE(settings) &&
2f53e904 214 (settings[idx].speed != speed || settings[idx].duplex != duplex))
00db8189
AF
215 idx++;
216
217 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
218}
219
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RD
220/**
221 * phy_find_valid - find a PHY setting that matches the requested features mask
222 * @idx: The first index in settings[] to search
223 * @features: A mask of the valid settings
00db8189 224 *
b3df0da8 225 * Description: Returns the index of the first valid setting less
00db8189
AF
226 * than or equal to the one pointed to by idx, as determined by
227 * the mask in features. Returns the index of the last setting
228 * if nothing else matches.
229 */
4ae6e50c 230static inline unsigned int phy_find_valid(unsigned int idx, u32 features)
00db8189
AF
231{
232 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
233 idx++;
234
235 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
236}
237
b3df0da8
RD
238/**
239 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
240 * @phydev: the target phy_device struct
00db8189 241 *
b3df0da8 242 * Description: Make sure the PHY is set to supported speeds and
00db8189 243 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 244 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 245 */
89ff05ec 246static void phy_sanitize_settings(struct phy_device *phydev)
00db8189
AF
247{
248 u32 features = phydev->supported;
4ae6e50c 249 unsigned int idx;
00db8189
AF
250
251 /* Sanitize settings based on PHY capabilities */
252 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 253 phydev->autoneg = AUTONEG_DISABLE;
00db8189
AF
254
255 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
256 features);
257
258 phydev->speed = settings[idx].speed;
259 phydev->duplex = settings[idx].duplex;
260}
00db8189 261
b3df0da8
RD
262/**
263 * phy_ethtool_sset - generic ethtool sset function, handles all the details
264 * @phydev: target phy_device struct
265 * @cmd: ethtool_cmd
00db8189
AF
266 *
267 * A few notes about parameter checking:
268 * - We don't set port or transceiver, so we don't care what they
269 * were set to.
270 * - phy_start_aneg() will make sure forced settings are sane, and
271 * choose the next best ones from the ones selected, so we don't
b3df0da8 272 * care if ethtool tries to give us bad values.
00db8189
AF
273 */
274int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
275{
25db0338
DD
276 u32 speed = ethtool_cmd_speed(cmd);
277
00db8189
AF
278 if (cmd->phy_address != phydev->addr)
279 return -EINVAL;
280
2f53e904 281 /* We make sure that we don't pass unsupported values in to the PHY */
00db8189
AF
282 cmd->advertising &= phydev->supported;
283
284 /* Verify the settings we care about. */
285 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
286 return -EINVAL;
287
288 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
289 return -EINVAL;
290
8e95a202 291 if (cmd->autoneg == AUTONEG_DISABLE &&
25db0338
DD
292 ((speed != SPEED_1000 &&
293 speed != SPEED_100 &&
294 speed != SPEED_10) ||
8e95a202
JP
295 (cmd->duplex != DUPLEX_HALF &&
296 cmd->duplex != DUPLEX_FULL)))
00db8189
AF
297 return -EINVAL;
298
299 phydev->autoneg = cmd->autoneg;
300
25db0338 301 phydev->speed = speed;
00db8189
AF
302
303 phydev->advertising = cmd->advertising;
304
305 if (AUTONEG_ENABLE == cmd->autoneg)
306 phydev->advertising |= ADVERTISED_Autoneg;
307 else
308 phydev->advertising &= ~ADVERTISED_Autoneg;
309
310 phydev->duplex = cmd->duplex;
311
312 /* Restart the PHY */
313 phy_start_aneg(phydev);
314
315 return 0;
316}
9f6d55d0 317EXPORT_SYMBOL(phy_ethtool_sset);
00db8189
AF
318
319int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
320{
321 cmd->supported = phydev->supported;
322
323 cmd->advertising = phydev->advertising;
114002bc 324 cmd->lp_advertising = phydev->lp_advertising;
00db8189 325
70739497 326 ethtool_cmd_speed_set(cmd, phydev->speed);
00db8189 327 cmd->duplex = phydev->duplex;
c88838ce
FF
328 if (phydev->interface == PHY_INTERFACE_MODE_MOCA)
329 cmd->port = PORT_BNC;
330 else
331 cmd->port = PORT_MII;
00db8189 332 cmd->phy_address = phydev->addr;
4284b6a5
FF
333 cmd->transceiver = phy_is_internal(phydev) ?
334 XCVR_INTERNAL : XCVR_EXTERNAL;
00db8189
AF
335 cmd->autoneg = phydev->autoneg;
336
337 return 0;
338}
9f6d55d0 339EXPORT_SYMBOL(phy_ethtool_gset);
00db8189 340
b3df0da8
RD
341/**
342 * phy_mii_ioctl - generic PHY MII ioctl interface
343 * @phydev: the phy_device struct
00c7d920 344 * @ifr: &struct ifreq for socket ioctl's
b3df0da8
RD
345 * @cmd: ioctl cmd to execute
346 *
347 * Note that this function is currently incompatible with the
00db8189 348 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 349 * current state. Use at own risk.
00db8189 350 */
2f53e904 351int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd)
00db8189 352{
28b04113 353 struct mii_ioctl_data *mii_data = if_mii(ifr);
00db8189 354 u16 val = mii_data->val_in;
79ce0477 355 bool change_autoneg = false;
00db8189
AF
356
357 switch (cmd) {
358 case SIOCGMIIPHY:
359 mii_data->phy_id = phydev->addr;
c6d6a511
LB
360 /* fall through */
361
00db8189 362 case SIOCGMIIREG:
af1dc13e
PK
363 mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
364 mii_data->reg_num);
e62a768f 365 return 0;
00db8189
AF
366
367 case SIOCSMIIREG:
00db8189 368 if (mii_data->phy_id == phydev->addr) {
e109374f 369 switch (mii_data->reg_num) {
00db8189 370 case MII_BMCR:
79ce0477
BH
371 if ((val & (BMCR_RESET | BMCR_ANENABLE)) == 0) {
372 if (phydev->autoneg == AUTONEG_ENABLE)
373 change_autoneg = true;
00db8189 374 phydev->autoneg = AUTONEG_DISABLE;
79ce0477
BH
375 if (val & BMCR_FULLDPLX)
376 phydev->duplex = DUPLEX_FULL;
377 else
378 phydev->duplex = DUPLEX_HALF;
379 if (val & BMCR_SPEED1000)
380 phydev->speed = SPEED_1000;
381 else if (val & BMCR_SPEED100)
382 phydev->speed = SPEED_100;
383 else phydev->speed = SPEED_10;
384 }
385 else {
386 if (phydev->autoneg == AUTONEG_DISABLE)
387 change_autoneg = true;
00db8189 388 phydev->autoneg = AUTONEG_ENABLE;
79ce0477 389 }
00db8189
AF
390 break;
391 case MII_ADVERTISE:
79ce0477
BH
392 phydev->advertising = mii_adv_to_ethtool_adv_t(val);
393 change_autoneg = true;
00db8189
AF
394 break;
395 default:
396 /* do nothing */
397 break;
398 }
399 }
400
af1dc13e
PK
401 mdiobus_write(phydev->bus, mii_data->phy_id,
402 mii_data->reg_num, val);
403
8e95a202 404 if (mii_data->reg_num == MII_BMCR &&
2613f95f 405 val & BMCR_RESET)
e62a768f 406 return phy_init_hw(phydev);
79ce0477
BH
407
408 if (change_autoneg)
409 return phy_start_aneg(phydev);
410
e62a768f 411 return 0;
dda93b48 412
c1f19b51
RC
413 case SIOCSHWTSTAMP:
414 if (phydev->drv->hwtstamp)
415 return phydev->drv->hwtstamp(phydev, ifr);
416 /* fall through */
417
dda93b48 418 default:
c6d6a511 419 return -EOPNOTSUPP;
00db8189 420 }
00db8189 421}
680e9fe9 422EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 423
b3df0da8
RD
424/**
425 * phy_start_aneg - start auto-negotiation for this PHY device
426 * @phydev: the phy_device struct
e1393456 427 *
b3df0da8
RD
428 * Description: Sanitizes the settings (if we're not autonegotiating
429 * them), and then calls the driver's config_aneg function.
430 * If the PHYCONTROL Layer is operating, we change the state to
431 * reflect the beginning of Auto-negotiation or forcing.
e1393456
AF
432 */
433int phy_start_aneg(struct phy_device *phydev)
434{
435 int err;
436
35b5f6b1 437 mutex_lock(&phydev->lock);
e1393456
AF
438
439 if (AUTONEG_DISABLE == phydev->autoneg)
440 phy_sanitize_settings(phydev);
441
442 err = phydev->drv->config_aneg(phydev);
e1393456
AF
443 if (err < 0)
444 goto out_unlock;
445
446 if (phydev->state != PHY_HALTED) {
447 if (AUTONEG_ENABLE == phydev->autoneg) {
448 phydev->state = PHY_AN;
449 phydev->link_timeout = PHY_AN_TIMEOUT;
450 } else {
451 phydev->state = PHY_FORCING;
452 phydev->link_timeout = PHY_FORCE_TIMEOUT;
453 }
454 }
455
456out_unlock:
35b5f6b1 457 mutex_unlock(&phydev->lock);
e1393456
AF
458 return err;
459}
460EXPORT_SYMBOL(phy_start_aneg);
461
b3df0da8
RD
462/**
463 * phy_start_machine - start PHY state machine tracking
464 * @phydev: the phy_device struct
00db8189 465 *
b3df0da8 466 * Description: The PHY infrastructure can run a state machine
00db8189
AF
467 * which tracks whether the PHY is starting up, negotiating,
468 * etc. This function starts the timer which tracks the state
29935aeb
SS
469 * of the PHY. If you want to maintain your own state machine,
470 * do not call this function.
b3df0da8 471 */
29935aeb 472void phy_start_machine(struct phy_device *phydev)
00db8189 473{
bbb47bde 474 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
00db8189
AF
475}
476
b3df0da8
RD
477/**
478 * phy_stop_machine - stop the PHY state machine tracking
479 * @phydev: target phy_device struct
00db8189 480 *
b3df0da8 481 * Description: Stops the state machine timer, sets the state to UP
817acf5e 482 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
483 * phy_detach.
484 */
485void phy_stop_machine(struct phy_device *phydev)
486{
a390d1f3 487 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 488
35b5f6b1 489 mutex_lock(&phydev->lock);
00db8189
AF
490 if (phydev->state > PHY_UP)
491 phydev->state = PHY_UP;
35b5f6b1 492 mutex_unlock(&phydev->lock);
00db8189
AF
493}
494
b3df0da8
RD
495/**
496 * phy_error - enter HALTED state for this PHY device
497 * @phydev: target phy_device struct
00db8189
AF
498 *
499 * Moves the PHY to the HALTED state in response to a read
500 * or write error, and tells the controller the link is down.
501 * Must not be called from interrupt context, or while the
502 * phydev->lock is held.
503 */
9b9a8bfc 504static void phy_error(struct phy_device *phydev)
00db8189 505{
35b5f6b1 506 mutex_lock(&phydev->lock);
00db8189 507 phydev->state = PHY_HALTED;
35b5f6b1 508 mutex_unlock(&phydev->lock);
00db8189
AF
509}
510
b3df0da8
RD
511/**
512 * phy_interrupt - PHY interrupt handler
513 * @irq: interrupt line
514 * @phy_dat: phy_device pointer
e1393456 515 *
b3df0da8 516 * Description: When a PHY interrupt occurs, the handler disables
e1393456
AF
517 * interrupts, and schedules a work task to clear the interrupt.
518 */
7d12e780 519static irqreturn_t phy_interrupt(int irq, void *phy_dat)
e1393456
AF
520{
521 struct phy_device *phydev = phy_dat;
522
3c3070d7
MR
523 if (PHY_HALTED == phydev->state)
524 return IRQ_NONE; /* It can't be ours. */
525
e1393456
AF
526 /* The MDIO bus is not allowed to be written in interrupt
527 * context, so we need to disable the irq here. A work
528 * queue will write the PHY to disable and clear the
2f53e904
SS
529 * interrupt, and then reenable the irq line.
530 */
e1393456 531 disable_irq_nosync(irq);
0ac49527 532 atomic_inc(&phydev->irq_disable);
e1393456 533
bbb47bde 534 queue_work(system_power_efficient_wq, &phydev->phy_queue);
e1393456
AF
535
536 return IRQ_HANDLED;
537}
538
b3df0da8
RD
539/**
540 * phy_enable_interrupts - Enable the interrupts from the PHY side
541 * @phydev: target phy_device struct
542 */
89ff05ec 543static int phy_enable_interrupts(struct phy_device *phydev)
00db8189 544{
553fe92b 545 int err = phy_clear_interrupt(phydev);
00db8189 546
e1393456
AF
547 if (err < 0)
548 return err;
00db8189 549
553fe92b 550 return phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189 551}
00db8189 552
b3df0da8
RD
553/**
554 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
555 * @phydev: target phy_device struct
556 */
89ff05ec 557static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
558{
559 int err;
560
561 /* Disable PHY interrupts */
562 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
00db8189
AF
563 if (err)
564 goto phy_err;
565
566 /* Clear the interrupt */
567 err = phy_clear_interrupt(phydev);
00db8189
AF
568 if (err)
569 goto phy_err;
570
571 return 0;
572
573phy_err:
574 phy_error(phydev);
575
576 return err;
577}
e1393456 578
b3df0da8
RD
579/**
580 * phy_start_interrupts - request and enable interrupts for a PHY device
581 * @phydev: target phy_device struct
e1393456 582 *
b3df0da8
RD
583 * Description: Request the interrupt for the given PHY.
584 * If this fails, then we set irq to PHY_POLL.
e1393456 585 * Otherwise, we enable the interrupts in the PHY.
e1393456 586 * This should only be called with a valid IRQ number.
b3df0da8 587 * Returns 0 on success or < 0 on error.
e1393456
AF
588 */
589int phy_start_interrupts(struct phy_device *phydev)
590{
0ac49527 591 atomic_set(&phydev->irq_disable, 0);
33c133cc
SS
592 if (request_irq(phydev->irq, phy_interrupt, 0, "phy_interrupt",
593 phydev) < 0) {
8d242488
JP
594 pr_warn("%s: Can't get IRQ %d (PHY)\n",
595 phydev->bus->name, phydev->irq);
e1393456
AF
596 phydev->irq = PHY_POLL;
597 return 0;
598 }
599
e62a768f 600 return phy_enable_interrupts(phydev);
e1393456
AF
601}
602EXPORT_SYMBOL(phy_start_interrupts);
603
b3df0da8
RD
604/**
605 * phy_stop_interrupts - disable interrupts from a PHY device
606 * @phydev: target phy_device struct
607 */
e1393456
AF
608int phy_stop_interrupts(struct phy_device *phydev)
609{
553fe92b 610 int err = phy_disable_interrupts(phydev);
e1393456
AF
611
612 if (err)
613 phy_error(phydev);
614
0ac49527
MR
615 free_irq(phydev->irq, phydev);
616
2f53e904 617 /* Cannot call flush_scheduled_work() here as desired because
0ac49527
MR
618 * of rtnl_lock(), but we do not really care about what would
619 * be done, except from enable_irq(), so cancel any work
620 * possibly pending and take care of the matter below.
3c3070d7 621 */
28e53bdd 622 cancel_work_sync(&phydev->phy_queue);
2f53e904 623 /* If work indeed has been cancelled, disable_irq() will have
0ac49527
MR
624 * been left unbalanced from phy_interrupt() and enable_irq()
625 * has to be called so that other devices on the line work.
626 */
627 while (atomic_dec_return(&phydev->irq_disable) >= 0)
628 enable_irq(phydev->irq);
e1393456
AF
629
630 return err;
631}
632EXPORT_SYMBOL(phy_stop_interrupts);
633
b3df0da8
RD
634/**
635 * phy_change - Scheduled by the phy_interrupt/timer to handle PHY changes
636 * @work: work_struct that describes the work to be done
637 */
5ea94e76 638void phy_change(struct work_struct *work)
e1393456 639{
c4028958
DH
640 struct phy_device *phydev =
641 container_of(work, struct phy_device, phy_queue);
e1393456 642
a8729eb3
AG
643 if (phydev->drv->did_interrupt &&
644 !phydev->drv->did_interrupt(phydev))
645 goto ignore;
646
e62a768f 647 if (phy_disable_interrupts(phydev))
e1393456
AF
648 goto phy_err;
649
35b5f6b1 650 mutex_lock(&phydev->lock);
e1393456
AF
651 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
652 phydev->state = PHY_CHANGELINK;
35b5f6b1 653 mutex_unlock(&phydev->lock);
e1393456 654
0ac49527 655 atomic_dec(&phydev->irq_disable);
e1393456
AF
656 enable_irq(phydev->irq);
657
658 /* Reenable interrupts */
e62a768f
SS
659 if (PHY_HALTED != phydev->state &&
660 phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED))
e1393456
AF
661 goto irq_enable_err;
662
a390d1f3
MS
663 /* reschedule state queue work to run as soon as possible */
664 cancel_delayed_work_sync(&phydev->state_queue);
bbb47bde 665 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
e1393456
AF
666 return;
667
a8729eb3
AG
668ignore:
669 atomic_dec(&phydev->irq_disable);
670 enable_irq(phydev->irq);
671 return;
672
e1393456
AF
673irq_enable_err:
674 disable_irq(phydev->irq);
0ac49527 675 atomic_inc(&phydev->irq_disable);
e1393456
AF
676phy_err:
677 phy_error(phydev);
678}
679
b3df0da8
RD
680/**
681 * phy_stop - Bring down the PHY link, and stop checking the status
682 * @phydev: target phy_device struct
683 */
e1393456
AF
684void phy_stop(struct phy_device *phydev)
685{
35b5f6b1 686 mutex_lock(&phydev->lock);
e1393456
AF
687
688 if (PHY_HALTED == phydev->state)
689 goto out_unlock;
690
2c7b4921 691 if (phy_interrupt_is_valid(phydev)) {
e1393456
AF
692 /* Disable PHY Interrupts */
693 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 694
3c3070d7
MR
695 /* Clear any pending interrupts */
696 phy_clear_interrupt(phydev);
697 }
e1393456 698
6daf6531
MR
699 phydev->state = PHY_HALTED;
700
e1393456 701out_unlock:
35b5f6b1 702 mutex_unlock(&phydev->lock);
3c3070d7 703
2f53e904 704 /* Cannot call flush_scheduled_work() here as desired because
3c3070d7
MR
705 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
706 * will not reenable interrupts.
707 */
e1393456 708}
2f53e904 709EXPORT_SYMBOL(phy_stop);
e1393456 710
b3df0da8
RD
711/**
712 * phy_start - start or restart a PHY device
713 * @phydev: target phy_device struct
e1393456 714 *
b3df0da8 715 * Description: Indicates the attached device's readiness to
e1393456
AF
716 * handle PHY-related work. Used during startup to start the
717 * PHY, and after a call to phy_stop() to resume operation.
718 * Also used to indicate the MDIO bus has cleared an error
719 * condition.
720 */
721void phy_start(struct phy_device *phydev)
722{
35b5f6b1 723 mutex_lock(&phydev->lock);
e1393456
AF
724
725 switch (phydev->state) {
e109374f
FF
726 case PHY_STARTING:
727 phydev->state = PHY_PENDING;
728 break;
729 case PHY_READY:
730 phydev->state = PHY_UP;
731 break;
732 case PHY_HALTED:
733 phydev->state = PHY_RESUMING;
734 default:
735 break;
e1393456 736 }
35b5f6b1 737 mutex_unlock(&phydev->lock);
e1393456 738}
e1393456 739EXPORT_SYMBOL(phy_start);
67c4f3fa 740
35b5f6b1
NC
741/**
742 * phy_state_machine - Handle the state machine
743 * @work: work_struct that describes the work to be done
35b5f6b1 744 */
4f9c85a1 745void phy_state_machine(struct work_struct *work)
00db8189 746{
bf6aede7 747 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 748 struct phy_device *phydev =
a390d1f3 749 container_of(dwork, struct phy_device, state_queue);
6e14a5ee 750 bool needs_aneg = false, do_suspend = false, do_resume = false;
00db8189
AF
751 int err = 0;
752
35b5f6b1 753 mutex_lock(&phydev->lock);
00db8189 754
2b8f2a28
DM
755 if (phydev->drv->link_change_notify)
756 phydev->drv->link_change_notify(phydev);
757
e109374f
FF
758 switch (phydev->state) {
759 case PHY_DOWN:
760 case PHY_STARTING:
761 case PHY_READY:
762 case PHY_PENDING:
763 break;
764 case PHY_UP:
6e14a5ee 765 needs_aneg = true;
00db8189 766
e109374f
FF
767 phydev->link_timeout = PHY_AN_TIMEOUT;
768
769 break;
770 case PHY_AN:
771 err = phy_read_status(phydev);
e109374f 772 if (err < 0)
00db8189 773 break;
6b655529 774
2f53e904 775 /* If the link is down, give up on negotiation for now */
e109374f
FF
776 if (!phydev->link) {
777 phydev->state = PHY_NOLINK;
778 netif_carrier_off(phydev->attached_dev);
779 phydev->adjust_link(phydev->attached_dev);
780 break;
781 }
6b655529 782
2f53e904 783 /* Check if negotiation is done. Break if there's an error */
e109374f
FF
784 err = phy_aneg_done(phydev);
785 if (err < 0)
786 break;
6b655529 787
e109374f
FF
788 /* If AN is done, we're running */
789 if (err > 0) {
790 phydev->state = PHY_RUNNING;
791 netif_carrier_on(phydev->attached_dev);
792 phydev->adjust_link(phydev->attached_dev);
00db8189 793
fa8cddaf 794 } else if (0 == phydev->link_timeout--)
6e14a5ee 795 needs_aneg = true;
e109374f
FF
796 break;
797 case PHY_NOLINK:
798 err = phy_read_status(phydev);
e109374f 799 if (err)
00db8189 800 break;
00db8189 801
e109374f 802 if (phydev->link) {
e46e08b8
BK
803 if (AUTONEG_ENABLE == phydev->autoneg) {
804 err = phy_aneg_done(phydev);
805 if (err < 0)
806 break;
807
808 if (!err) {
809 phydev->state = PHY_AN;
810 phydev->link_timeout = PHY_AN_TIMEOUT;
811 break;
812 }
813 }
e109374f
FF
814 phydev->state = PHY_RUNNING;
815 netif_carrier_on(phydev->attached_dev);
816 phydev->adjust_link(phydev->attached_dev);
817 }
818 break;
819 case PHY_FORCING:
820 err = genphy_update_link(phydev);
e109374f 821 if (err)
00db8189 822 break;
00db8189 823
e109374f
FF
824 if (phydev->link) {
825 phydev->state = PHY_RUNNING;
826 netif_carrier_on(phydev->attached_dev);
827 } else {
828 if (0 == phydev->link_timeout--)
6e14a5ee 829 needs_aneg = true;
e109374f 830 }
00db8189 831
e109374f
FF
832 phydev->adjust_link(phydev->attached_dev);
833 break;
834 case PHY_RUNNING:
835 /* Only register a CHANGE if we are
836 * polling or ignoring interrupts
837 */
838 if (!phy_interrupt_is_valid(phydev))
839 phydev->state = PHY_CHANGELINK;
840 break;
841 case PHY_CHANGELINK:
842 err = phy_read_status(phydev);
e109374f 843 if (err)
00db8189 844 break;
00db8189 845
e109374f
FF
846 if (phydev->link) {
847 phydev->state = PHY_RUNNING;
848 netif_carrier_on(phydev->attached_dev);
849 } else {
850 phydev->state = PHY_NOLINK;
851 netif_carrier_off(phydev->attached_dev);
852 }
00db8189 853
e109374f 854 phydev->adjust_link(phydev->attached_dev);
00db8189 855
e109374f
FF
856 if (phy_interrupt_is_valid(phydev))
857 err = phy_config_interrupt(phydev,
2f53e904 858 PHY_INTERRUPT_ENABLED);
e109374f
FF
859 break;
860 case PHY_HALTED:
861 if (phydev->link) {
862 phydev->link = 0;
863 netif_carrier_off(phydev->attached_dev);
00db8189 864 phydev->adjust_link(phydev->attached_dev);
6e14a5ee 865 do_suspend = true;
e109374f
FF
866 }
867 break;
868 case PHY_RESUMING:
e109374f 869 err = phy_clear_interrupt(phydev);
e109374f
FF
870 if (err)
871 break;
00db8189 872
2f53e904 873 err = phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
e109374f
FF
874 if (err)
875 break;
00db8189 876
e109374f
FF
877 if (AUTONEG_ENABLE == phydev->autoneg) {
878 err = phy_aneg_done(phydev);
879 if (err < 0)
00db8189
AF
880 break;
881
e109374f 882 /* err > 0 if AN is done.
2f53e904
SS
883 * Otherwise, it's 0, and we're still waiting for AN
884 */
e109374f 885 if (err > 0) {
42caa074
WF
886 err = phy_read_status(phydev);
887 if (err)
888 break;
889
890 if (phydev->link) {
891 phydev->state = PHY_RUNNING;
892 netif_carrier_on(phydev->attached_dev);
2f53e904 893 } else {
42caa074 894 phydev->state = PHY_NOLINK;
2f53e904 895 }
42caa074 896 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
897 } else {
898 phydev->state = PHY_AN;
899 phydev->link_timeout = PHY_AN_TIMEOUT;
42caa074 900 }
e109374f
FF
901 } else {
902 err = phy_read_status(phydev);
903 if (err)
904 break;
905
906 if (phydev->link) {
907 phydev->state = PHY_RUNNING;
908 netif_carrier_on(phydev->attached_dev);
2f53e904 909 } else {
e109374f 910 phydev->state = PHY_NOLINK;
2f53e904 911 }
e109374f
FF
912 phydev->adjust_link(phydev->attached_dev);
913 }
6e14a5ee 914 do_resume = true;
e109374f 915 break;
00db8189
AF
916 }
917
35b5f6b1 918 mutex_unlock(&phydev->lock);
00db8189
AF
919
920 if (needs_aneg)
921 err = phy_start_aneg(phydev);
6e14a5ee 922 else if (do_suspend)
be9dad1f 923 phy_suspend(phydev);
6e14a5ee
ZG
924 else if (do_resume)
925 phy_resume(phydev);
be9dad1f 926
00db8189
AF
927 if (err < 0)
928 phy_error(phydev);
929
bbb47bde 930 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
2f53e904 931 PHY_STATE_TIME * HZ);
35b5f6b1 932}
a59a4d19 933
5ea94e76
FF
934void phy_mac_interrupt(struct phy_device *phydev, int new_link)
935{
936 cancel_work_sync(&phydev->phy_queue);
937 phydev->link = new_link;
938 schedule_work(&phydev->phy_queue);
939}
940EXPORT_SYMBOL(phy_mac_interrupt);
941
a59a4d19
GC
942static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
943 int addr)
944{
945 /* Write the desired MMD Devad */
946 bus->write(bus, addr, MII_MMD_CTRL, devad);
947
948 /* Write the desired MMD register address */
949 bus->write(bus, addr, MII_MMD_DATA, prtad);
950
951 /* Select the Function : DATA with no post increment */
952 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
953}
954
955/**
956 * phy_read_mmd_indirect - reads data from the MMD registers
0c1d77df 957 * @phydev: The PHY device bus
a59a4d19
GC
958 * @prtad: MMD Address
959 * @devad: MMD DEVAD
960 * @addr: PHY address on the MII bus
961 *
962 * Description: it reads data from the MMD registers (clause 22 to access to
963 * clause 45) of the specified phy address.
964 * To read these register we have:
965 * 1) Write reg 13 // DEVAD
966 * 2) Write reg 14 // MMD Address
967 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
968 * 3) Read reg 14 // Read MMD data
969 */
66ce7fb9 970int phy_read_mmd_indirect(struct phy_device *phydev, int prtad,
0c1d77df 971 int devad, int addr)
a59a4d19 972{
0c1d77df
VB
973 struct phy_driver *phydrv = phydev->drv;
974 int value = -1;
a59a4d19 975
0c1d77df
VB
976 if (phydrv->read_mmd_indirect == NULL) {
977 mmd_phy_indirect(phydev->bus, prtad, devad, addr);
978
979 /* Read the content of the MMD's selected register */
980 value = phydev->bus->read(phydev->bus, addr, MII_MMD_DATA);
981 } else {
982 value = phydrv->read_mmd_indirect(phydev, prtad, devad, addr);
983 }
984 return value;
a59a4d19 985}
66ce7fb9 986EXPORT_SYMBOL(phy_read_mmd_indirect);
a59a4d19
GC
987
988/**
989 * phy_write_mmd_indirect - writes data to the MMD registers
0c1d77df 990 * @phydev: The PHY device
a59a4d19
GC
991 * @prtad: MMD Address
992 * @devad: MMD DEVAD
993 * @addr: PHY address on the MII bus
994 * @data: data to write in the MMD register
995 *
996 * Description: Write data from the MMD registers of the specified
997 * phy address.
998 * To write these register we have:
999 * 1) Write reg 13 // DEVAD
1000 * 2) Write reg 14 // MMD Address
1001 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
1002 * 3) Write reg 14 // Write MMD data
1003 */
66ce7fb9 1004void phy_write_mmd_indirect(struct phy_device *phydev, int prtad,
0c1d77df 1005 int devad, int addr, u32 data)
a59a4d19 1006{
0c1d77df 1007 struct phy_driver *phydrv = phydev->drv;
a59a4d19 1008
0c1d77df
VB
1009 if (phydrv->write_mmd_indirect == NULL) {
1010 mmd_phy_indirect(phydev->bus, prtad, devad, addr);
1011
1012 /* Write the data into MMD's selected register */
1013 phydev->bus->write(phydev->bus, addr, MII_MMD_DATA, data);
1014 } else {
1015 phydrv->write_mmd_indirect(phydev, prtad, devad, addr, data);
1016 }
a59a4d19 1017}
66ce7fb9 1018EXPORT_SYMBOL(phy_write_mmd_indirect);
a59a4d19 1019
a59a4d19
GC
1020/**
1021 * phy_init_eee - init and check the EEE feature
1022 * @phydev: target phy_device struct
1023 * @clk_stop_enable: PHY may stop the clock during LPI
1024 *
1025 * Description: it checks if the Energy-Efficient Ethernet (EEE)
1026 * is supported by looking at the MMD registers 3.20 and 7.60/61
1027 * and it programs the MMD register 3.0 setting the "Clock stop enable"
1028 * bit if required.
1029 */
1030int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
1031{
a59a4d19
GC
1032 /* According to 802.3az,the EEE is supported only in full duplex-mode.
1033 * Also EEE feature is active when core is operating with MII, GMII
a9f63095
FF
1034 * or RGMII. Internal PHYs are also allowed to proceed and should
1035 * return an error if they do not support EEE.
a59a4d19
GC
1036 */
1037 if ((phydev->duplex == DUPLEX_FULL) &&
1038 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
1039 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
a9f63095
FF
1040 (phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
1041 phy_is_internal(phydev))) {
a59a4d19
GC
1042 int eee_lp, eee_cap, eee_adv;
1043 u32 lp, cap, adv;
4ae6e50c
BH
1044 int status;
1045 unsigned int idx;
a59a4d19
GC
1046
1047 /* Read phy status to properly get the right settings */
1048 status = phy_read_status(phydev);
1049 if (status)
1050 return status;
1051
1052 /* First check if the EEE ability is supported */
0c1d77df 1053 eee_cap = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE,
a59a4d19 1054 MDIO_MMD_PCS, phydev->addr);
7a4cecf7
GC
1055 if (eee_cap <= 0)
1056 goto eee_exit_err;
a59a4d19 1057
b32607dd 1058 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19 1059 if (!cap)
7a4cecf7 1060 goto eee_exit_err;
a59a4d19
GC
1061
1062 /* Check which link settings negotiated and verify it in
1063 * the EEE advertising registers.
1064 */
0c1d77df 1065 eee_lp = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE,
a59a4d19 1066 MDIO_MMD_AN, phydev->addr);
7a4cecf7
GC
1067 if (eee_lp <= 0)
1068 goto eee_exit_err;
a59a4d19 1069
0c1d77df 1070 eee_adv = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV,
a59a4d19 1071 MDIO_MMD_AN, phydev->addr);
7a4cecf7
GC
1072 if (eee_adv <= 0)
1073 goto eee_exit_err;
a59a4d19 1074
b32607dd
AB
1075 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
1076 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
a59a4d19 1077 idx = phy_find_setting(phydev->speed, phydev->duplex);
9a9c56cb 1078 if (!(lp & adv & settings[idx].setting))
7a4cecf7 1079 goto eee_exit_err;
a59a4d19
GC
1080
1081 if (clk_stop_enable) {
1082 /* Configure the PHY to stop receiving xMII
1083 * clock while it is signaling LPI.
1084 */
0c1d77df 1085 int val = phy_read_mmd_indirect(phydev, MDIO_CTRL1,
a59a4d19
GC
1086 MDIO_MMD_PCS,
1087 phydev->addr);
1088 if (val < 0)
1089 return val;
1090
1091 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
0c1d77df
VB
1092 phy_write_mmd_indirect(phydev, MDIO_CTRL1,
1093 MDIO_MMD_PCS, phydev->addr,
1094 val);
a59a4d19
GC
1095 }
1096
e62a768f 1097 return 0; /* EEE supported */
a59a4d19 1098 }
7a4cecf7 1099eee_exit_err:
e62a768f 1100 return -EPROTONOSUPPORT;
a59a4d19
GC
1101}
1102EXPORT_SYMBOL(phy_init_eee);
1103
1104/**
1105 * phy_get_eee_err - report the EEE wake error count
1106 * @phydev: target phy_device struct
1107 *
1108 * Description: it is to report the number of time where the PHY
1109 * failed to complete its normal wake sequence.
1110 */
1111int phy_get_eee_err(struct phy_device *phydev)
1112{
0c1d77df 1113 return phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_WK_ERR,
a59a4d19 1114 MDIO_MMD_PCS, phydev->addr);
a59a4d19
GC
1115}
1116EXPORT_SYMBOL(phy_get_eee_err);
1117
1118/**
1119 * phy_ethtool_get_eee - get EEE supported and status
1120 * @phydev: target phy_device struct
1121 * @data: ethtool_eee data
1122 *
1123 * Description: it reportes the Supported/Advertisement/LP Advertisement
1124 * capabilities.
1125 */
1126int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1127{
1128 int val;
1129
1130 /* Get Supported EEE */
0c1d77df 1131 val = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE,
a59a4d19
GC
1132 MDIO_MMD_PCS, phydev->addr);
1133 if (val < 0)
1134 return val;
b32607dd 1135 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
a59a4d19
GC
1136
1137 /* Get advertisement EEE */
0c1d77df 1138 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV,
a59a4d19
GC
1139 MDIO_MMD_AN, phydev->addr);
1140 if (val < 0)
1141 return val;
b32607dd 1142 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1143
1144 /* Get LP advertisement EEE */
0c1d77df 1145 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE,
a59a4d19
GC
1146 MDIO_MMD_AN, phydev->addr);
1147 if (val < 0)
1148 return val;
b32607dd 1149 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1150
1151 return 0;
1152}
1153EXPORT_SYMBOL(phy_ethtool_get_eee);
1154
1155/**
1156 * phy_ethtool_set_eee - set EEE supported and status
1157 * @phydev: target phy_device struct
1158 * @data: ethtool_eee data
1159 *
1160 * Description: it is to program the Advertisement EEE register.
1161 */
1162int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1163{
553fe92b 1164 int val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19 1165
0c1d77df 1166 phy_write_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN,
a59a4d19
GC
1167 phydev->addr, val);
1168
1169 return 0;
1170}
1171EXPORT_SYMBOL(phy_ethtool_set_eee);
42e836eb
MS
1172
1173int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1174{
1175 if (phydev->drv->set_wol)
1176 return phydev->drv->set_wol(phydev, wol);
1177
1178 return -EOPNOTSUPP;
1179}
1180EXPORT_SYMBOL(phy_ethtool_set_wol);
1181
1182void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1183{
1184 if (phydev->drv->get_wol)
1185 phydev->drv->get_wol(phydev, wol);
1186}
1187EXPORT_SYMBOL(phy_ethtool_get_wol);