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2f53e904 1/* Framework for finding and configuring PHYs.
00db8189
AF
2 * Also contains generic PHY driver
3 *
4 * Author: Andy Fleming
5 *
6 * Copyright (c) 2004 Freescale Semiconductor, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
8d242488
JP
14
15#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16
00db8189 17#include <linux/kernel.h>
00db8189
AF
18#include <linux/string.h>
19#include <linux/errno.h>
20#include <linux/unistd.h>
21#include <linux/slab.h>
22#include <linux/interrupt.h>
23#include <linux/init.h>
24#include <linux/delay.h>
25#include <linux/netdevice.h>
26#include <linux/etherdevice.h>
27#include <linux/skbuff.h>
00db8189
AF
28#include <linux/mm.h>
29#include <linux/module.h>
00db8189
AF
30#include <linux/mii.h>
31#include <linux/ethtool.h>
32#include <linux/phy.h>
124059fd 33#include <linux/mdio.h>
2f53e904
SS
34#include <linux/io.h>
35#include <linux/uaccess.h>
00db8189 36
00db8189 37#include <asm/irq.h>
00db8189 38
afcceaa3
OH
39MODULE_DESCRIPTION("PHY library");
40MODULE_AUTHOR("Andy Fleming");
41MODULE_LICENSE("GPL");
42
6f4a7f41
AV
43void phy_device_free(struct phy_device *phydev)
44{
b2a43191 45 put_device(&phydev->dev);
6f4a7f41 46}
4dea547f 47EXPORT_SYMBOL(phy_device_free);
6f4a7f41
AV
48
49static void phy_device_release(struct device *dev)
50{
b2a43191 51 kfree(to_phy_device(dev));
6f4a7f41
AV
52}
53
ab2145ed
SX
54enum genphy_driver {
55 GENPHY_DRV_1G,
124059fd 56 GENPHY_DRV_10G,
ab2145ed
SX
57 GENPHY_DRV_MAX
58};
59
60static struct phy_driver genphy_driver[GENPHY_DRV_MAX];
4dea547f 61
f62220d3
AF
62static LIST_HEAD(phy_fixup_list);
63static DEFINE_MUTEX(phy_fixup_lock);
64
2f53e904
SS
65/**
66 * phy_register_fixup - creates a new phy_fixup and adds it to the list
f62220d3
AF
67 * @bus_id: A string which matches phydev->dev.bus_id (or PHY_ANY_ID)
68 * @phy_uid: Used to match against phydev->phy_id (the UID of the PHY)
2f53e904 69 * It can also be PHY_ANY_UID
f62220d3 70 * @phy_uid_mask: Applied to phydev->phy_id and fixup->phy_uid before
2f53e904 71 * comparison
f62220d3
AF
72 * @run: The actual code to be run when a matching PHY is found
73 */
74int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
2f53e904 75 int (*run)(struct phy_device *))
f62220d3 76{
553fe92b 77 struct phy_fixup *fixup = kzalloc(sizeof(*fixup), GFP_KERNEL);
f62220d3 78
f62220d3
AF
79 if (!fixup)
80 return -ENOMEM;
81
fb28ad35 82 strlcpy(fixup->bus_id, bus_id, sizeof(fixup->bus_id));
f62220d3
AF
83 fixup->phy_uid = phy_uid;
84 fixup->phy_uid_mask = phy_uid_mask;
85 fixup->run = run;
86
87 mutex_lock(&phy_fixup_lock);
88 list_add_tail(&fixup->list, &phy_fixup_list);
89 mutex_unlock(&phy_fixup_lock);
90
91 return 0;
92}
93EXPORT_SYMBOL(phy_register_fixup);
94
95/* Registers a fixup to be run on any PHY with the UID in phy_uid */
96int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
2f53e904 97 int (*run)(struct phy_device *))
f62220d3
AF
98{
99 return phy_register_fixup(PHY_ANY_ID, phy_uid, phy_uid_mask, run);
100}
101EXPORT_SYMBOL(phy_register_fixup_for_uid);
102
103/* Registers a fixup to be run on the PHY with id string bus_id */
104int phy_register_fixup_for_id(const char *bus_id,
2f53e904 105 int (*run)(struct phy_device *))
f62220d3
AF
106{
107 return phy_register_fixup(bus_id, PHY_ANY_UID, 0xffffffff, run);
108}
109EXPORT_SYMBOL(phy_register_fixup_for_id);
110
2f53e904 111/* Returns 1 if fixup matches phydev in bus_id and phy_uid.
f62220d3
AF
112 * Fixups can be set to match any in one or more fields.
113 */
114static int phy_needs_fixup(struct phy_device *phydev, struct phy_fixup *fixup)
115{
fb28ad35 116 if (strcmp(fixup->bus_id, dev_name(&phydev->dev)) != 0)
f62220d3
AF
117 if (strcmp(fixup->bus_id, PHY_ANY_ID) != 0)
118 return 0;
119
120 if ((fixup->phy_uid & fixup->phy_uid_mask) !=
2f53e904 121 (phydev->phy_id & fixup->phy_uid_mask))
f62220d3
AF
122 if (fixup->phy_uid != PHY_ANY_UID)
123 return 0;
124
125 return 1;
126}
127
128/* Runs any matching fixups for this phydev */
fbfcec63 129static int phy_scan_fixups(struct phy_device *phydev)
f62220d3
AF
130{
131 struct phy_fixup *fixup;
132
133 mutex_lock(&phy_fixup_lock);
134 list_for_each_entry(fixup, &phy_fixup_list, list) {
135 if (phy_needs_fixup(phydev, fixup)) {
553fe92b 136 int err = fixup->run(phydev);
f62220d3 137
bc23283c
JS
138 if (err < 0) {
139 mutex_unlock(&phy_fixup_lock);
f62220d3 140 return err;
bc23283c 141 }
b0ae009f 142 phydev->has_fixups = true;
f62220d3
AF
143 }
144 }
145 mutex_unlock(&phy_fixup_lock);
146
147 return 0;
148}
f62220d3 149
ac28b9f8 150struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
2f53e904
SS
151 bool is_c45,
152 struct phy_c45_device_ids *c45_ids)
11b0bacd
VB
153{
154 struct phy_device *dev;
8626d3b4 155
2f53e904 156 /* We allocate the device, and initialize the default values */
cd861280 157 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
11b0bacd 158 if (NULL == dev)
e109374f 159 return (struct phy_device *)PTR_ERR((void *)-ENOMEM);
11b0bacd 160
6f4a7f41
AV
161 dev->dev.release = phy_device_release;
162
11b0bacd
VB
163 dev->speed = 0;
164 dev->duplex = -1;
2f53e904
SS
165 dev->pause = 0;
166 dev->asym_pause = 0;
11b0bacd 167 dev->link = 1;
e8a2b6a4 168 dev->interface = PHY_INTERFACE_MODE_GMII;
11b0bacd
VB
169
170 dev->autoneg = AUTONEG_ENABLE;
171
ac28b9f8 172 dev->is_c45 = is_c45;
11b0bacd
VB
173 dev->addr = addr;
174 dev->phy_id = phy_id;
ac28b9f8
DD
175 if (c45_ids)
176 dev->c45_ids = *c45_ids;
11b0bacd 177 dev->bus = bus;
4dea547f
GL
178 dev->dev.parent = bus->parent;
179 dev->dev.bus = &mdio_bus_type;
180 dev->irq = bus->irq != NULL ? bus->irq[addr] : PHY_POLL;
181 dev_set_name(&dev->dev, PHY_ID_FMT, bus->id, addr);
11b0bacd
VB
182
183 dev->state = PHY_DOWN;
184
35b5f6b1 185 mutex_init(&dev->lock);
4f9c85a1 186 INIT_DELAYED_WORK(&dev->state_queue, phy_state_machine);
5ea94e76 187 INIT_WORK(&dev->phy_queue, phy_change);
11b0bacd 188
8626d3b4 189 /* Request the appropriate module unconditionally; don't
2f53e904
SS
190 * bother trying to do so only if it isn't already loaded,
191 * because that gets complicated. A hotplug event would have
192 * done an unconditional modprobe anyway.
193 * We don't do normal hotplug because it won't work for MDIO
194 * -- because it relies on the device staying around for long
195 * enough for the driver to get loaded. With MDIO, the NIC
196 * driver will get bored and give up as soon as it finds that
197 * there's no driver _already_ loaded.
198 */
8626d3b4
DW
199 request_module(MDIO_MODULE_PREFIX MDIO_ID_FMT, MDIO_ID_ARGS(phy_id));
200
b2a43191
PM
201 device_initialize(&dev->dev);
202
11b0bacd
VB
203 return dev;
204}
ac28b9f8
DD
205EXPORT_SYMBOL(phy_device_create);
206
207/**
208 * get_phy_c45_ids - reads the specified addr for its 802.3-c45 IDs.
209 * @bus: the target MII bus
210 * @addr: PHY address on the MII bus
211 * @phy_id: where to store the ID retrieved.
212 * @c45_ids: where to store the c45 ID information.
213 *
214 * If the PHY devices-in-package appears to be valid, it and the
215 * corresponding identifiers are stored in @c45_ids, zero is stored
216 * in @phy_id. Otherwise 0xffffffff is stored in @phy_id. Returns
217 * zero on success.
218 *
219 */
220static int get_phy_c45_ids(struct mii_bus *bus, int addr, u32 *phy_id,
221 struct phy_c45_device_ids *c45_ids) {
222 int phy_reg;
223 int i, reg_addr;
224 const int num_ids = ARRAY_SIZE(c45_ids->device_ids);
225
226 /* Find first non-zero Devices In package. Device
227 * zero is reserved, so don't probe it.
228 */
229 for (i = 1;
230 i < num_ids && c45_ids->devices_in_package == 0;
231 i++) {
232 reg_addr = MII_ADDR_C45 | i << 16 | 6;
233 phy_reg = mdiobus_read(bus, addr, reg_addr);
234 if (phy_reg < 0)
235 return -EIO;
236 c45_ids->devices_in_package = (phy_reg & 0xffff) << 16;
237
238 reg_addr = MII_ADDR_C45 | i << 16 | 5;
239 phy_reg = mdiobus_read(bus, addr, reg_addr);
240 if (phy_reg < 0)
241 return -EIO;
242 c45_ids->devices_in_package |= (phy_reg & 0xffff);
243
244 /* If mostly Fs, there is no device there,
245 * let's get out of here.
246 */
247 if ((c45_ids->devices_in_package & 0x1fffffff) == 0x1fffffff) {
248 *phy_id = 0xffffffff;
249 return 0;
250 }
251 }
252
253 /* Now probe Device Identifiers for each device present. */
254 for (i = 1; i < num_ids; i++) {
255 if (!(c45_ids->devices_in_package & (1 << i)))
256 continue;
257
258 reg_addr = MII_ADDR_C45 | i << 16 | MII_PHYSID1;
259 phy_reg = mdiobus_read(bus, addr, reg_addr);
260 if (phy_reg < 0)
261 return -EIO;
262 c45_ids->device_ids[i] = (phy_reg & 0xffff) << 16;
263
264 reg_addr = MII_ADDR_C45 | i << 16 | MII_PHYSID2;
265 phy_reg = mdiobus_read(bus, addr, reg_addr);
266 if (phy_reg < 0)
267 return -EIO;
268 c45_ids->device_ids[i] |= (phy_reg & 0xffff);
269 }
270 *phy_id = 0;
271 return 0;
272}
11b0bacd 273
b3df0da8 274/**
cac1f3c8 275 * get_phy_id - reads the specified addr for its ID.
b3df0da8
RD
276 * @bus: the target MII bus
277 * @addr: PHY address on the MII bus
cac1f3c8 278 * @phy_id: where to store the ID retrieved.
ac28b9f8
DD
279 * @is_c45: If true the PHY uses the 802.3 clause 45 protocol
280 * @c45_ids: where to store the c45 ID information.
281 *
282 * Description: In the case of a 802.3-c22 PHY, reads the ID registers
283 * of the PHY at @addr on the @bus, stores it in @phy_id and returns
284 * zero on success.
285 *
286 * In the case of a 802.3-c45 PHY, get_phy_c45_ids() is invoked, and
287 * its return value is in turn returned.
00db8189 288 *
00db8189 289 */
ac28b9f8
DD
290static int get_phy_id(struct mii_bus *bus, int addr, u32 *phy_id,
291 bool is_c45, struct phy_c45_device_ids *c45_ids)
00db8189
AF
292{
293 int phy_reg;
00db8189 294
ac28b9f8
DD
295 if (is_c45)
296 return get_phy_c45_ids(bus, addr, phy_id, c45_ids);
297
2f53e904 298 /* Grab the bits from PHYIR1, and put them in the upper half */
6fe32649 299 phy_reg = mdiobus_read(bus, addr, MII_PHYSID1);
00db8189 300 if (phy_reg < 0)
cac1f3c8 301 return -EIO;
00db8189 302
cac1f3c8 303 *phy_id = (phy_reg & 0xffff) << 16;
00db8189
AF
304
305 /* Grab the bits from PHYIR2, and put them in the lower half */
6fe32649 306 phy_reg = mdiobus_read(bus, addr, MII_PHYSID2);
00db8189 307 if (phy_reg < 0)
cac1f3c8
PG
308 return -EIO;
309
310 *phy_id |= (phy_reg & 0xffff);
311
312 return 0;
313}
314
315/**
2f53e904
SS
316 * get_phy_device - reads the specified PHY device and returns its @phy_device
317 * struct
cac1f3c8
PG
318 * @bus: the target MII bus
319 * @addr: PHY address on the MII bus
ac28b9f8 320 * @is_c45: If true the PHY uses the 802.3 clause 45 protocol
cac1f3c8
PG
321 *
322 * Description: Reads the ID registers of the PHY at @addr on the
323 * @bus, then allocates and returns the phy_device to represent it.
324 */
ac28b9f8 325struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
cac1f3c8 326{
ac28b9f8 327 struct phy_c45_device_ids c45_ids = {0};
160c85f0 328 u32 phy_id = 0;
cac1f3c8 329 int r;
00db8189 330
ac28b9f8 331 r = get_phy_id(bus, addr, &phy_id, is_c45, &c45_ids);
cac1f3c8
PG
332 if (r)
333 return ERR_PTR(r);
00db8189 334
6436cbcd
GC
335 /* If the phy_id is mostly Fs, there is no device there */
336 if ((phy_id & 0x1fffffff) == 0x1fffffff)
337 return NULL;
338
e62a768f 339 return phy_device_create(bus, addr, phy_id, is_c45, &c45_ids);
00db8189 340}
4dea547f
GL
341EXPORT_SYMBOL(get_phy_device);
342
343/**
344 * phy_device_register - Register the phy device on the MDIO bus
1d4ac5d5 345 * @phydev: phy_device structure to be added to the MDIO bus
4dea547f
GL
346 */
347int phy_device_register(struct phy_device *phydev)
348{
349 int err;
350
2f53e904 351 /* Don't register a phy if one is already registered at this address */
4dea547f
GL
352 if (phydev->bus->phy_map[phydev->addr])
353 return -EINVAL;
354 phydev->bus->phy_map[phydev->addr] = phydev;
355
356 /* Run all of the fixups for this PHY */
87aa9f9c
FF
357 err = phy_init_hw(phydev);
358 if (err) {
359 pr_err("PHY %d failed to initialize\n", phydev->addr);
360 goto out;
361 }
4dea547f 362
b2a43191 363 err = device_add(&phydev->dev);
4dea547f 364 if (err) {
b2a43191 365 pr_err("PHY %d failed to add\n", phydev->addr);
4dea547f
GL
366 goto out;
367 }
368
369 return 0;
370
371 out:
372 phydev->bus->phy_map[phydev->addr] = NULL;
373 return err;
374}
375EXPORT_SYMBOL(phy_device_register);
00db8189 376
f8f76db1
JP
377/**
378 * phy_find_first - finds the first PHY device on the bus
379 * @bus: the target MII bus
380 */
381struct phy_device *phy_find_first(struct mii_bus *bus)
382{
383 int addr;
384
385 for (addr = 0; addr < PHY_MAX_ADDR; addr++) {
386 if (bus->phy_map[addr])
387 return bus->phy_map[addr];
388 }
389 return NULL;
390}
391EXPORT_SYMBOL(phy_find_first);
392
b3df0da8
RD
393/**
394 * phy_prepare_link - prepares the PHY layer to monitor link status
395 * @phydev: target phy_device struct
396 * @handler: callback function for link status change notifications
00db8189 397 *
b3df0da8 398 * Description: Tells the PHY infrastructure to handle the
00db8189
AF
399 * gory details on monitoring link status (whether through
400 * polling or an interrupt), and to call back to the
401 * connected device driver when the link status changes.
402 * If you want to monitor your own link state, don't call
b3df0da8
RD
403 * this function.
404 */
89ff05ec 405static void phy_prepare_link(struct phy_device *phydev,
2f53e904 406 void (*handler)(struct net_device *))
00db8189
AF
407{
408 phydev->adjust_link = handler;
409}
410
fa94f6d9
GL
411/**
412 * phy_connect_direct - connect an ethernet device to a specific phy_device
413 * @dev: the network device to connect
414 * @phydev: the pointer to the phy device
415 * @handler: callback function for state change notifications
fa94f6d9
GL
416 * @interface: PHY device's interface
417 */
418int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
f9a8f83b 419 void (*handler)(struct net_device *),
fa94f6d9
GL
420 phy_interface_t interface)
421{
422 int rc;
423
f9a8f83b 424 rc = phy_attach_direct(dev, phydev, phydev->dev_flags, interface);
fa94f6d9
GL
425 if (rc)
426 return rc;
427
428 phy_prepare_link(phydev, handler);
29935aeb 429 phy_start_machine(phydev);
fa94f6d9
GL
430 if (phydev->irq > 0)
431 phy_start_interrupts(phydev);
432
433 return 0;
434}
435EXPORT_SYMBOL(phy_connect_direct);
436
b3df0da8
RD
437/**
438 * phy_connect - connect an ethernet device to a PHY device
439 * @dev: the network device to connect
5d12b132 440 * @bus_id: the id string of the PHY device to connect
b3df0da8 441 * @handler: callback function for state change notifications
b3df0da8 442 * @interface: PHY device's interface
e1393456 443 *
b3df0da8 444 * Description: Convenience function for connecting ethernet
e1393456
AF
445 * devices to PHY devices. The default behavior is for
446 * the PHY infrastructure to handle everything, and only notify
447 * the connected driver when the link status changes. If you
448 * don't want, or can't use the provided functionality, you may
449 * choose to call only the subset of functions which provide
450 * the desired functionality.
451 */
e109374f 452struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
2f53e904
SS
453 void (*handler)(struct net_device *),
454 phy_interface_t interface)
e1393456
AF
455{
456 struct phy_device *phydev;
fa94f6d9
GL
457 struct device *d;
458 int rc;
e1393456 459
fa94f6d9 460 /* Search the list of PHY devices on the mdio bus for the
2f53e904
SS
461 * PHY with the requested name
462 */
fa94f6d9
GL
463 d = bus_find_device_by_name(&mdio_bus_type, NULL, bus_id);
464 if (!d) {
465 pr_err("PHY %s not found\n", bus_id);
466 return ERR_PTR(-ENODEV);
467 }
468 phydev = to_phy_device(d);
e1393456 469
f9a8f83b 470 rc = phy_connect_direct(dev, phydev, handler, interface);
fa94f6d9
GL
471 if (rc)
472 return ERR_PTR(rc);
e1393456
AF
473
474 return phydev;
475}
476EXPORT_SYMBOL(phy_connect);
477
b3df0da8 478/**
2f53e904
SS
479 * phy_disconnect - disable interrupts, stop state machine, and detach a PHY
480 * device
b3df0da8
RD
481 * @phydev: target phy_device struct
482 */
e1393456
AF
483void phy_disconnect(struct phy_device *phydev)
484{
485 if (phydev->irq > 0)
486 phy_stop_interrupts(phydev);
487
488 phy_stop_machine(phydev);
e109374f 489
e1393456
AF
490 phydev->adjust_link = NULL;
491
492 phy_detach(phydev);
493}
494EXPORT_SYMBOL(phy_disconnect);
495
87aa9f9c
FF
496/**
497 * phy_poll_reset - Safely wait until a PHY reset has properly completed
498 * @phydev: The PHY device to poll
499 *
500 * Description: According to IEEE 802.3, Section 2, Subsection 22.2.4.1.1, as
501 * published in 2008, a PHY reset may take up to 0.5 seconds. The MII BMCR
502 * register must be polled until the BMCR_RESET bit clears.
503 *
504 * Furthermore, any attempts to write to PHY registers may have no effect
505 * or even generate MDIO bus errors until this is complete.
506 *
507 * Some PHYs (such as the Marvell 88E1111) don't entirely conform to the
508 * standard and do not fully reset after the BMCR_RESET bit is set, and may
509 * even *REQUIRE* a soft-reset to properly restart autonegotiation. In an
510 * effort to support such broken PHYs, this function is separate from the
511 * standard phy_init_hw() which will zero all the other bits in the BMCR
512 * and reapply all driver-specific and board-specific fixups.
513 */
514static int phy_poll_reset(struct phy_device *phydev)
515{
516 /* Poll until the reset bit clears (50ms per retry == 0.6 sec) */
517 unsigned int retries = 12;
518 int ret;
519
520 do {
521 msleep(50);
522 ret = phy_read(phydev, MII_BMCR);
523 if (ret < 0)
524 return ret;
525 } while (ret & BMCR_RESET && --retries);
526 if (ret & BMCR_RESET)
527 return -ETIMEDOUT;
528
2f53e904 529 /* Some chips (smsc911x) may still need up to another 1ms after the
87aa9f9c
FF
530 * BMCR_RESET bit is cleared before they are usable.
531 */
532 msleep(1);
533 return 0;
534}
535
2f5cb434
AV
536int phy_init_hw(struct phy_device *phydev)
537{
9df81dd7 538 int ret = 0;
2f5cb434
AV
539
540 if (!phydev->drv || !phydev->drv->config_init)
541 return 0;
542
9df81dd7
FF
543 if (phydev->drv->soft_reset)
544 ret = phydev->drv->soft_reset(phydev);
545 else
546 ret = genphy_soft_reset(phydev);
547
87aa9f9c
FF
548 if (ret < 0)
549 return ret;
550
2f5cb434
AV
551 ret = phy_scan_fixups(phydev);
552 if (ret < 0)
553 return ret;
554
555 return phydev->drv->config_init(phydev);
556}
87aa9f9c 557EXPORT_SYMBOL(phy_init_hw);
2f5cb434 558
b3df0da8 559/**
fa94f6d9 560 * phy_attach_direct - attach a network device to a given PHY device pointer
b3df0da8 561 * @dev: network device to attach
fa94f6d9 562 * @phydev: Pointer to phy_device to attach
b3df0da8
RD
563 * @flags: PHY device's dev_flags
564 * @interface: PHY device's interface
e1393456 565 *
b3df0da8 566 * Description: Called by drivers to attach to a particular PHY
e1393456 567 * device. The phy_device is found, and properly hooked up
257184d7
AF
568 * to the phy_driver. If no driver is attached, then a
569 * generic driver is used. The phy_device is given a ptr to
e1393456 570 * the attaching device, and given a callback for link status
b3df0da8 571 * change. The phy_device is returned to the attaching driver.
e1393456 572 */
257184d7
AF
573int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
574 u32 flags, phy_interface_t interface)
e1393456 575{
fa94f6d9 576 struct device *d = &phydev->dev;
d005a09e 577 int err;
e1393456
AF
578
579 /* Assume that if there is no driver, that it doesn't
2f53e904
SS
580 * exist, and we should use the genphy driver.
581 */
e1393456 582 if (NULL == d->driver) {
257184d7
AF
583 if (phydev->is_c45)
584 d->driver = &genphy_driver[GENPHY_DRV_10G].driver;
585 else
586 d->driver = &genphy_driver[GENPHY_DRV_1G].driver;
e1393456
AF
587
588 err = d->driver->probe(d);
b7a00ecd
JG
589 if (err >= 0)
590 err = device_bind_driver(d);
e1393456 591
b7a00ecd 592 if (err)
fa94f6d9 593 return err;
e1393456
AF
594 }
595
596 if (phydev->attached_dev) {
fa94f6d9
GL
597 dev_err(&dev->dev, "PHY already attached\n");
598 return -EBUSY;
e1393456
AF
599 }
600
601 phydev->attached_dev = dev;
c1f19b51 602 dev->phydev = phydev;
e1393456
AF
603
604 phydev->dev_flags = flags;
605
e8a2b6a4
AF
606 phydev->interface = interface;
607
ef24b16b
AV
608 phydev->state = PHY_READY;
609
e8a2b6a4
AF
610 /* Do initial configuration here, now that
611 * we have certain key parameters
2f53e904
SS
612 * (dev_flags and interface)
613 */
d005a09e
MKB
614 err = phy_init_hw(phydev);
615 if (err)
616 phy_detach(phydev);
617
1211ce53
SH
618 phy_resume(phydev);
619
d005a09e 620 return err;
fa94f6d9 621}
257184d7 622EXPORT_SYMBOL(phy_attach_direct);
fa94f6d9
GL
623
624/**
625 * phy_attach - attach a network device to a particular PHY device
626 * @dev: network device to attach
627 * @bus_id: Bus ID of PHY device to attach
fa94f6d9
GL
628 * @interface: PHY device's interface
629 *
630 * Description: Same as phy_attach_direct() except that a PHY bus_id
631 * string is passed instead of a pointer to a struct phy_device.
632 */
2f53e904
SS
633struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
634 phy_interface_t interface)
fa94f6d9
GL
635{
636 struct bus_type *bus = &mdio_bus_type;
637 struct phy_device *phydev;
638 struct device *d;
639 int rc;
640
641 /* Search the list of PHY devices on the mdio bus for the
2f53e904
SS
642 * PHY with the requested name
643 */
fa94f6d9
GL
644 d = bus_find_device_by_name(bus, NULL, bus_id);
645 if (!d) {
646 pr_err("PHY %s not found\n", bus_id);
647 return ERR_PTR(-ENODEV);
e8a2b6a4 648 }
fa94f6d9
GL
649 phydev = to_phy_device(d);
650
f9a8f83b 651 rc = phy_attach_direct(dev, phydev, phydev->dev_flags, interface);
fa94f6d9
GL
652 if (rc)
653 return ERR_PTR(rc);
e8a2b6a4 654
e1393456
AF
655 return phydev;
656}
657EXPORT_SYMBOL(phy_attach);
658
b3df0da8
RD
659/**
660 * phy_detach - detach a PHY device from its network device
661 * @phydev: target phy_device struct
662 */
e1393456
AF
663void phy_detach(struct phy_device *phydev)
664{
ab2145ed 665 int i;
c1f19b51 666 phydev->attached_dev->phydev = NULL;
e1393456 667 phydev->attached_dev = NULL;
1211ce53 668 phy_suspend(phydev);
e1393456
AF
669
670 /* If the device had no specific driver before (i.e. - it
671 * was using the generic driver), we unbind the device
672 * from the generic driver so that there's a chance a
2f53e904
SS
673 * real driver could be loaded
674 */
ab2145ed
SX
675 for (i = 0; i < ARRAY_SIZE(genphy_driver); i++) {
676 if (phydev->dev.driver == &genphy_driver[i].driver) {
677 device_release_driver(&phydev->dev);
678 break;
679 }
680 }
e1393456
AF
681}
682EXPORT_SYMBOL(phy_detach);
683
481b5d93
SH
684int phy_suspend(struct phy_device *phydev)
685{
686 struct phy_driver *phydrv = to_phy_driver(phydev->dev.driver);
32fc3fd4 687 struct ethtool_wolinfo wol = { .cmd = ETHTOOL_GWOL };
481b5d93
SH
688
689 /* If the device has WOL enabled, we cannot suspend the PHY */
481b5d93
SH
690 phy_ethtool_get_wol(phydev, &wol);
691 if (wol.wolopts)
692 return -EBUSY;
693
694 if (phydrv->suspend)
695 return phydrv->suspend(phydev);
696 return 0;
697}
698
699int phy_resume(struct phy_device *phydev)
700{
701 struct phy_driver *phydrv = to_phy_driver(phydev->dev.driver);
702
703 if (phydrv->resume)
704 return phydrv->resume(phydev);
705 return 0;
706}
e1393456 707
00db8189
AF
708/* Generic PHY support and helper functions */
709
b3df0da8 710/**
25985edc 711 * genphy_config_advert - sanitize and advertise auto-negotiation parameters
b3df0da8 712 * @phydev: target phy_device struct
00db8189 713 *
b3df0da8 714 * Description: Writes MII_ADVERTISE with the appropriate values,
00db8189 715 * after sanitizing the values to make sure we only advertise
51e2a384
TP
716 * what is supported. Returns < 0 on error, 0 if the PHY's advertisement
717 * hasn't changed, and > 0 if it has changed.
00db8189 718 */
89ff05ec 719static int genphy_config_advert(struct phy_device *phydev)
00db8189
AF
720{
721 u32 advertise;
5273e3a5 722 int oldadv, adv, bmsr;
51e2a384 723 int err, changed = 0;
00db8189 724
2f53e904 725 /* Only allow advertising what this PHY supports */
00db8189
AF
726 phydev->advertising &= phydev->supported;
727 advertise = phydev->advertising;
728
729 /* Setup standard advertisement */
2f53e904 730 adv = phy_read(phydev, MII_ADVERTISE);
00db8189
AF
731 if (adv < 0)
732 return adv;
733
2f53e904 734 oldadv = adv;
28011cf1 735 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
00db8189 736 ADVERTISE_PAUSE_ASYM);
37f07023 737 adv |= ethtool_adv_to_mii_adv_t(advertise);
00db8189 738
51e2a384
TP
739 if (adv != oldadv) {
740 err = phy_write(phydev, MII_ADVERTISE, adv);
00db8189 741
51e2a384
TP
742 if (err < 0)
743 return err;
744 changed = 1;
745 }
00db8189 746
5273e3a5
FF
747 bmsr = phy_read(phydev, MII_BMSR);
748 if (bmsr < 0)
749 return bmsr;
750
751 /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
752 * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
753 * logical 1.
754 */
755 if (!(bmsr & BMSR_ESTATEN))
756 return changed;
757
00db8189 758 /* Configure gigabit if it's supported */
5273e3a5
FF
759 adv = phy_read(phydev, MII_CTRL1000);
760 if (adv < 0)
761 return adv;
762
763 oldadv = adv;
764 adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
765
00db8189 766 if (phydev->supported & (SUPPORTED_1000baseT_Half |
2f53e904 767 SUPPORTED_1000baseT_Full)) {
37f07023 768 adv |= ethtool_adv_to_mii_ctrl1000_t(advertise);
5273e3a5 769 if (adv != oldadv)
51e2a384 770 changed = 1;
00db8189
AF
771 }
772
5273e3a5
FF
773 err = phy_write(phydev, MII_CTRL1000, adv);
774 if (err < 0)
775 return err;
776
51e2a384 777 return changed;
00db8189 778}
00db8189 779
b3df0da8
RD
780/**
781 * genphy_setup_forced - configures/forces speed/duplex from @phydev
782 * @phydev: target phy_device struct
00db8189 783 *
b3df0da8 784 * Description: Configures MII_BMCR to force speed/duplex
00db8189 785 * to the values in phydev. Assumes that the values are valid.
b3df0da8
RD
786 * Please see phy_sanitize_settings().
787 */
3fb69bca 788int genphy_setup_forced(struct phy_device *phydev)
00db8189 789{
bc1e0a09 790 int ctl = 0;
00db8189 791
2f53e904
SS
792 phydev->pause = 0;
793 phydev->asym_pause = 0;
00db8189
AF
794
795 if (SPEED_1000 == phydev->speed)
796 ctl |= BMCR_SPEED1000;
797 else if (SPEED_100 == phydev->speed)
798 ctl |= BMCR_SPEED100;
799
800 if (DUPLEX_FULL == phydev->duplex)
801 ctl |= BMCR_FULLDPLX;
e109374f 802
e62a768f 803 return phy_write(phydev, MII_BMCR, ctl);
00db8189 804}
3fb69bca 805EXPORT_SYMBOL(genphy_setup_forced);
00db8189 806
b3df0da8
RD
807/**
808 * genphy_restart_aneg - Enable and Restart Autonegotiation
809 * @phydev: target phy_device struct
810 */
00db8189
AF
811int genphy_restart_aneg(struct phy_device *phydev)
812{
553fe92b 813 int ctl = phy_read(phydev, MII_BMCR);
00db8189
AF
814
815 if (ctl < 0)
816 return ctl;
817
2f53e904 818 ctl |= BMCR_ANENABLE | BMCR_ANRESTART;
00db8189
AF
819
820 /* Don't isolate the PHY if we're negotiating */
2f53e904 821 ctl &= ~BMCR_ISOLATE;
00db8189 822
553fe92b 823 return phy_write(phydev, MII_BMCR, ctl);
00db8189 824}
892871dc 825EXPORT_SYMBOL(genphy_restart_aneg);
00db8189 826
b3df0da8
RD
827/**
828 * genphy_config_aneg - restart auto-negotiation or write BMCR
829 * @phydev: target phy_device struct
00db8189 830 *
b3df0da8 831 * Description: If auto-negotiation is enabled, we configure the
00db8189 832 * advertising, and then restart auto-negotiation. If it is not
b3df0da8 833 * enabled, then we write the BMCR.
00db8189
AF
834 */
835int genphy_config_aneg(struct phy_device *phydev)
836{
de339c2a 837 int result;
00db8189 838
de339c2a
TP
839 if (AUTONEG_ENABLE != phydev->autoneg)
840 return genphy_setup_forced(phydev);
00db8189 841
de339c2a 842 result = genphy_config_advert(phydev);
de339c2a
TP
843 if (result < 0) /* error */
844 return result;
de339c2a 845 if (result == 0) {
25985edc 846 /* Advertisement hasn't changed, but maybe aneg was never on to
2f53e904
SS
847 * begin with? Or maybe phy was isolated?
848 */
de339c2a
TP
849 int ctl = phy_read(phydev, MII_BMCR);
850
851 if (ctl < 0)
852 return ctl;
853
854 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
855 result = 1; /* do restart aneg */
856 }
857
858 /* Only restart aneg if we are advertising something different
2f53e904
SS
859 * than we were before.
860 */
de339c2a
TP
861 if (result > 0)
862 result = genphy_restart_aneg(phydev);
00db8189 863
51e2a384 864 return result;
00db8189
AF
865}
866EXPORT_SYMBOL(genphy_config_aneg);
867
a9fa6e6a
FF
868/**
869 * genphy_aneg_done - return auto-negotiation status
870 * @phydev: target phy_device struct
871 *
872 * Description: Reads the status register and returns 0 either if
873 * auto-negotiation is incomplete, or if there was an error.
874 * Returns BMSR_ANEGCOMPLETE if auto-negotiation is done.
875 */
876int genphy_aneg_done(struct phy_device *phydev)
877{
878 int retval = phy_read(phydev, MII_BMSR);
879
880 return (retval < 0) ? retval : (retval & BMSR_ANEGCOMPLETE);
881}
882EXPORT_SYMBOL(genphy_aneg_done);
883
395056ed 884static int gen10g_config_aneg(struct phy_device *phydev)
124059fd
AF
885{
886 return 0;
887}
124059fd 888
b3df0da8
RD
889/**
890 * genphy_update_link - update link status in @phydev
891 * @phydev: target phy_device struct
00db8189 892 *
b3df0da8 893 * Description: Update the value in phydev->link to reflect the
00db8189 894 * current link value. In order to do this, we need to read
b3df0da8 895 * the status register twice, keeping the second value.
00db8189
AF
896 */
897int genphy_update_link(struct phy_device *phydev)
898{
899 int status;
900
901 /* Do a fake read */
902 status = phy_read(phydev, MII_BMSR);
00db8189
AF
903 if (status < 0)
904 return status;
905
906 /* Read link and autonegotiation status */
907 status = phy_read(phydev, MII_BMSR);
00db8189
AF
908 if (status < 0)
909 return status;
910
911 if ((status & BMSR_LSTATUS) == 0)
912 phydev->link = 0;
913 else
914 phydev->link = 1;
915
916 return 0;
917}
6b655529 918EXPORT_SYMBOL(genphy_update_link);
00db8189 919
b3df0da8
RD
920/**
921 * genphy_read_status - check the link status and update current link state
922 * @phydev: target phy_device struct
00db8189 923 *
b3df0da8 924 * Description: Check the link, then figure out the current state
00db8189
AF
925 * by comparing what we advertise with what the link partner
926 * advertises. Start by checking the gigabit possibilities,
927 * then move on to 10/100.
928 */
929int genphy_read_status(struct phy_device *phydev)
930{
931 int adv;
932 int err;
933 int lpa;
934 int lpagb = 0;
a4572e0c
CB
935 int common_adv;
936 int common_adv_gb = 0;
00db8189 937
2f53e904 938 /* Update the link, but return if there was an error */
00db8189
AF
939 err = genphy_update_link(phydev);
940 if (err)
941 return err;
942
114002bc
FF
943 phydev->lp_advertising = 0;
944
00db8189
AF
945 if (AUTONEG_ENABLE == phydev->autoneg) {
946 if (phydev->supported & (SUPPORTED_1000baseT_Half
947 | SUPPORTED_1000baseT_Full)) {
948 lpagb = phy_read(phydev, MII_STAT1000);
00db8189
AF
949 if (lpagb < 0)
950 return lpagb;
951
952 adv = phy_read(phydev, MII_CTRL1000);
00db8189
AF
953 if (adv < 0)
954 return adv;
955
114002bc
FF
956 phydev->lp_advertising =
957 mii_stat1000_to_ethtool_lpa_t(lpagb);
a4572e0c 958 common_adv_gb = lpagb & adv << 2;
00db8189
AF
959 }
960
961 lpa = phy_read(phydev, MII_LPA);
00db8189
AF
962 if (lpa < 0)
963 return lpa;
964
114002bc
FF
965 phydev->lp_advertising |= mii_lpa_to_ethtool_lpa_t(lpa);
966
00db8189 967 adv = phy_read(phydev, MII_ADVERTISE);
00db8189
AF
968 if (adv < 0)
969 return adv;
970
a4572e0c 971 common_adv = lpa & adv;
00db8189
AF
972
973 phydev->speed = SPEED_10;
974 phydev->duplex = DUPLEX_HALF;
2f53e904
SS
975 phydev->pause = 0;
976 phydev->asym_pause = 0;
00db8189 977
a4572e0c 978 if (common_adv_gb & (LPA_1000FULL | LPA_1000HALF)) {
00db8189
AF
979 phydev->speed = SPEED_1000;
980
a4572e0c 981 if (common_adv_gb & LPA_1000FULL)
00db8189 982 phydev->duplex = DUPLEX_FULL;
a4572e0c 983 } else if (common_adv & (LPA_100FULL | LPA_100HALF)) {
00db8189 984 phydev->speed = SPEED_100;
e109374f 985
a4572e0c 986 if (common_adv & LPA_100FULL)
00db8189
AF
987 phydev->duplex = DUPLEX_FULL;
988 } else
a4572e0c 989 if (common_adv & LPA_10FULL)
00db8189
AF
990 phydev->duplex = DUPLEX_FULL;
991
e109374f 992 if (phydev->duplex == DUPLEX_FULL) {
00db8189
AF
993 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
994 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
995 }
996 } else {
997 int bmcr = phy_read(phydev, MII_BMCR);
2f53e904 998
00db8189
AF
999 if (bmcr < 0)
1000 return bmcr;
1001
1002 if (bmcr & BMCR_FULLDPLX)
1003 phydev->duplex = DUPLEX_FULL;
1004 else
1005 phydev->duplex = DUPLEX_HALF;
1006
1007 if (bmcr & BMCR_SPEED1000)
1008 phydev->speed = SPEED_1000;
1009 else if (bmcr & BMCR_SPEED100)
1010 phydev->speed = SPEED_100;
1011 else
1012 phydev->speed = SPEED_10;
1013
2f53e904
SS
1014 phydev->pause = 0;
1015 phydev->asym_pause = 0;
00db8189
AF
1016 }
1017
1018 return 0;
1019}
1020EXPORT_SYMBOL(genphy_read_status);
1021
395056ed 1022static int gen10g_read_status(struct phy_device *phydev)
124059fd
AF
1023{
1024 int devad, reg;
1025 u32 mmd_mask = phydev->c45_ids.devices_in_package;
1026
1027 phydev->link = 1;
1028
1029 /* For now just lie and say it's 10G all the time */
1030 phydev->speed = SPEED_10000;
1031 phydev->duplex = DUPLEX_FULL;
1032
1033 for (devad = 0; mmd_mask; devad++, mmd_mask = mmd_mask >> 1) {
1034 if (!(mmd_mask & 1))
1035 continue;
1036
1037 /* Read twice because link state is latched and a
1038 * read moves the current state into the register
1039 */
1040 phy_read_mmd(phydev, devad, MDIO_STAT1);
1041 reg = phy_read_mmd(phydev, devad, MDIO_STAT1);
1042 if (reg < 0 || !(reg & MDIO_STAT1_LSTATUS))
1043 phydev->link = 0;
1044 }
1045
1046 return 0;
1047}
124059fd 1048
797ac071
FF
1049/**
1050 * genphy_soft_reset - software reset the PHY via BMCR_RESET bit
1051 * @phydev: target phy_device struct
1052 *
1053 * Description: Perform a software PHY reset using the standard
1054 * BMCR_RESET bit and poll for the reset bit to be cleared.
1055 *
1056 * Returns: 0 on success, < 0 on failure
1057 */
1058int genphy_soft_reset(struct phy_device *phydev)
1059{
1060 int ret;
1061
1062 ret = phy_write(phydev, MII_BMCR, BMCR_RESET);
1063 if (ret < 0)
1064 return ret;
1065
1066 return phy_poll_reset(phydev);
1067}
1068EXPORT_SYMBOL(genphy_soft_reset);
1069
af6b6967 1070int genphy_config_init(struct phy_device *phydev)
00db8189 1071{
84c22d79 1072 int val;
00db8189
AF
1073 u32 features;
1074
00db8189
AF
1075 features = (SUPPORTED_TP | SUPPORTED_MII
1076 | SUPPORTED_AUI | SUPPORTED_FIBRE |
1077 SUPPORTED_BNC);
1078
1079 /* Do we support autonegotiation? */
1080 val = phy_read(phydev, MII_BMSR);
00db8189
AF
1081 if (val < 0)
1082 return val;
1083
1084 if (val & BMSR_ANEGCAPABLE)
1085 features |= SUPPORTED_Autoneg;
1086
1087 if (val & BMSR_100FULL)
1088 features |= SUPPORTED_100baseT_Full;
1089 if (val & BMSR_100HALF)
1090 features |= SUPPORTED_100baseT_Half;
1091 if (val & BMSR_10FULL)
1092 features |= SUPPORTED_10baseT_Full;
1093 if (val & BMSR_10HALF)
1094 features |= SUPPORTED_10baseT_Half;
1095
1096 if (val & BMSR_ESTATEN) {
1097 val = phy_read(phydev, MII_ESTATUS);
00db8189
AF
1098 if (val < 0)
1099 return val;
1100
1101 if (val & ESTATUS_1000_TFULL)
1102 features |= SUPPORTED_1000baseT_Full;
1103 if (val & ESTATUS_1000_THALF)
1104 features |= SUPPORTED_1000baseT_Half;
1105 }
1106
c242a472
SH
1107 phydev->supported &= features;
1108 phydev->advertising &= features;
00db8189
AF
1109
1110 return 0;
1111}
124059fd 1112
9df81dd7
FF
1113static int gen10g_soft_reset(struct phy_device *phydev)
1114{
1115 /* Do nothing for now */
1116 return 0;
1117}
af6b6967 1118EXPORT_SYMBOL(genphy_config_init);
9df81dd7 1119
124059fd
AF
1120static int gen10g_config_init(struct phy_device *phydev)
1121{
1122 /* Temporarily just say we support everything */
1123 phydev->supported = SUPPORTED_10000baseT_Full;
1124 phydev->advertising = SUPPORTED_10000baseT_Full;
1125
1126 return 0;
1127}
1128
0f0ca340
GC
1129int genphy_suspend(struct phy_device *phydev)
1130{
1131 int value;
1132
1133 mutex_lock(&phydev->lock);
1134
1135 value = phy_read(phydev, MII_BMCR);
2f53e904 1136 phy_write(phydev, MII_BMCR, value | BMCR_PDOWN);
0f0ca340
GC
1137
1138 mutex_unlock(&phydev->lock);
1139
1140 return 0;
1141}
1142EXPORT_SYMBOL(genphy_suspend);
00db8189 1143
395056ed 1144static int gen10g_suspend(struct phy_device *phydev)
124059fd
AF
1145{
1146 return 0;
1147}
124059fd 1148
0f0ca340
GC
1149int genphy_resume(struct phy_device *phydev)
1150{
1151 int value;
1152
1153 mutex_lock(&phydev->lock);
1154
1155 value = phy_read(phydev, MII_BMCR);
2f53e904 1156 phy_write(phydev, MII_BMCR, value & ~BMCR_PDOWN);
0f0ca340
GC
1157
1158 mutex_unlock(&phydev->lock);
1159
1160 return 0;
1161}
1162EXPORT_SYMBOL(genphy_resume);
00db8189 1163
395056ed 1164static int gen10g_resume(struct phy_device *phydev)
124059fd
AF
1165{
1166 return 0;
1167}
124059fd 1168
b3df0da8
RD
1169/**
1170 * phy_probe - probe and init a PHY device
1171 * @dev: device to probe and init
00db8189 1172 *
b3df0da8 1173 * Description: Take care of setting up the phy_device structure,
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AF
1174 * set the state to READY (the driver's init function should
1175 * set it to STARTING if needed).
1176 */
1177static int phy_probe(struct device *dev)
1178{
553fe92b
SS
1179 struct phy_device *phydev = to_phy_device(dev);
1180 struct device_driver *drv = phydev->dev.driver;
1181 struct phy_driver *phydrv = to_phy_driver(drv);
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AF
1182 int err = 0;
1183
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AF
1184 phydev->drv = phydrv;
1185
2c7b4921
FF
1186 /* Disable the interrupt if the PHY doesn't support it
1187 * but the interrupt is still a valid one
1188 */
1189 if (!(phydrv->flags & PHY_HAS_INTERRUPT) &&
2f53e904 1190 phy_interrupt_is_valid(phydev))
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AF
1191 phydev->irq = PHY_POLL;
1192
4284b6a5
FF
1193 if (phydrv->flags & PHY_IS_INTERNAL)
1194 phydev->is_internal = true;
1195
35b5f6b1 1196 mutex_lock(&phydev->lock);
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AF
1197
1198 /* Start out supporting everything. Eventually,
1199 * a controller will attach, and may modify one
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SS
1200 * or both of these values
1201 */
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AF
1202 phydev->supported = phydrv->features;
1203 phydev->advertising = phydrv->features;
1204
1205 /* Set the state to READY by default */
1206 phydev->state = PHY_READY;
1207
1208 if (phydev->drv->probe)
1209 err = phydev->drv->probe(phydev);
1210
35b5f6b1 1211 mutex_unlock(&phydev->lock);
00db8189 1212
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AF
1213 return err;
1214}
1215
1216static int phy_remove(struct device *dev)
1217{
553fe92b 1218 struct phy_device *phydev = to_phy_device(dev);
00db8189 1219
35b5f6b1 1220 mutex_lock(&phydev->lock);
00db8189 1221 phydev->state = PHY_DOWN;
35b5f6b1 1222 mutex_unlock(&phydev->lock);
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AF
1223
1224 if (phydev->drv->remove)
1225 phydev->drv->remove(phydev);
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AF
1226 phydev->drv = NULL;
1227
1228 return 0;
1229}
1230
b3df0da8
RD
1231/**
1232 * phy_driver_register - register a phy_driver with the PHY layer
1233 * @new_driver: new phy_driver to register
1234 */
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1235int phy_driver_register(struct phy_driver *new_driver)
1236{
1237 int retval;
1238
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1239 new_driver->driver.name = new_driver->name;
1240 new_driver->driver.bus = &mdio_bus_type;
1241 new_driver->driver.probe = phy_probe;
1242 new_driver->driver.remove = phy_remove;
1243
1244 retval = driver_register(&new_driver->driver);
00db8189 1245 if (retval) {
8d242488
JP
1246 pr_err("%s: Error %d in registering driver\n",
1247 new_driver->name, retval);
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AF
1248
1249 return retval;
1250 }
1251
f2511f13 1252 pr_debug("%s: Registered new driver\n", new_driver->name);
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AF
1253
1254 return 0;
1255}
1256EXPORT_SYMBOL(phy_driver_register);
1257
d5bf9071
CH
1258int phy_drivers_register(struct phy_driver *new_driver, int n)
1259{
1260 int i, ret = 0;
1261
1262 for (i = 0; i < n; i++) {
1263 ret = phy_driver_register(new_driver + i);
1264 if (ret) {
1265 while (i-- > 0)
1266 phy_driver_unregister(new_driver + i);
1267 break;
1268 }
1269 }
1270 return ret;
1271}
1272EXPORT_SYMBOL(phy_drivers_register);
1273
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1274void phy_driver_unregister(struct phy_driver *drv)
1275{
1276 driver_unregister(&drv->driver);
1277}
1278EXPORT_SYMBOL(phy_driver_unregister);
1279
d5bf9071
CH
1280void phy_drivers_unregister(struct phy_driver *drv, int n)
1281{
1282 int i;
2f53e904
SS
1283
1284 for (i = 0; i < n; i++)
d5bf9071 1285 phy_driver_unregister(drv + i);
d5bf9071
CH
1286}
1287EXPORT_SYMBOL(phy_drivers_unregister);
1288
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SX
1289static struct phy_driver genphy_driver[] = {
1290{
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AF
1291 .phy_id = 0xffffffff,
1292 .phy_id_mask = 0xffffffff,
1293 .name = "Generic PHY",
9df81dd7 1294 .soft_reset = genphy_soft_reset,
e1393456 1295 .config_init = genphy_config_init,
c242a472
SH
1296 .features = PHY_GBIT_FEATURES | SUPPORTED_MII |
1297 SUPPORTED_AUI | SUPPORTED_FIBRE |
1298 SUPPORTED_BNC,
e1393456 1299 .config_aneg = genphy_config_aneg,
76a423a3 1300 .aneg_done = genphy_aneg_done,
e1393456 1301 .read_status = genphy_read_status,
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GC
1302 .suspend = genphy_suspend,
1303 .resume = genphy_resume,
e109374f 1304 .driver = { .owner = THIS_MODULE, },
124059fd
AF
1305}, {
1306 .phy_id = 0xffffffff,
1307 .phy_id_mask = 0xffffffff,
1308 .name = "Generic 10G PHY",
9df81dd7 1309 .soft_reset = gen10g_soft_reset,
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AF
1310 .config_init = gen10g_config_init,
1311 .features = 0,
1312 .config_aneg = gen10g_config_aneg,
1313 .read_status = gen10g_read_status,
1314 .suspend = gen10g_suspend,
1315 .resume = gen10g_resume,
1316 .driver = {.owner = THIS_MODULE, },
ab2145ed 1317} };
00db8189 1318
67c4f3fa 1319static int __init phy_init(void)
00db8189 1320{
67c4f3fa 1321 int rc;
67c4f3fa
JG
1322
1323 rc = mdio_bus_init();
1324 if (rc)
e1393456 1325 return rc;
00db8189 1326
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SX
1327 rc = phy_drivers_register(genphy_driver,
1328 ARRAY_SIZE(genphy_driver));
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AF
1329 if (rc)
1330 mdio_bus_exit();
67c4f3fa 1331
67c4f3fa 1332 return rc;
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AF
1333}
1334
67c4f3fa 1335static void __exit phy_exit(void)
00db8189 1336{
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SX
1337 phy_drivers_unregister(genphy_driver,
1338 ARRAY_SIZE(genphy_driver));
e1393456 1339 mdio_bus_exit();
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AF
1340}
1341
e1393456 1342subsys_initcall(phy_init);
67c4f3fa 1343module_exit(phy_exit);