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9525ae83 RK |
1 | /* |
2 | * phylink models the MAC to optional PHY connection, supporting | |
3 | * technologies such as SFP cages where the PHY is hot-pluggable. | |
4 | * | |
5 | * Copyright (C) 2015 Russell King | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | #include <linux/ethtool.h> | |
12 | #include <linux/export.h> | |
13 | #include <linux/gpio/consumer.h> | |
14 | #include <linux/netdevice.h> | |
15 | #include <linux/of.h> | |
16 | #include <linux/of_mdio.h> | |
17 | #include <linux/phy.h> | |
18 | #include <linux/phy_fixed.h> | |
19 | #include <linux/phylink.h> | |
20 | #include <linux/rtnetlink.h> | |
21 | #include <linux/spinlock.h> | |
22 | #include <linux/workqueue.h> | |
23 | ||
ce0aa27f | 24 | #include "sfp.h" |
9525ae83 RK |
25 | #include "swphy.h" |
26 | ||
27 | #define SUPPORTED_INTERFACES \ | |
28 | (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ | |
29 | SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) | |
30 | #define ADVERTISED_INTERFACES \ | |
31 | (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ | |
32 | ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) | |
33 | ||
34 | enum { | |
35 | PHYLINK_DISABLE_STOPPED, | |
ce0aa27f | 36 | PHYLINK_DISABLE_LINK, |
9525ae83 RK |
37 | }; |
38 | ||
39 | struct phylink { | |
40 | struct net_device *netdev; | |
41 | const struct phylink_mac_ops *ops; | |
42 | ||
43 | unsigned long phylink_disable_state; /* bitmask of disables */ | |
44 | struct phy_device *phydev; | |
45 | phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ | |
46 | u8 link_an_mode; /* MLO_AN_xxx */ | |
47 | u8 link_port; /* The current non-phy ethtool port */ | |
48 | __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); | |
49 | ||
50 | /* The link configuration settings */ | |
51 | struct phylink_link_state link_config; | |
52 | struct gpio_desc *link_gpio; | |
53 | ||
54 | struct mutex state_mutex; | |
55 | struct phylink_link_state phy_state; | |
56 | struct work_struct resolve; | |
57 | ||
58 | bool mac_link_dropped; | |
ce0aa27f RK |
59 | |
60 | struct sfp_bus *sfp_bus; | |
9525ae83 RK |
61 | }; |
62 | ||
63 | static inline void linkmode_zero(unsigned long *dst) | |
64 | { | |
65 | bitmap_zero(dst, __ETHTOOL_LINK_MODE_MASK_NBITS); | |
66 | } | |
67 | ||
68 | static inline void linkmode_copy(unsigned long *dst, const unsigned long *src) | |
69 | { | |
70 | bitmap_copy(dst, src, __ETHTOOL_LINK_MODE_MASK_NBITS); | |
71 | } | |
72 | ||
73 | static inline void linkmode_and(unsigned long *dst, const unsigned long *a, | |
74 | const unsigned long *b) | |
75 | { | |
76 | bitmap_and(dst, a, b, __ETHTOOL_LINK_MODE_MASK_NBITS); | |
77 | } | |
78 | ||
79 | static inline void linkmode_or(unsigned long *dst, const unsigned long *a, | |
80 | const unsigned long *b) | |
81 | { | |
82 | bitmap_or(dst, a, b, __ETHTOOL_LINK_MODE_MASK_NBITS); | |
83 | } | |
84 | ||
85 | static inline bool linkmode_empty(const unsigned long *src) | |
86 | { | |
87 | return bitmap_empty(src, __ETHTOOL_LINK_MODE_MASK_NBITS); | |
88 | } | |
89 | ||
90 | void phylink_set_port_modes(unsigned long *mask) | |
91 | { | |
92 | phylink_set(mask, TP); | |
93 | phylink_set(mask, AUI); | |
94 | phylink_set(mask, MII); | |
95 | phylink_set(mask, FIBRE); | |
96 | phylink_set(mask, BNC); | |
97 | phylink_set(mask, Backplane); | |
98 | } | |
99 | EXPORT_SYMBOL_GPL(phylink_set_port_modes); | |
100 | ||
101 | static int phylink_is_empty_linkmode(const unsigned long *linkmode) | |
102 | { | |
103 | __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; | |
104 | ||
105 | phylink_set_port_modes(tmp); | |
106 | phylink_set(tmp, Autoneg); | |
107 | phylink_set(tmp, Pause); | |
108 | phylink_set(tmp, Asym_Pause); | |
109 | ||
110 | bitmap_andnot(tmp, linkmode, tmp, __ETHTOOL_LINK_MODE_MASK_NBITS); | |
111 | ||
112 | return linkmode_empty(tmp); | |
113 | } | |
114 | ||
115 | static const char *phylink_an_mode_str(unsigned int mode) | |
116 | { | |
117 | static const char *modestr[] = { | |
118 | [MLO_AN_PHY] = "phy", | |
119 | [MLO_AN_FIXED] = "fixed", | |
120 | [MLO_AN_SGMII] = "SGMII", | |
121 | [MLO_AN_8023Z] = "802.3z", | |
122 | }; | |
123 | ||
124 | return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; | |
125 | } | |
126 | ||
127 | static int phylink_validate(struct phylink *pl, unsigned long *supported, | |
128 | struct phylink_link_state *state) | |
129 | { | |
130 | pl->ops->validate(pl->netdev, supported, state); | |
131 | ||
132 | return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; | |
133 | } | |
134 | ||
135 | static int phylink_parse_fixedlink(struct phylink *pl, struct device_node *np) | |
136 | { | |
137 | struct device_node *fixed_node; | |
138 | const struct phy_setting *s; | |
139 | struct gpio_desc *desc; | |
140 | const __be32 *fixed_prop; | |
141 | u32 speed; | |
142 | int ret, len; | |
143 | ||
144 | fixed_node = of_get_child_by_name(np, "fixed-link"); | |
145 | if (fixed_node) { | |
146 | ret = of_property_read_u32(fixed_node, "speed", &speed); | |
147 | ||
148 | pl->link_config.speed = speed; | |
149 | pl->link_config.duplex = DUPLEX_HALF; | |
150 | ||
151 | if (of_property_read_bool(fixed_node, "full-duplex")) | |
152 | pl->link_config.duplex = DUPLEX_FULL; | |
153 | ||
154 | /* We treat the "pause" and "asym-pause" terminology as | |
155 | * defining the link partner's ability. */ | |
156 | if (of_property_read_bool(fixed_node, "pause")) | |
157 | pl->link_config.pause |= MLO_PAUSE_SYM; | |
158 | if (of_property_read_bool(fixed_node, "asym-pause")) | |
159 | pl->link_config.pause |= MLO_PAUSE_ASYM; | |
160 | ||
161 | if (ret == 0) { | |
162 | desc = fwnode_get_named_gpiod(&fixed_node->fwnode, | |
163 | "link-gpios", 0, | |
164 | GPIOD_IN, "?"); | |
165 | ||
166 | if (!IS_ERR(desc)) | |
167 | pl->link_gpio = desc; | |
168 | else if (desc == ERR_PTR(-EPROBE_DEFER)) | |
169 | ret = -EPROBE_DEFER; | |
170 | } | |
171 | of_node_put(fixed_node); | |
172 | ||
173 | if (ret) | |
174 | return ret; | |
175 | } else { | |
176 | fixed_prop = of_get_property(np, "fixed-link", &len); | |
177 | if (!fixed_prop) { | |
178 | netdev_err(pl->netdev, "broken fixed-link?\n"); | |
179 | return -EINVAL; | |
180 | } | |
181 | if (len == 5 * sizeof(*fixed_prop)) { | |
182 | pl->link_config.duplex = be32_to_cpu(fixed_prop[1]) ? | |
183 | DUPLEX_FULL : DUPLEX_HALF; | |
184 | pl->link_config.speed = be32_to_cpu(fixed_prop[2]); | |
185 | if (be32_to_cpu(fixed_prop[3])) | |
186 | pl->link_config.pause |= MLO_PAUSE_SYM; | |
187 | if (be32_to_cpu(fixed_prop[4])) | |
188 | pl->link_config.pause |= MLO_PAUSE_ASYM; | |
189 | } | |
190 | } | |
191 | ||
192 | if (pl->link_config.speed > SPEED_1000 && | |
193 | pl->link_config.duplex != DUPLEX_FULL) | |
194 | netdev_warn(pl->netdev, "fixed link specifies half duplex for %dMbps link?\n", | |
195 | pl->link_config.speed); | |
196 | ||
197 | bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); | |
198 | linkmode_copy(pl->link_config.advertising, pl->supported); | |
199 | phylink_validate(pl, pl->supported, &pl->link_config); | |
200 | ||
201 | s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, | |
202 | pl->supported, | |
203 | __ETHTOOL_LINK_MODE_MASK_NBITS, true); | |
204 | linkmode_zero(pl->supported); | |
205 | phylink_set(pl->supported, MII); | |
206 | if (s) { | |
207 | __set_bit(s->bit, pl->supported); | |
208 | } else { | |
209 | netdev_warn(pl->netdev, "fixed link %s duplex %dMbps not recognised\n", | |
210 | pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", | |
211 | pl->link_config.speed); | |
212 | } | |
213 | ||
214 | linkmode_and(pl->link_config.advertising, pl->link_config.advertising, | |
215 | pl->supported); | |
216 | ||
217 | pl->link_config.link = 1; | |
218 | pl->link_config.an_complete = 1; | |
219 | ||
220 | return 0; | |
221 | } | |
222 | ||
223 | static int phylink_parse_mode(struct phylink *pl, struct device_node *np) | |
224 | { | |
225 | struct device_node *dn; | |
226 | const char *managed; | |
227 | ||
228 | dn = of_get_child_by_name(np, "fixed-link"); | |
229 | if (dn || of_find_property(np, "fixed-link", NULL)) | |
230 | pl->link_an_mode = MLO_AN_FIXED; | |
231 | of_node_put(dn); | |
232 | ||
233 | if (of_property_read_string(np, "managed", &managed) == 0 && | |
234 | strcmp(managed, "in-band-status") == 0) { | |
235 | if (pl->link_an_mode == MLO_AN_FIXED) { | |
236 | netdev_err(pl->netdev, | |
237 | "can't use both fixed-link and in-band-status\n"); | |
238 | return -EINVAL; | |
239 | } | |
240 | ||
241 | linkmode_zero(pl->supported); | |
242 | phylink_set(pl->supported, MII); | |
243 | phylink_set(pl->supported, Autoneg); | |
244 | phylink_set(pl->supported, Asym_Pause); | |
245 | phylink_set(pl->supported, Pause); | |
246 | pl->link_config.an_enabled = true; | |
247 | ||
248 | switch (pl->link_config.interface) { | |
249 | case PHY_INTERFACE_MODE_SGMII: | |
250 | phylink_set(pl->supported, 10baseT_Half); | |
251 | phylink_set(pl->supported, 10baseT_Full); | |
252 | phylink_set(pl->supported, 100baseT_Half); | |
253 | phylink_set(pl->supported, 100baseT_Full); | |
254 | phylink_set(pl->supported, 1000baseT_Half); | |
255 | phylink_set(pl->supported, 1000baseT_Full); | |
256 | pl->link_an_mode = MLO_AN_SGMII; | |
257 | break; | |
258 | ||
259 | case PHY_INTERFACE_MODE_1000BASEX: | |
260 | phylink_set(pl->supported, 1000baseX_Full); | |
261 | pl->link_an_mode = MLO_AN_8023Z; | |
262 | break; | |
263 | ||
264 | case PHY_INTERFACE_MODE_2500BASEX: | |
265 | phylink_set(pl->supported, 2500baseX_Full); | |
266 | pl->link_an_mode = MLO_AN_8023Z; | |
267 | break; | |
268 | ||
da7c1862 RK |
269 | case PHY_INTERFACE_MODE_10GKR: |
270 | phylink_set(pl->supported, 10baseT_Half); | |
271 | phylink_set(pl->supported, 10baseT_Full); | |
272 | phylink_set(pl->supported, 100baseT_Half); | |
273 | phylink_set(pl->supported, 100baseT_Full); | |
274 | phylink_set(pl->supported, 1000baseT_Half); | |
275 | phylink_set(pl->supported, 1000baseT_Full); | |
276 | phylink_set(pl->supported, 1000baseX_Full); | |
277 | phylink_set(pl->supported, 10000baseKR_Full); | |
278 | phylink_set(pl->supported, 10000baseCR_Full); | |
279 | phylink_set(pl->supported, 10000baseSR_Full); | |
280 | phylink_set(pl->supported, 10000baseLR_Full); | |
281 | phylink_set(pl->supported, 10000baseLRM_Full); | |
282 | phylink_set(pl->supported, 10000baseER_Full); | |
283 | pl->link_an_mode = MLO_AN_SGMII; | |
284 | break; | |
285 | ||
9525ae83 RK |
286 | default: |
287 | netdev_err(pl->netdev, | |
288 | "incorrect link mode %s for in-band status\n", | |
289 | phy_modes(pl->link_config.interface)); | |
290 | return -EINVAL; | |
291 | } | |
292 | ||
293 | linkmode_copy(pl->link_config.advertising, pl->supported); | |
294 | ||
295 | if (phylink_validate(pl, pl->supported, &pl->link_config)) { | |
296 | netdev_err(pl->netdev, | |
297 | "failed to validate link configuration for in-band status\n"); | |
298 | return -EINVAL; | |
299 | } | |
300 | } | |
301 | ||
302 | return 0; | |
303 | } | |
304 | ||
305 | static void phylink_mac_config(struct phylink *pl, | |
306 | const struct phylink_link_state *state) | |
307 | { | |
308 | netdev_dbg(pl->netdev, | |
309 | "%s: mode=%s/%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n", | |
310 | __func__, phylink_an_mode_str(pl->link_an_mode), | |
311 | phy_modes(state->interface), | |
312 | phy_speed_to_str(state->speed), | |
313 | phy_duplex_to_str(state->duplex), | |
314 | __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising, | |
315 | state->pause, state->link, state->an_enabled); | |
316 | ||
317 | pl->ops->mac_config(pl->netdev, pl->link_an_mode, state); | |
318 | } | |
319 | ||
320 | static void phylink_mac_an_restart(struct phylink *pl) | |
321 | { | |
322 | if (pl->link_config.an_enabled && | |
323 | (pl->link_config.interface == PHY_INTERFACE_MODE_1000BASEX || | |
324 | pl->link_config.interface == PHY_INTERFACE_MODE_2500BASEX)) | |
325 | pl->ops->mac_an_restart(pl->netdev); | |
326 | } | |
327 | ||
328 | static int phylink_get_mac_state(struct phylink *pl, struct phylink_link_state *state) | |
329 | { | |
330 | struct net_device *ndev = pl->netdev; | |
331 | ||
332 | linkmode_copy(state->advertising, pl->link_config.advertising); | |
333 | linkmode_zero(state->lp_advertising); | |
334 | state->interface = pl->link_config.interface; | |
335 | state->an_enabled = pl->link_config.an_enabled; | |
336 | state->link = 1; | |
337 | ||
338 | return pl->ops->mac_link_state(ndev, state); | |
339 | } | |
340 | ||
341 | /* The fixed state is... fixed except for the link state, | |
342 | * which may be determined by a GPIO. | |
343 | */ | |
344 | static void phylink_get_fixed_state(struct phylink *pl, struct phylink_link_state *state) | |
345 | { | |
346 | *state = pl->link_config; | |
347 | if (pl->link_gpio) | |
348 | state->link = !!gpiod_get_value(pl->link_gpio); | |
349 | } | |
350 | ||
351 | /* Flow control is resolved according to our and the link partners | |
352 | * advertisments using the following drawn from the 802.3 specs: | |
353 | * Local device Link partner | |
354 | * Pause AsymDir Pause AsymDir Result | |
355 | * 1 X 1 X TX+RX | |
356 | * 0 1 1 1 RX | |
357 | * 1 1 0 1 TX | |
358 | */ | |
359 | static void phylink_resolve_flow(struct phylink *pl, | |
516b29ed | 360 | struct phylink_link_state *state) |
9525ae83 RK |
361 | { |
362 | int new_pause = 0; | |
363 | ||
364 | if (pl->link_config.pause & MLO_PAUSE_AN) { | |
365 | int pause = 0; | |
366 | ||
367 | if (phylink_test(pl->link_config.advertising, Pause)) | |
368 | pause |= MLO_PAUSE_SYM; | |
369 | if (phylink_test(pl->link_config.advertising, Asym_Pause)) | |
370 | pause |= MLO_PAUSE_ASYM; | |
371 | ||
372 | pause &= state->pause; | |
373 | ||
374 | if (pause & MLO_PAUSE_SYM) | |
375 | new_pause = MLO_PAUSE_TX | MLO_PAUSE_RX; | |
376 | else if (pause & MLO_PAUSE_ASYM) | |
377 | new_pause = state->pause & MLO_PAUSE_SYM ? | |
378 | MLO_PAUSE_RX : MLO_PAUSE_TX; | |
379 | } else { | |
380 | new_pause = pl->link_config.pause & MLO_PAUSE_TXRX_MASK; | |
381 | } | |
382 | ||
383 | state->pause &= ~MLO_PAUSE_TXRX_MASK; | |
384 | state->pause |= new_pause; | |
385 | } | |
386 | ||
387 | static const char *phylink_pause_to_str(int pause) | |
388 | { | |
389 | switch (pause & MLO_PAUSE_TXRX_MASK) { | |
390 | case MLO_PAUSE_TX | MLO_PAUSE_RX: | |
391 | return "rx/tx"; | |
392 | case MLO_PAUSE_TX: | |
393 | return "tx"; | |
394 | case MLO_PAUSE_RX: | |
395 | return "rx"; | |
396 | default: | |
397 | return "off"; | |
398 | } | |
399 | } | |
400 | ||
401 | static void phylink_resolve(struct work_struct *w) | |
402 | { | |
403 | struct phylink *pl = container_of(w, struct phylink, resolve); | |
404 | struct phylink_link_state link_state; | |
405 | struct net_device *ndev = pl->netdev; | |
406 | ||
407 | mutex_lock(&pl->state_mutex); | |
408 | if (pl->phylink_disable_state) { | |
409 | pl->mac_link_dropped = false; | |
410 | link_state.link = false; | |
411 | } else if (pl->mac_link_dropped) { | |
412 | link_state.link = false; | |
413 | } else { | |
414 | switch (pl->link_an_mode) { | |
415 | case MLO_AN_PHY: | |
416 | link_state = pl->phy_state; | |
417 | phylink_resolve_flow(pl, &link_state); | |
418 | phylink_mac_config(pl, &link_state); | |
419 | break; | |
420 | ||
421 | case MLO_AN_FIXED: | |
422 | phylink_get_fixed_state(pl, &link_state); | |
423 | phylink_mac_config(pl, &link_state); | |
424 | break; | |
425 | ||
426 | case MLO_AN_SGMII: | |
427 | phylink_get_mac_state(pl, &link_state); | |
428 | if (pl->phydev) { | |
429 | bool changed = false; | |
430 | ||
431 | link_state.link = link_state.link && | |
432 | pl->phy_state.link; | |
433 | ||
434 | if (pl->phy_state.interface != | |
435 | link_state.interface) { | |
436 | link_state.interface = pl->phy_state.interface; | |
437 | changed = true; | |
438 | } | |
439 | ||
440 | /* Propagate the flow control from the PHY | |
441 | * to the MAC. Also propagate the interface | |
442 | * if changed. | |
443 | */ | |
444 | if (pl->phy_state.link || changed) { | |
445 | link_state.pause |= pl->phy_state.pause; | |
446 | phylink_resolve_flow(pl, &link_state); | |
447 | ||
448 | phylink_mac_config(pl, &link_state); | |
449 | } | |
450 | } | |
451 | break; | |
452 | ||
453 | case MLO_AN_8023Z: | |
454 | phylink_get_mac_state(pl, &link_state); | |
455 | break; | |
456 | } | |
457 | } | |
458 | ||
459 | if (link_state.link != netif_carrier_ok(ndev)) { | |
460 | if (!link_state.link) { | |
461 | netif_carrier_off(ndev); | |
462 | pl->ops->mac_link_down(ndev, pl->link_an_mode); | |
463 | netdev_info(ndev, "Link is Down\n"); | |
464 | } else { | |
465 | pl->ops->mac_link_up(ndev, pl->link_an_mode, | |
466 | pl->phydev); | |
467 | ||
468 | netif_carrier_on(ndev); | |
469 | ||
470 | netdev_info(ndev, | |
471 | "Link is Up - %s/%s - flow control %s\n", | |
472 | phy_speed_to_str(link_state.speed), | |
473 | phy_duplex_to_str(link_state.duplex), | |
474 | phylink_pause_to_str(link_state.pause)); | |
475 | } | |
476 | } | |
477 | if (!link_state.link && pl->mac_link_dropped) { | |
478 | pl->mac_link_dropped = false; | |
479 | queue_work(system_power_efficient_wq, &pl->resolve); | |
480 | } | |
481 | mutex_unlock(&pl->state_mutex); | |
482 | } | |
483 | ||
484 | static void phylink_run_resolve(struct phylink *pl) | |
485 | { | |
486 | if (!pl->phylink_disable_state) | |
487 | queue_work(system_power_efficient_wq, &pl->resolve); | |
488 | } | |
489 | ||
ce0aa27f RK |
490 | static const struct sfp_upstream_ops sfp_phylink_ops; |
491 | ||
492 | static int phylink_register_sfp(struct phylink *pl, struct device_node *np) | |
493 | { | |
494 | struct device_node *sfp_np; | |
495 | ||
496 | sfp_np = of_parse_phandle(np, "sfp", 0); | |
497 | if (!sfp_np) | |
498 | return 0; | |
499 | ||
500 | pl->sfp_bus = sfp_register_upstream(sfp_np, pl->netdev, pl, | |
501 | &sfp_phylink_ops); | |
502 | if (!pl->sfp_bus) | |
503 | return -ENOMEM; | |
504 | ||
505 | return 0; | |
506 | } | |
507 | ||
9525ae83 | 508 | struct phylink *phylink_create(struct net_device *ndev, struct device_node *np, |
516b29ed FF |
509 | phy_interface_t iface, |
510 | const struct phylink_mac_ops *ops) | |
9525ae83 RK |
511 | { |
512 | struct phylink *pl; | |
513 | int ret; | |
514 | ||
515 | pl = kzalloc(sizeof(*pl), GFP_KERNEL); | |
516 | if (!pl) | |
517 | return ERR_PTR(-ENOMEM); | |
518 | ||
519 | mutex_init(&pl->state_mutex); | |
520 | INIT_WORK(&pl->resolve, phylink_resolve); | |
521 | pl->netdev = ndev; | |
522 | pl->phy_state.interface = iface; | |
523 | pl->link_interface = iface; | |
524 | pl->link_port = PORT_MII; | |
525 | pl->link_config.interface = iface; | |
526 | pl->link_config.pause = MLO_PAUSE_AN; | |
527 | pl->link_config.speed = SPEED_UNKNOWN; | |
528 | pl->link_config.duplex = DUPLEX_UNKNOWN; | |
74ee0e8c | 529 | pl->link_config.an_enabled = true; |
9525ae83 RK |
530 | pl->ops = ops; |
531 | __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); | |
532 | ||
533 | bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); | |
534 | linkmode_copy(pl->link_config.advertising, pl->supported); | |
535 | phylink_validate(pl, pl->supported, &pl->link_config); | |
536 | ||
537 | ret = phylink_parse_mode(pl, np); | |
538 | if (ret < 0) { | |
539 | kfree(pl); | |
540 | return ERR_PTR(ret); | |
541 | } | |
542 | ||
543 | if (pl->link_an_mode == MLO_AN_FIXED) { | |
544 | ret = phylink_parse_fixedlink(pl, np); | |
545 | if (ret < 0) { | |
546 | kfree(pl); | |
547 | return ERR_PTR(ret); | |
548 | } | |
549 | } | |
550 | ||
ce0aa27f RK |
551 | ret = phylink_register_sfp(pl, np); |
552 | if (ret < 0) { | |
553 | kfree(pl); | |
554 | return ERR_PTR(ret); | |
555 | } | |
556 | ||
9525ae83 RK |
557 | return pl; |
558 | } | |
559 | EXPORT_SYMBOL_GPL(phylink_create); | |
560 | ||
561 | void phylink_destroy(struct phylink *pl) | |
562 | { | |
ce0aa27f RK |
563 | if (pl->sfp_bus) |
564 | sfp_unregister_upstream(pl->sfp_bus); | |
565 | ||
9525ae83 RK |
566 | cancel_work_sync(&pl->resolve); |
567 | kfree(pl); | |
568 | } | |
569 | EXPORT_SYMBOL_GPL(phylink_destroy); | |
570 | ||
1ec6e530 WY |
571 | static void phylink_phy_change(struct phy_device *phydev, bool up, |
572 | bool do_carrier) | |
9525ae83 RK |
573 | { |
574 | struct phylink *pl = phydev->phylink; | |
575 | ||
576 | mutex_lock(&pl->state_mutex); | |
577 | pl->phy_state.speed = phydev->speed; | |
578 | pl->phy_state.duplex = phydev->duplex; | |
579 | pl->phy_state.pause = MLO_PAUSE_NONE; | |
580 | if (phydev->pause) | |
581 | pl->phy_state.pause |= MLO_PAUSE_SYM; | |
582 | if (phydev->asym_pause) | |
583 | pl->phy_state.pause |= MLO_PAUSE_ASYM; | |
584 | pl->phy_state.interface = phydev->interface; | |
585 | pl->phy_state.link = up; | |
586 | mutex_unlock(&pl->state_mutex); | |
587 | ||
588 | phylink_run_resolve(pl); | |
589 | ||
590 | netdev_dbg(pl->netdev, "phy link %s %s/%s/%s\n", up ? "up" : "down", | |
516b29ed | 591 | phy_modes(phydev->interface), |
9525ae83 RK |
592 | phy_speed_to_str(phydev->speed), |
593 | phy_duplex_to_str(phydev->duplex)); | |
594 | } | |
595 | ||
596 | static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy) | |
597 | { | |
598 | struct phylink_link_state config; | |
599 | __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); | |
600 | u32 advertising; | |
601 | int ret; | |
602 | ||
603 | memset(&config, 0, sizeof(config)); | |
604 | ethtool_convert_legacy_u32_to_link_mode(supported, phy->supported); | |
605 | ethtool_convert_legacy_u32_to_link_mode(config.advertising, | |
606 | phy->advertising); | |
607 | config.interface = pl->link_config.interface; | |
608 | ||
609 | /* | |
610 | * This is the new way of dealing with flow control for PHYs, | |
611 | * as described by Timur Tabi in commit 529ed1275263 ("net: phy: | |
612 | * phy drivers should not set SUPPORTED_[Asym_]Pause") except | |
613 | * using our validate call to the MAC, we rely upon the MAC | |
614 | * clearing the bits from both supported and advertising fields. | |
615 | */ | |
616 | if (phylink_test(supported, Pause)) | |
617 | phylink_set(config.advertising, Pause); | |
618 | if (phylink_test(supported, Asym_Pause)) | |
619 | phylink_set(config.advertising, Asym_Pause); | |
620 | ||
621 | ret = phylink_validate(pl, supported, &config); | |
622 | if (ret) | |
623 | return ret; | |
624 | ||
625 | phy->phylink = pl; | |
626 | phy->phy_link_change = phylink_phy_change; | |
627 | ||
628 | netdev_info(pl->netdev, | |
629 | "PHY [%s] driver [%s]\n", dev_name(&phy->mdio.dev), | |
630 | phy->drv->name); | |
631 | ||
632 | mutex_lock(&phy->lock); | |
633 | mutex_lock(&pl->state_mutex); | |
634 | pl->netdev->phydev = phy; | |
635 | pl->phydev = phy; | |
636 | linkmode_copy(pl->supported, supported); | |
637 | linkmode_copy(pl->link_config.advertising, config.advertising); | |
638 | ||
639 | /* Restrict the phy advertisment according to the MAC support. */ | |
640 | ethtool_convert_link_mode_to_legacy_u32(&advertising, config.advertising); | |
641 | phy->advertising = advertising; | |
642 | mutex_unlock(&pl->state_mutex); | |
643 | mutex_unlock(&phy->lock); | |
644 | ||
645 | netdev_dbg(pl->netdev, | |
646 | "phy: setting supported %*pb advertising 0x%08x\n", | |
647 | __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, | |
648 | phy->advertising); | |
649 | ||
650 | phy_start_machine(phy); | |
651 | if (phy->irq > 0) | |
652 | phy_start_interrupts(phy); | |
653 | ||
654 | return 0; | |
655 | } | |
656 | ||
657 | int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) | |
658 | { | |
659 | int ret; | |
660 | ||
661 | ret = phy_attach_direct(pl->netdev, phy, 0, pl->link_interface); | |
662 | if (ret) | |
663 | return ret; | |
664 | ||
665 | ret = phylink_bringup_phy(pl, phy); | |
666 | if (ret) | |
667 | phy_detach(phy); | |
668 | ||
669 | return ret; | |
670 | } | |
671 | EXPORT_SYMBOL_GPL(phylink_connect_phy); | |
672 | ||
673 | int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn) | |
674 | { | |
675 | struct device_node *phy_node; | |
676 | struct phy_device *phy_dev; | |
677 | int ret; | |
678 | ||
679 | /* Fixed links are handled without needing a PHY */ | |
680 | if (pl->link_an_mode == MLO_AN_FIXED) | |
681 | return 0; | |
682 | ||
683 | phy_node = of_parse_phandle(dn, "phy-handle", 0); | |
684 | if (!phy_node) | |
685 | phy_node = of_parse_phandle(dn, "phy", 0); | |
686 | if (!phy_node) | |
687 | phy_node = of_parse_phandle(dn, "phy-device", 0); | |
688 | ||
689 | if (!phy_node) { | |
690 | if (pl->link_an_mode == MLO_AN_PHY) { | |
691 | netdev_err(pl->netdev, "unable to find PHY node\n"); | |
692 | return -ENODEV; | |
693 | } | |
694 | return 0; | |
695 | } | |
696 | ||
697 | phy_dev = of_phy_attach(pl->netdev, phy_node, 0, pl->link_interface); | |
698 | /* We're done with the phy_node handle */ | |
699 | of_node_put(phy_node); | |
700 | ||
701 | if (!phy_dev) | |
702 | return -ENODEV; | |
703 | ||
704 | ret = phylink_bringup_phy(pl, phy_dev); | |
705 | if (ret) | |
706 | phy_detach(phy_dev); | |
707 | ||
708 | return ret; | |
709 | } | |
710 | EXPORT_SYMBOL_GPL(phylink_of_phy_connect); | |
711 | ||
712 | void phylink_disconnect_phy(struct phylink *pl) | |
713 | { | |
714 | struct phy_device *phy; | |
715 | ||
716 | WARN_ON(!lockdep_rtnl_is_held()); | |
717 | ||
718 | phy = pl->phydev; | |
719 | if (phy) { | |
720 | mutex_lock(&phy->lock); | |
721 | mutex_lock(&pl->state_mutex); | |
722 | pl->netdev->phydev = NULL; | |
723 | pl->phydev = NULL; | |
724 | mutex_unlock(&pl->state_mutex); | |
725 | mutex_unlock(&phy->lock); | |
726 | flush_work(&pl->resolve); | |
727 | ||
728 | phy_disconnect(phy); | |
729 | } | |
730 | } | |
731 | EXPORT_SYMBOL_GPL(phylink_disconnect_phy); | |
732 | ||
733 | void phylink_mac_change(struct phylink *pl, bool up) | |
734 | { | |
735 | if (!up) | |
736 | pl->mac_link_dropped = true; | |
737 | phylink_run_resolve(pl); | |
738 | netdev_dbg(pl->netdev, "mac link %s\n", up ? "up" : "down"); | |
739 | } | |
740 | EXPORT_SYMBOL_GPL(phylink_mac_change); | |
741 | ||
742 | void phylink_start(struct phylink *pl) | |
743 | { | |
744 | WARN_ON(!lockdep_rtnl_is_held()); | |
745 | ||
746 | netdev_info(pl->netdev, "configuring for %s/%s link mode\n", | |
747 | phylink_an_mode_str(pl->link_an_mode), | |
748 | phy_modes(pl->link_config.interface)); | |
749 | ||
750 | /* Apply the link configuration to the MAC when starting. This allows | |
751 | * a fixed-link to start with the correct parameters, and also | |
752 | * ensures that we set the appropriate advertisment for Serdes links. | |
753 | */ | |
754 | phylink_resolve_flow(pl, &pl->link_config); | |
755 | phylink_mac_config(pl, &pl->link_config); | |
756 | ||
757 | clear_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); | |
758 | phylink_run_resolve(pl); | |
759 | ||
ce0aa27f RK |
760 | if (pl->sfp_bus) |
761 | sfp_upstream_start(pl->sfp_bus); | |
9525ae83 RK |
762 | if (pl->phydev) |
763 | phy_start(pl->phydev); | |
764 | } | |
765 | EXPORT_SYMBOL_GPL(phylink_start); | |
766 | ||
767 | void phylink_stop(struct phylink *pl) | |
768 | { | |
769 | WARN_ON(!lockdep_rtnl_is_held()); | |
770 | ||
771 | if (pl->phydev) | |
772 | phy_stop(pl->phydev); | |
ce0aa27f RK |
773 | if (pl->sfp_bus) |
774 | sfp_upstream_stop(pl->sfp_bus); | |
9525ae83 RK |
775 | |
776 | set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); | |
2012b7d6 | 777 | queue_work(system_power_efficient_wq, &pl->resolve); |
9525ae83 RK |
778 | flush_work(&pl->resolve); |
779 | } | |
780 | EXPORT_SYMBOL_GPL(phylink_stop); | |
781 | ||
782 | void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) | |
783 | { | |
784 | WARN_ON(!lockdep_rtnl_is_held()); | |
785 | ||
786 | wol->supported = 0; | |
787 | wol->wolopts = 0; | |
788 | ||
789 | if (pl->phydev) | |
790 | phy_ethtool_get_wol(pl->phydev, wol); | |
791 | } | |
792 | EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); | |
793 | ||
794 | int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) | |
795 | { | |
796 | int ret = -EOPNOTSUPP; | |
797 | ||
798 | WARN_ON(!lockdep_rtnl_is_held()); | |
799 | ||
800 | if (pl->phydev) | |
801 | ret = phy_ethtool_set_wol(pl->phydev, wol); | |
802 | ||
803 | return ret; | |
804 | } | |
805 | EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); | |
806 | ||
807 | static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) | |
808 | { | |
809 | __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); | |
810 | ||
811 | linkmode_zero(mask); | |
812 | phylink_set_port_modes(mask); | |
813 | ||
814 | linkmode_and(dst, dst, mask); | |
815 | linkmode_or(dst, dst, b); | |
816 | } | |
817 | ||
818 | static void phylink_get_ksettings(const struct phylink_link_state *state, | |
819 | struct ethtool_link_ksettings *kset) | |
820 | { | |
821 | phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); | |
822 | linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); | |
823 | kset->base.speed = state->speed; | |
824 | kset->base.duplex = state->duplex; | |
825 | kset->base.autoneg = state->an_enabled ? AUTONEG_ENABLE : | |
826 | AUTONEG_DISABLE; | |
827 | } | |
828 | ||
829 | int phylink_ethtool_ksettings_get(struct phylink *pl, | |
516b29ed | 830 | struct ethtool_link_ksettings *kset) |
9525ae83 RK |
831 | { |
832 | struct phylink_link_state link_state; | |
833 | ||
834 | WARN_ON(!lockdep_rtnl_is_held()); | |
835 | ||
836 | if (pl->phydev) { | |
837 | phy_ethtool_ksettings_get(pl->phydev, kset); | |
838 | } else { | |
839 | kset->base.port = pl->link_port; | |
840 | } | |
841 | ||
842 | linkmode_copy(kset->link_modes.supported, pl->supported); | |
843 | ||
844 | switch (pl->link_an_mode) { | |
845 | case MLO_AN_FIXED: | |
846 | /* We are using fixed settings. Report these as the | |
847 | * current link settings - and note that these also | |
848 | * represent the supported speeds/duplex/pause modes. | |
849 | */ | |
850 | phylink_get_fixed_state(pl, &link_state); | |
851 | phylink_get_ksettings(&link_state, kset); | |
852 | break; | |
853 | ||
854 | case MLO_AN_SGMII: | |
855 | /* If there is a phy attached, then use the reported | |
856 | * settings from the phy with no modification. | |
857 | */ | |
858 | if (pl->phydev) | |
859 | break; | |
860 | ||
861 | case MLO_AN_8023Z: | |
862 | phylink_get_mac_state(pl, &link_state); | |
863 | ||
864 | /* The MAC is reporting the link results from its own PCS | |
865 | * layer via in-band status. Report these as the current | |
866 | * link settings. | |
867 | */ | |
868 | phylink_get_ksettings(&link_state, kset); | |
869 | break; | |
870 | } | |
871 | ||
872 | return 0; | |
873 | } | |
874 | EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); | |
875 | ||
876 | int phylink_ethtool_ksettings_set(struct phylink *pl, | |
516b29ed | 877 | const struct ethtool_link_ksettings *kset) |
9525ae83 RK |
878 | { |
879 | struct ethtool_link_ksettings our_kset; | |
880 | struct phylink_link_state config; | |
881 | int ret; | |
882 | ||
883 | WARN_ON(!lockdep_rtnl_is_held()); | |
884 | ||
885 | if (kset->base.autoneg != AUTONEG_DISABLE && | |
886 | kset->base.autoneg != AUTONEG_ENABLE) | |
887 | return -EINVAL; | |
888 | ||
889 | config = pl->link_config; | |
890 | ||
891 | /* Mask out unsupported advertisments */ | |
892 | linkmode_and(config.advertising, kset->link_modes.advertising, | |
893 | pl->supported); | |
894 | ||
895 | /* FIXME: should we reject autoneg if phy/mac does not support it? */ | |
896 | if (kset->base.autoneg == AUTONEG_DISABLE) { | |
897 | const struct phy_setting *s; | |
898 | ||
899 | /* Autonegotiation disabled, select a suitable speed and | |
900 | * duplex. | |
901 | */ | |
902 | s = phy_lookup_setting(kset->base.speed, kset->base.duplex, | |
903 | pl->supported, | |
904 | __ETHTOOL_LINK_MODE_MASK_NBITS, false); | |
905 | if (!s) | |
906 | return -EINVAL; | |
907 | ||
908 | /* If we have a fixed link (as specified by firmware), refuse | |
909 | * to change link parameters. | |
910 | */ | |
911 | if (pl->link_an_mode == MLO_AN_FIXED && | |
912 | (s->speed != pl->link_config.speed || | |
913 | s->duplex != pl->link_config.duplex)) | |
914 | return -EINVAL; | |
915 | ||
916 | config.speed = s->speed; | |
917 | config.duplex = s->duplex; | |
918 | config.an_enabled = false; | |
919 | ||
920 | __clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising); | |
921 | } else { | |
922 | /* If we have a fixed link, refuse to enable autonegotiation */ | |
923 | if (pl->link_an_mode == MLO_AN_FIXED) | |
924 | return -EINVAL; | |
925 | ||
926 | config.speed = SPEED_UNKNOWN; | |
927 | config.duplex = DUPLEX_UNKNOWN; | |
928 | config.an_enabled = true; | |
929 | ||
930 | __set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising); | |
931 | } | |
932 | ||
933 | if (phylink_validate(pl, pl->supported, &config)) | |
934 | return -EINVAL; | |
935 | ||
936 | /* If autonegotiation is enabled, we must have an advertisment */ | |
937 | if (config.an_enabled && phylink_is_empty_linkmode(config.advertising)) | |
938 | return -EINVAL; | |
939 | ||
940 | our_kset = *kset; | |
941 | linkmode_copy(our_kset.link_modes.advertising, config.advertising); | |
942 | our_kset.base.speed = config.speed; | |
943 | our_kset.base.duplex = config.duplex; | |
944 | ||
945 | /* If we have a PHY, configure the phy */ | |
946 | if (pl->phydev) { | |
947 | ret = phy_ethtool_ksettings_set(pl->phydev, &our_kset); | |
948 | if (ret) | |
949 | return ret; | |
950 | } | |
951 | ||
952 | mutex_lock(&pl->state_mutex); | |
953 | /* Configure the MAC to match the new settings */ | |
954 | linkmode_copy(pl->link_config.advertising, our_kset.link_modes.advertising); | |
182088aa | 955 | pl->link_config.interface = config.interface; |
9525ae83 RK |
956 | pl->link_config.speed = our_kset.base.speed; |
957 | pl->link_config.duplex = our_kset.base.duplex; | |
958 | pl->link_config.an_enabled = our_kset.base.autoneg != AUTONEG_DISABLE; | |
959 | ||
960 | if (!test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) { | |
961 | phylink_mac_config(pl, &pl->link_config); | |
962 | phylink_mac_an_restart(pl); | |
963 | } | |
964 | mutex_unlock(&pl->state_mutex); | |
965 | ||
d18c2a1b | 966 | return 0; |
9525ae83 RK |
967 | } |
968 | EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); | |
969 | ||
970 | int phylink_ethtool_nway_reset(struct phylink *pl) | |
971 | { | |
972 | int ret = 0; | |
973 | ||
974 | WARN_ON(!lockdep_rtnl_is_held()); | |
975 | ||
976 | if (pl->phydev) | |
977 | ret = phy_restart_aneg(pl->phydev); | |
978 | phylink_mac_an_restart(pl); | |
979 | ||
980 | return ret; | |
981 | } | |
982 | EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); | |
983 | ||
984 | void phylink_ethtool_get_pauseparam(struct phylink *pl, | |
985 | struct ethtool_pauseparam *pause) | |
986 | { | |
987 | WARN_ON(!lockdep_rtnl_is_held()); | |
988 | ||
989 | pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); | |
990 | pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); | |
991 | pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); | |
992 | } | |
993 | EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); | |
994 | ||
995 | int phylink_ethtool_set_pauseparam(struct phylink *pl, | |
996 | struct ethtool_pauseparam *pause) | |
997 | { | |
998 | struct phylink_link_state *config = &pl->link_config; | |
999 | ||
1000 | WARN_ON(!lockdep_rtnl_is_held()); | |
1001 | ||
1002 | if (!phylink_test(pl->supported, Pause) && | |
1003 | !phylink_test(pl->supported, Asym_Pause)) | |
1004 | return -EOPNOTSUPP; | |
1005 | ||
1006 | if (!phylink_test(pl->supported, Asym_Pause) && | |
1007 | !pause->autoneg && pause->rx_pause != pause->tx_pause) | |
1008 | return -EINVAL; | |
1009 | ||
1010 | config->pause &= ~(MLO_PAUSE_AN | MLO_PAUSE_TXRX_MASK); | |
1011 | ||
1012 | if (pause->autoneg) | |
1013 | config->pause |= MLO_PAUSE_AN; | |
1014 | if (pause->rx_pause) | |
1015 | config->pause |= MLO_PAUSE_RX; | |
1016 | if (pause->tx_pause) | |
1017 | config->pause |= MLO_PAUSE_TX; | |
1018 | ||
1019 | if (!test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) { | |
1020 | switch (pl->link_an_mode) { | |
1021 | case MLO_AN_PHY: | |
1022 | /* Silently mark the carrier down, and then trigger a resolve */ | |
1023 | netif_carrier_off(pl->netdev); | |
1024 | phylink_run_resolve(pl); | |
1025 | break; | |
1026 | ||
1027 | case MLO_AN_FIXED: | |
1028 | /* Should we allow fixed links to change against the config? */ | |
1029 | phylink_resolve_flow(pl, config); | |
1030 | phylink_mac_config(pl, config); | |
1031 | break; | |
1032 | ||
1033 | case MLO_AN_SGMII: | |
1034 | case MLO_AN_8023Z: | |
1035 | phylink_mac_config(pl, config); | |
1036 | phylink_mac_an_restart(pl); | |
1037 | break; | |
1038 | } | |
1039 | } | |
1040 | ||
1041 | return 0; | |
1042 | } | |
1043 | EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); | |
1044 | ||
770a1ad5 RK |
1045 | int phylink_ethtool_get_module_info(struct phylink *pl, |
1046 | struct ethtool_modinfo *modinfo) | |
1047 | { | |
1048 | int ret = -EOPNOTSUPP; | |
1049 | ||
1050 | WARN_ON(!lockdep_rtnl_is_held()); | |
1051 | ||
1052 | if (pl->sfp_bus) | |
1053 | ret = sfp_get_module_info(pl->sfp_bus, modinfo); | |
1054 | ||
1055 | return ret; | |
1056 | } | |
1057 | EXPORT_SYMBOL_GPL(phylink_ethtool_get_module_info); | |
1058 | ||
1059 | int phylink_ethtool_get_module_eeprom(struct phylink *pl, | |
1060 | struct ethtool_eeprom *ee, u8 *buf) | |
1061 | { | |
1062 | int ret = -EOPNOTSUPP; | |
1063 | ||
1064 | WARN_ON(!lockdep_rtnl_is_held()); | |
1065 | ||
1066 | if (pl->sfp_bus) | |
1067 | ret = sfp_get_module_eeprom(pl->sfp_bus, ee, buf); | |
1068 | ||
1069 | return ret; | |
1070 | } | |
1071 | EXPORT_SYMBOL_GPL(phylink_ethtool_get_module_eeprom); | |
1072 | ||
9525ae83 RK |
1073 | int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) |
1074 | { | |
1075 | int ret = -EPROTONOSUPPORT; | |
1076 | ||
1077 | WARN_ON(!lockdep_rtnl_is_held()); | |
1078 | ||
1079 | if (pl->phydev) | |
1080 | ret = phy_init_eee(pl->phydev, clk_stop_enable); | |
1081 | ||
1082 | return ret; | |
1083 | } | |
1084 | EXPORT_SYMBOL_GPL(phylink_init_eee); | |
1085 | ||
1086 | int phylink_get_eee_err(struct phylink *pl) | |
1087 | { | |
1088 | int ret = 0; | |
1089 | ||
1090 | WARN_ON(!lockdep_rtnl_is_held()); | |
1091 | ||
1092 | if (pl->phydev) | |
1093 | ret = phy_get_eee_err(pl->phydev); | |
1094 | ||
1095 | return ret; | |
1096 | } | |
1097 | EXPORT_SYMBOL_GPL(phylink_get_eee_err); | |
1098 | ||
1099 | int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee) | |
1100 | { | |
1101 | int ret = -EOPNOTSUPP; | |
1102 | ||
1103 | WARN_ON(!lockdep_rtnl_is_held()); | |
1104 | ||
1105 | if (pl->phydev) | |
1106 | ret = phy_ethtool_get_eee(pl->phydev, eee); | |
1107 | ||
1108 | return ret; | |
1109 | } | |
1110 | EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); | |
1111 | ||
1112 | int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee) | |
1113 | { | |
1114 | int ret = -EOPNOTSUPP; | |
1115 | ||
1116 | WARN_ON(!lockdep_rtnl_is_held()); | |
1117 | ||
1118 | if (pl->phydev) | |
1119 | ret = phy_ethtool_set_eee(pl->phydev, eee); | |
1120 | ||
1121 | return ret; | |
1122 | } | |
1123 | EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); | |
1124 | ||
1125 | /* This emulates MII registers for a fixed-mode phy operating as per the | |
1126 | * passed in state. "aneg" defines if we report negotiation is possible. | |
1127 | * | |
1128 | * FIXME: should deal with negotiation state too. | |
1129 | */ | |
1130 | static int phylink_mii_emul_read(struct net_device *ndev, unsigned int reg, | |
1131 | struct phylink_link_state *state, bool aneg) | |
1132 | { | |
1133 | struct fixed_phy_status fs; | |
1134 | int val; | |
1135 | ||
1136 | fs.link = state->link; | |
1137 | fs.speed = state->speed; | |
1138 | fs.duplex = state->duplex; | |
1139 | fs.pause = state->pause & MLO_PAUSE_SYM; | |
1140 | fs.asym_pause = state->pause & MLO_PAUSE_ASYM; | |
1141 | ||
1142 | val = swphy_read_reg(reg, &fs); | |
1143 | if (reg == MII_BMSR) { | |
1144 | if (!state->an_complete) | |
1145 | val &= ~BMSR_ANEGCOMPLETE; | |
1146 | if (!aneg) | |
1147 | val &= ~BMSR_ANEGCAPABLE; | |
1148 | } | |
1149 | return val; | |
1150 | } | |
1151 | ||
ecbd87b8 RK |
1152 | static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, |
1153 | unsigned int reg) | |
1154 | { | |
1155 | struct phy_device *phydev = pl->phydev; | |
1156 | int prtad, devad; | |
1157 | ||
1158 | if (mdio_phy_id_is_c45(phy_id)) { | |
1159 | prtad = mdio_phy_id_prtad(phy_id); | |
1160 | devad = mdio_phy_id_devad(phy_id); | |
1161 | devad = MII_ADDR_C45 | devad << 16 | reg; | |
1162 | } else if (phydev->is_c45) { | |
1163 | switch (reg) { | |
1164 | case MII_BMCR: | |
1165 | case MII_BMSR: | |
1166 | case MII_PHYSID1: | |
1167 | case MII_PHYSID2: | |
1168 | devad = __ffs(phydev->c45_ids.devices_in_package); | |
1169 | break; | |
1170 | case MII_ADVERTISE: | |
1171 | case MII_LPA: | |
1172 | if (!(phydev->c45_ids.devices_in_package & MDIO_DEVS_AN)) | |
1173 | return -EINVAL; | |
1174 | devad = MDIO_MMD_AN; | |
1175 | if (reg == MII_ADVERTISE) | |
1176 | reg = MDIO_AN_ADVERTISE; | |
1177 | else | |
1178 | reg = MDIO_AN_LPA; | |
1179 | break; | |
1180 | default: | |
1181 | return -EINVAL; | |
1182 | } | |
1183 | prtad = phy_id; | |
1184 | devad = MII_ADDR_C45 | devad << 16 | reg; | |
1185 | } else { | |
1186 | prtad = phy_id; | |
1187 | devad = reg; | |
1188 | } | |
1189 | return mdiobus_read(pl->phydev->mdio.bus, prtad, devad); | |
1190 | } | |
1191 | ||
1192 | static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, | |
1193 | unsigned int reg, unsigned int val) | |
1194 | { | |
1195 | struct phy_device *phydev = pl->phydev; | |
1196 | int prtad, devad; | |
1197 | ||
1198 | if (mdio_phy_id_is_c45(phy_id)) { | |
1199 | prtad = mdio_phy_id_prtad(phy_id); | |
1200 | devad = mdio_phy_id_devad(phy_id); | |
1201 | devad = MII_ADDR_C45 | devad << 16 | reg; | |
1202 | } else if (phydev->is_c45) { | |
1203 | switch (reg) { | |
1204 | case MII_BMCR: | |
1205 | case MII_BMSR: | |
1206 | case MII_PHYSID1: | |
1207 | case MII_PHYSID2: | |
1208 | devad = __ffs(phydev->c45_ids.devices_in_package); | |
1209 | break; | |
1210 | case MII_ADVERTISE: | |
1211 | case MII_LPA: | |
1212 | if (!(phydev->c45_ids.devices_in_package & MDIO_DEVS_AN)) | |
1213 | return -EINVAL; | |
1214 | devad = MDIO_MMD_AN; | |
1215 | if (reg == MII_ADVERTISE) | |
1216 | reg = MDIO_AN_ADVERTISE; | |
1217 | else | |
1218 | reg = MDIO_AN_LPA; | |
1219 | break; | |
1220 | default: | |
1221 | return -EINVAL; | |
1222 | } | |
1223 | prtad = phy_id; | |
1224 | devad = MII_ADDR_C45 | devad << 16 | reg; | |
1225 | } else { | |
1226 | prtad = phy_id; | |
1227 | devad = reg; | |
1228 | } | |
1229 | ||
1230 | return mdiobus_write(phydev->mdio.bus, prtad, devad, val); | |
1231 | } | |
1232 | ||
9525ae83 RK |
1233 | static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, |
1234 | unsigned int reg) | |
1235 | { | |
1236 | struct phylink_link_state state; | |
1237 | int val = 0xffff; | |
1238 | ||
9525ae83 RK |
1239 | switch (pl->link_an_mode) { |
1240 | case MLO_AN_FIXED: | |
1241 | if (phy_id == 0) { | |
1242 | phylink_get_fixed_state(pl, &state); | |
1243 | val = phylink_mii_emul_read(pl->netdev, reg, &state, | |
1244 | true); | |
1245 | } | |
1246 | break; | |
1247 | ||
1248 | case MLO_AN_PHY: | |
1249 | return -EOPNOTSUPP; | |
1250 | ||
1251 | case MLO_AN_SGMII: | |
1252 | /* No phy, fall through to 8023z method */ | |
1253 | case MLO_AN_8023Z: | |
1254 | if (phy_id == 0) { | |
1255 | val = phylink_get_mac_state(pl, &state); | |
1256 | if (val < 0) | |
1257 | return val; | |
1258 | ||
1259 | val = phylink_mii_emul_read(pl->netdev, reg, &state, | |
1260 | true); | |
1261 | } | |
1262 | break; | |
1263 | } | |
1264 | ||
1265 | return val & 0xffff; | |
1266 | } | |
1267 | ||
1268 | static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, | |
1269 | unsigned int reg, unsigned int val) | |
1270 | { | |
9525ae83 RK |
1271 | switch (pl->link_an_mode) { |
1272 | case MLO_AN_FIXED: | |
1273 | break; | |
1274 | ||
1275 | case MLO_AN_PHY: | |
1276 | return -EOPNOTSUPP; | |
1277 | ||
1278 | case MLO_AN_SGMII: | |
1279 | /* No phy, fall through to 8023z method */ | |
1280 | case MLO_AN_8023Z: | |
1281 | break; | |
1282 | } | |
1283 | ||
1284 | return 0; | |
1285 | } | |
1286 | ||
1287 | int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) | |
1288 | { | |
ecbd87b8 RK |
1289 | struct mii_ioctl_data *mii = if_mii(ifr); |
1290 | int ret; | |
9525ae83 RK |
1291 | |
1292 | WARN_ON(!lockdep_rtnl_is_held()); | |
1293 | ||
ecbd87b8 RK |
1294 | if (pl->phydev) { |
1295 | /* PHYs only exist for MLO_AN_PHY and MLO_AN_SGMII */ | |
1296 | switch (cmd) { | |
1297 | case SIOCGMIIPHY: | |
1298 | mii->phy_id = pl->phydev->mdio.addr; | |
1299 | ||
1300 | case SIOCGMIIREG: | |
1301 | ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); | |
1302 | if (ret >= 0) { | |
1303 | mii->val_out = ret; | |
1304 | ret = 0; | |
1305 | } | |
1306 | break; | |
9525ae83 | 1307 | |
ecbd87b8 RK |
1308 | case SIOCSMIIREG: |
1309 | ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, | |
1310 | mii->val_in); | |
1311 | break; | |
1312 | ||
1313 | default: | |
1314 | ret = phy_mii_ioctl(pl->phydev, ifr, cmd); | |
1315 | break; | |
9525ae83 | 1316 | } |
ecbd87b8 RK |
1317 | } else { |
1318 | switch (cmd) { | |
1319 | case SIOCGMIIPHY: | |
1320 | mii->phy_id = 0; | |
1321 | ||
1322 | case SIOCGMIIREG: | |
1323 | ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); | |
1324 | if (ret >= 0) { | |
1325 | mii->val_out = ret; | |
1326 | ret = 0; | |
1327 | } | |
1328 | break; | |
9525ae83 | 1329 | |
ecbd87b8 RK |
1330 | case SIOCSMIIREG: |
1331 | ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, | |
1332 | mii->val_in); | |
1333 | break; | |
9525ae83 | 1334 | |
ecbd87b8 RK |
1335 | default: |
1336 | ret = -EOPNOTSUPP; | |
1337 | break; | |
1338 | } | |
9525ae83 RK |
1339 | } |
1340 | ||
1341 | return ret; | |
1342 | } | |
1343 | EXPORT_SYMBOL_GPL(phylink_mii_ioctl); | |
1344 | ||
ce0aa27f RK |
1345 | static int phylink_sfp_module_insert(void *upstream, |
1346 | const struct sfp_eeprom_id *id) | |
1347 | { | |
1348 | struct phylink *pl = upstream; | |
1349 | __ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, }; | |
1350 | struct phylink_link_state config; | |
1351 | phy_interface_t iface; | |
1352 | int mode, ret = 0; | |
1353 | bool changed; | |
1354 | u8 port; | |
1355 | ||
1356 | sfp_parse_support(pl->sfp_bus, id, support); | |
1357 | port = sfp_parse_port(pl->sfp_bus, id, support); | |
1358 | iface = sfp_parse_interface(pl->sfp_bus, id); | |
1359 | ||
1360 | WARN_ON(!lockdep_rtnl_is_held()); | |
1361 | ||
1362 | switch (iface) { | |
1363 | case PHY_INTERFACE_MODE_SGMII: | |
1364 | mode = MLO_AN_SGMII; | |
1365 | break; | |
1366 | case PHY_INTERFACE_MODE_1000BASEX: | |
1367 | mode = MLO_AN_8023Z; | |
1368 | break; | |
1369 | default: | |
1370 | return -EINVAL; | |
1371 | } | |
1372 | ||
1373 | memset(&config, 0, sizeof(config)); | |
1374 | linkmode_copy(config.advertising, support); | |
1375 | config.interface = iface; | |
1376 | config.speed = SPEED_UNKNOWN; | |
1377 | config.duplex = DUPLEX_UNKNOWN; | |
1378 | config.pause = MLO_PAUSE_AN; | |
1379 | config.an_enabled = pl->link_config.an_enabled; | |
1380 | ||
1381 | /* Ignore errors if we're expecting a PHY to attach later */ | |
1382 | ret = phylink_validate(pl, support, &config); | |
1383 | if (ret) { | |
1384 | netdev_err(pl->netdev, "validation of %s/%s with support %*pb failed: %d\n", | |
1385 | phylink_an_mode_str(mode), phy_modes(config.interface), | |
1386 | __ETHTOOL_LINK_MODE_MASK_NBITS, support, ret); | |
1387 | return ret; | |
1388 | } | |
1389 | ||
1390 | netdev_dbg(pl->netdev, "requesting link mode %s/%s with support %*pb\n", | |
1391 | phylink_an_mode_str(mode), phy_modes(config.interface), | |
1392 | __ETHTOOL_LINK_MODE_MASK_NBITS, support); | |
1393 | ||
1394 | if (mode == MLO_AN_8023Z && pl->phydev) | |
1395 | return -EINVAL; | |
1396 | ||
1397 | changed = !bitmap_equal(pl->supported, support, | |
1398 | __ETHTOOL_LINK_MODE_MASK_NBITS); | |
1399 | if (changed) { | |
1400 | linkmode_copy(pl->supported, support); | |
1401 | linkmode_copy(pl->link_config.advertising, config.advertising); | |
1402 | } | |
1403 | ||
1404 | if (pl->link_an_mode != mode || | |
1405 | pl->link_config.interface != config.interface) { | |
1406 | pl->link_config.interface = config.interface; | |
1407 | pl->link_an_mode = mode; | |
1408 | ||
1409 | changed = true; | |
1410 | ||
1411 | netdev_info(pl->netdev, "switched to %s/%s link mode\n", | |
1412 | phylink_an_mode_str(mode), | |
1413 | phy_modes(config.interface)); | |
1414 | } | |
1415 | ||
1416 | pl->link_port = port; | |
1417 | ||
1418 | if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, | |
1419 | &pl->phylink_disable_state)) | |
1420 | phylink_mac_config(pl, &pl->link_config); | |
1421 | ||
1422 | return ret; | |
1423 | } | |
1424 | ||
1425 | static void phylink_sfp_link_down(void *upstream) | |
1426 | { | |
1427 | struct phylink *pl = upstream; | |
1428 | ||
1429 | WARN_ON(!lockdep_rtnl_is_held()); | |
1430 | ||
1431 | set_bit(PHYLINK_DISABLE_LINK, &pl->phylink_disable_state); | |
ac817f5a | 1432 | queue_work(system_power_efficient_wq, &pl->resolve); |
ce0aa27f | 1433 | flush_work(&pl->resolve); |
ce0aa27f RK |
1434 | } |
1435 | ||
1436 | static void phylink_sfp_link_up(void *upstream) | |
1437 | { | |
1438 | struct phylink *pl = upstream; | |
1439 | ||
1440 | WARN_ON(!lockdep_rtnl_is_held()); | |
1441 | ||
1442 | clear_bit(PHYLINK_DISABLE_LINK, &pl->phylink_disable_state); | |
1443 | phylink_run_resolve(pl); | |
1444 | } | |
1445 | ||
1446 | static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) | |
1447 | { | |
1448 | return phylink_connect_phy(upstream, phy); | |
1449 | } | |
1450 | ||
1451 | static void phylink_sfp_disconnect_phy(void *upstream) | |
1452 | { | |
1453 | phylink_disconnect_phy(upstream); | |
1454 | } | |
1455 | ||
1456 | static const struct sfp_upstream_ops sfp_phylink_ops = { | |
1457 | .module_insert = phylink_sfp_module_insert, | |
1458 | .link_up = phylink_sfp_link_up, | |
1459 | .link_down = phylink_sfp_link_down, | |
1460 | .connect_phy = phylink_sfp_connect_phy, | |
1461 | .disconnect_phy = phylink_sfp_disconnect_phy, | |
1462 | }; | |
1463 | ||
9525ae83 | 1464 | MODULE_LICENSE("GPL"); |