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a8e510f6 1/*
240a12d5 2 * SPI driver for Micrel/Kendin KS8995M and KSZ8864RMN ethernet switches
a8e510f6
FL
3 *
4 * Copyright (C) 2008 Gabor Juhos <juhosg at openwrt.org>
5 *
6 * This file was based on: drivers/spi/at25.c
7 * Copyright (C) 2006 David Brownell
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
12 */
13
8d242488
JP
14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
a8e510f6
FL
16#include <linux/types.h>
17#include <linux/kernel.h>
a8e510f6
FL
18#include <linux/module.h>
19#include <linux/delay.h>
20#include <linux/device.h>
27090cbd 21#include <linux/gpio/consumer.h>
cd6f288c 22#include <linux/of.h>
cd6f288c 23#include <linux/of_gpio.h>
a8e510f6
FL
24
25#include <linux/spi/spi.h>
26
27#define DRV_VERSION "0.1.1"
28#define DRV_DESC "Micrel KS8995 Ethernet switch SPI driver"
29
30/* ------------------------------------------------------------------------ */
31
32#define KS8995_REG_ID0 0x00 /* Chip ID0 */
33#define KS8995_REG_ID1 0x01 /* Chip ID1 */
34
35#define KS8995_REG_GC0 0x02 /* Global Control 0 */
36#define KS8995_REG_GC1 0x03 /* Global Control 1 */
37#define KS8995_REG_GC2 0x04 /* Global Control 2 */
38#define KS8995_REG_GC3 0x05 /* Global Control 3 */
39#define KS8995_REG_GC4 0x06 /* Global Control 4 */
40#define KS8995_REG_GC5 0x07 /* Global Control 5 */
41#define KS8995_REG_GC6 0x08 /* Global Control 6 */
42#define KS8995_REG_GC7 0x09 /* Global Control 7 */
43#define KS8995_REG_GC8 0x0a /* Global Control 8 */
44#define KS8995_REG_GC9 0x0b /* Global Control 9 */
45
46#define KS8995_REG_PC(p, r) ((0x10 * p) + r) /* Port Control */
47#define KS8995_REG_PS(p, r) ((0x10 * p) + r + 0xe) /* Port Status */
48
49#define KS8995_REG_TPC0 0x60 /* TOS Priority Control 0 */
50#define KS8995_REG_TPC1 0x61 /* TOS Priority Control 1 */
51#define KS8995_REG_TPC2 0x62 /* TOS Priority Control 2 */
52#define KS8995_REG_TPC3 0x63 /* TOS Priority Control 3 */
53#define KS8995_REG_TPC4 0x64 /* TOS Priority Control 4 */
54#define KS8995_REG_TPC5 0x65 /* TOS Priority Control 5 */
55#define KS8995_REG_TPC6 0x66 /* TOS Priority Control 6 */
56#define KS8995_REG_TPC7 0x67 /* TOS Priority Control 7 */
57
58#define KS8995_REG_MAC0 0x68 /* MAC address 0 */
59#define KS8995_REG_MAC1 0x69 /* MAC address 1 */
60#define KS8995_REG_MAC2 0x6a /* MAC address 2 */
61#define KS8995_REG_MAC3 0x6b /* MAC address 3 */
62#define KS8995_REG_MAC4 0x6c /* MAC address 4 */
63#define KS8995_REG_MAC5 0x6d /* MAC address 5 */
64
65#define KS8995_REG_IAC0 0x6e /* Indirect Access Control 0 */
66#define KS8995_REG_IAC1 0x6f /* Indirect Access Control 0 */
67#define KS8995_REG_IAD7 0x70 /* Indirect Access Data 7 */
68#define KS8995_REG_IAD6 0x71 /* Indirect Access Data 6 */
69#define KS8995_REG_IAD5 0x72 /* Indirect Access Data 5 */
70#define KS8995_REG_IAD4 0x73 /* Indirect Access Data 4 */
71#define KS8995_REG_IAD3 0x74 /* Indirect Access Data 3 */
72#define KS8995_REG_IAD2 0x75 /* Indirect Access Data 2 */
73#define KS8995_REG_IAD1 0x76 /* Indirect Access Data 1 */
74#define KS8995_REG_IAD0 0x77 /* Indirect Access Data 0 */
75
240a12d5
PZ
76#define KSZ8864_REG_ID1 0xfe /* Chip ID in bit 7 */
77
a8e510f6 78#define KS8995_REGS_SIZE 0x80
240a12d5 79#define KSZ8864_REGS_SIZE 0x100
c0e6cb1f 80#define KSZ8795_REGS_SIZE 0x100
a8e510f6
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81
82#define ID1_CHIPID_M 0xf
83#define ID1_CHIPID_S 4
84#define ID1_REVISION_M 0x7
85#define ID1_REVISION_S 1
86#define ID1_START_SW 1 /* start the switch */
87
88#define FAMILY_KS8995 0x95
c0e6cb1f 89#define FAMILY_KSZ8795 0x87
a8e510f6 90#define CHIPID_M 0
484e36ff
HB
91#define KS8995_CHIP_ID 0x00
92#define KSZ8864_CHIP_ID 0x01
c0e6cb1f 93#define KSZ8795_CHIP_ID 0x09
a8e510f6
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94
95#define KS8995_CMD_WRITE 0x02U
96#define KS8995_CMD_READ 0x03U
97
98#define KS8995_RESET_DELAY 10 /* usec */
99
aa54c8da
HB
100enum ks8995_chip_variant {
101 ks8995,
102 ksz8864,
c0e6cb1f 103 ksz8795,
aa54c8da
HB
104 max_variant
105};
106
107struct ks8995_chip_params {
108 char *name;
484e36ff
HB
109 int family_id;
110 int chip_id;
aa54c8da 111 int regs_size;
6665e623
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112 int addr_width;
113 int addr_shift;
aa54c8da
HB
114};
115
116static const struct ks8995_chip_params ks8995_chip[] = {
117 [ks8995] = {
118 .name = "KS8995MA",
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119 .family_id = FAMILY_KS8995,
120 .chip_id = KS8995_CHIP_ID,
aa54c8da 121 .regs_size = KS8995_REGS_SIZE,
6665e623
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122 .addr_width = 8,
123 .addr_shift = 0,
aa54c8da
HB
124 },
125 [ksz8864] = {
126 .name = "KSZ8864RMN",
484e36ff
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127 .family_id = FAMILY_KS8995,
128 .chip_id = KSZ8864_CHIP_ID,
aa54c8da 129 .regs_size = KSZ8864_REGS_SIZE,
6665e623
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130 .addr_width = 8,
131 .addr_shift = 0,
aa54c8da 132 },
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133 [ksz8795] = {
134 .name = "KSZ8795CLX",
135 .family_id = FAMILY_KSZ8795,
136 .chip_id = KSZ8795_CHIP_ID,
137 .regs_size = KSZ8795_REGS_SIZE,
138 .addr_width = 12,
139 .addr_shift = 1,
140 },
aa54c8da
HB
141};
142
a8e510f6 143struct ks8995_pdata {
cd6f288c
HB
144 int reset_gpio;
145 enum of_gpio_flags reset_gpio_flags;
a8e510f6
FL
146};
147
148struct ks8995_switch {
149 struct spi_device *spi;
150 struct mutex lock;
151 struct ks8995_pdata *pdata;
240a12d5 152 struct bin_attribute regs_attr;
aa54c8da 153 const struct ks8995_chip_params *chip;
484e36ff 154 int revision_id;
a8e510f6
FL
155};
156
aa54c8da
HB
157static const struct spi_device_id ks8995_id[] = {
158 {"ks8995", ks8995},
159 {"ksz8864", ksz8864},
c0e6cb1f 160 {"ksz8795", ksz8795},
aa54c8da
HB
161 { }
162};
163MODULE_DEVICE_TABLE(spi, ks8995_id);
164
a8e510f6
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165static inline u8 get_chip_id(u8 val)
166{
167 return (val >> ID1_CHIPID_S) & ID1_CHIPID_M;
168}
169
170static inline u8 get_chip_rev(u8 val)
171{
172 return (val >> ID1_REVISION_S) & ID1_REVISION_M;
173}
174
6665e623
HB
175/* create_spi_cmd - create a chip specific SPI command header
176 * @ks: pointer to switch instance
177 * @cmd: SPI command for switch
178 * @address: register address for command
179 *
180 * Different chip families use different bit pattern to address the switches
181 * registers:
182 *
183 * KS8995: 8bit command + 8bit address
184 * KSZ8795: 3bit command + 12bit address + 1bit TR (?)
185 */
186static inline __be16 create_spi_cmd(struct ks8995_switch *ks, int cmd,
187 unsigned address)
188{
189 u16 result = cmd;
190
191 /* make room for address (incl. address shift) */
192 result <<= ks->chip->addr_width + ks->chip->addr_shift;
193 /* add address */
194 result |= address << ks->chip->addr_shift;
195 /* SPI protocol needs big endian */
196 return cpu_to_be16(result);
197}
a8e510f6
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198/* ------------------------------------------------------------------------ */
199static int ks8995_read(struct ks8995_switch *ks, char *buf,
200 unsigned offset, size_t count)
201{
6665e623 202 __be16 cmd;
a8e510f6
FL
203 struct spi_transfer t[2];
204 struct spi_message m;
205 int err;
206
6665e623 207 cmd = create_spi_cmd(ks, KS8995_CMD_READ, offset);
a8e510f6
FL
208 spi_message_init(&m);
209
210 memset(&t, 0, sizeof(t));
211
6665e623 212 t[0].tx_buf = &cmd;
a8e510f6
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213 t[0].len = sizeof(cmd);
214 spi_message_add_tail(&t[0], &m);
215
216 t[1].rx_buf = buf;
217 t[1].len = count;
218 spi_message_add_tail(&t[1], &m);
219
a8e510f6
FL
220 mutex_lock(&ks->lock);
221 err = spi_sync(ks->spi, &m);
222 mutex_unlock(&ks->lock);
223
224 return err ? err : count;
225}
226
a8e510f6
FL
227static int ks8995_write(struct ks8995_switch *ks, char *buf,
228 unsigned offset, size_t count)
229{
6665e623 230 __be16 cmd;
a8e510f6
FL
231 struct spi_transfer t[2];
232 struct spi_message m;
233 int err;
234
6665e623 235 cmd = create_spi_cmd(ks, KS8995_CMD_WRITE, offset);
a8e510f6
FL
236 spi_message_init(&m);
237
238 memset(&t, 0, sizeof(t));
239
6665e623 240 t[0].tx_buf = &cmd;
a8e510f6
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241 t[0].len = sizeof(cmd);
242 spi_message_add_tail(&t[0], &m);
243
244 t[1].tx_buf = buf;
245 t[1].len = count;
246 spi_message_add_tail(&t[1], &m);
247
a8e510f6
FL
248 mutex_lock(&ks->lock);
249 err = spi_sync(ks->spi, &m);
250 mutex_unlock(&ks->lock);
251
252 return err ? err : count;
253}
254
255static inline int ks8995_read_reg(struct ks8995_switch *ks, u8 addr, u8 *buf)
256{
7aff9675 257 return ks8995_read(ks, buf, addr, 1) != 1;
a8e510f6
FL
258}
259
260static inline int ks8995_write_reg(struct ks8995_switch *ks, u8 addr, u8 val)
261{
262 char buf = val;
263
7aff9675 264 return ks8995_write(ks, &buf, addr, 1) != 1;
a8e510f6
FL
265}
266
267/* ------------------------------------------------------------------------ */
268
269static int ks8995_stop(struct ks8995_switch *ks)
270{
271 return ks8995_write_reg(ks, KS8995_REG_ID1, 0);
272}
273
274static int ks8995_start(struct ks8995_switch *ks)
275{
276 return ks8995_write_reg(ks, KS8995_REG_ID1, 1);
277}
278
279static int ks8995_reset(struct ks8995_switch *ks)
280{
281 int err;
282
283 err = ks8995_stop(ks);
284 if (err)
285 return err;
286
287 udelay(KS8995_RESET_DELAY);
288
289 return ks8995_start(ks);
290}
291
a8e510f6
FL
292static ssize_t ks8995_registers_read(struct file *filp, struct kobject *kobj,
293 struct bin_attribute *bin_attr, char *buf, loff_t off, size_t count)
294{
295 struct device *dev;
296 struct ks8995_switch *ks8995;
297
298 dev = container_of(kobj, struct device, kobj);
299 ks8995 = dev_get_drvdata(dev);
300
a8e510f6
FL
301 return ks8995_read(ks8995, buf, off, count);
302}
303
a8e510f6
FL
304static ssize_t ks8995_registers_write(struct file *filp, struct kobject *kobj,
305 struct bin_attribute *bin_attr, char *buf, loff_t off, size_t count)
306{
307 struct device *dev;
308 struct ks8995_switch *ks8995;
309
310 dev = container_of(kobj, struct device, kobj);
311 ks8995 = dev_get_drvdata(dev);
312
a8e510f6
FL
313 return ks8995_write(ks8995, buf, off, count);
314}
315
484e36ff
HB
316/* ks8995_get_revision - get chip revision
317 * @ks: pointer to switch instance
318 *
319 * Verify chip family and id and get chip revision.
320 */
321static int ks8995_get_revision(struct ks8995_switch *ks)
322{
323 int err;
324 u8 id0, id1, ksz8864_id;
325
326 /* read family id */
327 err = ks8995_read_reg(ks, KS8995_REG_ID0, &id0);
328 if (err) {
329 err = -EIO;
330 goto err_out;
331 }
332
333 /* verify family id */
334 if (id0 != ks->chip->family_id) {
335 dev_err(&ks->spi->dev, "chip family id mismatch: expected 0x%02x but 0x%02x read\n",
336 ks->chip->family_id, id0);
337 err = -ENODEV;
338 goto err_out;
339 }
340
341 switch (ks->chip->family_id) {
342 case FAMILY_KS8995:
343 /* try reading chip id at CHIP ID1 */
344 err = ks8995_read_reg(ks, KS8995_REG_ID1, &id1);
345 if (err) {
346 err = -EIO;
347 goto err_out;
348 }
349
350 /* verify chip id */
351 if ((get_chip_id(id1) == CHIPID_M) &&
352 (get_chip_id(id1) == ks->chip->chip_id)) {
353 /* KS8995MA */
354 ks->revision_id = get_chip_rev(id1);
355 } else if (get_chip_id(id1) != CHIPID_M) {
356 /* KSZ8864RMN */
357 err = ks8995_read_reg(ks, KS8995_REG_ID1, &ksz8864_id);
358 if (err) {
359 err = -EIO;
360 goto err_out;
361 }
362
363 if ((ksz8864_id & 0x80) &&
364 (ks->chip->chip_id == KSZ8864_CHIP_ID)) {
365 ks->revision_id = get_chip_rev(id1);
366 }
367
368 } else {
369 dev_err(&ks->spi->dev, "unsupported chip id for KS8995 family: 0x%02x\n",
370 id1);
371 err = -ENODEV;
372 }
373 break;
c0e6cb1f
HB
374 case FAMILY_KSZ8795:
375 /* try reading chip id at CHIP ID1 */
376 err = ks8995_read_reg(ks, KS8995_REG_ID1, &id1);
377 if (err) {
378 err = -EIO;
379 goto err_out;
380 }
381
382 if (get_chip_id(id1) == ks->chip->chip_id) {
383 ks->revision_id = get_chip_rev(id1);
384 } else {
385 dev_err(&ks->spi->dev, "unsupported chip id for KSZ8795 family: 0x%02x\n",
386 id1);
387 err = -ENODEV;
388 }
389 break;
484e36ff
HB
390 default:
391 dev_err(&ks->spi->dev, "unsupported family id: 0x%02x\n", id0);
392 err = -ENODEV;
393 break;
394 }
395err_out:
396 return err;
397}
398
cd6f288c
HB
399/* ks8995_parse_dt - setup platform data from devicetree
400 * @ks: pointer to switch instance
401 *
402 * Parses supported DT properties and sets up platform data
403 * accordingly.
404 */
405static void ks8995_parse_dt(struct ks8995_switch *ks)
406{
407 struct device_node *np = ks->spi->dev.of_node;
408 struct ks8995_pdata *pdata = ks->pdata;
409
410 if (!np)
411 return;
412
413 pdata->reset_gpio = of_get_named_gpio_flags(np, "reset-gpios", 0,
414 &pdata->reset_gpio_flags);
415}
416
240a12d5 417static const struct bin_attribute ks8995_registers_attr = {
a8e510f6
FL
418 .attr = {
419 .name = "registers",
420 .mode = S_IRUSR | S_IWUSR,
421 },
422 .size = KS8995_REGS_SIZE,
423 .read = ks8995_registers_read,
424 .write = ks8995_registers_write,
425};
426
427/* ------------------------------------------------------------------------ */
633d1594 428static int ks8995_probe(struct spi_device *spi)
a8e510f6 429{
cd6f288c
HB
430 struct ks8995_switch *ks;
431 int err;
aa54c8da 432 int variant = spi_get_device_id(spi)->driver_data;
a8e510f6 433
aa54c8da
HB
434 if (variant >= max_variant) {
435 dev_err(&spi->dev, "bad chip variant %d\n", variant);
436 return -ENODEV;
437 }
438
b32a8b64 439 ks = devm_kzalloc(&spi->dev, sizeof(*ks), GFP_KERNEL);
e68ed8f0 440 if (!ks)
a8e510f6 441 return -ENOMEM;
a8e510f6
FL
442
443 mutex_init(&ks->lock);
a1459c1c 444 ks->spi = spi;
aa54c8da
HB
445 ks->chip = &ks8995_chip[variant];
446
cd6f288c
HB
447 if (ks->spi->dev.of_node) {
448 ks->pdata = devm_kzalloc(&spi->dev, sizeof(*ks->pdata),
449 GFP_KERNEL);
450 if (!ks->pdata)
451 return -ENOMEM;
452
453 ks->pdata->reset_gpio = -1;
454
455 ks8995_parse_dt(ks);
456 }
457
458 if (!ks->pdata)
459 ks->pdata = spi->dev.platform_data;
460
461 /* de-assert switch reset */
462 if (ks->pdata && gpio_is_valid(ks->pdata->reset_gpio)) {
463 unsigned long flags;
464
465 flags = (ks->pdata->reset_gpio_flags == OF_GPIO_ACTIVE_LOW ?
466 GPIOF_ACTIVE_LOW : 0);
467
468 err = devm_gpio_request_one(&spi->dev,
469 ks->pdata->reset_gpio,
470 flags, "switch-reset");
471 if (err) {
472 dev_err(&spi->dev,
473 "failed to get reset-gpios: %d\n", err);
474 return -EIO;
475 }
476
477 gpiod_set_value(gpio_to_desc(ks->pdata->reset_gpio), 0);
478 }
479
5d5f1846 480 spi_set_drvdata(spi, ks);
a8e510f6
FL
481
482 spi->mode = SPI_MODE_0;
483 spi->bits_per_word = 8;
484 err = spi_setup(spi);
485 if (err) {
486 dev_err(&spi->dev, "spi_setup failed, err=%d\n", err);
b32a8b64 487 return err;
a8e510f6
FL
488 }
489
484e36ff
HB
490 err = ks8995_get_revision(ks);
491 if (err)
b32a8b64 492 return err;
a8e510f6 493
240a12d5 494 memcpy(&ks->regs_attr, &ks8995_registers_attr, sizeof(ks->regs_attr));
239870f2 495 ks->regs_attr.size = ks->chip->regs_size;
240a12d5 496
a8e510f6
FL
497 err = ks8995_reset(ks);
498 if (err)
b32a8b64 499 return err;
a8e510f6 500
4342696d 501 sysfs_attr_init(&ks->regs_attr.attr);
240a12d5 502 err = sysfs_create_bin_file(&spi->dev.kobj, &ks->regs_attr);
a8e510f6
FL
503 if (err) {
504 dev_err(&spi->dev, "unable to create sysfs file, err=%d\n",
505 err);
b32a8b64 506 return err;
a8e510f6
FL
507 }
508
484e36ff
HB
509 dev_info(&spi->dev, "%s device found, Chip ID:%x, Revision:%x\n",
510 ks->chip->name, ks->chip->chip_id, ks->revision_id);
a8e510f6
FL
511
512 return 0;
a8e510f6
FL
513}
514
633d1594 515static int ks8995_remove(struct spi_device *spi)
a8e510f6 516{
30349bdb
VZ
517 struct ks8995_switch *ks = spi_get_drvdata(spi);
518
519 sysfs_remove_bin_file(&spi->dev.kobj, &ks->regs_attr);
a8e510f6 520
cd6f288c
HB
521 /* assert reset */
522 if (ks->pdata && gpio_is_valid(ks->pdata->reset_gpio))
523 gpiod_set_value(gpio_to_desc(ks->pdata->reset_gpio), 1);
524
a8e510f6
FL
525 return 0;
526}
527
528/* ------------------------------------------------------------------------ */
a8e510f6
FL
529static struct spi_driver ks8995_driver = {
530 .driver = {
531 .name = "spi-ks8995",
a8e510f6
FL
532 },
533 .probe = ks8995_probe,
633d1594 534 .remove = ks8995_remove,
aa54c8da 535 .id_table = ks8995_id,
a8e510f6
FL
536};
537
1a9561a3 538module_spi_driver(ks8995_driver);
a8e510f6
FL
539
540MODULE_DESCRIPTION(DRV_DESC);
541MODULE_VERSION(DRV_VERSION);
542MODULE_AUTHOR("Gabor Juhos <juhosg at openwrt.org>");
543MODULE_LICENSE("GPL v2");