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afd4aea0 BH |
1 | /**************************************************************************** |
2 | * Driver for Solarflare Solarstorm network controllers and boards | |
0a6f40c6 | 3 | * Copyright 2008-2011 Solarflare Communications Inc. |
afd4aea0 BH |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License version 2 as published | |
7 | * by the Free Software Foundation, incorporated herein by reference. | |
8 | */ | |
9 | ||
10 | #include <linux/delay.h> | |
11 | #include "net_driver.h" | |
12 | #include "nic.h" | |
13 | #include "io.h" | |
14 | #include "regs.h" | |
15 | #include "mcdi_pcol.h" | |
16 | #include "phy.h" | |
17 | ||
18 | /************************************************************************** | |
19 | * | |
20 | * Management-Controller-to-Driver Interface | |
21 | * | |
22 | ************************************************************************** | |
23 | */ | |
24 | ||
25 | /* Software-defined structure to the shared-memory */ | |
26 | #define CMD_NOTIFY_PORT0 0 | |
27 | #define CMD_NOTIFY_PORT1 4 | |
28 | #define CMD_PDU_PORT0 0x008 | |
29 | #define CMD_PDU_PORT1 0x108 | |
30 | #define REBOOT_FLAG_PORT0 0x3f8 | |
31 | #define REBOOT_FLAG_PORT1 0x3fc | |
32 | ||
33 | #define MCDI_RPC_TIMEOUT 10 /*seconds */ | |
34 | ||
35 | #define MCDI_PDU(efx) \ | |
36 | (efx_port_num(efx) ? CMD_PDU_PORT1 : CMD_PDU_PORT0) | |
37 | #define MCDI_DOORBELL(efx) \ | |
38 | (efx_port_num(efx) ? CMD_NOTIFY_PORT1 : CMD_NOTIFY_PORT0) | |
39 | #define MCDI_REBOOT_FLAG(efx) \ | |
40 | (efx_port_num(efx) ? REBOOT_FLAG_PORT1 : REBOOT_FLAG_PORT0) | |
41 | ||
42 | #define SEQ_MASK \ | |
43 | EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ)) | |
44 | ||
45 | static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx) | |
46 | { | |
47 | struct siena_nic_data *nic_data; | |
48 | EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0); | |
49 | nic_data = efx->nic_data; | |
50 | return &nic_data->mcdi; | |
51 | } | |
52 | ||
53 | void efx_mcdi_init(struct efx_nic *efx) | |
54 | { | |
55 | struct efx_mcdi_iface *mcdi; | |
56 | ||
57 | if (efx_nic_rev(efx) < EFX_REV_SIENA_A0) | |
58 | return; | |
59 | ||
60 | mcdi = efx_mcdi(efx); | |
61 | init_waitqueue_head(&mcdi->wq); | |
62 | spin_lock_init(&mcdi->iface_lock); | |
63 | atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT); | |
64 | mcdi->mode = MCDI_MODE_POLL; | |
65 | ||
66 | (void) efx_mcdi_poll_reboot(efx); | |
67 | } | |
68 | ||
69 | static void efx_mcdi_copyin(struct efx_nic *efx, unsigned cmd, | |
70 | const u8 *inbuf, size_t inlen) | |
71 | { | |
72 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
73 | unsigned pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx); | |
74 | unsigned doorbell = FR_CZ_MC_TREG_SMEM + MCDI_DOORBELL(efx); | |
75 | unsigned int i; | |
76 | efx_dword_t hdr; | |
77 | u32 xflags, seqno; | |
78 | ||
79 | BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT); | |
80 | BUG_ON(inlen & 3 || inlen >= 0x100); | |
81 | ||
82 | seqno = mcdi->seqno & SEQ_MASK; | |
83 | xflags = 0; | |
84 | if (mcdi->mode == MCDI_MODE_EVENTS) | |
85 | xflags |= MCDI_HEADER_XFLAGS_EVREQ; | |
86 | ||
87 | EFX_POPULATE_DWORD_6(hdr, | |
88 | MCDI_HEADER_RESPONSE, 0, | |
89 | MCDI_HEADER_RESYNC, 1, | |
90 | MCDI_HEADER_CODE, cmd, | |
91 | MCDI_HEADER_DATALEN, inlen, | |
92 | MCDI_HEADER_SEQ, seqno, | |
93 | MCDI_HEADER_XFLAGS, xflags); | |
94 | ||
95 | efx_writed(efx, &hdr, pdu); | |
96 | ||
65f0b417 | 97 | for (i = 0; i < inlen; i += 4) { |
afd4aea0 | 98 | _efx_writed(efx, *((__le32 *)(inbuf + i)), pdu + 4 + i); |
65f0b417 BH |
99 | /* use wmb() within loop to inhibit write combining */ |
100 | wmb(); | |
101 | } | |
afd4aea0 BH |
102 | |
103 | /* ring the doorbell with a distinctive value */ | |
104 | _efx_writed(efx, (__force __le32) 0x45789abc, doorbell); | |
65f0b417 | 105 | wmb(); |
afd4aea0 BH |
106 | } |
107 | ||
108 | static void efx_mcdi_copyout(struct efx_nic *efx, u8 *outbuf, size_t outlen) | |
109 | { | |
110 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
111 | unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx); | |
112 | int i; | |
113 | ||
114 | BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT); | |
115 | BUG_ON(outlen & 3 || outlen >= 0x100); | |
116 | ||
117 | for (i = 0; i < outlen; i += 4) | |
118 | *((__le32 *)(outbuf + i)) = _efx_readd(efx, pdu + 4 + i); | |
119 | } | |
120 | ||
121 | static int efx_mcdi_poll(struct efx_nic *efx) | |
122 | { | |
123 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
124 | unsigned int time, finish; | |
125 | unsigned int respseq, respcmd, error; | |
126 | unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx); | |
127 | unsigned int rc, spins; | |
128 | efx_dword_t reg; | |
129 | ||
130 | /* Check for a reboot atomically with respect to efx_mcdi_copyout() */ | |
e0bf54c9 | 131 | rc = -efx_mcdi_poll_reboot(efx); |
afd4aea0 BH |
132 | if (rc) |
133 | goto out; | |
134 | ||
135 | /* Poll for completion. Poll quickly (once a us) for the 1st jiffy, | |
136 | * because generally mcdi responses are fast. After that, back off | |
137 | * and poll once a jiffy (approximately) | |
138 | */ | |
139 | spins = TICK_USEC; | |
140 | finish = get_seconds() + MCDI_RPC_TIMEOUT; | |
141 | ||
142 | while (1) { | |
143 | if (spins != 0) { | |
144 | --spins; | |
145 | udelay(1); | |
55029c1d BH |
146 | } else { |
147 | schedule_timeout_uninterruptible(1); | |
148 | } | |
afd4aea0 BH |
149 | |
150 | time = get_seconds(); | |
151 | ||
152 | rmb(); | |
153 | efx_readd(efx, ®, pdu); | |
154 | ||
155 | /* All 1's indicates that shared memory is in reset (and is | |
156 | * not a valid header). Wait for it to come out reset before | |
157 | * completing the command */ | |
158 | if (EFX_DWORD_FIELD(reg, EFX_DWORD_0) != 0xffffffff && | |
159 | EFX_DWORD_FIELD(reg, MCDI_HEADER_RESPONSE)) | |
160 | break; | |
161 | ||
162 | if (time >= finish) | |
163 | return -ETIMEDOUT; | |
164 | } | |
165 | ||
166 | mcdi->resplen = EFX_DWORD_FIELD(reg, MCDI_HEADER_DATALEN); | |
167 | respseq = EFX_DWORD_FIELD(reg, MCDI_HEADER_SEQ); | |
168 | respcmd = EFX_DWORD_FIELD(reg, MCDI_HEADER_CODE); | |
169 | error = EFX_DWORD_FIELD(reg, MCDI_HEADER_ERROR); | |
170 | ||
171 | if (error && mcdi->resplen == 0) { | |
62776d03 | 172 | netif_err(efx, hw, efx->net_dev, "MC rebooted\n"); |
afd4aea0 BH |
173 | rc = EIO; |
174 | } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) { | |
62776d03 BH |
175 | netif_err(efx, hw, efx->net_dev, |
176 | "MC response mismatch tx seq 0x%x rx seq 0x%x\n", | |
177 | respseq, mcdi->seqno); | |
afd4aea0 BH |
178 | rc = EIO; |
179 | } else if (error) { | |
180 | efx_readd(efx, ®, pdu + 4); | |
181 | switch (EFX_DWORD_FIELD(reg, EFX_DWORD_0)) { | |
182 | #define TRANSLATE_ERROR(name) \ | |
183 | case MC_CMD_ERR_ ## name: \ | |
184 | rc = name; \ | |
185 | break | |
186 | TRANSLATE_ERROR(ENOENT); | |
187 | TRANSLATE_ERROR(EINTR); | |
188 | TRANSLATE_ERROR(EACCES); | |
189 | TRANSLATE_ERROR(EBUSY); | |
190 | TRANSLATE_ERROR(EINVAL); | |
191 | TRANSLATE_ERROR(EDEADLK); | |
192 | TRANSLATE_ERROR(ENOSYS); | |
193 | TRANSLATE_ERROR(ETIME); | |
194 | #undef TRANSLATE_ERROR | |
195 | default: | |
196 | rc = EIO; | |
197 | break; | |
198 | } | |
199 | } else | |
200 | rc = 0; | |
201 | ||
202 | out: | |
203 | mcdi->resprc = rc; | |
204 | if (rc) | |
205 | mcdi->resplen = 0; | |
206 | ||
207 | /* Return rc=0 like wait_event_timeout() */ | |
208 | return 0; | |
209 | } | |
210 | ||
211 | /* Test and clear MC-rebooted flag for this port/function */ | |
212 | int efx_mcdi_poll_reboot(struct efx_nic *efx) | |
213 | { | |
214 | unsigned int addr = FR_CZ_MC_TREG_SMEM + MCDI_REBOOT_FLAG(efx); | |
215 | efx_dword_t reg; | |
216 | uint32_t value; | |
217 | ||
218 | if (efx_nic_rev(efx) < EFX_REV_SIENA_A0) | |
219 | return false; | |
220 | ||
221 | efx_readd(efx, ®, addr); | |
222 | value = EFX_DWORD_FIELD(reg, EFX_DWORD_0); | |
223 | ||
224 | if (value == 0) | |
225 | return 0; | |
226 | ||
227 | EFX_ZERO_DWORD(reg); | |
228 | efx_writed(efx, ®, addr); | |
229 | ||
230 | if (value == MC_STATUS_DWORD_ASSERT) | |
231 | return -EINTR; | |
232 | else | |
233 | return -EIO; | |
234 | } | |
235 | ||
236 | static void efx_mcdi_acquire(struct efx_mcdi_iface *mcdi) | |
237 | { | |
238 | /* Wait until the interface becomes QUIESCENT and we win the race | |
239 | * to mark it RUNNING. */ | |
240 | wait_event(mcdi->wq, | |
241 | atomic_cmpxchg(&mcdi->state, | |
242 | MCDI_STATE_QUIESCENT, | |
243 | MCDI_STATE_RUNNING) | |
244 | == MCDI_STATE_QUIESCENT); | |
245 | } | |
246 | ||
247 | static int efx_mcdi_await_completion(struct efx_nic *efx) | |
248 | { | |
249 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
250 | ||
251 | if (wait_event_timeout( | |
252 | mcdi->wq, | |
253 | atomic_read(&mcdi->state) == MCDI_STATE_COMPLETED, | |
254 | msecs_to_jiffies(MCDI_RPC_TIMEOUT * 1000)) == 0) | |
255 | return -ETIMEDOUT; | |
256 | ||
257 | /* Check if efx_mcdi_set_mode() switched us back to polled completions. | |
258 | * In which case, poll for completions directly. If efx_mcdi_ev_cpl() | |
259 | * completed the request first, then we'll just end up completing the | |
260 | * request again, which is safe. | |
261 | * | |
262 | * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which | |
263 | * wait_event_timeout() implicitly provides. | |
264 | */ | |
265 | if (mcdi->mode == MCDI_MODE_POLL) | |
266 | return efx_mcdi_poll(efx); | |
267 | ||
268 | return 0; | |
269 | } | |
270 | ||
271 | static bool efx_mcdi_complete(struct efx_mcdi_iface *mcdi) | |
272 | { | |
273 | /* If the interface is RUNNING, then move to COMPLETED and wake any | |
274 | * waiters. If the interface isn't in RUNNING then we've received a | |
275 | * duplicate completion after we've already transitioned back to | |
276 | * QUIESCENT. [A subsequent invocation would increment seqno, so would | |
277 | * have failed the seqno check]. | |
278 | */ | |
279 | if (atomic_cmpxchg(&mcdi->state, | |
280 | MCDI_STATE_RUNNING, | |
281 | MCDI_STATE_COMPLETED) == MCDI_STATE_RUNNING) { | |
282 | wake_up(&mcdi->wq); | |
283 | return true; | |
284 | } | |
285 | ||
286 | return false; | |
287 | } | |
288 | ||
289 | static void efx_mcdi_release(struct efx_mcdi_iface *mcdi) | |
290 | { | |
291 | atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT); | |
292 | wake_up(&mcdi->wq); | |
293 | } | |
294 | ||
295 | static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno, | |
296 | unsigned int datalen, unsigned int errno) | |
297 | { | |
298 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
299 | bool wake = false; | |
300 | ||
301 | spin_lock(&mcdi->iface_lock); | |
302 | ||
303 | if ((seqno ^ mcdi->seqno) & SEQ_MASK) { | |
304 | if (mcdi->credits) | |
305 | /* The request has been cancelled */ | |
306 | --mcdi->credits; | |
307 | else | |
62776d03 BH |
308 | netif_err(efx, hw, efx->net_dev, |
309 | "MC response mismatch tx seq 0x%x rx " | |
310 | "seq 0x%x\n", seqno, mcdi->seqno); | |
afd4aea0 BH |
311 | } else { |
312 | mcdi->resprc = errno; | |
313 | mcdi->resplen = datalen; | |
314 | ||
315 | wake = true; | |
316 | } | |
317 | ||
318 | spin_unlock(&mcdi->iface_lock); | |
319 | ||
320 | if (wake) | |
321 | efx_mcdi_complete(mcdi); | |
322 | } | |
323 | ||
324 | /* Issue the given command by writing the data into the shared memory PDU, | |
325 | * ring the doorbell and wait for completion. Copyout the result. */ | |
326 | int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd, | |
327 | const u8 *inbuf, size_t inlen, u8 *outbuf, size_t outlen, | |
328 | size_t *outlen_actual) | |
329 | { | |
330 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
331 | int rc; | |
332 | BUG_ON(efx_nic_rev(efx) < EFX_REV_SIENA_A0); | |
333 | ||
334 | efx_mcdi_acquire(mcdi); | |
335 | ||
336 | /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */ | |
337 | spin_lock_bh(&mcdi->iface_lock); | |
338 | ++mcdi->seqno; | |
339 | spin_unlock_bh(&mcdi->iface_lock); | |
340 | ||
341 | efx_mcdi_copyin(efx, cmd, inbuf, inlen); | |
342 | ||
343 | if (mcdi->mode == MCDI_MODE_POLL) | |
344 | rc = efx_mcdi_poll(efx); | |
345 | else | |
346 | rc = efx_mcdi_await_completion(efx); | |
347 | ||
348 | if (rc != 0) { | |
349 | /* Close the race with efx_mcdi_ev_cpl() executing just too late | |
350 | * and completing a request we've just cancelled, by ensuring | |
351 | * that the seqno check therein fails. | |
352 | */ | |
353 | spin_lock_bh(&mcdi->iface_lock); | |
354 | ++mcdi->seqno; | |
355 | ++mcdi->credits; | |
356 | spin_unlock_bh(&mcdi->iface_lock); | |
357 | ||
62776d03 BH |
358 | netif_err(efx, hw, efx->net_dev, |
359 | "MC command 0x%x inlen %d mode %d timed out\n", | |
360 | cmd, (int)inlen, mcdi->mode); | |
afd4aea0 BH |
361 | } else { |
362 | size_t resplen; | |
363 | ||
364 | /* At the very least we need a memory barrier here to ensure | |
365 | * we pick up changes from efx_mcdi_ev_cpl(). Protect against | |
366 | * a spurious efx_mcdi_ev_cpl() running concurrently by | |
367 | * acquiring the iface_lock. */ | |
368 | spin_lock_bh(&mcdi->iface_lock); | |
369 | rc = -mcdi->resprc; | |
370 | resplen = mcdi->resplen; | |
371 | spin_unlock_bh(&mcdi->iface_lock); | |
372 | ||
373 | if (rc == 0) { | |
374 | efx_mcdi_copyout(efx, outbuf, | |
375 | min(outlen, mcdi->resplen + 3) & ~0x3); | |
376 | if (outlen_actual != NULL) | |
377 | *outlen_actual = resplen; | |
378 | } else if (cmd == MC_CMD_REBOOT && rc == -EIO) | |
379 | ; /* Don't reset if MC_CMD_REBOOT returns EIO */ | |
380 | else if (rc == -EIO || rc == -EINTR) { | |
62776d03 BH |
381 | netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n", |
382 | -rc); | |
afd4aea0 BH |
383 | efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); |
384 | } else | |
f18ca364 | 385 | netif_dbg(efx, hw, efx->net_dev, |
62776d03 BH |
386 | "MC command 0x%x inlen %d failed rc=%d\n", |
387 | cmd, (int)inlen, -rc); | |
afd4aea0 BH |
388 | } |
389 | ||
390 | efx_mcdi_release(mcdi); | |
391 | return rc; | |
392 | } | |
393 | ||
394 | void efx_mcdi_mode_poll(struct efx_nic *efx) | |
395 | { | |
396 | struct efx_mcdi_iface *mcdi; | |
397 | ||
398 | if (efx_nic_rev(efx) < EFX_REV_SIENA_A0) | |
399 | return; | |
400 | ||
401 | mcdi = efx_mcdi(efx); | |
402 | if (mcdi->mode == MCDI_MODE_POLL) | |
403 | return; | |
404 | ||
405 | /* We can switch from event completion to polled completion, because | |
406 | * mcdi requests are always completed in shared memory. We do this by | |
407 | * switching the mode to POLL'd then completing the request. | |
408 | * efx_mcdi_await_completion() will then call efx_mcdi_poll(). | |
409 | * | |
410 | * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(), | |
411 | * which efx_mcdi_complete() provides for us. | |
412 | */ | |
413 | mcdi->mode = MCDI_MODE_POLL; | |
414 | ||
415 | efx_mcdi_complete(mcdi); | |
416 | } | |
417 | ||
418 | void efx_mcdi_mode_event(struct efx_nic *efx) | |
419 | { | |
420 | struct efx_mcdi_iface *mcdi; | |
421 | ||
422 | if (efx_nic_rev(efx) < EFX_REV_SIENA_A0) | |
423 | return; | |
424 | ||
425 | mcdi = efx_mcdi(efx); | |
426 | ||
427 | if (mcdi->mode == MCDI_MODE_EVENTS) | |
428 | return; | |
429 | ||
430 | /* We can't switch from polled to event completion in the middle of a | |
431 | * request, because the completion method is specified in the request. | |
432 | * So acquire the interface to serialise the requestors. We don't need | |
433 | * to acquire the iface_lock to change the mode here, but we do need a | |
434 | * write memory barrier ensure that efx_mcdi_rpc() sees it, which | |
435 | * efx_mcdi_acquire() provides. | |
436 | */ | |
437 | efx_mcdi_acquire(mcdi); | |
438 | mcdi->mode = MCDI_MODE_EVENTS; | |
439 | efx_mcdi_release(mcdi); | |
440 | } | |
441 | ||
442 | static void efx_mcdi_ev_death(struct efx_nic *efx, int rc) | |
443 | { | |
444 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
445 | ||
446 | /* If there is an outstanding MCDI request, it has been terminated | |
447 | * either by a BADASSERT or REBOOT event. If the mcdi interface is | |
448 | * in polled mode, then do nothing because the MC reboot handler will | |
449 | * set the header correctly. However, if the mcdi interface is waiting | |
450 | * for a CMDDONE event it won't receive it [and since all MCDI events | |
451 | * are sent to the same queue, we can't be racing with | |
452 | * efx_mcdi_ev_cpl()] | |
453 | * | |
454 | * There's a race here with efx_mcdi_rpc(), because we might receive | |
455 | * a REBOOT event *before* the request has been copied out. In polled | |
25985edc | 456 | * mode (during startup) this is irrelevant, because efx_mcdi_complete() |
afd4aea0 BH |
457 | * is ignored. In event mode, this condition is just an edge-case of |
458 | * receiving a REBOOT event after posting the MCDI request. Did the mc | |
459 | * reboot before or after the copyout? The best we can do always is | |
460 | * just return failure. | |
461 | */ | |
462 | spin_lock(&mcdi->iface_lock); | |
463 | if (efx_mcdi_complete(mcdi)) { | |
464 | if (mcdi->mode == MCDI_MODE_EVENTS) { | |
465 | mcdi->resprc = rc; | |
466 | mcdi->resplen = 0; | |
18e3ee2c | 467 | ++mcdi->credits; |
afd4aea0 BH |
468 | } |
469 | } else | |
470 | /* Nobody was waiting for an MCDI request, so trigger a reset */ | |
471 | efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); | |
472 | ||
473 | spin_unlock(&mcdi->iface_lock); | |
474 | } | |
475 | ||
476 | static unsigned int efx_mcdi_event_link_speed[] = { | |
477 | [MCDI_EVENT_LINKCHANGE_SPEED_100M] = 100, | |
478 | [MCDI_EVENT_LINKCHANGE_SPEED_1G] = 1000, | |
479 | [MCDI_EVENT_LINKCHANGE_SPEED_10G] = 10000, | |
480 | }; | |
481 | ||
482 | ||
483 | static void efx_mcdi_process_link_change(struct efx_nic *efx, efx_qword_t *ev) | |
484 | { | |
485 | u32 flags, fcntl, speed, lpa; | |
486 | ||
487 | speed = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_SPEED); | |
488 | EFX_BUG_ON_PARANOID(speed >= ARRAY_SIZE(efx_mcdi_event_link_speed)); | |
489 | speed = efx_mcdi_event_link_speed[speed]; | |
490 | ||
491 | flags = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LINK_FLAGS); | |
492 | fcntl = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_FCNTL); | |
493 | lpa = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LP_CAP); | |
494 | ||
495 | /* efx->link_state is only modified by efx_mcdi_phy_get_link(), | |
496 | * which is only run after flushing the event queues. Therefore, it | |
497 | * is safe to modify the link state outside of the mac_lock here. | |
498 | */ | |
499 | efx_mcdi_phy_decode_link(efx, &efx->link_state, speed, flags, fcntl); | |
500 | ||
501 | efx_mcdi_phy_check_fcntl(efx, lpa); | |
502 | ||
503 | efx_link_status_changed(efx); | |
504 | } | |
505 | ||
506 | static const char *sensor_names[] = { | |
507 | [MC_CMD_SENSOR_CONTROLLER_TEMP] = "Controller temp. sensor", | |
508 | [MC_CMD_SENSOR_PHY_COMMON_TEMP] = "PHY shared temp. sensor", | |
509 | [MC_CMD_SENSOR_CONTROLLER_COOLING] = "Controller cooling", | |
510 | [MC_CMD_SENSOR_PHY0_TEMP] = "PHY 0 temp. sensor", | |
511 | [MC_CMD_SENSOR_PHY0_COOLING] = "PHY 0 cooling", | |
512 | [MC_CMD_SENSOR_PHY1_TEMP] = "PHY 1 temp. sensor", | |
513 | [MC_CMD_SENSOR_PHY1_COOLING] = "PHY 1 cooling", | |
514 | [MC_CMD_SENSOR_IN_1V0] = "1.0V supply sensor", | |
515 | [MC_CMD_SENSOR_IN_1V2] = "1.2V supply sensor", | |
516 | [MC_CMD_SENSOR_IN_1V8] = "1.8V supply sensor", | |
517 | [MC_CMD_SENSOR_IN_2V5] = "2.5V supply sensor", | |
518 | [MC_CMD_SENSOR_IN_3V3] = "3.3V supply sensor", | |
519 | [MC_CMD_SENSOR_IN_12V0] = "12V supply sensor" | |
520 | }; | |
521 | ||
522 | static const char *sensor_status_names[] = { | |
523 | [MC_CMD_SENSOR_STATE_OK] = "OK", | |
524 | [MC_CMD_SENSOR_STATE_WARNING] = "Warning", | |
525 | [MC_CMD_SENSOR_STATE_FATAL] = "Fatal", | |
526 | [MC_CMD_SENSOR_STATE_BROKEN] = "Device failure", | |
527 | }; | |
528 | ||
529 | static void efx_mcdi_sensor_event(struct efx_nic *efx, efx_qword_t *ev) | |
530 | { | |
531 | unsigned int monitor, state, value; | |
532 | const char *name, *state_txt; | |
533 | monitor = EFX_QWORD_FIELD(*ev, MCDI_EVENT_SENSOREVT_MONITOR); | |
534 | state = EFX_QWORD_FIELD(*ev, MCDI_EVENT_SENSOREVT_STATE); | |
535 | value = EFX_QWORD_FIELD(*ev, MCDI_EVENT_SENSOREVT_VALUE); | |
536 | /* Deal gracefully with the board having more drivers than we | |
537 | * know about, but do not expect new sensor states. */ | |
538 | name = (monitor >= ARRAY_SIZE(sensor_names)) | |
539 | ? "No sensor name available" : | |
540 | sensor_names[monitor]; | |
541 | EFX_BUG_ON_PARANOID(state >= ARRAY_SIZE(sensor_status_names)); | |
542 | state_txt = sensor_status_names[state]; | |
543 | ||
62776d03 BH |
544 | netif_err(efx, hw, efx->net_dev, |
545 | "Sensor %d (%s) reports condition '%s' for raw value %d\n", | |
546 | monitor, name, state_txt, value); | |
afd4aea0 BH |
547 | } |
548 | ||
549 | /* Called from falcon_process_eventq for MCDI events */ | |
550 | void efx_mcdi_process_event(struct efx_channel *channel, | |
551 | efx_qword_t *event) | |
552 | { | |
553 | struct efx_nic *efx = channel->efx; | |
554 | int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE); | |
555 | u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA); | |
556 | ||
557 | switch (code) { | |
558 | case MCDI_EVENT_CODE_BADSSERT: | |
62776d03 BH |
559 | netif_err(efx, hw, efx->net_dev, |
560 | "MC watchdog or assertion failure at 0x%x\n", data); | |
afd4aea0 BH |
561 | efx_mcdi_ev_death(efx, EINTR); |
562 | break; | |
563 | ||
564 | case MCDI_EVENT_CODE_PMNOTICE: | |
62776d03 | 565 | netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n"); |
afd4aea0 BH |
566 | break; |
567 | ||
568 | case MCDI_EVENT_CODE_CMDDONE: | |
569 | efx_mcdi_ev_cpl(efx, | |
570 | MCDI_EVENT_FIELD(*event, CMDDONE_SEQ), | |
571 | MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN), | |
572 | MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO)); | |
573 | break; | |
574 | ||
575 | case MCDI_EVENT_CODE_LINKCHANGE: | |
576 | efx_mcdi_process_link_change(efx, event); | |
577 | break; | |
578 | case MCDI_EVENT_CODE_SENSOREVT: | |
579 | efx_mcdi_sensor_event(efx, event); | |
580 | break; | |
581 | case MCDI_EVENT_CODE_SCHEDERR: | |
62776d03 BH |
582 | netif_info(efx, hw, efx->net_dev, |
583 | "MC Scheduler error address=0x%x\n", data); | |
afd4aea0 BH |
584 | break; |
585 | case MCDI_EVENT_CODE_REBOOT: | |
62776d03 | 586 | netif_info(efx, hw, efx->net_dev, "MC Reboot\n"); |
afd4aea0 BH |
587 | efx_mcdi_ev_death(efx, EIO); |
588 | break; | |
589 | case MCDI_EVENT_CODE_MAC_STATS_DMA: | |
590 | /* MAC stats are gather lazily. We can ignore this. */ | |
591 | break; | |
592 | ||
593 | default: | |
62776d03 BH |
594 | netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n", |
595 | code); | |
afd4aea0 BH |
596 | } |
597 | } | |
598 | ||
599 | /************************************************************************** | |
600 | * | |
601 | * Specific request functions | |
602 | * | |
603 | ************************************************************************** | |
604 | */ | |
605 | ||
e5f0fd27 | 606 | void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len) |
afd4aea0 BH |
607 | { |
608 | u8 outbuf[ALIGN(MC_CMD_GET_VERSION_V1_OUT_LEN, 4)]; | |
609 | size_t outlength; | |
610 | const __le16 *ver_words; | |
611 | int rc; | |
612 | ||
613 | BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0); | |
614 | ||
615 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0, | |
616 | outbuf, sizeof(outbuf), &outlength); | |
617 | if (rc) | |
618 | goto fail; | |
619 | ||
afd4aea0 | 620 | if (outlength < MC_CMD_GET_VERSION_V1_OUT_LEN) { |
00bbb4a5 | 621 | rc = -EIO; |
afd4aea0 BH |
622 | goto fail; |
623 | } | |
624 | ||
625 | ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION); | |
e5f0fd27 BH |
626 | snprintf(buf, len, "%u.%u.%u.%u", |
627 | le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]), | |
628 | le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3])); | |
629 | return; | |
afd4aea0 BH |
630 | |
631 | fail: | |
62776d03 | 632 | netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
e5f0fd27 | 633 | buf[0] = 0; |
afd4aea0 BH |
634 | } |
635 | ||
636 | int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating, | |
637 | bool *was_attached) | |
638 | { | |
639 | u8 inbuf[MC_CMD_DRV_ATTACH_IN_LEN]; | |
640 | u8 outbuf[MC_CMD_DRV_ATTACH_OUT_LEN]; | |
641 | size_t outlen; | |
642 | int rc; | |
643 | ||
644 | MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE, | |
645 | driver_operating ? 1 : 0); | |
646 | MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1); | |
647 | ||
648 | rc = efx_mcdi_rpc(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf), | |
649 | outbuf, sizeof(outbuf), &outlen); | |
650 | if (rc) | |
651 | goto fail; | |
00bbb4a5 BH |
652 | if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) { |
653 | rc = -EIO; | |
afd4aea0 | 654 | goto fail; |
00bbb4a5 | 655 | } |
afd4aea0 BH |
656 | |
657 | if (was_attached != NULL) | |
658 | *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE); | |
659 | return 0; | |
660 | ||
661 | fail: | |
62776d03 | 662 | netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
663 | return rc; |
664 | } | |
665 | ||
666 | int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address, | |
667 | u16 *fw_subtype_list) | |
668 | { | |
669 | uint8_t outbuf[MC_CMD_GET_BOARD_CFG_OUT_LEN]; | |
670 | size_t outlen; | |
671 | int port_num = efx_port_num(efx); | |
672 | int offset; | |
673 | int rc; | |
674 | ||
675 | BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0); | |
676 | ||
677 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0, | |
678 | outbuf, sizeof(outbuf), &outlen); | |
679 | if (rc) | |
680 | goto fail; | |
681 | ||
682 | if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LEN) { | |
00bbb4a5 | 683 | rc = -EIO; |
afd4aea0 BH |
684 | goto fail; |
685 | } | |
686 | ||
687 | offset = (port_num) | |
688 | ? MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST | |
689 | : MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST; | |
690 | if (mac_address) | |
691 | memcpy(mac_address, outbuf + offset, ETH_ALEN); | |
692 | if (fw_subtype_list) | |
693 | memcpy(fw_subtype_list, | |
694 | outbuf + MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST, | |
695 | MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_LEN); | |
696 | ||
697 | return 0; | |
698 | ||
699 | fail: | |
62776d03 BH |
700 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n", |
701 | __func__, rc, (int)outlen); | |
afd4aea0 BH |
702 | |
703 | return rc; | |
704 | } | |
705 | ||
706 | int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq) | |
707 | { | |
708 | u8 inbuf[MC_CMD_LOG_CTRL_IN_LEN]; | |
709 | u32 dest = 0; | |
710 | int rc; | |
711 | ||
712 | if (uart) | |
713 | dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART; | |
714 | if (evq) | |
715 | dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ; | |
716 | ||
717 | MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest); | |
718 | MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq); | |
719 | ||
720 | BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0); | |
721 | ||
722 | rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf), | |
723 | NULL, 0, NULL); | |
724 | if (rc) | |
725 | goto fail; | |
726 | ||
727 | return 0; | |
728 | ||
729 | fail: | |
62776d03 | 730 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
731 | return rc; |
732 | } | |
733 | ||
734 | int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out) | |
735 | { | |
736 | u8 outbuf[MC_CMD_NVRAM_TYPES_OUT_LEN]; | |
737 | size_t outlen; | |
738 | int rc; | |
739 | ||
740 | BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0); | |
741 | ||
742 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0, | |
743 | outbuf, sizeof(outbuf), &outlen); | |
744 | if (rc) | |
745 | goto fail; | |
00bbb4a5 BH |
746 | if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) { |
747 | rc = -EIO; | |
afd4aea0 | 748 | goto fail; |
00bbb4a5 | 749 | } |
afd4aea0 BH |
750 | |
751 | *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES); | |
752 | return 0; | |
753 | ||
754 | fail: | |
62776d03 BH |
755 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", |
756 | __func__, rc); | |
afd4aea0 BH |
757 | return rc; |
758 | } | |
759 | ||
760 | int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type, | |
761 | size_t *size_out, size_t *erase_size_out, | |
762 | bool *protected_out) | |
763 | { | |
764 | u8 inbuf[MC_CMD_NVRAM_INFO_IN_LEN]; | |
765 | u8 outbuf[MC_CMD_NVRAM_INFO_OUT_LEN]; | |
766 | size_t outlen; | |
767 | int rc; | |
768 | ||
769 | MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type); | |
770 | ||
771 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf), | |
772 | outbuf, sizeof(outbuf), &outlen); | |
773 | if (rc) | |
774 | goto fail; | |
00bbb4a5 BH |
775 | if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) { |
776 | rc = -EIO; | |
afd4aea0 | 777 | goto fail; |
00bbb4a5 | 778 | } |
afd4aea0 BH |
779 | |
780 | *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE); | |
781 | *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE); | |
782 | *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) & | |
783 | (1 << MC_CMD_NVRAM_PROTECTED_LBN)); | |
784 | return 0; | |
785 | ||
786 | fail: | |
62776d03 | 787 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
788 | return rc; |
789 | } | |
790 | ||
791 | int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type) | |
792 | { | |
793 | u8 inbuf[MC_CMD_NVRAM_UPDATE_START_IN_LEN]; | |
794 | int rc; | |
795 | ||
796 | MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type); | |
797 | ||
798 | BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0); | |
799 | ||
800 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf), | |
801 | NULL, 0, NULL); | |
802 | if (rc) | |
803 | goto fail; | |
804 | ||
805 | return 0; | |
806 | ||
807 | fail: | |
62776d03 | 808 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
809 | return rc; |
810 | } | |
811 | ||
812 | int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type, | |
813 | loff_t offset, u8 *buffer, size_t length) | |
814 | { | |
815 | u8 inbuf[MC_CMD_NVRAM_READ_IN_LEN]; | |
5a27e86b | 816 | u8 outbuf[MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX)]; |
afd4aea0 BH |
817 | size_t outlen; |
818 | int rc; | |
819 | ||
820 | MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type); | |
821 | MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset); | |
822 | MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length); | |
823 | ||
824 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf), | |
825 | outbuf, sizeof(outbuf), &outlen); | |
826 | if (rc) | |
827 | goto fail; | |
828 | ||
829 | memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length); | |
830 | return 0; | |
831 | ||
832 | fail: | |
62776d03 | 833 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
834 | return rc; |
835 | } | |
836 | ||
837 | int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type, | |
838 | loff_t offset, const u8 *buffer, size_t length) | |
839 | { | |
5a27e86b | 840 | u8 inbuf[MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX)]; |
afd4aea0 BH |
841 | int rc; |
842 | ||
843 | MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type); | |
844 | MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset); | |
845 | MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length); | |
846 | memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length); | |
847 | ||
848 | BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0); | |
849 | ||
5a27e86b BH |
850 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf, |
851 | ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4), | |
afd4aea0 BH |
852 | NULL, 0, NULL); |
853 | if (rc) | |
854 | goto fail; | |
855 | ||
856 | return 0; | |
857 | ||
858 | fail: | |
62776d03 | 859 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
860 | return rc; |
861 | } | |
862 | ||
863 | int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type, | |
864 | loff_t offset, size_t length) | |
865 | { | |
866 | u8 inbuf[MC_CMD_NVRAM_ERASE_IN_LEN]; | |
867 | int rc; | |
868 | ||
869 | MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type); | |
870 | MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset); | |
871 | MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length); | |
872 | ||
873 | BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0); | |
874 | ||
875 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf), | |
876 | NULL, 0, NULL); | |
877 | if (rc) | |
878 | goto fail; | |
879 | ||
880 | return 0; | |
881 | ||
882 | fail: | |
62776d03 | 883 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
884 | return rc; |
885 | } | |
886 | ||
887 | int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type) | |
888 | { | |
889 | u8 inbuf[MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN]; | |
890 | int rc; | |
891 | ||
892 | MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type); | |
893 | ||
894 | BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0); | |
895 | ||
896 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf), | |
897 | NULL, 0, NULL); | |
898 | if (rc) | |
899 | goto fail; | |
900 | ||
901 | return 0; | |
902 | ||
903 | fail: | |
62776d03 | 904 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
905 | return rc; |
906 | } | |
907 | ||
2e803407 BH |
908 | static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type) |
909 | { | |
910 | u8 inbuf[MC_CMD_NVRAM_TEST_IN_LEN]; | |
911 | u8 outbuf[MC_CMD_NVRAM_TEST_OUT_LEN]; | |
912 | int rc; | |
913 | ||
914 | MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type); | |
915 | ||
916 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf), | |
917 | outbuf, sizeof(outbuf), NULL); | |
918 | if (rc) | |
919 | return rc; | |
920 | ||
921 | switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) { | |
922 | case MC_CMD_NVRAM_TEST_PASS: | |
923 | case MC_CMD_NVRAM_TEST_NOTSUPP: | |
924 | return 0; | |
925 | default: | |
926 | return -EIO; | |
927 | } | |
928 | } | |
929 | ||
930 | int efx_mcdi_nvram_test_all(struct efx_nic *efx) | |
931 | { | |
932 | u32 nvram_types; | |
933 | unsigned int type; | |
934 | int rc; | |
935 | ||
936 | rc = efx_mcdi_nvram_types(efx, &nvram_types); | |
937 | if (rc) | |
b548a988 | 938 | goto fail1; |
2e803407 BH |
939 | |
940 | type = 0; | |
941 | while (nvram_types != 0) { | |
942 | if (nvram_types & 1) { | |
943 | rc = efx_mcdi_nvram_test(efx, type); | |
944 | if (rc) | |
b548a988 | 945 | goto fail2; |
2e803407 BH |
946 | } |
947 | type++; | |
948 | nvram_types >>= 1; | |
949 | } | |
950 | ||
951 | return 0; | |
b548a988 BH |
952 | |
953 | fail2: | |
62776d03 BH |
954 | netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n", |
955 | __func__, type); | |
b548a988 | 956 | fail1: |
62776d03 | 957 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
b548a988 | 958 | return rc; |
2e803407 BH |
959 | } |
960 | ||
8b2103ad | 961 | static int efx_mcdi_read_assertion(struct efx_nic *efx) |
afd4aea0 | 962 | { |
8b2103ad SH |
963 | u8 inbuf[MC_CMD_GET_ASSERTS_IN_LEN]; |
964 | u8 outbuf[MC_CMD_GET_ASSERTS_OUT_LEN]; | |
afd4aea0 BH |
965 | unsigned int flags, index, ofst; |
966 | const char *reason; | |
967 | size_t outlen; | |
968 | int retry; | |
969 | int rc; | |
970 | ||
8b2103ad SH |
971 | /* Attempt to read any stored assertion state before we reboot |
972 | * the mcfw out of the assertion handler. Retry twice, once | |
afd4aea0 BH |
973 | * because a boot-time assertion might cause this command to fail |
974 | * with EINTR. And once again because GET_ASSERTS can race with | |
975 | * MC_CMD_REBOOT running on the other port. */ | |
976 | retry = 2; | |
977 | do { | |
8b2103ad | 978 | MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1); |
afd4aea0 | 979 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_ASSERTS, |
8b2103ad SH |
980 | inbuf, MC_CMD_GET_ASSERTS_IN_LEN, |
981 | outbuf, sizeof(outbuf), &outlen); | |
afd4aea0 BH |
982 | } while ((rc == -EINTR || rc == -EIO) && retry-- > 0); |
983 | ||
984 | if (rc) | |
985 | return rc; | |
986 | if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN) | |
00bbb4a5 | 987 | return -EIO; |
afd4aea0 | 988 | |
8b2103ad SH |
989 | /* Print out any recorded assertion state */ |
990 | flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS); | |
afd4aea0 BH |
991 | if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS) |
992 | return 0; | |
993 | ||
afd4aea0 BH |
994 | reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL) |
995 | ? "system-level assertion" | |
996 | : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL) | |
997 | ? "thread-level assertion" | |
998 | : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED) | |
999 | ? "watchdog reset" | |
1000 | : "unknown assertion"; | |
62776d03 BH |
1001 | netif_err(efx, hw, efx->net_dev, |
1002 | "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason, | |
1003 | MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS), | |
1004 | MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS)); | |
afd4aea0 BH |
1005 | |
1006 | /* Print out the registers */ | |
1007 | ofst = MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_OFST; | |
1008 | for (index = 1; index < 32; index++) { | |
62776d03 | 1009 | netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n", index, |
8b2103ad | 1010 | MCDI_DWORD2(outbuf, ofst)); |
afd4aea0 BH |
1011 | ofst += sizeof(efx_dword_t); |
1012 | } | |
1013 | ||
1014 | return 0; | |
1015 | } | |
1016 | ||
8b2103ad SH |
1017 | static void efx_mcdi_exit_assertion(struct efx_nic *efx) |
1018 | { | |
1019 | u8 inbuf[MC_CMD_REBOOT_IN_LEN]; | |
1020 | ||
1021 | /* Atomically reboot the mcfw out of the assertion handler */ | |
1022 | BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0); | |
1023 | MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, | |
1024 | MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION); | |
1025 | efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN, | |
1026 | NULL, 0, NULL); | |
1027 | } | |
1028 | ||
1029 | int efx_mcdi_handle_assertion(struct efx_nic *efx) | |
1030 | { | |
1031 | int rc; | |
1032 | ||
1033 | rc = efx_mcdi_read_assertion(efx); | |
1034 | if (rc) | |
1035 | return rc; | |
1036 | ||
1037 | efx_mcdi_exit_assertion(efx); | |
1038 | ||
1039 | return 0; | |
1040 | } | |
1041 | ||
afd4aea0 BH |
1042 | void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode) |
1043 | { | |
1044 | u8 inbuf[MC_CMD_SET_ID_LED_IN_LEN]; | |
1045 | int rc; | |
1046 | ||
1047 | BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF); | |
1048 | BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON); | |
1049 | BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT); | |
1050 | ||
1051 | BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0); | |
1052 | ||
1053 | MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode); | |
1054 | ||
1055 | rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf), | |
1056 | NULL, 0, NULL); | |
1057 | if (rc) | |
62776d03 BH |
1058 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", |
1059 | __func__, rc); | |
afd4aea0 BH |
1060 | } |
1061 | ||
1062 | int efx_mcdi_reset_port(struct efx_nic *efx) | |
1063 | { | |
1064 | int rc = efx_mcdi_rpc(efx, MC_CMD_PORT_RESET, NULL, 0, NULL, 0, NULL); | |
1065 | if (rc) | |
62776d03 BH |
1066 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", |
1067 | __func__, rc); | |
afd4aea0 BH |
1068 | return rc; |
1069 | } | |
1070 | ||
1071 | int efx_mcdi_reset_mc(struct efx_nic *efx) | |
1072 | { | |
1073 | u8 inbuf[MC_CMD_REBOOT_IN_LEN]; | |
1074 | int rc; | |
1075 | ||
1076 | BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0); | |
1077 | MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0); | |
1078 | rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf), | |
1079 | NULL, 0, NULL); | |
1080 | /* White is black, and up is down */ | |
1081 | if (rc == -EIO) | |
1082 | return 0; | |
1083 | if (rc == 0) | |
1084 | rc = -EIO; | |
62776d03 | 1085 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
1086 | return rc; |
1087 | } | |
1088 | ||
d215697f | 1089 | static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type, |
1090 | const u8 *mac, int *id_out) | |
afd4aea0 BH |
1091 | { |
1092 | u8 inbuf[MC_CMD_WOL_FILTER_SET_IN_LEN]; | |
1093 | u8 outbuf[MC_CMD_WOL_FILTER_SET_OUT_LEN]; | |
1094 | size_t outlen; | |
1095 | int rc; | |
1096 | ||
1097 | MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type); | |
1098 | MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE, | |
1099 | MC_CMD_FILTER_MODE_SIMPLE); | |
1100 | memcpy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac, ETH_ALEN); | |
1101 | ||
1102 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf), | |
1103 | outbuf, sizeof(outbuf), &outlen); | |
1104 | if (rc) | |
1105 | goto fail; | |
1106 | ||
1107 | if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) { | |
00bbb4a5 | 1108 | rc = -EIO; |
afd4aea0 BH |
1109 | goto fail; |
1110 | } | |
1111 | ||
1112 | *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID); | |
1113 | ||
1114 | return 0; | |
1115 | ||
1116 | fail: | |
1117 | *id_out = -1; | |
62776d03 | 1118 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
1119 | return rc; |
1120 | ||
1121 | } | |
1122 | ||
1123 | ||
1124 | int | |
1125 | efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out) | |
1126 | { | |
1127 | return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out); | |
1128 | } | |
1129 | ||
1130 | ||
1131 | int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out) | |
1132 | { | |
1133 | u8 outbuf[MC_CMD_WOL_FILTER_GET_OUT_LEN]; | |
1134 | size_t outlen; | |
1135 | int rc; | |
1136 | ||
1137 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0, | |
1138 | outbuf, sizeof(outbuf), &outlen); | |
1139 | if (rc) | |
1140 | goto fail; | |
1141 | ||
1142 | if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) { | |
00bbb4a5 | 1143 | rc = -EIO; |
afd4aea0 BH |
1144 | goto fail; |
1145 | } | |
1146 | ||
1147 | *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID); | |
1148 | ||
1149 | return 0; | |
1150 | ||
1151 | fail: | |
1152 | *id_out = -1; | |
62776d03 | 1153 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
1154 | return rc; |
1155 | } | |
1156 | ||
1157 | ||
1158 | int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id) | |
1159 | { | |
1160 | u8 inbuf[MC_CMD_WOL_FILTER_REMOVE_IN_LEN]; | |
1161 | int rc; | |
1162 | ||
1163 | MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id); | |
1164 | ||
1165 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf), | |
1166 | NULL, 0, NULL); | |
1167 | if (rc) | |
1168 | goto fail; | |
1169 | ||
1170 | return 0; | |
1171 | ||
1172 | fail: | |
62776d03 | 1173 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
1174 | return rc; |
1175 | } | |
1176 | ||
1177 | ||
1178 | int efx_mcdi_wol_filter_reset(struct efx_nic *efx) | |
1179 | { | |
1180 | int rc; | |
1181 | ||
1182 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL); | |
1183 | if (rc) | |
1184 | goto fail; | |
1185 | ||
1186 | return 0; | |
1187 | ||
1188 | fail: | |
62776d03 | 1189 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
1190 | return rc; |
1191 | } | |
1192 |