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8ceee660 BH |
1 | /**************************************************************************** |
2 | * Driver for Solarflare Solarstorm network controllers and boards | |
3 | * Copyright 2005-2006 Fen Systems Ltd. | |
906bb26c | 4 | * Copyright 2006-2009 Solarflare Communications Inc. |
8ceee660 BH |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License version 2 as published | |
8 | * by the Free Software Foundation, incorporated herein by reference. | |
9 | */ | |
10 | ||
744093c9 BH |
11 | #ifndef EFX_NIC_H |
12 | #define EFX_NIC_H | |
8ceee660 | 13 | |
5c16a96c | 14 | #include <linux/i2c-algo-bit.h> |
8ceee660 | 15 | #include "net_driver.h" |
177dfcd8 | 16 | #include "efx.h" |
8880f4ec | 17 | #include "mcdi.h" |
8ceee660 BH |
18 | |
19 | /* | |
20 | * Falcon hardware control | |
21 | */ | |
22 | ||
daeda630 BH |
23 | enum { |
24 | EFX_REV_FALCON_A0 = 0, | |
25 | EFX_REV_FALCON_A1 = 1, | |
26 | EFX_REV_FALCON_B0 = 2, | |
8880f4ec | 27 | EFX_REV_SIENA_A0 = 3, |
8ceee660 BH |
28 | }; |
29 | ||
daeda630 | 30 | static inline int efx_nic_rev(struct efx_nic *efx) |
55668611 | 31 | { |
daeda630 | 32 | return efx->type->revision; |
55668611 | 33 | } |
8ceee660 | 34 | |
152b6a62 BH |
35 | extern u32 efx_nic_fpga_ver(struct efx_nic *efx); |
36 | ||
8880f4ec BH |
37 | static inline bool efx_nic_has_mc(struct efx_nic *efx) |
38 | { | |
39 | return efx_nic_rev(efx) >= EFX_REV_SIENA_A0; | |
40 | } | |
152b6a62 BH |
41 | /* NIC has two interlinked PCI functions for the same port. */ |
42 | static inline bool efx_nic_is_dual_func(struct efx_nic *efx) | |
43 | { | |
44 | return efx_nic_rev(efx) < EFX_REV_FALCON_B0; | |
45 | } | |
46 | ||
c1c4f453 BH |
47 | enum { |
48 | PHY_TYPE_NONE = 0, | |
49 | PHY_TYPE_TXC43128 = 1, | |
50 | PHY_TYPE_88E1111 = 2, | |
51 | PHY_TYPE_SFX7101 = 3, | |
52 | PHY_TYPE_QT2022C2 = 4, | |
53 | PHY_TYPE_PM8358 = 6, | |
54 | PHY_TYPE_SFT9001A = 8, | |
55 | PHY_TYPE_QT2025C = 9, | |
56 | PHY_TYPE_SFT9001B = 10, | |
57 | }; | |
58 | ||
59 | #define FALCON_XMAC_LOOPBACKS \ | |
60 | ((1 << LOOPBACK_XGMII) | \ | |
61 | (1 << LOOPBACK_XGXS) | \ | |
62 | (1 << LOOPBACK_XAUI)) | |
63 | ||
64 | #define FALCON_GMAC_LOOPBACKS \ | |
65 | (1 << LOOPBACK_GMAC) | |
66 | ||
3759433d | 67 | /** |
44838a44 BH |
68 | * struct falcon_board_type - board operations and type information |
69 | * @id: Board type id, as found in NVRAM | |
70 | * @ref_model: Model number of Solarflare reference design | |
71 | * @gen_type: Generic board type description | |
3759433d BH |
72 | * @init: Allocate resources and initialise peripheral hardware |
73 | * @init_phy: Do board-specific PHY initialisation | |
44838a44 | 74 | * @fini: Shut down hardware and free resources |
3759433d BH |
75 | * @set_id_led: Set state of identifying LED or revert to automatic function |
76 | * @monitor: Board-specific health check function | |
44838a44 BH |
77 | */ |
78 | struct falcon_board_type { | |
79 | u8 id; | |
80 | const char *ref_model; | |
81 | const char *gen_type; | |
82 | int (*init) (struct efx_nic *nic); | |
83 | void (*init_phy) (struct efx_nic *efx); | |
84 | void (*fini) (struct efx_nic *nic); | |
85 | void (*set_id_led) (struct efx_nic *efx, enum efx_led_mode mode); | |
86 | int (*monitor) (struct efx_nic *nic); | |
87 | }; | |
88 | ||
89 | /** | |
90 | * struct falcon_board - board information | |
91 | * @type: Type of board | |
92 | * @major: Major rev. ('A', 'B' ...) | |
93 | * @minor: Minor rev. (0, 1, ...) | |
e775fb93 BH |
94 | * @i2c_adap: I2C adapter for on-board peripherals |
95 | * @i2c_data: Data for bit-banging algorithm | |
3759433d BH |
96 | * @hwmon_client: I2C client for hardware monitor |
97 | * @ioexp_client: I2C client for power/port control | |
98 | */ | |
99 | struct falcon_board { | |
44838a44 | 100 | const struct falcon_board_type *type; |
3759433d BH |
101 | int major; |
102 | int minor; | |
e775fb93 BH |
103 | struct i2c_adapter i2c_adap; |
104 | struct i2c_algo_bit_data i2c_data; | |
3759433d BH |
105 | struct i2c_client *hwmon_client, *ioexp_client; |
106 | }; | |
107 | ||
5c16a96c BH |
108 | /** |
109 | * struct falcon_nic_data - Falcon NIC state | |
8986352a | 110 | * @pci_dev2: Secondary function of Falcon A |
3759433d | 111 | * @board: Board state and functions |
55edc6e6 BH |
112 | * @stats_disable_count: Nest count for disabling statistics fetches |
113 | * @stats_pending: Is there a pending DMA of MAC statistics. | |
114 | * @stats_timer: A timer for regularly fetching MAC statistics. | |
115 | * @stats_dma_done: Pointer to the flag which indicates DMA completion. | |
5c16a96c BH |
116 | */ |
117 | struct falcon_nic_data { | |
118 | struct pci_dev *pci_dev2; | |
3759433d | 119 | struct falcon_board board; |
55edc6e6 BH |
120 | unsigned int stats_disable_count; |
121 | bool stats_pending; | |
122 | struct timer_list stats_timer; | |
123 | u32 *stats_dma_done; | |
5c16a96c BH |
124 | }; |
125 | ||
278c0621 BH |
126 | static inline struct falcon_board *falcon_board(struct efx_nic *efx) |
127 | { | |
3759433d BH |
128 | struct falcon_nic_data *data = efx->nic_data; |
129 | return &data->board; | |
278c0621 BH |
130 | } |
131 | ||
8880f4ec BH |
132 | /** |
133 | * struct siena_nic_data - Siena NIC state | |
134 | * @fw_version: Management controller firmware version | |
135 | * @fw_build: Firmware build number | |
136 | * @mcdi: Management-Controller-to-Driver Interface | |
137 | * @wol_filter_id: Wake-on-LAN packet filter id | |
d614cfbc | 138 | * @ipv6_rss_key: Toeplitz hash key for IPv6 RSS |
8880f4ec BH |
139 | */ |
140 | struct siena_nic_data { | |
141 | u64 fw_version; | |
142 | u32 fw_build; | |
143 | struct efx_mcdi_iface mcdi; | |
144 | int wol_filter_id; | |
145 | }; | |
146 | ||
147 | extern void siena_print_fwver(struct efx_nic *efx, char *buf, size_t len); | |
148 | ||
daeda630 BH |
149 | extern struct efx_nic_type falcon_a1_nic_type; |
150 | extern struct efx_nic_type falcon_b0_nic_type; | |
8880f4ec | 151 | extern struct efx_nic_type siena_a0_nic_type; |
8ceee660 BH |
152 | |
153 | /************************************************************************** | |
154 | * | |
155 | * Externs | |
156 | * | |
157 | ************************************************************************** | |
158 | */ | |
159 | ||
e41c11ee | 160 | extern int falcon_probe_board(struct efx_nic *efx, u16 revision_info); |
5087b54d | 161 | |
8ceee660 | 162 | /* TX data path */ |
152b6a62 BH |
163 | extern int efx_nic_probe_tx(struct efx_tx_queue *tx_queue); |
164 | extern void efx_nic_init_tx(struct efx_tx_queue *tx_queue); | |
165 | extern void efx_nic_fini_tx(struct efx_tx_queue *tx_queue); | |
166 | extern void efx_nic_remove_tx(struct efx_tx_queue *tx_queue); | |
167 | extern void efx_nic_push_buffers(struct efx_tx_queue *tx_queue); | |
8ceee660 BH |
168 | |
169 | /* RX data path */ | |
152b6a62 BH |
170 | extern int efx_nic_probe_rx(struct efx_rx_queue *rx_queue); |
171 | extern void efx_nic_init_rx(struct efx_rx_queue *rx_queue); | |
172 | extern void efx_nic_fini_rx(struct efx_rx_queue *rx_queue); | |
173 | extern void efx_nic_remove_rx(struct efx_rx_queue *rx_queue); | |
174 | extern void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue); | |
8ceee660 BH |
175 | |
176 | /* Event data path */ | |
152b6a62 BH |
177 | extern int efx_nic_probe_eventq(struct efx_channel *channel); |
178 | extern void efx_nic_init_eventq(struct efx_channel *channel); | |
179 | extern void efx_nic_fini_eventq(struct efx_channel *channel); | |
180 | extern void efx_nic_remove_eventq(struct efx_channel *channel); | |
181 | extern int efx_nic_process_eventq(struct efx_channel *channel, int rx_quota); | |
182 | extern void efx_nic_eventq_read_ack(struct efx_channel *channel); | |
8ceee660 | 183 | |
8ceee660 | 184 | /* MAC/PHY */ |
8ceee660 | 185 | extern void falcon_drain_tx_fifo(struct efx_nic *efx); |
8ceee660 | 186 | extern void falcon_reconfigure_mac_wrapper(struct efx_nic *efx); |
152b6a62 | 187 | extern int efx_nic_rx_xoff_thresh, efx_nic_rx_xon_thresh; |
8ceee660 BH |
188 | |
189 | /* Interrupts and test events */ | |
152b6a62 BH |
190 | extern int efx_nic_init_interrupt(struct efx_nic *efx); |
191 | extern void efx_nic_enable_interrupts(struct efx_nic *efx); | |
d730dc52 | 192 | extern void efx_nic_generate_test_event(struct efx_channel *channel); |
90d683af | 193 | extern void efx_nic_generate_fill_event(struct efx_channel *channel); |
152b6a62 BH |
194 | extern void efx_nic_generate_interrupt(struct efx_nic *efx); |
195 | extern void efx_nic_disable_interrupts(struct efx_nic *efx); | |
196 | extern void efx_nic_fini_interrupt(struct efx_nic *efx); | |
197 | extern irqreturn_t efx_nic_fatal_interrupt(struct efx_nic *efx); | |
198 | extern irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id); | |
199 | extern void falcon_irq_ack_a1(struct efx_nic *efx); | |
200 | ||
201 | #define EFX_IRQ_MOD_RESOLUTION 5 | |
6fb70fd1 | 202 | |
8ceee660 | 203 | /* Global Resources */ |
152b6a62 | 204 | extern int efx_nic_flush_queues(struct efx_nic *efx); |
55edc6e6 BH |
205 | extern void falcon_start_nic_stats(struct efx_nic *efx); |
206 | extern void falcon_stop_nic_stats(struct efx_nic *efx); | |
b7b40eeb | 207 | extern void falcon_setup_xaui(struct efx_nic *efx); |
8ceee660 | 208 | extern int falcon_reset_xaui(struct efx_nic *efx); |
152b6a62 | 209 | extern void efx_nic_init_common(struct efx_nic *efx); |
765c9f46 | 210 | extern void efx_nic_push_rx_indir_table(struct efx_nic *efx); |
152b6a62 BH |
211 | |
212 | int efx_nic_alloc_buffer(struct efx_nic *efx, struct efx_buffer *buffer, | |
213 | unsigned int len); | |
214 | void efx_nic_free_buffer(struct efx_nic *efx, struct efx_buffer *buffer); | |
8ceee660 | 215 | |
8c8661e4 | 216 | /* Tests */ |
152b6a62 BH |
217 | struct efx_nic_register_test { |
218 | unsigned address; | |
219 | efx_oword_t mask; | |
220 | }; | |
221 | extern int efx_nic_test_registers(struct efx_nic *efx, | |
222 | const struct efx_nic_register_test *regs, | |
223 | size_t n_regs); | |
8c8661e4 | 224 | |
5b98c1bf BH |
225 | extern size_t efx_nic_get_regs_len(struct efx_nic *efx); |
226 | extern void efx_nic_get_regs(struct efx_nic *efx, void *buf); | |
227 | ||
8ceee660 BH |
228 | /************************************************************************** |
229 | * | |
230 | * Falcon MAC stats | |
231 | * | |
232 | ************************************************************************** | |
233 | */ | |
234 | ||
235 | #define FALCON_STAT_OFFSET(falcon_stat) EFX_VAL(falcon_stat, offset) | |
236 | #define FALCON_STAT_WIDTH(falcon_stat) EFX_VAL(falcon_stat, WIDTH) | |
237 | ||
238 | /* Retrieve statistic from statistics block */ | |
239 | #define FALCON_STAT(efx, falcon_stat, efx_stat) do { \ | |
240 | if (FALCON_STAT_WIDTH(falcon_stat) == 16) \ | |
241 | (efx)->mac_stats.efx_stat += le16_to_cpu( \ | |
242 | *((__force __le16 *) \ | |
243 | (efx->stats_buffer.addr + \ | |
244 | FALCON_STAT_OFFSET(falcon_stat)))); \ | |
245 | else if (FALCON_STAT_WIDTH(falcon_stat) == 32) \ | |
246 | (efx)->mac_stats.efx_stat += le32_to_cpu( \ | |
247 | *((__force __le32 *) \ | |
248 | (efx->stats_buffer.addr + \ | |
249 | FALCON_STAT_OFFSET(falcon_stat)))); \ | |
250 | else \ | |
251 | (efx)->mac_stats.efx_stat += le64_to_cpu( \ | |
252 | *((__force __le64 *) \ | |
253 | (efx->stats_buffer.addr + \ | |
254 | FALCON_STAT_OFFSET(falcon_stat)))); \ | |
255 | } while (0) | |
256 | ||
257 | #define FALCON_MAC_STATS_SIZE 0x100 | |
258 | ||
259 | #define MAC_DATA_LBN 0 | |
260 | #define MAC_DATA_WIDTH 32 | |
261 | ||
152b6a62 BH |
262 | extern void efx_nic_generate_event(struct efx_channel *channel, |
263 | efx_qword_t *event); | |
8ceee660 | 264 | |
9007b9fa BH |
265 | extern void falcon_poll_xmac(struct efx_nic *efx); |
266 | ||
744093c9 | 267 | #endif /* EFX_NIC_H */ |