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1da177e4 1/* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
6aa20a22 2 Copyright 1999 Silicon Integrated System Corporation
d269a69f 3 Revision: 1.08.10 Apr. 2 2006
6aa20a22 4
1da177e4 5 Modified from the driver which is originally written by Donald Becker.
6aa20a22 6
1da177e4
LT
7 This software may be used and distributed according to the terms
8 of the GNU General Public License (GPL), incorporated herein by reference.
9 Drivers based on this skeleton fall under the GPL and must retain
10 the authorship (implicit copyright) notice.
6aa20a22 11
1da177e4
LT
12 References:
13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14 preliminary Rev. 1.0 Jan. 14, 1998
15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16 preliminary Rev. 1.0 Nov. 10, 1998
17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18 preliminary Rev. 1.0 Jan. 18, 1998
19
d269a69f 20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support
ea37ccea 21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support
1da177e4 22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
d269a69f 23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support
1da177e4
LT
24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
6aa20a22 32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
1da177e4
LT
33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E eqaulizer workaround rule
40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
50*/
51
52#include <linux/module.h>
53#include <linux/moduleparam.h>
54#include <linux/kernel.h>
55#include <linux/string.h>
56#include <linux/timer.h>
57#include <linux/errno.h>
58#include <linux/ioport.h>
59#include <linux/slab.h>
60#include <linux/interrupt.h>
61#include <linux/pci.h>
62#include <linux/netdevice.h>
63#include <linux/init.h>
64#include <linux/mii.h>
65#include <linux/etherdevice.h>
66#include <linux/skbuff.h>
67#include <linux/delay.h>
68#include <linux/ethtool.h>
69#include <linux/crc32.h>
70#include <linux/bitops.h>
12b279f9 71#include <linux/dma-mapping.h>
1da177e4
LT
72
73#include <asm/processor.h> /* Processor type for cache alignment. */
74#include <asm/io.h>
75#include <asm/irq.h>
76#include <asm/uaccess.h> /* User space memory access functions */
77
78#include "sis900.h"
79
80#define SIS900_MODULE_NAME "sis900"
d269a69f 81#define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006"
1da177e4
LT
82
83static char version[] __devinitdata =
84KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
85
86static int max_interrupt_work = 40;
87static int multicast_filter_limit = 128;
88
89static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
90
91#define SIS900_DEF_MSG \
92 (NETIF_MSG_DRV | \
93 NETIF_MSG_LINK | \
94 NETIF_MSG_RX_ERR | \
95 NETIF_MSG_TX_ERR)
96
97/* Time in jiffies before concluding the transmitter is hung. */
98#define TX_TIMEOUT (4*HZ)
1da177e4
LT
99
100enum {
101 SIS_900 = 0,
102 SIS_7016
103};
f71e1309 104static const char * card_names[] = {
1da177e4
LT
105 "SiS 900 PCI Fast Ethernet",
106 "SiS 7016 PCI Fast Ethernet"
107};
108static struct pci_device_id sis900_pci_tbl [] = {
109 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
110 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
111 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
112 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
113 {0,}
114};
115MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
116
117static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
118
f71e1309 119static const struct mii_chip_info {
1da177e4
LT
120 const char * name;
121 u16 phy_id0;
122 u16 phy_id1;
123 u8 phy_types;
124#define HOME 0x0001
125#define LAN 0x0002
126#define MIX 0x0003
127#define UNKNOWN 0x0
128} mii_chip_table[] = {
129 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
130 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
d8e95e52 131 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN },
1da177e4 132 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
494aced2 133 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN },
1da177e4
LT
134 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
135 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
136 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
80a8003f 137 { "ICS LAN PHY", 0x0143, 0xBC70, LAN },
1da177e4
LT
138 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
139 { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
140 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
141 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
142 {NULL,},
143};
144
145struct mii_phy {
146 struct mii_phy * next;
147 int phy_addr;
148 u16 phy_id0;
149 u16 phy_id1;
150 u16 status;
151 u8 phy_types;
152};
153
154typedef struct _BufferDesc {
155 u32 link;
156 u32 cmdsts;
157 u32 bufptr;
158} BufferDesc;
159
160struct sis900_private {
161 struct net_device_stats stats;
162 struct pci_dev * pci_dev;
163
164 spinlock_t lock;
165
166 struct mii_phy * mii;
167 struct mii_phy * first_mii; /* record the first mii structure */
168 unsigned int cur_phy;
da369b01 169 struct mii_if_info mii_info;
1da177e4
LT
170
171 struct timer_list timer; /* Link status detection timer. */
172 u8 autong_complete; /* 1: auto-negotiate complete */
173
174 u32 msg_enable;
175
176 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
177 unsigned int cur_tx, dirty_tx;
178
179 /* The saved address of a sent/receive-in-place packet buffer */
180 struct sk_buff *tx_skbuff[NUM_TX_DESC];
181 struct sk_buff *rx_skbuff[NUM_RX_DESC];
182 BufferDesc *tx_ring;
183 BufferDesc *rx_ring;
184
185 dma_addr_t tx_ring_dma;
186 dma_addr_t rx_ring_dma;
187
188 unsigned int tx_full; /* The Tx queue is full. */
189 u8 host_bridge_rev;
190 u8 chipset_rev;
191};
192
193MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
194MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
195MODULE_LICENSE("GPL");
196
197module_param(multicast_filter_limit, int, 0444);
198module_param(max_interrupt_work, int, 0444);
199module_param(sis900_debug, int, 0444);
200MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
201MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
202MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
203
204#ifdef CONFIG_NET_POLL_CONTROLLER
205static void sis900_poll(struct net_device *dev);
206#endif
207static int sis900_open(struct net_device *net_dev);
208static int sis900_mii_probe (struct net_device * net_dev);
209static void sis900_init_rxfilter (struct net_device * net_dev);
210static u16 read_eeprom(long ioaddr, int location);
da369b01 211static int mdio_read(struct net_device *net_dev, int phy_id, int location);
1da177e4
LT
212static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
213static void sis900_timer(unsigned long data);
214static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
215static void sis900_tx_timeout(struct net_device *net_dev);
216static void sis900_init_tx_ring(struct net_device *net_dev);
217static void sis900_init_rx_ring(struct net_device *net_dev);
218static int sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
219static int sis900_rx(struct net_device *net_dev);
220static void sis900_finish_xmit (struct net_device *net_dev);
7d12e780 221static irqreturn_t sis900_interrupt(int irq, void *dev_instance);
1da177e4
LT
222static int sis900_close(struct net_device *net_dev);
223static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
224static struct net_device_stats *sis900_get_stats(struct net_device *net_dev);
225static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
226static void set_rx_mode(struct net_device *net_dev);
227static void sis900_reset(struct net_device *net_dev);
228static void sis630_set_eq(struct net_device *net_dev, u8 revision);
229static int sis900_set_config(struct net_device *dev, struct ifmap *map);
230static u16 sis900_default_phy(struct net_device * net_dev);
231static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
232static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
233static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
234static void sis900_set_mode (long ioaddr, int speed, int duplex);
7282d491 235static const struct ethtool_ops sis900_ethtool_ops;
1da177e4
LT
236
237/**
238 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
239 * @pci_dev: the sis900 pci device
6aa20a22 240 * @net_dev: the net device to get address for
1da177e4
LT
241 *
242 * Older SiS900 and friends, use EEPROM to store MAC address.
243 * MAC address is read from read_eeprom() into @net_dev->dev_addr.
244 */
245
246static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
247{
248 long ioaddr = pci_resource_start(pci_dev, 0);
249 u16 signature;
250 int i;
251
252 /* check to see if we have sane EEPROM */
6aa20a22 253 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
1da177e4 254 if (signature == 0xffff || signature == 0x0000) {
6aa20a22 255 printk (KERN_WARNING "%s: Error EERPOM read %x\n",
1da177e4
LT
256 pci_name(pci_dev), signature);
257 return 0;
258 }
259
260 /* get MAC address from EEPROM */
261 for (i = 0; i < 3; i++)
262 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
263
264 return 1;
265}
266
267/**
268 * sis630e_get_mac_addr - Get MAC address for SiS630E model
269 * @pci_dev: the sis900 pci device
6aa20a22 270 * @net_dev: the net device to get address for
1da177e4
LT
271 *
272 * SiS630E model, use APC CMOS RAM to store MAC address.
273 * APC CMOS RAM is accessed through ISA bridge.
274 * MAC address is read into @net_dev->dev_addr.
275 */
276
277static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,
278 struct net_device *net_dev)
279{
280 struct pci_dev *isa_bridge = NULL;
281 u8 reg;
282 int i;
283
284 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
285 if (!isa_bridge)
286 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
287 if (!isa_bridge) {
288 printk(KERN_WARNING "%s: Can not find ISA bridge\n",
289 pci_name(pci_dev));
290 return 0;
291 }
292 pci_read_config_byte(isa_bridge, 0x48, &reg);
293 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
294
295 for (i = 0; i < 6; i++) {
296 outb(0x09 + i, 0x70);
6aa20a22 297 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
1da177e4
LT
298 }
299 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
300 pci_dev_put(isa_bridge);
301
302 return 1;
303}
304
305
306/**
307 * sis635_get_mac_addr - Get MAC address for SIS635 model
308 * @pci_dev: the sis900 pci device
6aa20a22 309 * @net_dev: the net device to get address for
1da177e4
LT
310 *
311 * SiS635 model, set MAC Reload Bit to load Mac address from APC
6aa20a22 312 * to rfdr. rfdr is accessed through rfcr. MAC address is read into
1da177e4
LT
313 * @net_dev->dev_addr.
314 */
315
316static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
317 struct net_device *net_dev)
318{
319 long ioaddr = net_dev->base_addr;
320 u32 rfcrSave;
321 u32 i;
322
323 rfcrSave = inl(rfcr + ioaddr);
324
325 outl(rfcrSave | RELOAD, ioaddr + cr);
326 outl(0, ioaddr + cr);
327
328 /* disable packet filtering before setting filter */
329 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
330
331 /* load MAC addr to filter data register */
332 for (i = 0 ; i < 3 ; i++) {
333 outl((i << RFADDR_shift), ioaddr + rfcr);
334 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
335 }
336
337 /* enable packet filtering */
338 outl(rfcrSave | RFEN, rfcr + ioaddr);
339
340 return 1;
341}
342
343/**
344 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
345 * @pci_dev: the sis900 pci device
6aa20a22 346 * @net_dev: the net device to get address for
1da177e4 347 *
6aa20a22 348 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
1da177e4 349 * is shared by
6aa20a22
JG
350 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
351 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
1da177e4 352 * by LAN, otherwise is not. After MAC address is read from EEPROM, send
6aa20a22
JG
353 * EEDONE signal to refuse EEPROM access by LAN.
354 * The EEPROM map of SiS962 or SiS963 is different to SiS900.
355 * The signature field in SiS962 or SiS963 spec is meaningless.
1da177e4
LT
356 * MAC address is read into @net_dev->dev_addr.
357 */
358
359static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
360 struct net_device *net_dev)
361{
362 long ioaddr = net_dev->base_addr;
363 long ee_addr = ioaddr + mear;
364 u32 waittime = 0;
365 int i;
6aa20a22 366
1da177e4
LT
367 outl(EEREQ, ee_addr);
368 while(waittime < 2000) {
369 if(inl(ee_addr) & EEGNT) {
370
371 /* get MAC address from EEPROM */
372 for (i = 0; i < 3; i++)
373 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
374
375 outl(EEDONE, ee_addr);
376 return 1;
377 } else {
6aa20a22 378 udelay(1);
1da177e4
LT
379 waittime ++;
380 }
381 }
382 outl(EEDONE, ee_addr);
383 return 0;
384}
385
386/**
387 * sis900_probe - Probe for sis900 device
388 * @pci_dev: the sis900 pci device
389 * @pci_id: the pci device ID
390 *
391 * Check and probe sis900 net device for @pci_dev.
6aa20a22 392 * Get mac address according to the chip revision,
1da177e4
LT
393 * and assign SiS900-specific entries in the device structure.
394 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
395 */
396
397static int __devinit sis900_probe(struct pci_dev *pci_dev,
398 const struct pci_device_id *pci_id)
399{
400 struct sis900_private *sis_priv;
401 struct net_device *net_dev;
402 struct pci_dev *dev;
403 dma_addr_t ring_dma;
404 void *ring_space;
405 long ioaddr;
406 int i, ret;
f71e1309 407 const char *card_name = card_names[pci_id->driver_data];
1da177e4
LT
408 const char *dev_name = pci_name(pci_dev);
409
410/* when built into the kernel, we only print version if device is found */
411#ifndef MODULE
412 static int printed_version;
413 if (!printed_version++)
414 printk(version);
415#endif
416
417 /* setup various bits in PCI command register */
418 ret = pci_enable_device(pci_dev);
419 if(ret) return ret;
6aa20a22 420
12b279f9 421 i = pci_set_dma_mask(pci_dev, DMA_32BIT_MASK);
1da177e4
LT
422 if(i){
423 printk(KERN_ERR "sis900.c: architecture does not support"
424 "32bit PCI busmaster DMA\n");
425 return i;
426 }
6aa20a22 427
1da177e4 428 pci_set_master(pci_dev);
6aa20a22 429
1da177e4
LT
430 net_dev = alloc_etherdev(sizeof(struct sis900_private));
431 if (!net_dev)
432 return -ENOMEM;
433 SET_MODULE_OWNER(net_dev);
434 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
435
436 /* We do a request_region() to register /proc/ioports info. */
6aa20a22 437 ioaddr = pci_resource_start(pci_dev, 0);
1da177e4
LT
438 ret = pci_request_regions(pci_dev, "sis900");
439 if (ret)
440 goto err_out;
441
442 sis_priv = net_dev->priv;
443 net_dev->base_addr = ioaddr;
444 net_dev->irq = pci_dev->irq;
445 sis_priv->pci_dev = pci_dev;
446 spin_lock_init(&sis_priv->lock);
447
448 pci_set_drvdata(pci_dev, net_dev);
449
450 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
451 if (!ring_space) {
452 ret = -ENOMEM;
453 goto err_out_cleardev;
454 }
455 sis_priv->tx_ring = (BufferDesc *)ring_space;
456 sis_priv->tx_ring_dma = ring_dma;
457
458 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
459 if (!ring_space) {
460 ret = -ENOMEM;
461 goto err_unmap_tx;
462 }
463 sis_priv->rx_ring = (BufferDesc *)ring_space;
464 sis_priv->rx_ring_dma = ring_dma;
6aa20a22 465
1da177e4
LT
466 /* The SiS900-specific entries in the device structure. */
467 net_dev->open = &sis900_open;
468 net_dev->hard_start_xmit = &sis900_start_xmit;
469 net_dev->stop = &sis900_close;
470 net_dev->get_stats = &sis900_get_stats;
471 net_dev->set_config = &sis900_set_config;
472 net_dev->set_multicast_list = &set_rx_mode;
473 net_dev->do_ioctl = &mii_ioctl;
474 net_dev->tx_timeout = sis900_tx_timeout;
475 net_dev->watchdog_timeo = TX_TIMEOUT;
476 net_dev->ethtool_ops = &sis900_ethtool_ops;
477
478#ifdef CONFIG_NET_POLL_CONTROLLER
479 net_dev->poll_controller = &sis900_poll;
480#endif
481
482 if (sis900_debug > 0)
483 sis_priv->msg_enable = sis900_debug;
484 else
485 sis_priv->msg_enable = SIS900_DEF_MSG;
da369b01
DV
486
487 sis_priv->mii_info.dev = net_dev;
488 sis_priv->mii_info.mdio_read = mdio_read;
489 sis_priv->mii_info.mdio_write = mdio_write;
490 sis_priv->mii_info.phy_id_mask = 0x1f;
491 sis_priv->mii_info.reg_num_mask = 0x1f;
492
1da177e4
LT
493 /* Get Mac address according to the chip revision */
494 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &(sis_priv->chipset_rev));
495 if(netif_msg_probe(sis_priv))
496 printk(KERN_DEBUG "%s: detected revision %2.2x, "
497 "trying to get MAC address...\n",
498 dev_name, sis_priv->chipset_rev);
6aa20a22 499
1da177e4
LT
500 ret = 0;
501 if (sis_priv->chipset_rev == SIS630E_900_REV)
502 ret = sis630e_get_mac_addr(pci_dev, net_dev);
503 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
504 ret = sis635_get_mac_addr(pci_dev, net_dev);
505 else if (sis_priv->chipset_rev == SIS96x_900_REV)
506 ret = sis96x_get_mac_addr(pci_dev, net_dev);
507 else
508 ret = sis900_get_mac_addr(pci_dev, net_dev);
509
510 if (ret == 0) {
511 printk(KERN_WARNING "%s: Cannot read MAC address.\n", dev_name);
512 ret = -ENODEV;
513 goto err_unmap_rx;
514 }
6aa20a22 515
1da177e4
LT
516 /* 630ET : set the mii access mode as software-mode */
517 if (sis_priv->chipset_rev == SIS630ET_900_REV)
518 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
519
520 /* probe for mii transceiver */
521 if (sis900_mii_probe(net_dev) == 0) {
522 printk(KERN_WARNING "%s: Error probing MII device.\n",
523 dev_name);
524 ret = -ENODEV;
525 goto err_unmap_rx;
526 }
527
528 /* save our host bridge revision */
529 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
530 if (dev) {
531 pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev);
532 pci_dev_put(dev);
533 }
534
535 ret = register_netdev(net_dev);
536 if (ret)
537 goto err_unmap_rx;
538
539 /* print some information about our NIC */
540 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, ", net_dev->name,
541 card_name, ioaddr, net_dev->irq);
542 for (i = 0; i < 5; i++)
543 printk("%2.2x:", (u8)net_dev->dev_addr[i]);
544 printk("%2.2x.\n", net_dev->dev_addr[i]);
545
ea37ccea 546 /* Detect Wake on Lan support */
7bef4b39 547 ret = (inl(net_dev->base_addr + CFGPMC) & PMESP) >> 27;
ea37ccea
DV
548 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
549 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
550
1da177e4
LT
551 return 0;
552
553 err_unmap_rx:
554 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
555 sis_priv->rx_ring_dma);
556 err_unmap_tx:
557 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
558 sis_priv->tx_ring_dma);
559 err_out_cleardev:
560 pci_set_drvdata(pci_dev, NULL);
561 pci_release_regions(pci_dev);
562 err_out:
563 free_netdev(net_dev);
564 return ret;
565}
566
567/**
568 * sis900_mii_probe - Probe MII PHY for sis900
569 * @net_dev: the net device to probe for
6aa20a22 570 *
1da177e4
LT
571 * Search for total of 32 possible mii phy addresses.
572 * Identify and set current phy if found one,
573 * return error if it failed to found.
574 */
575
576static int __init sis900_mii_probe(struct net_device * net_dev)
577{
578 struct sis900_private * sis_priv = net_dev->priv;
579 const char *dev_name = pci_name(sis_priv->pci_dev);
580 u16 poll_bit = MII_STAT_LINK, status = 0;
581 unsigned long timeout = jiffies + 5 * HZ;
582 int phy_addr;
583
584 sis_priv->mii = NULL;
585
586 /* search for total of 32 possible mii phy addresses */
6aa20a22 587 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
1da177e4
LT
588 struct mii_phy * mii_phy = NULL;
589 u16 mii_status;
590 int i;
591
592 mii_phy = NULL;
593 for(i = 0; i < 2; i++)
594 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
595
596 if (mii_status == 0xffff || mii_status == 0x0000) {
597 if (netif_msg_probe(sis_priv))
598 printk(KERN_DEBUG "%s: MII at address %d"
599 " not accessible\n",
600 dev_name, phy_addr);
601 continue;
602 }
6aa20a22 603
1da177e4
LT
604 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
605 printk(KERN_WARNING "Cannot allocate mem for struct mii_phy\n");
606 mii_phy = sis_priv->first_mii;
607 while (mii_phy) {
608 struct mii_phy *phy;
609 phy = mii_phy;
610 mii_phy = mii_phy->next;
611 kfree(phy);
612 }
613 return 0;
614 }
6aa20a22 615
1da177e4 616 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
6aa20a22 617 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
1da177e4
LT
618 mii_phy->phy_addr = phy_addr;
619 mii_phy->status = mii_status;
620 mii_phy->next = sis_priv->mii;
621 sis_priv->mii = mii_phy;
622 sis_priv->first_mii = mii_phy;
623
624 for (i = 0; mii_chip_table[i].phy_id1; i++)
625 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
626 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
627 mii_phy->phy_types = mii_chip_table[i].phy_types;
628 if (mii_chip_table[i].phy_types == MIX)
629 mii_phy->phy_types =
630 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
631 printk(KERN_INFO "%s: %s transceiver found "
632 "at address %d.\n",
633 dev_name,
634 mii_chip_table[i].name,
635 phy_addr);
636 break;
637 }
6aa20a22 638
1da177e4
LT
639 if( !mii_chip_table[i].phy_id1 ) {
640 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
641 dev_name, phy_addr);
642 mii_phy->phy_types = UNKNOWN;
643 }
644 }
6aa20a22 645
1da177e4
LT
646 if (sis_priv->mii == NULL) {
647 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
648 return 0;
649 }
650
651 /* select default PHY for mac */
652 sis_priv->mii = NULL;
653 sis900_default_phy( net_dev );
654
655 /* Reset phy if default phy is internal sis900 */
656 if ((sis_priv->mii->phy_id0 == 0x001D) &&
657 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
658 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
6aa20a22 659
1da177e4
LT
660 /* workaround for ICS1893 PHY */
661 if ((sis_priv->mii->phy_id0 == 0x0015) &&
662 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
663 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
664
665 if(status & MII_STAT_LINK){
666 while (poll_bit) {
667 yield();
668
669 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
670 if (time_after_eq(jiffies, timeout)) {
671 printk(KERN_WARNING "%s: reset phy and link down now\n",
672 dev_name);
673 return -ETIME;
674 }
675 }
676 }
677
678 if (sis_priv->chipset_rev == SIS630E_900_REV) {
679 /* SiS 630E has some bugs on default value of PHY registers */
680 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
681 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
682 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
683 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
6aa20a22 684 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
1da177e4
LT
685 }
686
687 if (sis_priv->mii->status & MII_STAT_LINK)
688 netif_carrier_on(net_dev);
689 else
690 netif_carrier_off(net_dev);
691
692 return 1;
693}
694
695/**
696 * sis900_default_phy - Select default PHY for sis900 mac.
697 * @net_dev: the net device to probe for
698 *
699 * Select first detected PHY with link as default.
700 * If no one is link on, select PHY whose types is HOME as default.
701 * If HOME doesn't exist, select LAN.
702 */
703
704static u16 sis900_default_phy(struct net_device * net_dev)
705{
706 struct sis900_private * sis_priv = net_dev->priv;
6aa20a22 707 struct mii_phy *phy = NULL, *phy_home = NULL,
1da177e4
LT
708 *default_phy = NULL, *phy_lan = NULL;
709 u16 status;
710
711 for (phy=sis_priv->first_mii; phy; phy=phy->next) {
712 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
713 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
714
715 /* Link ON & Not select default PHY & not ghost PHY */
716 if ((status & MII_STAT_LINK) && !default_phy &&
717 (phy->phy_types != UNKNOWN))
718 default_phy = phy;
719 else {
720 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
721 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
722 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
723 if (phy->phy_types == HOME)
724 phy_home = phy;
725 else if(phy->phy_types == LAN)
726 phy_lan = phy;
727 }
728 }
729
730 if (!default_phy && phy_home)
731 default_phy = phy_home;
732 else if (!default_phy && phy_lan)
733 default_phy = phy_lan;
734 else if (!default_phy)
735 default_phy = sis_priv->first_mii;
736
737 if (sis_priv->mii != default_phy) {
738 sis_priv->mii = default_phy;
739 sis_priv->cur_phy = default_phy->phy_addr;
740 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
741 pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
742 }
6aa20a22 743
da369b01
DV
744 sis_priv->mii_info.phy_id = sis_priv->cur_phy;
745
1da177e4
LT
746 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
747 status &= (~MII_CNTL_ISOLATE);
748
6aa20a22 749 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
1da177e4
LT
750 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
751 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
752
6aa20a22 753 return status;
1da177e4
LT
754}
755
756
757/**
758 * sis900_set_capability - set the media capability of network adapter.
759 * @net_dev : the net device to probe for
760 * @phy : default PHY
761 *
762 * Set the media capability of network adapter according to
763 * mii status register. It's necessary before auto-negotiate.
764 */
6aa20a22 765
1da177e4
LT
766static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
767{
768 u16 cap;
769 u16 status;
6aa20a22 770
1da177e4
LT
771 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
772 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
6aa20a22 773
1da177e4
LT
774 cap = MII_NWAY_CSMA_CD |
775 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
776 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
777 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
778 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
779
780 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
781}
782
783
784/* Delay between EEPROM clock transitions. */
785#define eeprom_delay() inl(ee_addr)
786
787/**
788 * read_eeprom - Read Serial EEPROM
789 * @ioaddr: base i/o address
790 * @location: the EEPROM location to read
791 *
792 * Read Serial EEPROM through EEPROM Access Register.
793 * Note that location is in word (16 bits) unit
794 */
795
796static u16 __devinit read_eeprom(long ioaddr, int location)
797{
798 int i;
799 u16 retval = 0;
800 long ee_addr = ioaddr + mear;
801 u32 read_cmd = location | EEread;
802
803 outl(0, ee_addr);
804 eeprom_delay();
805 outl(EECS, ee_addr);
806 eeprom_delay();
807
808 /* Shift the read command (9) bits out. */
809 for (i = 8; i >= 0; i--) {
810 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
811 outl(dataval, ee_addr);
812 eeprom_delay();
813 outl(dataval | EECLK, ee_addr);
814 eeprom_delay();
815 }
816 outl(EECS, ee_addr);
817 eeprom_delay();
818
819 /* read the 16-bits data in */
820 for (i = 16; i > 0; i--) {
821 outl(EECS, ee_addr);
822 eeprom_delay();
823 outl(EECS | EECLK, ee_addr);
824 eeprom_delay();
825 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
826 eeprom_delay();
827 }
828
829 /* Terminate the EEPROM access. */
830 outl(0, ee_addr);
831 eeprom_delay();
832
833 return (retval);
834}
835
836/* Read and write the MII management registers using software-generated
837 serial MDIO protocol. Note that the command bits and data bits are
838 send out separately */
839#define mdio_delay() inl(mdio_addr)
840
841static void mdio_idle(long mdio_addr)
842{
843 outl(MDIO | MDDIR, mdio_addr);
844 mdio_delay();
845 outl(MDIO | MDDIR | MDC, mdio_addr);
846}
847
848/* Syncronize the MII management interface by shifting 32 one bits out. */
849static void mdio_reset(long mdio_addr)
850{
851 int i;
852
853 for (i = 31; i >= 0; i--) {
854 outl(MDDIR | MDIO, mdio_addr);
855 mdio_delay();
856 outl(MDDIR | MDIO | MDC, mdio_addr);
857 mdio_delay();
858 }
859 return;
860}
861
862/**
863 * mdio_read - read MII PHY register
864 * @net_dev: the net device to read
865 * @phy_id: the phy address to read
866 * @location: the phy regiester id to read
867 *
868 * Read MII registers through MDIO and MDC
869 * using MDIO management frame structure and protocol(defined by ISO/IEC).
870 * Please see SiS7014 or ICS spec
871 */
872
da369b01 873static int mdio_read(struct net_device *net_dev, int phy_id, int location)
1da177e4
LT
874{
875 long mdio_addr = net_dev->base_addr + mear;
876 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
877 u16 retval = 0;
878 int i;
879
880 mdio_reset(mdio_addr);
881 mdio_idle(mdio_addr);
882
883 for (i = 15; i >= 0; i--) {
884 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
885 outl(dataval, mdio_addr);
886 mdio_delay();
887 outl(dataval | MDC, mdio_addr);
888 mdio_delay();
889 }
890
891 /* Read the 16 data bits. */
892 for (i = 16; i > 0; i--) {
893 outl(0, mdio_addr);
894 mdio_delay();
895 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
896 outl(MDC, mdio_addr);
897 mdio_delay();
898 }
899 outl(0x00, mdio_addr);
900
901 return retval;
902}
903
904/**
905 * mdio_write - write MII PHY register
906 * @net_dev: the net device to write
907 * @phy_id: the phy address to write
908 * @location: the phy regiester id to write
909 * @value: the register value to write with
910 *
911 * Write MII registers with @value through MDIO and MDC
912 * using MDIO management frame structure and protocol(defined by ISO/IEC)
913 * please see SiS7014 or ICS spec
914 */
915
916static void mdio_write(struct net_device *net_dev, int phy_id, int location,
917 int value)
918{
919 long mdio_addr = net_dev->base_addr + mear;
920 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
921 int i;
922
923 mdio_reset(mdio_addr);
924 mdio_idle(mdio_addr);
925
926 /* Shift the command bits out. */
927 for (i = 15; i >= 0; i--) {
928 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
929 outb(dataval, mdio_addr);
930 mdio_delay();
931 outb(dataval | MDC, mdio_addr);
932 mdio_delay();
933 }
934 mdio_delay();
935
936 /* Shift the value bits out. */
937 for (i = 15; i >= 0; i--) {
938 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
939 outl(dataval, mdio_addr);
940 mdio_delay();
941 outl(dataval | MDC, mdio_addr);
942 mdio_delay();
943 }
944 mdio_delay();
945
946 /* Clear out extra bits. */
947 for (i = 2; i > 0; i--) {
948 outb(0, mdio_addr);
949 mdio_delay();
950 outb(MDC, mdio_addr);
951 mdio_delay();
952 }
953 outl(0x00, mdio_addr);
954
955 return;
956}
957
958
959/**
960 * sis900_reset_phy - reset sis900 mii phy.
961 * @net_dev: the net device to write
962 * @phy_addr: default phy address
963 *
964 * Some specific phy can't work properly without reset.
965 * This function will be called during initialization and
966 * link status change from ON to DOWN.
967 */
968
969static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
970{
f3be9742 971 int i;
1da177e4
LT
972 u16 status;
973
f3be9742 974 for (i = 0; i < 2; i++)
1da177e4
LT
975 status = mdio_read(net_dev, phy_addr, MII_STATUS);
976
977 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
6aa20a22 978
1da177e4
LT
979 return status;
980}
981
982#ifdef CONFIG_NET_POLL_CONTROLLER
983/*
984 * Polling 'interrupt' - used by things like netconsole to send skbs
985 * without having to re-enable interrupts. It's not called while
986 * the interrupt routine is executing.
987*/
988static void sis900_poll(struct net_device *dev)
989{
990 disable_irq(dev->irq);
7d12e780 991 sis900_interrupt(dev->irq, dev);
1da177e4
LT
992 enable_irq(dev->irq);
993}
994#endif
995
996/**
997 * sis900_open - open sis900 device
998 * @net_dev: the net device to open
999 *
1000 * Do some initialization and start net interface.
1001 * enable interrupts and set sis900 timer.
1002 */
1003
1004static int
1005sis900_open(struct net_device *net_dev)
1006{
1007 struct sis900_private *sis_priv = net_dev->priv;
1008 long ioaddr = net_dev->base_addr;
1009 int ret;
1010
1011 /* Soft reset the chip. */
1012 sis900_reset(net_dev);
1013
1014 /* Equalizer workaround Rule */
1015 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1016
1fb9df5d 1017 ret = request_irq(net_dev->irq, &sis900_interrupt, IRQF_SHARED,
1da177e4
LT
1018 net_dev->name, net_dev);
1019 if (ret)
1020 return ret;
1021
1022 sis900_init_rxfilter(net_dev);
1023
1024 sis900_init_tx_ring(net_dev);
1025 sis900_init_rx_ring(net_dev);
1026
1027 set_rx_mode(net_dev);
1028
1029 netif_start_queue(net_dev);
1030
1031 /* Workaround for EDB */
1032 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
1033
1034 /* Enable all known interrupts by setting the interrupt mask. */
1035 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1036 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
1037 outl(IE, ioaddr + ier);
1038
1039 sis900_check_mode(net_dev, sis_priv->mii);
1040
1041 /* Set the timer to switch to check for link beat and perhaps switch
1042 to an alternate media type. */
1043 init_timer(&sis_priv->timer);
1044 sis_priv->timer.expires = jiffies + HZ;
1045 sis_priv->timer.data = (unsigned long)net_dev;
1046 sis_priv->timer.function = &sis900_timer;
1047 add_timer(&sis_priv->timer);
1048
1049 return 0;
1050}
1051
1052/**
1053 * sis900_init_rxfilter - Initialize the Rx filter
1054 * @net_dev: the net device to initialize for
1055 *
1056 * Set receive filter address to our MAC address
1057 * and enable packet filtering.
1058 */
1059
1060static void
1061sis900_init_rxfilter (struct net_device * net_dev)
1062{
1063 struct sis900_private *sis_priv = net_dev->priv;
1064 long ioaddr = net_dev->base_addr;
1065 u32 rfcrSave;
1066 u32 i;
1067
1068 rfcrSave = inl(rfcr + ioaddr);
1069
1070 /* disable packet filtering before setting filter */
1071 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
1072
1073 /* load MAC addr to filter data register */
1074 for (i = 0 ; i < 3 ; i++) {
1075 u32 w;
1076
1077 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1078 outl((i << RFADDR_shift), ioaddr + rfcr);
1079 outl(w, ioaddr + rfdr);
1080
1081 if (netif_msg_hw(sis_priv)) {
1082 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
1083 net_dev->name, i, inl(ioaddr + rfdr));
1084 }
1085 }
1086
1087 /* enable packet filtering */
1088 outl(rfcrSave | RFEN, rfcr + ioaddr);
1089}
1090
1091/**
1092 * sis900_init_tx_ring - Initialize the Tx descriptor ring
1093 * @net_dev: the net device to initialize for
1094 *
6aa20a22 1095 * Initialize the Tx descriptor ring,
1da177e4
LT
1096 */
1097
1098static void
1099sis900_init_tx_ring(struct net_device *net_dev)
1100{
1101 struct sis900_private *sis_priv = net_dev->priv;
1102 long ioaddr = net_dev->base_addr;
1103 int i;
1104
1105 sis_priv->tx_full = 0;
1106 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1107
1108 for (i = 0; i < NUM_TX_DESC; i++) {
1109 sis_priv->tx_skbuff[i] = NULL;
1110
1111 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1112 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1113 sis_priv->tx_ring[i].cmdsts = 0;
1114 sis_priv->tx_ring[i].bufptr = 0;
1115 }
1116
1117 /* load Transmit Descriptor Register */
1118 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1119 if (netif_msg_hw(sis_priv))
1120 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1121 net_dev->name, inl(ioaddr + txdp));
1122}
1123
1124/**
1125 * sis900_init_rx_ring - Initialize the Rx descriptor ring
1126 * @net_dev: the net device to initialize for
1127 *
6aa20a22 1128 * Initialize the Rx descriptor ring,
1da177e4
LT
1129 * and pre-allocate recevie buffers (socket buffer)
1130 */
1131
6aa20a22 1132static void
1da177e4
LT
1133sis900_init_rx_ring(struct net_device *net_dev)
1134{
1135 struct sis900_private *sis_priv = net_dev->priv;
1136 long ioaddr = net_dev->base_addr;
1137 int i;
1138
1139 sis_priv->cur_rx = 0;
1140 sis_priv->dirty_rx = 0;
1141
1142 /* init RX descriptor */
1143 for (i = 0; i < NUM_RX_DESC; i++) {
1144 sis_priv->rx_skbuff[i] = NULL;
1145
1146 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1147 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1148 sis_priv->rx_ring[i].cmdsts = 0;
1149 sis_priv->rx_ring[i].bufptr = 0;
1150 }
1151
1152 /* allocate sock buffers */
1153 for (i = 0; i < NUM_RX_DESC; i++) {
1154 struct sk_buff *skb;
1155
1156 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1157 /* not enough memory for skbuff, this makes a "hole"
1158 on the buffer ring, it is not clear how the
1159 hardware will react to this kind of degenerated
1160 buffer */
1161 break;
1162 }
1da177e4
LT
1163 sis_priv->rx_skbuff[i] = skb;
1164 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1165 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
689be439 1166 skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1da177e4
LT
1167 }
1168 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1169
1170 /* load Receive Descriptor Register */
1171 outl(sis_priv->rx_ring_dma, ioaddr + rxdp);
1172 if (netif_msg_hw(sis_priv))
1173 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1174 net_dev->name, inl(ioaddr + rxdp));
1175}
1176
1177/**
1178 * sis630_set_eq - set phy equalizer value for 630 LAN
1179 * @net_dev: the net device to set equalizer value
1180 * @revision: 630 LAN revision number
1181 *
1182 * 630E equalizer workaround rule(Cyrus Huang 08/15)
1183 * PHY register 14h(Test)
1184 * Bit 14: 0 -- Automatically dectect (default)
1185 * 1 -- Manually set Equalizer filter
1186 * Bit 13: 0 -- (Default)
1187 * 1 -- Speed up convergence of equalizer setting
1188 * Bit 9 : 0 -- (Default)
1189 * 1 -- Disable Baseline Wander
1190 * Bit 3~7 -- Equalizer filter setting
1191 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
1192 * Then calculate equalizer value
1193 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
1194 * Link Off:Set Bit 13 to 1, Bit 14 to 0
1195 * Calculate Equalizer value:
1196 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-dectect proper equalizer value.
1197 * When the equalizer is stable, this value is not a fixed value. It will be within
1198 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
1199 * 0 <= max <= 4 --> set equalizer to max
1200 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
1201 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
1202 */
1203
1204static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1205{
1206 struct sis900_private *sis_priv = net_dev->priv;
1207 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1208 int i, maxcount=10;
1209
1210 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1211 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1212 return;
1213
1214 if (netif_carrier_ok(net_dev)) {
1215 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1216 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1217 (0x2200 | reg14h) & 0xBFFF);
1218 for (i=0; i < maxcount; i++) {
1219 eq_value = (0x00F8 & mdio_read(net_dev,
1220 sis_priv->cur_phy, MII_RESV)) >> 3;
1221 if (i == 0)
1222 max_value=min_value=eq_value;
1223 max_value = (eq_value > max_value) ?
1224 eq_value : max_value;
1225 min_value = (eq_value < min_value) ?
1226 eq_value : min_value;
1227 }
1228 /* 630E rule to determine the equalizer value */
1229 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1230 revision == SIS630ET_900_REV) {
1231 if (max_value < 5)
1232 eq_value = max_value;
1233 else if (max_value >= 5 && max_value < 15)
1234 eq_value = (max_value == min_value) ?
1235 max_value+2 : max_value+1;
1236 else if (max_value >= 15)
1237 eq_value=(max_value == min_value) ?
1238 max_value+6 : max_value+5;
1239 }
1240 /* 630B0&B1 rule to determine the equalizer value */
6aa20a22
JG
1241 if (revision == SIS630A_900_REV &&
1242 (sis_priv->host_bridge_rev == SIS630B0 ||
1da177e4
LT
1243 sis_priv->host_bridge_rev == SIS630B1)) {
1244 if (max_value == 0)
1245 eq_value = 3;
1246 else
1247 eq_value = (max_value + min_value + 1)/2;
1248 }
1249 /* write equalizer value and setting */
1250 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1251 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1252 reg14h = (reg14h | 0x6000) & 0xFDFF;
1253 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1254 } else {
1255 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
6aa20a22
JG
1256 if (revision == SIS630A_900_REV &&
1257 (sis_priv->host_bridge_rev == SIS630B0 ||
1258 sis_priv->host_bridge_rev == SIS630B1))
1da177e4
LT
1259 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1260 (reg14h | 0x2200) & 0xBFFF);
1261 else
1262 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1263 (reg14h | 0x2000) & 0xBFFF);
1264 }
1265 return;
1266}
1267
1268/**
1269 * sis900_timer - sis900 timer routine
1270 * @data: pointer to sis900 net device
1271 *
6aa20a22 1272 * On each timer ticks we check two things,
1da177e4
LT
1273 * link status (ON/OFF) and link mode (10/100/Full/Half)
1274 */
1275
1276static void sis900_timer(unsigned long data)
1277{
1278 struct net_device *net_dev = (struct net_device *)data;
1279 struct sis900_private *sis_priv = net_dev->priv;
1280 struct mii_phy *mii_phy = sis_priv->mii;
f71e1309 1281 static const int next_tick = 5*HZ;
1da177e4
LT
1282 u16 status;
1283
1284 if (!sis_priv->autong_complete){
1285 int speed, duplex = 0;
1286
1287 sis900_read_mode(net_dev, &speed, &duplex);
1288 if (duplex){
1289 sis900_set_mode(net_dev->base_addr, speed, duplex);
1290 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1291 netif_start_queue(net_dev);
1292 }
1293
1294 sis_priv->timer.expires = jiffies + HZ;
1295 add_timer(&sis_priv->timer);
1296 return;
1297 }
1298
1299 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1300 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1301
1302 /* Link OFF -> ON */
1303 if (!netif_carrier_ok(net_dev)) {
1304 LookForLink:
1305 /* Search for new PHY */
1306 status = sis900_default_phy(net_dev);
1307 mii_phy = sis_priv->mii;
1308
1309 if (status & MII_STAT_LINK){
1310 sis900_check_mode(net_dev, mii_phy);
1311 netif_carrier_on(net_dev);
1312 }
1313 } else {
1314 /* Link ON -> OFF */
1315 if (!(status & MII_STAT_LINK)){
1316 netif_carrier_off(net_dev);
1317 if(netif_msg_link(sis_priv))
1318 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1319
1320 /* Change mode issue */
6aa20a22 1321 if ((mii_phy->phy_id0 == 0x001D) &&
1da177e4
LT
1322 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1323 sis900_reset_phy(net_dev, sis_priv->cur_phy);
6aa20a22 1324
1da177e4 1325 sis630_set_eq(net_dev, sis_priv->chipset_rev);
6aa20a22 1326
1da177e4
LT
1327 goto LookForLink;
1328 }
1329 }
1330
1331 sis_priv->timer.expires = jiffies + next_tick;
1332 add_timer(&sis_priv->timer);
1333}
1334
1335/**
1336 * sis900_check_mode - check the media mode for sis900
1337 * @net_dev: the net device to be checked
1338 * @mii_phy: the mii phy
1339 *
1340 * Older driver gets the media mode from mii status output
1341 * register. Now we set our media capability and auto-negotiate
1342 * to get the upper bound of speed and duplex between two ends.
1343 * If the types of mii phy is HOME, it doesn't need to auto-negotiate
1344 * and autong_complete should be set to 1.
1345 */
1346
1347static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1348{
1349 struct sis900_private *sis_priv = net_dev->priv;
1350 long ioaddr = net_dev->base_addr;
1351 int speed, duplex;
1352
1353 if (mii_phy->phy_types == LAN) {
1354 outl(~EXD & inl(ioaddr + cfg), ioaddr + cfg);
1355 sis900_set_capability(net_dev , mii_phy);
1356 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1357 } else {
1358 outl(EXD | inl(ioaddr + cfg), ioaddr + cfg);
1359 speed = HW_SPEED_HOME;
1360 duplex = FDX_CAPABLE_HALF_SELECTED;
1361 sis900_set_mode(ioaddr, speed, duplex);
1362 sis_priv->autong_complete = 1;
1363 }
1364}
1365
1366/**
1367 * sis900_set_mode - Set the media mode of mac register.
1368 * @ioaddr: the address of the device
1369 * @speed : the transmit speed to be determined
1370 * @duplex: the duplex mode to be determined
1371 *
1372 * Set the media mode of mac register txcfg/rxcfg according to
1373 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1374 * bus is used instead of PCI bus. When this bit is set 1, the
1375 * Max DMA Burst Size for TX/RX DMA should be no larger than 16
1376 * double words.
1377 */
1378
1379static void sis900_set_mode (long ioaddr, int speed, int duplex)
1380{
1381 u32 tx_flags = 0, rx_flags = 0;
1382
1383 if (inl(ioaddr + cfg) & EDB_MASTER_EN) {
1384 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1385 (TX_FILL_THRESH << TxFILLT_shift);
1386 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1387 } else {
1388 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1389 (TX_FILL_THRESH << TxFILLT_shift);
1390 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1391 }
1392
1393 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1394 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1395 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1396 } else {
1397 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1398 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1399 }
1400
1401 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1402 tx_flags |= (TxCSI | TxHBI);
1403 rx_flags |= RxATX;
1404 }
1405
d269a69f
DV
1406#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1407 /* Can accept Jumbo packet */
1408 rx_flags |= RxAJAB;
1409#endif
1410
1da177e4
LT
1411 outl (tx_flags, ioaddr + txcfg);
1412 outl (rx_flags, ioaddr + rxcfg);
1413}
1414
1415/**
1416 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1417 * @net_dev: the net device to read mode for
1418 * @phy_addr: mii phy address
1419 *
1420 * If the adapter is link-on, set the auto-negotiate enable/reset bit.
1421 * autong_complete should be set to 0 when starting auto-negotiation.
1422 * autong_complete should be set to 1 if we didn't start auto-negotiation.
1423 * sis900_timer will wait for link on again if autong_complete = 0.
1424 */
1425
1426static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1427{
1428 struct sis900_private *sis_priv = net_dev->priv;
1429 int i = 0;
1430 u32 status;
6aa20a22 1431
f3be9742 1432 for (i = 0; i < 2; i++)
1da177e4
LT
1433 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1434
1435 if (!(status & MII_STAT_LINK)){
1436 if(netif_msg_link(sis_priv))
1437 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1438 sis_priv->autong_complete = 1;
1439 netif_carrier_off(net_dev);
1440 return;
1441 }
1442
1443 /* (Re)start AutoNegotiate */
1444 mdio_write(net_dev, phy_addr, MII_CONTROL,
1445 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1446 sis_priv->autong_complete = 0;
1447}
1448
1449
1450/**
1451 * sis900_read_mode - read media mode for sis900 internal phy
1452 * @net_dev: the net device to read mode for
1453 * @speed : the transmit speed to be determined
1454 * @duplex : the duplex mode to be determined
1455 *
1456 * The capability of remote end will be put in mii register autorec
1457 * after auto-negotiation. Use AND operation to get the upper bound
1458 * of speed and duplex between two ends.
1459 */
1460
1461static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1462{
1463 struct sis900_private *sis_priv = net_dev->priv;
1464 struct mii_phy *phy = sis_priv->mii;
1465 int phy_addr = sis_priv->cur_phy;
1466 u32 status;
1467 u16 autoadv, autorec;
f3be9742 1468 int i;
1da177e4 1469
f3be9742 1470 for (i = 0; i < 2; i++)
1da177e4
LT
1471 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1472
1473 if (!(status & MII_STAT_LINK))
1474 return;
1475
1476 /* AutoNegotiate completed */
1477 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1478 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1479 status = autoadv & autorec;
6aa20a22 1480
1da177e4
LT
1481 *speed = HW_SPEED_10_MBPS;
1482 *duplex = FDX_CAPABLE_HALF_SELECTED;
1483
1484 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1485 *speed = HW_SPEED_100_MBPS;
1486 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1487 *duplex = FDX_CAPABLE_FULL_SELECTED;
6aa20a22 1488
1da177e4
LT
1489 sis_priv->autong_complete = 1;
1490
1491 /* Workaround for Realtek RTL8201 PHY issue */
1492 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1493 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1494 *duplex = FDX_CAPABLE_FULL_SELECTED;
1495 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1496 *speed = HW_SPEED_100_MBPS;
1497 }
1498
1499 if(netif_msg_link(sis_priv))
1500 printk(KERN_INFO "%s: Media Link On %s %s-duplex \n",
1501 net_dev->name,
1502 *speed == HW_SPEED_100_MBPS ?
1503 "100mbps" : "10mbps",
1504 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1505 "full" : "half");
1506}
1507
1508/**
1509 * sis900_tx_timeout - sis900 transmit timeout routine
1510 * @net_dev: the net device to transmit
1511 *
1512 * print transmit timeout status
1513 * disable interrupts and do some tasks
1514 */
1515
1516static void sis900_tx_timeout(struct net_device *net_dev)
1517{
1518 struct sis900_private *sis_priv = net_dev->priv;
1519 long ioaddr = net_dev->base_addr;
1520 unsigned long flags;
1521 int i;
1522
1523 if(netif_msg_tx_err(sis_priv))
1524 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n",
1525 net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr));
1526
1527 /* Disable interrupts by clearing the interrupt mask. */
1528 outl(0x0000, ioaddr + imr);
1529
1530 /* use spinlock to prevent interrupt handler accessing buffer ring */
1531 spin_lock_irqsave(&sis_priv->lock, flags);
1532
1533 /* discard unsent packets */
1534 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1535 for (i = 0; i < NUM_TX_DESC; i++) {
1536 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1537
1538 if (skb) {
6aa20a22 1539 pci_unmap_single(sis_priv->pci_dev,
1da177e4
LT
1540 sis_priv->tx_ring[i].bufptr, skb->len,
1541 PCI_DMA_TODEVICE);
1542 dev_kfree_skb_irq(skb);
1543 sis_priv->tx_skbuff[i] = NULL;
1544 sis_priv->tx_ring[i].cmdsts = 0;
1545 sis_priv->tx_ring[i].bufptr = 0;
1546 sis_priv->stats.tx_dropped++;
1547 }
1548 }
1549 sis_priv->tx_full = 0;
1550 netif_wake_queue(net_dev);
1551
1552 spin_unlock_irqrestore(&sis_priv->lock, flags);
1553
1554 net_dev->trans_start = jiffies;
1555
1556 /* load Transmit Descriptor Register */
1557 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1558
1559 /* Enable all known interrupts by setting the interrupt mask. */
1560 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1561 return;
1562}
1563
1564/**
1565 * sis900_start_xmit - sis900 start transmit routine
1566 * @skb: socket buffer pointer to put the data being transmitted
1567 * @net_dev: the net device to transmit with
1568 *
6aa20a22 1569 * Set the transmit buffer descriptor,
1da177e4
LT
1570 * and write TxENA to enable transmit state machine.
1571 * tell upper layer if the buffer is full
1572 */
1573
1574static int
1575sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1576{
1577 struct sis900_private *sis_priv = net_dev->priv;
1578 long ioaddr = net_dev->base_addr;
1579 unsigned int entry;
1580 unsigned long flags;
1581 unsigned int index_cur_tx, index_dirty_tx;
1582 unsigned int count_dirty_tx;
1583
1584 /* Don't transmit data before the complete of auto-negotiation */
1585 if(!sis_priv->autong_complete){
1586 netif_stop_queue(net_dev);
1587 return 1;
1588 }
1589
1590 spin_lock_irqsave(&sis_priv->lock, flags);
1591
1592 /* Calculate the next Tx descriptor entry. */
1593 entry = sis_priv->cur_tx % NUM_TX_DESC;
1594 sis_priv->tx_skbuff[entry] = skb;
1595
1596 /* set the transmit buffer descriptor and enable Transmit State Machine */
1597 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1598 skb->data, skb->len, PCI_DMA_TODEVICE);
1599 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1600 outl(TxENA | inl(ioaddr + cr), ioaddr + cr);
1601
1602 sis_priv->cur_tx ++;
1603 index_cur_tx = sis_priv->cur_tx;
1604 index_dirty_tx = sis_priv->dirty_tx;
1605
1606 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1607 count_dirty_tx ++;
1608
1609 if (index_cur_tx == index_dirty_tx) {
1610 /* dirty_tx is met in the cycle of cur_tx, buffer full */
1611 sis_priv->tx_full = 1;
1612 netif_stop_queue(net_dev);
6aa20a22 1613 } else if (count_dirty_tx < NUM_TX_DESC) {
1da177e4
LT
1614 /* Typical path, tell upper layer that more transmission is possible */
1615 netif_start_queue(net_dev);
1616 } else {
1617 /* buffer full, tell upper layer no more transmission */
1618 sis_priv->tx_full = 1;
1619 netif_stop_queue(net_dev);
1620 }
1621
1622 spin_unlock_irqrestore(&sis_priv->lock, flags);
1623
1624 net_dev->trans_start = jiffies;
1625
1626 if (netif_msg_tx_queued(sis_priv))
1627 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
1628 "to slot %d.\n",
1629 net_dev->name, skb->data, (int)skb->len, entry);
1630
1631 return 0;
1632}
1633
1634/**
1635 * sis900_interrupt - sis900 interrupt handler
1636 * @irq: the irq number
1637 * @dev_instance: the client data object
1638 * @regs: snapshot of processor context
1639 *
6aa20a22 1640 * The interrupt handler does all of the Rx thread work,
1da177e4
LT
1641 * and cleans up after the Tx thread
1642 */
1643
7d12e780 1644static irqreturn_t sis900_interrupt(int irq, void *dev_instance)
1da177e4
LT
1645{
1646 struct net_device *net_dev = dev_instance;
1647 struct sis900_private *sis_priv = net_dev->priv;
1648 int boguscnt = max_interrupt_work;
1649 long ioaddr = net_dev->base_addr;
1650 u32 status;
1651 unsigned int handled = 0;
1652
1653 spin_lock (&sis_priv->lock);
1654
1655 do {
1656 status = inl(ioaddr + isr);
1657
1658 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1659 /* nothing intresting happened */
1660 break;
1661 handled = 1;
1662
1663 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1664 if (status & (RxORN | RxERR | RxOK))
1665 /* Rx interrupt */
1666 sis900_rx(net_dev);
1667
1668 if (status & (TxURN | TxERR | TxIDLE))
1669 /* Tx interrupt */
1670 sis900_finish_xmit(net_dev);
1671
1672 /* something strange happened !!! */
1673 if (status & HIBERR) {
1674 if(netif_msg_intr(sis_priv))
1675 printk(KERN_INFO "%s: Abnormal interrupt,"
1676 "status %#8.8x.\n", net_dev->name, status);
1677 break;
1678 }
1679 if (--boguscnt < 0) {
1680 if(netif_msg_intr(sis_priv))
1681 printk(KERN_INFO "%s: Too much work at interrupt, "
1682 "interrupt status = %#8.8x.\n",
1683 net_dev->name, status);
1684 break;
1685 }
1686 } while (1);
1687
1688 if(netif_msg_intr(sis_priv))
1689 printk(KERN_DEBUG "%s: exiting interrupt, "
1690 "interrupt status = 0x%#8.8x.\n",
1691 net_dev->name, inl(ioaddr + isr));
6aa20a22 1692
1da177e4
LT
1693 spin_unlock (&sis_priv->lock);
1694 return IRQ_RETVAL(handled);
1695}
1696
1697/**
1698 * sis900_rx - sis900 receive routine
1699 * @net_dev: the net device which receives data
1700 *
6aa20a22 1701 * Process receive interrupt events,
1da177e4 1702 * put buffer to higher layer and refill buffer pool
0b28002f 1703 * Note: This function is called by interrupt handler,
1da177e4
LT
1704 * don't do "too much" work here
1705 */
1706
1707static int sis900_rx(struct net_device *net_dev)
1708{
1709 struct sis900_private *sis_priv = net_dev->priv;
1710 long ioaddr = net_dev->base_addr;
1711 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1712 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
7380a78a 1713 int rx_work_limit;
1da177e4
LT
1714
1715 if (netif_msg_rx_status(sis_priv))
1716 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1717 "status:0x%8.8x\n",
1718 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
7380a78a 1719 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1da177e4
LT
1720
1721 while (rx_status & OWN) {
1722 unsigned int rx_size;
d269a69f 1723 unsigned int data_size;
1da177e4 1724
7380a78a
VA
1725 if (--rx_work_limit < 0)
1726 break;
1727
d269a69f
DV
1728 data_size = rx_status & DSIZE;
1729 rx_size = data_size - CRC_SIZE;
1730
1731#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1732 /* ``TOOLONG'' flag means jumbo packet recived. */
1733 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE)
1734 rx_status &= (~ ((unsigned int)TOOLONG));
1735#endif
1da177e4
LT
1736
1737 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1738 /* corrupted packet received */
1739 if (netif_msg_rx_err(sis_priv))
1740 printk(KERN_DEBUG "%s: Corrupted packet "
d269a69f
DV
1741 "received, buffer status = 0x%8.8x/%d.\n",
1742 net_dev->name, rx_status, data_size);
1da177e4
LT
1743 sis_priv->stats.rx_errors++;
1744 if (rx_status & OVERRUN)
1745 sis_priv->stats.rx_over_errors++;
1746 if (rx_status & (TOOLONG|RUNT))
1747 sis_priv->stats.rx_length_errors++;
1748 if (rx_status & (RXISERR | FAERR))
1749 sis_priv->stats.rx_frame_errors++;
6aa20a22 1750 if (rx_status & CRCERR)
1da177e4
LT
1751 sis_priv->stats.rx_crc_errors++;
1752 /* reset buffer descriptor state */
1753 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1754 } else {
1755 struct sk_buff * skb;
1756
b748d9e3
NH
1757 pci_unmap_single(sis_priv->pci_dev,
1758 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1759 PCI_DMA_FROMDEVICE);
1760
1761 /* refill the Rx buffer, what if there is not enought
1762 * memory for new socket buffer ?? */
1763 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1764 /*
1765 * Not enough memory to refill the buffer
1766 * so we need to recycle the old one so
1767 * as to avoid creating a memory hole
1768 * in the rx ring
1769 */
1770 skb = sis_priv->rx_skbuff[entry];
1771 sis_priv->stats.rx_dropped++;
1772 goto refill_rx_ring;
1773 }
1774
1da177e4
LT
1775 /* This situation should never happen, but due to
1776 some unknow bugs, it is possible that
1777 we are working on NULL sk_buff :-( */
1778 if (sis_priv->rx_skbuff[entry] == NULL) {
1779 if (netif_msg_rx_err(sis_priv))
6aa20a22 1780 printk(KERN_WARNING "%s: NULL pointer "
7380a78a
VA
1781 "encountered in Rx ring\n"
1782 "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1783 net_dev->name, sis_priv->cur_rx,
1784 sis_priv->dirty_rx);
1da177e4
LT
1785 break;
1786 }
1787
1da177e4
LT
1788 /* give the socket buffer to upper layers */
1789 skb = sis_priv->rx_skbuff[entry];
1790 skb_put(skb, rx_size);
1791 skb->protocol = eth_type_trans(skb, net_dev);
1792 netif_rx(skb);
1793
1794 /* some network statistics */
1795 if ((rx_status & BCAST) == MCAST)
1796 sis_priv->stats.multicast++;
1797 net_dev->last_rx = jiffies;
1798 sis_priv->stats.rx_bytes += rx_size;
1799 sis_priv->stats.rx_packets++;
b748d9e3
NH
1800 sis_priv->dirty_rx++;
1801refill_rx_ring:
1da177e4
LT
1802 sis_priv->rx_skbuff[entry] = skb;
1803 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
6aa20a22
JG
1804 sis_priv->rx_ring[entry].bufptr =
1805 pci_map_single(sis_priv->pci_dev, skb->data,
1da177e4 1806 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1da177e4
LT
1807 }
1808 sis_priv->cur_rx++;
1809 entry = sis_priv->cur_rx % NUM_RX_DESC;
1810 rx_status = sis_priv->rx_ring[entry].cmdsts;
1811 } // while
1812
1813 /* refill the Rx buffer, what if the rate of refilling is slower
1814 * than consuming ?? */
7380a78a 1815 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1da177e4
LT
1816 struct sk_buff *skb;
1817
1818 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1819
1820 if (sis_priv->rx_skbuff[entry] == NULL) {
1821 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1822 /* not enough memory for skbuff, this makes a
1823 * "hole" on the buffer ring, it is not clear
1824 * how the hardware will react to this kind
1825 * of degenerated buffer */
1826 if (netif_msg_rx_err(sis_priv))
1827 printk(KERN_INFO "%s: Memory squeeze,"
1828 "deferring packet.\n",
1829 net_dev->name);
1830 sis_priv->stats.rx_dropped++;
1831 break;
1832 }
1da177e4
LT
1833 sis_priv->rx_skbuff[entry] = skb;
1834 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1835 sis_priv->rx_ring[entry].bufptr =
689be439 1836 pci_map_single(sis_priv->pci_dev, skb->data,
1da177e4
LT
1837 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1838 }
1839 }
1840 /* re-enable the potentially idle receive state matchine */
1841 outl(RxENA | inl(ioaddr + cr), ioaddr + cr );
1842
1843 return 0;
1844}
1845
1846/**
1847 * sis900_finish_xmit - finish up transmission of packets
1848 * @net_dev: the net device to be transmitted on
1849 *
6aa20a22 1850 * Check for error condition and free socket buffer etc
1da177e4 1851 * schedule for more transmission as needed
0b28002f 1852 * Note: This function is called by interrupt handler,
1da177e4
LT
1853 * don't do "too much" work here
1854 */
1855
1856static void sis900_finish_xmit (struct net_device *net_dev)
1857{
1858 struct sis900_private *sis_priv = net_dev->priv;
1859
1860 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1861 struct sk_buff *skb;
1862 unsigned int entry;
1863 u32 tx_status;
1864
1865 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1866 tx_status = sis_priv->tx_ring[entry].cmdsts;
1867
1868 if (tx_status & OWN) {
1869 /* The packet is not transmitted yet (owned by hardware) !
1870 * Note: the interrupt is generated only when Tx Machine
1871 * is idle, so this is an almost impossible case */
1872 break;
1873 }
1874
1875 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1876 /* packet unsuccessfully transmitted */
1877 if (netif_msg_tx_err(sis_priv))
1878 printk(KERN_DEBUG "%s: Transmit "
1879 "error, Tx status %8.8x.\n",
1880 net_dev->name, tx_status);
1881 sis_priv->stats.tx_errors++;
1882 if (tx_status & UNDERRUN)
1883 sis_priv->stats.tx_fifo_errors++;
1884 if (tx_status & ABORT)
1885 sis_priv->stats.tx_aborted_errors++;
1886 if (tx_status & NOCARRIER)
1887 sis_priv->stats.tx_carrier_errors++;
1888 if (tx_status & OWCOLL)
1889 sis_priv->stats.tx_window_errors++;
1890 } else {
1891 /* packet successfully transmitted */
1892 sis_priv->stats.collisions += (tx_status & COLCNT) >> 16;
1893 sis_priv->stats.tx_bytes += tx_status & DSIZE;
1894 sis_priv->stats.tx_packets++;
1895 }
1896 /* Free the original skb. */
1897 skb = sis_priv->tx_skbuff[entry];
6aa20a22 1898 pci_unmap_single(sis_priv->pci_dev,
1da177e4
LT
1899 sis_priv->tx_ring[entry].bufptr, skb->len,
1900 PCI_DMA_TODEVICE);
1901 dev_kfree_skb_irq(skb);
1902 sis_priv->tx_skbuff[entry] = NULL;
1903 sis_priv->tx_ring[entry].bufptr = 0;
1904 sis_priv->tx_ring[entry].cmdsts = 0;
1905 }
1906
1907 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1908 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1909 /* The ring is no longer full, clear tx_full and schedule
1910 * more transmission by netif_wake_queue(net_dev) */
1911 sis_priv->tx_full = 0;
1912 netif_wake_queue (net_dev);
1913 }
1914}
1915
1916/**
6aa20a22 1917 * sis900_close - close sis900 device
1da177e4
LT
1918 * @net_dev: the net device to be closed
1919 *
6aa20a22 1920 * Disable interrupts, stop the Tx and Rx Status Machine
1da177e4
LT
1921 * free Tx and RX socket buffer
1922 */
1923
1924static int sis900_close(struct net_device *net_dev)
1925{
1926 long ioaddr = net_dev->base_addr;
1927 struct sis900_private *sis_priv = net_dev->priv;
1928 struct sk_buff *skb;
1929 int i;
1930
1931 netif_stop_queue(net_dev);
1932
1933 /* Disable interrupts by clearing the interrupt mask. */
1934 outl(0x0000, ioaddr + imr);
1935 outl(0x0000, ioaddr + ier);
1936
1937 /* Stop the chip's Tx and Rx Status Machine */
1938 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
1939
1940 del_timer(&sis_priv->timer);
1941
1942 free_irq(net_dev->irq, net_dev);
1943
1944 /* Free Tx and RX skbuff */
1945 for (i = 0; i < NUM_RX_DESC; i++) {
1946 skb = sis_priv->rx_skbuff[i];
1947 if (skb) {
6aa20a22 1948 pci_unmap_single(sis_priv->pci_dev,
1da177e4
LT
1949 sis_priv->rx_ring[i].bufptr,
1950 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1951 dev_kfree_skb(skb);
1952 sis_priv->rx_skbuff[i] = NULL;
1953 }
1954 }
1955 for (i = 0; i < NUM_TX_DESC; i++) {
1956 skb = sis_priv->tx_skbuff[i];
1957 if (skb) {
6aa20a22 1958 pci_unmap_single(sis_priv->pci_dev,
1da177e4
LT
1959 sis_priv->tx_ring[i].bufptr, skb->len,
1960 PCI_DMA_TODEVICE);
1961 dev_kfree_skb(skb);
1962 sis_priv->tx_skbuff[i] = NULL;
1963 }
1964 }
1965
1966 /* Green! Put the chip in low-power mode. */
1967
1968 return 0;
1969}
1970
1971/**
1972 * sis900_get_drvinfo - Return information about driver
1973 * @net_dev: the net device to probe
1974 * @info: container for info returned
1975 *
1976 * Process ethtool command such as "ehtool -i" to show information
1977 */
6aa20a22 1978
1da177e4
LT
1979static void sis900_get_drvinfo(struct net_device *net_dev,
1980 struct ethtool_drvinfo *info)
1981{
1982 struct sis900_private *sis_priv = net_dev->priv;
1983
1984 strcpy (info->driver, SIS900_MODULE_NAME);
1985 strcpy (info->version, SIS900_DRV_VERSION);
1986 strcpy (info->bus_info, pci_name(sis_priv->pci_dev));
1987}
1988
1989static u32 sis900_get_msglevel(struct net_device *net_dev)
1990{
1991 struct sis900_private *sis_priv = net_dev->priv;
1992 return sis_priv->msg_enable;
1993}
6aa20a22 1994
1da177e4
LT
1995static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
1996{
1997 struct sis900_private *sis_priv = net_dev->priv;
1998 sis_priv->msg_enable = value;
1999}
2000
da369b01
DV
2001static u32 sis900_get_link(struct net_device *net_dev)
2002{
2003 struct sis900_private *sis_priv = net_dev->priv;
2004 return mii_link_ok(&sis_priv->mii_info);
2005}
2006
2007static int sis900_get_settings(struct net_device *net_dev,
2008 struct ethtool_cmd *cmd)
2009{
2010 struct sis900_private *sis_priv = net_dev->priv;
2011 spin_lock_irq(&sis_priv->lock);
2012 mii_ethtool_gset(&sis_priv->mii_info, cmd);
2013 spin_unlock_irq(&sis_priv->lock);
2014 return 0;
2015}
2016
2017static int sis900_set_settings(struct net_device *net_dev,
2018 struct ethtool_cmd *cmd)
2019{
2020 struct sis900_private *sis_priv = net_dev->priv;
2021 int rt;
2022 spin_lock_irq(&sis_priv->lock);
2023 rt = mii_ethtool_sset(&sis_priv->mii_info, cmd);
2024 spin_unlock_irq(&sis_priv->lock);
2025 return rt;
2026}
2027
2028static int sis900_nway_reset(struct net_device *net_dev)
2029{
2030 struct sis900_private *sis_priv = net_dev->priv;
2031 return mii_nway_restart(&sis_priv->mii_info);
2032}
2033
ea37ccea
DV
2034/**
2035 * sis900_set_wol - Set up Wake on Lan registers
2036 * @net_dev: the net device to probe
2037 * @wol: container for info passed to the driver
2038 *
2039 * Process ethtool command "wol" to setup wake on lan features.
2040 * SiS900 supports sending WoL events if a correct packet is received,
2041 * but there is no simple way to filter them to only a subset (broadcast,
2042 * multicast, unicast or arp).
2043 */
6aa20a22 2044
ea37ccea
DV
2045static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2046{
2047 struct sis900_private *sis_priv = net_dev->priv;
2048 long pmctrl_addr = net_dev->base_addr + pmctrl;
2049 u32 cfgpmcsr = 0, pmctrl_bits = 0;
2050
2051 if (wol->wolopts == 0) {
2052 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
7bef4b39 2053 cfgpmcsr &= ~PME_EN;
ea37ccea
DV
2054 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2055 outl(pmctrl_bits, pmctrl_addr);
2056 if (netif_msg_wol(sis_priv))
2057 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
2058 return 0;
2059 }
2060
2061 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST
2062 | WAKE_BCAST | WAKE_ARP))
2063 return -EINVAL;
2064
2065 if (wol->wolopts & WAKE_MAGIC)
2066 pmctrl_bits |= MAGICPKT;
2067 if (wol->wolopts & WAKE_PHY)
2068 pmctrl_bits |= LINKON;
6aa20a22 2069
ea37ccea
DV
2070 outl(pmctrl_bits, pmctrl_addr);
2071
2072 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2073 cfgpmcsr |= PME_EN;
2074 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2075 if (netif_msg_wol(sis_priv))
2076 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
2077
2078 return 0;
2079}
2080
2081static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2082{
2083 long pmctrl_addr = net_dev->base_addr + pmctrl;
2084 u32 pmctrl_bits;
2085
2086 pmctrl_bits = inl(pmctrl_addr);
2087 if (pmctrl_bits & MAGICPKT)
2088 wol->wolopts |= WAKE_MAGIC;
2089 if (pmctrl_bits & LINKON)
2090 wol->wolopts |= WAKE_PHY;
2091
2092 wol->supported = (WAKE_PHY | WAKE_MAGIC);
2093}
2094
7282d491 2095static const struct ethtool_ops sis900_ethtool_ops = {
1da177e4
LT
2096 .get_drvinfo = sis900_get_drvinfo,
2097 .get_msglevel = sis900_get_msglevel,
2098 .set_msglevel = sis900_set_msglevel,
da369b01
DV
2099 .get_link = sis900_get_link,
2100 .get_settings = sis900_get_settings,
2101 .set_settings = sis900_set_settings,
2102 .nway_reset = sis900_nway_reset,
ea37ccea
DV
2103 .get_wol = sis900_get_wol,
2104 .set_wol = sis900_set_wol
1da177e4
LT
2105};
2106
2107/**
6aa20a22 2108 * mii_ioctl - process MII i/o control command
1da177e4
LT
2109 * @net_dev: the net device to command for
2110 * @rq: parameter for command
2111 * @cmd: the i/o command
2112 *
2113 * Process MII command like read/write MII register
2114 */
2115
2116static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
2117{
2118 struct sis900_private *sis_priv = net_dev->priv;
2119 struct mii_ioctl_data *data = if_mii(rq);
2120
2121 switch(cmd) {
2122 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2123 data->phy_id = sis_priv->mii->phy_addr;
2124 /* Fall Through */
2125
2126 case SIOCGMIIREG: /* Read MII PHY register. */
2127 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2128 return 0;
2129
2130 case SIOCSMIIREG: /* Write MII PHY register. */
2131 if (!capable(CAP_NET_ADMIN))
2132 return -EPERM;
2133 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2134 return 0;
2135 default:
2136 return -EOPNOTSUPP;
2137 }
2138}
2139
2140/**
6aa20a22 2141 * sis900_get_stats - Get sis900 read/write statistics
1da177e4
LT
2142 * @net_dev: the net device to get statistics for
2143 *
2144 * get tx/rx statistics for sis900
2145 */
2146
2147static struct net_device_stats *
2148sis900_get_stats(struct net_device *net_dev)
2149{
2150 struct sis900_private *sis_priv = net_dev->priv;
2151
2152 return &sis_priv->stats;
2153}
2154
2155/**
6aa20a22 2156 * sis900_set_config - Set media type by net_device.set_config
1da177e4
LT
2157 * @dev: the net device for media type change
2158 * @map: ifmap passed by ifconfig
2159 *
2160 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
2161 * we support only port changes. All other runtime configuration
2162 * changes will be ignored
2163 */
2164
2165static int sis900_set_config(struct net_device *dev, struct ifmap *map)
6aa20a22 2166{
1da177e4
LT
2167 struct sis900_private *sis_priv = dev->priv;
2168 struct mii_phy *mii_phy = sis_priv->mii;
6aa20a22 2169
1da177e4
LT
2170 u16 status;
2171
2172 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
2173 /* we switch on the ifmap->port field. I couldn't find anything
2174 * like a definition or standard for the values of that field.
2175 * I think the meaning of those values is device specific. But
2176 * since I would like to change the media type via the ifconfig
6aa20a22 2177 * command I use the definition from linux/netdevice.h
1da177e4
LT
2178 * (which seems to be different from the ifport(pcmcia) definition) */
2179 switch(map->port){
6aa20a22 2180 case IF_PORT_UNKNOWN: /* use auto here */
1da177e4
LT
2181 dev->if_port = map->port;
2182 /* we are going to change the media type, so the Link
2183 * will be temporary down and we need to reflect that
2184 * here. When the Link comes up again, it will be
2185 * sensed by the sis_timer procedure, which also does
2186 * all the rest for us */
2187 netif_carrier_off(dev);
6aa20a22 2188
1da177e4
LT
2189 /* read current state */
2190 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
6aa20a22 2191
1da177e4
LT
2192 /* enable auto negotiation and reset the negotioation
2193 * (I don't really know what the auto negatiotiation
2194 * reset really means, but it sounds for me right to
2195 * do one here) */
2196 mdio_write(dev, mii_phy->phy_addr,
2197 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2198
2199 break;
6aa20a22
JG
2200
2201 case IF_PORT_10BASET: /* 10BaseT */
1da177e4 2202 dev->if_port = map->port;
6aa20a22 2203
1da177e4
LT
2204 /* we are going to change the media type, so the Link
2205 * will be temporary down and we need to reflect that
2206 * here. When the Link comes up again, it will be
2207 * sensed by the sis_timer procedure, which also does
2208 * all the rest for us */
2209 netif_carrier_off(dev);
6aa20a22 2210
1da177e4
LT
2211 /* set Speed to 10Mbps */
2212 /* read current state */
2213 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
6aa20a22 2214
1da177e4
LT
2215 /* disable auto negotiation and force 10MBit mode*/
2216 mdio_write(dev, mii_phy->phy_addr,
2217 MII_CONTROL, status & ~(MII_CNTL_SPEED |
2218 MII_CNTL_AUTO));
2219 break;
6aa20a22 2220
1da177e4 2221 case IF_PORT_100BASET: /* 100BaseT */
6aa20a22 2222 case IF_PORT_100BASETX: /* 100BaseTx */
1da177e4 2223 dev->if_port = map->port;
6aa20a22 2224
1da177e4
LT
2225 /* we are going to change the media type, so the Link
2226 * will be temporary down and we need to reflect that
2227 * here. When the Link comes up again, it will be
2228 * sensed by the sis_timer procedure, which also does
2229 * all the rest for us */
2230 netif_carrier_off(dev);
6aa20a22 2231
1da177e4
LT
2232 /* set Speed to 100Mbps */
2233 /* disable auto negotiation and enable 100MBit Mode */
2234 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2235 mdio_write(dev, mii_phy->phy_addr,
2236 MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2237 MII_CNTL_SPEED);
6aa20a22 2238
1da177e4 2239 break;
6aa20a22 2240
1da177e4
LT
2241 case IF_PORT_10BASE2: /* 10Base2 */
2242 case IF_PORT_AUI: /* AUI */
2243 case IF_PORT_100BASEFX: /* 100BaseFx */
2244 /* These Modes are not supported (are they?)*/
2245 return -EOPNOTSUPP;
2246 break;
6aa20a22 2247
1da177e4
LT
2248 default:
2249 return -EINVAL;
2250 }
2251 }
2252 return 0;
2253}
2254
2255/**
6aa20a22 2256 * sis900_mcast_bitnr - compute hashtable index
1da177e4
LT
2257 * @addr: multicast address
2258 * @revision: revision id of chip
2259 *
2260 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2261 * hash table, which makes this function a little bit different from other drivers
2262 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
6aa20a22 2263 * multicast hash table.
1da177e4
LT
2264 */
2265
2266static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2267{
2268
2269 u32 crc = ether_crc(6, addr);
2270
2271 /* leave 8 or 7 most siginifant bits */
2272 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2273 return ((int)(crc >> 24));
2274 else
2275 return ((int)(crc >> 25));
2276}
2277
2278/**
6aa20a22 2279 * set_rx_mode - Set SiS900 receive mode
1da177e4
LT
2280 * @net_dev: the net device to be set
2281 *
2282 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
2283 * And set the appropriate multicast filter.
2284 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
2285 */
2286
2287static void set_rx_mode(struct net_device *net_dev)
2288{
2289 long ioaddr = net_dev->base_addr;
2290 struct sis900_private * sis_priv = net_dev->priv;
2291 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2292 int i, table_entries;
2293 u32 rx_mode;
2294
7f927fcc 2295 /* 635 Hash Table entries = 256(2^16) */
1da177e4
LT
2296 if((sis_priv->chipset_rev >= SIS635A_900_REV) ||
2297 (sis_priv->chipset_rev == SIS900B_900_REV))
2298 table_entries = 16;
2299 else
2300 table_entries = 8;
2301
2302 if (net_dev->flags & IFF_PROMISC) {
2303 /* Accept any kinds of packets */
2304 rx_mode = RFPromiscuous;
2305 for (i = 0; i < table_entries; i++)
2306 mc_filter[i] = 0xffff;
2307 } else if ((net_dev->mc_count > multicast_filter_limit) ||
2308 (net_dev->flags & IFF_ALLMULTI)) {
2309 /* too many multicast addresses or accept all multicast packet */
2310 rx_mode = RFAAB | RFAAM;
2311 for (i = 0; i < table_entries; i++)
2312 mc_filter[i] = 0xffff;
2313 } else {
2314 /* Accept Broadcast packet, destination address matchs our
2315 * MAC address, use Receive Filter to reject unwanted MCAST
2316 * packets */
2317 struct dev_mc_list *mclist;
2318 rx_mode = RFAAB;
2319 for (i = 0, mclist = net_dev->mc_list;
2320 mclist && i < net_dev->mc_count;
2321 i++, mclist = mclist->next) {
2322 unsigned int bit_nr =
2323 sis900_mcast_bitnr(mclist->dmi_addr, sis_priv->chipset_rev);
2324 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2325 }
2326 }
2327
2328 /* update Multicast Hash Table in Receive Filter */
2329 for (i = 0; i < table_entries; i++) {
2330 /* why plus 0x04 ??, That makes the correct value for hash table. */
2331 outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr);
2332 outl(mc_filter[i], ioaddr + rfdr);
2333 }
2334
2335 outl(RFEN | rx_mode, ioaddr + rfcr);
2336
2337 /* sis900 is capable of looping back packets at MAC level for
2338 * debugging purpose */
2339 if (net_dev->flags & IFF_LOOPBACK) {
2340 u32 cr_saved;
2341 /* We must disable Tx/Rx before setting loopback mode */
2342 cr_saved = inl(ioaddr + cr);
2343 outl(cr_saved | TxDIS | RxDIS, ioaddr + cr);
2344 /* enable loopback */
2345 outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg);
2346 outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg);
2347 /* restore cr */
2348 outl(cr_saved, ioaddr + cr);
2349 }
2350
2351 return;
2352}
2353
2354/**
6aa20a22 2355 * sis900_reset - Reset sis900 MAC
1da177e4
LT
2356 * @net_dev: the net device to reset
2357 *
2358 * reset sis900 MAC and wait until finished
2359 * reset through command register
2360 * change backoff algorithm for 900B0 & 635 M/B
2361 */
2362
2363static void sis900_reset(struct net_device *net_dev)
2364{
2365 struct sis900_private * sis_priv = net_dev->priv;
2366 long ioaddr = net_dev->base_addr;
2367 int i = 0;
2368 u32 status = TxRCMP | RxRCMP;
2369
2370 outl(0, ioaddr + ier);
2371 outl(0, ioaddr + imr);
2372 outl(0, ioaddr + rfcr);
2373
2374 outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
6aa20a22 2375
1da177e4
LT
2376 /* Check that the chip has finished the reset. */
2377 while (status && (i++ < 1000)) {
2378 status ^= (inl(isr + ioaddr) & status);
2379 }
2380
2381 if( (sis_priv->chipset_rev >= SIS635A_900_REV) ||
2382 (sis_priv->chipset_rev == SIS900B_900_REV) )
2383 outl(PESEL | RND_CNT, ioaddr + cfg);
2384 else
2385 outl(PESEL, ioaddr + cfg);
2386}
2387
2388/**
6aa20a22 2389 * sis900_remove - Remove sis900 device
1da177e4
LT
2390 * @pci_dev: the pci device to be removed
2391 *
2392 * remove and release SiS900 net device
2393 */
2394
2395static void __devexit sis900_remove(struct pci_dev *pci_dev)
2396{
2397 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2398 struct sis900_private * sis_priv = net_dev->priv;
2399 struct mii_phy *phy = NULL;
2400
2401 while (sis_priv->first_mii) {
2402 phy = sis_priv->first_mii;
2403 sis_priv->first_mii = phy->next;
2404 kfree(phy);
2405 }
2406
2407 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2408 sis_priv->rx_ring_dma);
2409 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2410 sis_priv->tx_ring_dma);
2411 unregister_netdev(net_dev);
2412 free_netdev(net_dev);
2413 pci_release_regions(pci_dev);
2414 pci_set_drvdata(pci_dev, NULL);
2415}
2416
2417#ifdef CONFIG_PM
2418
2419static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2420{
2421 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2422 long ioaddr = net_dev->base_addr;
2423
2424 if(!netif_running(net_dev))
2425 return 0;
2426
2427 netif_stop_queue(net_dev);
2428 netif_device_detach(net_dev);
2429
2430 /* Stop the chip's Tx and Rx Status Machine */
2431 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
2432
2433 pci_set_power_state(pci_dev, PCI_D3hot);
2434 pci_save_state(pci_dev);
2435
2436 return 0;
2437}
2438
2439static int sis900_resume(struct pci_dev *pci_dev)
2440{
2441 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2442 struct sis900_private *sis_priv = net_dev->priv;
2443 long ioaddr = net_dev->base_addr;
2444
2445 if(!netif_running(net_dev))
2446 return 0;
2447 pci_restore_state(pci_dev);
2448 pci_set_power_state(pci_dev, PCI_D0);
2449
2450 sis900_init_rxfilter(net_dev);
2451
2452 sis900_init_tx_ring(net_dev);
2453 sis900_init_rx_ring(net_dev);
2454
2455 set_rx_mode(net_dev);
2456
2457 netif_device_attach(net_dev);
2458 netif_start_queue(net_dev);
2459
2460 /* Workaround for EDB */
2461 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2462
2463 /* Enable all known interrupts by setting the interrupt mask. */
2464 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
2465 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
2466 outl(IE, ioaddr + ier);
2467
2468 sis900_check_mode(net_dev, sis_priv->mii);
2469
2470 return 0;
2471}
2472#endif /* CONFIG_PM */
2473
2474static struct pci_driver sis900_pci_driver = {
2475 .name = SIS900_MODULE_NAME,
2476 .id_table = sis900_pci_tbl,
2477 .probe = sis900_probe,
2478 .remove = __devexit_p(sis900_remove),
2479#ifdef CONFIG_PM
2480 .suspend = sis900_suspend,
2481 .resume = sis900_resume,
2482#endif /* CONFIG_PM */
2483};
2484
2485static int __init sis900_init_module(void)
2486{
2487/* when a module, this is printed whether or not devices are found in probe */
2488#ifdef MODULE
2489 printk(version);
2490#endif
2491
29917620 2492 return pci_register_driver(&sis900_pci_driver);
1da177e4
LT
2493}
2494
2495static void __exit sis900_cleanup_module(void)
2496{
2497 pci_unregister_driver(&sis900_pci_driver);
2498}
2499
2500module_init(sis900_init_module);
2501module_exit(sis900_cleanup_module);
2502