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1da177e4 1/* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
6aa20a22 2 Copyright 1999 Silicon Integrated System Corporation
d269a69f 3 Revision: 1.08.10 Apr. 2 2006
6aa20a22 4
1da177e4 5 Modified from the driver which is originally written by Donald Becker.
6aa20a22 6
1da177e4
LT
7 This software may be used and distributed according to the terms
8 of the GNU General Public License (GPL), incorporated herein by reference.
9 Drivers based on this skeleton fall under the GPL and must retain
10 the authorship (implicit copyright) notice.
6aa20a22 11
1da177e4
LT
12 References:
13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14 preliminary Rev. 1.0 Jan. 14, 1998
15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16 preliminary Rev. 1.0 Nov. 10, 1998
17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18 preliminary Rev. 1.0 Jan. 18, 1998
19
d269a69f 20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support
ea37ccea 21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support
1da177e4 22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
d269a69f 23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support
1da177e4
LT
24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
6aa20a22 32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
1da177e4
LT
33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E eqaulizer workaround rule
40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
50*/
51
52#include <linux/module.h>
53#include <linux/moduleparam.h>
54#include <linux/kernel.h>
55#include <linux/string.h>
56#include <linux/timer.h>
57#include <linux/errno.h>
58#include <linux/ioport.h>
59#include <linux/slab.h>
60#include <linux/interrupt.h>
61#include <linux/pci.h>
62#include <linux/netdevice.h>
63#include <linux/init.h>
64#include <linux/mii.h>
65#include <linux/etherdevice.h>
66#include <linux/skbuff.h>
67#include <linux/delay.h>
68#include <linux/ethtool.h>
69#include <linux/crc32.h>
70#include <linux/bitops.h>
12b279f9 71#include <linux/dma-mapping.h>
1da177e4
LT
72
73#include <asm/processor.h> /* Processor type for cache alignment. */
74#include <asm/io.h>
75#include <asm/irq.h>
76#include <asm/uaccess.h> /* User space memory access functions */
77
78#include "sis900.h"
79
80#define SIS900_MODULE_NAME "sis900"
d269a69f 81#define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006"
1da177e4
LT
82
83static char version[] __devinitdata =
84KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
85
86static int max_interrupt_work = 40;
87static int multicast_filter_limit = 128;
88
89static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
90
91#define SIS900_DEF_MSG \
92 (NETIF_MSG_DRV | \
93 NETIF_MSG_LINK | \
94 NETIF_MSG_RX_ERR | \
95 NETIF_MSG_TX_ERR)
96
97/* Time in jiffies before concluding the transmitter is hung. */
98#define TX_TIMEOUT (4*HZ)
1da177e4
LT
99
100enum {
101 SIS_900 = 0,
102 SIS_7016
103};
f71e1309 104static const char * card_names[] = {
1da177e4
LT
105 "SiS 900 PCI Fast Ethernet",
106 "SiS 7016 PCI Fast Ethernet"
107};
108static struct pci_device_id sis900_pci_tbl [] = {
109 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
110 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
111 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
112 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
113 {0,}
114};
115MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
116
117static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
118
f71e1309 119static const struct mii_chip_info {
1da177e4
LT
120 const char * name;
121 u16 phy_id0;
122 u16 phy_id1;
123 u8 phy_types;
124#define HOME 0x0001
125#define LAN 0x0002
126#define MIX 0x0003
127#define UNKNOWN 0x0
128} mii_chip_table[] = {
129 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
130 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
d8e95e52 131 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN },
1da177e4 132 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
494aced2 133 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN },
1da177e4
LT
134 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
135 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
136 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
80a8003f 137 { "ICS LAN PHY", 0x0143, 0xBC70, LAN },
1da177e4
LT
138 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
139 { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
140 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
141 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
142 {NULL,},
143};
144
145struct mii_phy {
146 struct mii_phy * next;
147 int phy_addr;
148 u16 phy_id0;
149 u16 phy_id1;
150 u16 status;
151 u8 phy_types;
152};
153
154typedef struct _BufferDesc {
155 u32 link;
156 u32 cmdsts;
157 u32 bufptr;
158} BufferDesc;
159
160struct sis900_private {
1da177e4
LT
161 struct pci_dev * pci_dev;
162
163 spinlock_t lock;
164
165 struct mii_phy * mii;
166 struct mii_phy * first_mii; /* record the first mii structure */
167 unsigned int cur_phy;
da369b01 168 struct mii_if_info mii_info;
1da177e4
LT
169
170 struct timer_list timer; /* Link status detection timer. */
171 u8 autong_complete; /* 1: auto-negotiate complete */
172
173 u32 msg_enable;
174
175 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
176 unsigned int cur_tx, dirty_tx;
177
178 /* The saved address of a sent/receive-in-place packet buffer */
179 struct sk_buff *tx_skbuff[NUM_TX_DESC];
180 struct sk_buff *rx_skbuff[NUM_RX_DESC];
181 BufferDesc *tx_ring;
182 BufferDesc *rx_ring;
183
184 dma_addr_t tx_ring_dma;
185 dma_addr_t rx_ring_dma;
186
187 unsigned int tx_full; /* The Tx queue is full. */
188 u8 host_bridge_rev;
189 u8 chipset_rev;
190};
191
192MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
193MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
194MODULE_LICENSE("GPL");
195
196module_param(multicast_filter_limit, int, 0444);
197module_param(max_interrupt_work, int, 0444);
198module_param(sis900_debug, int, 0444);
199MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
200MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
201MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
202
203#ifdef CONFIG_NET_POLL_CONTROLLER
204static void sis900_poll(struct net_device *dev);
205#endif
206static int sis900_open(struct net_device *net_dev);
207static int sis900_mii_probe (struct net_device * net_dev);
208static void sis900_init_rxfilter (struct net_device * net_dev);
209static u16 read_eeprom(long ioaddr, int location);
da369b01 210static int mdio_read(struct net_device *net_dev, int phy_id, int location);
1da177e4
LT
211static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
212static void sis900_timer(unsigned long data);
213static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
214static void sis900_tx_timeout(struct net_device *net_dev);
215static void sis900_init_tx_ring(struct net_device *net_dev);
216static void sis900_init_rx_ring(struct net_device *net_dev);
217static int sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
218static int sis900_rx(struct net_device *net_dev);
219static void sis900_finish_xmit (struct net_device *net_dev);
7d12e780 220static irqreturn_t sis900_interrupt(int irq, void *dev_instance);
1da177e4
LT
221static int sis900_close(struct net_device *net_dev);
222static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
1da177e4
LT
223static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
224static void set_rx_mode(struct net_device *net_dev);
225static void sis900_reset(struct net_device *net_dev);
226static void sis630_set_eq(struct net_device *net_dev, u8 revision);
227static int sis900_set_config(struct net_device *dev, struct ifmap *map);
228static u16 sis900_default_phy(struct net_device * net_dev);
229static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
230static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
231static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
232static void sis900_set_mode (long ioaddr, int speed, int duplex);
7282d491 233static const struct ethtool_ops sis900_ethtool_ops;
1da177e4
LT
234
235/**
236 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
237 * @pci_dev: the sis900 pci device
6aa20a22 238 * @net_dev: the net device to get address for
1da177e4
LT
239 *
240 * Older SiS900 and friends, use EEPROM to store MAC address.
241 * MAC address is read from read_eeprom() into @net_dev->dev_addr.
242 */
243
244static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
245{
246 long ioaddr = pci_resource_start(pci_dev, 0);
247 u16 signature;
248 int i;
249
250 /* check to see if we have sane EEPROM */
6aa20a22 251 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
1da177e4 252 if (signature == 0xffff || signature == 0x0000) {
6aa20a22 253 printk (KERN_WARNING "%s: Error EERPOM read %x\n",
1da177e4
LT
254 pci_name(pci_dev), signature);
255 return 0;
256 }
257
258 /* get MAC address from EEPROM */
259 for (i = 0; i < 3; i++)
260 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
261
262 return 1;
263}
264
265/**
266 * sis630e_get_mac_addr - Get MAC address for SiS630E model
267 * @pci_dev: the sis900 pci device
6aa20a22 268 * @net_dev: the net device to get address for
1da177e4
LT
269 *
270 * SiS630E model, use APC CMOS RAM to store MAC address.
271 * APC CMOS RAM is accessed through ISA bridge.
272 * MAC address is read into @net_dev->dev_addr.
273 */
274
275static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,
276 struct net_device *net_dev)
277{
278 struct pci_dev *isa_bridge = NULL;
279 u8 reg;
280 int i;
281
282 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
283 if (!isa_bridge)
284 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
285 if (!isa_bridge) {
286 printk(KERN_WARNING "%s: Can not find ISA bridge\n",
287 pci_name(pci_dev));
288 return 0;
289 }
290 pci_read_config_byte(isa_bridge, 0x48, &reg);
291 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
292
293 for (i = 0; i < 6; i++) {
294 outb(0x09 + i, 0x70);
6aa20a22 295 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
1da177e4
LT
296 }
297 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
298 pci_dev_put(isa_bridge);
299
300 return 1;
301}
302
303
304/**
305 * sis635_get_mac_addr - Get MAC address for SIS635 model
306 * @pci_dev: the sis900 pci device
6aa20a22 307 * @net_dev: the net device to get address for
1da177e4
LT
308 *
309 * SiS635 model, set MAC Reload Bit to load Mac address from APC
6aa20a22 310 * to rfdr. rfdr is accessed through rfcr. MAC address is read into
1da177e4
LT
311 * @net_dev->dev_addr.
312 */
313
314static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
315 struct net_device *net_dev)
316{
317 long ioaddr = net_dev->base_addr;
318 u32 rfcrSave;
319 u32 i;
320
321 rfcrSave = inl(rfcr + ioaddr);
322
323 outl(rfcrSave | RELOAD, ioaddr + cr);
324 outl(0, ioaddr + cr);
325
326 /* disable packet filtering before setting filter */
327 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
328
329 /* load MAC addr to filter data register */
330 for (i = 0 ; i < 3 ; i++) {
331 outl((i << RFADDR_shift), ioaddr + rfcr);
332 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
333 }
334
335 /* enable packet filtering */
336 outl(rfcrSave | RFEN, rfcr + ioaddr);
337
338 return 1;
339}
340
341/**
342 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
343 * @pci_dev: the sis900 pci device
6aa20a22 344 * @net_dev: the net device to get address for
1da177e4 345 *
6aa20a22 346 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
1da177e4 347 * is shared by
6aa20a22
JG
348 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
349 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
1da177e4 350 * by LAN, otherwise is not. After MAC address is read from EEPROM, send
6aa20a22
JG
351 * EEDONE signal to refuse EEPROM access by LAN.
352 * The EEPROM map of SiS962 or SiS963 is different to SiS900.
353 * The signature field in SiS962 or SiS963 spec is meaningless.
1da177e4
LT
354 * MAC address is read into @net_dev->dev_addr.
355 */
356
357static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
358 struct net_device *net_dev)
359{
360 long ioaddr = net_dev->base_addr;
361 long ee_addr = ioaddr + mear;
362 u32 waittime = 0;
363 int i;
6aa20a22 364
1da177e4
LT
365 outl(EEREQ, ee_addr);
366 while(waittime < 2000) {
367 if(inl(ee_addr) & EEGNT) {
368
369 /* get MAC address from EEPROM */
370 for (i = 0; i < 3; i++)
371 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
372
373 outl(EEDONE, ee_addr);
374 return 1;
375 } else {
6aa20a22 376 udelay(1);
1da177e4
LT
377 waittime ++;
378 }
379 }
380 outl(EEDONE, ee_addr);
381 return 0;
382}
383
384/**
385 * sis900_probe - Probe for sis900 device
386 * @pci_dev: the sis900 pci device
387 * @pci_id: the pci device ID
388 *
389 * Check and probe sis900 net device for @pci_dev.
6aa20a22 390 * Get mac address according to the chip revision,
1da177e4
LT
391 * and assign SiS900-specific entries in the device structure.
392 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
393 */
394
395static int __devinit sis900_probe(struct pci_dev *pci_dev,
396 const struct pci_device_id *pci_id)
397{
398 struct sis900_private *sis_priv;
399 struct net_device *net_dev;
400 struct pci_dev *dev;
401 dma_addr_t ring_dma;
402 void *ring_space;
403 long ioaddr;
404 int i, ret;
f71e1309 405 const char *card_name = card_names[pci_id->driver_data];
1da177e4
LT
406 const char *dev_name = pci_name(pci_dev);
407
408/* when built into the kernel, we only print version if device is found */
409#ifndef MODULE
410 static int printed_version;
411 if (!printed_version++)
412 printk(version);
413#endif
414
415 /* setup various bits in PCI command register */
416 ret = pci_enable_device(pci_dev);
417 if(ret) return ret;
6aa20a22 418
12b279f9 419 i = pci_set_dma_mask(pci_dev, DMA_32BIT_MASK);
1da177e4
LT
420 if(i){
421 printk(KERN_ERR "sis900.c: architecture does not support"
422 "32bit PCI busmaster DMA\n");
423 return i;
424 }
6aa20a22 425
1da177e4 426 pci_set_master(pci_dev);
6aa20a22 427
1da177e4
LT
428 net_dev = alloc_etherdev(sizeof(struct sis900_private));
429 if (!net_dev)
430 return -ENOMEM;
1da177e4
LT
431 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
432
433 /* We do a request_region() to register /proc/ioports info. */
6aa20a22 434 ioaddr = pci_resource_start(pci_dev, 0);
1da177e4
LT
435 ret = pci_request_regions(pci_dev, "sis900");
436 if (ret)
437 goto err_out;
438
439 sis_priv = net_dev->priv;
440 net_dev->base_addr = ioaddr;
441 net_dev->irq = pci_dev->irq;
442 sis_priv->pci_dev = pci_dev;
443 spin_lock_init(&sis_priv->lock);
444
445 pci_set_drvdata(pci_dev, net_dev);
446
447 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
448 if (!ring_space) {
449 ret = -ENOMEM;
450 goto err_out_cleardev;
451 }
452 sis_priv->tx_ring = (BufferDesc *)ring_space;
453 sis_priv->tx_ring_dma = ring_dma;
454
455 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
456 if (!ring_space) {
457 ret = -ENOMEM;
458 goto err_unmap_tx;
459 }
460 sis_priv->rx_ring = (BufferDesc *)ring_space;
461 sis_priv->rx_ring_dma = ring_dma;
6aa20a22 462
1da177e4
LT
463 /* The SiS900-specific entries in the device structure. */
464 net_dev->open = &sis900_open;
465 net_dev->hard_start_xmit = &sis900_start_xmit;
466 net_dev->stop = &sis900_close;
1da177e4
LT
467 net_dev->set_config = &sis900_set_config;
468 net_dev->set_multicast_list = &set_rx_mode;
469 net_dev->do_ioctl = &mii_ioctl;
470 net_dev->tx_timeout = sis900_tx_timeout;
471 net_dev->watchdog_timeo = TX_TIMEOUT;
472 net_dev->ethtool_ops = &sis900_ethtool_ops;
473
474#ifdef CONFIG_NET_POLL_CONTROLLER
475 net_dev->poll_controller = &sis900_poll;
476#endif
477
478 if (sis900_debug > 0)
479 sis_priv->msg_enable = sis900_debug;
480 else
481 sis_priv->msg_enable = SIS900_DEF_MSG;
da369b01
DV
482
483 sis_priv->mii_info.dev = net_dev;
484 sis_priv->mii_info.mdio_read = mdio_read;
485 sis_priv->mii_info.mdio_write = mdio_write;
486 sis_priv->mii_info.phy_id_mask = 0x1f;
487 sis_priv->mii_info.reg_num_mask = 0x1f;
488
1da177e4
LT
489 /* Get Mac address according to the chip revision */
490 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &(sis_priv->chipset_rev));
491 if(netif_msg_probe(sis_priv))
492 printk(KERN_DEBUG "%s: detected revision %2.2x, "
493 "trying to get MAC address...\n",
494 dev_name, sis_priv->chipset_rev);
6aa20a22 495
1da177e4
LT
496 ret = 0;
497 if (sis_priv->chipset_rev == SIS630E_900_REV)
498 ret = sis630e_get_mac_addr(pci_dev, net_dev);
499 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
500 ret = sis635_get_mac_addr(pci_dev, net_dev);
501 else if (sis_priv->chipset_rev == SIS96x_900_REV)
502 ret = sis96x_get_mac_addr(pci_dev, net_dev);
503 else
504 ret = sis900_get_mac_addr(pci_dev, net_dev);
505
506 if (ret == 0) {
507 printk(KERN_WARNING "%s: Cannot read MAC address.\n", dev_name);
508 ret = -ENODEV;
509 goto err_unmap_rx;
510 }
6aa20a22 511
1da177e4
LT
512 /* 630ET : set the mii access mode as software-mode */
513 if (sis_priv->chipset_rev == SIS630ET_900_REV)
514 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
515
516 /* probe for mii transceiver */
517 if (sis900_mii_probe(net_dev) == 0) {
518 printk(KERN_WARNING "%s: Error probing MII device.\n",
519 dev_name);
520 ret = -ENODEV;
521 goto err_unmap_rx;
522 }
523
524 /* save our host bridge revision */
525 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
526 if (dev) {
527 pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev);
528 pci_dev_put(dev);
529 }
530
531 ret = register_netdev(net_dev);
532 if (ret)
533 goto err_unmap_rx;
534
535 /* print some information about our NIC */
536 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, ", net_dev->name,
537 card_name, ioaddr, net_dev->irq);
538 for (i = 0; i < 5; i++)
539 printk("%2.2x:", (u8)net_dev->dev_addr[i]);
540 printk("%2.2x.\n", net_dev->dev_addr[i]);
541
ea37ccea 542 /* Detect Wake on Lan support */
7bef4b39 543 ret = (inl(net_dev->base_addr + CFGPMC) & PMESP) >> 27;
ea37ccea
DV
544 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
545 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
546
1da177e4
LT
547 return 0;
548
549 err_unmap_rx:
550 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
551 sis_priv->rx_ring_dma);
552 err_unmap_tx:
553 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
554 sis_priv->tx_ring_dma);
555 err_out_cleardev:
556 pci_set_drvdata(pci_dev, NULL);
557 pci_release_regions(pci_dev);
558 err_out:
559 free_netdev(net_dev);
560 return ret;
561}
562
563/**
564 * sis900_mii_probe - Probe MII PHY for sis900
565 * @net_dev: the net device to probe for
6aa20a22 566 *
1da177e4
LT
567 * Search for total of 32 possible mii phy addresses.
568 * Identify and set current phy if found one,
569 * return error if it failed to found.
570 */
571
4e50a8e3 572static int __devinit sis900_mii_probe(struct net_device * net_dev)
1da177e4
LT
573{
574 struct sis900_private * sis_priv = net_dev->priv;
575 const char *dev_name = pci_name(sis_priv->pci_dev);
576 u16 poll_bit = MII_STAT_LINK, status = 0;
577 unsigned long timeout = jiffies + 5 * HZ;
578 int phy_addr;
579
580 sis_priv->mii = NULL;
581
582 /* search for total of 32 possible mii phy addresses */
6aa20a22 583 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
1da177e4
LT
584 struct mii_phy * mii_phy = NULL;
585 u16 mii_status;
586 int i;
587
588 mii_phy = NULL;
589 for(i = 0; i < 2; i++)
590 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
591
592 if (mii_status == 0xffff || mii_status == 0x0000) {
593 if (netif_msg_probe(sis_priv))
594 printk(KERN_DEBUG "%s: MII at address %d"
595 " not accessible\n",
596 dev_name, phy_addr);
597 continue;
598 }
6aa20a22 599
1da177e4
LT
600 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
601 printk(KERN_WARNING "Cannot allocate mem for struct mii_phy\n");
602 mii_phy = sis_priv->first_mii;
603 while (mii_phy) {
604 struct mii_phy *phy;
605 phy = mii_phy;
606 mii_phy = mii_phy->next;
607 kfree(phy);
608 }
609 return 0;
610 }
6aa20a22 611
1da177e4 612 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
6aa20a22 613 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
1da177e4
LT
614 mii_phy->phy_addr = phy_addr;
615 mii_phy->status = mii_status;
616 mii_phy->next = sis_priv->mii;
617 sis_priv->mii = mii_phy;
618 sis_priv->first_mii = mii_phy;
619
620 for (i = 0; mii_chip_table[i].phy_id1; i++)
621 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
622 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
623 mii_phy->phy_types = mii_chip_table[i].phy_types;
624 if (mii_chip_table[i].phy_types == MIX)
625 mii_phy->phy_types =
626 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
627 printk(KERN_INFO "%s: %s transceiver found "
628 "at address %d.\n",
629 dev_name,
630 mii_chip_table[i].name,
631 phy_addr);
632 break;
633 }
6aa20a22 634
1da177e4
LT
635 if( !mii_chip_table[i].phy_id1 ) {
636 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
637 dev_name, phy_addr);
638 mii_phy->phy_types = UNKNOWN;
639 }
640 }
6aa20a22 641
1da177e4
LT
642 if (sis_priv->mii == NULL) {
643 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
644 return 0;
645 }
646
647 /* select default PHY for mac */
648 sis_priv->mii = NULL;
649 sis900_default_phy( net_dev );
650
651 /* Reset phy if default phy is internal sis900 */
652 if ((sis_priv->mii->phy_id0 == 0x001D) &&
653 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
654 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
6aa20a22 655
1da177e4
LT
656 /* workaround for ICS1893 PHY */
657 if ((sis_priv->mii->phy_id0 == 0x0015) &&
658 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
659 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
660
661 if(status & MII_STAT_LINK){
662 while (poll_bit) {
663 yield();
664
665 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
666 if (time_after_eq(jiffies, timeout)) {
667 printk(KERN_WARNING "%s: reset phy and link down now\n",
668 dev_name);
669 return -ETIME;
670 }
671 }
672 }
673
674 if (sis_priv->chipset_rev == SIS630E_900_REV) {
675 /* SiS 630E has some bugs on default value of PHY registers */
676 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
677 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
678 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
679 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
6aa20a22 680 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
1da177e4
LT
681 }
682
683 if (sis_priv->mii->status & MII_STAT_LINK)
684 netif_carrier_on(net_dev);
685 else
686 netif_carrier_off(net_dev);
687
688 return 1;
689}
690
691/**
692 * sis900_default_phy - Select default PHY for sis900 mac.
693 * @net_dev: the net device to probe for
694 *
695 * Select first detected PHY with link as default.
696 * If no one is link on, select PHY whose types is HOME as default.
697 * If HOME doesn't exist, select LAN.
698 */
699
700static u16 sis900_default_phy(struct net_device * net_dev)
701{
702 struct sis900_private * sis_priv = net_dev->priv;
6aa20a22 703 struct mii_phy *phy = NULL, *phy_home = NULL,
1da177e4
LT
704 *default_phy = NULL, *phy_lan = NULL;
705 u16 status;
706
707 for (phy=sis_priv->first_mii; phy; phy=phy->next) {
708 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
709 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
710
711 /* Link ON & Not select default PHY & not ghost PHY */
712 if ((status & MII_STAT_LINK) && !default_phy &&
713 (phy->phy_types != UNKNOWN))
714 default_phy = phy;
715 else {
716 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
717 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
718 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
719 if (phy->phy_types == HOME)
720 phy_home = phy;
721 else if(phy->phy_types == LAN)
722 phy_lan = phy;
723 }
724 }
725
726 if (!default_phy && phy_home)
727 default_phy = phy_home;
728 else if (!default_phy && phy_lan)
729 default_phy = phy_lan;
730 else if (!default_phy)
731 default_phy = sis_priv->first_mii;
732
733 if (sis_priv->mii != default_phy) {
734 sis_priv->mii = default_phy;
735 sis_priv->cur_phy = default_phy->phy_addr;
736 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
737 pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
738 }
6aa20a22 739
da369b01
DV
740 sis_priv->mii_info.phy_id = sis_priv->cur_phy;
741
1da177e4
LT
742 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
743 status &= (~MII_CNTL_ISOLATE);
744
6aa20a22 745 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
1da177e4
LT
746 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
747 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
748
6aa20a22 749 return status;
1da177e4
LT
750}
751
752
753/**
754 * sis900_set_capability - set the media capability of network adapter.
755 * @net_dev : the net device to probe for
756 * @phy : default PHY
757 *
758 * Set the media capability of network adapter according to
759 * mii status register. It's necessary before auto-negotiate.
760 */
6aa20a22 761
1da177e4
LT
762static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
763{
764 u16 cap;
765 u16 status;
6aa20a22 766
1da177e4
LT
767 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
768 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
6aa20a22 769
1da177e4
LT
770 cap = MII_NWAY_CSMA_CD |
771 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
772 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
773 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
774 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
775
776 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
777}
778
779
780/* Delay between EEPROM clock transitions. */
781#define eeprom_delay() inl(ee_addr)
782
783/**
784 * read_eeprom - Read Serial EEPROM
785 * @ioaddr: base i/o address
786 * @location: the EEPROM location to read
787 *
788 * Read Serial EEPROM through EEPROM Access Register.
789 * Note that location is in word (16 bits) unit
790 */
791
792static u16 __devinit read_eeprom(long ioaddr, int location)
793{
794 int i;
795 u16 retval = 0;
796 long ee_addr = ioaddr + mear;
797 u32 read_cmd = location | EEread;
798
799 outl(0, ee_addr);
800 eeprom_delay();
801 outl(EECS, ee_addr);
802 eeprom_delay();
803
804 /* Shift the read command (9) bits out. */
805 for (i = 8; i >= 0; i--) {
806 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
807 outl(dataval, ee_addr);
808 eeprom_delay();
809 outl(dataval | EECLK, ee_addr);
810 eeprom_delay();
811 }
812 outl(EECS, ee_addr);
813 eeprom_delay();
814
815 /* read the 16-bits data in */
816 for (i = 16; i > 0; i--) {
817 outl(EECS, ee_addr);
818 eeprom_delay();
819 outl(EECS | EECLK, ee_addr);
820 eeprom_delay();
821 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
822 eeprom_delay();
823 }
824
825 /* Terminate the EEPROM access. */
826 outl(0, ee_addr);
827 eeprom_delay();
828
829 return (retval);
830}
831
832/* Read and write the MII management registers using software-generated
833 serial MDIO protocol. Note that the command bits and data bits are
834 send out separately */
835#define mdio_delay() inl(mdio_addr)
836
837static void mdio_idle(long mdio_addr)
838{
839 outl(MDIO | MDDIR, mdio_addr);
840 mdio_delay();
841 outl(MDIO | MDDIR | MDC, mdio_addr);
842}
843
844/* Syncronize the MII management interface by shifting 32 one bits out. */
845static void mdio_reset(long mdio_addr)
846{
847 int i;
848
849 for (i = 31; i >= 0; i--) {
850 outl(MDDIR | MDIO, mdio_addr);
851 mdio_delay();
852 outl(MDDIR | MDIO | MDC, mdio_addr);
853 mdio_delay();
854 }
855 return;
856}
857
858/**
859 * mdio_read - read MII PHY register
860 * @net_dev: the net device to read
861 * @phy_id: the phy address to read
862 * @location: the phy regiester id to read
863 *
864 * Read MII registers through MDIO and MDC
865 * using MDIO management frame structure and protocol(defined by ISO/IEC).
866 * Please see SiS7014 or ICS spec
867 */
868
da369b01 869static int mdio_read(struct net_device *net_dev, int phy_id, int location)
1da177e4
LT
870{
871 long mdio_addr = net_dev->base_addr + mear;
872 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
873 u16 retval = 0;
874 int i;
875
876 mdio_reset(mdio_addr);
877 mdio_idle(mdio_addr);
878
879 for (i = 15; i >= 0; i--) {
880 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
881 outl(dataval, mdio_addr);
882 mdio_delay();
883 outl(dataval | MDC, mdio_addr);
884 mdio_delay();
885 }
886
887 /* Read the 16 data bits. */
888 for (i = 16; i > 0; i--) {
889 outl(0, mdio_addr);
890 mdio_delay();
891 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
892 outl(MDC, mdio_addr);
893 mdio_delay();
894 }
895 outl(0x00, mdio_addr);
896
897 return retval;
898}
899
900/**
901 * mdio_write - write MII PHY register
902 * @net_dev: the net device to write
903 * @phy_id: the phy address to write
904 * @location: the phy regiester id to write
905 * @value: the register value to write with
906 *
907 * Write MII registers with @value through MDIO and MDC
908 * using MDIO management frame structure and protocol(defined by ISO/IEC)
909 * please see SiS7014 or ICS spec
910 */
911
912static void mdio_write(struct net_device *net_dev, int phy_id, int location,
913 int value)
914{
915 long mdio_addr = net_dev->base_addr + mear;
916 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
917 int i;
918
919 mdio_reset(mdio_addr);
920 mdio_idle(mdio_addr);
921
922 /* Shift the command bits out. */
923 for (i = 15; i >= 0; i--) {
924 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
925 outb(dataval, mdio_addr);
926 mdio_delay();
927 outb(dataval | MDC, mdio_addr);
928 mdio_delay();
929 }
930 mdio_delay();
931
932 /* Shift the value bits out. */
933 for (i = 15; i >= 0; i--) {
934 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
935 outl(dataval, mdio_addr);
936 mdio_delay();
937 outl(dataval | MDC, mdio_addr);
938 mdio_delay();
939 }
940 mdio_delay();
941
942 /* Clear out extra bits. */
943 for (i = 2; i > 0; i--) {
944 outb(0, mdio_addr);
945 mdio_delay();
946 outb(MDC, mdio_addr);
947 mdio_delay();
948 }
949 outl(0x00, mdio_addr);
950
951 return;
952}
953
954
955/**
956 * sis900_reset_phy - reset sis900 mii phy.
957 * @net_dev: the net device to write
958 * @phy_addr: default phy address
959 *
960 * Some specific phy can't work properly without reset.
961 * This function will be called during initialization and
962 * link status change from ON to DOWN.
963 */
964
965static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
966{
f3be9742 967 int i;
1da177e4
LT
968 u16 status;
969
f3be9742 970 for (i = 0; i < 2; i++)
1da177e4
LT
971 status = mdio_read(net_dev, phy_addr, MII_STATUS);
972
973 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
6aa20a22 974
1da177e4
LT
975 return status;
976}
977
978#ifdef CONFIG_NET_POLL_CONTROLLER
979/*
980 * Polling 'interrupt' - used by things like netconsole to send skbs
981 * without having to re-enable interrupts. It's not called while
982 * the interrupt routine is executing.
983*/
984static void sis900_poll(struct net_device *dev)
985{
986 disable_irq(dev->irq);
7d12e780 987 sis900_interrupt(dev->irq, dev);
1da177e4
LT
988 enable_irq(dev->irq);
989}
990#endif
991
992/**
993 * sis900_open - open sis900 device
994 * @net_dev: the net device to open
995 *
996 * Do some initialization and start net interface.
997 * enable interrupts and set sis900 timer.
998 */
999
1000static int
1001sis900_open(struct net_device *net_dev)
1002{
1003 struct sis900_private *sis_priv = net_dev->priv;
1004 long ioaddr = net_dev->base_addr;
1005 int ret;
1006
1007 /* Soft reset the chip. */
1008 sis900_reset(net_dev);
1009
1010 /* Equalizer workaround Rule */
1011 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1012
1fb9df5d 1013 ret = request_irq(net_dev->irq, &sis900_interrupt, IRQF_SHARED,
1da177e4
LT
1014 net_dev->name, net_dev);
1015 if (ret)
1016 return ret;
1017
1018 sis900_init_rxfilter(net_dev);
1019
1020 sis900_init_tx_ring(net_dev);
1021 sis900_init_rx_ring(net_dev);
1022
1023 set_rx_mode(net_dev);
1024
1025 netif_start_queue(net_dev);
1026
1027 /* Workaround for EDB */
1028 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
1029
1030 /* Enable all known interrupts by setting the interrupt mask. */
1031 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1032 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
1033 outl(IE, ioaddr + ier);
1034
1035 sis900_check_mode(net_dev, sis_priv->mii);
1036
1037 /* Set the timer to switch to check for link beat and perhaps switch
1038 to an alternate media type. */
1039 init_timer(&sis_priv->timer);
1040 sis_priv->timer.expires = jiffies + HZ;
1041 sis_priv->timer.data = (unsigned long)net_dev;
1042 sis_priv->timer.function = &sis900_timer;
1043 add_timer(&sis_priv->timer);
1044
1045 return 0;
1046}
1047
1048/**
1049 * sis900_init_rxfilter - Initialize the Rx filter
1050 * @net_dev: the net device to initialize for
1051 *
1052 * Set receive filter address to our MAC address
1053 * and enable packet filtering.
1054 */
1055
1056static void
1057sis900_init_rxfilter (struct net_device * net_dev)
1058{
1059 struct sis900_private *sis_priv = net_dev->priv;
1060 long ioaddr = net_dev->base_addr;
1061 u32 rfcrSave;
1062 u32 i;
1063
1064 rfcrSave = inl(rfcr + ioaddr);
1065
1066 /* disable packet filtering before setting filter */
1067 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
1068
1069 /* load MAC addr to filter data register */
1070 for (i = 0 ; i < 3 ; i++) {
1071 u32 w;
1072
1073 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1074 outl((i << RFADDR_shift), ioaddr + rfcr);
1075 outl(w, ioaddr + rfdr);
1076
1077 if (netif_msg_hw(sis_priv)) {
1078 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
1079 net_dev->name, i, inl(ioaddr + rfdr));
1080 }
1081 }
1082
1083 /* enable packet filtering */
1084 outl(rfcrSave | RFEN, rfcr + ioaddr);
1085}
1086
1087/**
1088 * sis900_init_tx_ring - Initialize the Tx descriptor ring
1089 * @net_dev: the net device to initialize for
1090 *
6aa20a22 1091 * Initialize the Tx descriptor ring,
1da177e4
LT
1092 */
1093
1094static void
1095sis900_init_tx_ring(struct net_device *net_dev)
1096{
1097 struct sis900_private *sis_priv = net_dev->priv;
1098 long ioaddr = net_dev->base_addr;
1099 int i;
1100
1101 sis_priv->tx_full = 0;
1102 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1103
1104 for (i = 0; i < NUM_TX_DESC; i++) {
1105 sis_priv->tx_skbuff[i] = NULL;
1106
1107 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1108 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1109 sis_priv->tx_ring[i].cmdsts = 0;
1110 sis_priv->tx_ring[i].bufptr = 0;
1111 }
1112
1113 /* load Transmit Descriptor Register */
1114 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1115 if (netif_msg_hw(sis_priv))
1116 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1117 net_dev->name, inl(ioaddr + txdp));
1118}
1119
1120/**
1121 * sis900_init_rx_ring - Initialize the Rx descriptor ring
1122 * @net_dev: the net device to initialize for
1123 *
6aa20a22 1124 * Initialize the Rx descriptor ring,
1da177e4
LT
1125 * and pre-allocate recevie buffers (socket buffer)
1126 */
1127
6aa20a22 1128static void
1da177e4
LT
1129sis900_init_rx_ring(struct net_device *net_dev)
1130{
1131 struct sis900_private *sis_priv = net_dev->priv;
1132 long ioaddr = net_dev->base_addr;
1133 int i;
1134
1135 sis_priv->cur_rx = 0;
1136 sis_priv->dirty_rx = 0;
1137
1138 /* init RX descriptor */
1139 for (i = 0; i < NUM_RX_DESC; i++) {
1140 sis_priv->rx_skbuff[i] = NULL;
1141
1142 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1143 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1144 sis_priv->rx_ring[i].cmdsts = 0;
1145 sis_priv->rx_ring[i].bufptr = 0;
1146 }
1147
1148 /* allocate sock buffers */
1149 for (i = 0; i < NUM_RX_DESC; i++) {
1150 struct sk_buff *skb;
1151
1152 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1153 /* not enough memory for skbuff, this makes a "hole"
1154 on the buffer ring, it is not clear how the
1155 hardware will react to this kind of degenerated
1156 buffer */
1157 break;
1158 }
1da177e4
LT
1159 sis_priv->rx_skbuff[i] = skb;
1160 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1161 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
689be439 1162 skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1da177e4
LT
1163 }
1164 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1165
1166 /* load Receive Descriptor Register */
1167 outl(sis_priv->rx_ring_dma, ioaddr + rxdp);
1168 if (netif_msg_hw(sis_priv))
1169 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1170 net_dev->name, inl(ioaddr + rxdp));
1171}
1172
1173/**
1174 * sis630_set_eq - set phy equalizer value for 630 LAN
1175 * @net_dev: the net device to set equalizer value
1176 * @revision: 630 LAN revision number
1177 *
1178 * 630E equalizer workaround rule(Cyrus Huang 08/15)
1179 * PHY register 14h(Test)
1180 * Bit 14: 0 -- Automatically dectect (default)
1181 * 1 -- Manually set Equalizer filter
1182 * Bit 13: 0 -- (Default)
1183 * 1 -- Speed up convergence of equalizer setting
1184 * Bit 9 : 0 -- (Default)
1185 * 1 -- Disable Baseline Wander
1186 * Bit 3~7 -- Equalizer filter setting
1187 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
1188 * Then calculate equalizer value
1189 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
1190 * Link Off:Set Bit 13 to 1, Bit 14 to 0
1191 * Calculate Equalizer value:
1192 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-dectect proper equalizer value.
1193 * When the equalizer is stable, this value is not a fixed value. It will be within
1194 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
1195 * 0 <= max <= 4 --> set equalizer to max
1196 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
1197 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
1198 */
1199
1200static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1201{
1202 struct sis900_private *sis_priv = net_dev->priv;
1203 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1204 int i, maxcount=10;
1205
1206 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1207 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1208 return;
1209
1210 if (netif_carrier_ok(net_dev)) {
1211 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1212 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1213 (0x2200 | reg14h) & 0xBFFF);
1214 for (i=0; i < maxcount; i++) {
1215 eq_value = (0x00F8 & mdio_read(net_dev,
1216 sis_priv->cur_phy, MII_RESV)) >> 3;
1217 if (i == 0)
1218 max_value=min_value=eq_value;
1219 max_value = (eq_value > max_value) ?
1220 eq_value : max_value;
1221 min_value = (eq_value < min_value) ?
1222 eq_value : min_value;
1223 }
1224 /* 630E rule to determine the equalizer value */
1225 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1226 revision == SIS630ET_900_REV) {
1227 if (max_value < 5)
1228 eq_value = max_value;
1229 else if (max_value >= 5 && max_value < 15)
1230 eq_value = (max_value == min_value) ?
1231 max_value+2 : max_value+1;
1232 else if (max_value >= 15)
1233 eq_value=(max_value == min_value) ?
1234 max_value+6 : max_value+5;
1235 }
1236 /* 630B0&B1 rule to determine the equalizer value */
6aa20a22
JG
1237 if (revision == SIS630A_900_REV &&
1238 (sis_priv->host_bridge_rev == SIS630B0 ||
1da177e4
LT
1239 sis_priv->host_bridge_rev == SIS630B1)) {
1240 if (max_value == 0)
1241 eq_value = 3;
1242 else
1243 eq_value = (max_value + min_value + 1)/2;
1244 }
1245 /* write equalizer value and setting */
1246 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1247 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1248 reg14h = (reg14h | 0x6000) & 0xFDFF;
1249 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1250 } else {
1251 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
6aa20a22
JG
1252 if (revision == SIS630A_900_REV &&
1253 (sis_priv->host_bridge_rev == SIS630B0 ||
1254 sis_priv->host_bridge_rev == SIS630B1))
1da177e4
LT
1255 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1256 (reg14h | 0x2200) & 0xBFFF);
1257 else
1258 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1259 (reg14h | 0x2000) & 0xBFFF);
1260 }
1261 return;
1262}
1263
1264/**
1265 * sis900_timer - sis900 timer routine
1266 * @data: pointer to sis900 net device
1267 *
6aa20a22 1268 * On each timer ticks we check two things,
1da177e4
LT
1269 * link status (ON/OFF) and link mode (10/100/Full/Half)
1270 */
1271
1272static void sis900_timer(unsigned long data)
1273{
1274 struct net_device *net_dev = (struct net_device *)data;
1275 struct sis900_private *sis_priv = net_dev->priv;
1276 struct mii_phy *mii_phy = sis_priv->mii;
f71e1309 1277 static const int next_tick = 5*HZ;
1da177e4
LT
1278 u16 status;
1279
1280 if (!sis_priv->autong_complete){
1281 int speed, duplex = 0;
1282
1283 sis900_read_mode(net_dev, &speed, &duplex);
1284 if (duplex){
1285 sis900_set_mode(net_dev->base_addr, speed, duplex);
1286 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1287 netif_start_queue(net_dev);
1288 }
1289
1290 sis_priv->timer.expires = jiffies + HZ;
1291 add_timer(&sis_priv->timer);
1292 return;
1293 }
1294
1295 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1296 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1297
1298 /* Link OFF -> ON */
1299 if (!netif_carrier_ok(net_dev)) {
1300 LookForLink:
1301 /* Search for new PHY */
1302 status = sis900_default_phy(net_dev);
1303 mii_phy = sis_priv->mii;
1304
1305 if (status & MII_STAT_LINK){
1306 sis900_check_mode(net_dev, mii_phy);
1307 netif_carrier_on(net_dev);
1308 }
1309 } else {
1310 /* Link ON -> OFF */
1311 if (!(status & MII_STAT_LINK)){
1312 netif_carrier_off(net_dev);
1313 if(netif_msg_link(sis_priv))
1314 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1315
1316 /* Change mode issue */
6aa20a22 1317 if ((mii_phy->phy_id0 == 0x001D) &&
1da177e4
LT
1318 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1319 sis900_reset_phy(net_dev, sis_priv->cur_phy);
6aa20a22 1320
1da177e4 1321 sis630_set_eq(net_dev, sis_priv->chipset_rev);
6aa20a22 1322
1da177e4
LT
1323 goto LookForLink;
1324 }
1325 }
1326
1327 sis_priv->timer.expires = jiffies + next_tick;
1328 add_timer(&sis_priv->timer);
1329}
1330
1331/**
1332 * sis900_check_mode - check the media mode for sis900
1333 * @net_dev: the net device to be checked
1334 * @mii_phy: the mii phy
1335 *
1336 * Older driver gets the media mode from mii status output
1337 * register. Now we set our media capability and auto-negotiate
1338 * to get the upper bound of speed and duplex between two ends.
1339 * If the types of mii phy is HOME, it doesn't need to auto-negotiate
1340 * and autong_complete should be set to 1.
1341 */
1342
1343static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1344{
1345 struct sis900_private *sis_priv = net_dev->priv;
1346 long ioaddr = net_dev->base_addr;
1347 int speed, duplex;
1348
1349 if (mii_phy->phy_types == LAN) {
1350 outl(~EXD & inl(ioaddr + cfg), ioaddr + cfg);
1351 sis900_set_capability(net_dev , mii_phy);
1352 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1353 } else {
1354 outl(EXD | inl(ioaddr + cfg), ioaddr + cfg);
1355 speed = HW_SPEED_HOME;
1356 duplex = FDX_CAPABLE_HALF_SELECTED;
1357 sis900_set_mode(ioaddr, speed, duplex);
1358 sis_priv->autong_complete = 1;
1359 }
1360}
1361
1362/**
1363 * sis900_set_mode - Set the media mode of mac register.
1364 * @ioaddr: the address of the device
1365 * @speed : the transmit speed to be determined
1366 * @duplex: the duplex mode to be determined
1367 *
1368 * Set the media mode of mac register txcfg/rxcfg according to
1369 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1370 * bus is used instead of PCI bus. When this bit is set 1, the
1371 * Max DMA Burst Size for TX/RX DMA should be no larger than 16
1372 * double words.
1373 */
1374
1375static void sis900_set_mode (long ioaddr, int speed, int duplex)
1376{
1377 u32 tx_flags = 0, rx_flags = 0;
1378
1379 if (inl(ioaddr + cfg) & EDB_MASTER_EN) {
1380 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1381 (TX_FILL_THRESH << TxFILLT_shift);
1382 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1383 } else {
1384 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1385 (TX_FILL_THRESH << TxFILLT_shift);
1386 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1387 }
1388
1389 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1390 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1391 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1392 } else {
1393 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1394 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1395 }
1396
1397 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1398 tx_flags |= (TxCSI | TxHBI);
1399 rx_flags |= RxATX;
1400 }
1401
d269a69f
DV
1402#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1403 /* Can accept Jumbo packet */
1404 rx_flags |= RxAJAB;
1405#endif
1406
1da177e4
LT
1407 outl (tx_flags, ioaddr + txcfg);
1408 outl (rx_flags, ioaddr + rxcfg);
1409}
1410
1411/**
1412 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1413 * @net_dev: the net device to read mode for
1414 * @phy_addr: mii phy address
1415 *
1416 * If the adapter is link-on, set the auto-negotiate enable/reset bit.
1417 * autong_complete should be set to 0 when starting auto-negotiation.
1418 * autong_complete should be set to 1 if we didn't start auto-negotiation.
1419 * sis900_timer will wait for link on again if autong_complete = 0.
1420 */
1421
1422static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1423{
1424 struct sis900_private *sis_priv = net_dev->priv;
1425 int i = 0;
1426 u32 status;
6aa20a22 1427
f3be9742 1428 for (i = 0; i < 2; i++)
1da177e4
LT
1429 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1430
1431 if (!(status & MII_STAT_LINK)){
1432 if(netif_msg_link(sis_priv))
1433 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1434 sis_priv->autong_complete = 1;
1435 netif_carrier_off(net_dev);
1436 return;
1437 }
1438
1439 /* (Re)start AutoNegotiate */
1440 mdio_write(net_dev, phy_addr, MII_CONTROL,
1441 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1442 sis_priv->autong_complete = 0;
1443}
1444
1445
1446/**
1447 * sis900_read_mode - read media mode for sis900 internal phy
1448 * @net_dev: the net device to read mode for
1449 * @speed : the transmit speed to be determined
1450 * @duplex : the duplex mode to be determined
1451 *
1452 * The capability of remote end will be put in mii register autorec
1453 * after auto-negotiation. Use AND operation to get the upper bound
1454 * of speed and duplex between two ends.
1455 */
1456
1457static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1458{
1459 struct sis900_private *sis_priv = net_dev->priv;
1460 struct mii_phy *phy = sis_priv->mii;
1461 int phy_addr = sis_priv->cur_phy;
1462 u32 status;
1463 u16 autoadv, autorec;
f3be9742 1464 int i;
1da177e4 1465
f3be9742 1466 for (i = 0; i < 2; i++)
1da177e4
LT
1467 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1468
1469 if (!(status & MII_STAT_LINK))
1470 return;
1471
1472 /* AutoNegotiate completed */
1473 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1474 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1475 status = autoadv & autorec;
6aa20a22 1476
1da177e4
LT
1477 *speed = HW_SPEED_10_MBPS;
1478 *duplex = FDX_CAPABLE_HALF_SELECTED;
1479
1480 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1481 *speed = HW_SPEED_100_MBPS;
1482 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1483 *duplex = FDX_CAPABLE_FULL_SELECTED;
6aa20a22 1484
1da177e4
LT
1485 sis_priv->autong_complete = 1;
1486
1487 /* Workaround for Realtek RTL8201 PHY issue */
1488 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1489 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1490 *duplex = FDX_CAPABLE_FULL_SELECTED;
1491 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1492 *speed = HW_SPEED_100_MBPS;
1493 }
1494
1495 if(netif_msg_link(sis_priv))
1496 printk(KERN_INFO "%s: Media Link On %s %s-duplex \n",
1497 net_dev->name,
1498 *speed == HW_SPEED_100_MBPS ?
1499 "100mbps" : "10mbps",
1500 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1501 "full" : "half");
1502}
1503
1504/**
1505 * sis900_tx_timeout - sis900 transmit timeout routine
1506 * @net_dev: the net device to transmit
1507 *
1508 * print transmit timeout status
1509 * disable interrupts and do some tasks
1510 */
1511
1512static void sis900_tx_timeout(struct net_device *net_dev)
1513{
1514 struct sis900_private *sis_priv = net_dev->priv;
1515 long ioaddr = net_dev->base_addr;
1516 unsigned long flags;
1517 int i;
1518
1519 if(netif_msg_tx_err(sis_priv))
1520 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n",
1521 net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr));
1522
1523 /* Disable interrupts by clearing the interrupt mask. */
1524 outl(0x0000, ioaddr + imr);
1525
1526 /* use spinlock to prevent interrupt handler accessing buffer ring */
1527 spin_lock_irqsave(&sis_priv->lock, flags);
1528
1529 /* discard unsent packets */
1530 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1531 for (i = 0; i < NUM_TX_DESC; i++) {
1532 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1533
1534 if (skb) {
6aa20a22 1535 pci_unmap_single(sis_priv->pci_dev,
1da177e4
LT
1536 sis_priv->tx_ring[i].bufptr, skb->len,
1537 PCI_DMA_TODEVICE);
1538 dev_kfree_skb_irq(skb);
1539 sis_priv->tx_skbuff[i] = NULL;
1540 sis_priv->tx_ring[i].cmdsts = 0;
1541 sis_priv->tx_ring[i].bufptr = 0;
09f75cd7 1542 net_dev->stats.tx_dropped++;
1da177e4
LT
1543 }
1544 }
1545 sis_priv->tx_full = 0;
1546 netif_wake_queue(net_dev);
1547
1548 spin_unlock_irqrestore(&sis_priv->lock, flags);
1549
1550 net_dev->trans_start = jiffies;
1551
1552 /* load Transmit Descriptor Register */
1553 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1554
1555 /* Enable all known interrupts by setting the interrupt mask. */
1556 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1557 return;
1558}
1559
1560/**
1561 * sis900_start_xmit - sis900 start transmit routine
1562 * @skb: socket buffer pointer to put the data being transmitted
1563 * @net_dev: the net device to transmit with
1564 *
6aa20a22 1565 * Set the transmit buffer descriptor,
1da177e4
LT
1566 * and write TxENA to enable transmit state machine.
1567 * tell upper layer if the buffer is full
1568 */
1569
1570static int
1571sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1572{
1573 struct sis900_private *sis_priv = net_dev->priv;
1574 long ioaddr = net_dev->base_addr;
1575 unsigned int entry;
1576 unsigned long flags;
1577 unsigned int index_cur_tx, index_dirty_tx;
1578 unsigned int count_dirty_tx;
1579
1580 /* Don't transmit data before the complete of auto-negotiation */
1581 if(!sis_priv->autong_complete){
1582 netif_stop_queue(net_dev);
1583 return 1;
1584 }
1585
1586 spin_lock_irqsave(&sis_priv->lock, flags);
1587
1588 /* Calculate the next Tx descriptor entry. */
1589 entry = sis_priv->cur_tx % NUM_TX_DESC;
1590 sis_priv->tx_skbuff[entry] = skb;
1591
1592 /* set the transmit buffer descriptor and enable Transmit State Machine */
1593 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1594 skb->data, skb->len, PCI_DMA_TODEVICE);
1595 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1596 outl(TxENA | inl(ioaddr + cr), ioaddr + cr);
1597
1598 sis_priv->cur_tx ++;
1599 index_cur_tx = sis_priv->cur_tx;
1600 index_dirty_tx = sis_priv->dirty_tx;
1601
1602 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1603 count_dirty_tx ++;
1604
1605 if (index_cur_tx == index_dirty_tx) {
1606 /* dirty_tx is met in the cycle of cur_tx, buffer full */
1607 sis_priv->tx_full = 1;
1608 netif_stop_queue(net_dev);
6aa20a22 1609 } else if (count_dirty_tx < NUM_TX_DESC) {
1da177e4
LT
1610 /* Typical path, tell upper layer that more transmission is possible */
1611 netif_start_queue(net_dev);
1612 } else {
1613 /* buffer full, tell upper layer no more transmission */
1614 sis_priv->tx_full = 1;
1615 netif_stop_queue(net_dev);
1616 }
1617
1618 spin_unlock_irqrestore(&sis_priv->lock, flags);
1619
1620 net_dev->trans_start = jiffies;
1621
1622 if (netif_msg_tx_queued(sis_priv))
1623 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
1624 "to slot %d.\n",
1625 net_dev->name, skb->data, (int)skb->len, entry);
1626
1627 return 0;
1628}
1629
1630/**
1631 * sis900_interrupt - sis900 interrupt handler
1632 * @irq: the irq number
1633 * @dev_instance: the client data object
1634 * @regs: snapshot of processor context
1635 *
6aa20a22 1636 * The interrupt handler does all of the Rx thread work,
1da177e4
LT
1637 * and cleans up after the Tx thread
1638 */
1639
7d12e780 1640static irqreturn_t sis900_interrupt(int irq, void *dev_instance)
1da177e4
LT
1641{
1642 struct net_device *net_dev = dev_instance;
1643 struct sis900_private *sis_priv = net_dev->priv;
1644 int boguscnt = max_interrupt_work;
1645 long ioaddr = net_dev->base_addr;
1646 u32 status;
1647 unsigned int handled = 0;
1648
1649 spin_lock (&sis_priv->lock);
1650
1651 do {
1652 status = inl(ioaddr + isr);
1653
1654 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1655 /* nothing intresting happened */
1656 break;
1657 handled = 1;
1658
1659 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1660 if (status & (RxORN | RxERR | RxOK))
1661 /* Rx interrupt */
1662 sis900_rx(net_dev);
1663
1664 if (status & (TxURN | TxERR | TxIDLE))
1665 /* Tx interrupt */
1666 sis900_finish_xmit(net_dev);
1667
1668 /* something strange happened !!! */
1669 if (status & HIBERR) {
1670 if(netif_msg_intr(sis_priv))
1671 printk(KERN_INFO "%s: Abnormal interrupt,"
1672 "status %#8.8x.\n", net_dev->name, status);
1673 break;
1674 }
1675 if (--boguscnt < 0) {
1676 if(netif_msg_intr(sis_priv))
1677 printk(KERN_INFO "%s: Too much work at interrupt, "
1678 "interrupt status = %#8.8x.\n",
1679 net_dev->name, status);
1680 break;
1681 }
1682 } while (1);
1683
1684 if(netif_msg_intr(sis_priv))
1685 printk(KERN_DEBUG "%s: exiting interrupt, "
1686 "interrupt status = 0x%#8.8x.\n",
1687 net_dev->name, inl(ioaddr + isr));
6aa20a22 1688
1da177e4
LT
1689 spin_unlock (&sis_priv->lock);
1690 return IRQ_RETVAL(handled);
1691}
1692
1693/**
1694 * sis900_rx - sis900 receive routine
1695 * @net_dev: the net device which receives data
1696 *
6aa20a22 1697 * Process receive interrupt events,
1da177e4 1698 * put buffer to higher layer and refill buffer pool
0b28002f 1699 * Note: This function is called by interrupt handler,
1da177e4
LT
1700 * don't do "too much" work here
1701 */
1702
1703static int sis900_rx(struct net_device *net_dev)
1704{
1705 struct sis900_private *sis_priv = net_dev->priv;
1706 long ioaddr = net_dev->base_addr;
1707 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1708 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
7380a78a 1709 int rx_work_limit;
1da177e4
LT
1710
1711 if (netif_msg_rx_status(sis_priv))
1712 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1713 "status:0x%8.8x\n",
1714 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
7380a78a 1715 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1da177e4
LT
1716
1717 while (rx_status & OWN) {
1718 unsigned int rx_size;
d269a69f 1719 unsigned int data_size;
1da177e4 1720
7380a78a
VA
1721 if (--rx_work_limit < 0)
1722 break;
1723
d269a69f
DV
1724 data_size = rx_status & DSIZE;
1725 rx_size = data_size - CRC_SIZE;
1726
1727#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1728 /* ``TOOLONG'' flag means jumbo packet recived. */
1729 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE)
1730 rx_status &= (~ ((unsigned int)TOOLONG));
1731#endif
1da177e4
LT
1732
1733 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1734 /* corrupted packet received */
1735 if (netif_msg_rx_err(sis_priv))
1736 printk(KERN_DEBUG "%s: Corrupted packet "
d269a69f
DV
1737 "received, buffer status = 0x%8.8x/%d.\n",
1738 net_dev->name, rx_status, data_size);
09f75cd7 1739 net_dev->stats.rx_errors++;
1da177e4 1740 if (rx_status & OVERRUN)
09f75cd7 1741 net_dev->stats.rx_over_errors++;
1da177e4 1742 if (rx_status & (TOOLONG|RUNT))
09f75cd7 1743 net_dev->stats.rx_length_errors++;
1da177e4 1744 if (rx_status & (RXISERR | FAERR))
09f75cd7 1745 net_dev->stats.rx_frame_errors++;
6aa20a22 1746 if (rx_status & CRCERR)
09f75cd7 1747 net_dev->stats.rx_crc_errors++;
1da177e4
LT
1748 /* reset buffer descriptor state */
1749 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1750 } else {
1751 struct sk_buff * skb;
dc5a1449 1752 struct sk_buff * rx_skb;
1da177e4 1753
b748d9e3
NH
1754 pci_unmap_single(sis_priv->pci_dev,
1755 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1756 PCI_DMA_FROMDEVICE);
1757
1758 /* refill the Rx buffer, what if there is not enought
1759 * memory for new socket buffer ?? */
1760 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1761 /*
1762 * Not enough memory to refill the buffer
1763 * so we need to recycle the old one so
1764 * as to avoid creating a memory hole
1765 * in the rx ring
1766 */
1767 skb = sis_priv->rx_skbuff[entry];
09f75cd7 1768 net_dev->stats.rx_dropped++;
b748d9e3
NH
1769 goto refill_rx_ring;
1770 }
1771
1da177e4
LT
1772 /* This situation should never happen, but due to
1773 some unknow bugs, it is possible that
1774 we are working on NULL sk_buff :-( */
1775 if (sis_priv->rx_skbuff[entry] == NULL) {
1776 if (netif_msg_rx_err(sis_priv))
6aa20a22 1777 printk(KERN_WARNING "%s: NULL pointer "
7380a78a
VA
1778 "encountered in Rx ring\n"
1779 "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1780 net_dev->name, sis_priv->cur_rx,
1781 sis_priv->dirty_rx);
1da177e4
LT
1782 break;
1783 }
1784
1da177e4 1785 /* give the socket buffer to upper layers */
dc5a1449
NH
1786 rx_skb = sis_priv->rx_skbuff[entry];
1787 skb_put(rx_skb, rx_size);
1788 rx_skb->protocol = eth_type_trans(rx_skb, net_dev);
1789 netif_rx(rx_skb);
1da177e4
LT
1790
1791 /* some network statistics */
1792 if ((rx_status & BCAST) == MCAST)
09f75cd7 1793 net_dev->stats.multicast++;
1da177e4 1794 net_dev->last_rx = jiffies;
09f75cd7
JG
1795 net_dev->stats.rx_bytes += rx_size;
1796 net_dev->stats.rx_packets++;
b748d9e3
NH
1797 sis_priv->dirty_rx++;
1798refill_rx_ring:
1da177e4
LT
1799 sis_priv->rx_skbuff[entry] = skb;
1800 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
6aa20a22
JG
1801 sis_priv->rx_ring[entry].bufptr =
1802 pci_map_single(sis_priv->pci_dev, skb->data,
1da177e4 1803 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1da177e4
LT
1804 }
1805 sis_priv->cur_rx++;
1806 entry = sis_priv->cur_rx % NUM_RX_DESC;
1807 rx_status = sis_priv->rx_ring[entry].cmdsts;
1808 } // while
1809
1810 /* refill the Rx buffer, what if the rate of refilling is slower
1811 * than consuming ?? */
7380a78a 1812 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1da177e4
LT
1813 struct sk_buff *skb;
1814
1815 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1816
1817 if (sis_priv->rx_skbuff[entry] == NULL) {
1818 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1819 /* not enough memory for skbuff, this makes a
1820 * "hole" on the buffer ring, it is not clear
1821 * how the hardware will react to this kind
1822 * of degenerated buffer */
1823 if (netif_msg_rx_err(sis_priv))
1824 printk(KERN_INFO "%s: Memory squeeze,"
1825 "deferring packet.\n",
1826 net_dev->name);
09f75cd7 1827 net_dev->stats.rx_dropped++;
1da177e4
LT
1828 break;
1829 }
1da177e4
LT
1830 sis_priv->rx_skbuff[entry] = skb;
1831 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1832 sis_priv->rx_ring[entry].bufptr =
689be439 1833 pci_map_single(sis_priv->pci_dev, skb->data,
1da177e4
LT
1834 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1835 }
1836 }
1837 /* re-enable the potentially idle receive state matchine */
1838 outl(RxENA | inl(ioaddr + cr), ioaddr + cr );
1839
1840 return 0;
1841}
1842
1843/**
1844 * sis900_finish_xmit - finish up transmission of packets
1845 * @net_dev: the net device to be transmitted on
1846 *
6aa20a22 1847 * Check for error condition and free socket buffer etc
1da177e4 1848 * schedule for more transmission as needed
0b28002f 1849 * Note: This function is called by interrupt handler,
1da177e4
LT
1850 * don't do "too much" work here
1851 */
1852
1853static void sis900_finish_xmit (struct net_device *net_dev)
1854{
1855 struct sis900_private *sis_priv = net_dev->priv;
1856
1857 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1858 struct sk_buff *skb;
1859 unsigned int entry;
1860 u32 tx_status;
1861
1862 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1863 tx_status = sis_priv->tx_ring[entry].cmdsts;
1864
1865 if (tx_status & OWN) {
1866 /* The packet is not transmitted yet (owned by hardware) !
1867 * Note: the interrupt is generated only when Tx Machine
1868 * is idle, so this is an almost impossible case */
1869 break;
1870 }
1871
1872 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1873 /* packet unsuccessfully transmitted */
1874 if (netif_msg_tx_err(sis_priv))
1875 printk(KERN_DEBUG "%s: Transmit "
1876 "error, Tx status %8.8x.\n",
1877 net_dev->name, tx_status);
09f75cd7 1878 net_dev->stats.tx_errors++;
1da177e4 1879 if (tx_status & UNDERRUN)
09f75cd7 1880 net_dev->stats.tx_fifo_errors++;
1da177e4 1881 if (tx_status & ABORT)
09f75cd7 1882 net_dev->stats.tx_aborted_errors++;
1da177e4 1883 if (tx_status & NOCARRIER)
09f75cd7 1884 net_dev->stats.tx_carrier_errors++;
1da177e4 1885 if (tx_status & OWCOLL)
09f75cd7 1886 net_dev->stats.tx_window_errors++;
1da177e4
LT
1887 } else {
1888 /* packet successfully transmitted */
09f75cd7
JG
1889 net_dev->stats.collisions += (tx_status & COLCNT) >> 16;
1890 net_dev->stats.tx_bytes += tx_status & DSIZE;
1891 net_dev->stats.tx_packets++;
1da177e4
LT
1892 }
1893 /* Free the original skb. */
1894 skb = sis_priv->tx_skbuff[entry];
6aa20a22 1895 pci_unmap_single(sis_priv->pci_dev,
1da177e4
LT
1896 sis_priv->tx_ring[entry].bufptr, skb->len,
1897 PCI_DMA_TODEVICE);
1898 dev_kfree_skb_irq(skb);
1899 sis_priv->tx_skbuff[entry] = NULL;
1900 sis_priv->tx_ring[entry].bufptr = 0;
1901 sis_priv->tx_ring[entry].cmdsts = 0;
1902 }
1903
1904 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1905 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1906 /* The ring is no longer full, clear tx_full and schedule
1907 * more transmission by netif_wake_queue(net_dev) */
1908 sis_priv->tx_full = 0;
1909 netif_wake_queue (net_dev);
1910 }
1911}
1912
1913/**
6aa20a22 1914 * sis900_close - close sis900 device
1da177e4
LT
1915 * @net_dev: the net device to be closed
1916 *
6aa20a22 1917 * Disable interrupts, stop the Tx and Rx Status Machine
1da177e4
LT
1918 * free Tx and RX socket buffer
1919 */
1920
1921static int sis900_close(struct net_device *net_dev)
1922{
1923 long ioaddr = net_dev->base_addr;
1924 struct sis900_private *sis_priv = net_dev->priv;
1925 struct sk_buff *skb;
1926 int i;
1927
1928 netif_stop_queue(net_dev);
1929
1930 /* Disable interrupts by clearing the interrupt mask. */
1931 outl(0x0000, ioaddr + imr);
1932 outl(0x0000, ioaddr + ier);
1933
1934 /* Stop the chip's Tx and Rx Status Machine */
1935 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
1936
1937 del_timer(&sis_priv->timer);
1938
1939 free_irq(net_dev->irq, net_dev);
1940
1941 /* Free Tx and RX skbuff */
1942 for (i = 0; i < NUM_RX_DESC; i++) {
1943 skb = sis_priv->rx_skbuff[i];
1944 if (skb) {
6aa20a22 1945 pci_unmap_single(sis_priv->pci_dev,
1da177e4
LT
1946 sis_priv->rx_ring[i].bufptr,
1947 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1948 dev_kfree_skb(skb);
1949 sis_priv->rx_skbuff[i] = NULL;
1950 }
1951 }
1952 for (i = 0; i < NUM_TX_DESC; i++) {
1953 skb = sis_priv->tx_skbuff[i];
1954 if (skb) {
6aa20a22 1955 pci_unmap_single(sis_priv->pci_dev,
1da177e4
LT
1956 sis_priv->tx_ring[i].bufptr, skb->len,
1957 PCI_DMA_TODEVICE);
1958 dev_kfree_skb(skb);
1959 sis_priv->tx_skbuff[i] = NULL;
1960 }
1961 }
1962
1963 /* Green! Put the chip in low-power mode. */
1964
1965 return 0;
1966}
1967
1968/**
1969 * sis900_get_drvinfo - Return information about driver
1970 * @net_dev: the net device to probe
1971 * @info: container for info returned
1972 *
1973 * Process ethtool command such as "ehtool -i" to show information
1974 */
6aa20a22 1975
1da177e4
LT
1976static void sis900_get_drvinfo(struct net_device *net_dev,
1977 struct ethtool_drvinfo *info)
1978{
1979 struct sis900_private *sis_priv = net_dev->priv;
1980
1981 strcpy (info->driver, SIS900_MODULE_NAME);
1982 strcpy (info->version, SIS900_DRV_VERSION);
1983 strcpy (info->bus_info, pci_name(sis_priv->pci_dev));
1984}
1985
1986static u32 sis900_get_msglevel(struct net_device *net_dev)
1987{
1988 struct sis900_private *sis_priv = net_dev->priv;
1989 return sis_priv->msg_enable;
1990}
6aa20a22 1991
1da177e4
LT
1992static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
1993{
1994 struct sis900_private *sis_priv = net_dev->priv;
1995 sis_priv->msg_enable = value;
1996}
1997
da369b01
DV
1998static u32 sis900_get_link(struct net_device *net_dev)
1999{
2000 struct sis900_private *sis_priv = net_dev->priv;
2001 return mii_link_ok(&sis_priv->mii_info);
2002}
2003
2004static int sis900_get_settings(struct net_device *net_dev,
2005 struct ethtool_cmd *cmd)
2006{
2007 struct sis900_private *sis_priv = net_dev->priv;
2008 spin_lock_irq(&sis_priv->lock);
2009 mii_ethtool_gset(&sis_priv->mii_info, cmd);
2010 spin_unlock_irq(&sis_priv->lock);
2011 return 0;
2012}
2013
2014static int sis900_set_settings(struct net_device *net_dev,
2015 struct ethtool_cmd *cmd)
2016{
2017 struct sis900_private *sis_priv = net_dev->priv;
2018 int rt;
2019 spin_lock_irq(&sis_priv->lock);
2020 rt = mii_ethtool_sset(&sis_priv->mii_info, cmd);
2021 spin_unlock_irq(&sis_priv->lock);
2022 return rt;
2023}
2024
2025static int sis900_nway_reset(struct net_device *net_dev)
2026{
2027 struct sis900_private *sis_priv = net_dev->priv;
2028 return mii_nway_restart(&sis_priv->mii_info);
2029}
2030
ea37ccea
DV
2031/**
2032 * sis900_set_wol - Set up Wake on Lan registers
2033 * @net_dev: the net device to probe
2034 * @wol: container for info passed to the driver
2035 *
2036 * Process ethtool command "wol" to setup wake on lan features.
2037 * SiS900 supports sending WoL events if a correct packet is received,
2038 * but there is no simple way to filter them to only a subset (broadcast,
2039 * multicast, unicast or arp).
2040 */
6aa20a22 2041
ea37ccea
DV
2042static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2043{
2044 struct sis900_private *sis_priv = net_dev->priv;
2045 long pmctrl_addr = net_dev->base_addr + pmctrl;
2046 u32 cfgpmcsr = 0, pmctrl_bits = 0;
2047
2048 if (wol->wolopts == 0) {
2049 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
7bef4b39 2050 cfgpmcsr &= ~PME_EN;
ea37ccea
DV
2051 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2052 outl(pmctrl_bits, pmctrl_addr);
2053 if (netif_msg_wol(sis_priv))
2054 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
2055 return 0;
2056 }
2057
2058 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST
2059 | WAKE_BCAST | WAKE_ARP))
2060 return -EINVAL;
2061
2062 if (wol->wolopts & WAKE_MAGIC)
2063 pmctrl_bits |= MAGICPKT;
2064 if (wol->wolopts & WAKE_PHY)
2065 pmctrl_bits |= LINKON;
6aa20a22 2066
ea37ccea
DV
2067 outl(pmctrl_bits, pmctrl_addr);
2068
2069 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2070 cfgpmcsr |= PME_EN;
2071 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2072 if (netif_msg_wol(sis_priv))
2073 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
2074
2075 return 0;
2076}
2077
2078static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2079{
2080 long pmctrl_addr = net_dev->base_addr + pmctrl;
2081 u32 pmctrl_bits;
2082
2083 pmctrl_bits = inl(pmctrl_addr);
2084 if (pmctrl_bits & MAGICPKT)
2085 wol->wolopts |= WAKE_MAGIC;
2086 if (pmctrl_bits & LINKON)
2087 wol->wolopts |= WAKE_PHY;
2088
2089 wol->supported = (WAKE_PHY | WAKE_MAGIC);
2090}
2091
7282d491 2092static const struct ethtool_ops sis900_ethtool_ops = {
1da177e4
LT
2093 .get_drvinfo = sis900_get_drvinfo,
2094 .get_msglevel = sis900_get_msglevel,
2095 .set_msglevel = sis900_set_msglevel,
da369b01
DV
2096 .get_link = sis900_get_link,
2097 .get_settings = sis900_get_settings,
2098 .set_settings = sis900_set_settings,
2099 .nway_reset = sis900_nway_reset,
ea37ccea
DV
2100 .get_wol = sis900_get_wol,
2101 .set_wol = sis900_set_wol
1da177e4
LT
2102};
2103
2104/**
6aa20a22 2105 * mii_ioctl - process MII i/o control command
1da177e4
LT
2106 * @net_dev: the net device to command for
2107 * @rq: parameter for command
2108 * @cmd: the i/o command
2109 *
2110 * Process MII command like read/write MII register
2111 */
2112
2113static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
2114{
2115 struct sis900_private *sis_priv = net_dev->priv;
2116 struct mii_ioctl_data *data = if_mii(rq);
2117
2118 switch(cmd) {
2119 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2120 data->phy_id = sis_priv->mii->phy_addr;
2121 /* Fall Through */
2122
2123 case SIOCGMIIREG: /* Read MII PHY register. */
2124 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2125 return 0;
2126
2127 case SIOCSMIIREG: /* Write MII PHY register. */
2128 if (!capable(CAP_NET_ADMIN))
2129 return -EPERM;
2130 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2131 return 0;
2132 default:
2133 return -EOPNOTSUPP;
2134 }
2135}
2136
1da177e4 2137/**
6aa20a22 2138 * sis900_set_config - Set media type by net_device.set_config
1da177e4
LT
2139 * @dev: the net device for media type change
2140 * @map: ifmap passed by ifconfig
2141 *
2142 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
2143 * we support only port changes. All other runtime configuration
2144 * changes will be ignored
2145 */
2146
2147static int sis900_set_config(struct net_device *dev, struct ifmap *map)
6aa20a22 2148{
1da177e4
LT
2149 struct sis900_private *sis_priv = dev->priv;
2150 struct mii_phy *mii_phy = sis_priv->mii;
6aa20a22 2151
1da177e4
LT
2152 u16 status;
2153
2154 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
2155 /* we switch on the ifmap->port field. I couldn't find anything
2156 * like a definition or standard for the values of that field.
2157 * I think the meaning of those values is device specific. But
2158 * since I would like to change the media type via the ifconfig
6aa20a22 2159 * command I use the definition from linux/netdevice.h
1da177e4
LT
2160 * (which seems to be different from the ifport(pcmcia) definition) */
2161 switch(map->port){
6aa20a22 2162 case IF_PORT_UNKNOWN: /* use auto here */
1da177e4
LT
2163 dev->if_port = map->port;
2164 /* we are going to change the media type, so the Link
2165 * will be temporary down and we need to reflect that
2166 * here. When the Link comes up again, it will be
2167 * sensed by the sis_timer procedure, which also does
2168 * all the rest for us */
2169 netif_carrier_off(dev);
6aa20a22 2170
1da177e4
LT
2171 /* read current state */
2172 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
6aa20a22 2173
1da177e4
LT
2174 /* enable auto negotiation and reset the negotioation
2175 * (I don't really know what the auto negatiotiation
2176 * reset really means, but it sounds for me right to
2177 * do one here) */
2178 mdio_write(dev, mii_phy->phy_addr,
2179 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2180
2181 break;
6aa20a22
JG
2182
2183 case IF_PORT_10BASET: /* 10BaseT */
1da177e4 2184 dev->if_port = map->port;
6aa20a22 2185
1da177e4
LT
2186 /* we are going to change the media type, so the Link
2187 * will be temporary down and we need to reflect that
2188 * here. When the Link comes up again, it will be
2189 * sensed by the sis_timer procedure, which also does
2190 * all the rest for us */
2191 netif_carrier_off(dev);
6aa20a22 2192
1da177e4
LT
2193 /* set Speed to 10Mbps */
2194 /* read current state */
2195 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
6aa20a22 2196
1da177e4
LT
2197 /* disable auto negotiation and force 10MBit mode*/
2198 mdio_write(dev, mii_phy->phy_addr,
2199 MII_CONTROL, status & ~(MII_CNTL_SPEED |
2200 MII_CNTL_AUTO));
2201 break;
6aa20a22 2202
1da177e4 2203 case IF_PORT_100BASET: /* 100BaseT */
6aa20a22 2204 case IF_PORT_100BASETX: /* 100BaseTx */
1da177e4 2205 dev->if_port = map->port;
6aa20a22 2206
1da177e4
LT
2207 /* we are going to change the media type, so the Link
2208 * will be temporary down and we need to reflect that
2209 * here. When the Link comes up again, it will be
2210 * sensed by the sis_timer procedure, which also does
2211 * all the rest for us */
2212 netif_carrier_off(dev);
6aa20a22 2213
1da177e4
LT
2214 /* set Speed to 100Mbps */
2215 /* disable auto negotiation and enable 100MBit Mode */
2216 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2217 mdio_write(dev, mii_phy->phy_addr,
2218 MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2219 MII_CNTL_SPEED);
6aa20a22 2220
1da177e4 2221 break;
6aa20a22 2222
1da177e4
LT
2223 case IF_PORT_10BASE2: /* 10Base2 */
2224 case IF_PORT_AUI: /* AUI */
2225 case IF_PORT_100BASEFX: /* 100BaseFx */
2226 /* These Modes are not supported (are they?)*/
2227 return -EOPNOTSUPP;
2228 break;
6aa20a22 2229
1da177e4
LT
2230 default:
2231 return -EINVAL;
2232 }
2233 }
2234 return 0;
2235}
2236
2237/**
6aa20a22 2238 * sis900_mcast_bitnr - compute hashtable index
1da177e4
LT
2239 * @addr: multicast address
2240 * @revision: revision id of chip
2241 *
2242 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2243 * hash table, which makes this function a little bit different from other drivers
2244 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
6aa20a22 2245 * multicast hash table.
1da177e4
LT
2246 */
2247
2248static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2249{
2250
2251 u32 crc = ether_crc(6, addr);
2252
2253 /* leave 8 or 7 most siginifant bits */
2254 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2255 return ((int)(crc >> 24));
2256 else
2257 return ((int)(crc >> 25));
2258}
2259
2260/**
6aa20a22 2261 * set_rx_mode - Set SiS900 receive mode
1da177e4
LT
2262 * @net_dev: the net device to be set
2263 *
2264 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
2265 * And set the appropriate multicast filter.
2266 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
2267 */
2268
2269static void set_rx_mode(struct net_device *net_dev)
2270{
2271 long ioaddr = net_dev->base_addr;
2272 struct sis900_private * sis_priv = net_dev->priv;
2273 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2274 int i, table_entries;
2275 u32 rx_mode;
2276
7f927fcc 2277 /* 635 Hash Table entries = 256(2^16) */
1da177e4
LT
2278 if((sis_priv->chipset_rev >= SIS635A_900_REV) ||
2279 (sis_priv->chipset_rev == SIS900B_900_REV))
2280 table_entries = 16;
2281 else
2282 table_entries = 8;
2283
2284 if (net_dev->flags & IFF_PROMISC) {
2285 /* Accept any kinds of packets */
2286 rx_mode = RFPromiscuous;
2287 for (i = 0; i < table_entries; i++)
2288 mc_filter[i] = 0xffff;
2289 } else if ((net_dev->mc_count > multicast_filter_limit) ||
2290 (net_dev->flags & IFF_ALLMULTI)) {
2291 /* too many multicast addresses or accept all multicast packet */
2292 rx_mode = RFAAB | RFAAM;
2293 for (i = 0; i < table_entries; i++)
2294 mc_filter[i] = 0xffff;
2295 } else {
2296 /* Accept Broadcast packet, destination address matchs our
2297 * MAC address, use Receive Filter to reject unwanted MCAST
2298 * packets */
2299 struct dev_mc_list *mclist;
2300 rx_mode = RFAAB;
2301 for (i = 0, mclist = net_dev->mc_list;
2302 mclist && i < net_dev->mc_count;
2303 i++, mclist = mclist->next) {
2304 unsigned int bit_nr =
2305 sis900_mcast_bitnr(mclist->dmi_addr, sis_priv->chipset_rev);
2306 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2307 }
2308 }
2309
2310 /* update Multicast Hash Table in Receive Filter */
2311 for (i = 0; i < table_entries; i++) {
2312 /* why plus 0x04 ??, That makes the correct value for hash table. */
2313 outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr);
2314 outl(mc_filter[i], ioaddr + rfdr);
2315 }
2316
2317 outl(RFEN | rx_mode, ioaddr + rfcr);
2318
2319 /* sis900 is capable of looping back packets at MAC level for
2320 * debugging purpose */
2321 if (net_dev->flags & IFF_LOOPBACK) {
2322 u32 cr_saved;
2323 /* We must disable Tx/Rx before setting loopback mode */
2324 cr_saved = inl(ioaddr + cr);
2325 outl(cr_saved | TxDIS | RxDIS, ioaddr + cr);
2326 /* enable loopback */
2327 outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg);
2328 outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg);
2329 /* restore cr */
2330 outl(cr_saved, ioaddr + cr);
2331 }
2332
2333 return;
2334}
2335
2336/**
6aa20a22 2337 * sis900_reset - Reset sis900 MAC
1da177e4
LT
2338 * @net_dev: the net device to reset
2339 *
2340 * reset sis900 MAC and wait until finished
2341 * reset through command register
2342 * change backoff algorithm for 900B0 & 635 M/B
2343 */
2344
2345static void sis900_reset(struct net_device *net_dev)
2346{
2347 struct sis900_private * sis_priv = net_dev->priv;
2348 long ioaddr = net_dev->base_addr;
2349 int i = 0;
2350 u32 status = TxRCMP | RxRCMP;
2351
2352 outl(0, ioaddr + ier);
2353 outl(0, ioaddr + imr);
2354 outl(0, ioaddr + rfcr);
2355
2356 outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
6aa20a22 2357
1da177e4
LT
2358 /* Check that the chip has finished the reset. */
2359 while (status && (i++ < 1000)) {
2360 status ^= (inl(isr + ioaddr) & status);
2361 }
2362
2363 if( (sis_priv->chipset_rev >= SIS635A_900_REV) ||
2364 (sis_priv->chipset_rev == SIS900B_900_REV) )
2365 outl(PESEL | RND_CNT, ioaddr + cfg);
2366 else
2367 outl(PESEL, ioaddr + cfg);
2368}
2369
2370/**
6aa20a22 2371 * sis900_remove - Remove sis900 device
1da177e4
LT
2372 * @pci_dev: the pci device to be removed
2373 *
2374 * remove and release SiS900 net device
2375 */
2376
2377static void __devexit sis900_remove(struct pci_dev *pci_dev)
2378{
2379 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2380 struct sis900_private * sis_priv = net_dev->priv;
2381 struct mii_phy *phy = NULL;
2382
2383 while (sis_priv->first_mii) {
2384 phy = sis_priv->first_mii;
2385 sis_priv->first_mii = phy->next;
2386 kfree(phy);
2387 }
2388
2389 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2390 sis_priv->rx_ring_dma);
2391 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2392 sis_priv->tx_ring_dma);
2393 unregister_netdev(net_dev);
2394 free_netdev(net_dev);
2395 pci_release_regions(pci_dev);
2396 pci_set_drvdata(pci_dev, NULL);
2397}
2398
2399#ifdef CONFIG_PM
2400
2401static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2402{
2403 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2404 long ioaddr = net_dev->base_addr;
2405
2406 if(!netif_running(net_dev))
2407 return 0;
2408
2409 netif_stop_queue(net_dev);
2410 netif_device_detach(net_dev);
2411
2412 /* Stop the chip's Tx and Rx Status Machine */
2413 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
2414
2415 pci_set_power_state(pci_dev, PCI_D3hot);
2416 pci_save_state(pci_dev);
2417
2418 return 0;
2419}
2420
2421static int sis900_resume(struct pci_dev *pci_dev)
2422{
2423 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2424 struct sis900_private *sis_priv = net_dev->priv;
2425 long ioaddr = net_dev->base_addr;
2426
2427 if(!netif_running(net_dev))
2428 return 0;
2429 pci_restore_state(pci_dev);
2430 pci_set_power_state(pci_dev, PCI_D0);
2431
2432 sis900_init_rxfilter(net_dev);
2433
2434 sis900_init_tx_ring(net_dev);
2435 sis900_init_rx_ring(net_dev);
2436
2437 set_rx_mode(net_dev);
2438
2439 netif_device_attach(net_dev);
2440 netif_start_queue(net_dev);
2441
2442 /* Workaround for EDB */
2443 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2444
2445 /* Enable all known interrupts by setting the interrupt mask. */
2446 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
2447 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
2448 outl(IE, ioaddr + ier);
2449
2450 sis900_check_mode(net_dev, sis_priv->mii);
2451
2452 return 0;
2453}
2454#endif /* CONFIG_PM */
2455
2456static struct pci_driver sis900_pci_driver = {
2457 .name = SIS900_MODULE_NAME,
2458 .id_table = sis900_pci_tbl,
2459 .probe = sis900_probe,
2460 .remove = __devexit_p(sis900_remove),
2461#ifdef CONFIG_PM
2462 .suspend = sis900_suspend,
2463 .resume = sis900_resume,
2464#endif /* CONFIG_PM */
2465};
2466
2467static int __init sis900_init_module(void)
2468{
2469/* when a module, this is printed whether or not devices are found in probe */
2470#ifdef MODULE
2471 printk(version);
2472#endif
2473
29917620 2474 return pci_register_driver(&sis900_pci_driver);
1da177e4
LT
2475}
2476
2477static void __exit sis900_cleanup_module(void)
2478{
2479 pci_unregister_driver(&sis900_pci_driver);
2480}
2481
2482module_init(sis900_init_module);
2483module_exit(sis900_cleanup_module);
2484