]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /****************************************************************************** |
2 | * | |
3 | * Name: skdrv2nd.h | |
4 | * Project: GEnesis, PCI Gigabit Ethernet Adapter | |
5 | * Version: $Revision: 1.10 $ | |
6 | * Date: $Date: 2003/12/11 16:04:45 $ | |
7 | * Purpose: Second header file for driver and all other modules | |
8 | * | |
9 | ******************************************************************************/ | |
10 | ||
11 | /****************************************************************************** | |
12 | * | |
13 | * (C)Copyright 1998-2002 SysKonnect GmbH. | |
14 | * (C)Copyright 2002-2003 Marvell. | |
15 | * | |
16 | * This program is free software; you can redistribute it and/or modify | |
17 | * it under the terms of the GNU General Public License as published by | |
18 | * the Free Software Foundation; either version 2 of the License, or | |
19 | * (at your option) any later version. | |
20 | * | |
21 | * The information in this file is provided "AS IS" without warranty. | |
22 | * | |
23 | ******************************************************************************/ | |
24 | ||
25 | /****************************************************************************** | |
26 | * | |
27 | * Description: | |
28 | * | |
29 | * This is the second include file of the driver, which includes all other | |
30 | * neccessary files and defines all structures and constants used by the | |
31 | * driver and the common modules. | |
32 | * | |
33 | * Include File Hierarchy: | |
34 | * | |
35 | * see skge.c | |
36 | * | |
37 | ******************************************************************************/ | |
38 | ||
39 | #ifndef __INC_SKDRV2ND_H | |
40 | #define __INC_SKDRV2ND_H | |
41 | ||
42 | #include "h/skqueue.h" | |
43 | #include "h/skgehwt.h" | |
44 | #include "h/sktimer.h" | |
45 | #include "h/ski2c.h" | |
46 | #include "h/skgepnmi.h" | |
47 | #include "h/skvpd.h" | |
48 | #include "h/skgehw.h" | |
49 | #include "h/skgeinit.h" | |
50 | #include "h/skaddr.h" | |
51 | #include "h/skgesirq.h" | |
52 | #include "h/skcsum.h" | |
53 | #include "h/skrlmt.h" | |
54 | #include "h/skgedrv.h" | |
55 | ||
56 | ||
57 | extern SK_MBUF *SkDrvAllocRlmtMbuf(SK_AC*, SK_IOC, unsigned); | |
58 | extern void SkDrvFreeRlmtMbuf(SK_AC*, SK_IOC, SK_MBUF*); | |
59 | extern SK_U64 SkOsGetTime(SK_AC*); | |
60 | extern int SkPciReadCfgDWord(SK_AC*, int, SK_U32*); | |
61 | extern int SkPciReadCfgWord(SK_AC*, int, SK_U16*); | |
62 | extern int SkPciReadCfgByte(SK_AC*, int, SK_U8*); | |
63 | extern int SkPciWriteCfgDWord(SK_AC*, int, SK_U32); | |
64 | extern int SkPciWriteCfgWord(SK_AC*, int, SK_U16); | |
65 | extern int SkPciWriteCfgByte(SK_AC*, int, SK_U8); | |
66 | extern int SkDrvEvent(SK_AC*, SK_IOC IoC, SK_U32, SK_EVPARA); | |
67 | ||
68 | #ifdef SK_DIAG_SUPPORT | |
69 | extern int SkDrvEnterDiagMode(SK_AC *pAc); | |
70 | extern int SkDrvLeaveDiagMode(SK_AC *pAc); | |
71 | #endif | |
72 | ||
73 | struct s_DrvRlmtMbuf { | |
74 | SK_MBUF *pNext; /* Pointer to next RLMT Mbuf. */ | |
75 | SK_U8 *pData; /* Data buffer (virtually contig.). */ | |
76 | unsigned Size; /* Data buffer size. */ | |
77 | unsigned Length; /* Length of packet (<= Size). */ | |
78 | SK_U32 PortIdx; /* Receiving/transmitting port. */ | |
79 | #ifdef SK_RLMT_MBUF_PRIVATE | |
80 | SK_RLMT_MBUF Rlmt; /* Private part for RLMT. */ | |
81 | #endif /* SK_RLMT_MBUF_PRIVATE */ | |
82 | struct sk_buff *pOs; /* Pointer to message block */ | |
83 | }; | |
84 | ||
85 | ||
86 | /* | |
87 | * Time macros | |
88 | */ | |
89 | #if SK_TICKS_PER_SEC == 100 | |
90 | #define SK_PNMI_HUNDREDS_SEC(t) (t) | |
91 | #else | |
92 | #define SK_PNMI_HUNDREDS_SEC(t) ((((unsigned long)t) * 100) / \ | |
93 | (SK_TICKS_PER_SEC)) | |
94 | #endif | |
95 | ||
96 | /* | |
97 | * New SkOsGetTime | |
98 | */ | |
99 | #define SkOsGetTimeCurrent(pAC, pUsec) {\ | |
100 | struct timeval t;\ | |
101 | do_gettimeofday(&t);\ | |
102 | *pUsec = ((((t.tv_sec) * 1000000L)+t.tv_usec)/10000);\ | |
103 | } | |
104 | ||
105 | ||
106 | /* | |
107 | * ioctl definitions | |
108 | */ | |
109 | #define SK_IOCTL_BASE (SIOCDEVPRIVATE) | |
110 | #define SK_IOCTL_GETMIB (SK_IOCTL_BASE + 0) | |
111 | #define SK_IOCTL_SETMIB (SK_IOCTL_BASE + 1) | |
112 | #define SK_IOCTL_PRESETMIB (SK_IOCTL_BASE + 2) | |
113 | #define SK_IOCTL_GEN (SK_IOCTL_BASE + 3) | |
114 | #define SK_IOCTL_DIAG (SK_IOCTL_BASE + 4) | |
115 | ||
116 | typedef struct s_IOCTL SK_GE_IOCTL; | |
117 | ||
118 | struct s_IOCTL { | |
119 | char __user * pData; | |
120 | unsigned int Len; | |
121 | }; | |
122 | ||
123 | ||
124 | /* | |
125 | * define sizes of descriptor rings in bytes | |
126 | */ | |
127 | ||
128 | #define TX_RING_SIZE (8*1024) | |
129 | #define RX_RING_SIZE (24*1024) | |
130 | ||
131 | /* | |
132 | * Buffer size for ethernet packets | |
133 | */ | |
134 | #define ETH_BUF_SIZE 1540 | |
135 | #define ETH_MAX_MTU 1514 | |
136 | #define ETH_MIN_MTU 60 | |
137 | #define ETH_MULTICAST_BIT 0x01 | |
138 | #define SK_JUMBO_MTU 9000 | |
139 | ||
140 | /* | |
141 | * transmit priority selects the queue: LOW=asynchron, HIGH=synchron | |
142 | */ | |
143 | #define TX_PRIO_LOW 0 | |
144 | #define TX_PRIO_HIGH 1 | |
145 | ||
146 | /* | |
147 | * alignment of rx/tx descriptors | |
148 | */ | |
149 | #define DESCR_ALIGN 64 | |
150 | ||
151 | /* | |
152 | * definitions for pnmi. TODO | |
153 | */ | |
154 | #define SK_DRIVER_RESET(pAC, IoC) 0 | |
155 | #define SK_DRIVER_SENDEVENT(pAC, IoC) 0 | |
156 | #define SK_DRIVER_SELFTEST(pAC, IoC) 0 | |
157 | /* For get mtu you must add an own function */ | |
158 | #define SK_DRIVER_GET_MTU(pAc,IoC,i) 0 | |
159 | #define SK_DRIVER_SET_MTU(pAc,IoC,i,v) 0 | |
160 | #define SK_DRIVER_PRESET_MTU(pAc,IoC,i,v) 0 | |
161 | ||
162 | /* | |
163 | ** Interim definition of SK_DRV_TIMER placed in this file until | |
164 | ** common modules have boon finallized | |
165 | */ | |
166 | #define SK_DRV_TIMER 11 | |
167 | #define SK_DRV_MODERATION_TIMER 1 | |
168 | #define SK_DRV_MODERATION_TIMER_LENGTH 1000000 /* 1 second */ | |
169 | #define SK_DRV_RX_CLEANUP_TIMER 2 | |
170 | #define SK_DRV_RX_CLEANUP_TIMER_LENGTH 1000000 /* 100 millisecs */ | |
171 | ||
172 | /* | |
173 | ** Definitions regarding transmitting frames | |
174 | ** any calculating any checksum. | |
175 | */ | |
176 | #define C_LEN_ETHERMAC_HEADER_DEST_ADDR 6 | |
177 | #define C_LEN_ETHERMAC_HEADER_SRC_ADDR 6 | |
178 | #define C_LEN_ETHERMAC_HEADER_LENTYPE 2 | |
179 | #define C_LEN_ETHERMAC_HEADER ( (C_LEN_ETHERMAC_HEADER_DEST_ADDR) + \ | |
180 | (C_LEN_ETHERMAC_HEADER_SRC_ADDR) + \ | |
181 | (C_LEN_ETHERMAC_HEADER_LENTYPE) ) | |
182 | ||
183 | #define C_LEN_ETHERMTU_MINSIZE 46 | |
184 | #define C_LEN_ETHERMTU_MAXSIZE_STD 1500 | |
185 | #define C_LEN_ETHERMTU_MAXSIZE_JUMBO 9000 | |
186 | ||
187 | #define C_LEN_ETHERNET_MINSIZE ( (C_LEN_ETHERMAC_HEADER) + \ | |
188 | (C_LEN_ETHERMTU_MINSIZE) ) | |
189 | ||
190 | #define C_OFFSET_IPHEADER C_LEN_ETHERMAC_HEADER | |
191 | #define C_OFFSET_IPHEADER_IPPROTO 9 | |
192 | #define C_OFFSET_TCPHEADER_TCPCS 16 | |
193 | #define C_OFFSET_UDPHEADER_UDPCS 6 | |
194 | ||
195 | #define C_OFFSET_IPPROTO ( (C_LEN_ETHERMAC_HEADER) + \ | |
196 | (C_OFFSET_IPHEADER_IPPROTO) ) | |
197 | ||
198 | #define C_PROTO_ID_UDP 17 /* refer to RFC 790 or Stevens' */ | |
199 | #define C_PROTO_ID_TCP 6 /* TCP/IP illustrated for details */ | |
200 | ||
201 | /* TX and RX descriptors *****************************************************/ | |
202 | ||
203 | typedef struct s_RxD RXD; /* the receive descriptor */ | |
204 | ||
205 | struct s_RxD { | |
206 | volatile SK_U32 RBControl; /* Receive Buffer Control */ | |
207 | SK_U32 VNextRxd; /* Next receive descriptor,low dword */ | |
208 | SK_U32 VDataLow; /* Receive buffer Addr, low dword */ | |
209 | SK_U32 VDataHigh; /* Receive buffer Addr, high dword */ | |
210 | SK_U32 FrameStat; /* Receive Frame Status word */ | |
211 | SK_U32 TimeStamp; /* Time stamp from XMAC */ | |
212 | SK_U32 TcpSums; /* TCP Sum 2 / TCP Sum 1 */ | |
213 | SK_U32 TcpSumStarts; /* TCP Sum Start 2 / TCP Sum Start 1 */ | |
214 | RXD *pNextRxd; /* Pointer to next Rxd */ | |
215 | struct sk_buff *pMBuf; /* Pointer to Linux' socket buffer */ | |
216 | }; | |
217 | ||
218 | typedef struct s_TxD TXD; /* the transmit descriptor */ | |
219 | ||
220 | struct s_TxD { | |
221 | volatile SK_U32 TBControl; /* Transmit Buffer Control */ | |
222 | SK_U32 VNextTxd; /* Next transmit descriptor,low dword */ | |
223 | SK_U32 VDataLow; /* Transmit Buffer Addr, low dword */ | |
224 | SK_U32 VDataHigh; /* Transmit Buffer Addr, high dword */ | |
225 | SK_U32 FrameStat; /* Transmit Frame Status Word */ | |
226 | SK_U32 TcpSumOfs; /* Reserved / TCP Sum Offset */ | |
227 | SK_U16 TcpSumSt; /* TCP Sum Start */ | |
228 | SK_U16 TcpSumWr; /* TCP Sum Write */ | |
229 | SK_U32 TcpReserved; /* not used */ | |
230 | TXD *pNextTxd; /* Pointer to next Txd */ | |
231 | struct sk_buff *pMBuf; /* Pointer to Linux' socket buffer */ | |
232 | }; | |
233 | ||
234 | /* Used interrupt bits in the interrupts source register *********************/ | |
235 | ||
236 | #define DRIVER_IRQS ((IS_IRQ_SW) | \ | |
237 | (IS_R1_F) |(IS_R2_F) | \ | |
238 | (IS_XS1_F) |(IS_XA1_F) | \ | |
239 | (IS_XS2_F) |(IS_XA2_F)) | |
240 | ||
241 | #define SPECIAL_IRQS ((IS_HW_ERR) |(IS_I2C_READY) | \ | |
242 | (IS_EXT_REG) |(IS_TIMINT) | \ | |
243 | (IS_PA_TO_RX1) |(IS_PA_TO_RX2) | \ | |
244 | (IS_PA_TO_TX1) |(IS_PA_TO_TX2) | \ | |
245 | (IS_MAC1) |(IS_LNK_SYNC_M1)| \ | |
246 | (IS_MAC2) |(IS_LNK_SYNC_M2)| \ | |
247 | (IS_R1_C) |(IS_R2_C) | \ | |
248 | (IS_XS1_C) |(IS_XA1_C) | \ | |
249 | (IS_XS2_C) |(IS_XA2_C)) | |
250 | ||
251 | #define IRQ_MASK ((IS_IRQ_SW) | \ | |
252 | (IS_R1_B) |(IS_R1_F) |(IS_R2_B) |(IS_R2_F) | \ | |
253 | (IS_XS1_B) |(IS_XS1_F) |(IS_XA1_B)|(IS_XA1_F)| \ | |
254 | (IS_XS2_B) |(IS_XS2_F) |(IS_XA2_B)|(IS_XA2_F)| \ | |
255 | (IS_HW_ERR) |(IS_I2C_READY)| \ | |
256 | (IS_EXT_REG) |(IS_TIMINT) | \ | |
257 | (IS_PA_TO_RX1) |(IS_PA_TO_RX2)| \ | |
258 | (IS_PA_TO_TX1) |(IS_PA_TO_TX2)| \ | |
259 | (IS_MAC1) |(IS_MAC2) | \ | |
260 | (IS_R1_C) |(IS_R2_C) | \ | |
261 | (IS_XS1_C) |(IS_XA1_C) | \ | |
262 | (IS_XS2_C) |(IS_XA2_C)) | |
263 | ||
264 | #define IRQ_HWE_MASK (IS_ERR_MSK) /* enable all HW irqs */ | |
265 | ||
266 | typedef struct s_DevNet DEV_NET; | |
267 | ||
268 | struct s_DevNet { | |
269 | int PortNr; | |
270 | int NetNr; | |
271 | int Mtu; | |
272 | int Up; | |
273 | SK_AC *pAC; | |
274 | }; | |
275 | ||
276 | typedef struct s_TxPort TX_PORT; | |
277 | ||
278 | struct s_TxPort { | |
279 | /* the transmit descriptor rings */ | |
280 | caddr_t pTxDescrRing; /* descriptor area memory */ | |
281 | SK_U64 VTxDescrRing; /* descr. area bus virt. addr. */ | |
282 | TXD *pTxdRingHead; /* Head of Tx rings */ | |
283 | TXD *pTxdRingTail; /* Tail of Tx rings */ | |
284 | TXD *pTxdRingPrev; /* descriptor sent previously */ | |
285 | int TxdRingFree; /* # of free entrys */ | |
286 | spinlock_t TxDesRingLock; /* serialize descriptor accesses */ | |
287 | SK_IOC HwAddr; /* bmu registers address */ | |
288 | int PortIndex; /* index number of port (0 or 1) */ | |
289 | }; | |
290 | ||
291 | typedef struct s_RxPort RX_PORT; | |
292 | ||
293 | struct s_RxPort { | |
294 | /* the receive descriptor rings */ | |
295 | caddr_t pRxDescrRing; /* descriptor area memory */ | |
296 | SK_U64 VRxDescrRing; /* descr. area bus virt. addr. */ | |
297 | RXD *pRxdRingHead; /* Head of Rx rings */ | |
298 | RXD *pRxdRingTail; /* Tail of Rx rings */ | |
299 | RXD *pRxdRingPrev; /* descriptor given to BMU previously */ | |
300 | int RxdRingFree; /* # of free entrys */ | |
301 | spinlock_t RxDesRingLock; /* serialize descriptor accesses */ | |
302 | int RxFillLimit; /* limit for buffers in ring */ | |
303 | SK_IOC HwAddr; /* bmu registers address */ | |
304 | int PortIndex; /* index number of port (0 or 1) */ | |
305 | }; | |
306 | ||
307 | /* Definitions needed for interrupt moderation *******************************/ | |
308 | ||
309 | #define IRQ_EOF_AS_TX ((IS_XA1_F) | (IS_XA2_F)) | |
310 | #define IRQ_EOF_SY_TX ((IS_XS1_F) | (IS_XS2_F)) | |
311 | #define IRQ_MASK_TX_ONLY ((IRQ_EOF_AS_TX)| (IRQ_EOF_SY_TX)) | |
312 | #define IRQ_MASK_RX_ONLY ((IS_R1_F) | (IS_R2_F)) | |
313 | #define IRQ_MASK_SP_ONLY (SPECIAL_IRQS) | |
314 | #define IRQ_MASK_TX_RX ((IRQ_MASK_TX_ONLY)| (IRQ_MASK_RX_ONLY)) | |
315 | #define IRQ_MASK_SP_RX ((SPECIAL_IRQS) | (IRQ_MASK_RX_ONLY)) | |
316 | #define IRQ_MASK_SP_TX ((SPECIAL_IRQS) | (IRQ_MASK_TX_ONLY)) | |
317 | #define IRQ_MASK_RX_TX_SP ((SPECIAL_IRQS) | (IRQ_MASK_TX_RX)) | |
318 | ||
319 | #define C_INT_MOD_NONE 1 | |
320 | #define C_INT_MOD_STATIC 2 | |
321 | #define C_INT_MOD_DYNAMIC 4 | |
322 | ||
323 | #define C_CLK_FREQ_GENESIS 53215000 /* shorter: 53.125 MHz */ | |
324 | #define C_CLK_FREQ_YUKON 78215000 /* shorter: 78.125 MHz */ | |
325 | ||
326 | #define C_INTS_PER_SEC_DEFAULT 2000 | |
327 | #define C_INT_MOD_ENABLE_PERCENTAGE 50 /* if higher 50% enable */ | |
328 | #define C_INT_MOD_DISABLE_PERCENTAGE 50 /* if lower 50% disable */ | |
329 | #define C_INT_MOD_IPS_LOWER_RANGE 30 | |
330 | #define C_INT_MOD_IPS_UPPER_RANGE 40000 | |
331 | ||
332 | ||
333 | typedef struct s_DynIrqModInfo DIM_INFO; | |
334 | struct s_DynIrqModInfo { | |
335 | unsigned long PrevTimeVal; | |
336 | unsigned int PrevSysLoad; | |
337 | unsigned int PrevUsedTime; | |
338 | unsigned int PrevTotalTime; | |
339 | int PrevUsedDescrRatio; | |
340 | int NbrProcessedDescr; | |
341 | SK_U64 PrevPort0RxIntrCts; | |
342 | SK_U64 PrevPort1RxIntrCts; | |
343 | SK_U64 PrevPort0TxIntrCts; | |
344 | SK_U64 PrevPort1TxIntrCts; | |
345 | SK_BOOL ModJustEnabled; /* Moderation just enabled yes/no */ | |
346 | ||
347 | int MaxModIntsPerSec; /* Moderation Threshold */ | |
348 | int MaxModIntsPerSecUpperLimit; /* Upper limit for DIM */ | |
349 | int MaxModIntsPerSecLowerLimit; /* Lower limit for DIM */ | |
350 | ||
351 | long MaskIrqModeration; /* ModIrqType (eg. 'TxRx') */ | |
352 | SK_BOOL DisplayStats; /* Stats yes/no */ | |
353 | SK_BOOL AutoSizing; /* Resize DIM-timer on/off */ | |
354 | int IntModTypeSelect; /* EnableIntMod (eg. 'dynamic') */ | |
355 | ||
356 | SK_TIMER ModTimer; /* just some timer */ | |
357 | }; | |
358 | ||
359 | typedef struct s_PerStrm PER_STRM; | |
360 | ||
361 | #define SK_ALLOC_IRQ 0x00000001 | |
362 | ||
363 | #ifdef SK_DIAG_SUPPORT | |
364 | #define DIAG_ACTIVE 1 | |
365 | #define DIAG_NOTACTIVE 0 | |
366 | #endif | |
367 | ||
368 | /**************************************************************************** | |
369 | * Per board structure / Adapter Context structure: | |
370 | * Allocated within attach(9e) and freed within detach(9e). | |
371 | * Contains all 'per device' necessary handles, flags, locks etc.: | |
372 | */ | |
373 | struct s_AC { | |
374 | SK_GEINIT GIni; /* GE init struct */ | |
375 | SK_PNMI Pnmi; /* PNMI data struct */ | |
376 | SK_VPD vpd; /* vpd data struct */ | |
377 | SK_QUEUE Event; /* Event queue */ | |
378 | SK_HWT Hwt; /* Hardware Timer control struct */ | |
379 | SK_TIMCTRL Tim; /* Software Timer control struct */ | |
380 | SK_I2C I2c; /* I2C relevant data structure */ | |
381 | SK_ADDR Addr; /* for Address module */ | |
382 | SK_CSUM Csum; /* for checksum module */ | |
383 | SK_RLMT Rlmt; /* for rlmt module */ | |
384 | spinlock_t SlowPathLock; /* Normal IRQ lock */ | |
385 | struct timer_list BlinkTimer; /* for LED blinking */ | |
386 | int LedsOn; | |
387 | SK_PNMI_STRUCT_DATA PnmiStruct; /* structure to get all Pnmi-Data */ | |
388 | int RlmtMode; /* link check mode to set */ | |
389 | int RlmtNets; /* Number of nets */ | |
390 | ||
391 | SK_IOC IoBase; /* register set of adapter */ | |
392 | int BoardLevel; /* level of active hw init (0-2) */ | |
393 | char DeviceStr[80]; /* adapter string from vpd */ | |
394 | SK_U32 AllocFlag; /* flag allocation of resources */ | |
395 | struct pci_dev *PciDev; /* for access to pci config space */ | |
396 | SK_U32 PciDevId; /* pci device id */ | |
397 | struct SK_NET_DEVICE *dev[2]; /* pointer to device struct */ | |
398 | char Name[30]; /* driver name */ | |
399 | ||
400 | int RxBufSize; /* length of receive buffers */ | |
401 | struct net_device_stats stats; /* linux 'netstat -i' statistics */ | |
402 | int Index; /* internal board index number */ | |
403 | ||
404 | /* adapter RAM sizes for queues of active port */ | |
405 | int RxQueueSize; /* memory used for receive queue */ | |
406 | int TxSQueueSize; /* memory used for sync. tx queue */ | |
407 | int TxAQueueSize; /* memory used for async. tx queue */ | |
408 | ||
409 | int PromiscCount; /* promiscuous mode counter */ | |
410 | int AllMultiCount; /* allmulticast mode counter */ | |
411 | int MulticCount; /* number of different MC */ | |
412 | /* addresses for this board */ | |
413 | /* (may be more than HW can)*/ | |
414 | ||
415 | int HWRevision; /* Hardware revision */ | |
416 | int ActivePort; /* the active XMAC port */ | |
417 | int MaxPorts; /* number of activated ports */ | |
418 | int TxDescrPerRing; /* # of descriptors per tx ring */ | |
419 | int RxDescrPerRing; /* # of descriptors per rx ring */ | |
420 | ||
421 | caddr_t pDescrMem; /* Pointer to the descriptor area */ | |
422 | dma_addr_t pDescrMemDMA; /* PCI DMA address of area */ | |
423 | ||
424 | /* the port structures with descriptor rings */ | |
425 | TX_PORT TxPort[SK_MAX_MACS][2]; | |
426 | RX_PORT RxPort[SK_MAX_MACS]; | |
427 | ||
1da177e4 LT |
428 | SK_BOOL CheckQueue; /* check event queue soon */ |
429 | SK_TIMER DrvCleanupTimer;/* to check for pending descriptors */ | |
430 | DIM_INFO DynIrqModInfo; /* all data related to DIM */ | |
431 | ||
432 | /* Only for tests */ | |
433 | int PortUp; | |
434 | int PortDown; | |
435 | int ChipsetType; /* Chipset family type | |
436 | * 0 == Genesis family support | |
437 | * 1 == Yukon family support | |
438 | */ | |
439 | #ifdef SK_DIAG_SUPPORT | |
440 | SK_U32 DiagModeActive; /* is diag active? */ | |
441 | SK_BOOL DiagFlowCtrl; /* for control purposes */ | |
442 | SK_PNMI_STRUCT_DATA PnmiBackup; /* backup structure for all Pnmi-Data */ | |
443 | SK_BOOL WasIfUp[SK_MAX_MACS]; /* for OpenClose while | |
444 | * DIAG is busy with NIC | |
445 | */ | |
446 | #endif | |
447 | ||
448 | }; | |
449 | ||
450 | ||
451 | #endif /* __INC_SKDRV2ND_H */ | |
452 |