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1da177e4 LT |
1 | /* $Id: sunlance.c,v 1.112 2002/01/15 06:48:55 davem Exp $ |
2 | * lance.c: Linux/Sparc/Lance driver | |
3 | * | |
4 | * Written 1995, 1996 by Miguel de Icaza | |
5 | * Sources: | |
6 | * The Linux depca driver | |
7 | * The Linux lance driver. | |
8 | * The Linux skeleton driver. | |
9 | * The NetBSD Sparc/Lance driver. | |
10 | * Theo de Raadt (deraadt@openbsd.org) | |
11 | * NCR92C990 Lan Controller manual | |
12 | * | |
13 | * 1.4: | |
14 | * Added support to run with a ledma on the Sun4m | |
15 | * | |
16 | * 1.5: | |
17 | * Added multiple card detection. | |
18 | * | |
19 | * 4/17/96: Burst sizes and tpe selection on sun4m by Eddie C. Dost | |
20 | * (ecd@skynet.be) | |
21 | * | |
22 | * 5/15/96: auto carrier detection on sun4m by Eddie C. Dost | |
23 | * (ecd@skynet.be) | |
24 | * | |
25 | * 5/17/96: lebuffer on scsi/ether cards now work David S. Miller | |
26 | * (davem@caip.rutgers.edu) | |
27 | * | |
28 | * 5/29/96: override option 'tpe-link-test?', if it is 'false', as | |
29 | * this disables auto carrier detection on sun4m. Eddie C. Dost | |
30 | * (ecd@skynet.be) | |
31 | * | |
32 | * 1.7: | |
33 | * 6/26/96: Bug fix for multiple ledmas, miguel. | |
34 | * | |
35 | * 1.8: | |
36 | * Stole multicast code from depca.c, fixed lance_tx. | |
37 | * | |
38 | * 1.9: | |
39 | * 8/21/96: Fixed the multicast code (Pedro Roque) | |
40 | * | |
41 | * 8/28/96: Send fake packet in lance_open() if auto_select is true, | |
42 | * so we can detect the carrier loss condition in time. | |
43 | * Eddie C. Dost (ecd@skynet.be) | |
44 | * | |
45 | * 9/15/96: Align rx_buf so that eth_copy_and_sum() won't cause an | |
46 | * MNA trap during chksum_partial_copy(). (ecd@skynet.be) | |
47 | * | |
48 | * 11/17/96: Handle LE_C0_MERR in lance_interrupt(). (ecd@skynet.be) | |
49 | * | |
50 | * 12/22/96: Don't loop forever in lance_rx() on incomplete packets. | |
51 | * This was the sun4c killer. Shit, stupid bug. | |
52 | * (ecd@skynet.be) | |
53 | * | |
54 | * 1.10: | |
55 | * 1/26/97: Modularize driver. (ecd@skynet.be) | |
56 | * | |
57 | * 1.11: | |
58 | * 12/27/97: Added sun4d support. (jj@sunsite.mff.cuni.cz) | |
59 | * | |
60 | * 1.12: | |
61 | * 11/3/99: Fixed SMP race in lance_start_xmit found by davem. | |
62 | * Anton Blanchard (anton@progsoc.uts.edu.au) | |
63 | * 2.00: 11/9/99: Massive overhaul and port to new SBUS driver interfaces. | |
64 | * David S. Miller (davem@redhat.com) | |
65 | * 2.01: | |
66 | * 11/08/01: Use library crc32 functions (Matt_Domsch@dell.com) | |
6aa20a22 | 67 | * |
1da177e4 LT |
68 | */ |
69 | ||
70 | #undef DEBUG_DRIVER | |
71 | ||
1da177e4 LT |
72 | static char lancestr[] = "LANCE"; |
73 | ||
1da177e4 LT |
74 | #include <linux/module.h> |
75 | #include <linux/kernel.h> | |
76 | #include <linux/types.h> | |
77 | #include <linux/fcntl.h> | |
78 | #include <linux/interrupt.h> | |
79 | #include <linux/ioport.h> | |
80 | #include <linux/in.h> | |
81 | #include <linux/slab.h> | |
82 | #include <linux/string.h> | |
83 | #include <linux/delay.h> | |
84 | #include <linux/init.h> | |
85 | #include <linux/crc32.h> | |
86 | #include <linux/errno.h> | |
87 | #include <linux/socket.h> /* Used for the temporal inet entries and routing */ | |
88 | #include <linux/route.h> | |
89 | #include <linux/netdevice.h> | |
90 | #include <linux/etherdevice.h> | |
91 | #include <linux/skbuff.h> | |
92 | #include <linux/ethtool.h> | |
93 | #include <linux/bitops.h> | |
94 | ||
95 | #include <asm/system.h> | |
96 | #include <asm/io.h> | |
97 | #include <asm/dma.h> | |
98 | #include <asm/pgtable.h> | |
99 | #include <asm/byteorder.h> /* Used by the checksum routines */ | |
100 | #include <asm/idprom.h> | |
101 | #include <asm/sbus.h> | |
76fcdb30 | 102 | #include <asm/prom.h> |
1da177e4 LT |
103 | #include <asm/auxio.h> /* For tpe-link-test? setting */ |
104 | #include <asm/irq.h> | |
105 | ||
10158286 TC |
106 | #define DRV_NAME "sunlance" |
107 | #define DRV_VERSION "2.02" | |
108 | #define DRV_RELDATE "8/24/03" | |
109 | #define DRV_AUTHOR "Miguel de Icaza (miguel@nuclecu.unam.mx)" | |
110 | ||
111 | static char version[] = | |
112 | DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n"; | |
113 | ||
114 | MODULE_VERSION(DRV_VERSION); | |
115 | MODULE_AUTHOR(DRV_AUTHOR); | |
116 | MODULE_DESCRIPTION("Sun Lance ethernet driver"); | |
117 | MODULE_LICENSE("GPL"); | |
118 | ||
1da177e4 LT |
119 | /* Define: 2^4 Tx buffers and 2^4 Rx buffers */ |
120 | #ifndef LANCE_LOG_TX_BUFFERS | |
121 | #define LANCE_LOG_TX_BUFFERS 4 | |
122 | #define LANCE_LOG_RX_BUFFERS 4 | |
123 | #endif | |
124 | ||
125 | #define LE_CSR0 0 | |
126 | #define LE_CSR1 1 | |
127 | #define LE_CSR2 2 | |
128 | #define LE_CSR3 3 | |
129 | ||
130 | #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */ | |
131 | ||
132 | #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */ | |
133 | #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */ | |
134 | #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */ | |
135 | #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */ | |
136 | #define LE_C0_MERR 0x0800 /* ME: Memory error */ | |
137 | #define LE_C0_RINT 0x0400 /* Received interrupt */ | |
138 | #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */ | |
139 | #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */ | |
140 | #define LE_C0_INTR 0x0080 /* Interrupt or error */ | |
141 | #define LE_C0_INEA 0x0040 /* Interrupt enable */ | |
142 | #define LE_C0_RXON 0x0020 /* Receiver on */ | |
143 | #define LE_C0_TXON 0x0010 /* Transmitter on */ | |
144 | #define LE_C0_TDMD 0x0008 /* Transmitter demand */ | |
145 | #define LE_C0_STOP 0x0004 /* Stop the card */ | |
146 | #define LE_C0_STRT 0x0002 /* Start the card */ | |
147 | #define LE_C0_INIT 0x0001 /* Init the card */ | |
148 | ||
149 | #define LE_C3_BSWP 0x4 /* SWAP */ | |
150 | #define LE_C3_ACON 0x2 /* ALE Control */ | |
151 | #define LE_C3_BCON 0x1 /* Byte control */ | |
152 | ||
153 | /* Receive message descriptor 1 */ | |
154 | #define LE_R1_OWN 0x80 /* Who owns the entry */ | |
155 | #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */ | |
156 | #define LE_R1_FRA 0x20 /* FRA: Frame error */ | |
157 | #define LE_R1_OFL 0x10 /* OFL: Frame overflow */ | |
158 | #define LE_R1_CRC 0x08 /* CRC error */ | |
159 | #define LE_R1_BUF 0x04 /* BUF: Buffer error */ | |
160 | #define LE_R1_SOP 0x02 /* Start of packet */ | |
161 | #define LE_R1_EOP 0x01 /* End of packet */ | |
162 | #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */ | |
163 | ||
164 | #define LE_T1_OWN 0x80 /* Lance owns the packet */ | |
165 | #define LE_T1_ERR 0x40 /* Error summary */ | |
166 | #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */ | |
167 | #define LE_T1_EONE 0x08 /* Error: one retry needed */ | |
168 | #define LE_T1_EDEF 0x04 /* Error: deferred */ | |
169 | #define LE_T1_SOP 0x02 /* Start of packet */ | |
170 | #define LE_T1_EOP 0x01 /* End of packet */ | |
171 | #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */ | |
172 | ||
173 | #define LE_T3_BUF 0x8000 /* Buffer error */ | |
174 | #define LE_T3_UFL 0x4000 /* Error underflow */ | |
175 | #define LE_T3_LCOL 0x1000 /* Error late collision */ | |
176 | #define LE_T3_CLOS 0x0800 /* Error carrier loss */ | |
177 | #define LE_T3_RTY 0x0400 /* Error retry */ | |
178 | #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */ | |
179 | ||
180 | #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS)) | |
181 | #define TX_RING_MOD_MASK (TX_RING_SIZE - 1) | |
182 | #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29) | |
183 | #define TX_NEXT(__x) (((__x)+1) & TX_RING_MOD_MASK) | |
184 | ||
185 | #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS)) | |
186 | #define RX_RING_MOD_MASK (RX_RING_SIZE - 1) | |
187 | #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29) | |
188 | #define RX_NEXT(__x) (((__x)+1) & RX_RING_MOD_MASK) | |
189 | ||
190 | #define PKT_BUF_SZ 1544 | |
191 | #define RX_BUFF_SIZE PKT_BUF_SZ | |
192 | #define TX_BUFF_SIZE PKT_BUF_SZ | |
193 | ||
194 | struct lance_rx_desc { | |
195 | u16 rmd0; /* low address of packet */ | |
196 | u8 rmd1_bits; /* descriptor bits */ | |
197 | u8 rmd1_hadr; /* high address of packet */ | |
198 | s16 length; /* This length is 2s complement (negative)! | |
199 | * Buffer length | |
200 | */ | |
201 | u16 mblength; /* This is the actual number of bytes received */ | |
202 | }; | |
203 | ||
204 | struct lance_tx_desc { | |
205 | u16 tmd0; /* low address of packet */ | |
206 | u8 tmd1_bits; /* descriptor bits */ | |
207 | u8 tmd1_hadr; /* high address of packet */ | |
208 | s16 length; /* Length is 2s complement (negative)! */ | |
209 | u16 misc; | |
210 | }; | |
6aa20a22 | 211 | |
1da177e4 LT |
212 | /* The LANCE initialization block, described in databook. */ |
213 | /* On the Sparc, this block should be on a DMA region */ | |
214 | struct lance_init_block { | |
215 | u16 mode; /* Pre-set mode (reg. 15) */ | |
216 | u8 phys_addr[6]; /* Physical ethernet address */ | |
217 | u32 filter[2]; /* Multicast filter. */ | |
218 | ||
219 | /* Receive and transmit ring base, along with extra bits. */ | |
220 | u16 rx_ptr; /* receive descriptor addr */ | |
221 | u16 rx_len; /* receive len and high addr */ | |
222 | u16 tx_ptr; /* transmit descriptor addr */ | |
223 | u16 tx_len; /* transmit len and high addr */ | |
6aa20a22 | 224 | |
1da177e4 LT |
225 | /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */ |
226 | struct lance_rx_desc brx_ring[RX_RING_SIZE]; | |
227 | struct lance_tx_desc btx_ring[TX_RING_SIZE]; | |
6aa20a22 | 228 | |
1da177e4 LT |
229 | u8 tx_buf [TX_RING_SIZE][TX_BUFF_SIZE]; |
230 | u8 pad[2]; /* align rx_buf for copy_and_sum(). */ | |
231 | u8 rx_buf [RX_RING_SIZE][RX_BUFF_SIZE]; | |
232 | }; | |
233 | ||
234 | #define libdesc_offset(rt, elem) \ | |
235 | ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem]))))) | |
236 | ||
237 | #define libbuff_offset(rt, elem) \ | |
238 | ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0]))))) | |
239 | ||
240 | struct lance_private { | |
241 | void __iomem *lregs; /* Lance RAP/RDP regs. */ | |
242 | void __iomem *dregs; /* DMA controller regs. */ | |
243 | struct lance_init_block __iomem *init_block_iomem; | |
244 | struct lance_init_block *init_block_mem; | |
6aa20a22 | 245 | |
1da177e4 LT |
246 | spinlock_t lock; |
247 | ||
248 | int rx_new, tx_new; | |
249 | int rx_old, tx_old; | |
6aa20a22 | 250 | |
1da177e4 LT |
251 | struct sbus_dma *ledma; /* If set this points to ledma */ |
252 | char tpe; /* cable-selection is TPE */ | |
253 | char auto_select; /* cable-selection by carrier */ | |
254 | char burst_sizes; /* ledma SBus burst sizes */ | |
255 | char pio_buffer; /* init block in PIO space? */ | |
256 | ||
257 | unsigned short busmaster_regval; | |
258 | ||
259 | void (*init_ring)(struct net_device *); | |
260 | void (*rx)(struct net_device *); | |
261 | void (*tx)(struct net_device *); | |
262 | ||
263 | char *name; | |
264 | dma_addr_t init_block_dvma; | |
265 | struct net_device *dev; /* Backpointer */ | |
1da177e4 LT |
266 | struct sbus_dev *sdev; |
267 | struct timer_list multicast_timer; | |
268 | }; | |
269 | ||
270 | #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\ | |
271 | lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\ | |
272 | lp->tx_old - lp->tx_new-1) | |
273 | ||
274 | /* Lance registers. */ | |
275 | #define RDP 0x00UL /* register data port */ | |
276 | #define RAP 0x02UL /* register address port */ | |
277 | #define LANCE_REG_SIZE 0x04UL | |
278 | ||
279 | #define STOP_LANCE(__lp) \ | |
280 | do { void __iomem *__base = (__lp)->lregs; \ | |
281 | sbus_writew(LE_CSR0, __base + RAP); \ | |
282 | sbus_writew(LE_C0_STOP, __base + RDP); \ | |
283 | } while (0) | |
284 | ||
285 | int sparc_lance_debug = 2; | |
286 | ||
287 | /* The Lance uses 24 bit addresses */ | |
288 | /* On the Sun4c the DVMA will provide the remaining bytes for us */ | |
289 | /* On the Sun4m we have to instruct the ledma to provide them */ | |
290 | /* Even worse, on scsi/ether SBUS cards, the init block and the | |
291 | * transmit/receive buffers are addresses as offsets from absolute | |
292 | * zero on the lebuffer PIO area. -DaveM | |
293 | */ | |
294 | ||
295 | #define LANCE_ADDR(x) ((long)(x) & ~0xff000000) | |
296 | ||
1da177e4 LT |
297 | /* Load the CSR registers */ |
298 | static void load_csrs(struct lance_private *lp) | |
299 | { | |
300 | u32 leptr; | |
301 | ||
302 | if (lp->pio_buffer) | |
303 | leptr = 0; | |
304 | else | |
305 | leptr = LANCE_ADDR(lp->init_block_dvma); | |
306 | ||
307 | sbus_writew(LE_CSR1, lp->lregs + RAP); | |
308 | sbus_writew(leptr & 0xffff, lp->lregs + RDP); | |
309 | sbus_writew(LE_CSR2, lp->lregs + RAP); | |
310 | sbus_writew(leptr >> 16, lp->lregs + RDP); | |
311 | sbus_writew(LE_CSR3, lp->lregs + RAP); | |
312 | sbus_writew(lp->busmaster_regval, lp->lregs + RDP); | |
313 | ||
314 | /* Point back to csr0 */ | |
315 | sbus_writew(LE_CSR0, lp->lregs + RAP); | |
316 | } | |
317 | ||
318 | /* Setup the Lance Rx and Tx rings */ | |
319 | static void lance_init_ring_dvma(struct net_device *dev) | |
320 | { | |
321 | struct lance_private *lp = netdev_priv(dev); | |
322 | struct lance_init_block *ib = lp->init_block_mem; | |
323 | dma_addr_t aib = lp->init_block_dvma; | |
324 | __u32 leptr; | |
325 | int i; | |
6aa20a22 | 326 | |
1da177e4 LT |
327 | /* Lock out other processes while setting up hardware */ |
328 | netif_stop_queue(dev); | |
329 | lp->rx_new = lp->tx_new = 0; | |
330 | lp->rx_old = lp->tx_old = 0; | |
331 | ||
332 | /* Copy the ethernet address to the lance init block | |
333 | * Note that on the sparc you need to swap the ethernet address. | |
334 | */ | |
335 | ib->phys_addr [0] = dev->dev_addr [1]; | |
336 | ib->phys_addr [1] = dev->dev_addr [0]; | |
337 | ib->phys_addr [2] = dev->dev_addr [3]; | |
338 | ib->phys_addr [3] = dev->dev_addr [2]; | |
339 | ib->phys_addr [4] = dev->dev_addr [5]; | |
340 | ib->phys_addr [5] = dev->dev_addr [4]; | |
341 | ||
342 | /* Setup the Tx ring entries */ | |
343 | for (i = 0; i <= TX_RING_SIZE; i++) { | |
344 | leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i)); | |
345 | ib->btx_ring [i].tmd0 = leptr; | |
346 | ib->btx_ring [i].tmd1_hadr = leptr >> 16; | |
347 | ib->btx_ring [i].tmd1_bits = 0; | |
348 | ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */ | |
349 | ib->btx_ring [i].misc = 0; | |
350 | } | |
351 | ||
352 | /* Setup the Rx ring entries */ | |
353 | for (i = 0; i < RX_RING_SIZE; i++) { | |
354 | leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i)); | |
355 | ||
356 | ib->brx_ring [i].rmd0 = leptr; | |
357 | ib->brx_ring [i].rmd1_hadr = leptr >> 16; | |
358 | ib->brx_ring [i].rmd1_bits = LE_R1_OWN; | |
359 | ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000; | |
360 | ib->brx_ring [i].mblength = 0; | |
361 | } | |
362 | ||
363 | /* Setup the initialization block */ | |
6aa20a22 | 364 | |
1da177e4 LT |
365 | /* Setup rx descriptor pointer */ |
366 | leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0)); | |
367 | ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16); | |
368 | ib->rx_ptr = leptr; | |
6aa20a22 | 369 | |
1da177e4 LT |
370 | /* Setup tx descriptor pointer */ |
371 | leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0)); | |
372 | ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16); | |
373 | ib->tx_ptr = leptr; | |
374 | } | |
375 | ||
376 | static void lance_init_ring_pio(struct net_device *dev) | |
377 | { | |
378 | struct lance_private *lp = netdev_priv(dev); | |
379 | struct lance_init_block __iomem *ib = lp->init_block_iomem; | |
380 | u32 leptr; | |
381 | int i; | |
6aa20a22 | 382 | |
1da177e4 LT |
383 | /* Lock out other processes while setting up hardware */ |
384 | netif_stop_queue(dev); | |
385 | lp->rx_new = lp->tx_new = 0; | |
386 | lp->rx_old = lp->tx_old = 0; | |
387 | ||
388 | /* Copy the ethernet address to the lance init block | |
389 | * Note that on the sparc you need to swap the ethernet address. | |
390 | */ | |
391 | sbus_writeb(dev->dev_addr[1], &ib->phys_addr[0]); | |
392 | sbus_writeb(dev->dev_addr[0], &ib->phys_addr[1]); | |
393 | sbus_writeb(dev->dev_addr[3], &ib->phys_addr[2]); | |
394 | sbus_writeb(dev->dev_addr[2], &ib->phys_addr[3]); | |
395 | sbus_writeb(dev->dev_addr[5], &ib->phys_addr[4]); | |
396 | sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]); | |
397 | ||
398 | /* Setup the Tx ring entries */ | |
399 | for (i = 0; i <= TX_RING_SIZE; i++) { | |
400 | leptr = libbuff_offset(tx_buf, i); | |
401 | sbus_writew(leptr, &ib->btx_ring [i].tmd0); | |
402 | sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr); | |
403 | sbus_writeb(0, &ib->btx_ring [i].tmd1_bits); | |
404 | ||
405 | /* The ones required by tmd2 */ | |
406 | sbus_writew(0xf000, &ib->btx_ring [i].length); | |
407 | sbus_writew(0, &ib->btx_ring [i].misc); | |
408 | } | |
409 | ||
410 | /* Setup the Rx ring entries */ | |
411 | for (i = 0; i < RX_RING_SIZE; i++) { | |
412 | leptr = libbuff_offset(rx_buf, i); | |
413 | ||
414 | sbus_writew(leptr, &ib->brx_ring [i].rmd0); | |
415 | sbus_writeb(leptr >> 16,&ib->brx_ring [i].rmd1_hadr); | |
416 | sbus_writeb(LE_R1_OWN, &ib->brx_ring [i].rmd1_bits); | |
417 | sbus_writew(-RX_BUFF_SIZE|0xf000, | |
418 | &ib->brx_ring [i].length); | |
419 | sbus_writew(0, &ib->brx_ring [i].mblength); | |
420 | } | |
421 | ||
422 | /* Setup the initialization block */ | |
6aa20a22 | 423 | |
1da177e4 LT |
424 | /* Setup rx descriptor pointer */ |
425 | leptr = libdesc_offset(brx_ring, 0); | |
426 | sbus_writew((LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16), | |
427 | &ib->rx_len); | |
428 | sbus_writew(leptr, &ib->rx_ptr); | |
6aa20a22 | 429 | |
1da177e4 LT |
430 | /* Setup tx descriptor pointer */ |
431 | leptr = libdesc_offset(btx_ring, 0); | |
432 | sbus_writew((LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16), | |
433 | &ib->tx_len); | |
434 | sbus_writew(leptr, &ib->tx_ptr); | |
435 | } | |
436 | ||
437 | static void init_restart_ledma(struct lance_private *lp) | |
438 | { | |
439 | u32 csr = sbus_readl(lp->dregs + DMA_CSR); | |
440 | ||
441 | if (!(csr & DMA_HNDL_ERROR)) { | |
442 | /* E-Cache draining */ | |
443 | while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN) | |
444 | barrier(); | |
445 | } | |
446 | ||
447 | csr = sbus_readl(lp->dregs + DMA_CSR); | |
448 | csr &= ~DMA_E_BURSTS; | |
449 | if (lp->burst_sizes & DMA_BURST32) | |
450 | csr |= DMA_E_BURST32; | |
451 | else | |
452 | csr |= DMA_E_BURST16; | |
453 | ||
454 | csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV); | |
455 | ||
456 | if (lp->tpe) | |
457 | csr |= DMA_EN_ENETAUI; | |
458 | else | |
459 | csr &= ~DMA_EN_ENETAUI; | |
460 | udelay(20); | |
461 | sbus_writel(csr, lp->dregs + DMA_CSR); | |
462 | udelay(200); | |
463 | } | |
464 | ||
465 | static int init_restart_lance(struct lance_private *lp) | |
466 | { | |
467 | u16 regval = 0; | |
468 | int i; | |
469 | ||
470 | if (lp->dregs) | |
471 | init_restart_ledma(lp); | |
472 | ||
473 | sbus_writew(LE_CSR0, lp->lregs + RAP); | |
474 | sbus_writew(LE_C0_INIT, lp->lregs + RDP); | |
475 | ||
476 | /* Wait for the lance to complete initialization */ | |
477 | for (i = 0; i < 100; i++) { | |
478 | regval = sbus_readw(lp->lregs + RDP); | |
479 | ||
480 | if (regval & (LE_C0_ERR | LE_C0_IDON)) | |
481 | break; | |
482 | barrier(); | |
483 | } | |
484 | if (i == 100 || (regval & LE_C0_ERR)) { | |
485 | printk(KERN_ERR "LANCE unopened after %d ticks, csr0=%4.4x.\n", | |
486 | i, regval); | |
487 | if (lp->dregs) | |
488 | printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR)); | |
489 | return -1; | |
490 | } | |
491 | ||
492 | /* Clear IDON by writing a "1", enable interrupts and start lance */ | |
493 | sbus_writew(LE_C0_IDON, lp->lregs + RDP); | |
494 | sbus_writew(LE_C0_INEA | LE_C0_STRT, lp->lregs + RDP); | |
495 | ||
496 | if (lp->dregs) { | |
497 | u32 csr = sbus_readl(lp->dregs + DMA_CSR); | |
498 | ||
499 | csr |= DMA_INT_ENAB; | |
500 | sbus_writel(csr, lp->dregs + DMA_CSR); | |
501 | } | |
502 | ||
503 | return 0; | |
504 | } | |
505 | ||
506 | static void lance_rx_dvma(struct net_device *dev) | |
507 | { | |
508 | struct lance_private *lp = netdev_priv(dev); | |
509 | struct lance_init_block *ib = lp->init_block_mem; | |
510 | struct lance_rx_desc *rd; | |
511 | u8 bits; | |
512 | int len, entry = lp->rx_new; | |
513 | struct sk_buff *skb; | |
514 | ||
515 | for (rd = &ib->brx_ring [entry]; | |
516 | !((bits = rd->rmd1_bits) & LE_R1_OWN); | |
517 | rd = &ib->brx_ring [entry]) { | |
518 | ||
519 | /* We got an incomplete frame? */ | |
520 | if ((bits & LE_R1_POK) != LE_R1_POK) { | |
09f75cd7 JG |
521 | dev->stats.rx_over_errors++; |
522 | dev->stats.rx_errors++; | |
1da177e4 LT |
523 | } else if (bits & LE_R1_ERR) { |
524 | /* Count only the end frame as a rx error, | |
525 | * not the beginning | |
526 | */ | |
09f75cd7 JG |
527 | if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++; |
528 | if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++; | |
529 | if (bits & LE_R1_OFL) dev->stats.rx_over_errors++; | |
530 | if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++; | |
531 | if (bits & LE_R1_EOP) dev->stats.rx_errors++; | |
1da177e4 LT |
532 | } else { |
533 | len = (rd->mblength & 0xfff) - 4; | |
534 | skb = dev_alloc_skb(len + 2); | |
535 | ||
536 | if (skb == NULL) { | |
537 | printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n", | |
538 | dev->name); | |
09f75cd7 | 539 | dev->stats.rx_dropped++; |
1da177e4 LT |
540 | rd->mblength = 0; |
541 | rd->rmd1_bits = LE_R1_OWN; | |
542 | lp->rx_new = RX_NEXT(entry); | |
543 | return; | |
544 | } | |
6aa20a22 | 545 | |
09f75cd7 | 546 | dev->stats.rx_bytes += len; |
1da177e4 | 547 | |
1da177e4 LT |
548 | skb_reserve(skb, 2); /* 16 byte align */ |
549 | skb_put(skb, len); /* make room */ | |
8c7b7faa | 550 | skb_copy_to_linear_data(skb, |
1da177e4 | 551 | (unsigned char *)&(ib->rx_buf [entry][0]), |
8c7b7faa | 552 | len); |
1da177e4 LT |
553 | skb->protocol = eth_type_trans(skb, dev); |
554 | netif_rx(skb); | |
555 | dev->last_rx = jiffies; | |
09f75cd7 | 556 | dev->stats.rx_packets++; |
1da177e4 LT |
557 | } |
558 | ||
559 | /* Return the packet to the pool */ | |
560 | rd->mblength = 0; | |
561 | rd->rmd1_bits = LE_R1_OWN; | |
562 | entry = RX_NEXT(entry); | |
563 | } | |
564 | ||
565 | lp->rx_new = entry; | |
566 | } | |
567 | ||
568 | static void lance_tx_dvma(struct net_device *dev) | |
569 | { | |
570 | struct lance_private *lp = netdev_priv(dev); | |
571 | struct lance_init_block *ib = lp->init_block_mem; | |
572 | int i, j; | |
573 | ||
574 | spin_lock(&lp->lock); | |
575 | ||
576 | j = lp->tx_old; | |
577 | for (i = j; i != lp->tx_new; i = j) { | |
578 | struct lance_tx_desc *td = &ib->btx_ring [i]; | |
579 | u8 bits = td->tmd1_bits; | |
580 | ||
581 | /* If we hit a packet not owned by us, stop */ | |
582 | if (bits & LE_T1_OWN) | |
583 | break; | |
6aa20a22 | 584 | |
1da177e4 LT |
585 | if (bits & LE_T1_ERR) { |
586 | u16 status = td->misc; | |
6aa20a22 | 587 | |
09f75cd7 JG |
588 | dev->stats.tx_errors++; |
589 | if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++; | |
590 | if (status & LE_T3_LCOL) dev->stats.tx_window_errors++; | |
1da177e4 LT |
591 | |
592 | if (status & LE_T3_CLOS) { | |
09f75cd7 | 593 | dev->stats.tx_carrier_errors++; |
1da177e4 LT |
594 | if (lp->auto_select) { |
595 | lp->tpe = 1 - lp->tpe; | |
596 | printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n", | |
597 | dev->name, lp->tpe?"TPE":"AUI"); | |
598 | STOP_LANCE(lp); | |
599 | lp->init_ring(dev); | |
600 | load_csrs(lp); | |
601 | init_restart_lance(lp); | |
602 | goto out; | |
603 | } | |
604 | } | |
605 | ||
606 | /* Buffer errors and underflows turn off the | |
607 | * transmitter, restart the adapter. | |
608 | */ | |
609 | if (status & (LE_T3_BUF|LE_T3_UFL)) { | |
09f75cd7 | 610 | dev->stats.tx_fifo_errors++; |
1da177e4 LT |
611 | |
612 | printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n", | |
613 | dev->name); | |
614 | STOP_LANCE(lp); | |
615 | lp->init_ring(dev); | |
616 | load_csrs(lp); | |
617 | init_restart_lance(lp); | |
618 | goto out; | |
619 | } | |
620 | } else if ((bits & LE_T1_POK) == LE_T1_POK) { | |
621 | /* | |
622 | * So we don't count the packet more than once. | |
623 | */ | |
624 | td->tmd1_bits = bits & ~(LE_T1_POK); | |
625 | ||
626 | /* One collision before packet was sent. */ | |
627 | if (bits & LE_T1_EONE) | |
09f75cd7 | 628 | dev->stats.collisions++; |
1da177e4 LT |
629 | |
630 | /* More than one collision, be optimistic. */ | |
631 | if (bits & LE_T1_EMORE) | |
09f75cd7 | 632 | dev->stats.collisions += 2; |
1da177e4 | 633 | |
09f75cd7 | 634 | dev->stats.tx_packets++; |
1da177e4 | 635 | } |
6aa20a22 | 636 | |
1da177e4 LT |
637 | j = TX_NEXT(j); |
638 | } | |
639 | lp->tx_old = j; | |
640 | out: | |
641 | if (netif_queue_stopped(dev) && | |
642 | TX_BUFFS_AVAIL > 0) | |
643 | netif_wake_queue(dev); | |
644 | ||
645 | spin_unlock(&lp->lock); | |
646 | } | |
647 | ||
648 | static void lance_piocopy_to_skb(struct sk_buff *skb, void __iomem *piobuf, int len) | |
649 | { | |
650 | u16 *p16 = (u16 *) skb->data; | |
651 | u32 *p32; | |
652 | u8 *p8; | |
653 | void __iomem *pbuf = piobuf; | |
654 | ||
655 | /* We know here that both src and dest are on a 16bit boundary. */ | |
656 | *p16++ = sbus_readw(pbuf); | |
657 | p32 = (u32 *) p16; | |
658 | pbuf += 2; | |
659 | len -= 2; | |
660 | ||
661 | while (len >= 4) { | |
662 | *p32++ = sbus_readl(pbuf); | |
663 | pbuf += 4; | |
664 | len -= 4; | |
665 | } | |
666 | p8 = (u8 *) p32; | |
667 | if (len >= 2) { | |
668 | p16 = (u16 *) p32; | |
669 | *p16++ = sbus_readw(pbuf); | |
670 | pbuf += 2; | |
671 | len -= 2; | |
672 | p8 = (u8 *) p16; | |
673 | } | |
674 | if (len >= 1) | |
675 | *p8 = sbus_readb(pbuf); | |
676 | } | |
677 | ||
678 | static void lance_rx_pio(struct net_device *dev) | |
679 | { | |
680 | struct lance_private *lp = netdev_priv(dev); | |
681 | struct lance_init_block __iomem *ib = lp->init_block_iomem; | |
682 | struct lance_rx_desc __iomem *rd; | |
683 | unsigned char bits; | |
684 | int len, entry; | |
685 | struct sk_buff *skb; | |
686 | ||
687 | entry = lp->rx_new; | |
688 | for (rd = &ib->brx_ring [entry]; | |
689 | !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN); | |
690 | rd = &ib->brx_ring [entry]) { | |
691 | ||
692 | /* We got an incomplete frame? */ | |
693 | if ((bits & LE_R1_POK) != LE_R1_POK) { | |
09f75cd7 JG |
694 | dev->stats.rx_over_errors++; |
695 | dev->stats.rx_errors++; | |
1da177e4 LT |
696 | } else if (bits & LE_R1_ERR) { |
697 | /* Count only the end frame as a rx error, | |
698 | * not the beginning | |
699 | */ | |
09f75cd7 JG |
700 | if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++; |
701 | if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++; | |
702 | if (bits & LE_R1_OFL) dev->stats.rx_over_errors++; | |
703 | if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++; | |
704 | if (bits & LE_R1_EOP) dev->stats.rx_errors++; | |
1da177e4 LT |
705 | } else { |
706 | len = (sbus_readw(&rd->mblength) & 0xfff) - 4; | |
707 | skb = dev_alloc_skb(len + 2); | |
708 | ||
709 | if (skb == NULL) { | |
710 | printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n", | |
711 | dev->name); | |
09f75cd7 | 712 | dev->stats.rx_dropped++; |
1da177e4 LT |
713 | sbus_writew(0, &rd->mblength); |
714 | sbus_writeb(LE_R1_OWN, &rd->rmd1_bits); | |
715 | lp->rx_new = RX_NEXT(entry); | |
716 | return; | |
717 | } | |
6aa20a22 | 718 | |
09f75cd7 | 719 | dev->stats.rx_bytes += len; |
1da177e4 | 720 | |
1da177e4 LT |
721 | skb_reserve (skb, 2); /* 16 byte align */ |
722 | skb_put(skb, len); /* make room */ | |
723 | lance_piocopy_to_skb(skb, &(ib->rx_buf[entry][0]), len); | |
724 | skb->protocol = eth_type_trans(skb, dev); | |
725 | netif_rx(skb); | |
726 | dev->last_rx = jiffies; | |
09f75cd7 | 727 | dev->stats.rx_packets++; |
1da177e4 LT |
728 | } |
729 | ||
730 | /* Return the packet to the pool */ | |
731 | sbus_writew(0, &rd->mblength); | |
732 | sbus_writeb(LE_R1_OWN, &rd->rmd1_bits); | |
733 | entry = RX_NEXT(entry); | |
734 | } | |
735 | ||
736 | lp->rx_new = entry; | |
737 | } | |
738 | ||
739 | static void lance_tx_pio(struct net_device *dev) | |
740 | { | |
741 | struct lance_private *lp = netdev_priv(dev); | |
742 | struct lance_init_block __iomem *ib = lp->init_block_iomem; | |
743 | int i, j; | |
744 | ||
745 | spin_lock(&lp->lock); | |
746 | ||
747 | j = lp->tx_old; | |
748 | for (i = j; i != lp->tx_new; i = j) { | |
749 | struct lance_tx_desc __iomem *td = &ib->btx_ring [i]; | |
750 | u8 bits = sbus_readb(&td->tmd1_bits); | |
751 | ||
752 | /* If we hit a packet not owned by us, stop */ | |
753 | if (bits & LE_T1_OWN) | |
754 | break; | |
6aa20a22 | 755 | |
1da177e4 LT |
756 | if (bits & LE_T1_ERR) { |
757 | u16 status = sbus_readw(&td->misc); | |
6aa20a22 | 758 | |
09f75cd7 JG |
759 | dev->stats.tx_errors++; |
760 | if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++; | |
761 | if (status & LE_T3_LCOL) dev->stats.tx_window_errors++; | |
1da177e4 LT |
762 | |
763 | if (status & LE_T3_CLOS) { | |
09f75cd7 | 764 | dev->stats.tx_carrier_errors++; |
1da177e4 LT |
765 | if (lp->auto_select) { |
766 | lp->tpe = 1 - lp->tpe; | |
767 | printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n", | |
768 | dev->name, lp->tpe?"TPE":"AUI"); | |
769 | STOP_LANCE(lp); | |
770 | lp->init_ring(dev); | |
771 | load_csrs(lp); | |
772 | init_restart_lance(lp); | |
773 | goto out; | |
774 | } | |
775 | } | |
776 | ||
777 | /* Buffer errors and underflows turn off the | |
778 | * transmitter, restart the adapter. | |
779 | */ | |
780 | if (status & (LE_T3_BUF|LE_T3_UFL)) { | |
09f75cd7 | 781 | dev->stats.tx_fifo_errors++; |
1da177e4 LT |
782 | |
783 | printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n", | |
784 | dev->name); | |
785 | STOP_LANCE(lp); | |
786 | lp->init_ring(dev); | |
787 | load_csrs(lp); | |
788 | init_restart_lance(lp); | |
789 | goto out; | |
790 | } | |
791 | } else if ((bits & LE_T1_POK) == LE_T1_POK) { | |
792 | /* | |
793 | * So we don't count the packet more than once. | |
794 | */ | |
795 | sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits); | |
796 | ||
797 | /* One collision before packet was sent. */ | |
798 | if (bits & LE_T1_EONE) | |
09f75cd7 | 799 | dev->stats.collisions++; |
1da177e4 LT |
800 | |
801 | /* More than one collision, be optimistic. */ | |
802 | if (bits & LE_T1_EMORE) | |
09f75cd7 | 803 | dev->stats.collisions += 2; |
1da177e4 | 804 | |
09f75cd7 | 805 | dev->stats.tx_packets++; |
1da177e4 | 806 | } |
6aa20a22 | 807 | |
1da177e4 LT |
808 | j = TX_NEXT(j); |
809 | } | |
810 | lp->tx_old = j; | |
811 | ||
812 | if (netif_queue_stopped(dev) && | |
813 | TX_BUFFS_AVAIL > 0) | |
814 | netif_wake_queue(dev); | |
815 | out: | |
816 | spin_unlock(&lp->lock); | |
817 | } | |
818 | ||
7d12e780 | 819 | static irqreturn_t lance_interrupt(int irq, void *dev_id) |
1da177e4 | 820 | { |
c31f28e7 | 821 | struct net_device *dev = dev_id; |
1da177e4 LT |
822 | struct lance_private *lp = netdev_priv(dev); |
823 | int csr0; | |
6aa20a22 | 824 | |
1da177e4 LT |
825 | sbus_writew(LE_CSR0, lp->lregs + RAP); |
826 | csr0 = sbus_readw(lp->lregs + RDP); | |
827 | ||
828 | /* Acknowledge all the interrupt sources ASAP */ | |
829 | sbus_writew(csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT), | |
830 | lp->lregs + RDP); | |
6aa20a22 | 831 | |
1da177e4 LT |
832 | if ((csr0 & LE_C0_ERR) != 0) { |
833 | /* Clear the error condition */ | |
834 | sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS | | |
835 | LE_C0_CERR | LE_C0_MERR), | |
836 | lp->lregs + RDP); | |
837 | } | |
6aa20a22 | 838 | |
1da177e4 LT |
839 | if (csr0 & LE_C0_RINT) |
840 | lp->rx(dev); | |
6aa20a22 | 841 | |
1da177e4 LT |
842 | if (csr0 & LE_C0_TINT) |
843 | lp->tx(dev); | |
6aa20a22 | 844 | |
1da177e4 | 845 | if (csr0 & LE_C0_BABL) |
09f75cd7 | 846 | dev->stats.tx_errors++; |
1da177e4 LT |
847 | |
848 | if (csr0 & LE_C0_MISS) | |
09f75cd7 | 849 | dev->stats.rx_errors++; |
1da177e4 LT |
850 | |
851 | if (csr0 & LE_C0_MERR) { | |
852 | if (lp->dregs) { | |
853 | u32 addr = sbus_readl(lp->dregs + DMA_ADDR); | |
854 | ||
855 | printk(KERN_ERR "%s: Memory error, status %04x, addr %06x\n", | |
856 | dev->name, csr0, addr & 0xffffff); | |
857 | } else { | |
858 | printk(KERN_ERR "%s: Memory error, status %04x\n", | |
859 | dev->name, csr0); | |
860 | } | |
861 | ||
862 | sbus_writew(LE_C0_STOP, lp->lregs + RDP); | |
863 | ||
864 | if (lp->dregs) { | |
865 | u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR); | |
866 | ||
867 | dma_csr |= DMA_FIFO_INV; | |
868 | sbus_writel(dma_csr, lp->dregs + DMA_CSR); | |
869 | } | |
870 | ||
871 | lp->init_ring(dev); | |
872 | load_csrs(lp); | |
873 | init_restart_lance(lp); | |
874 | netif_wake_queue(dev); | |
875 | } | |
876 | ||
877 | sbus_writew(LE_C0_INEA, lp->lregs + RDP); | |
878 | ||
879 | return IRQ_HANDLED; | |
880 | } | |
881 | ||
882 | /* Build a fake network packet and send it to ourselves. */ | |
883 | static void build_fake_packet(struct lance_private *lp) | |
884 | { | |
885 | struct net_device *dev = lp->dev; | |
886 | int i, entry; | |
887 | ||
888 | entry = lp->tx_new & TX_RING_MOD_MASK; | |
889 | if (lp->pio_buffer) { | |
890 | struct lance_init_block __iomem *ib = lp->init_block_iomem; | |
891 | u16 __iomem *packet = (u16 __iomem *) &(ib->tx_buf[entry][0]); | |
892 | struct ethhdr __iomem *eth = (struct ethhdr __iomem *) packet; | |
893 | for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++) | |
894 | sbus_writew(0, &packet[i]); | |
895 | for (i = 0; i < 6; i++) { | |
896 | sbus_writeb(dev->dev_addr[i], ð->h_dest[i]); | |
897 | sbus_writeb(dev->dev_addr[i], ð->h_source[i]); | |
898 | } | |
899 | sbus_writew((-ETH_ZLEN) | 0xf000, &ib->btx_ring[entry].length); | |
900 | sbus_writew(0, &ib->btx_ring[entry].misc); | |
901 | sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits); | |
902 | } else { | |
903 | struct lance_init_block *ib = lp->init_block_mem; | |
904 | u16 *packet = (u16 *) &(ib->tx_buf[entry][0]); | |
905 | struct ethhdr *eth = (struct ethhdr *) packet; | |
906 | memset(packet, 0, ETH_ZLEN); | |
907 | for (i = 0; i < 6; i++) { | |
908 | eth->h_dest[i] = dev->dev_addr[i]; | |
909 | eth->h_source[i] = dev->dev_addr[i]; | |
910 | } | |
911 | ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000; | |
912 | ib->btx_ring[entry].misc = 0; | |
913 | ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN); | |
914 | } | |
915 | lp->tx_new = TX_NEXT(entry); | |
916 | } | |
917 | ||
918 | struct net_device *last_dev; | |
919 | ||
920 | static int lance_open(struct net_device *dev) | |
921 | { | |
922 | struct lance_private *lp = netdev_priv(dev); | |
923 | int status = 0; | |
924 | ||
925 | last_dev = dev; | |
926 | ||
927 | STOP_LANCE(lp); | |
928 | ||
1fb9df5d | 929 | if (request_irq(dev->irq, &lance_interrupt, IRQF_SHARED, |
1da177e4 | 930 | lancestr, (void *) dev)) { |
c6387a48 | 931 | printk(KERN_ERR "Lance: Can't get irq %d\n", dev->irq); |
1da177e4 LT |
932 | return -EAGAIN; |
933 | } | |
934 | ||
935 | /* On the 4m, setup the ledma to provide the upper bits for buffers */ | |
936 | if (lp->dregs) { | |
937 | u32 regval = lp->init_block_dvma & 0xff000000; | |
938 | ||
939 | sbus_writel(regval, lp->dregs + DMA_TEST); | |
940 | } | |
941 | ||
942 | /* Set mode and clear multicast filter only at device open, | |
943 | * so that lance_init_ring() called at any error will not | |
944 | * forget multicast filters. | |
945 | * | |
946 | * BTW it is common bug in all lance drivers! --ANK | |
947 | */ | |
948 | if (lp->pio_buffer) { | |
949 | struct lance_init_block __iomem *ib = lp->init_block_iomem; | |
950 | sbus_writew(0, &ib->mode); | |
951 | sbus_writel(0, &ib->filter[0]); | |
952 | sbus_writel(0, &ib->filter[1]); | |
953 | } else { | |
954 | struct lance_init_block *ib = lp->init_block_mem; | |
955 | ib->mode = 0; | |
956 | ib->filter [0] = 0; | |
957 | ib->filter [1] = 0; | |
958 | } | |
959 | ||
960 | lp->init_ring(dev); | |
961 | load_csrs(lp); | |
962 | ||
963 | netif_start_queue(dev); | |
964 | ||
965 | status = init_restart_lance(lp); | |
966 | if (!status && lp->auto_select) { | |
967 | build_fake_packet(lp); | |
968 | sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP); | |
969 | } | |
970 | ||
971 | return status; | |
972 | } | |
973 | ||
974 | static int lance_close(struct net_device *dev) | |
975 | { | |
976 | struct lance_private *lp = netdev_priv(dev); | |
977 | ||
978 | netif_stop_queue(dev); | |
979 | del_timer_sync(&lp->multicast_timer); | |
980 | ||
981 | STOP_LANCE(lp); | |
982 | ||
983 | free_irq(dev->irq, (void *) dev); | |
984 | return 0; | |
985 | } | |
986 | ||
987 | static int lance_reset(struct net_device *dev) | |
988 | { | |
989 | struct lance_private *lp = netdev_priv(dev); | |
990 | int status; | |
6aa20a22 | 991 | |
1da177e4 LT |
992 | STOP_LANCE(lp); |
993 | ||
994 | /* On the 4m, reset the dma too */ | |
995 | if (lp->dregs) { | |
996 | u32 csr, addr; | |
997 | ||
998 | printk(KERN_ERR "resetting ledma\n"); | |
999 | csr = sbus_readl(lp->dregs + DMA_CSR); | |
1000 | sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR); | |
1001 | udelay(200); | |
1002 | sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR); | |
1003 | ||
1004 | addr = lp->init_block_dvma & 0xff000000; | |
1005 | sbus_writel(addr, lp->dregs + DMA_TEST); | |
1006 | } | |
1007 | lp->init_ring(dev); | |
1008 | load_csrs(lp); | |
1009 | dev->trans_start = jiffies; | |
1010 | status = init_restart_lance(lp); | |
1011 | return status; | |
1012 | } | |
1013 | ||
1014 | static void lance_piocopy_from_skb(void __iomem *dest, unsigned char *src, int len) | |
1015 | { | |
1016 | void __iomem *piobuf = dest; | |
1017 | u32 *p32; | |
1018 | u16 *p16; | |
1019 | u8 *p8; | |
1020 | ||
1021 | switch ((unsigned long)src & 0x3) { | |
1022 | case 0: | |
1023 | p32 = (u32 *) src; | |
1024 | while (len >= 4) { | |
1025 | sbus_writel(*p32, piobuf); | |
1026 | p32++; | |
1027 | piobuf += 4; | |
1028 | len -= 4; | |
1029 | } | |
1030 | src = (char *) p32; | |
1031 | break; | |
1032 | case 1: | |
1033 | case 3: | |
1034 | p8 = (u8 *) src; | |
1035 | while (len >= 4) { | |
1036 | u32 val; | |
1037 | ||
1038 | val = p8[0] << 24; | |
1039 | val |= p8[1] << 16; | |
1040 | val |= p8[2] << 8; | |
1041 | val |= p8[3]; | |
1042 | sbus_writel(val, piobuf); | |
1043 | p8 += 4; | |
1044 | piobuf += 4; | |
1045 | len -= 4; | |
1046 | } | |
1047 | src = (char *) p8; | |
1048 | break; | |
1049 | case 2: | |
1050 | p16 = (u16 *) src; | |
1051 | while (len >= 4) { | |
1052 | u32 val = p16[0]<<16 | p16[1]; | |
1053 | sbus_writel(val, piobuf); | |
1054 | p16 += 2; | |
1055 | piobuf += 4; | |
1056 | len -= 4; | |
1057 | } | |
1058 | src = (char *) p16; | |
1059 | break; | |
1060 | }; | |
1061 | if (len >= 2) { | |
1062 | u16 val = src[0] << 8 | src[1]; | |
1063 | sbus_writew(val, piobuf); | |
1064 | src += 2; | |
1065 | piobuf += 2; | |
1066 | len -= 2; | |
1067 | } | |
1068 | if (len >= 1) | |
1069 | sbus_writeb(src[0], piobuf); | |
1070 | } | |
1071 | ||
1072 | static void lance_piozero(void __iomem *dest, int len) | |
1073 | { | |
1074 | void __iomem *piobuf = dest; | |
1075 | ||
1076 | if ((unsigned long)piobuf & 1) { | |
1077 | sbus_writeb(0, piobuf); | |
1078 | piobuf += 1; | |
1079 | len -= 1; | |
1080 | if (len == 0) | |
1081 | return; | |
1082 | } | |
1083 | if (len == 1) { | |
1084 | sbus_writeb(0, piobuf); | |
1085 | return; | |
1086 | } | |
1087 | if ((unsigned long)piobuf & 2) { | |
1088 | sbus_writew(0, piobuf); | |
1089 | piobuf += 2; | |
1090 | len -= 2; | |
1091 | if (len == 0) | |
1092 | return; | |
1093 | } | |
1094 | while (len >= 4) { | |
1095 | sbus_writel(0, piobuf); | |
1096 | piobuf += 4; | |
1097 | len -= 4; | |
1098 | } | |
1099 | if (len >= 2) { | |
1100 | sbus_writew(0, piobuf); | |
1101 | piobuf += 2; | |
1102 | len -= 2; | |
1103 | } | |
1104 | if (len >= 1) | |
1105 | sbus_writeb(0, piobuf); | |
1106 | } | |
1107 | ||
1108 | static void lance_tx_timeout(struct net_device *dev) | |
1109 | { | |
1110 | struct lance_private *lp = netdev_priv(dev); | |
1111 | ||
1112 | printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n", | |
1113 | dev->name, sbus_readw(lp->lregs + RDP)); | |
1114 | lance_reset(dev); | |
1115 | netif_wake_queue(dev); | |
1116 | } | |
1117 | ||
1118 | static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev) | |
1119 | { | |
1120 | struct lance_private *lp = netdev_priv(dev); | |
1121 | int entry, skblen, len; | |
1122 | ||
1123 | skblen = skb->len; | |
1124 | ||
1125 | len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen; | |
1126 | ||
1127 | spin_lock_irq(&lp->lock); | |
1128 | ||
09f75cd7 | 1129 | dev->stats.tx_bytes += len; |
1da177e4 LT |
1130 | |
1131 | entry = lp->tx_new & TX_RING_MOD_MASK; | |
1132 | if (lp->pio_buffer) { | |
1133 | struct lance_init_block __iomem *ib = lp->init_block_iomem; | |
1134 | sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length); | |
1135 | sbus_writew(0, &ib->btx_ring[entry].misc); | |
1136 | lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen); | |
1137 | if (len != skblen) | |
1138 | lance_piozero(&ib->tx_buf[entry][skblen], len - skblen); | |
1139 | sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits); | |
1140 | } else { | |
1141 | struct lance_init_block *ib = lp->init_block_mem; | |
1142 | ib->btx_ring [entry].length = (-len) | 0xf000; | |
1143 | ib->btx_ring [entry].misc = 0; | |
d626f62b | 1144 | skb_copy_from_linear_data(skb, &ib->tx_buf [entry][0], skblen); |
1da177e4 LT |
1145 | if (len != skblen) |
1146 | memset((char *) &ib->tx_buf [entry][skblen], 0, len - skblen); | |
1147 | ib->btx_ring [entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN); | |
1148 | } | |
1149 | ||
1150 | lp->tx_new = TX_NEXT(entry); | |
1151 | ||
1152 | if (TX_BUFFS_AVAIL <= 0) | |
1153 | netif_stop_queue(dev); | |
1154 | ||
1155 | /* Kick the lance: transmit now */ | |
1156 | sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP); | |
1157 | ||
1158 | /* Read back CSR to invalidate the E-Cache. | |
1159 | * This is needed, because DMA_DSBL_WR_INV is set. | |
1160 | */ | |
1161 | if (lp->dregs) | |
1162 | sbus_readw(lp->lregs + RDP); | |
1163 | ||
1164 | spin_unlock_irq(&lp->lock); | |
1165 | ||
1166 | dev->trans_start = jiffies; | |
1167 | dev_kfree_skb(skb); | |
6aa20a22 | 1168 | |
1da177e4 LT |
1169 | return 0; |
1170 | } | |
1171 | ||
1da177e4 LT |
1172 | /* taken from the depca driver */ |
1173 | static void lance_load_multicast(struct net_device *dev) | |
1174 | { | |
1175 | struct lance_private *lp = netdev_priv(dev); | |
1176 | struct dev_mc_list *dmi = dev->mc_list; | |
1177 | char *addrs; | |
1178 | int i; | |
1179 | u32 crc; | |
1180 | u32 val; | |
6aa20a22 | 1181 | |
1da177e4 LT |
1182 | /* set all multicast bits */ |
1183 | if (dev->flags & IFF_ALLMULTI) | |
1184 | val = ~0; | |
1185 | else | |
1186 | val = 0; | |
1187 | ||
1188 | if (lp->pio_buffer) { | |
1189 | struct lance_init_block __iomem *ib = lp->init_block_iomem; | |
1190 | sbus_writel(val, &ib->filter[0]); | |
1191 | sbus_writel(val, &ib->filter[1]); | |
1192 | } else { | |
1193 | struct lance_init_block *ib = lp->init_block_mem; | |
1194 | ib->filter [0] = val; | |
1195 | ib->filter [1] = val; | |
1196 | } | |
1197 | ||
1198 | if (dev->flags & IFF_ALLMULTI) | |
1199 | return; | |
6aa20a22 | 1200 | |
1da177e4 LT |
1201 | /* Add addresses */ |
1202 | for (i = 0; i < dev->mc_count; i++) { | |
1203 | addrs = dmi->dmi_addr; | |
1204 | dmi = dmi->next; | |
1205 | ||
1206 | /* multicast address? */ | |
1207 | if (!(*addrs & 1)) | |
1208 | continue; | |
1209 | crc = ether_crc_le(6, addrs); | |
1210 | crc = crc >> 26; | |
1211 | if (lp->pio_buffer) { | |
1212 | struct lance_init_block __iomem *ib = lp->init_block_iomem; | |
1213 | u16 __iomem *mcast_table = (u16 __iomem *) &ib->filter; | |
1214 | u16 tmp = sbus_readw(&mcast_table[crc>>4]); | |
1215 | tmp |= 1 << (crc & 0xf); | |
1216 | sbus_writew(tmp, &mcast_table[crc>>4]); | |
1217 | } else { | |
1218 | struct lance_init_block *ib = lp->init_block_mem; | |
1219 | u16 *mcast_table = (u16 *) &ib->filter; | |
1220 | mcast_table [crc >> 4] |= 1 << (crc & 0xf); | |
1221 | } | |
1222 | } | |
1223 | } | |
1224 | ||
1225 | static void lance_set_multicast(struct net_device *dev) | |
1226 | { | |
1227 | struct lance_private *lp = netdev_priv(dev); | |
1228 | struct lance_init_block *ib_mem = lp->init_block_mem; | |
1229 | struct lance_init_block __iomem *ib_iomem = lp->init_block_iomem; | |
1230 | u16 mode; | |
1231 | ||
1232 | if (!netif_running(dev)) | |
1233 | return; | |
1234 | ||
1235 | if (lp->tx_old != lp->tx_new) { | |
1236 | mod_timer(&lp->multicast_timer, jiffies + 4); | |
1237 | netif_wake_queue(dev); | |
1238 | return; | |
1239 | } | |
1240 | ||
1241 | netif_stop_queue(dev); | |
1242 | ||
1243 | STOP_LANCE(lp); | |
1244 | lp->init_ring(dev); | |
1245 | ||
1246 | if (lp->pio_buffer) | |
1247 | mode = sbus_readw(&ib_iomem->mode); | |
1248 | else | |
1249 | mode = ib_mem->mode; | |
1250 | if (dev->flags & IFF_PROMISC) { | |
1251 | mode |= LE_MO_PROM; | |
1252 | if (lp->pio_buffer) | |
1253 | sbus_writew(mode, &ib_iomem->mode); | |
1254 | else | |
1255 | ib_mem->mode = mode; | |
1256 | } else { | |
1257 | mode &= ~LE_MO_PROM; | |
1258 | if (lp->pio_buffer) | |
1259 | sbus_writew(mode, &ib_iomem->mode); | |
1260 | else | |
1261 | ib_mem->mode = mode; | |
1262 | lance_load_multicast(dev); | |
1263 | } | |
1264 | load_csrs(lp); | |
1265 | init_restart_lance(lp); | |
1266 | netif_wake_queue(dev); | |
1267 | } | |
1268 | ||
1269 | static void lance_set_multicast_retry(unsigned long _opaque) | |
1270 | { | |
1271 | struct net_device *dev = (struct net_device *) _opaque; | |
1272 | ||
1273 | lance_set_multicast(dev); | |
1274 | } | |
1275 | ||
1276 | static void lance_free_hwresources(struct lance_private *lp) | |
1277 | { | |
1278 | if (lp->lregs) | |
1279 | sbus_iounmap(lp->lregs, LANCE_REG_SIZE); | |
1280 | if (lp->init_block_iomem) { | |
1281 | sbus_iounmap(lp->init_block_iomem, | |
1282 | sizeof(struct lance_init_block)); | |
1283 | } else if (lp->init_block_mem) { | |
1284 | sbus_free_consistent(lp->sdev, | |
1285 | sizeof(struct lance_init_block), | |
1286 | lp->init_block_mem, | |
1287 | lp->init_block_dvma); | |
1288 | } | |
1289 | } | |
1290 | ||
1291 | /* Ethtool support... */ | |
1292 | static void sparc_lance_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) | |
1293 | { | |
1294 | struct lance_private *lp = netdev_priv(dev); | |
1295 | ||
1296 | strcpy(info->driver, "sunlance"); | |
1297 | strcpy(info->version, "2.02"); | |
1298 | sprintf(info->bus_info, "SBUS:%d", | |
1299 | lp->sdev->slot); | |
1300 | } | |
1301 | ||
1302 | static u32 sparc_lance_get_link(struct net_device *dev) | |
1303 | { | |
1304 | /* We really do not keep track of this, but this | |
1305 | * is better than not reporting anything at all. | |
1306 | */ | |
1307 | return 1; | |
1308 | } | |
1309 | ||
7282d491 | 1310 | static const struct ethtool_ops sparc_lance_ethtool_ops = { |
1da177e4 LT |
1311 | .get_drvinfo = sparc_lance_get_drvinfo, |
1312 | .get_link = sparc_lance_get_link, | |
1313 | }; | |
1314 | ||
efdbc1a7 DM |
1315 | static int __devinit sparc_lance_probe_one(struct sbus_dev *sdev, |
1316 | struct sbus_dma *ledma, | |
1317 | struct sbus_dev *lebuffer) | |
1da177e4 LT |
1318 | { |
1319 | static unsigned version_printed; | |
76fcdb30 | 1320 | struct device_node *dp = sdev->ofdev.node; |
1da177e4 LT |
1321 | struct net_device *dev; |
1322 | struct lance_private *lp; | |
1323 | int i; | |
0795af57 | 1324 | DECLARE_MAC_BUF(mac); |
1da177e4 LT |
1325 | |
1326 | dev = alloc_etherdev(sizeof(struct lance_private) + 8); | |
1327 | if (!dev) | |
1328 | return -ENOMEM; | |
1329 | ||
1330 | lp = netdev_priv(dev); | |
1da177e4 LT |
1331 | |
1332 | if (sparc_lance_debug && version_printed++ == 0) | |
1333 | printk (KERN_INFO "%s", version); | |
1334 | ||
1335 | spin_lock_init(&lp->lock); | |
1336 | ||
1337 | /* Copy the IDPROM ethernet address to the device structure, later we | |
1338 | * will copy the address in the device structure to the lance | |
1339 | * initialization block. | |
1340 | */ | |
1341 | for (i = 0; i < 6; i++) | |
1342 | dev->dev_addr[i] = idprom->id_ethaddr[i]; | |
1343 | ||
1344 | /* Get the IO region */ | |
1345 | lp->lregs = sbus_ioremap(&sdev->resource[0], 0, | |
1346 | LANCE_REG_SIZE, lancestr); | |
1347 | if (!lp->lregs) { | |
1348 | printk(KERN_ERR "SunLance: Cannot map registers.\n"); | |
1349 | goto fail; | |
1350 | } | |
1351 | ||
1352 | lp->sdev = sdev; | |
1353 | if (lebuffer) { | |
1354 | /* sanity check */ | |
1355 | if (lebuffer->resource[0].start & 7) { | |
1356 | printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not on even boundary.\n"); | |
1357 | goto fail; | |
1358 | } | |
1359 | lp->init_block_iomem = | |
1360 | sbus_ioremap(&lebuffer->resource[0], 0, | |
1361 | sizeof(struct lance_init_block), "lebuffer"); | |
1362 | if (!lp->init_block_iomem) { | |
1363 | printk(KERN_ERR "SunLance: Cannot map PIO buffer.\n"); | |
1364 | goto fail; | |
1365 | } | |
1366 | lp->init_block_dvma = 0; | |
1367 | lp->pio_buffer = 1; | |
1368 | lp->init_ring = lance_init_ring_pio; | |
1369 | lp->rx = lance_rx_pio; | |
1370 | lp->tx = lance_tx_pio; | |
1371 | } else { | |
1372 | lp->init_block_mem = | |
1373 | sbus_alloc_consistent(sdev, sizeof(struct lance_init_block), | |
1374 | &lp->init_block_dvma); | |
1375 | if (!lp->init_block_mem || lp->init_block_dvma == 0) { | |
1376 | printk(KERN_ERR "SunLance: Cannot allocate consistent DMA memory.\n"); | |
1377 | goto fail; | |
1378 | } | |
1379 | lp->pio_buffer = 0; | |
1380 | lp->init_ring = lance_init_ring_dvma; | |
1381 | lp->rx = lance_rx_dvma; | |
1382 | lp->tx = lance_tx_dvma; | |
1383 | } | |
76fcdb30 DM |
1384 | lp->busmaster_regval = of_getintprop_default(dp, "busmaster-regval", |
1385 | (LE_C3_BSWP | | |
1386 | LE_C3_ACON | | |
1387 | LE_C3_BCON)); | |
1da177e4 LT |
1388 | |
1389 | lp->name = lancestr; | |
1390 | lp->ledma = ledma; | |
1391 | ||
1392 | lp->burst_sizes = 0; | |
1393 | if (lp->ledma) { | |
76fcdb30 DM |
1394 | struct device_node *ledma_dp = ledma->sdev->ofdev.node; |
1395 | const char *prop; | |
1da177e4 LT |
1396 | unsigned int sbmask; |
1397 | u32 csr; | |
1398 | ||
1399 | /* Find burst-size property for ledma */ | |
76fcdb30 DM |
1400 | lp->burst_sizes = of_getintprop_default(ledma_dp, |
1401 | "burst-sizes", 0); | |
1da177e4 LT |
1402 | |
1403 | /* ledma may be capable of fast bursts, but sbus may not. */ | |
76fcdb30 DM |
1404 | sbmask = of_getintprop_default(ledma_dp, "burst-sizes", |
1405 | DMA_BURSTBITS); | |
1da177e4 LT |
1406 | lp->burst_sizes &= sbmask; |
1407 | ||
1408 | /* Get the cable-selection property */ | |
76fcdb30 DM |
1409 | prop = of_get_property(ledma_dp, "cable-selection", NULL); |
1410 | if (!prop || prop[0] == '\0') { | |
1411 | struct device_node *nd; | |
1da177e4 | 1412 | |
76fcdb30 DM |
1413 | printk(KERN_INFO "SunLance: using " |
1414 | "auto-carrier-detection.\n"); | |
1da177e4 | 1415 | |
76fcdb30 | 1416 | nd = of_find_node_by_path("/options"); |
1da177e4 LT |
1417 | if (!nd) |
1418 | goto no_link_test; | |
1419 | ||
76fcdb30 DM |
1420 | prop = of_get_property(nd, "tpe-link-test?", NULL); |
1421 | if (!prop) | |
1da177e4 LT |
1422 | goto no_link_test; |
1423 | ||
1da177e4 LT |
1424 | if (strcmp(prop, "true")) { |
1425 | printk(KERN_NOTICE "SunLance: warning: overriding option " | |
1426 | "'tpe-link-test?'\n"); | |
1427 | printk(KERN_NOTICE "SunLance: warning: mail any problems " | |
1428 | "to ecd@skynet.be\n"); | |
1429 | auxio_set_lte(AUXIO_LTE_ON); | |
1430 | } | |
1431 | no_link_test: | |
1432 | lp->auto_select = 1; | |
1433 | lp->tpe = 0; | |
1434 | } else if (!strcmp(prop, "aui")) { | |
1435 | lp->auto_select = 0; | |
1436 | lp->tpe = 0; | |
1437 | } else { | |
1438 | lp->auto_select = 0; | |
1439 | lp->tpe = 1; | |
1440 | } | |
1441 | ||
1442 | lp->dregs = ledma->regs; | |
1443 | ||
1444 | /* Reset ledma */ | |
1445 | csr = sbus_readl(lp->dregs + DMA_CSR); | |
1446 | sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR); | |
1447 | udelay(200); | |
1448 | sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR); | |
1449 | } else | |
1450 | lp->dregs = NULL; | |
1451 | ||
1452 | lp->dev = dev; | |
c2d81e63 | 1453 | SET_NETDEV_DEV(dev, &sdev->ofdev.dev); |
1da177e4 LT |
1454 | dev->open = &lance_open; |
1455 | dev->stop = &lance_close; | |
1456 | dev->hard_start_xmit = &lance_start_xmit; | |
1457 | dev->tx_timeout = &lance_tx_timeout; | |
1458 | dev->watchdog_timeo = 5*HZ; | |
1da177e4 LT |
1459 | dev->set_multicast_list = &lance_set_multicast; |
1460 | dev->ethtool_ops = &sparc_lance_ethtool_ops; | |
1461 | ||
1462 | dev->irq = sdev->irqs[0]; | |
1463 | ||
1464 | dev->dma = 0; | |
1465 | ||
1466 | /* We cannot sleep if the chip is busy during a | |
1467 | * multicast list update event, because such events | |
1468 | * can occur from interrupts (ex. IPv6). So we | |
1469 | * use a timer to try again later when necessary. -DaveM | |
1470 | */ | |
1471 | init_timer(&lp->multicast_timer); | |
1472 | lp->multicast_timer.data = (unsigned long) dev; | |
1473 | lp->multicast_timer.function = &lance_set_multicast_retry; | |
1474 | ||
1475 | if (register_netdev(dev)) { | |
1476 | printk(KERN_ERR "SunLance: Cannot register device.\n"); | |
1477 | goto fail; | |
1478 | } | |
1479 | ||
c2d81e63 | 1480 | dev_set_drvdata(&sdev->ofdev.dev, lp); |
1da177e4 | 1481 | |
0795af57 JP |
1482 | printk(KERN_INFO "%s: LANCE %s\n", |
1483 | dev->name, print_mac(mac, dev->dev_addr)); | |
1da177e4 LT |
1484 | |
1485 | return 0; | |
1486 | ||
1487 | fail: | |
1488 | lance_free_hwresources(lp); | |
1489 | free_netdev(dev); | |
1490 | return -ENODEV; | |
1491 | } | |
1492 | ||
1493 | /* On 4m, find the associated dma for the lance chip */ | |
efdbc1a7 | 1494 | static struct sbus_dma * __devinit find_ledma(struct sbus_dev *sdev) |
1da177e4 LT |
1495 | { |
1496 | struct sbus_dma *p; | |
1497 | ||
1498 | for_each_dvma(p) { | |
1499 | if (p->sdev == sdev) | |
1500 | return p; | |
1501 | } | |
1502 | return NULL; | |
1503 | } | |
1504 | ||
1505 | #ifdef CONFIG_SUN4 | |
1506 | ||
1507 | #include <asm/sun4paddr.h> | |
1508 | #include <asm/machines.h> | |
1509 | ||
1510 | /* Find all the lance cards on the system and initialize them */ | |
c2d81e63 | 1511 | static struct sbus_dev sun4_sdev; |
efdbc1a7 | 1512 | static int __devinit sparc_lance_init(void) |
1da177e4 | 1513 | { |
1da177e4 LT |
1514 | if ((idprom->id_machtype == (SM_SUN4|SM_4_330)) || |
1515 | (idprom->id_machtype == (SM_SUN4|SM_4_470))) { | |
93853fd0 | 1516 | memset(&sun4_sdev, 0, sizeof(struct sbus_dev)); |
c2d81e63 DM |
1517 | sun4_sdev.reg_addrs[0].phys_addr = sun4_eth_physaddr; |
1518 | sun4_sdev.irqs[0] = 6; | |
1519 | return sparc_lance_probe_one(&sun4_sdev, NULL, NULL); | |
1da177e4 LT |
1520 | } |
1521 | return -ENODEV; | |
1522 | } | |
1523 | ||
c2d81e63 | 1524 | static int __exit sunlance_sun4_remove(void) |
1da177e4 | 1525 | { |
93853fd0 | 1526 | struct lance_private *lp = dev_get_drvdata(&sun4_sdev.ofdev.dev); |
c2d81e63 DM |
1527 | struct net_device *net_dev = lp->dev; |
1528 | ||
9f9b6693 | 1529 | unregister_netdev(net_dev); |
c2d81e63 | 1530 | |
93853fd0 | 1531 | lance_free_hwresources(lp); |
c2d81e63 DM |
1532 | |
1533 | free_netdev(net_dev); | |
1534 | ||
93853fd0 | 1535 | dev_set_drvdata(&sun4_sdev.ofdev.dev, NULL); |
c2d81e63 | 1536 | |
1da177e4 LT |
1537 | return 0; |
1538 | } | |
1da177e4 | 1539 | |
c2d81e63 DM |
1540 | #else /* !CONFIG_SUN4 */ |
1541 | ||
1542 | static int __devinit sunlance_sbus_probe(struct of_device *dev, const struct of_device_id *match) | |
1da177e4 | 1543 | { |
c2d81e63 | 1544 | struct sbus_dev *sdev = to_sbus_device(&dev->dev); |
c2d81e63 DM |
1545 | int err; |
1546 | ||
404dda85 KH |
1547 | if (sdev->parent) { |
1548 | struct of_device *parent = &sdev->parent->ofdev; | |
1da177e4 | 1549 | |
404dda85 KH |
1550 | if (!strcmp(parent->node->name, "ledma")) { |
1551 | struct sbus_dma *ledma = find_ledma(to_sbus_device(&parent->dev)); | |
1da177e4 | 1552 | |
404dda85 KH |
1553 | err = sparc_lance_probe_one(sdev, ledma, NULL); |
1554 | } else if (!strcmp(parent->node->name, "lebuffer")) { | |
1555 | err = sparc_lance_probe_one(sdev, NULL, to_sbus_device(&parent->dev)); | |
1556 | } else | |
1557 | err = sparc_lance_probe_one(sdev, NULL, NULL); | |
1558 | } else | |
1559 | err = sparc_lance_probe_one(sdev, NULL, NULL); | |
c2d81e63 DM |
1560 | |
1561 | return err; | |
1562 | } | |
1563 | ||
1564 | static int __devexit sunlance_sbus_remove(struct of_device *dev) | |
1565 | { | |
1566 | struct lance_private *lp = dev_get_drvdata(&dev->dev); | |
1567 | struct net_device *net_dev = lp->dev; | |
1568 | ||
9f9b6693 | 1569 | unregister_netdev(net_dev); |
c2d81e63 DM |
1570 | |
1571 | lance_free_hwresources(lp); | |
1572 | ||
1573 | free_netdev(net_dev); | |
1574 | ||
1575 | dev_set_drvdata(&dev->dev, NULL); | |
1576 | ||
1577 | return 0; | |
1578 | } | |
1579 | ||
1580 | static struct of_device_id sunlance_sbus_match[] = { | |
1581 | { | |
1582 | .name = "le", | |
1583 | }, | |
c2d81e63 DM |
1584 | {}, |
1585 | }; | |
1586 | ||
1587 | MODULE_DEVICE_TABLE(of, sunlance_sbus_match); | |
1588 | ||
1589 | static struct of_platform_driver sunlance_sbus_driver = { | |
1590 | .name = "sunlance", | |
1591 | .match_table = sunlance_sbus_match, | |
1592 | .probe = sunlance_sbus_probe, | |
1593 | .remove = __devexit_p(sunlance_sbus_remove), | |
1594 | }; | |
1595 | ||
1596 | ||
1597 | /* Find all the lance cards on the system and initialize them */ | |
1598 | static int __init sparc_lance_init(void) | |
1599 | { | |
1600 | return of_register_driver(&sunlance_sbus_driver, &sbus_bus_type); | |
1601 | } | |
1602 | #endif /* !CONFIG_SUN4 */ | |
1603 | ||
1604 | static void __exit sparc_lance_exit(void) | |
1605 | { | |
1606 | #ifdef CONFIG_SUN4 | |
1607 | sunlance_sun4_remove(); | |
1608 | #else | |
1609 | of_unregister_driver(&sunlance_sbus_driver); | |
1610 | #endif | |
1da177e4 LT |
1611 | } |
1612 | ||
c2d81e63 DM |
1613 | module_init(sparc_lance_init); |
1614 | module_exit(sparc_lance_exit); |