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tc35815: Use managed pci iomap helper
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CommitLineData
eea221ce
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1/*
2 * tc35815.c: A TOSHIBA TC35815CF PCI 10/100Mbps ethernet driver for linux.
1da177e4
LT
3 *
4 * Based on skelton.c by Donald Becker.
1da177e4 5 *
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6 * This driver is a replacement of older and less maintained version.
7 * This is a header of the older version:
8 * -----<snip>-----
9 * Copyright 2001 MontaVista Software Inc.
10 * Author: MontaVista Software, Inc.
11 * ahennessy@mvista.com
12 * Copyright (C) 2000-2001 Toshiba Corporation
13 * static const char *version =
14 * "tc35815.c:v0.00 26/07/2000 by Toshiba Corporation\n";
15 * -----<snip>-----
1da177e4 16 *
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17 * This file is subject to the terms and conditions of the GNU General Public
18 * License. See the file "COPYING" in the main directory of this archive
19 * for more details.
1da177e4 20 *
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21 * (C) Copyright TOSHIBA CORPORATION 2004-2005
22 * All Rights Reserved.
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23 */
24
eea221ce 25#ifdef TC35815_NAPI
bd43da8f 26#define DRV_VERSION "1.36-NAPI"
eea221ce 27#else
bd43da8f 28#define DRV_VERSION "1.36"
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29#endif
30static const char *version = "tc35815.c:v" DRV_VERSION "\n";
31#define MODNAME "tc35815"
1da177e4
LT
32
33#include <linux/module.h>
34#include <linux/kernel.h>
35#include <linux/types.h>
36#include <linux/fcntl.h>
37#include <linux/interrupt.h>
38#include <linux/ioport.h>
39#include <linux/in.h>
40#include <linux/slab.h>
41#include <linux/string.h>
eea221ce 42#include <linux/spinlock.h>
1da177e4
LT
43#include <linux/errno.h>
44#include <linux/init.h>
45#include <linux/netdevice.h>
46#include <linux/etherdevice.h>
47#include <linux/skbuff.h>
48#include <linux/delay.h>
49#include <linux/pci.h>
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50#include <linux/mii.h>
51#include <linux/ethtool.h>
bd43da8f 52#include <linux/platform_device.h>
1da177e4 53#include <asm/io.h>
1da177e4
LT
54#include <asm/byteorder.h>
55
1da177e4
LT
56/* First, a few definitions that the brave might change. */
57
1da177e4 58#define GATHER_TXINT /* On-Demand Tx Interrupt */
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59#define WORKAROUND_LOSTCAR
60#define WORKAROUND_100HALF_PROMISC
61/* #define TC35815_USE_PACKEDBUFFER */
62
63typedef enum {
64 TC35815CF = 0,
65 TC35815_NWU,
66 TC35815_TX4939,
67} board_t;
68
69/* indexed by board_t, above */
70static const struct {
71 const char *name;
72} board_info[] __devinitdata = {
73 { "TOSHIBA TC35815CF 10/100BaseTX" },
74 { "TOSHIBA TC35815 with Wake on LAN" },
75 { "TOSHIBA TC35815/TX4939" },
76};
77
78static const struct pci_device_id tc35815_pci_tbl[] = {
79 {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815CF), .driver_data = TC35815CF },
80 {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_NWU), .driver_data = TC35815_NWU },
81 {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939), .driver_data = TC35815_TX4939 },
82 {0,}
83};
84MODULE_DEVICE_TABLE (pci, tc35815_pci_tbl);
1da177e4 85
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86/* see MODULE_PARM_DESC */
87static struct tc35815_options {
88 int speed;
89 int duplex;
90 int doforce;
91} options;
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LT
92
93/*
94 * Registers
95 */
96struct tc35815_regs {
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AN
97 __u32 DMA_Ctl; /* 0x00 */
98 __u32 TxFrmPtr;
99 __u32 TxThrsh;
100 __u32 TxPollCtr;
101 __u32 BLFrmPtr;
102 __u32 RxFragSize;
103 __u32 Int_En;
104 __u32 FDA_Bas;
105 __u32 FDA_Lim; /* 0x20 */
106 __u32 Int_Src;
107 __u32 unused0[2];
108 __u32 PauseCnt;
109 __u32 RemPauCnt;
110 __u32 TxCtlFrmStat;
111 __u32 unused1;
112 __u32 MAC_Ctl; /* 0x40 */
113 __u32 CAM_Ctl;
114 __u32 Tx_Ctl;
115 __u32 Tx_Stat;
116 __u32 Rx_Ctl;
117 __u32 Rx_Stat;
118 __u32 MD_Data;
119 __u32 MD_CA;
120 __u32 CAM_Adr; /* 0x60 */
121 __u32 CAM_Data;
122 __u32 CAM_Ena;
123 __u32 PROM_Ctl;
124 __u32 PROM_Data;
125 __u32 Algn_Cnt;
126 __u32 CRC_Cnt;
127 __u32 Miss_Cnt;
1da177e4
LT
128};
129
130/*
131 * Bit assignments
132 */
133/* DMA_Ctl bit asign ------------------------------------------------------- */
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AN
134#define DMA_RxAlign 0x00c00000 /* 1:Reception Alignment */
135#define DMA_RxAlign_1 0x00400000
136#define DMA_RxAlign_2 0x00800000
137#define DMA_RxAlign_3 0x00c00000
138#define DMA_M66EnStat 0x00080000 /* 1:66MHz Enable State */
1da177e4
LT
139#define DMA_IntMask 0x00040000 /* 1:Interupt mask */
140#define DMA_SWIntReq 0x00020000 /* 1:Software Interrupt request */
141#define DMA_TxWakeUp 0x00010000 /* 1:Transmit Wake Up */
142#define DMA_RxBigE 0x00008000 /* 1:Receive Big Endian */
143#define DMA_TxBigE 0x00004000 /* 1:Transmit Big Endian */
144#define DMA_TestMode 0x00002000 /* 1:Test Mode */
145#define DMA_PowrMgmnt 0x00001000 /* 1:Power Management */
146#define DMA_DmBurst_Mask 0x000001fc /* DMA Burst size */
147
148/* RxFragSize bit asign ---------------------------------------------------- */
149#define RxFrag_EnPack 0x00008000 /* 1:Enable Packing */
150#define RxFrag_MinFragMask 0x00000ffc /* Minimum Fragment */
151
152/* MAC_Ctl bit asign ------------------------------------------------------- */
153#define MAC_Link10 0x00008000 /* 1:Link Status 10Mbits */
154#define MAC_EnMissRoll 0x00002000 /* 1:Enable Missed Roll */
155#define MAC_MissRoll 0x00000400 /* 1:Missed Roll */
156#define MAC_Loop10 0x00000080 /* 1:Loop 10 Mbps */
157#define MAC_Conn_Auto 0x00000000 /*00:Connection mode (Automatic) */
158#define MAC_Conn_10M 0x00000020 /*01: (10Mbps endec)*/
159#define MAC_Conn_Mll 0x00000040 /*10: (Mll clock) */
160#define MAC_MacLoop 0x00000010 /* 1:MAC Loopback */
161#define MAC_FullDup 0x00000008 /* 1:Full Duplex 0:Half Duplex */
162#define MAC_Reset 0x00000004 /* 1:Software Reset */
163#define MAC_HaltImm 0x00000002 /* 1:Halt Immediate */
164#define MAC_HaltReq 0x00000001 /* 1:Halt request */
165
166/* PROM_Ctl bit asign ------------------------------------------------------ */
167#define PROM_Busy 0x00008000 /* 1:Busy (Start Operation) */
168#define PROM_Read 0x00004000 /*10:Read operation */
169#define PROM_Write 0x00002000 /*01:Write operation */
170#define PROM_Erase 0x00006000 /*11:Erase operation */
171 /*00:Enable or Disable Writting, */
172 /* as specified in PROM_Addr. */
173#define PROM_Addr_Ena 0x00000030 /*11xxxx:PROM Write enable */
174 /*00xxxx: disable */
175
176/* CAM_Ctl bit asign ------------------------------------------------------- */
177#define CAM_CompEn 0x00000010 /* 1:CAM Compare Enable */
178#define CAM_NegCAM 0x00000008 /* 1:Reject packets CAM recognizes,*/
179 /* accept other */
180#define CAM_BroadAcc 0x00000004 /* 1:Broadcast assept */
181#define CAM_GroupAcc 0x00000002 /* 1:Multicast assept */
182#define CAM_StationAcc 0x00000001 /* 1:unicast accept */
183
184/* CAM_Ena bit asign ------------------------------------------------------- */
185#define CAM_ENTRY_MAX 21 /* CAM Data entry max count */
186#define CAM_Ena_Mask ((1<<CAM_ENTRY_MAX)-1) /* CAM Enable bits (Max 21bits) */
187#define CAM_Ena_Bit(index) (1<<(index))
188#define CAM_ENTRY_DESTINATION 0
189#define CAM_ENTRY_SOURCE 1
190#define CAM_ENTRY_MACCTL 20
191
192/* Tx_Ctl bit asign -------------------------------------------------------- */
193#define Tx_En 0x00000001 /* 1:Transmit enable */
194#define Tx_TxHalt 0x00000002 /* 1:Transmit Halt Request */
195#define Tx_NoPad 0x00000004 /* 1:Suppress Padding */
196#define Tx_NoCRC 0x00000008 /* 1:Suppress Padding */
197#define Tx_FBack 0x00000010 /* 1:Fast Back-off */
198#define Tx_EnUnder 0x00000100 /* 1:Enable Underrun */
199#define Tx_EnExDefer 0x00000200 /* 1:Enable Excessive Deferral */
200#define Tx_EnLCarr 0x00000400 /* 1:Enable Lost Carrier */
201#define Tx_EnExColl 0x00000800 /* 1:Enable Excessive Collision */
202#define Tx_EnLateColl 0x00001000 /* 1:Enable Late Collision */
203#define Tx_EnTxPar 0x00002000 /* 1:Enable Transmit Parity */
204#define Tx_EnComp 0x00004000 /* 1:Enable Completion */
205
206/* Tx_Stat bit asign ------------------------------------------------------- */
207#define Tx_TxColl_MASK 0x0000000F /* Tx Collision Count */
208#define Tx_ExColl 0x00000010 /* Excessive Collision */
209#define Tx_TXDefer 0x00000020 /* Transmit Defered */
210#define Tx_Paused 0x00000040 /* Transmit Paused */
211#define Tx_IntTx 0x00000080 /* Interrupt on Tx */
212#define Tx_Under 0x00000100 /* Underrun */
213#define Tx_Defer 0x00000200 /* Deferral */
214#define Tx_NCarr 0x00000400 /* No Carrier */
215#define Tx_10Stat 0x00000800 /* 10Mbps Status */
216#define Tx_LateColl 0x00001000 /* Late Collision */
217#define Tx_TxPar 0x00002000 /* Tx Parity Error */
218#define Tx_Comp 0x00004000 /* Completion */
219#define Tx_Halted 0x00008000 /* Tx Halted */
220#define Tx_SQErr 0x00010000 /* Signal Quality Error(SQE) */
221
222/* Rx_Ctl bit asign -------------------------------------------------------- */
223#define Rx_EnGood 0x00004000 /* 1:Enable Good */
224#define Rx_EnRxPar 0x00002000 /* 1:Enable Receive Parity */
225#define Rx_EnLongErr 0x00000800 /* 1:Enable Long Error */
226#define Rx_EnOver 0x00000400 /* 1:Enable OverFlow */
227#define Rx_EnCRCErr 0x00000200 /* 1:Enable CRC Error */
228#define Rx_EnAlign 0x00000100 /* 1:Enable Alignment */
229#define Rx_IgnoreCRC 0x00000040 /* 1:Ignore CRC Value */
230#define Rx_StripCRC 0x00000010 /* 1:Strip CRC Value */
231#define Rx_ShortEn 0x00000008 /* 1:Short Enable */
232#define Rx_LongEn 0x00000004 /* 1:Long Enable */
233#define Rx_RxHalt 0x00000002 /* 1:Receive Halt Request */
234#define Rx_RxEn 0x00000001 /* 1:Receive Intrrupt Enable */
235
236/* Rx_Stat bit asign ------------------------------------------------------- */
237#define Rx_Halted 0x00008000 /* Rx Halted */
238#define Rx_Good 0x00004000 /* Rx Good */
239#define Rx_RxPar 0x00002000 /* Rx Parity Error */
240 /* 0x00001000 not use */
241#define Rx_LongErr 0x00000800 /* Rx Long Error */
242#define Rx_Over 0x00000400 /* Rx Overflow */
243#define Rx_CRCErr 0x00000200 /* Rx CRC Error */
244#define Rx_Align 0x00000100 /* Rx Alignment Error */
245#define Rx_10Stat 0x00000080 /* Rx 10Mbps Status */
246#define Rx_IntRx 0x00000040 /* Rx Interrupt */
247#define Rx_CtlRecd 0x00000020 /* Rx Control Receive */
248
249#define Rx_Stat_Mask 0x0000EFC0 /* Rx All Status Mask */
250
251/* Int_En bit asign -------------------------------------------------------- */
252#define Int_NRAbtEn 0x00000800 /* 1:Non-recoverable Abort Enable */
253#define Int_TxCtlCmpEn 0x00000400 /* 1:Transmit Control Complete Enable */
254#define Int_DmParErrEn 0x00000200 /* 1:DMA Parity Error Enable */
255#define Int_DParDEn 0x00000100 /* 1:Data Parity Error Enable */
256#define Int_EarNotEn 0x00000080 /* 1:Early Notify Enable */
257#define Int_DParErrEn 0x00000040 /* 1:Detected Parity Error Enable */
258#define Int_SSysErrEn 0x00000020 /* 1:Signalled System Error Enable */
259#define Int_RMasAbtEn 0x00000010 /* 1:Received Master Abort Enable */
260#define Int_RTargAbtEn 0x00000008 /* 1:Received Target Abort Enable */
261#define Int_STargAbtEn 0x00000004 /* 1:Signalled Target Abort Enable */
262#define Int_BLExEn 0x00000002 /* 1:Buffer List Exhausted Enable */
263#define Int_FDAExEn 0x00000001 /* 1:Free Descriptor Area */
264 /* Exhausted Enable */
265
266/* Int_Src bit asign ------------------------------------------------------- */
267#define Int_NRabt 0x00004000 /* 1:Non Recoverable error */
268#define Int_DmParErrStat 0x00002000 /* 1:DMA Parity Error & Clear */
269#define Int_BLEx 0x00001000 /* 1:Buffer List Empty & Clear */
270#define Int_FDAEx 0x00000800 /* 1:FDA Empty & Clear */
271#define Int_IntNRAbt 0x00000400 /* 1:Non Recoverable Abort */
272#define Int_IntCmp 0x00000200 /* 1:MAC control packet complete */
273#define Int_IntExBD 0x00000100 /* 1:Interrupt Extra BD & Clear */
274#define Int_DmParErr 0x00000080 /* 1:DMA Parity Error & Clear */
275#define Int_IntEarNot 0x00000040 /* 1:Receive Data write & Clear */
276#define Int_SWInt 0x00000020 /* 1:Software request & Clear */
277#define Int_IntBLEx 0x00000010 /* 1:Buffer List Empty & Clear */
278#define Int_IntFDAEx 0x00000008 /* 1:FDA Empty & Clear */
279#define Int_IntPCI 0x00000004 /* 1:PCI controller & Clear */
280#define Int_IntMacRx 0x00000002 /* 1:Rx controller & Clear */
281#define Int_IntMacTx 0x00000001 /* 1:Tx controller & Clear */
282
283/* MD_CA bit asign --------------------------------------------------------- */
284#define MD_CA_PreSup 0x00001000 /* 1:Preamble Supress */
285#define MD_CA_Busy 0x00000800 /* 1:Busy (Start Operation) */
286#define MD_CA_Wr 0x00000400 /* 1:Write 0:Read */
287
288
1da177e4
LT
289/*
290 * Descriptors
291 */
292
293/* Frame descripter */
294struct FDesc {
295 volatile __u32 FDNext;
296 volatile __u32 FDSystem;
297 volatile __u32 FDStat;
298 volatile __u32 FDCtl;
299};
300
301/* Buffer descripter */
302struct BDesc {
303 volatile __u32 BuffData;
304 volatile __u32 BDCtl;
305};
306
307#define FD_ALIGN 16
308
309/* Frame Descripter bit asign ---------------------------------------------- */
310#define FD_FDLength_MASK 0x0000FFFF /* Length MASK */
311#define FD_BDCnt_MASK 0x001F0000 /* BD count MASK in FD */
312#define FD_FrmOpt_MASK 0x7C000000 /* Frame option MASK */
313#define FD_FrmOpt_BigEndian 0x40000000 /* Tx/Rx */
314#define FD_FrmOpt_IntTx 0x20000000 /* Tx only */
315#define FD_FrmOpt_NoCRC 0x10000000 /* Tx only */
316#define FD_FrmOpt_NoPadding 0x08000000 /* Tx only */
317#define FD_FrmOpt_Packing 0x04000000 /* Rx only */
318#define FD_CownsFD 0x80000000 /* FD Controller owner bit */
319#define FD_Next_EOL 0x00000001 /* FD EOL indicator */
320#define FD_BDCnt_SHIFT 16
321
322/* Buffer Descripter bit asign --------------------------------------------- */
323#define BD_BuffLength_MASK 0x0000FFFF /* Recieve Data Size */
324#define BD_RxBDID_MASK 0x00FF0000 /* BD ID Number MASK */
325#define BD_RxBDSeqN_MASK 0x7F000000 /* Rx BD Sequence Number */
326#define BD_CownsBD 0x80000000 /* BD Controller owner bit */
327#define BD_RxBDID_SHIFT 16
328#define BD_RxBDSeqN_SHIFT 24
329
330
331/* Some useful constants. */
332#undef NO_CHECK_CARRIER /* Does not check No-Carrier with TP */
333
334#ifdef NO_CHECK_CARRIER
335#define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
eea221ce
AN
336 Tx_EnExColl | Tx_EnExDefer | Tx_EnUnder | \
337 Tx_En) /* maybe 0x7b01 */
1da177e4
LT
338#else
339#define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
eea221ce
AN
340 Tx_EnExColl | Tx_EnLCarr | Tx_EnExDefer | Tx_EnUnder | \
341 Tx_En) /* maybe 0x7b01 */
1da177e4
LT
342#endif
343#define RX_CTL_CMD (Rx_EnGood | Rx_EnRxPar | Rx_EnLongErr | Rx_EnOver \
344 | Rx_EnCRCErr | Rx_EnAlign | Rx_RxEn) /* maybe 0x6f01 */
1da177e4 345#define INT_EN_CMD (Int_NRAbtEn | \
eea221ce 346 Int_DmParErrEn | Int_DParDEn | Int_DParErrEn | \
1da177e4
LT
347 Int_SSysErrEn | Int_RMasAbtEn | Int_RTargAbtEn | \
348 Int_STargAbtEn | \
349 Int_BLExEn | Int_FDAExEn) /* maybe 0xb7f*/
eea221ce
AN
350#define DMA_CTL_CMD DMA_BURST_SIZE
351#define HAVE_DMA_RXALIGN(lp) likely((lp)->boardtype != TC35815CF)
1da177e4
LT
352
353/* Tuning parameters */
354#define DMA_BURST_SIZE 32
355#define TX_THRESHOLD 1024
eea221ce
AN
356#define TX_THRESHOLD_MAX 1536 /* used threshold with packet max byte for low pci transfer ability.*/
357#define TX_THRESHOLD_KEEP_LIMIT 10 /* setting threshold max value when overrun error occured this count. */
1da177e4 358
eea221ce
AN
359/* 16 + RX_BUF_NUM * 8 + RX_FD_NUM * 16 + TX_FD_NUM * 32 <= PAGE_SIZE*FD_PAGE_NUM */
360#ifdef TC35815_USE_PACKEDBUFFER
1da177e4 361#define FD_PAGE_NUM 2
eea221ce 362#define RX_BUF_NUM 8 /* >= 2 */
1da177e4
LT
363#define RX_FD_NUM 250 /* >= 32 */
364#define TX_FD_NUM 128
eea221ce
AN
365#define RX_BUF_SIZE PAGE_SIZE
366#else /* TC35815_USE_PACKEDBUFFER */
367#define FD_PAGE_NUM 4
368#define RX_BUF_NUM 128 /* < 256 */
369#define RX_FD_NUM 256 /* >= 32 */
370#define TX_FD_NUM 128
371#if RX_CTL_CMD & Rx_LongEn
372#define RX_BUF_SIZE PAGE_SIZE
373#elif RX_CTL_CMD & Rx_StripCRC
374#define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 4 + 2, 32) /* +2: reserve */
375#else
376#define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 2, 32) /* +2: reserve */
377#endif
378#endif /* TC35815_USE_PACKEDBUFFER */
379#define RX_FD_RESERVE (2 / 2) /* max 2 BD per RxFD */
380#define NAPI_WEIGHT 16
1da177e4
LT
381
382struct TxFD {
383 struct FDesc fd;
384 struct BDesc bd;
385 struct BDesc unused;
386};
387
388struct RxFD {
389 struct FDesc fd;
390 struct BDesc bd[0]; /* variable length */
391};
392
393struct FrFD {
394 struct FDesc fd;
eea221ce 395 struct BDesc bd[RX_BUF_NUM];
1da177e4
LT
396};
397
398
22adf7e5
AN
399#define tc_readl(addr) ioread32(addr)
400#define tc_writel(d, addr) iowrite32(d, addr)
1da177e4 401
eea221ce
AN
402#define TC35815_TX_TIMEOUT msecs_to_jiffies(400)
403
404/* Timer state engine. */
405enum tc35815_timer_state {
406 arbwait = 0, /* Waiting for auto negotiation to complete. */
407 lupwait = 1, /* Auto-neg complete, awaiting link-up status. */
408 ltrywait = 2, /* Forcing try of all modes, from fastest to slowest. */
409 asleep = 3, /* Time inactive. */
410 lcheck = 4, /* Check link status. */
411};
1da177e4
LT
412
413/* Information that need to be kept for each board. */
414struct tc35815_local {
eea221ce 415 struct pci_dev *pci_dev;
1da177e4 416
bea3348e
SH
417 struct net_device *dev;
418 struct napi_struct napi;
419
1da177e4 420 /* statistics */
1da177e4
LT
421 struct {
422 int max_tx_qlen;
423 int tx_ints;
424 int rx_ints;
eea221ce 425 int tx_underrun;
1da177e4
LT
426 } lstats;
427
eea221ce
AN
428 /* Tx control lock. This protects the transmit buffer ring
429 * state along with the "tx full" state of the driver. This
430 * means all netif_queue flow control actions are protected
431 * by this lock as well.
432 */
433 spinlock_t lock;
434
435 int phy_addr;
1da177e4 436 int fullduplex;
eea221ce
AN
437 unsigned short saved_lpa;
438 struct timer_list timer;
439 enum tc35815_timer_state timer_state; /* State of auto-neg timer. */
440 unsigned int timer_ticks; /* Number of clicks at each state */
1da177e4
LT
441
442 /*
443 * Transmitting: Batch Mode.
444 * 1 BD in 1 TxFD.
eea221ce 445 * Receiving: Packing Mode. (TC35815_USE_PACKEDBUFFER)
1da177e4 446 * 1 circular FD for Free Buffer List.
eea221ce 447 * RX_BUF_NUM BD in Free Buffer FD.
1da177e4 448 * One Free Buffer BD has PAGE_SIZE data buffer.
eea221ce
AN
449 * Or Non-Packing Mode.
450 * 1 circular FD for Free Buffer List.
451 * RX_BUF_NUM BD in Free Buffer FD.
452 * One Free Buffer BD has ETH_FRAME_LEN data buffer.
1da177e4 453 */
eea221ce
AN
454 void * fd_buf; /* for TxFD, RxFD, FrFD */
455 dma_addr_t fd_buf_dma;
1da177e4 456 struct TxFD *tfd_base;
eea221ce
AN
457 unsigned int tfd_start;
458 unsigned int tfd_end;
1da177e4
LT
459 struct RxFD *rfd_base;
460 struct RxFD *rfd_limit;
461 struct RxFD *rfd_cur;
462 struct FrFD *fbl_ptr;
eea221ce 463#ifdef TC35815_USE_PACKEDBUFFER
1da177e4 464 unsigned char fbl_curid;
eea221ce
AN
465 void * data_buf[RX_BUF_NUM]; /* packing */
466 dma_addr_t data_buf_dma[RX_BUF_NUM];
467 struct {
468 struct sk_buff *skb;
469 dma_addr_t skb_dma;
470 } tx_skbs[TX_FD_NUM];
471#else
472 unsigned int fbl_count;
473 struct {
474 struct sk_buff *skb;
475 dma_addr_t skb_dma;
476 } tx_skbs[TX_FD_NUM], rx_skbs[RX_BUF_NUM];
477#endif
478 struct mii_if_info mii;
479 unsigned short mii_id[2];
480 u32 msg_enable;
481 board_t boardtype;
1da177e4
LT
482};
483
eea221ce
AN
484static inline dma_addr_t fd_virt_to_bus(struct tc35815_local *lp, void *virt)
485{
486 return lp->fd_buf_dma + ((u8 *)virt - (u8 *)lp->fd_buf);
487}
488#ifdef DEBUG
489static inline void *fd_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
490{
491 return (void *)((u8 *)lp->fd_buf + (bus - lp->fd_buf_dma));
492}
493#endif
494#ifdef TC35815_USE_PACKEDBUFFER
495static inline void *rxbuf_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
496{
497 int i;
498 for (i = 0; i < RX_BUF_NUM; i++) {
499 if (bus >= lp->data_buf_dma[i] &&
500 bus < lp->data_buf_dma[i] + PAGE_SIZE)
501 return (void *)((u8 *)lp->data_buf[i] +
502 (bus - lp->data_buf_dma[i]));
503 }
504 return NULL;
505}
506
507#define TC35815_DMA_SYNC_ONDEMAND
508static void* alloc_rxbuf_page(struct pci_dev *hwdev, dma_addr_t *dma_handle)
509{
510#ifdef TC35815_DMA_SYNC_ONDEMAND
511 void *buf;
512 /* pci_map + pci_dma_sync will be more effective than
513 * pci_alloc_consistent on some archs. */
514 if ((buf = (void *)__get_free_page(GFP_ATOMIC)) == NULL)
515 return NULL;
516 *dma_handle = pci_map_single(hwdev, buf, PAGE_SIZE,
517 PCI_DMA_FROMDEVICE);
518 if (pci_dma_mapping_error(*dma_handle)) {
519 free_page((unsigned long)buf);
520 return NULL;
521 }
522 return buf;
523#else
524 return pci_alloc_consistent(hwdev, PAGE_SIZE, dma_handle);
525#endif
526}
527
528static void free_rxbuf_page(struct pci_dev *hwdev, void *buf, dma_addr_t dma_handle)
529{
530#ifdef TC35815_DMA_SYNC_ONDEMAND
531 pci_unmap_single(hwdev, dma_handle, PAGE_SIZE, PCI_DMA_FROMDEVICE);
532 free_page((unsigned long)buf);
533#else
534 pci_free_consistent(hwdev, PAGE_SIZE, buf, dma_handle);
535#endif
536}
537#else /* TC35815_USE_PACKEDBUFFER */
538static struct sk_buff *alloc_rxbuf_skb(struct net_device *dev,
539 struct pci_dev *hwdev,
540 dma_addr_t *dma_handle)
541{
542 struct sk_buff *skb;
543 skb = dev_alloc_skb(RX_BUF_SIZE);
544 if (!skb)
545 return NULL;
eea221ce
AN
546 *dma_handle = pci_map_single(hwdev, skb->data, RX_BUF_SIZE,
547 PCI_DMA_FROMDEVICE);
548 if (pci_dma_mapping_error(*dma_handle)) {
549 dev_kfree_skb_any(skb);
550 return NULL;
551 }
552 skb_reserve(skb, 2); /* make IP header 4byte aligned */
553 return skb;
554}
555
556static void free_rxbuf_skb(struct pci_dev *hwdev, struct sk_buff *skb, dma_addr_t dma_handle)
557{
558 pci_unmap_single(hwdev, dma_handle, RX_BUF_SIZE,
559 PCI_DMA_FROMDEVICE);
560 dev_kfree_skb_any(skb);
561}
562#endif /* TC35815_USE_PACKEDBUFFER */
1da177e4 563
eea221ce 564/* Index to functions, as function prototypes. */
1da177e4
LT
565
566static int tc35815_open(struct net_device *dev);
567static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev);
eea221ce
AN
568static irqreturn_t tc35815_interrupt(int irq, void *dev_id);
569#ifdef TC35815_NAPI
570static int tc35815_rx(struct net_device *dev, int limit);
bea3348e 571static int tc35815_poll(struct napi_struct *napi, int budget);
eea221ce 572#else
1da177e4 573static void tc35815_rx(struct net_device *dev);
eea221ce 574#endif
1da177e4
LT
575static void tc35815_txdone(struct net_device *dev);
576static int tc35815_close(struct net_device *dev);
577static struct net_device_stats *tc35815_get_stats(struct net_device *dev);
578static void tc35815_set_multicast_list(struct net_device *dev);
eea221ce
AN
579static void tc35815_tx_timeout(struct net_device *dev);
580static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
581#ifdef CONFIG_NET_POLL_CONTROLLER
582static void tc35815_poll_controller(struct net_device *dev);
583#endif
584static const struct ethtool_ops tc35815_ethtool_ops;
1da177e4 585
eea221ce 586/* Example routines you must write ;->. */
1da177e4
LT
587static void tc35815_chip_reset(struct net_device *dev);
588static void tc35815_chip_init(struct net_device *dev);
eea221ce 589static void tc35815_find_phy(struct net_device *dev);
1da177e4
LT
590static void tc35815_phy_chip_init(struct net_device *dev);
591
eea221ce
AN
592#ifdef DEBUG
593static void panic_queues(struct net_device *dev);
594#endif
1da177e4 595
eea221ce
AN
596static void tc35815_timer(unsigned long data);
597static void tc35815_start_auto_negotiation(struct net_device *dev,
598 struct ethtool_cmd *ep);
599static int tc_mdio_read(struct net_device *dev, int phy_id, int location);
600static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
601 int val);
1da177e4 602
bd43da8f
AN
603#ifdef CONFIG_CPU_TX49XX
604/*
605 * Find a platform_device providing a MAC address. The platform code
606 * should provide a "tc35815-mac" device with a MAC address in its
607 * platform_data.
608 */
609static int __devinit tc35815_mac_match(struct device *dev, void *data)
610{
611 struct platform_device *plat_dev = to_platform_device(dev);
612 struct pci_dev *pci_dev = data;
06675e6f 613 unsigned int id = pci_dev->irq;
bd43da8f
AN
614 return !strcmp(plat_dev->name, "tc35815-mac") && plat_dev->id == id;
615}
616
617static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
618{
ee79b7fb 619 struct tc35815_local *lp = netdev_priv(dev);
bd43da8f
AN
620 struct device *pd = bus_find_device(&platform_bus_type, NULL,
621 lp->pci_dev, tc35815_mac_match);
622 if (pd) {
623 if (pd->platform_data)
624 memcpy(dev->dev_addr, pd->platform_data, ETH_ALEN);
625 put_device(pd);
626 return is_valid_ether_addr(dev->dev_addr) ? 0 : -ENODEV;
627 }
628 return -ENODEV;
629}
630#else
308a9068 631static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
bd43da8f
AN
632{
633 return -ENODEV;
634}
635#endif
636
637static int __devinit tc35815_init_dev_addr (struct net_device *dev)
eea221ce
AN
638{
639 struct tc35815_regs __iomem *tr =
640 (struct tc35815_regs __iomem *)dev->base_addr;
641 int i;
642
eea221ce
AN
643 while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
644 ;
645 for (i = 0; i < 6; i += 2) {
646 unsigned short data;
647 tc_writel(PROM_Busy | PROM_Read | (i / 2 + 2), &tr->PROM_Ctl);
648 while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
649 ;
650 data = tc_readl(&tr->PROM_Data);
651 dev->dev_addr[i] = data & 0xff;
652 dev->dev_addr[i+1] = data >> 8;
653 }
bd43da8f
AN
654 if (!is_valid_ether_addr(dev->dev_addr))
655 return tc35815_read_plat_dev_addr(dev);
656 return 0;
eea221ce 657}
1da177e4 658
eea221ce
AN
659static int __devinit tc35815_init_one (struct pci_dev *pdev,
660 const struct pci_device_id *ent)
1da177e4 661{
eea221ce
AN
662 void __iomem *ioaddr = NULL;
663 struct net_device *dev;
664 struct tc35815_local *lp;
665 int rc;
958eb80b 666 DECLARE_MAC_BUF(mac);
eea221ce
AN
667
668 static int printed_version;
669 if (!printed_version++) {
670 printk(version);
671 dev_printk(KERN_DEBUG, &pdev->dev,
672 "speed:%d duplex:%d doforce:%d\n",
673 options.speed, options.duplex, options.doforce);
674 }
675
676 if (!pdev->irq) {
677 dev_warn(&pdev->dev, "no IRQ assigned.\n");
678 return -ENODEV;
679 }
1da177e4 680
eea221ce
AN
681 /* dev zeroed in alloc_etherdev */
682 dev = alloc_etherdev (sizeof (*lp));
683 if (dev == NULL) {
684 dev_err(&pdev->dev, "unable to alloc new ethernet\n");
685 return -ENOMEM;
686 }
eea221ce 687 SET_NETDEV_DEV(dev, &pdev->dev);
ee79b7fb 688 lp = netdev_priv(dev);
bea3348e 689 lp->dev = dev;
1da177e4 690
eea221ce 691 /* enable device (incl. PCI PM wakeup), and bus-mastering */
22adf7e5 692 rc = pcim_enable_device(pdev);
eea221ce
AN
693 if (rc)
694 goto err_out;
22adf7e5 695 rc = pcim_iomap_regions(pdev, 1 << 1, MODNAME);
eea221ce 696 if (rc)
1da177e4 697 goto err_out;
22adf7e5
AN
698 pci_set_master(pdev);
699 ioaddr = pcim_iomap_table(pdev)[1];
1da177e4 700
eea221ce
AN
701 /* Initialize the device structure. */
702 dev->open = tc35815_open;
703 dev->hard_start_xmit = tc35815_send_packet;
704 dev->stop = tc35815_close;
705 dev->get_stats = tc35815_get_stats;
706 dev->set_multicast_list = tc35815_set_multicast_list;
707 dev->do_ioctl = tc35815_ioctl;
708 dev->ethtool_ops = &tc35815_ethtool_ops;
709 dev->tx_timeout = tc35815_tx_timeout;
710 dev->watchdog_timeo = TC35815_TX_TIMEOUT;
711#ifdef TC35815_NAPI
bea3348e 712 netif_napi_add(dev, &lp->napi, tc35815_poll, NAPI_WEIGHT);
eea221ce
AN
713#endif
714#ifdef CONFIG_NET_POLL_CONTROLLER
715 dev->poll_controller = tc35815_poll_controller;
716#endif
1da177e4 717
eea221ce
AN
718 dev->irq = pdev->irq;
719 dev->base_addr = (unsigned long) ioaddr;
1da177e4 720
eea221ce
AN
721 spin_lock_init(&lp->lock);
722 lp->pci_dev = pdev;
723 lp->boardtype = ent->driver_data;
1da177e4 724
eea221ce
AN
725 lp->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK;
726 pci_set_drvdata(pdev, dev);
1da177e4 727
eea221ce 728 /* Soft reset the chip. */
1da177e4
LT
729 tc35815_chip_reset(dev);
730
eea221ce 731 /* Retrieve the ethernet address. */
bd43da8f
AN
732 if (tc35815_init_dev_addr(dev)) {
733 dev_warn(&pdev->dev, "not valid ether addr\n");
734 random_ether_addr(dev->dev_addr);
735 }
eea221ce
AN
736
737 rc = register_netdev (dev);
738 if (rc)
22adf7e5 739 goto err_out;
eea221ce
AN
740
741 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
958eb80b 742 printk(KERN_INFO "%s: %s at 0x%lx, %s, IRQ %d\n",
eea221ce
AN
743 dev->name,
744 board_info[ent->driver_data].name,
745 dev->base_addr,
958eb80b 746 print_mac(mac, dev->dev_addr),
eea221ce
AN
747 dev->irq);
748
749 setup_timer(&lp->timer, tc35815_timer, (unsigned long) dev);
750 lp->mii.dev = dev;
751 lp->mii.mdio_read = tc_mdio_read;
752 lp->mii.mdio_write = tc_mdio_write;
753 lp->mii.phy_id_mask = 0x1f;
754 lp->mii.reg_num_mask = 0x1f;
755 tc35815_find_phy(dev);
756 lp->mii.phy_id = lp->phy_addr;
757 lp->mii.full_duplex = 0;
758 lp->mii.force_media = 0;
1da177e4 759
eea221ce 760 return 0;
1da177e4 761
eea221ce
AN
762err_out:
763 free_netdev (dev);
764 return rc;
765}
1da177e4 766
1da177e4 767
eea221ce
AN
768static void __devexit tc35815_remove_one (struct pci_dev *pdev)
769{
770 struct net_device *dev = pci_get_drvdata (pdev);
1da177e4 771
eea221ce 772 unregister_netdev (dev);
eea221ce 773 free_netdev (dev);
1da177e4 774
eea221ce 775 pci_set_drvdata (pdev, NULL);
1da177e4
LT
776}
777
1da177e4
LT
778static int
779tc35815_init_queues(struct net_device *dev)
780{
ee79b7fb 781 struct tc35815_local *lp = netdev_priv(dev);
1da177e4
LT
782 int i;
783 unsigned long fd_addr;
784
785 if (!lp->fd_buf) {
eea221ce
AN
786 BUG_ON(sizeof(struct FDesc) +
787 sizeof(struct BDesc) * RX_BUF_NUM +
788 sizeof(struct FDesc) * RX_FD_NUM +
789 sizeof(struct TxFD) * TX_FD_NUM >
790 PAGE_SIZE * FD_PAGE_NUM);
1da177e4 791
eea221ce 792 if ((lp->fd_buf = pci_alloc_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM, &lp->fd_buf_dma)) == 0)
1da177e4 793 return -ENOMEM;
eea221ce
AN
794 for (i = 0; i < RX_BUF_NUM; i++) {
795#ifdef TC35815_USE_PACKEDBUFFER
796 if ((lp->data_buf[i] = alloc_rxbuf_page(lp->pci_dev, &lp->data_buf_dma[i])) == NULL) {
1da177e4 797 while (--i >= 0) {
eea221ce
AN
798 free_rxbuf_page(lp->pci_dev,
799 lp->data_buf[i],
800 lp->data_buf_dma[i]);
801 lp->data_buf[i] = NULL;
1da177e4 802 }
eea221ce
AN
803 pci_free_consistent(lp->pci_dev,
804 PAGE_SIZE * FD_PAGE_NUM,
805 lp->fd_buf,
806 lp->fd_buf_dma);
807 lp->fd_buf = NULL;
808 return -ENOMEM;
809 }
810#else
811 lp->rx_skbs[i].skb =
812 alloc_rxbuf_skb(dev, lp->pci_dev,
813 &lp->rx_skbs[i].skb_dma);
814 if (!lp->rx_skbs[i].skb) {
815 while (--i >= 0) {
816 free_rxbuf_skb(lp->pci_dev,
817 lp->rx_skbs[i].skb,
818 lp->rx_skbs[i].skb_dma);
819 lp->rx_skbs[i].skb = NULL;
820 }
821 pci_free_consistent(lp->pci_dev,
822 PAGE_SIZE * FD_PAGE_NUM,
823 lp->fd_buf,
824 lp->fd_buf_dma);
825 lp->fd_buf = NULL;
1da177e4
LT
826 return -ENOMEM;
827 }
1da177e4
LT
828#endif
829 }
eea221ce
AN
830 printk(KERN_DEBUG "%s: FD buf %p DataBuf",
831 dev->name, lp->fd_buf);
832#ifdef TC35815_USE_PACKEDBUFFER
833 printk(" DataBuf");
834 for (i = 0; i < RX_BUF_NUM; i++)
835 printk(" %p", lp->data_buf[i]);
1da177e4 836#endif
eea221ce 837 printk("\n");
1da177e4 838 } else {
eea221ce
AN
839 for (i = 0; i < FD_PAGE_NUM; i++) {
840 clear_page((void *)((unsigned long)lp->fd_buf + i * PAGE_SIZE));
841 }
1da177e4 842 }
1da177e4 843 fd_addr = (unsigned long)lp->fd_buf;
1da177e4
LT
844
845 /* Free Descriptors (for Receive) */
846 lp->rfd_base = (struct RxFD *)fd_addr;
847 fd_addr += sizeof(struct RxFD) * RX_FD_NUM;
848 for (i = 0; i < RX_FD_NUM; i++) {
849 lp->rfd_base[i].fd.FDCtl = cpu_to_le32(FD_CownsFD);
850 }
851 lp->rfd_cur = lp->rfd_base;
eea221ce 852 lp->rfd_limit = (struct RxFD *)fd_addr - (RX_FD_RESERVE + 1);
1da177e4
LT
853
854 /* Transmit Descriptors */
855 lp->tfd_base = (struct TxFD *)fd_addr;
856 fd_addr += sizeof(struct TxFD) * TX_FD_NUM;
857 for (i = 0; i < TX_FD_NUM; i++) {
eea221ce
AN
858 lp->tfd_base[i].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[i+1]));
859 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
1da177e4
LT
860 lp->tfd_base[i].fd.FDCtl = cpu_to_le32(0);
861 }
eea221ce 862 lp->tfd_base[TX_FD_NUM-1].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[0]));
1da177e4
LT
863 lp->tfd_start = 0;
864 lp->tfd_end = 0;
865
866 /* Buffer List (for Receive) */
867 lp->fbl_ptr = (struct FrFD *)fd_addr;
eea221ce
AN
868 lp->fbl_ptr->fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, lp->fbl_ptr));
869 lp->fbl_ptr->fd.FDCtl = cpu_to_le32(RX_BUF_NUM | FD_CownsFD);
870#ifndef TC35815_USE_PACKEDBUFFER
871 /*
872 * move all allocated skbs to head of rx_skbs[] array.
873 * fbl_count mighe not be RX_BUF_NUM if alloc_rxbuf_skb() in
874 * tc35815_rx() had failed.
875 */
876 lp->fbl_count = 0;
877 for (i = 0; i < RX_BUF_NUM; i++) {
878 if (lp->rx_skbs[i].skb) {
879 if (i != lp->fbl_count) {
880 lp->rx_skbs[lp->fbl_count].skb =
881 lp->rx_skbs[i].skb;
882 lp->rx_skbs[lp->fbl_count].skb_dma =
883 lp->rx_skbs[i].skb_dma;
884 }
885 lp->fbl_count++;
886 }
887 }
888#endif
889 for (i = 0; i < RX_BUF_NUM; i++) {
890#ifdef TC35815_USE_PACKEDBUFFER
891 lp->fbl_ptr->bd[i].BuffData = cpu_to_le32(lp->data_buf_dma[i]);
892#else
893 if (i >= lp->fbl_count) {
894 lp->fbl_ptr->bd[i].BuffData = 0;
895 lp->fbl_ptr->bd[i].BDCtl = 0;
896 continue;
897 }
898 lp->fbl_ptr->bd[i].BuffData =
899 cpu_to_le32(lp->rx_skbs[i].skb_dma);
900#endif
1da177e4
LT
901 /* BDID is index of FrFD.bd[] */
902 lp->fbl_ptr->bd[i].BDCtl =
eea221ce
AN
903 cpu_to_le32(BD_CownsBD | (i << BD_RxBDID_SHIFT) |
904 RX_BUF_SIZE);
1da177e4 905 }
eea221ce 906#ifdef TC35815_USE_PACKEDBUFFER
1da177e4 907 lp->fbl_curid = 0;
eea221ce 908#endif
1da177e4 909
eea221ce
AN
910 printk(KERN_DEBUG "%s: TxFD %p RxFD %p FrFD %p\n",
911 dev->name, lp->tfd_base, lp->rfd_base, lp->fbl_ptr);
1da177e4
LT
912 return 0;
913}
914
915static void
916tc35815_clear_queues(struct net_device *dev)
917{
ee79b7fb 918 struct tc35815_local *lp = netdev_priv(dev);
1da177e4
LT
919 int i;
920
921 for (i = 0; i < TX_FD_NUM; i++) {
eea221ce
AN
922 u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
923 struct sk_buff *skb =
924 fdsystem != 0xffffffff ?
925 lp->tx_skbs[fdsystem].skb : NULL;
926#ifdef DEBUG
927 if (lp->tx_skbs[i].skb != skb) {
928 printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
929 panic_queues(dev);
930 }
931#else
932 BUG_ON(lp->tx_skbs[i].skb != skb);
933#endif
934 if (skb) {
935 pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
936 lp->tx_skbs[i].skb = NULL;
937 lp->tx_skbs[i].skb_dma = 0;
1da177e4 938 dev_kfree_skb_any(skb);
eea221ce
AN
939 }
940 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
1da177e4
LT
941 }
942
943 tc35815_init_queues(dev);
944}
945
946static void
947tc35815_free_queues(struct net_device *dev)
948{
ee79b7fb 949 struct tc35815_local *lp = netdev_priv(dev);
1da177e4
LT
950 int i;
951
952 if (lp->tfd_base) {
953 for (i = 0; i < TX_FD_NUM; i++) {
eea221ce
AN
954 u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
955 struct sk_buff *skb =
956 fdsystem != 0xffffffff ?
957 lp->tx_skbs[fdsystem].skb : NULL;
958#ifdef DEBUG
959 if (lp->tx_skbs[i].skb != skb) {
960 printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
961 panic_queues(dev);
962 }
963#else
964 BUG_ON(lp->tx_skbs[i].skb != skb);
965#endif
966 if (skb) {
967 dev_kfree_skb(skb);
968 pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
969 lp->tx_skbs[i].skb = NULL;
970 lp->tx_skbs[i].skb_dma = 0;
971 }
972 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
1da177e4
LT
973 }
974 }
975
1da177e4
LT
976 lp->rfd_base = NULL;
977 lp->rfd_limit = NULL;
978 lp->rfd_cur = NULL;
979 lp->fbl_ptr = NULL;
980
eea221ce
AN
981 for (i = 0; i < RX_BUF_NUM; i++) {
982#ifdef TC35815_USE_PACKEDBUFFER
983 if (lp->data_buf[i]) {
984 free_rxbuf_page(lp->pci_dev,
985 lp->data_buf[i], lp->data_buf_dma[i]);
986 lp->data_buf[i] = NULL;
987 }
988#else
989 if (lp->rx_skbs[i].skb) {
990 free_rxbuf_skb(lp->pci_dev, lp->rx_skbs[i].skb,
991 lp->rx_skbs[i].skb_dma);
992 lp->rx_skbs[i].skb = NULL;
993 }
994#endif
995 }
996 if (lp->fd_buf) {
997 pci_free_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM,
998 lp->fd_buf, lp->fd_buf_dma);
999 lp->fd_buf = NULL;
1da177e4 1000 }
1da177e4
LT
1001}
1002
1003static void
1004dump_txfd(struct TxFD *fd)
1005{
1006 printk("TxFD(%p): %08x %08x %08x %08x\n", fd,
1007 le32_to_cpu(fd->fd.FDNext),
1008 le32_to_cpu(fd->fd.FDSystem),
1009 le32_to_cpu(fd->fd.FDStat),
1010 le32_to_cpu(fd->fd.FDCtl));
1011 printk("BD: ");
1012 printk(" %08x %08x",
1013 le32_to_cpu(fd->bd.BuffData),
1014 le32_to_cpu(fd->bd.BDCtl));
1015 printk("\n");
1016}
1017
1018static int
1019dump_rxfd(struct RxFD *fd)
1020{
1021 int i, bd_count = (le32_to_cpu(fd->fd.FDCtl) & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
1022 if (bd_count > 8)
1023 bd_count = 8;
1024 printk("RxFD(%p): %08x %08x %08x %08x\n", fd,
1025 le32_to_cpu(fd->fd.FDNext),
1026 le32_to_cpu(fd->fd.FDSystem),
1027 le32_to_cpu(fd->fd.FDStat),
1028 le32_to_cpu(fd->fd.FDCtl));
1029 if (le32_to_cpu(fd->fd.FDCtl) & FD_CownsFD)
1030 return 0;
1031 printk("BD: ");
1032 for (i = 0; i < bd_count; i++)
1033 printk(" %08x %08x",
1034 le32_to_cpu(fd->bd[i].BuffData),
1035 le32_to_cpu(fd->bd[i].BDCtl));
1036 printk("\n");
1037 return bd_count;
1038}
1039
eea221ce 1040#if defined(DEBUG) || defined(TC35815_USE_PACKEDBUFFER)
1da177e4
LT
1041static void
1042dump_frfd(struct FrFD *fd)
1043{
1044 int i;
1045 printk("FrFD(%p): %08x %08x %08x %08x\n", fd,
1046 le32_to_cpu(fd->fd.FDNext),
1047 le32_to_cpu(fd->fd.FDSystem),
1048 le32_to_cpu(fd->fd.FDStat),
1049 le32_to_cpu(fd->fd.FDCtl));
1050 printk("BD: ");
eea221ce 1051 for (i = 0; i < RX_BUF_NUM; i++)
1da177e4
LT
1052 printk(" %08x %08x",
1053 le32_to_cpu(fd->bd[i].BuffData),
1054 le32_to_cpu(fd->bd[i].BDCtl));
1055 printk("\n");
1056}
eea221ce 1057#endif
1da177e4 1058
eea221ce 1059#ifdef DEBUG
1da177e4
LT
1060static void
1061panic_queues(struct net_device *dev)
1062{
ee79b7fb 1063 struct tc35815_local *lp = netdev_priv(dev);
1da177e4
LT
1064 int i;
1065
eea221ce 1066 printk("TxFD base %p, start %u, end %u\n",
1da177e4
LT
1067 lp->tfd_base, lp->tfd_start, lp->tfd_end);
1068 printk("RxFD base %p limit %p cur %p\n",
1069 lp->rfd_base, lp->rfd_limit, lp->rfd_cur);
1070 printk("FrFD %p\n", lp->fbl_ptr);
1071 for (i = 0; i < TX_FD_NUM; i++)
1072 dump_txfd(&lp->tfd_base[i]);
1073 for (i = 0; i < RX_FD_NUM; i++) {
1074 int bd_count = dump_rxfd(&lp->rfd_base[i]);
1075 i += (bd_count + 1) / 2; /* skip BDs */
1076 }
1077 dump_frfd(lp->fbl_ptr);
1078 panic("%s: Illegal queue state.", dev->name);
1079}
1da177e4
LT
1080#endif
1081
958eb80b 1082static void print_eth(const u8 *add)
1da177e4 1083{
958eb80b 1084 DECLARE_MAC_BUF(mac);
1da177e4 1085
958eb80b
AN
1086 printk(KERN_DEBUG "print_eth(%p)\n", add);
1087 printk(KERN_DEBUG " %s =>", print_mac(mac, add + 6));
1088 printk(KERN_CONT " %s : %02x%02x\n",
1089 print_mac(mac, add), add[12], add[13]);
1da177e4
LT
1090}
1091
eea221ce
AN
1092static int tc35815_tx_full(struct net_device *dev)
1093{
ee79b7fb 1094 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
1095 return ((lp->tfd_start + 1) % TX_FD_NUM == lp->tfd_end);
1096}
1097
1098static void tc35815_restart(struct net_device *dev)
1099{
ee79b7fb 1100 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
1101 int pid = lp->phy_addr;
1102 int do_phy_reset = 1;
1103 del_timer(&lp->timer); /* Kill if running */
1104
1105 if (lp->mii_id[0] == 0x0016 && (lp->mii_id[1] & 0xfc00) == 0xf800) {
1106 /* Resetting PHY cause problem on some chip... (SEEQ 80221) */
1107 do_phy_reset = 0;
1108 }
1109 if (do_phy_reset) {
1110 int timeout;
1111 tc_mdio_write(dev, pid, MII_BMCR, BMCR_RESET);
1112 timeout = 100;
1113 while (--timeout) {
1114 if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_RESET))
1115 break;
1116 udelay(1);
1117 }
1118 if (!timeout)
1119 printk(KERN_ERR "%s: BMCR reset failed.\n", dev->name);
1120 }
1121
1122 tc35815_chip_reset(dev);
1123 tc35815_clear_queues(dev);
1124 tc35815_chip_init(dev);
1125 /* Reconfigure CAM again since tc35815_chip_init() initialize it. */
1126 tc35815_set_multicast_list(dev);
1127}
1128
1129static void tc35815_tx_timeout(struct net_device *dev)
1130{
ee79b7fb 1131 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
1132 struct tc35815_regs __iomem *tr =
1133 (struct tc35815_regs __iomem *)dev->base_addr;
1134
1135 printk(KERN_WARNING "%s: transmit timed out, status %#x\n",
1136 dev->name, tc_readl(&tr->Tx_Stat));
1137
1138 /* Try to restart the adaptor. */
1139 spin_lock_irq(&lp->lock);
1140 tc35815_restart(dev);
1141 spin_unlock_irq(&lp->lock);
1142
c201abd9 1143 dev->stats.tx_errors++;
eea221ce
AN
1144
1145 /* If we have space available to accept new transmit
1146 * requests, wake up the queueing layer. This would
1147 * be the case if the chipset_init() call above just
1148 * flushes out the tx queue and empties it.
1149 *
1150 * If instead, the tx queue is retained then the
1151 * netif_wake_queue() call should be placed in the
1152 * TX completion interrupt handler of the driver instead
1153 * of here.
1154 */
1155 if (!tc35815_tx_full(dev))
1156 netif_wake_queue(dev);
1157}
1158
1da177e4
LT
1159/*
1160 * Open/initialize the board. This is called (in the current kernel)
1161 * sometime after booting when the 'ifconfig' program is run.
1162 *
1163 * This routine should set everything up anew at each open, even
1164 * registers that "should" only need to be set once at boot, so that
1165 * there is non-reboot way to recover if something goes wrong.
1166 */
1167static int
1168tc35815_open(struct net_device *dev)
1169{
ee79b7fb 1170 struct tc35815_local *lp = netdev_priv(dev);
eea221ce 1171
1da177e4
LT
1172 /*
1173 * This is used if the interrupt line can turned off (shared).
1174 * See 3c503.c for an example of selecting the IRQ at config-time.
1175 */
eea221ce 1176 if (request_irq(dev->irq, &tc35815_interrupt, IRQF_SHARED, dev->name, dev)) {
1da177e4
LT
1177 return -EAGAIN;
1178 }
1179
eea221ce 1180 del_timer(&lp->timer); /* Kill if running */
1da177e4
LT
1181 tc35815_chip_reset(dev);
1182
1183 if (tc35815_init_queues(dev) != 0) {
1184 free_irq(dev->irq, dev);
1185 return -EAGAIN;
1186 }
1187
bea3348e
SH
1188#ifdef TC35815_NAPI
1189 napi_enable(&lp->napi);
1190#endif
1191
1da177e4 1192 /* Reset the hardware here. Don't forget to set the station address. */
eea221ce 1193 spin_lock_irq(&lp->lock);
1da177e4 1194 tc35815_chip_init(dev);
eea221ce 1195 spin_unlock_irq(&lp->lock);
1da177e4 1196
eea221ce
AN
1197 /* We are now ready to accept transmit requeusts from
1198 * the queueing layer of the networking.
1199 */
1da177e4
LT
1200 netif_start_queue(dev);
1201
1202 return 0;
1203}
1204
eea221ce
AN
1205/* This will only be invoked if your driver is _not_ in XOFF state.
1206 * What this means is that you need not check it, and that this
1207 * invariant will hold if you make sure that the netif_*_queue()
1208 * calls are done at the proper times.
1209 */
1210static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev)
1da177e4 1211{
ee79b7fb 1212 struct tc35815_local *lp = netdev_priv(dev);
eea221ce 1213 struct TxFD *txfd;
1da177e4
LT
1214 unsigned long flags;
1215
eea221ce
AN
1216 /* If some error occurs while trying to transmit this
1217 * packet, you should return '1' from this function.
1218 * In such a case you _may not_ do anything to the
1219 * SKB, it is still owned by the network queueing
1220 * layer when an error is returned. This means you
1221 * may not modify any SKB fields, you may not free
1222 * the SKB, etc.
1223 */
1224
1225 /* This is the most common case for modern hardware.
1226 * The spinlock protects this code from the TX complete
1227 * hardware interrupt handler. Queue flow control is
1228 * thus managed under this lock as well.
1229 */
1da177e4 1230 spin_lock_irqsave(&lp->lock, flags);
1da177e4 1231
eea221ce
AN
1232 /* failsafe... (handle txdone now if half of FDs are used) */
1233 if ((lp->tfd_start + TX_FD_NUM - lp->tfd_end) % TX_FD_NUM >
1234 TX_FD_NUM / 2)
1235 tc35815_txdone(dev);
1236
1237 if (netif_msg_pktdata(lp))
1238 print_eth(skb->data);
1239#ifdef DEBUG
1240 if (lp->tx_skbs[lp->tfd_start].skb) {
1241 printk("%s: tx_skbs conflict.\n", dev->name);
1242 panic_queues(dev);
1da177e4 1243 }
eea221ce
AN
1244#else
1245 BUG_ON(lp->tx_skbs[lp->tfd_start].skb);
1da177e4 1246#endif
eea221ce
AN
1247 lp->tx_skbs[lp->tfd_start].skb = skb;
1248 lp->tx_skbs[lp->tfd_start].skb_dma = pci_map_single(lp->pci_dev, skb->data, skb->len, PCI_DMA_TODEVICE);
1249
1250 /*add to ring */
1251 txfd = &lp->tfd_base[lp->tfd_start];
1252 txfd->bd.BuffData = cpu_to_le32(lp->tx_skbs[lp->tfd_start].skb_dma);
1253 txfd->bd.BDCtl = cpu_to_le32(skb->len);
1254 txfd->fd.FDSystem = cpu_to_le32(lp->tfd_start);
1255 txfd->fd.FDCtl = cpu_to_le32(FD_CownsFD | (1 << FD_BDCnt_SHIFT));
1256
1257 if (lp->tfd_start == lp->tfd_end) {
1258 struct tc35815_regs __iomem *tr =
1259 (struct tc35815_regs __iomem *)dev->base_addr;
1260 /* Start DMA Transmitter. */
1261 txfd->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
1da177e4 1262#ifdef GATHER_TXINT
eea221ce 1263 txfd->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
1da177e4 1264#endif
eea221ce
AN
1265 if (netif_msg_tx_queued(lp)) {
1266 printk("%s: starting TxFD.\n", dev->name);
1267 dump_txfd(txfd);
1268 }
1269 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
1270 } else {
1271 txfd->fd.FDNext &= cpu_to_le32(~FD_Next_EOL);
1272 if (netif_msg_tx_queued(lp)) {
1273 printk("%s: queueing TxFD.\n", dev->name);
1274 dump_txfd(txfd);
1da177e4 1275 }
eea221ce
AN
1276 }
1277 lp->tfd_start = (lp->tfd_start + 1) % TX_FD_NUM;
1da177e4 1278
eea221ce 1279 dev->trans_start = jiffies;
1da177e4 1280
eea221ce
AN
1281 /* If we just used up the very last entry in the
1282 * TX ring on this device, tell the queueing
1283 * layer to send no more.
1284 */
1285 if (tc35815_tx_full(dev)) {
1286 if (netif_msg_tx_queued(lp))
1287 printk(KERN_WARNING "%s: TxFD Exhausted.\n", dev->name);
1288 netif_stop_queue(dev);
1da177e4
LT
1289 }
1290
eea221ce
AN
1291 /* When the TX completion hw interrupt arrives, this
1292 * is when the transmit statistics are updated.
1293 */
1294
1295 spin_unlock_irqrestore(&lp->lock, flags);
1da177e4
LT
1296 return 0;
1297}
1298
1299#define FATAL_ERROR_INT \
1300 (Int_IntPCI | Int_DmParErr | Int_IntNRAbt)
eea221ce 1301static void tc35815_fatal_error_interrupt(struct net_device *dev, u32 status)
1da177e4
LT
1302{
1303 static int count;
1304 printk(KERN_WARNING "%s: Fatal Error Intterrupt (%#x):",
1305 dev->name, status);
1da177e4
LT
1306 if (status & Int_IntPCI)
1307 printk(" IntPCI");
1308 if (status & Int_DmParErr)
1309 printk(" DmParErr");
1310 if (status & Int_IntNRAbt)
1311 printk(" IntNRAbt");
1312 printk("\n");
1313 if (count++ > 100)
1314 panic("%s: Too many fatal errors.", dev->name);
eea221ce 1315 printk(KERN_WARNING "%s: Resetting ...\n", dev->name);
1da177e4 1316 /* Try to restart the adaptor. */
eea221ce
AN
1317 tc35815_restart(dev);
1318}
1319
1320#ifdef TC35815_NAPI
1321static int tc35815_do_interrupt(struct net_device *dev, u32 status, int limit)
1322#else
1323static int tc35815_do_interrupt(struct net_device *dev, u32 status)
1324#endif
1325{
ee79b7fb 1326 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
1327 struct tc35815_regs __iomem *tr =
1328 (struct tc35815_regs __iomem *)dev->base_addr;
1329 int ret = -1;
1330
1331 /* Fatal errors... */
1332 if (status & FATAL_ERROR_INT) {
1333 tc35815_fatal_error_interrupt(dev, status);
1334 return 0;
1335 }
1336 /* recoverable errors */
1337 if (status & Int_IntFDAEx) {
1338 /* disable FDAEx int. (until we make rooms...) */
1339 tc_writel(tc_readl(&tr->Int_En) & ~Int_FDAExEn, &tr->Int_En);
1340 printk(KERN_WARNING
1341 "%s: Free Descriptor Area Exhausted (%#x).\n",
1342 dev->name, status);
c201abd9 1343 dev->stats.rx_dropped++;
eea221ce
AN
1344 ret = 0;
1345 }
1346 if (status & Int_IntBLEx) {
1347 /* disable BLEx int. (until we make rooms...) */
1348 tc_writel(tc_readl(&tr->Int_En) & ~Int_BLExEn, &tr->Int_En);
1349 printk(KERN_WARNING
1350 "%s: Buffer List Exhausted (%#x).\n",
1351 dev->name, status);
c201abd9 1352 dev->stats.rx_dropped++;
eea221ce
AN
1353 ret = 0;
1354 }
1355 if (status & Int_IntExBD) {
1356 printk(KERN_WARNING
1357 "%s: Excessive Buffer Descriptiors (%#x).\n",
1358 dev->name, status);
c201abd9 1359 dev->stats.rx_length_errors++;
eea221ce
AN
1360 ret = 0;
1361 }
1362
1363 /* normal notification */
1364 if (status & Int_IntMacRx) {
1365 /* Got a packet(s). */
1366#ifdef TC35815_NAPI
1367 ret = tc35815_rx(dev, limit);
1368#else
1369 tc35815_rx(dev);
1370 ret = 0;
1371#endif
1372 lp->lstats.rx_ints++;
1373 }
1374 if (status & Int_IntMacTx) {
1375 /* Transmit complete. */
1376 lp->lstats.tx_ints++;
1377 tc35815_txdone(dev);
1378 netif_wake_queue(dev);
1379 ret = 0;
1380 }
1381 return ret;
1da177e4
LT
1382}
1383
1384/*
1385 * The typical workload of the driver:
eea221ce 1386 * Handle the network interface interrupts.
1da177e4 1387 */
7d12e780 1388static irqreturn_t tc35815_interrupt(int irq, void *dev_id)
1da177e4
LT
1389{
1390 struct net_device *dev = dev_id;
bea3348e 1391 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
1392 struct tc35815_regs __iomem *tr =
1393 (struct tc35815_regs __iomem *)dev->base_addr;
1394#ifdef TC35815_NAPI
1395 u32 dmactl = tc_readl(&tr->DMA_Ctl);
1396
1397 if (!(dmactl & DMA_IntMask)) {
1398 /* disable interrupts */
1399 tc_writel(dmactl | DMA_IntMask, &tr->DMA_Ctl);
bea3348e
SH
1400 if (netif_rx_schedule_prep(dev, &lp->napi))
1401 __netif_rx_schedule(dev, &lp->napi);
eea221ce
AN
1402 else {
1403 printk(KERN_ERR "%s: interrupt taken in poll\n",
1404 dev->name);
1405 BUG();
1da177e4 1406 }
eea221ce
AN
1407 (void)tc_readl(&tr->Int_Src); /* flush */
1408 return IRQ_HANDLED;
1409 }
1410 return IRQ_NONE;
1411#else
eea221ce
AN
1412 int handled;
1413 u32 status;
1414
1415 spin_lock(&lp->lock);
1416 status = tc_readl(&tr->Int_Src);
1417 tc_writel(status, &tr->Int_Src); /* write to clear */
1418 handled = tc35815_do_interrupt(dev, status);
1419 (void)tc_readl(&tr->Int_Src); /* flush */
1420 spin_unlock(&lp->lock);
1421 return IRQ_RETVAL(handled >= 0);
1422#endif /* TC35815_NAPI */
1423}
1da177e4 1424
eea221ce
AN
1425#ifdef CONFIG_NET_POLL_CONTROLLER
1426static void tc35815_poll_controller(struct net_device *dev)
1427{
1428 disable_irq(dev->irq);
1429 tc35815_interrupt(dev->irq, dev);
1430 enable_irq(dev->irq);
1da177e4 1431}
eea221ce 1432#endif
1da177e4
LT
1433
1434/* We have a good packet(s), get it/them out of the buffers. */
eea221ce
AN
1435#ifdef TC35815_NAPI
1436static int
1437tc35815_rx(struct net_device *dev, int limit)
1438#else
1da177e4
LT
1439static void
1440tc35815_rx(struct net_device *dev)
eea221ce 1441#endif
1da177e4 1442{
ee79b7fb 1443 struct tc35815_local *lp = netdev_priv(dev);
1da177e4
LT
1444 unsigned int fdctl;
1445 int i;
1446 int buf_free_count = 0;
1447 int fd_free_count = 0;
eea221ce
AN
1448#ifdef TC35815_NAPI
1449 int received = 0;
1450#endif
1da177e4
LT
1451
1452 while (!((fdctl = le32_to_cpu(lp->rfd_cur->fd.FDCtl)) & FD_CownsFD)) {
1453 int status = le32_to_cpu(lp->rfd_cur->fd.FDStat);
1454 int pkt_len = fdctl & FD_FDLength_MASK;
1da177e4 1455 int bd_count = (fdctl & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
eea221ce
AN
1456#ifdef DEBUG
1457 struct RxFD *next_rfd;
1458#endif
1459#if (RX_CTL_CMD & Rx_StripCRC) == 0
1460 pkt_len -= 4;
1461#endif
1da177e4 1462
eea221ce 1463 if (netif_msg_rx_status(lp))
1da177e4
LT
1464 dump_rxfd(lp->rfd_cur);
1465 if (status & Rx_Good) {
1da177e4
LT
1466 struct sk_buff *skb;
1467 unsigned char *data;
eea221ce
AN
1468 int cur_bd;
1469#ifdef TC35815_USE_PACKEDBUFFER
1470 int offset;
1471#endif
6aa20a22 1472
eea221ce
AN
1473#ifdef TC35815_NAPI
1474 if (--limit < 0)
1475 break;
1476#endif
1477#ifdef TC35815_USE_PACKEDBUFFER
1478 BUG_ON(bd_count > 2);
1da177e4
LT
1479 skb = dev_alloc_skb(pkt_len + 2); /* +2: for reserve */
1480 if (skb == NULL) {
1481 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n",
1482 dev->name);
c201abd9 1483 dev->stats.rx_dropped++;
1da177e4
LT
1484 break;
1485 }
1486 skb_reserve(skb, 2); /* 16 bit alignment */
1da177e4
LT
1487
1488 data = skb_put(skb, pkt_len);
1489
1490 /* copy from receive buffer */
1491 cur_bd = 0;
1492 offset = 0;
1493 while (offset < pkt_len && cur_bd < bd_count) {
1494 int len = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BDCtl) &
1495 BD_BuffLength_MASK;
eea221ce
AN
1496 dma_addr_t dma = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BuffData);
1497 void *rxbuf = rxbuf_bus_to_virt(lp, dma);
1498 if (offset + len > pkt_len)
1499 len = pkt_len - offset;
1500#ifdef TC35815_DMA_SYNC_ONDEMAND
1501 pci_dma_sync_single_for_cpu(lp->pci_dev,
1502 dma, len,
1503 PCI_DMA_FROMDEVICE);
1da177e4
LT
1504#endif
1505 memcpy(data + offset, rxbuf, len);
793bc0af
AN
1506#ifdef TC35815_DMA_SYNC_ONDEMAND
1507 pci_dma_sync_single_for_device(lp->pci_dev,
1508 dma, len,
1509 PCI_DMA_FROMDEVICE);
1510#endif
1da177e4
LT
1511 offset += len;
1512 cur_bd++;
1513 }
eea221ce
AN
1514#else /* TC35815_USE_PACKEDBUFFER */
1515 BUG_ON(bd_count > 1);
1516 cur_bd = (le32_to_cpu(lp->rfd_cur->bd[0].BDCtl)
1517 & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
1518#ifdef DEBUG
1519 if (cur_bd >= RX_BUF_NUM) {
1520 printk("%s: invalid BDID.\n", dev->name);
1521 panic_queues(dev);
1522 }
1523 BUG_ON(lp->rx_skbs[cur_bd].skb_dma !=
1524 (le32_to_cpu(lp->rfd_cur->bd[0].BuffData) & ~3));
1525 if (!lp->rx_skbs[cur_bd].skb) {
1526 printk("%s: NULL skb.\n", dev->name);
1527 panic_queues(dev);
1528 }
1529#else
1530 BUG_ON(cur_bd >= RX_BUF_NUM);
1da177e4 1531#endif
eea221ce
AN
1532 skb = lp->rx_skbs[cur_bd].skb;
1533 prefetch(skb->data);
1534 lp->rx_skbs[cur_bd].skb = NULL;
1535 lp->fbl_count--;
1536 pci_unmap_single(lp->pci_dev,
1537 lp->rx_skbs[cur_bd].skb_dma,
1538 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1539 if (!HAVE_DMA_RXALIGN(lp))
1540 memmove(skb->data, skb->data - 2, pkt_len);
1541 data = skb_put(skb, pkt_len);
1542#endif /* TC35815_USE_PACKEDBUFFER */
1543 if (netif_msg_pktdata(lp))
1da177e4
LT
1544 print_eth(data);
1545 skb->protocol = eth_type_trans(skb, dev);
eea221ce
AN
1546#ifdef TC35815_NAPI
1547 netif_receive_skb(skb);
1548 received++;
1549#else
1da177e4 1550 netif_rx(skb);
eea221ce
AN
1551#endif
1552 dev->last_rx = jiffies;
c201abd9
AN
1553 dev->stats.rx_packets++;
1554 dev->stats.rx_bytes += pkt_len;
1da177e4 1555 } else {
c201abd9 1556 dev->stats.rx_errors++;
eea221ce
AN
1557 printk(KERN_DEBUG "%s: Rx error (status %x)\n",
1558 dev->name, status & Rx_Stat_Mask);
1da177e4
LT
1559 /* WORKAROUND: LongErr and CRCErr means Overflow. */
1560 if ((status & Rx_LongErr) && (status & Rx_CRCErr)) {
1561 status &= ~(Rx_LongErr|Rx_CRCErr);
1562 status |= Rx_Over;
1563 }
c201abd9
AN
1564 if (status & Rx_LongErr)
1565 dev->stats.rx_length_errors++;
1566 if (status & Rx_Over)
1567 dev->stats.rx_fifo_errors++;
1568 if (status & Rx_CRCErr)
1569 dev->stats.rx_crc_errors++;
1570 if (status & Rx_Align)
1571 dev->stats.rx_frame_errors++;
1da177e4
LT
1572 }
1573
1574 if (bd_count > 0) {
1575 /* put Free Buffer back to controller */
1576 int bdctl = le32_to_cpu(lp->rfd_cur->bd[bd_count - 1].BDCtl);
1577 unsigned char id =
1578 (bdctl & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
eea221ce
AN
1579#ifdef DEBUG
1580 if (id >= RX_BUF_NUM) {
1da177e4
LT
1581 printk("%s: invalid BDID.\n", dev->name);
1582 panic_queues(dev);
1583 }
eea221ce
AN
1584#else
1585 BUG_ON(id >= RX_BUF_NUM);
1586#endif
1da177e4 1587 /* free old buffers */
eea221ce
AN
1588#ifdef TC35815_USE_PACKEDBUFFER
1589 while (lp->fbl_curid != id)
1590#else
1591 while (lp->fbl_count < RX_BUF_NUM)
1592#endif
1593 {
1594#ifdef TC35815_USE_PACKEDBUFFER
1595 unsigned char curid = lp->fbl_curid;
1596#else
1597 unsigned char curid =
1598 (id + 1 + lp->fbl_count) % RX_BUF_NUM;
1599#endif
1600 struct BDesc *bd = &lp->fbl_ptr->bd[curid];
1601#ifdef DEBUG
1602 bdctl = le32_to_cpu(bd->BDCtl);
1da177e4
LT
1603 if (bdctl & BD_CownsBD) {
1604 printk("%s: Freeing invalid BD.\n",
1605 dev->name);
1606 panic_queues(dev);
1607 }
eea221ce 1608#endif
3a4fa0a2 1609 /* pass BD to controller */
eea221ce
AN
1610#ifndef TC35815_USE_PACKEDBUFFER
1611 if (!lp->rx_skbs[curid].skb) {
1612 lp->rx_skbs[curid].skb =
1613 alloc_rxbuf_skb(dev,
1614 lp->pci_dev,
1615 &lp->rx_skbs[curid].skb_dma);
1616 if (!lp->rx_skbs[curid].skb)
1617 break; /* try on next reception */
1618 bd->BuffData = cpu_to_le32(lp->rx_skbs[curid].skb_dma);
1619 }
1620#endif /* TC35815_USE_PACKEDBUFFER */
1da177e4 1621 /* Note: BDLength was modified by chip. */
eea221ce
AN
1622 bd->BDCtl = cpu_to_le32(BD_CownsBD |
1623 (curid << BD_RxBDID_SHIFT) |
1624 RX_BUF_SIZE);
1625#ifdef TC35815_USE_PACKEDBUFFER
1626 lp->fbl_curid = (curid + 1) % RX_BUF_NUM;
1627 if (netif_msg_rx_status(lp)) {
1da177e4
LT
1628 printk("%s: Entering new FBD %d\n",
1629 dev->name, lp->fbl_curid);
1630 dump_frfd(lp->fbl_ptr);
1631 }
eea221ce
AN
1632#else
1633 lp->fbl_count++;
1634#endif
1da177e4
LT
1635 buf_free_count++;
1636 }
1637 }
1638
1639 /* put RxFD back to controller */
eea221ce
AN
1640#ifdef DEBUG
1641 next_rfd = fd_bus_to_virt(lp,
1642 le32_to_cpu(lp->rfd_cur->fd.FDNext));
1da177e4
LT
1643 if (next_rfd < lp->rfd_base || next_rfd > lp->rfd_limit) {
1644 printk("%s: RxFD FDNext invalid.\n", dev->name);
1645 panic_queues(dev);
1646 }
eea221ce 1647#endif
1da177e4 1648 for (i = 0; i < (bd_count + 1) / 2 + 1; i++) {
3a4fa0a2 1649 /* pass FD to controller */
eea221ce
AN
1650#ifdef DEBUG
1651 lp->rfd_cur->fd.FDNext = cpu_to_le32(0xdeaddead);
1652#else
1653 lp->rfd_cur->fd.FDNext = cpu_to_le32(FD_Next_EOL);
1654#endif
1da177e4
LT
1655 lp->rfd_cur->fd.FDCtl = cpu_to_le32(FD_CownsFD);
1656 lp->rfd_cur++;
1657 fd_free_count++;
1658 }
eea221ce
AN
1659 if (lp->rfd_cur > lp->rfd_limit)
1660 lp->rfd_cur = lp->rfd_base;
1661#ifdef DEBUG
1662 if (lp->rfd_cur != next_rfd)
1663 printk("rfd_cur = %p, next_rfd %p\n",
1664 lp->rfd_cur, next_rfd);
1665#endif
1da177e4
LT
1666 }
1667
1668 /* re-enable BL/FDA Exhaust interrupts. */
1669 if (fd_free_count) {
eea221ce
AN
1670 struct tc35815_regs __iomem *tr =
1671 (struct tc35815_regs __iomem *)dev->base_addr;
1672 u32 en, en_old = tc_readl(&tr->Int_En);
1673 en = en_old | Int_FDAExEn;
1da177e4 1674 if (buf_free_count)
eea221ce
AN
1675 en |= Int_BLExEn;
1676 if (en != en_old)
1677 tc_writel(en, &tr->Int_En);
1da177e4 1678 }
eea221ce
AN
1679#ifdef TC35815_NAPI
1680 return received;
1681#endif
1da177e4
LT
1682}
1683
eea221ce 1684#ifdef TC35815_NAPI
bea3348e 1685static int tc35815_poll(struct napi_struct *napi, int budget)
eea221ce 1686{
bea3348e
SH
1687 struct tc35815_local *lp = container_of(napi, struct tc35815_local, napi);
1688 struct net_device *dev = lp->dev;
eea221ce
AN
1689 struct tc35815_regs __iomem *tr =
1690 (struct tc35815_regs __iomem *)dev->base_addr;
eea221ce
AN
1691 int received = 0, handled;
1692 u32 status;
1693
1694 spin_lock(&lp->lock);
1695 status = tc_readl(&tr->Int_Src);
1696 do {
1697 tc_writel(status, &tr->Int_Src); /* write to clear */
1698
1699 handled = tc35815_do_interrupt(dev, status, limit);
1700 if (handled >= 0) {
1701 received += handled;
bea3348e 1702 if (received >= budget)
eea221ce
AN
1703 break;
1704 }
1705 status = tc_readl(&tr->Int_Src);
1706 } while (status);
1707 spin_unlock(&lp->lock);
1708
bea3348e
SH
1709 if (received < budget) {
1710 netif_rx_complete(dev, napi);
1711 /* enable interrupts */
1712 tc_writel(tc_readl(&tr->DMA_Ctl) & ~DMA_IntMask, &tr->DMA_Ctl);
1713 }
1714 return received;
eea221ce
AN
1715}
1716#endif
1717
1da177e4
LT
1718#ifdef NO_CHECK_CARRIER
1719#define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1720#else
1721#define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_NCarr|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1722#endif
1723
1724static void
1725tc35815_check_tx_stat(struct net_device *dev, int status)
1726{
ee79b7fb 1727 struct tc35815_local *lp = netdev_priv(dev);
1da177e4
LT
1728 const char *msg = NULL;
1729
1730 /* count collisions */
1731 if (status & Tx_ExColl)
c201abd9 1732 dev->stats.collisions += 16;
1da177e4 1733 if (status & Tx_TxColl_MASK)
c201abd9 1734 dev->stats.collisions += status & Tx_TxColl_MASK;
1da177e4 1735
eea221ce
AN
1736#ifndef NO_CHECK_CARRIER
1737 /* TX4939 does not have NCarr */
1738 if (lp->boardtype == TC35815_TX4939)
1739 status &= ~Tx_NCarr;
1740#ifdef WORKAROUND_LOSTCAR
1da177e4 1741 /* WORKAROUND: ignore LostCrS in full duplex operation */
eea221ce
AN
1742 if ((lp->timer_state != asleep && lp->timer_state != lcheck)
1743 || lp->fullduplex)
1da177e4 1744 status &= ~Tx_NCarr;
eea221ce
AN
1745#endif
1746#endif
1da177e4
LT
1747
1748 if (!(status & TX_STA_ERR)) {
1749 /* no error. */
c201abd9 1750 dev->stats.tx_packets++;
1da177e4
LT
1751 return;
1752 }
1753
c201abd9 1754 dev->stats.tx_errors++;
1da177e4 1755 if (status & Tx_ExColl) {
c201abd9 1756 dev->stats.tx_aborted_errors++;
1da177e4
LT
1757 msg = "Excessive Collision.";
1758 }
1759 if (status & Tx_Under) {
c201abd9 1760 dev->stats.tx_fifo_errors++;
1da177e4 1761 msg = "Tx FIFO Underrun.";
eea221ce
AN
1762 if (lp->lstats.tx_underrun < TX_THRESHOLD_KEEP_LIMIT) {
1763 lp->lstats.tx_underrun++;
1764 if (lp->lstats.tx_underrun >= TX_THRESHOLD_KEEP_LIMIT) {
1765 struct tc35815_regs __iomem *tr =
1766 (struct tc35815_regs __iomem *)dev->base_addr;
1767 tc_writel(TX_THRESHOLD_MAX, &tr->TxThrsh);
1768 msg = "Tx FIFO Underrun.Change Tx threshold to max.";
1769 }
1770 }
1da177e4
LT
1771 }
1772 if (status & Tx_Defer) {
c201abd9 1773 dev->stats.tx_fifo_errors++;
1da177e4
LT
1774 msg = "Excessive Deferral.";
1775 }
1776#ifndef NO_CHECK_CARRIER
1777 if (status & Tx_NCarr) {
c201abd9 1778 dev->stats.tx_carrier_errors++;
1da177e4
LT
1779 msg = "Lost Carrier Sense.";
1780 }
1781#endif
1782 if (status & Tx_LateColl) {
c201abd9 1783 dev->stats.tx_aborted_errors++;
1da177e4
LT
1784 msg = "Late Collision.";
1785 }
1786 if (status & Tx_TxPar) {
c201abd9 1787 dev->stats.tx_fifo_errors++;
1da177e4
LT
1788 msg = "Transmit Parity Error.";
1789 }
1790 if (status & Tx_SQErr) {
c201abd9 1791 dev->stats.tx_heartbeat_errors++;
1da177e4
LT
1792 msg = "Signal Quality Error.";
1793 }
eea221ce 1794 if (msg && netif_msg_tx_err(lp))
1da177e4
LT
1795 printk(KERN_WARNING "%s: %s (%#x)\n", dev->name, msg, status);
1796}
1797
eea221ce
AN
1798/* This handles TX complete events posted by the device
1799 * via interrupts.
1800 */
1da177e4
LT
1801static void
1802tc35815_txdone(struct net_device *dev)
1803{
ee79b7fb 1804 struct tc35815_local *lp = netdev_priv(dev);
1da177e4
LT
1805 struct TxFD *txfd;
1806 unsigned int fdctl;
1da177e4
LT
1807
1808 txfd = &lp->tfd_base[lp->tfd_end];
1809 while (lp->tfd_start != lp->tfd_end &&
1810 !((fdctl = le32_to_cpu(txfd->fd.FDCtl)) & FD_CownsFD)) {
1811 int status = le32_to_cpu(txfd->fd.FDStat);
1812 struct sk_buff *skb;
1813 unsigned long fdnext = le32_to_cpu(txfd->fd.FDNext);
eea221ce 1814 u32 fdsystem = le32_to_cpu(txfd->fd.FDSystem);
1da177e4 1815
eea221ce 1816 if (netif_msg_tx_done(lp)) {
1da177e4
LT
1817 printk("%s: complete TxFD.\n", dev->name);
1818 dump_txfd(txfd);
1819 }
1820 tc35815_check_tx_stat(dev, status);
1821
eea221ce
AN
1822 skb = fdsystem != 0xffffffff ?
1823 lp->tx_skbs[fdsystem].skb : NULL;
1824#ifdef DEBUG
1825 if (lp->tx_skbs[lp->tfd_end].skb != skb) {
1826 printk("%s: tx_skbs mismatch.\n", dev->name);
1827 panic_queues(dev);
1828 }
1829#else
1830 BUG_ON(lp->tx_skbs[lp->tfd_end].skb != skb);
1831#endif
1da177e4 1832 if (skb) {
c201abd9 1833 dev->stats.tx_bytes += skb->len;
eea221ce
AN
1834 pci_unmap_single(lp->pci_dev, lp->tx_skbs[lp->tfd_end].skb_dma, skb->len, PCI_DMA_TODEVICE);
1835 lp->tx_skbs[lp->tfd_end].skb = NULL;
1836 lp->tx_skbs[lp->tfd_end].skb_dma = 0;
1837#ifdef TC35815_NAPI
1da177e4 1838 dev_kfree_skb_any(skb);
eea221ce
AN
1839#else
1840 dev_kfree_skb_irq(skb);
1841#endif
1da177e4 1842 }
eea221ce 1843 txfd->fd.FDSystem = cpu_to_le32(0xffffffff);
1da177e4 1844
1da177e4
LT
1845 lp->tfd_end = (lp->tfd_end + 1) % TX_FD_NUM;
1846 txfd = &lp->tfd_base[lp->tfd_end];
eea221ce
AN
1847#ifdef DEBUG
1848 if ((fdnext & ~FD_Next_EOL) != fd_virt_to_bus(lp, txfd)) {
1da177e4
LT
1849 printk("%s: TxFD FDNext invalid.\n", dev->name);
1850 panic_queues(dev);
1851 }
eea221ce 1852#endif
1da177e4
LT
1853 if (fdnext & FD_Next_EOL) {
1854 /* DMA Transmitter has been stopping... */
1855 if (lp->tfd_end != lp->tfd_start) {
eea221ce
AN
1856 struct tc35815_regs __iomem *tr =
1857 (struct tc35815_regs __iomem *)dev->base_addr;
1da177e4
LT
1858 int head = (lp->tfd_start + TX_FD_NUM - 1) % TX_FD_NUM;
1859 struct TxFD* txhead = &lp->tfd_base[head];
1860 int qlen = (lp->tfd_start + TX_FD_NUM
1861 - lp->tfd_end) % TX_FD_NUM;
1862
eea221ce 1863#ifdef DEBUG
1da177e4
LT
1864 if (!(le32_to_cpu(txfd->fd.FDCtl) & FD_CownsFD)) {
1865 printk("%s: TxFD FDCtl invalid.\n", dev->name);
1866 panic_queues(dev);
1867 }
eea221ce 1868#endif
1da177e4
LT
1869 /* log max queue length */
1870 if (lp->lstats.max_tx_qlen < qlen)
1871 lp->lstats.max_tx_qlen = qlen;
1872
1873
1874 /* start DMA Transmitter again */
1875 txhead->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
1876#ifdef GATHER_TXINT
1877 txhead->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
1878#endif
eea221ce 1879 if (netif_msg_tx_queued(lp)) {
1da177e4
LT
1880 printk("%s: start TxFD on queue.\n",
1881 dev->name);
1882 dump_txfd(txfd);
1883 }
eea221ce 1884 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
1da177e4
LT
1885 }
1886 break;
1887 }
1888 }
1889
eea221ce
AN
1890 /* If we had stopped the queue due to a "tx full"
1891 * condition, and space has now been made available,
1892 * wake up the queue.
1893 */
1894 if (netif_queue_stopped(dev) && ! tc35815_tx_full(dev))
1895 netif_wake_queue(dev);
1da177e4
LT
1896}
1897
1898/* The inverse routine to tc35815_open(). */
1899static int
1900tc35815_close(struct net_device *dev)
1901{
ee79b7fb 1902 struct tc35815_local *lp = netdev_priv(dev);
bea3348e 1903
1da177e4 1904 netif_stop_queue(dev);
bea3348e
SH
1905#ifdef TC35815_NAPI
1906 napi_disable(&lp->napi);
1907#endif
1da177e4
LT
1908
1909 /* Flush the Tx and disable Rx here. */
1910
eea221ce 1911 del_timer(&lp->timer); /* Kill if running */
1da177e4
LT
1912 tc35815_chip_reset(dev);
1913 free_irq(dev->irq, dev);
1914
1915 tc35815_free_queues(dev);
1916
1917 return 0;
eea221ce 1918
1da177e4
LT
1919}
1920
1921/*
1922 * Get the current statistics.
1923 * This may be called with the card open or closed.
1924 */
1925static struct net_device_stats *tc35815_get_stats(struct net_device *dev)
1926{
eea221ce
AN
1927 struct tc35815_regs __iomem *tr =
1928 (struct tc35815_regs __iomem *)dev->base_addr;
c201abd9 1929 if (netif_running(dev))
1da177e4 1930 /* Update the statistics from the device registers. */
c201abd9 1931 dev->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt);
1da177e4 1932
c201abd9 1933 return &dev->stats;
1da177e4
LT
1934}
1935
eea221ce 1936static void tc35815_set_cam_entry(struct net_device *dev, int index, unsigned char *addr)
1da177e4 1937{
ee79b7fb 1938 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
1939 struct tc35815_regs __iomem *tr =
1940 (struct tc35815_regs __iomem *)dev->base_addr;
1da177e4 1941 int cam_index = index * 6;
eea221ce
AN
1942 u32 cam_data;
1943 u32 saved_addr;
958eb80b
AN
1944 DECLARE_MAC_BUF(mac);
1945
1da177e4
LT
1946 saved_addr = tc_readl(&tr->CAM_Adr);
1947
958eb80b
AN
1948 if (netif_msg_hw(lp))
1949 printk(KERN_DEBUG "%s: CAM %d: %s\n",
1950 dev->name, index, print_mac(mac, addr));
1da177e4
LT
1951 if (index & 1) {
1952 /* read modify write */
1953 tc_writel(cam_index - 2, &tr->CAM_Adr);
1954 cam_data = tc_readl(&tr->CAM_Data) & 0xffff0000;
1955 cam_data |= addr[0] << 8 | addr[1];
1956 tc_writel(cam_data, &tr->CAM_Data);
1957 /* write whole word */
1958 tc_writel(cam_index + 2, &tr->CAM_Adr);
1959 cam_data = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | addr[5];
1960 tc_writel(cam_data, &tr->CAM_Data);
1961 } else {
1962 /* write whole word */
1963 tc_writel(cam_index, &tr->CAM_Adr);
1964 cam_data = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
1965 tc_writel(cam_data, &tr->CAM_Data);
1966 /* read modify write */
1967 tc_writel(cam_index + 4, &tr->CAM_Adr);
1968 cam_data = tc_readl(&tr->CAM_Data) & 0x0000ffff;
1969 cam_data |= addr[4] << 24 | (addr[5] << 16);
1970 tc_writel(cam_data, &tr->CAM_Data);
1971 }
1972
1da177e4
LT
1973 tc_writel(saved_addr, &tr->CAM_Adr);
1974}
1975
1976
1977/*
1978 * Set or clear the multicast filter for this adaptor.
1979 * num_addrs == -1 Promiscuous mode, receive all packets
1980 * num_addrs == 0 Normal mode, clear multicast list
1981 * num_addrs > 0 Multicast mode, receive normal and MC packets,
1982 * and do best-effort filtering.
1983 */
1984static void
1985tc35815_set_multicast_list(struct net_device *dev)
1986{
eea221ce
AN
1987 struct tc35815_regs __iomem *tr =
1988 (struct tc35815_regs __iomem *)dev->base_addr;
1da177e4
LT
1989
1990 if (dev->flags&IFF_PROMISC)
1991 {
eea221ce
AN
1992#ifdef WORKAROUND_100HALF_PROMISC
1993 /* With some (all?) 100MHalf HUB, controller will hang
1994 * if we enabled promiscuous mode before linkup... */
ee79b7fb 1995 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
1996 int pid = lp->phy_addr;
1997 if (!(tc_mdio_read(dev, pid, MII_BMSR) & BMSR_LSTATUS))
1998 return;
1999#endif
1da177e4
LT
2000 /* Enable promiscuous mode */
2001 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl);
2002 }
2003 else if((dev->flags&IFF_ALLMULTI) || dev->mc_count > CAM_ENTRY_MAX - 3)
2004 {
2005 /* CAM 0, 1, 20 are reserved. */
2006 /* Disable promiscuous mode, use normal mode. */
2007 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl);
2008 }
2009 else if(dev->mc_count)
2010 {
2011 struct dev_mc_list* cur_addr = dev->mc_list;
2012 int i;
2013 int ena_bits = CAM_Ena_Bit(CAM_ENTRY_SOURCE);
2014
2015 tc_writel(0, &tr->CAM_Ctl);
2016 /* Walk the address list, and load the filter */
2017 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
2018 if (!cur_addr)
2019 break;
2020 /* entry 0,1 is reserved. */
eea221ce 2021 tc35815_set_cam_entry(dev, i + 2, cur_addr->dmi_addr);
1da177e4
LT
2022 ena_bits |= CAM_Ena_Bit(i + 2);
2023 }
2024 tc_writel(ena_bits, &tr->CAM_Ena);
2025 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2026 }
2027 else {
2028 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
2029 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2030 }
2031}
2032
eea221ce 2033static void tc35815_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1da177e4 2034{
ee79b7fb 2035 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
2036 strcpy(info->driver, MODNAME);
2037 strcpy(info->version, DRV_VERSION);
2038 strcpy(info->bus_info, pci_name(lp->pci_dev));
2039}
6aa20a22 2040
eea221ce
AN
2041static int tc35815_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2042{
ee79b7fb 2043 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
2044 spin_lock_irq(&lp->lock);
2045 mii_ethtool_gset(&lp->mii, cmd);
2046 spin_unlock_irq(&lp->lock);
2047 return 0;
2048}
2049
2050static int tc35815_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2051{
ee79b7fb 2052 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
2053 int rc;
2054#if 1 /* use our negotiation method... */
2055 /* Verify the settings we care about. */
2056 if (cmd->autoneg != AUTONEG_ENABLE &&
2057 cmd->autoneg != AUTONEG_DISABLE)
2058 return -EINVAL;
2059 if (cmd->autoneg == AUTONEG_DISABLE &&
2060 ((cmd->speed != SPEED_100 &&
2061 cmd->speed != SPEED_10) ||
2062 (cmd->duplex != DUPLEX_HALF &&
2063 cmd->duplex != DUPLEX_FULL)))
2064 return -EINVAL;
2065
2066 /* Ok, do it to it. */
2067 spin_lock_irq(&lp->lock);
2068 del_timer(&lp->timer);
2069 tc35815_start_auto_negotiation(dev, cmd);
2070 spin_unlock_irq(&lp->lock);
2071 rc = 0;
2072#else
2073 spin_lock_irq(&lp->lock);
2074 rc = mii_ethtool_sset(&lp->mii, cmd);
2075 spin_unlock_irq(&lp->lock);
2076#endif
2077 return rc;
2078}
2079
2080static int tc35815_nway_reset(struct net_device *dev)
2081{
ee79b7fb 2082 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
2083 int rc;
2084 spin_lock_irq(&lp->lock);
2085 rc = mii_nway_restart(&lp->mii);
2086 spin_unlock_irq(&lp->lock);
2087 return rc;
2088}
2089
2090static u32 tc35815_get_link(struct net_device *dev)
2091{
ee79b7fb 2092 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
2093 int rc;
2094 spin_lock_irq(&lp->lock);
2095 rc = mii_link_ok(&lp->mii);
2096 spin_unlock_irq(&lp->lock);
2097 return rc;
2098}
2099
2100static u32 tc35815_get_msglevel(struct net_device *dev)
2101{
ee79b7fb 2102 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
2103 return lp->msg_enable;
2104}
2105
2106static void tc35815_set_msglevel(struct net_device *dev, u32 datum)
2107{
ee79b7fb 2108 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
2109 lp->msg_enable = datum;
2110}
2111
b9f2c044 2112static int tc35815_get_sset_count(struct net_device *dev, int sset)
eea221ce 2113{
ee79b7fb 2114 struct tc35815_local *lp = netdev_priv(dev);
b9f2c044
JG
2115
2116 switch (sset) {
2117 case ETH_SS_STATS:
2118 return sizeof(lp->lstats) / sizeof(int);
2119 default:
2120 return -EOPNOTSUPP;
2121 }
eea221ce 2122}
1da177e4 2123
eea221ce
AN
2124static void tc35815_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
2125{
ee79b7fb 2126 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
2127 data[0] = lp->lstats.max_tx_qlen;
2128 data[1] = lp->lstats.tx_ints;
2129 data[2] = lp->lstats.rx_ints;
2130 data[3] = lp->lstats.tx_underrun;
2131}
2132
2133static struct {
2134 const char str[ETH_GSTRING_LEN];
2135} ethtool_stats_keys[] = {
2136 { "max_tx_qlen" },
2137 { "tx_ints" },
2138 { "rx_ints" },
2139 { "tx_underrun" },
2140};
2141
2142static void tc35815_get_strings(struct net_device *dev, u32 stringset, u8 *data)
2143{
2144 memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
2145}
2146
2147static const struct ethtool_ops tc35815_ethtool_ops = {
2148 .get_drvinfo = tc35815_get_drvinfo,
2149 .get_settings = tc35815_get_settings,
2150 .set_settings = tc35815_set_settings,
2151 .nway_reset = tc35815_nway_reset,
2152 .get_link = tc35815_get_link,
2153 .get_msglevel = tc35815_get_msglevel,
2154 .set_msglevel = tc35815_set_msglevel,
2155 .get_strings = tc35815_get_strings,
b9f2c044 2156 .get_sset_count = tc35815_get_sset_count,
eea221ce 2157 .get_ethtool_stats = tc35815_get_ethtool_stats,
eea221ce
AN
2158};
2159
2160static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2161{
ee79b7fb 2162 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
2163 int rc;
2164
2165 if (!netif_running(dev))
2166 return -EINVAL;
2167
2168 spin_lock_irq(&lp->lock);
2169 rc = generic_mii_ioctl(&lp->mii, if_mii(rq), cmd, NULL);
2170 spin_unlock_irq(&lp->lock);
2171
2172 return rc;
2173}
2174
2175static int tc_mdio_read(struct net_device *dev, int phy_id, int location)
2176{
2177 struct tc35815_regs __iomem *tr =
2178 (struct tc35815_regs __iomem *)dev->base_addr;
2179 u32 data;
2180 tc_writel(MD_CA_Busy | (phy_id << 5) | location, &tr->MD_CA);
1da177e4
LT
2181 while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
2182 ;
2183 data = tc_readl(&tr->MD_Data);
eea221ce
AN
2184 return data & 0xffff;
2185}
2186
2187static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
2188 int val)
2189{
2190 struct tc35815_regs __iomem *tr =
2191 (struct tc35815_regs __iomem *)dev->base_addr;
2192 tc_writel(val, &tr->MD_Data);
2193 tc_writel(MD_CA_Busy | MD_CA_Wr | (phy_id << 5) | location, &tr->MD_CA);
2194 while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
2195 ;
1da177e4
LT
2196}
2197
eea221ce
AN
2198/* Auto negotiation. The scheme is very simple. We have a timer routine
2199 * that keeps watching the auto negotiation process as it progresses.
2200 * The DP83840 is first told to start doing it's thing, we set up the time
2201 * and place the timer state machine in it's initial state.
2202 *
2203 * Here the timer peeks at the DP83840 status registers at each click to see
2204 * if the auto negotiation has completed, we assume here that the DP83840 PHY
2205 * will time out at some point and just tell us what (didn't) happen. For
2206 * complete coverage we only allow so many of the ticks at this level to run,
2207 * when this has expired we print a warning message and try another strategy.
2208 * This "other" strategy is to force the interface into various speed/duplex
2209 * configurations and we stop when we see a link-up condition before the
2210 * maximum number of "peek" ticks have occurred.
2211 *
2212 * Once a valid link status has been detected we configure the BigMAC and
2213 * the rest of the Happy Meal to speak the most efficient protocol we could
2214 * get a clean link for. The priority for link configurations, highest first
2215 * is:
2216 * 100 Base-T Full Duplex
2217 * 100 Base-T Half Duplex
2218 * 10 Base-T Full Duplex
2219 * 10 Base-T Half Duplex
2220 *
2221 * We start a new timer now, after a successful auto negotiation status has
2222 * been detected. This timer just waits for the link-up bit to get set in
2223 * the BMCR of the DP83840. When this occurs we print a kernel log message
2224 * describing the link type in use and the fact that it is up.
2225 *
2226 * If a fatal error of some sort is signalled and detected in the interrupt
2227 * service routine, and the chip is reset, or the link is ifconfig'd down
2228 * and then back up, this entire process repeats itself all over again.
2229 */
2230/* Note: Above comments are come from sunhme driver. */
2231
2232static int tc35815_try_next_permutation(struct net_device *dev)
1da177e4 2233{
ee79b7fb 2234 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
2235 int pid = lp->phy_addr;
2236 unsigned short bmcr;
1da177e4 2237
eea221ce 2238 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
1da177e4 2239
eea221ce
AN
2240 /* Downgrade from full to half duplex. Only possible via ethtool. */
2241 if (bmcr & BMCR_FULLDPLX) {
2242 bmcr &= ~BMCR_FULLDPLX;
2243 printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
2244 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2245 return 0;
2246 }
2247
2248 /* Downgrade from 100 to 10. */
2249 if (bmcr & BMCR_SPEED100) {
2250 bmcr &= ~BMCR_SPEED100;
2251 printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
2252 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2253 return 0;
2254 }
2255
2256 /* We've tried everything. */
2257 return -1;
1da177e4
LT
2258}
2259
eea221ce
AN
2260static void
2261tc35815_display_link_mode(struct net_device *dev)
1da177e4 2262{
ee79b7fb 2263 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
2264 int pid = lp->phy_addr;
2265 unsigned short lpa, bmcr;
2266 char *speed = "", *duplex = "";
2267
2268 lpa = tc_mdio_read(dev, pid, MII_LPA);
2269 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2270 if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
2271 speed = "100Mb/s";
2272 else
2273 speed = "10Mb/s";
2274 if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
2275 duplex = "Full Duplex";
2276 else
2277 duplex = "Half Duplex";
2278
2279 if (netif_msg_link(lp))
2280 printk(KERN_INFO "%s: Link is up at %s, %s.\n",
2281 dev->name, speed, duplex);
2282 printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
2283 dev->name,
2284 bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
2285}
2286
2287static void tc35815_display_forced_link_mode(struct net_device *dev)
2288{
ee79b7fb 2289 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
2290 int pid = lp->phy_addr;
2291 unsigned short bmcr;
2292 char *speed = "", *duplex = "";
2293
2294 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2295 if (bmcr & BMCR_SPEED100)
2296 speed = "100Mb/s";
2297 else
2298 speed = "10Mb/s";
2299 if (bmcr & BMCR_FULLDPLX)
2300 duplex = "Full Duplex.\n";
2301 else
2302 duplex = "Half Duplex.\n";
2303
2304 if (netif_msg_link(lp))
2305 printk(KERN_INFO "%s: Link has been forced up at %s, %s",
2306 dev->name, speed, duplex);
2307}
2308
2309static void tc35815_set_link_modes(struct net_device *dev)
2310{
ee79b7fb 2311 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
2312 struct tc35815_regs __iomem *tr =
2313 (struct tc35815_regs __iomem *)dev->base_addr;
2314 int pid = lp->phy_addr;
2315 unsigned short bmcr, lpa;
2316 int speed;
2317
2318 if (lp->timer_state == arbwait) {
2319 lpa = tc_mdio_read(dev, pid, MII_LPA);
2320 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2321 printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
2322 dev->name,
2323 bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
2324 if (!(lpa & (LPA_10HALF | LPA_10FULL |
2325 LPA_100HALF | LPA_100FULL))) {
2326 /* fall back to 10HALF */
2327 printk(KERN_INFO "%s: bad ability %04x - falling back to 10HD.\n",
2328 dev->name, lpa);
2329 lpa = LPA_10HALF;
2330 }
2331 if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
2332 lp->fullduplex = 1;
2333 else
2334 lp->fullduplex = 0;
2335 if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
2336 speed = 100;
2337 else
2338 speed = 10;
2339 } else {
2340 /* Forcing a link mode. */
2341 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2342 if (bmcr & BMCR_FULLDPLX)
2343 lp->fullduplex = 1;
2344 else
2345 lp->fullduplex = 0;
2346 if (bmcr & BMCR_SPEED100)
2347 speed = 100;
2348 else
2349 speed = 10;
2350 }
2351
2352 tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_HaltReq, &tr->MAC_Ctl);
2353 if (lp->fullduplex) {
2354 tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_FullDup, &tr->MAC_Ctl);
2355 } else {
2356 tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_FullDup, &tr->MAC_Ctl);
2357 }
2358 tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_HaltReq, &tr->MAC_Ctl);
2359
2360 /* TX4939 PCFG.SPEEDn bit will be changed on NETDEV_CHANGE event. */
2361
2362#ifndef NO_CHECK_CARRIER
2363 /* TX4939 does not have EnLCarr */
2364 if (lp->boardtype != TC35815_TX4939) {
2365#ifdef WORKAROUND_LOSTCAR
2366 /* WORKAROUND: enable LostCrS only if half duplex operation */
2367 if (!lp->fullduplex && lp->boardtype != TC35815_TX4939)
2368 tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr, &tr->Tx_Ctl);
2369#endif
2370 }
2371#endif
2372 lp->mii.full_duplex = lp->fullduplex;
2373}
2374
2375static void tc35815_timer(unsigned long data)
2376{
2377 struct net_device *dev = (struct net_device *)data;
ee79b7fb 2378 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
2379 int pid = lp->phy_addr;
2380 unsigned short bmsr, bmcr, lpa;
2381 int restart_timer = 0;
2382
2383 spin_lock_irq(&lp->lock);
2384
2385 lp->timer_ticks++;
2386 switch (lp->timer_state) {
2387 case arbwait:
2388 /*
2389 * Only allow for 5 ticks, thats 10 seconds and much too
2390 * long to wait for arbitration to complete.
2391 */
2392 /* TC35815 need more times... */
2393 if (lp->timer_ticks >= 10) {
2394 /* Enter force mode. */
2395 if (!options.doforce) {
2396 printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
2397 " cable probblem?\n", dev->name);
2398 /* Try to restart the adaptor. */
2399 tc35815_restart(dev);
2400 goto out;
2401 }
2402 printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
2403 " trying force link mode\n", dev->name);
2404 printk(KERN_DEBUG "%s: BMCR %x BMSR %x\n", dev->name,
2405 tc_mdio_read(dev, pid, MII_BMCR),
2406 tc_mdio_read(dev, pid, MII_BMSR));
2407 bmcr = BMCR_SPEED100;
2408 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2409
2410 /*
2411 * OK, seems we need do disable the transceiver
2412 * for the first tick to make sure we get an
2413 * accurate link state at the second tick.
2414 */
2415
2416 lp->timer_state = ltrywait;
2417 lp->timer_ticks = 0;
2418 restart_timer = 1;
1da177e4 2419 } else {
eea221ce
AN
2420 /* Anything interesting happen? */
2421 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2422 if (bmsr & BMSR_ANEGCOMPLETE) {
2423 /* Just what we've been waiting for... */
2424 tc35815_set_link_modes(dev);
2425
2426 /*
2427 * Success, at least so far, advance our state
2428 * engine.
2429 */
2430 lp->timer_state = lupwait;
2431 restart_timer = 1;
2432 } else {
2433 restart_timer = 1;
2434 }
2435 }
2436 break;
2437
2438 case lupwait:
2439 /*
2440 * Auto negotiation was successful and we are awaiting a
2441 * link up status. I have decided to let this timer run
2442 * forever until some sort of error is signalled, reporting
2443 * a message to the user at 10 second intervals.
2444 */
2445 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2446 if (bmsr & BMSR_LSTATUS) {
2447 /*
2448 * Wheee, it's up, display the link mode in use and put
2449 * the timer to sleep.
2450 */
2451 tc35815_display_link_mode(dev);
2452 netif_carrier_on(dev);
2453#ifdef WORKAROUND_100HALF_PROMISC
2454 /* delayed promiscuous enabling */
2455 if (dev->flags & IFF_PROMISC)
2456 tc35815_set_multicast_list(dev);
2457#endif
2458#if 1
2459 lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
2460 lp->timer_state = lcheck;
2461 restart_timer = 1;
2462#else
2463 lp->timer_state = asleep;
2464 restart_timer = 0;
2465#endif
2466 } else {
2467 if (lp->timer_ticks >= 10) {
2468 printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
2469 "not completely up.\n", dev->name);
2470 lp->timer_ticks = 0;
2471 restart_timer = 1;
2472 } else {
2473 restart_timer = 1;
2474 }
2475 }
2476 break;
2477
2478 case ltrywait:
2479 /*
2480 * Making the timeout here too long can make it take
2481 * annoyingly long to attempt all of the link mode
2482 * permutations, but then again this is essentially
2483 * error recovery code for the most part.
2484 */
2485 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2486 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2487 if (lp->timer_ticks == 1) {
2488 /*
2489 * Re-enable transceiver, we'll re-enable the
2490 * transceiver next tick, then check link state
2491 * on the following tick.
2492 */
2493 restart_timer = 1;
2494 break;
2495 }
2496 if (lp->timer_ticks == 2) {
2497 restart_timer = 1;
2498 break;
2499 }
2500 if (bmsr & BMSR_LSTATUS) {
2501 /* Force mode selection success. */
2502 tc35815_display_forced_link_mode(dev);
2503 netif_carrier_on(dev);
2504 tc35815_set_link_modes(dev);
2505#ifdef WORKAROUND_100HALF_PROMISC
2506 /* delayed promiscuous enabling */
2507 if (dev->flags & IFF_PROMISC)
2508 tc35815_set_multicast_list(dev);
2509#endif
2510#if 1
2511 lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
2512 lp->timer_state = lcheck;
2513 restart_timer = 1;
2514#else
2515 lp->timer_state = asleep;
2516 restart_timer = 0;
2517#endif
2518 } else {
2519 if (lp->timer_ticks >= 4) { /* 6 seconds or so... */
2520 int ret;
2521
2522 ret = tc35815_try_next_permutation(dev);
2523 if (ret == -1) {
2524 /*
2525 * Aieee, tried them all, reset the
2526 * chip and try all over again.
2527 */
2528 printk(KERN_NOTICE "%s: Link down, "
2529 "cable problem?\n",
2530 dev->name);
2531
2532 /* Try to restart the adaptor. */
2533 tc35815_restart(dev);
2534 goto out;
1da177e4 2535 }
eea221ce
AN
2536 lp->timer_ticks = 0;
2537 restart_timer = 1;
2538 } else {
2539 restart_timer = 1;
1da177e4 2540 }
eea221ce
AN
2541 }
2542 break;
2543
2544 case lcheck:
2545 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2546 lpa = tc_mdio_read(dev, pid, MII_LPA);
2547 if (bmcr & (BMCR_PDOWN | BMCR_ISOLATE | BMCR_RESET)) {
2548 printk(KERN_ERR "%s: PHY down? (BMCR %x)\n", dev->name,
2549 bmcr);
2550 } else if ((lp->saved_lpa ^ lpa) &
2551 (LPA_100FULL|LPA_100HALF|LPA_10FULL|LPA_10HALF)) {
2552 printk(KERN_NOTICE "%s: link status changed"
2553 " (BMCR %x LPA %x->%x)\n", dev->name,
2554 bmcr, lp->saved_lpa, lpa);
2555 } else {
2556 /* go on */
2557 restart_timer = 1;
2558 break;
2559 }
2560 /* Try to restart the adaptor. */
2561 tc35815_restart(dev);
2562 goto out;
2563
2564 case asleep:
2565 default:
2566 /* Can't happens.... */
2567 printk(KERN_ERR "%s: Aieee, link timer is asleep but we got "
2568 "one anyways!\n", dev->name);
2569 restart_timer = 0;
2570 lp->timer_ticks = 0;
2571 lp->timer_state = asleep; /* foo on you */
2572 break;
2573 }
2574
2575 if (restart_timer) {
2576 lp->timer.expires = jiffies + msecs_to_jiffies(1200);
2577 add_timer(&lp->timer);
2578 }
2579out:
2580 spin_unlock_irq(&lp->lock);
2581}
2582
2583static void tc35815_start_auto_negotiation(struct net_device *dev,
2584 struct ethtool_cmd *ep)
2585{
ee79b7fb 2586 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
2587 int pid = lp->phy_addr;
2588 unsigned short bmsr, bmcr, advertize;
2589 int timeout;
2590
2591 netif_carrier_off(dev);
2592 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2593 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2594 advertize = tc_mdio_read(dev, pid, MII_ADVERTISE);
2595
2596 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
2597 if (options.speed || options.duplex) {
2598 /* Advertise only specified configuration. */
2599 advertize &= ~(ADVERTISE_10HALF |
2600 ADVERTISE_10FULL |
2601 ADVERTISE_100HALF |
2602 ADVERTISE_100FULL);
2603 if (options.speed != 10) {
2604 if (options.duplex != 1)
2605 advertize |= ADVERTISE_100FULL;
2606 if (options.duplex != 2)
2607 advertize |= ADVERTISE_100HALF;
2608 }
2609 if (options.speed != 100) {
2610 if (options.duplex != 1)
2611 advertize |= ADVERTISE_10FULL;
2612 if (options.duplex != 2)
2613 advertize |= ADVERTISE_10HALF;
2614 }
2615 if (options.speed == 100)
2616 bmcr |= BMCR_SPEED100;
2617 else if (options.speed == 10)
2618 bmcr &= ~BMCR_SPEED100;
2619 if (options.duplex == 2)
2620 bmcr |= BMCR_FULLDPLX;
2621 else if (options.duplex == 1)
2622 bmcr &= ~BMCR_FULLDPLX;
2623 } else {
2624 /* Advertise everything we can support. */
2625 if (bmsr & BMSR_10HALF)
2626 advertize |= ADVERTISE_10HALF;
1da177e4 2627 else
eea221ce
AN
2628 advertize &= ~ADVERTISE_10HALF;
2629 if (bmsr & BMSR_10FULL)
2630 advertize |= ADVERTISE_10FULL;
1da177e4 2631 else
eea221ce
AN
2632 advertize &= ~ADVERTISE_10FULL;
2633 if (bmsr & BMSR_100HALF)
2634 advertize |= ADVERTISE_100HALF;
2635 else
2636 advertize &= ~ADVERTISE_100HALF;
2637 if (bmsr & BMSR_100FULL)
2638 advertize |= ADVERTISE_100FULL;
2639 else
2640 advertize &= ~ADVERTISE_100FULL;
2641 }
2642
2643 tc_mdio_write(dev, pid, MII_ADVERTISE, advertize);
2644
2645 /* Enable Auto-Negotiation, this is usually on already... */
2646 bmcr |= BMCR_ANENABLE;
2647 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2648
2649 /* Restart it to make sure it is going. */
2650 bmcr |= BMCR_ANRESTART;
2651 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2652 printk(KERN_DEBUG "%s: ADVERTISE %x BMCR %x\n", dev->name, advertize, bmcr);
2653
2654 /* BMCR_ANRESTART self clears when the process has begun. */
2655 timeout = 64; /* More than enough. */
2656 while (--timeout) {
2657 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2658 if (!(bmcr & BMCR_ANRESTART))
2659 break; /* got it. */
2660 udelay(10);
2661 }
2662 if (!timeout) {
2663 printk(KERN_ERR "%s: TC35815 would not start auto "
2664 "negotiation BMCR=0x%04x\n",
2665 dev->name, bmcr);
2666 printk(KERN_NOTICE "%s: Performing force link "
2667 "detection.\n", dev->name);
2668 goto force_link;
2669 } else {
2670 printk(KERN_DEBUG "%s: auto negotiation started.\n", dev->name);
2671 lp->timer_state = arbwait;
1da177e4 2672 }
eea221ce
AN
2673 } else {
2674force_link:
2675 /* Force the link up, trying first a particular mode.
2676 * Either we are here at the request of ethtool or
2677 * because the Happy Meal would not start to autoneg.
2678 */
2679
2680 /* Disable auto-negotiation in BMCR, enable the duplex and
2681 * speed setting, init the timer state machine, and fire it off.
2682 */
2683 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
2684 bmcr = BMCR_SPEED100;
2685 } else {
2686 if (ep->speed == SPEED_100)
2687 bmcr = BMCR_SPEED100;
2688 else
2689 bmcr = 0;
2690 if (ep->duplex == DUPLEX_FULL)
2691 bmcr |= BMCR_FULLDPLX;
2692 }
2693 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2694
2695 /* OK, seems we need do disable the transceiver for the first
2696 * tick to make sure we get an accurate link state at the
2697 * second tick.
2698 */
2699 lp->timer_state = ltrywait;
1da177e4
LT
2700 }
2701
eea221ce
AN
2702 del_timer(&lp->timer);
2703 lp->timer_ticks = 0;
2704 lp->timer.expires = jiffies + msecs_to_jiffies(1200);
2705 add_timer(&lp->timer);
2706}
1da177e4 2707
eea221ce
AN
2708static void tc35815_find_phy(struct net_device *dev)
2709{
ee79b7fb 2710 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
2711 int pid = lp->phy_addr;
2712 unsigned short id0;
2713
2714 /* find MII phy */
2715 for (pid = 31; pid >= 0; pid--) {
2716 id0 = tc_mdio_read(dev, pid, MII_BMSR);
2717 if (id0 != 0xffff && id0 != 0x0000 &&
2718 (id0 & BMSR_RESV) != (0xffff & BMSR_RESV) /* paranoia? */
2719 ) {
2720 lp->phy_addr = pid;
2721 break;
2722 }
2723 }
2724 if (pid < 0) {
2725 printk(KERN_ERR "%s: No MII Phy found.\n",
2726 dev->name);
2727 lp->phy_addr = pid = 0;
1da177e4 2728 }
eea221ce
AN
2729
2730 lp->mii_id[0] = tc_mdio_read(dev, pid, MII_PHYSID1);
2731 lp->mii_id[1] = tc_mdio_read(dev, pid, MII_PHYSID2);
2732 if (netif_msg_hw(lp))
2733 printk(KERN_INFO "%s: PHY(%02x) ID %04x %04x\n", dev->name,
2734 pid, lp->mii_id[0], lp->mii_id[1]);
1da177e4
LT
2735}
2736
eea221ce 2737static void tc35815_phy_chip_init(struct net_device *dev)
1da177e4 2738{
ee79b7fb 2739 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
2740 int pid = lp->phy_addr;
2741 unsigned short bmcr;
2742 struct ethtool_cmd ecmd, *ep;
2743
2744 /* dis-isolate if needed. */
2745 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2746 if (bmcr & BMCR_ISOLATE) {
2747 int count = 32;
2748 printk(KERN_DEBUG "%s: unisolating...", dev->name);
2749 tc_mdio_write(dev, pid, MII_BMCR, bmcr & ~BMCR_ISOLATE);
2750 while (--count) {
2751 if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_ISOLATE))
2752 break;
2753 udelay(20);
2754 }
2755 printk(" %s.\n", count ? "done" : "failed");
2756 }
1da177e4 2757
eea221ce
AN
2758 if (options.speed && options.duplex) {
2759 ecmd.autoneg = AUTONEG_DISABLE;
2760 ecmd.speed = options.speed == 10 ? SPEED_10 : SPEED_100;
2761 ecmd.duplex = options.duplex == 1 ? DUPLEX_HALF : DUPLEX_FULL;
2762 ep = &ecmd;
2763 } else {
2764 ep = NULL;
2765 }
2766 tc35815_start_auto_negotiation(dev, ep);
2767}
2768
2769static void tc35815_chip_reset(struct net_device *dev)
2770{
2771 struct tc35815_regs __iomem *tr =
2772 (struct tc35815_regs __iomem *)dev->base_addr;
2773 int i;
1da177e4
LT
2774 /* reset the controller */
2775 tc_writel(MAC_Reset, &tr->MAC_Ctl);
eea221ce
AN
2776 udelay(4); /* 3200ns */
2777 i = 0;
2778 while (tc_readl(&tr->MAC_Ctl) & MAC_Reset) {
2779 if (i++ > 100) {
2780 printk(KERN_ERR "%s: MAC reset failed.\n", dev->name);
2781 break;
2782 }
2783 mdelay(1);
2784 }
1da177e4
LT
2785 tc_writel(0, &tr->MAC_Ctl);
2786
2787 /* initialize registers to default value */
2788 tc_writel(0, &tr->DMA_Ctl);
2789 tc_writel(0, &tr->TxThrsh);
2790 tc_writel(0, &tr->TxPollCtr);
2791 tc_writel(0, &tr->RxFragSize);
2792 tc_writel(0, &tr->Int_En);
2793 tc_writel(0, &tr->FDA_Bas);
2794 tc_writel(0, &tr->FDA_Lim);
2795 tc_writel(0xffffffff, &tr->Int_Src); /* Write 1 to clear */
2796 tc_writel(0, &tr->CAM_Ctl);
2797 tc_writel(0, &tr->Tx_Ctl);
2798 tc_writel(0, &tr->Rx_Ctl);
2799 tc_writel(0, &tr->CAM_Ena);
2800 (void)tc_readl(&tr->Miss_Cnt); /* Read to clear */
2801
eea221ce
AN
2802 /* initialize internal SRAM */
2803 tc_writel(DMA_TestMode, &tr->DMA_Ctl);
2804 for (i = 0; i < 0x1000; i += 4) {
2805 tc_writel(i, &tr->CAM_Adr);
2806 tc_writel(0, &tr->CAM_Data);
2807 }
2808 tc_writel(0, &tr->DMA_Ctl);
1da177e4
LT
2809}
2810
2811static void tc35815_chip_init(struct net_device *dev)
2812{
ee79b7fb 2813 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
2814 struct tc35815_regs __iomem *tr =
2815 (struct tc35815_regs __iomem *)dev->base_addr;
1da177e4
LT
2816 unsigned long txctl = TX_CTL_CMD;
2817
2818 tc35815_phy_chip_init(dev);
2819
2820 /* load station address to CAM */
eea221ce 2821 tc35815_set_cam_entry(dev, CAM_ENTRY_SOURCE, dev->dev_addr);
1da177e4
LT
2822
2823 /* Enable CAM (broadcast and unicast) */
2824 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
2825 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2826
eea221ce
AN
2827 /* Use DMA_RxAlign_2 to make IP header 4-byte aligned. */
2828 if (HAVE_DMA_RXALIGN(lp))
2829 tc_writel(DMA_BURST_SIZE | DMA_RxAlign_2, &tr->DMA_Ctl);
2830 else
2831 tc_writel(DMA_BURST_SIZE, &tr->DMA_Ctl);
2832#ifdef TC35815_USE_PACKEDBUFFER
1da177e4 2833 tc_writel(RxFrag_EnPack | ETH_ZLEN, &tr->RxFragSize); /* Packing */
eea221ce
AN
2834#else
2835 tc_writel(ETH_ZLEN, &tr->RxFragSize);
2836#endif
1da177e4
LT
2837 tc_writel(0, &tr->TxPollCtr); /* Batch mode */
2838 tc_writel(TX_THRESHOLD, &tr->TxThrsh);
2839 tc_writel(INT_EN_CMD, &tr->Int_En);
2840
2841 /* set queues */
eea221ce 2842 tc_writel(fd_virt_to_bus(lp, lp->rfd_base), &tr->FDA_Bas);
1da177e4
LT
2843 tc_writel((unsigned long)lp->rfd_limit - (unsigned long)lp->rfd_base,
2844 &tr->FDA_Lim);
2845 /*
2846 * Activation method:
eea221ce 2847 * First, enable the MAC Transmitter and the DMA Receive circuits.
1da177e4
LT
2848 * Then enable the DMA Transmitter and the MAC Receive circuits.
2849 */
eea221ce 2850 tc_writel(fd_virt_to_bus(lp, lp->fbl_ptr), &tr->BLFrmPtr); /* start DMA receiver */
1da177e4 2851 tc_writel(RX_CTL_CMD, &tr->Rx_Ctl); /* start MAC receiver */
eea221ce 2852
1da177e4 2853 /* start MAC transmitter */
eea221ce
AN
2854#ifndef NO_CHECK_CARRIER
2855 /* TX4939 does not have EnLCarr */
2856 if (lp->boardtype == TC35815_TX4939)
2857 txctl &= ~Tx_EnLCarr;
2858#ifdef WORKAROUND_LOSTCAR
1da177e4 2859 /* WORKAROUND: ignore LostCrS in full duplex operation */
eea221ce
AN
2860 if ((lp->timer_state != asleep && lp->timer_state != lcheck) ||
2861 lp->fullduplex)
2862 txctl &= ~Tx_EnLCarr;
2863#endif
2864#endif /* !NO_CHECK_CARRIER */
1da177e4
LT
2865#ifdef GATHER_TXINT
2866 txctl &= ~Tx_EnComp; /* disable global tx completion int. */
2867#endif
2868 tc_writel(txctl, &tr->Tx_Ctl);
eea221ce
AN
2869}
2870
2871#ifdef CONFIG_PM
2872static int tc35815_suspend(struct pci_dev *pdev, pm_message_t state)
2873{
2874 struct net_device *dev = pci_get_drvdata(pdev);
ee79b7fb 2875 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
2876 unsigned long flags;
2877
2878 pci_save_state(pdev);
2879 if (!netif_running(dev))
2880 return 0;
2881 netif_device_detach(dev);
2882 spin_lock_irqsave(&lp->lock, flags);
2883 del_timer(&lp->timer); /* Kill if running */
2884 tc35815_chip_reset(dev);
1da177e4 2885 spin_unlock_irqrestore(&lp->lock, flags);
eea221ce
AN
2886 pci_set_power_state(pdev, PCI_D3hot);
2887 return 0;
1da177e4
LT
2888}
2889
eea221ce
AN
2890static int tc35815_resume(struct pci_dev *pdev)
2891{
2892 struct net_device *dev = pci_get_drvdata(pdev);
ee79b7fb 2893 struct tc35815_local *lp = netdev_priv(dev);
eea221ce
AN
2894 unsigned long flags;
2895
2896 pci_restore_state(pdev);
2897 if (!netif_running(dev))
2898 return 0;
2899 pci_set_power_state(pdev, PCI_D0);
2900 spin_lock_irqsave(&lp->lock, flags);
2901 tc35815_restart(dev);
2902 spin_unlock_irqrestore(&lp->lock, flags);
2903 netif_device_attach(dev);
2904 return 0;
2905}
2906#endif /* CONFIG_PM */
2907
2908static struct pci_driver tc35815_pci_driver = {
2909 .name = MODNAME,
2910 .id_table = tc35815_pci_tbl,
2911 .probe = tc35815_init_one,
2912 .remove = __devexit_p(tc35815_remove_one),
2913#ifdef CONFIG_PM
2914 .suspend = tc35815_suspend,
2915 .resume = tc35815_resume,
2916#endif
1da177e4
LT
2917};
2918
eea221ce
AN
2919module_param_named(speed, options.speed, int, 0);
2920MODULE_PARM_DESC(speed, "0:auto, 10:10Mbps, 100:100Mbps");
2921module_param_named(duplex, options.duplex, int, 0);
2922MODULE_PARM_DESC(duplex, "0:auto, 1:half, 2:full");
2923module_param_named(doforce, options.doforce, int, 0);
2924MODULE_PARM_DESC(doforce, "try force link mode if auto-negotiation failed");
2925
1da177e4
LT
2926static int __init tc35815_init_module(void)
2927{
eea221ce 2928 return pci_register_driver(&tc35815_pci_driver);
1da177e4
LT
2929}
2930
2931static void __exit tc35815_cleanup_module(void)
2932{
eea221ce 2933 pci_unregister_driver(&tc35815_pci_driver);
1da177e4 2934}
420e8524 2935
1da177e4
LT
2936module_init(tc35815_init_module);
2937module_exit(tc35815_cleanup_module);
eea221ce
AN
2938
2939MODULE_DESCRIPTION("TOSHIBA TC35815 PCI 10M/100M Ethernet driver");
2940MODULE_LICENSE("GPL");