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Commit | Line | Data |
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eea221ce AN |
1 | /* |
2 | * tc35815.c: A TOSHIBA TC35815CF PCI 10/100Mbps ethernet driver for linux. | |
1da177e4 LT |
3 | * |
4 | * Based on skelton.c by Donald Becker. | |
1da177e4 | 5 | * |
eea221ce AN |
6 | * This driver is a replacement of older and less maintained version. |
7 | * This is a header of the older version: | |
8 | * -----<snip>----- | |
9 | * Copyright 2001 MontaVista Software Inc. | |
10 | * Author: MontaVista Software, Inc. | |
11 | * ahennessy@mvista.com | |
12 | * Copyright (C) 2000-2001 Toshiba Corporation | |
13 | * static const char *version = | |
14 | * "tc35815.c:v0.00 26/07/2000 by Toshiba Corporation\n"; | |
15 | * -----<snip>----- | |
1da177e4 | 16 | * |
eea221ce AN |
17 | * This file is subject to the terms and conditions of the GNU General Public |
18 | * License. See the file "COPYING" in the main directory of this archive | |
19 | * for more details. | |
1da177e4 | 20 | * |
eea221ce AN |
21 | * (C) Copyright TOSHIBA CORPORATION 2004-2005 |
22 | * All Rights Reserved. | |
1da177e4 LT |
23 | */ |
24 | ||
eea221ce | 25 | #ifdef TC35815_NAPI |
bd43da8f | 26 | #define DRV_VERSION "1.36-NAPI" |
eea221ce | 27 | #else |
bd43da8f | 28 | #define DRV_VERSION "1.36" |
eea221ce AN |
29 | #endif |
30 | static const char *version = "tc35815.c:v" DRV_VERSION "\n"; | |
31 | #define MODNAME "tc35815" | |
1da177e4 LT |
32 | |
33 | #include <linux/module.h> | |
34 | #include <linux/kernel.h> | |
35 | #include <linux/types.h> | |
36 | #include <linux/fcntl.h> | |
37 | #include <linux/interrupt.h> | |
38 | #include <linux/ioport.h> | |
39 | #include <linux/in.h> | |
40 | #include <linux/slab.h> | |
41 | #include <linux/string.h> | |
eea221ce | 42 | #include <linux/spinlock.h> |
1da177e4 LT |
43 | #include <linux/errno.h> |
44 | #include <linux/init.h> | |
45 | #include <linux/netdevice.h> | |
46 | #include <linux/etherdevice.h> | |
47 | #include <linux/skbuff.h> | |
48 | #include <linux/delay.h> | |
49 | #include <linux/pci.h> | |
eea221ce AN |
50 | #include <linux/mii.h> |
51 | #include <linux/ethtool.h> | |
bd43da8f | 52 | #include <linux/platform_device.h> |
1da177e4 | 53 | #include <asm/io.h> |
1da177e4 LT |
54 | #include <asm/byteorder.h> |
55 | ||
1da177e4 LT |
56 | /* First, a few definitions that the brave might change. */ |
57 | ||
1da177e4 | 58 | #define GATHER_TXINT /* On-Demand Tx Interrupt */ |
eea221ce AN |
59 | #define WORKAROUND_LOSTCAR |
60 | #define WORKAROUND_100HALF_PROMISC | |
61 | /* #define TC35815_USE_PACKEDBUFFER */ | |
62 | ||
63 | typedef enum { | |
64 | TC35815CF = 0, | |
65 | TC35815_NWU, | |
66 | TC35815_TX4939, | |
67 | } board_t; | |
68 | ||
69 | /* indexed by board_t, above */ | |
70 | static const struct { | |
71 | const char *name; | |
72 | } board_info[] __devinitdata = { | |
73 | { "TOSHIBA TC35815CF 10/100BaseTX" }, | |
74 | { "TOSHIBA TC35815 with Wake on LAN" }, | |
75 | { "TOSHIBA TC35815/TX4939" }, | |
76 | }; | |
77 | ||
78 | static const struct pci_device_id tc35815_pci_tbl[] = { | |
79 | {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815CF), .driver_data = TC35815CF }, | |
80 | {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_NWU), .driver_data = TC35815_NWU }, | |
81 | {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939), .driver_data = TC35815_TX4939 }, | |
82 | {0,} | |
83 | }; | |
84 | MODULE_DEVICE_TABLE (pci, tc35815_pci_tbl); | |
1da177e4 | 85 | |
eea221ce AN |
86 | /* see MODULE_PARM_DESC */ |
87 | static struct tc35815_options { | |
88 | int speed; | |
89 | int duplex; | |
90 | int doforce; | |
91 | } options; | |
1da177e4 LT |
92 | |
93 | /* | |
94 | * Registers | |
95 | */ | |
96 | struct tc35815_regs { | |
97 | volatile __u32 DMA_Ctl; /* 0x00 */ | |
98 | volatile __u32 TxFrmPtr; | |
99 | volatile __u32 TxThrsh; | |
100 | volatile __u32 TxPollCtr; | |
101 | volatile __u32 BLFrmPtr; | |
102 | volatile __u32 RxFragSize; | |
103 | volatile __u32 Int_En; | |
104 | volatile __u32 FDA_Bas; | |
105 | volatile __u32 FDA_Lim; /* 0x20 */ | |
106 | volatile __u32 Int_Src; | |
107 | volatile __u32 unused0[2]; | |
108 | volatile __u32 PauseCnt; | |
109 | volatile __u32 RemPauCnt; | |
110 | volatile __u32 TxCtlFrmStat; | |
111 | volatile __u32 unused1; | |
112 | volatile __u32 MAC_Ctl; /* 0x40 */ | |
113 | volatile __u32 CAM_Ctl; | |
114 | volatile __u32 Tx_Ctl; | |
115 | volatile __u32 Tx_Stat; | |
116 | volatile __u32 Rx_Ctl; | |
117 | volatile __u32 Rx_Stat; | |
118 | volatile __u32 MD_Data; | |
119 | volatile __u32 MD_CA; | |
120 | volatile __u32 CAM_Adr; /* 0x60 */ | |
121 | volatile __u32 CAM_Data; | |
122 | volatile __u32 CAM_Ena; | |
123 | volatile __u32 PROM_Ctl; | |
124 | volatile __u32 PROM_Data; | |
125 | volatile __u32 Algn_Cnt; | |
126 | volatile __u32 CRC_Cnt; | |
127 | volatile __u32 Miss_Cnt; | |
128 | }; | |
129 | ||
130 | /* | |
131 | * Bit assignments | |
132 | */ | |
133 | /* DMA_Ctl bit asign ------------------------------------------------------- */ | |
eea221ce AN |
134 | #define DMA_RxAlign 0x00c00000 /* 1:Reception Alignment */ |
135 | #define DMA_RxAlign_1 0x00400000 | |
136 | #define DMA_RxAlign_2 0x00800000 | |
137 | #define DMA_RxAlign_3 0x00c00000 | |
138 | #define DMA_M66EnStat 0x00080000 /* 1:66MHz Enable State */ | |
1da177e4 LT |
139 | #define DMA_IntMask 0x00040000 /* 1:Interupt mask */ |
140 | #define DMA_SWIntReq 0x00020000 /* 1:Software Interrupt request */ | |
141 | #define DMA_TxWakeUp 0x00010000 /* 1:Transmit Wake Up */ | |
142 | #define DMA_RxBigE 0x00008000 /* 1:Receive Big Endian */ | |
143 | #define DMA_TxBigE 0x00004000 /* 1:Transmit Big Endian */ | |
144 | #define DMA_TestMode 0x00002000 /* 1:Test Mode */ | |
145 | #define DMA_PowrMgmnt 0x00001000 /* 1:Power Management */ | |
146 | #define DMA_DmBurst_Mask 0x000001fc /* DMA Burst size */ | |
147 | ||
148 | /* RxFragSize bit asign ---------------------------------------------------- */ | |
149 | #define RxFrag_EnPack 0x00008000 /* 1:Enable Packing */ | |
150 | #define RxFrag_MinFragMask 0x00000ffc /* Minimum Fragment */ | |
151 | ||
152 | /* MAC_Ctl bit asign ------------------------------------------------------- */ | |
153 | #define MAC_Link10 0x00008000 /* 1:Link Status 10Mbits */ | |
154 | #define MAC_EnMissRoll 0x00002000 /* 1:Enable Missed Roll */ | |
155 | #define MAC_MissRoll 0x00000400 /* 1:Missed Roll */ | |
156 | #define MAC_Loop10 0x00000080 /* 1:Loop 10 Mbps */ | |
157 | #define MAC_Conn_Auto 0x00000000 /*00:Connection mode (Automatic) */ | |
158 | #define MAC_Conn_10M 0x00000020 /*01: (10Mbps endec)*/ | |
159 | #define MAC_Conn_Mll 0x00000040 /*10: (Mll clock) */ | |
160 | #define MAC_MacLoop 0x00000010 /* 1:MAC Loopback */ | |
161 | #define MAC_FullDup 0x00000008 /* 1:Full Duplex 0:Half Duplex */ | |
162 | #define MAC_Reset 0x00000004 /* 1:Software Reset */ | |
163 | #define MAC_HaltImm 0x00000002 /* 1:Halt Immediate */ | |
164 | #define MAC_HaltReq 0x00000001 /* 1:Halt request */ | |
165 | ||
166 | /* PROM_Ctl bit asign ------------------------------------------------------ */ | |
167 | #define PROM_Busy 0x00008000 /* 1:Busy (Start Operation) */ | |
168 | #define PROM_Read 0x00004000 /*10:Read operation */ | |
169 | #define PROM_Write 0x00002000 /*01:Write operation */ | |
170 | #define PROM_Erase 0x00006000 /*11:Erase operation */ | |
171 | /*00:Enable or Disable Writting, */ | |
172 | /* as specified in PROM_Addr. */ | |
173 | #define PROM_Addr_Ena 0x00000030 /*11xxxx:PROM Write enable */ | |
174 | /*00xxxx: disable */ | |
175 | ||
176 | /* CAM_Ctl bit asign ------------------------------------------------------- */ | |
177 | #define CAM_CompEn 0x00000010 /* 1:CAM Compare Enable */ | |
178 | #define CAM_NegCAM 0x00000008 /* 1:Reject packets CAM recognizes,*/ | |
179 | /* accept other */ | |
180 | #define CAM_BroadAcc 0x00000004 /* 1:Broadcast assept */ | |
181 | #define CAM_GroupAcc 0x00000002 /* 1:Multicast assept */ | |
182 | #define CAM_StationAcc 0x00000001 /* 1:unicast accept */ | |
183 | ||
184 | /* CAM_Ena bit asign ------------------------------------------------------- */ | |
185 | #define CAM_ENTRY_MAX 21 /* CAM Data entry max count */ | |
186 | #define CAM_Ena_Mask ((1<<CAM_ENTRY_MAX)-1) /* CAM Enable bits (Max 21bits) */ | |
187 | #define CAM_Ena_Bit(index) (1<<(index)) | |
188 | #define CAM_ENTRY_DESTINATION 0 | |
189 | #define CAM_ENTRY_SOURCE 1 | |
190 | #define CAM_ENTRY_MACCTL 20 | |
191 | ||
192 | /* Tx_Ctl bit asign -------------------------------------------------------- */ | |
193 | #define Tx_En 0x00000001 /* 1:Transmit enable */ | |
194 | #define Tx_TxHalt 0x00000002 /* 1:Transmit Halt Request */ | |
195 | #define Tx_NoPad 0x00000004 /* 1:Suppress Padding */ | |
196 | #define Tx_NoCRC 0x00000008 /* 1:Suppress Padding */ | |
197 | #define Tx_FBack 0x00000010 /* 1:Fast Back-off */ | |
198 | #define Tx_EnUnder 0x00000100 /* 1:Enable Underrun */ | |
199 | #define Tx_EnExDefer 0x00000200 /* 1:Enable Excessive Deferral */ | |
200 | #define Tx_EnLCarr 0x00000400 /* 1:Enable Lost Carrier */ | |
201 | #define Tx_EnExColl 0x00000800 /* 1:Enable Excessive Collision */ | |
202 | #define Tx_EnLateColl 0x00001000 /* 1:Enable Late Collision */ | |
203 | #define Tx_EnTxPar 0x00002000 /* 1:Enable Transmit Parity */ | |
204 | #define Tx_EnComp 0x00004000 /* 1:Enable Completion */ | |
205 | ||
206 | /* Tx_Stat bit asign ------------------------------------------------------- */ | |
207 | #define Tx_TxColl_MASK 0x0000000F /* Tx Collision Count */ | |
208 | #define Tx_ExColl 0x00000010 /* Excessive Collision */ | |
209 | #define Tx_TXDefer 0x00000020 /* Transmit Defered */ | |
210 | #define Tx_Paused 0x00000040 /* Transmit Paused */ | |
211 | #define Tx_IntTx 0x00000080 /* Interrupt on Tx */ | |
212 | #define Tx_Under 0x00000100 /* Underrun */ | |
213 | #define Tx_Defer 0x00000200 /* Deferral */ | |
214 | #define Tx_NCarr 0x00000400 /* No Carrier */ | |
215 | #define Tx_10Stat 0x00000800 /* 10Mbps Status */ | |
216 | #define Tx_LateColl 0x00001000 /* Late Collision */ | |
217 | #define Tx_TxPar 0x00002000 /* Tx Parity Error */ | |
218 | #define Tx_Comp 0x00004000 /* Completion */ | |
219 | #define Tx_Halted 0x00008000 /* Tx Halted */ | |
220 | #define Tx_SQErr 0x00010000 /* Signal Quality Error(SQE) */ | |
221 | ||
222 | /* Rx_Ctl bit asign -------------------------------------------------------- */ | |
223 | #define Rx_EnGood 0x00004000 /* 1:Enable Good */ | |
224 | #define Rx_EnRxPar 0x00002000 /* 1:Enable Receive Parity */ | |
225 | #define Rx_EnLongErr 0x00000800 /* 1:Enable Long Error */ | |
226 | #define Rx_EnOver 0x00000400 /* 1:Enable OverFlow */ | |
227 | #define Rx_EnCRCErr 0x00000200 /* 1:Enable CRC Error */ | |
228 | #define Rx_EnAlign 0x00000100 /* 1:Enable Alignment */ | |
229 | #define Rx_IgnoreCRC 0x00000040 /* 1:Ignore CRC Value */ | |
230 | #define Rx_StripCRC 0x00000010 /* 1:Strip CRC Value */ | |
231 | #define Rx_ShortEn 0x00000008 /* 1:Short Enable */ | |
232 | #define Rx_LongEn 0x00000004 /* 1:Long Enable */ | |
233 | #define Rx_RxHalt 0x00000002 /* 1:Receive Halt Request */ | |
234 | #define Rx_RxEn 0x00000001 /* 1:Receive Intrrupt Enable */ | |
235 | ||
236 | /* Rx_Stat bit asign ------------------------------------------------------- */ | |
237 | #define Rx_Halted 0x00008000 /* Rx Halted */ | |
238 | #define Rx_Good 0x00004000 /* Rx Good */ | |
239 | #define Rx_RxPar 0x00002000 /* Rx Parity Error */ | |
240 | /* 0x00001000 not use */ | |
241 | #define Rx_LongErr 0x00000800 /* Rx Long Error */ | |
242 | #define Rx_Over 0x00000400 /* Rx Overflow */ | |
243 | #define Rx_CRCErr 0x00000200 /* Rx CRC Error */ | |
244 | #define Rx_Align 0x00000100 /* Rx Alignment Error */ | |
245 | #define Rx_10Stat 0x00000080 /* Rx 10Mbps Status */ | |
246 | #define Rx_IntRx 0x00000040 /* Rx Interrupt */ | |
247 | #define Rx_CtlRecd 0x00000020 /* Rx Control Receive */ | |
248 | ||
249 | #define Rx_Stat_Mask 0x0000EFC0 /* Rx All Status Mask */ | |
250 | ||
251 | /* Int_En bit asign -------------------------------------------------------- */ | |
252 | #define Int_NRAbtEn 0x00000800 /* 1:Non-recoverable Abort Enable */ | |
253 | #define Int_TxCtlCmpEn 0x00000400 /* 1:Transmit Control Complete Enable */ | |
254 | #define Int_DmParErrEn 0x00000200 /* 1:DMA Parity Error Enable */ | |
255 | #define Int_DParDEn 0x00000100 /* 1:Data Parity Error Enable */ | |
256 | #define Int_EarNotEn 0x00000080 /* 1:Early Notify Enable */ | |
257 | #define Int_DParErrEn 0x00000040 /* 1:Detected Parity Error Enable */ | |
258 | #define Int_SSysErrEn 0x00000020 /* 1:Signalled System Error Enable */ | |
259 | #define Int_RMasAbtEn 0x00000010 /* 1:Received Master Abort Enable */ | |
260 | #define Int_RTargAbtEn 0x00000008 /* 1:Received Target Abort Enable */ | |
261 | #define Int_STargAbtEn 0x00000004 /* 1:Signalled Target Abort Enable */ | |
262 | #define Int_BLExEn 0x00000002 /* 1:Buffer List Exhausted Enable */ | |
263 | #define Int_FDAExEn 0x00000001 /* 1:Free Descriptor Area */ | |
264 | /* Exhausted Enable */ | |
265 | ||
266 | /* Int_Src bit asign ------------------------------------------------------- */ | |
267 | #define Int_NRabt 0x00004000 /* 1:Non Recoverable error */ | |
268 | #define Int_DmParErrStat 0x00002000 /* 1:DMA Parity Error & Clear */ | |
269 | #define Int_BLEx 0x00001000 /* 1:Buffer List Empty & Clear */ | |
270 | #define Int_FDAEx 0x00000800 /* 1:FDA Empty & Clear */ | |
271 | #define Int_IntNRAbt 0x00000400 /* 1:Non Recoverable Abort */ | |
272 | #define Int_IntCmp 0x00000200 /* 1:MAC control packet complete */ | |
273 | #define Int_IntExBD 0x00000100 /* 1:Interrupt Extra BD & Clear */ | |
274 | #define Int_DmParErr 0x00000080 /* 1:DMA Parity Error & Clear */ | |
275 | #define Int_IntEarNot 0x00000040 /* 1:Receive Data write & Clear */ | |
276 | #define Int_SWInt 0x00000020 /* 1:Software request & Clear */ | |
277 | #define Int_IntBLEx 0x00000010 /* 1:Buffer List Empty & Clear */ | |
278 | #define Int_IntFDAEx 0x00000008 /* 1:FDA Empty & Clear */ | |
279 | #define Int_IntPCI 0x00000004 /* 1:PCI controller & Clear */ | |
280 | #define Int_IntMacRx 0x00000002 /* 1:Rx controller & Clear */ | |
281 | #define Int_IntMacTx 0x00000001 /* 1:Tx controller & Clear */ | |
282 | ||
283 | /* MD_CA bit asign --------------------------------------------------------- */ | |
284 | #define MD_CA_PreSup 0x00001000 /* 1:Preamble Supress */ | |
285 | #define MD_CA_Busy 0x00000800 /* 1:Busy (Start Operation) */ | |
286 | #define MD_CA_Wr 0x00000400 /* 1:Write 0:Read */ | |
287 | ||
288 | ||
1da177e4 LT |
289 | /* |
290 | * Descriptors | |
291 | */ | |
292 | ||
293 | /* Frame descripter */ | |
294 | struct FDesc { | |
295 | volatile __u32 FDNext; | |
296 | volatile __u32 FDSystem; | |
297 | volatile __u32 FDStat; | |
298 | volatile __u32 FDCtl; | |
299 | }; | |
300 | ||
301 | /* Buffer descripter */ | |
302 | struct BDesc { | |
303 | volatile __u32 BuffData; | |
304 | volatile __u32 BDCtl; | |
305 | }; | |
306 | ||
307 | #define FD_ALIGN 16 | |
308 | ||
309 | /* Frame Descripter bit asign ---------------------------------------------- */ | |
310 | #define FD_FDLength_MASK 0x0000FFFF /* Length MASK */ | |
311 | #define FD_BDCnt_MASK 0x001F0000 /* BD count MASK in FD */ | |
312 | #define FD_FrmOpt_MASK 0x7C000000 /* Frame option MASK */ | |
313 | #define FD_FrmOpt_BigEndian 0x40000000 /* Tx/Rx */ | |
314 | #define FD_FrmOpt_IntTx 0x20000000 /* Tx only */ | |
315 | #define FD_FrmOpt_NoCRC 0x10000000 /* Tx only */ | |
316 | #define FD_FrmOpt_NoPadding 0x08000000 /* Tx only */ | |
317 | #define FD_FrmOpt_Packing 0x04000000 /* Rx only */ | |
318 | #define FD_CownsFD 0x80000000 /* FD Controller owner bit */ | |
319 | #define FD_Next_EOL 0x00000001 /* FD EOL indicator */ | |
320 | #define FD_BDCnt_SHIFT 16 | |
321 | ||
322 | /* Buffer Descripter bit asign --------------------------------------------- */ | |
323 | #define BD_BuffLength_MASK 0x0000FFFF /* Recieve Data Size */ | |
324 | #define BD_RxBDID_MASK 0x00FF0000 /* BD ID Number MASK */ | |
325 | #define BD_RxBDSeqN_MASK 0x7F000000 /* Rx BD Sequence Number */ | |
326 | #define BD_CownsBD 0x80000000 /* BD Controller owner bit */ | |
327 | #define BD_RxBDID_SHIFT 16 | |
328 | #define BD_RxBDSeqN_SHIFT 24 | |
329 | ||
330 | ||
331 | /* Some useful constants. */ | |
332 | #undef NO_CHECK_CARRIER /* Does not check No-Carrier with TP */ | |
333 | ||
334 | #ifdef NO_CHECK_CARRIER | |
335 | #define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \ | |
eea221ce AN |
336 | Tx_EnExColl | Tx_EnExDefer | Tx_EnUnder | \ |
337 | Tx_En) /* maybe 0x7b01 */ | |
1da177e4 LT |
338 | #else |
339 | #define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \ | |
eea221ce AN |
340 | Tx_EnExColl | Tx_EnLCarr | Tx_EnExDefer | Tx_EnUnder | \ |
341 | Tx_En) /* maybe 0x7b01 */ | |
1da177e4 LT |
342 | #endif |
343 | #define RX_CTL_CMD (Rx_EnGood | Rx_EnRxPar | Rx_EnLongErr | Rx_EnOver \ | |
344 | | Rx_EnCRCErr | Rx_EnAlign | Rx_RxEn) /* maybe 0x6f01 */ | |
1da177e4 | 345 | #define INT_EN_CMD (Int_NRAbtEn | \ |
eea221ce | 346 | Int_DmParErrEn | Int_DParDEn | Int_DParErrEn | \ |
1da177e4 LT |
347 | Int_SSysErrEn | Int_RMasAbtEn | Int_RTargAbtEn | \ |
348 | Int_STargAbtEn | \ | |
349 | Int_BLExEn | Int_FDAExEn) /* maybe 0xb7f*/ | |
eea221ce AN |
350 | #define DMA_CTL_CMD DMA_BURST_SIZE |
351 | #define HAVE_DMA_RXALIGN(lp) likely((lp)->boardtype != TC35815CF) | |
1da177e4 LT |
352 | |
353 | /* Tuning parameters */ | |
354 | #define DMA_BURST_SIZE 32 | |
355 | #define TX_THRESHOLD 1024 | |
eea221ce AN |
356 | #define TX_THRESHOLD_MAX 1536 /* used threshold with packet max byte for low pci transfer ability.*/ |
357 | #define TX_THRESHOLD_KEEP_LIMIT 10 /* setting threshold max value when overrun error occured this count. */ | |
1da177e4 | 358 | |
eea221ce AN |
359 | /* 16 + RX_BUF_NUM * 8 + RX_FD_NUM * 16 + TX_FD_NUM * 32 <= PAGE_SIZE*FD_PAGE_NUM */ |
360 | #ifdef TC35815_USE_PACKEDBUFFER | |
1da177e4 | 361 | #define FD_PAGE_NUM 2 |
eea221ce | 362 | #define RX_BUF_NUM 8 /* >= 2 */ |
1da177e4 LT |
363 | #define RX_FD_NUM 250 /* >= 32 */ |
364 | #define TX_FD_NUM 128 | |
eea221ce AN |
365 | #define RX_BUF_SIZE PAGE_SIZE |
366 | #else /* TC35815_USE_PACKEDBUFFER */ | |
367 | #define FD_PAGE_NUM 4 | |
368 | #define RX_BUF_NUM 128 /* < 256 */ | |
369 | #define RX_FD_NUM 256 /* >= 32 */ | |
370 | #define TX_FD_NUM 128 | |
371 | #if RX_CTL_CMD & Rx_LongEn | |
372 | #define RX_BUF_SIZE PAGE_SIZE | |
373 | #elif RX_CTL_CMD & Rx_StripCRC | |
374 | #define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 4 + 2, 32) /* +2: reserve */ | |
375 | #else | |
376 | #define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 2, 32) /* +2: reserve */ | |
377 | #endif | |
378 | #endif /* TC35815_USE_PACKEDBUFFER */ | |
379 | #define RX_FD_RESERVE (2 / 2) /* max 2 BD per RxFD */ | |
380 | #define NAPI_WEIGHT 16 | |
1da177e4 LT |
381 | |
382 | struct TxFD { | |
383 | struct FDesc fd; | |
384 | struct BDesc bd; | |
385 | struct BDesc unused; | |
386 | }; | |
387 | ||
388 | struct RxFD { | |
389 | struct FDesc fd; | |
390 | struct BDesc bd[0]; /* variable length */ | |
391 | }; | |
392 | ||
393 | struct FrFD { | |
394 | struct FDesc fd; | |
eea221ce | 395 | struct BDesc bd[RX_BUF_NUM]; |
1da177e4 LT |
396 | }; |
397 | ||
398 | ||
eea221ce AN |
399 | #define tc_readl(addr) readl(addr) |
400 | #define tc_writel(d, addr) writel(d, addr) | |
1da177e4 | 401 | |
eea221ce AN |
402 | #define TC35815_TX_TIMEOUT msecs_to_jiffies(400) |
403 | ||
404 | /* Timer state engine. */ | |
405 | enum tc35815_timer_state { | |
406 | arbwait = 0, /* Waiting for auto negotiation to complete. */ | |
407 | lupwait = 1, /* Auto-neg complete, awaiting link-up status. */ | |
408 | ltrywait = 2, /* Forcing try of all modes, from fastest to slowest. */ | |
409 | asleep = 3, /* Time inactive. */ | |
410 | lcheck = 4, /* Check link status. */ | |
411 | }; | |
1da177e4 LT |
412 | |
413 | /* Information that need to be kept for each board. */ | |
414 | struct tc35815_local { | |
eea221ce | 415 | struct pci_dev *pci_dev; |
1da177e4 | 416 | |
bea3348e SH |
417 | struct net_device *dev; |
418 | struct napi_struct napi; | |
419 | ||
1da177e4 | 420 | /* statistics */ |
1da177e4 LT |
421 | struct { |
422 | int max_tx_qlen; | |
423 | int tx_ints; | |
424 | int rx_ints; | |
eea221ce | 425 | int tx_underrun; |
1da177e4 LT |
426 | } lstats; |
427 | ||
eea221ce AN |
428 | /* Tx control lock. This protects the transmit buffer ring |
429 | * state along with the "tx full" state of the driver. This | |
430 | * means all netif_queue flow control actions are protected | |
431 | * by this lock as well. | |
432 | */ | |
433 | spinlock_t lock; | |
434 | ||
435 | int phy_addr; | |
1da177e4 | 436 | int fullduplex; |
eea221ce AN |
437 | unsigned short saved_lpa; |
438 | struct timer_list timer; | |
439 | enum tc35815_timer_state timer_state; /* State of auto-neg timer. */ | |
440 | unsigned int timer_ticks; /* Number of clicks at each state */ | |
1da177e4 LT |
441 | |
442 | /* | |
443 | * Transmitting: Batch Mode. | |
444 | * 1 BD in 1 TxFD. | |
eea221ce | 445 | * Receiving: Packing Mode. (TC35815_USE_PACKEDBUFFER) |
1da177e4 | 446 | * 1 circular FD for Free Buffer List. |
eea221ce | 447 | * RX_BUF_NUM BD in Free Buffer FD. |
1da177e4 | 448 | * One Free Buffer BD has PAGE_SIZE data buffer. |
eea221ce AN |
449 | * Or Non-Packing Mode. |
450 | * 1 circular FD for Free Buffer List. | |
451 | * RX_BUF_NUM BD in Free Buffer FD. | |
452 | * One Free Buffer BD has ETH_FRAME_LEN data buffer. | |
1da177e4 | 453 | */ |
eea221ce AN |
454 | void * fd_buf; /* for TxFD, RxFD, FrFD */ |
455 | dma_addr_t fd_buf_dma; | |
1da177e4 | 456 | struct TxFD *tfd_base; |
eea221ce AN |
457 | unsigned int tfd_start; |
458 | unsigned int tfd_end; | |
1da177e4 LT |
459 | struct RxFD *rfd_base; |
460 | struct RxFD *rfd_limit; | |
461 | struct RxFD *rfd_cur; | |
462 | struct FrFD *fbl_ptr; | |
eea221ce | 463 | #ifdef TC35815_USE_PACKEDBUFFER |
1da177e4 | 464 | unsigned char fbl_curid; |
eea221ce AN |
465 | void * data_buf[RX_BUF_NUM]; /* packing */ |
466 | dma_addr_t data_buf_dma[RX_BUF_NUM]; | |
467 | struct { | |
468 | struct sk_buff *skb; | |
469 | dma_addr_t skb_dma; | |
470 | } tx_skbs[TX_FD_NUM]; | |
471 | #else | |
472 | unsigned int fbl_count; | |
473 | struct { | |
474 | struct sk_buff *skb; | |
475 | dma_addr_t skb_dma; | |
476 | } tx_skbs[TX_FD_NUM], rx_skbs[RX_BUF_NUM]; | |
477 | #endif | |
478 | struct mii_if_info mii; | |
479 | unsigned short mii_id[2]; | |
480 | u32 msg_enable; | |
481 | board_t boardtype; | |
1da177e4 LT |
482 | }; |
483 | ||
eea221ce AN |
484 | static inline dma_addr_t fd_virt_to_bus(struct tc35815_local *lp, void *virt) |
485 | { | |
486 | return lp->fd_buf_dma + ((u8 *)virt - (u8 *)lp->fd_buf); | |
487 | } | |
488 | #ifdef DEBUG | |
489 | static inline void *fd_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus) | |
490 | { | |
491 | return (void *)((u8 *)lp->fd_buf + (bus - lp->fd_buf_dma)); | |
492 | } | |
493 | #endif | |
494 | #ifdef TC35815_USE_PACKEDBUFFER | |
495 | static inline void *rxbuf_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus) | |
496 | { | |
497 | int i; | |
498 | for (i = 0; i < RX_BUF_NUM; i++) { | |
499 | if (bus >= lp->data_buf_dma[i] && | |
500 | bus < lp->data_buf_dma[i] + PAGE_SIZE) | |
501 | return (void *)((u8 *)lp->data_buf[i] + | |
502 | (bus - lp->data_buf_dma[i])); | |
503 | } | |
504 | return NULL; | |
505 | } | |
506 | ||
507 | #define TC35815_DMA_SYNC_ONDEMAND | |
508 | static void* alloc_rxbuf_page(struct pci_dev *hwdev, dma_addr_t *dma_handle) | |
509 | { | |
510 | #ifdef TC35815_DMA_SYNC_ONDEMAND | |
511 | void *buf; | |
512 | /* pci_map + pci_dma_sync will be more effective than | |
513 | * pci_alloc_consistent on some archs. */ | |
514 | if ((buf = (void *)__get_free_page(GFP_ATOMIC)) == NULL) | |
515 | return NULL; | |
516 | *dma_handle = pci_map_single(hwdev, buf, PAGE_SIZE, | |
517 | PCI_DMA_FROMDEVICE); | |
518 | if (pci_dma_mapping_error(*dma_handle)) { | |
519 | free_page((unsigned long)buf); | |
520 | return NULL; | |
521 | } | |
522 | return buf; | |
523 | #else | |
524 | return pci_alloc_consistent(hwdev, PAGE_SIZE, dma_handle); | |
525 | #endif | |
526 | } | |
527 | ||
528 | static void free_rxbuf_page(struct pci_dev *hwdev, void *buf, dma_addr_t dma_handle) | |
529 | { | |
530 | #ifdef TC35815_DMA_SYNC_ONDEMAND | |
531 | pci_unmap_single(hwdev, dma_handle, PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
532 | free_page((unsigned long)buf); | |
533 | #else | |
534 | pci_free_consistent(hwdev, PAGE_SIZE, buf, dma_handle); | |
535 | #endif | |
536 | } | |
537 | #else /* TC35815_USE_PACKEDBUFFER */ | |
538 | static struct sk_buff *alloc_rxbuf_skb(struct net_device *dev, | |
539 | struct pci_dev *hwdev, | |
540 | dma_addr_t *dma_handle) | |
541 | { | |
542 | struct sk_buff *skb; | |
543 | skb = dev_alloc_skb(RX_BUF_SIZE); | |
544 | if (!skb) | |
545 | return NULL; | |
eea221ce AN |
546 | *dma_handle = pci_map_single(hwdev, skb->data, RX_BUF_SIZE, |
547 | PCI_DMA_FROMDEVICE); | |
548 | if (pci_dma_mapping_error(*dma_handle)) { | |
549 | dev_kfree_skb_any(skb); | |
550 | return NULL; | |
551 | } | |
552 | skb_reserve(skb, 2); /* make IP header 4byte aligned */ | |
553 | return skb; | |
554 | } | |
555 | ||
556 | static void free_rxbuf_skb(struct pci_dev *hwdev, struct sk_buff *skb, dma_addr_t dma_handle) | |
557 | { | |
558 | pci_unmap_single(hwdev, dma_handle, RX_BUF_SIZE, | |
559 | PCI_DMA_FROMDEVICE); | |
560 | dev_kfree_skb_any(skb); | |
561 | } | |
562 | #endif /* TC35815_USE_PACKEDBUFFER */ | |
1da177e4 | 563 | |
eea221ce | 564 | /* Index to functions, as function prototypes. */ |
1da177e4 LT |
565 | |
566 | static int tc35815_open(struct net_device *dev); | |
567 | static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev); | |
eea221ce AN |
568 | static irqreturn_t tc35815_interrupt(int irq, void *dev_id); |
569 | #ifdef TC35815_NAPI | |
570 | static int tc35815_rx(struct net_device *dev, int limit); | |
bea3348e | 571 | static int tc35815_poll(struct napi_struct *napi, int budget); |
eea221ce | 572 | #else |
1da177e4 | 573 | static void tc35815_rx(struct net_device *dev); |
eea221ce | 574 | #endif |
1da177e4 LT |
575 | static void tc35815_txdone(struct net_device *dev); |
576 | static int tc35815_close(struct net_device *dev); | |
577 | static struct net_device_stats *tc35815_get_stats(struct net_device *dev); | |
578 | static void tc35815_set_multicast_list(struct net_device *dev); | |
eea221ce AN |
579 | static void tc35815_tx_timeout(struct net_device *dev); |
580 | static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); | |
581 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
582 | static void tc35815_poll_controller(struct net_device *dev); | |
583 | #endif | |
584 | static const struct ethtool_ops tc35815_ethtool_ops; | |
1da177e4 | 585 | |
eea221ce | 586 | /* Example routines you must write ;->. */ |
1da177e4 LT |
587 | static void tc35815_chip_reset(struct net_device *dev); |
588 | static void tc35815_chip_init(struct net_device *dev); | |
eea221ce | 589 | static void tc35815_find_phy(struct net_device *dev); |
1da177e4 LT |
590 | static void tc35815_phy_chip_init(struct net_device *dev); |
591 | ||
eea221ce AN |
592 | #ifdef DEBUG |
593 | static void panic_queues(struct net_device *dev); | |
594 | #endif | |
1da177e4 | 595 | |
eea221ce AN |
596 | static void tc35815_timer(unsigned long data); |
597 | static void tc35815_start_auto_negotiation(struct net_device *dev, | |
598 | struct ethtool_cmd *ep); | |
599 | static int tc_mdio_read(struct net_device *dev, int phy_id, int location); | |
600 | static void tc_mdio_write(struct net_device *dev, int phy_id, int location, | |
601 | int val); | |
1da177e4 | 602 | |
bd43da8f AN |
603 | #ifdef CONFIG_CPU_TX49XX |
604 | /* | |
605 | * Find a platform_device providing a MAC address. The platform code | |
606 | * should provide a "tc35815-mac" device with a MAC address in its | |
607 | * platform_data. | |
608 | */ | |
609 | static int __devinit tc35815_mac_match(struct device *dev, void *data) | |
610 | { | |
611 | struct platform_device *plat_dev = to_platform_device(dev); | |
612 | struct pci_dev *pci_dev = data; | |
06675e6f | 613 | unsigned int id = pci_dev->irq; |
bd43da8f AN |
614 | return !strcmp(plat_dev->name, "tc35815-mac") && plat_dev->id == id; |
615 | } | |
616 | ||
617 | static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev) | |
618 | { | |
619 | struct tc35815_local *lp = dev->priv; | |
620 | struct device *pd = bus_find_device(&platform_bus_type, NULL, | |
621 | lp->pci_dev, tc35815_mac_match); | |
622 | if (pd) { | |
623 | if (pd->platform_data) | |
624 | memcpy(dev->dev_addr, pd->platform_data, ETH_ALEN); | |
625 | put_device(pd); | |
626 | return is_valid_ether_addr(dev->dev_addr) ? 0 : -ENODEV; | |
627 | } | |
628 | return -ENODEV; | |
629 | } | |
630 | #else | |
308a9068 | 631 | static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev) |
bd43da8f AN |
632 | { |
633 | return -ENODEV; | |
634 | } | |
635 | #endif | |
636 | ||
637 | static int __devinit tc35815_init_dev_addr (struct net_device *dev) | |
eea221ce AN |
638 | { |
639 | struct tc35815_regs __iomem *tr = | |
640 | (struct tc35815_regs __iomem *)dev->base_addr; | |
641 | int i; | |
642 | ||
eea221ce AN |
643 | while (tc_readl(&tr->PROM_Ctl) & PROM_Busy) |
644 | ; | |
645 | for (i = 0; i < 6; i += 2) { | |
646 | unsigned short data; | |
647 | tc_writel(PROM_Busy | PROM_Read | (i / 2 + 2), &tr->PROM_Ctl); | |
648 | while (tc_readl(&tr->PROM_Ctl) & PROM_Busy) | |
649 | ; | |
650 | data = tc_readl(&tr->PROM_Data); | |
651 | dev->dev_addr[i] = data & 0xff; | |
652 | dev->dev_addr[i+1] = data >> 8; | |
653 | } | |
bd43da8f AN |
654 | if (!is_valid_ether_addr(dev->dev_addr)) |
655 | return tc35815_read_plat_dev_addr(dev); | |
656 | return 0; | |
eea221ce | 657 | } |
1da177e4 | 658 | |
eea221ce AN |
659 | static int __devinit tc35815_init_one (struct pci_dev *pdev, |
660 | const struct pci_device_id *ent) | |
1da177e4 | 661 | { |
eea221ce AN |
662 | void __iomem *ioaddr = NULL; |
663 | struct net_device *dev; | |
664 | struct tc35815_local *lp; | |
665 | int rc; | |
666 | unsigned long mmio_start, mmio_end, mmio_flags, mmio_len; | |
958eb80b | 667 | DECLARE_MAC_BUF(mac); |
eea221ce AN |
668 | |
669 | static int printed_version; | |
670 | if (!printed_version++) { | |
671 | printk(version); | |
672 | dev_printk(KERN_DEBUG, &pdev->dev, | |
673 | "speed:%d duplex:%d doforce:%d\n", | |
674 | options.speed, options.duplex, options.doforce); | |
675 | } | |
676 | ||
677 | if (!pdev->irq) { | |
678 | dev_warn(&pdev->dev, "no IRQ assigned.\n"); | |
679 | return -ENODEV; | |
680 | } | |
1da177e4 | 681 | |
eea221ce AN |
682 | /* dev zeroed in alloc_etherdev */ |
683 | dev = alloc_etherdev (sizeof (*lp)); | |
684 | if (dev == NULL) { | |
685 | dev_err(&pdev->dev, "unable to alloc new ethernet\n"); | |
686 | return -ENOMEM; | |
687 | } | |
eea221ce AN |
688 | SET_NETDEV_DEV(dev, &pdev->dev); |
689 | lp = dev->priv; | |
bea3348e | 690 | lp->dev = dev; |
1da177e4 | 691 | |
eea221ce AN |
692 | /* enable device (incl. PCI PM wakeup), and bus-mastering */ |
693 | rc = pci_enable_device (pdev); | |
694 | if (rc) | |
695 | goto err_out; | |
1da177e4 | 696 | |
eea221ce AN |
697 | mmio_start = pci_resource_start (pdev, 1); |
698 | mmio_end = pci_resource_end (pdev, 1); | |
699 | mmio_flags = pci_resource_flags (pdev, 1); | |
700 | mmio_len = pci_resource_len (pdev, 1); | |
1da177e4 | 701 | |
eea221ce AN |
702 | /* set this immediately, we need to know before |
703 | * we talk to the chip directly */ | |
1da177e4 | 704 | |
eea221ce AN |
705 | /* make sure PCI base addr 1 is MMIO */ |
706 | if (!(mmio_flags & IORESOURCE_MEM)) { | |
707 | dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n"); | |
708 | rc = -ENODEV; | |
1da177e4 LT |
709 | goto err_out; |
710 | } | |
eea221ce AN |
711 | |
712 | /* check for weird/broken PCI region reporting */ | |
713 | if ((mmio_len < sizeof(struct tc35815_regs))) { | |
714 | dev_err(&pdev->dev, "Invalid PCI region size(s), aborting\n"); | |
715 | rc = -ENODEV; | |
1da177e4 LT |
716 | goto err_out; |
717 | } | |
718 | ||
eea221ce AN |
719 | rc = pci_request_regions (pdev, MODNAME); |
720 | if (rc) | |
1da177e4 LT |
721 | goto err_out; |
722 | ||
eea221ce | 723 | pci_set_master (pdev); |
1da177e4 | 724 | |
eea221ce AN |
725 | /* ioremap MMIO region */ |
726 | ioaddr = ioremap (mmio_start, mmio_len); | |
727 | if (ioaddr == NULL) { | |
728 | dev_err(&pdev->dev, "cannot remap MMIO, aborting\n"); | |
729 | rc = -EIO; | |
730 | goto err_out_free_res; | |
731 | } | |
1da177e4 | 732 | |
eea221ce AN |
733 | /* Initialize the device structure. */ |
734 | dev->open = tc35815_open; | |
735 | dev->hard_start_xmit = tc35815_send_packet; | |
736 | dev->stop = tc35815_close; | |
737 | dev->get_stats = tc35815_get_stats; | |
738 | dev->set_multicast_list = tc35815_set_multicast_list; | |
739 | dev->do_ioctl = tc35815_ioctl; | |
740 | dev->ethtool_ops = &tc35815_ethtool_ops; | |
741 | dev->tx_timeout = tc35815_tx_timeout; | |
742 | dev->watchdog_timeo = TC35815_TX_TIMEOUT; | |
743 | #ifdef TC35815_NAPI | |
bea3348e | 744 | netif_napi_add(dev, &lp->napi, tc35815_poll, NAPI_WEIGHT); |
eea221ce AN |
745 | #endif |
746 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
747 | dev->poll_controller = tc35815_poll_controller; | |
748 | #endif | |
1da177e4 | 749 | |
eea221ce AN |
750 | dev->irq = pdev->irq; |
751 | dev->base_addr = (unsigned long) ioaddr; | |
1da177e4 | 752 | |
eea221ce AN |
753 | spin_lock_init(&lp->lock); |
754 | lp->pci_dev = pdev; | |
755 | lp->boardtype = ent->driver_data; | |
1da177e4 | 756 | |
eea221ce AN |
757 | lp->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK; |
758 | pci_set_drvdata(pdev, dev); | |
1da177e4 | 759 | |
eea221ce | 760 | /* Soft reset the chip. */ |
1da177e4 LT |
761 | tc35815_chip_reset(dev); |
762 | ||
eea221ce | 763 | /* Retrieve the ethernet address. */ |
bd43da8f AN |
764 | if (tc35815_init_dev_addr(dev)) { |
765 | dev_warn(&pdev->dev, "not valid ether addr\n"); | |
766 | random_ether_addr(dev->dev_addr); | |
767 | } | |
eea221ce AN |
768 | |
769 | rc = register_netdev (dev); | |
770 | if (rc) | |
771 | goto err_out_unmap; | |
772 | ||
773 | memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); | |
958eb80b | 774 | printk(KERN_INFO "%s: %s at 0x%lx, %s, IRQ %d\n", |
eea221ce AN |
775 | dev->name, |
776 | board_info[ent->driver_data].name, | |
777 | dev->base_addr, | |
958eb80b | 778 | print_mac(mac, dev->dev_addr), |
eea221ce AN |
779 | dev->irq); |
780 | ||
781 | setup_timer(&lp->timer, tc35815_timer, (unsigned long) dev); | |
782 | lp->mii.dev = dev; | |
783 | lp->mii.mdio_read = tc_mdio_read; | |
784 | lp->mii.mdio_write = tc_mdio_write; | |
785 | lp->mii.phy_id_mask = 0x1f; | |
786 | lp->mii.reg_num_mask = 0x1f; | |
787 | tc35815_find_phy(dev); | |
788 | lp->mii.phy_id = lp->phy_addr; | |
789 | lp->mii.full_duplex = 0; | |
790 | lp->mii.force_media = 0; | |
1da177e4 | 791 | |
eea221ce | 792 | return 0; |
1da177e4 | 793 | |
eea221ce AN |
794 | err_out_unmap: |
795 | iounmap(ioaddr); | |
796 | err_out_free_res: | |
797 | pci_release_regions (pdev); | |
798 | err_out: | |
799 | free_netdev (dev); | |
800 | return rc; | |
801 | } | |
1da177e4 | 802 | |
1da177e4 | 803 | |
eea221ce AN |
804 | static void __devexit tc35815_remove_one (struct pci_dev *pdev) |
805 | { | |
806 | struct net_device *dev = pci_get_drvdata (pdev); | |
807 | unsigned long mmio_addr; | |
1da177e4 | 808 | |
eea221ce | 809 | mmio_addr = dev->base_addr; |
1da177e4 | 810 | |
eea221ce | 811 | unregister_netdev (dev); |
1da177e4 | 812 | |
eea221ce AN |
813 | if (mmio_addr) { |
814 | iounmap ((void __iomem *)mmio_addr); | |
815 | pci_release_regions (pdev); | |
816 | } | |
1da177e4 | 817 | |
eea221ce | 818 | free_netdev (dev); |
1da177e4 | 819 | |
eea221ce | 820 | pci_set_drvdata (pdev, NULL); |
1da177e4 LT |
821 | } |
822 | ||
1da177e4 LT |
823 | static int |
824 | tc35815_init_queues(struct net_device *dev) | |
825 | { | |
826 | struct tc35815_local *lp = dev->priv; | |
827 | int i; | |
828 | unsigned long fd_addr; | |
829 | ||
830 | if (!lp->fd_buf) { | |
eea221ce AN |
831 | BUG_ON(sizeof(struct FDesc) + |
832 | sizeof(struct BDesc) * RX_BUF_NUM + | |
833 | sizeof(struct FDesc) * RX_FD_NUM + | |
834 | sizeof(struct TxFD) * TX_FD_NUM > | |
835 | PAGE_SIZE * FD_PAGE_NUM); | |
1da177e4 | 836 | |
eea221ce | 837 | if ((lp->fd_buf = pci_alloc_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM, &lp->fd_buf_dma)) == 0) |
1da177e4 | 838 | return -ENOMEM; |
eea221ce AN |
839 | for (i = 0; i < RX_BUF_NUM; i++) { |
840 | #ifdef TC35815_USE_PACKEDBUFFER | |
841 | if ((lp->data_buf[i] = alloc_rxbuf_page(lp->pci_dev, &lp->data_buf_dma[i])) == NULL) { | |
1da177e4 | 842 | while (--i >= 0) { |
eea221ce AN |
843 | free_rxbuf_page(lp->pci_dev, |
844 | lp->data_buf[i], | |
845 | lp->data_buf_dma[i]); | |
846 | lp->data_buf[i] = NULL; | |
1da177e4 | 847 | } |
eea221ce AN |
848 | pci_free_consistent(lp->pci_dev, |
849 | PAGE_SIZE * FD_PAGE_NUM, | |
850 | lp->fd_buf, | |
851 | lp->fd_buf_dma); | |
852 | lp->fd_buf = NULL; | |
853 | return -ENOMEM; | |
854 | } | |
855 | #else | |
856 | lp->rx_skbs[i].skb = | |
857 | alloc_rxbuf_skb(dev, lp->pci_dev, | |
858 | &lp->rx_skbs[i].skb_dma); | |
859 | if (!lp->rx_skbs[i].skb) { | |
860 | while (--i >= 0) { | |
861 | free_rxbuf_skb(lp->pci_dev, | |
862 | lp->rx_skbs[i].skb, | |
863 | lp->rx_skbs[i].skb_dma); | |
864 | lp->rx_skbs[i].skb = NULL; | |
865 | } | |
866 | pci_free_consistent(lp->pci_dev, | |
867 | PAGE_SIZE * FD_PAGE_NUM, | |
868 | lp->fd_buf, | |
869 | lp->fd_buf_dma); | |
870 | lp->fd_buf = NULL; | |
1da177e4 LT |
871 | return -ENOMEM; |
872 | } | |
1da177e4 LT |
873 | #endif |
874 | } | |
eea221ce AN |
875 | printk(KERN_DEBUG "%s: FD buf %p DataBuf", |
876 | dev->name, lp->fd_buf); | |
877 | #ifdef TC35815_USE_PACKEDBUFFER | |
878 | printk(" DataBuf"); | |
879 | for (i = 0; i < RX_BUF_NUM; i++) | |
880 | printk(" %p", lp->data_buf[i]); | |
1da177e4 | 881 | #endif |
eea221ce | 882 | printk("\n"); |
1da177e4 | 883 | } else { |
eea221ce AN |
884 | for (i = 0; i < FD_PAGE_NUM; i++) { |
885 | clear_page((void *)((unsigned long)lp->fd_buf + i * PAGE_SIZE)); | |
886 | } | |
1da177e4 | 887 | } |
1da177e4 | 888 | fd_addr = (unsigned long)lp->fd_buf; |
1da177e4 LT |
889 | |
890 | /* Free Descriptors (for Receive) */ | |
891 | lp->rfd_base = (struct RxFD *)fd_addr; | |
892 | fd_addr += sizeof(struct RxFD) * RX_FD_NUM; | |
893 | for (i = 0; i < RX_FD_NUM; i++) { | |
894 | lp->rfd_base[i].fd.FDCtl = cpu_to_le32(FD_CownsFD); | |
895 | } | |
896 | lp->rfd_cur = lp->rfd_base; | |
eea221ce | 897 | lp->rfd_limit = (struct RxFD *)fd_addr - (RX_FD_RESERVE + 1); |
1da177e4 LT |
898 | |
899 | /* Transmit Descriptors */ | |
900 | lp->tfd_base = (struct TxFD *)fd_addr; | |
901 | fd_addr += sizeof(struct TxFD) * TX_FD_NUM; | |
902 | for (i = 0; i < TX_FD_NUM; i++) { | |
eea221ce AN |
903 | lp->tfd_base[i].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[i+1])); |
904 | lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff); | |
1da177e4 LT |
905 | lp->tfd_base[i].fd.FDCtl = cpu_to_le32(0); |
906 | } | |
eea221ce | 907 | lp->tfd_base[TX_FD_NUM-1].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[0])); |
1da177e4 LT |
908 | lp->tfd_start = 0; |
909 | lp->tfd_end = 0; | |
910 | ||
911 | /* Buffer List (for Receive) */ | |
912 | lp->fbl_ptr = (struct FrFD *)fd_addr; | |
eea221ce AN |
913 | lp->fbl_ptr->fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, lp->fbl_ptr)); |
914 | lp->fbl_ptr->fd.FDCtl = cpu_to_le32(RX_BUF_NUM | FD_CownsFD); | |
915 | #ifndef TC35815_USE_PACKEDBUFFER | |
916 | /* | |
917 | * move all allocated skbs to head of rx_skbs[] array. | |
918 | * fbl_count mighe not be RX_BUF_NUM if alloc_rxbuf_skb() in | |
919 | * tc35815_rx() had failed. | |
920 | */ | |
921 | lp->fbl_count = 0; | |
922 | for (i = 0; i < RX_BUF_NUM; i++) { | |
923 | if (lp->rx_skbs[i].skb) { | |
924 | if (i != lp->fbl_count) { | |
925 | lp->rx_skbs[lp->fbl_count].skb = | |
926 | lp->rx_skbs[i].skb; | |
927 | lp->rx_skbs[lp->fbl_count].skb_dma = | |
928 | lp->rx_skbs[i].skb_dma; | |
929 | } | |
930 | lp->fbl_count++; | |
931 | } | |
932 | } | |
933 | #endif | |
934 | for (i = 0; i < RX_BUF_NUM; i++) { | |
935 | #ifdef TC35815_USE_PACKEDBUFFER | |
936 | lp->fbl_ptr->bd[i].BuffData = cpu_to_le32(lp->data_buf_dma[i]); | |
937 | #else | |
938 | if (i >= lp->fbl_count) { | |
939 | lp->fbl_ptr->bd[i].BuffData = 0; | |
940 | lp->fbl_ptr->bd[i].BDCtl = 0; | |
941 | continue; | |
942 | } | |
943 | lp->fbl_ptr->bd[i].BuffData = | |
944 | cpu_to_le32(lp->rx_skbs[i].skb_dma); | |
945 | #endif | |
1da177e4 LT |
946 | /* BDID is index of FrFD.bd[] */ |
947 | lp->fbl_ptr->bd[i].BDCtl = | |
eea221ce AN |
948 | cpu_to_le32(BD_CownsBD | (i << BD_RxBDID_SHIFT) | |
949 | RX_BUF_SIZE); | |
1da177e4 | 950 | } |
eea221ce | 951 | #ifdef TC35815_USE_PACKEDBUFFER |
1da177e4 | 952 | lp->fbl_curid = 0; |
eea221ce | 953 | #endif |
1da177e4 | 954 | |
eea221ce AN |
955 | printk(KERN_DEBUG "%s: TxFD %p RxFD %p FrFD %p\n", |
956 | dev->name, lp->tfd_base, lp->rfd_base, lp->fbl_ptr); | |
1da177e4 LT |
957 | return 0; |
958 | } | |
959 | ||
960 | static void | |
961 | tc35815_clear_queues(struct net_device *dev) | |
962 | { | |
963 | struct tc35815_local *lp = dev->priv; | |
964 | int i; | |
965 | ||
966 | for (i = 0; i < TX_FD_NUM; i++) { | |
eea221ce AN |
967 | u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem); |
968 | struct sk_buff *skb = | |
969 | fdsystem != 0xffffffff ? | |
970 | lp->tx_skbs[fdsystem].skb : NULL; | |
971 | #ifdef DEBUG | |
972 | if (lp->tx_skbs[i].skb != skb) { | |
973 | printk("%s: tx_skbs mismatch(%d).\n", dev->name, i); | |
974 | panic_queues(dev); | |
975 | } | |
976 | #else | |
977 | BUG_ON(lp->tx_skbs[i].skb != skb); | |
978 | #endif | |
979 | if (skb) { | |
980 | pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE); | |
981 | lp->tx_skbs[i].skb = NULL; | |
982 | lp->tx_skbs[i].skb_dma = 0; | |
1da177e4 | 983 | dev_kfree_skb_any(skb); |
eea221ce AN |
984 | } |
985 | lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff); | |
1da177e4 LT |
986 | } |
987 | ||
988 | tc35815_init_queues(dev); | |
989 | } | |
990 | ||
991 | static void | |
992 | tc35815_free_queues(struct net_device *dev) | |
993 | { | |
994 | struct tc35815_local *lp = dev->priv; | |
995 | int i; | |
996 | ||
997 | if (lp->tfd_base) { | |
998 | for (i = 0; i < TX_FD_NUM; i++) { | |
eea221ce AN |
999 | u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem); |
1000 | struct sk_buff *skb = | |
1001 | fdsystem != 0xffffffff ? | |
1002 | lp->tx_skbs[fdsystem].skb : NULL; | |
1003 | #ifdef DEBUG | |
1004 | if (lp->tx_skbs[i].skb != skb) { | |
1005 | printk("%s: tx_skbs mismatch(%d).\n", dev->name, i); | |
1006 | panic_queues(dev); | |
1007 | } | |
1008 | #else | |
1009 | BUG_ON(lp->tx_skbs[i].skb != skb); | |
1010 | #endif | |
1011 | if (skb) { | |
1012 | dev_kfree_skb(skb); | |
1013 | pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE); | |
1014 | lp->tx_skbs[i].skb = NULL; | |
1015 | lp->tx_skbs[i].skb_dma = 0; | |
1016 | } | |
1017 | lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff); | |
1da177e4 LT |
1018 | } |
1019 | } | |
1020 | ||
1da177e4 LT |
1021 | lp->rfd_base = NULL; |
1022 | lp->rfd_limit = NULL; | |
1023 | lp->rfd_cur = NULL; | |
1024 | lp->fbl_ptr = NULL; | |
1025 | ||
eea221ce AN |
1026 | for (i = 0; i < RX_BUF_NUM; i++) { |
1027 | #ifdef TC35815_USE_PACKEDBUFFER | |
1028 | if (lp->data_buf[i]) { | |
1029 | free_rxbuf_page(lp->pci_dev, | |
1030 | lp->data_buf[i], lp->data_buf_dma[i]); | |
1031 | lp->data_buf[i] = NULL; | |
1032 | } | |
1033 | #else | |
1034 | if (lp->rx_skbs[i].skb) { | |
1035 | free_rxbuf_skb(lp->pci_dev, lp->rx_skbs[i].skb, | |
1036 | lp->rx_skbs[i].skb_dma); | |
1037 | lp->rx_skbs[i].skb = NULL; | |
1038 | } | |
1039 | #endif | |
1040 | } | |
1041 | if (lp->fd_buf) { | |
1042 | pci_free_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM, | |
1043 | lp->fd_buf, lp->fd_buf_dma); | |
1044 | lp->fd_buf = NULL; | |
1da177e4 | 1045 | } |
1da177e4 LT |
1046 | } |
1047 | ||
1048 | static void | |
1049 | dump_txfd(struct TxFD *fd) | |
1050 | { | |
1051 | printk("TxFD(%p): %08x %08x %08x %08x\n", fd, | |
1052 | le32_to_cpu(fd->fd.FDNext), | |
1053 | le32_to_cpu(fd->fd.FDSystem), | |
1054 | le32_to_cpu(fd->fd.FDStat), | |
1055 | le32_to_cpu(fd->fd.FDCtl)); | |
1056 | printk("BD: "); | |
1057 | printk(" %08x %08x", | |
1058 | le32_to_cpu(fd->bd.BuffData), | |
1059 | le32_to_cpu(fd->bd.BDCtl)); | |
1060 | printk("\n"); | |
1061 | } | |
1062 | ||
1063 | static int | |
1064 | dump_rxfd(struct RxFD *fd) | |
1065 | { | |
1066 | int i, bd_count = (le32_to_cpu(fd->fd.FDCtl) & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT; | |
1067 | if (bd_count > 8) | |
1068 | bd_count = 8; | |
1069 | printk("RxFD(%p): %08x %08x %08x %08x\n", fd, | |
1070 | le32_to_cpu(fd->fd.FDNext), | |
1071 | le32_to_cpu(fd->fd.FDSystem), | |
1072 | le32_to_cpu(fd->fd.FDStat), | |
1073 | le32_to_cpu(fd->fd.FDCtl)); | |
1074 | if (le32_to_cpu(fd->fd.FDCtl) & FD_CownsFD) | |
1075 | return 0; | |
1076 | printk("BD: "); | |
1077 | for (i = 0; i < bd_count; i++) | |
1078 | printk(" %08x %08x", | |
1079 | le32_to_cpu(fd->bd[i].BuffData), | |
1080 | le32_to_cpu(fd->bd[i].BDCtl)); | |
1081 | printk("\n"); | |
1082 | return bd_count; | |
1083 | } | |
1084 | ||
eea221ce | 1085 | #if defined(DEBUG) || defined(TC35815_USE_PACKEDBUFFER) |
1da177e4 LT |
1086 | static void |
1087 | dump_frfd(struct FrFD *fd) | |
1088 | { | |
1089 | int i; | |
1090 | printk("FrFD(%p): %08x %08x %08x %08x\n", fd, | |
1091 | le32_to_cpu(fd->fd.FDNext), | |
1092 | le32_to_cpu(fd->fd.FDSystem), | |
1093 | le32_to_cpu(fd->fd.FDStat), | |
1094 | le32_to_cpu(fd->fd.FDCtl)); | |
1095 | printk("BD: "); | |
eea221ce | 1096 | for (i = 0; i < RX_BUF_NUM; i++) |
1da177e4 LT |
1097 | printk(" %08x %08x", |
1098 | le32_to_cpu(fd->bd[i].BuffData), | |
1099 | le32_to_cpu(fd->bd[i].BDCtl)); | |
1100 | printk("\n"); | |
1101 | } | |
eea221ce | 1102 | #endif |
1da177e4 | 1103 | |
eea221ce | 1104 | #ifdef DEBUG |
1da177e4 LT |
1105 | static void |
1106 | panic_queues(struct net_device *dev) | |
1107 | { | |
1108 | struct tc35815_local *lp = dev->priv; | |
1109 | int i; | |
1110 | ||
eea221ce | 1111 | printk("TxFD base %p, start %u, end %u\n", |
1da177e4 LT |
1112 | lp->tfd_base, lp->tfd_start, lp->tfd_end); |
1113 | printk("RxFD base %p limit %p cur %p\n", | |
1114 | lp->rfd_base, lp->rfd_limit, lp->rfd_cur); | |
1115 | printk("FrFD %p\n", lp->fbl_ptr); | |
1116 | for (i = 0; i < TX_FD_NUM; i++) | |
1117 | dump_txfd(&lp->tfd_base[i]); | |
1118 | for (i = 0; i < RX_FD_NUM; i++) { | |
1119 | int bd_count = dump_rxfd(&lp->rfd_base[i]); | |
1120 | i += (bd_count + 1) / 2; /* skip BDs */ | |
1121 | } | |
1122 | dump_frfd(lp->fbl_ptr); | |
1123 | panic("%s: Illegal queue state.", dev->name); | |
1124 | } | |
1da177e4 LT |
1125 | #endif |
1126 | ||
958eb80b | 1127 | static void print_eth(const u8 *add) |
1da177e4 | 1128 | { |
958eb80b | 1129 | DECLARE_MAC_BUF(mac); |
1da177e4 | 1130 | |
958eb80b AN |
1131 | printk(KERN_DEBUG "print_eth(%p)\n", add); |
1132 | printk(KERN_DEBUG " %s =>", print_mac(mac, add + 6)); | |
1133 | printk(KERN_CONT " %s : %02x%02x\n", | |
1134 | print_mac(mac, add), add[12], add[13]); | |
1da177e4 LT |
1135 | } |
1136 | ||
eea221ce AN |
1137 | static int tc35815_tx_full(struct net_device *dev) |
1138 | { | |
1139 | struct tc35815_local *lp = dev->priv; | |
1140 | return ((lp->tfd_start + 1) % TX_FD_NUM == lp->tfd_end); | |
1141 | } | |
1142 | ||
1143 | static void tc35815_restart(struct net_device *dev) | |
1144 | { | |
1145 | struct tc35815_local *lp = dev->priv; | |
1146 | int pid = lp->phy_addr; | |
1147 | int do_phy_reset = 1; | |
1148 | del_timer(&lp->timer); /* Kill if running */ | |
1149 | ||
1150 | if (lp->mii_id[0] == 0x0016 && (lp->mii_id[1] & 0xfc00) == 0xf800) { | |
1151 | /* Resetting PHY cause problem on some chip... (SEEQ 80221) */ | |
1152 | do_phy_reset = 0; | |
1153 | } | |
1154 | if (do_phy_reset) { | |
1155 | int timeout; | |
1156 | tc_mdio_write(dev, pid, MII_BMCR, BMCR_RESET); | |
1157 | timeout = 100; | |
1158 | while (--timeout) { | |
1159 | if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_RESET)) | |
1160 | break; | |
1161 | udelay(1); | |
1162 | } | |
1163 | if (!timeout) | |
1164 | printk(KERN_ERR "%s: BMCR reset failed.\n", dev->name); | |
1165 | } | |
1166 | ||
1167 | tc35815_chip_reset(dev); | |
1168 | tc35815_clear_queues(dev); | |
1169 | tc35815_chip_init(dev); | |
1170 | /* Reconfigure CAM again since tc35815_chip_init() initialize it. */ | |
1171 | tc35815_set_multicast_list(dev); | |
1172 | } | |
1173 | ||
1174 | static void tc35815_tx_timeout(struct net_device *dev) | |
1175 | { | |
1176 | struct tc35815_local *lp = dev->priv; | |
1177 | struct tc35815_regs __iomem *tr = | |
1178 | (struct tc35815_regs __iomem *)dev->base_addr; | |
1179 | ||
1180 | printk(KERN_WARNING "%s: transmit timed out, status %#x\n", | |
1181 | dev->name, tc_readl(&tr->Tx_Stat)); | |
1182 | ||
1183 | /* Try to restart the adaptor. */ | |
1184 | spin_lock_irq(&lp->lock); | |
1185 | tc35815_restart(dev); | |
1186 | spin_unlock_irq(&lp->lock); | |
1187 | ||
c201abd9 | 1188 | dev->stats.tx_errors++; |
eea221ce AN |
1189 | |
1190 | /* If we have space available to accept new transmit | |
1191 | * requests, wake up the queueing layer. This would | |
1192 | * be the case if the chipset_init() call above just | |
1193 | * flushes out the tx queue and empties it. | |
1194 | * | |
1195 | * If instead, the tx queue is retained then the | |
1196 | * netif_wake_queue() call should be placed in the | |
1197 | * TX completion interrupt handler of the driver instead | |
1198 | * of here. | |
1199 | */ | |
1200 | if (!tc35815_tx_full(dev)) | |
1201 | netif_wake_queue(dev); | |
1202 | } | |
1203 | ||
1da177e4 LT |
1204 | /* |
1205 | * Open/initialize the board. This is called (in the current kernel) | |
1206 | * sometime after booting when the 'ifconfig' program is run. | |
1207 | * | |
1208 | * This routine should set everything up anew at each open, even | |
1209 | * registers that "should" only need to be set once at boot, so that | |
1210 | * there is non-reboot way to recover if something goes wrong. | |
1211 | */ | |
1212 | static int | |
1213 | tc35815_open(struct net_device *dev) | |
1214 | { | |
1215 | struct tc35815_local *lp = dev->priv; | |
eea221ce | 1216 | |
1da177e4 LT |
1217 | /* |
1218 | * This is used if the interrupt line can turned off (shared). | |
1219 | * See 3c503.c for an example of selecting the IRQ at config-time. | |
1220 | */ | |
eea221ce | 1221 | if (request_irq(dev->irq, &tc35815_interrupt, IRQF_SHARED, dev->name, dev)) { |
1da177e4 LT |
1222 | return -EAGAIN; |
1223 | } | |
1224 | ||
eea221ce | 1225 | del_timer(&lp->timer); /* Kill if running */ |
1da177e4 LT |
1226 | tc35815_chip_reset(dev); |
1227 | ||
1228 | if (tc35815_init_queues(dev) != 0) { | |
1229 | free_irq(dev->irq, dev); | |
1230 | return -EAGAIN; | |
1231 | } | |
1232 | ||
bea3348e SH |
1233 | #ifdef TC35815_NAPI |
1234 | napi_enable(&lp->napi); | |
1235 | #endif | |
1236 | ||
1da177e4 | 1237 | /* Reset the hardware here. Don't forget to set the station address. */ |
eea221ce | 1238 | spin_lock_irq(&lp->lock); |
1da177e4 | 1239 | tc35815_chip_init(dev); |
eea221ce | 1240 | spin_unlock_irq(&lp->lock); |
1da177e4 | 1241 | |
eea221ce AN |
1242 | /* We are now ready to accept transmit requeusts from |
1243 | * the queueing layer of the networking. | |
1244 | */ | |
1da177e4 LT |
1245 | netif_start_queue(dev); |
1246 | ||
1247 | return 0; | |
1248 | } | |
1249 | ||
eea221ce AN |
1250 | /* This will only be invoked if your driver is _not_ in XOFF state. |
1251 | * What this means is that you need not check it, and that this | |
1252 | * invariant will hold if you make sure that the netif_*_queue() | |
1253 | * calls are done at the proper times. | |
1254 | */ | |
1255 | static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev) | |
1da177e4 LT |
1256 | { |
1257 | struct tc35815_local *lp = dev->priv; | |
eea221ce | 1258 | struct TxFD *txfd; |
1da177e4 LT |
1259 | unsigned long flags; |
1260 | ||
eea221ce AN |
1261 | /* If some error occurs while trying to transmit this |
1262 | * packet, you should return '1' from this function. | |
1263 | * In such a case you _may not_ do anything to the | |
1264 | * SKB, it is still owned by the network queueing | |
1265 | * layer when an error is returned. This means you | |
1266 | * may not modify any SKB fields, you may not free | |
1267 | * the SKB, etc. | |
1268 | */ | |
1269 | ||
1270 | /* This is the most common case for modern hardware. | |
1271 | * The spinlock protects this code from the TX complete | |
1272 | * hardware interrupt handler. Queue flow control is | |
1273 | * thus managed under this lock as well. | |
1274 | */ | |
1da177e4 | 1275 | spin_lock_irqsave(&lp->lock, flags); |
1da177e4 | 1276 | |
eea221ce AN |
1277 | /* failsafe... (handle txdone now if half of FDs are used) */ |
1278 | if ((lp->tfd_start + TX_FD_NUM - lp->tfd_end) % TX_FD_NUM > | |
1279 | TX_FD_NUM / 2) | |
1280 | tc35815_txdone(dev); | |
1281 | ||
1282 | if (netif_msg_pktdata(lp)) | |
1283 | print_eth(skb->data); | |
1284 | #ifdef DEBUG | |
1285 | if (lp->tx_skbs[lp->tfd_start].skb) { | |
1286 | printk("%s: tx_skbs conflict.\n", dev->name); | |
1287 | panic_queues(dev); | |
1da177e4 | 1288 | } |
eea221ce AN |
1289 | #else |
1290 | BUG_ON(lp->tx_skbs[lp->tfd_start].skb); | |
1da177e4 | 1291 | #endif |
eea221ce AN |
1292 | lp->tx_skbs[lp->tfd_start].skb = skb; |
1293 | lp->tx_skbs[lp->tfd_start].skb_dma = pci_map_single(lp->pci_dev, skb->data, skb->len, PCI_DMA_TODEVICE); | |
1294 | ||
1295 | /*add to ring */ | |
1296 | txfd = &lp->tfd_base[lp->tfd_start]; | |
1297 | txfd->bd.BuffData = cpu_to_le32(lp->tx_skbs[lp->tfd_start].skb_dma); | |
1298 | txfd->bd.BDCtl = cpu_to_le32(skb->len); | |
1299 | txfd->fd.FDSystem = cpu_to_le32(lp->tfd_start); | |
1300 | txfd->fd.FDCtl = cpu_to_le32(FD_CownsFD | (1 << FD_BDCnt_SHIFT)); | |
1301 | ||
1302 | if (lp->tfd_start == lp->tfd_end) { | |
1303 | struct tc35815_regs __iomem *tr = | |
1304 | (struct tc35815_regs __iomem *)dev->base_addr; | |
1305 | /* Start DMA Transmitter. */ | |
1306 | txfd->fd.FDNext |= cpu_to_le32(FD_Next_EOL); | |
1da177e4 | 1307 | #ifdef GATHER_TXINT |
eea221ce | 1308 | txfd->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx); |
1da177e4 | 1309 | #endif |
eea221ce AN |
1310 | if (netif_msg_tx_queued(lp)) { |
1311 | printk("%s: starting TxFD.\n", dev->name); | |
1312 | dump_txfd(txfd); | |
1313 | } | |
1314 | tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr); | |
1315 | } else { | |
1316 | txfd->fd.FDNext &= cpu_to_le32(~FD_Next_EOL); | |
1317 | if (netif_msg_tx_queued(lp)) { | |
1318 | printk("%s: queueing TxFD.\n", dev->name); | |
1319 | dump_txfd(txfd); | |
1da177e4 | 1320 | } |
eea221ce AN |
1321 | } |
1322 | lp->tfd_start = (lp->tfd_start + 1) % TX_FD_NUM; | |
1da177e4 | 1323 | |
eea221ce | 1324 | dev->trans_start = jiffies; |
1da177e4 | 1325 | |
eea221ce AN |
1326 | /* If we just used up the very last entry in the |
1327 | * TX ring on this device, tell the queueing | |
1328 | * layer to send no more. | |
1329 | */ | |
1330 | if (tc35815_tx_full(dev)) { | |
1331 | if (netif_msg_tx_queued(lp)) | |
1332 | printk(KERN_WARNING "%s: TxFD Exhausted.\n", dev->name); | |
1333 | netif_stop_queue(dev); | |
1da177e4 LT |
1334 | } |
1335 | ||
eea221ce AN |
1336 | /* When the TX completion hw interrupt arrives, this |
1337 | * is when the transmit statistics are updated. | |
1338 | */ | |
1339 | ||
1340 | spin_unlock_irqrestore(&lp->lock, flags); | |
1da177e4 LT |
1341 | return 0; |
1342 | } | |
1343 | ||
1344 | #define FATAL_ERROR_INT \ | |
1345 | (Int_IntPCI | Int_DmParErr | Int_IntNRAbt) | |
eea221ce | 1346 | static void tc35815_fatal_error_interrupt(struct net_device *dev, u32 status) |
1da177e4 LT |
1347 | { |
1348 | static int count; | |
1349 | printk(KERN_WARNING "%s: Fatal Error Intterrupt (%#x):", | |
1350 | dev->name, status); | |
1da177e4 LT |
1351 | if (status & Int_IntPCI) |
1352 | printk(" IntPCI"); | |
1353 | if (status & Int_DmParErr) | |
1354 | printk(" DmParErr"); | |
1355 | if (status & Int_IntNRAbt) | |
1356 | printk(" IntNRAbt"); | |
1357 | printk("\n"); | |
1358 | if (count++ > 100) | |
1359 | panic("%s: Too many fatal errors.", dev->name); | |
eea221ce | 1360 | printk(KERN_WARNING "%s: Resetting ...\n", dev->name); |
1da177e4 | 1361 | /* Try to restart the adaptor. */ |
eea221ce AN |
1362 | tc35815_restart(dev); |
1363 | } | |
1364 | ||
1365 | #ifdef TC35815_NAPI | |
1366 | static int tc35815_do_interrupt(struct net_device *dev, u32 status, int limit) | |
1367 | #else | |
1368 | static int tc35815_do_interrupt(struct net_device *dev, u32 status) | |
1369 | #endif | |
1370 | { | |
1371 | struct tc35815_local *lp = dev->priv; | |
1372 | struct tc35815_regs __iomem *tr = | |
1373 | (struct tc35815_regs __iomem *)dev->base_addr; | |
1374 | int ret = -1; | |
1375 | ||
1376 | /* Fatal errors... */ | |
1377 | if (status & FATAL_ERROR_INT) { | |
1378 | tc35815_fatal_error_interrupt(dev, status); | |
1379 | return 0; | |
1380 | } | |
1381 | /* recoverable errors */ | |
1382 | if (status & Int_IntFDAEx) { | |
1383 | /* disable FDAEx int. (until we make rooms...) */ | |
1384 | tc_writel(tc_readl(&tr->Int_En) & ~Int_FDAExEn, &tr->Int_En); | |
1385 | printk(KERN_WARNING | |
1386 | "%s: Free Descriptor Area Exhausted (%#x).\n", | |
1387 | dev->name, status); | |
c201abd9 | 1388 | dev->stats.rx_dropped++; |
eea221ce AN |
1389 | ret = 0; |
1390 | } | |
1391 | if (status & Int_IntBLEx) { | |
1392 | /* disable BLEx int. (until we make rooms...) */ | |
1393 | tc_writel(tc_readl(&tr->Int_En) & ~Int_BLExEn, &tr->Int_En); | |
1394 | printk(KERN_WARNING | |
1395 | "%s: Buffer List Exhausted (%#x).\n", | |
1396 | dev->name, status); | |
c201abd9 | 1397 | dev->stats.rx_dropped++; |
eea221ce AN |
1398 | ret = 0; |
1399 | } | |
1400 | if (status & Int_IntExBD) { | |
1401 | printk(KERN_WARNING | |
1402 | "%s: Excessive Buffer Descriptiors (%#x).\n", | |
1403 | dev->name, status); | |
c201abd9 | 1404 | dev->stats.rx_length_errors++; |
eea221ce AN |
1405 | ret = 0; |
1406 | } | |
1407 | ||
1408 | /* normal notification */ | |
1409 | if (status & Int_IntMacRx) { | |
1410 | /* Got a packet(s). */ | |
1411 | #ifdef TC35815_NAPI | |
1412 | ret = tc35815_rx(dev, limit); | |
1413 | #else | |
1414 | tc35815_rx(dev); | |
1415 | ret = 0; | |
1416 | #endif | |
1417 | lp->lstats.rx_ints++; | |
1418 | } | |
1419 | if (status & Int_IntMacTx) { | |
1420 | /* Transmit complete. */ | |
1421 | lp->lstats.tx_ints++; | |
1422 | tc35815_txdone(dev); | |
1423 | netif_wake_queue(dev); | |
1424 | ret = 0; | |
1425 | } | |
1426 | return ret; | |
1da177e4 LT |
1427 | } |
1428 | ||
1429 | /* | |
1430 | * The typical workload of the driver: | |
eea221ce | 1431 | * Handle the network interface interrupts. |
1da177e4 | 1432 | */ |
7d12e780 | 1433 | static irqreturn_t tc35815_interrupt(int irq, void *dev_id) |
1da177e4 LT |
1434 | { |
1435 | struct net_device *dev = dev_id; | |
bea3348e | 1436 | struct tc35815_local *lp = netdev_priv(dev); |
eea221ce AN |
1437 | struct tc35815_regs __iomem *tr = |
1438 | (struct tc35815_regs __iomem *)dev->base_addr; | |
1439 | #ifdef TC35815_NAPI | |
1440 | u32 dmactl = tc_readl(&tr->DMA_Ctl); | |
1441 | ||
1442 | if (!(dmactl & DMA_IntMask)) { | |
1443 | /* disable interrupts */ | |
1444 | tc_writel(dmactl | DMA_IntMask, &tr->DMA_Ctl); | |
bea3348e SH |
1445 | if (netif_rx_schedule_prep(dev, &lp->napi)) |
1446 | __netif_rx_schedule(dev, &lp->napi); | |
eea221ce AN |
1447 | else { |
1448 | printk(KERN_ERR "%s: interrupt taken in poll\n", | |
1449 | dev->name); | |
1450 | BUG(); | |
1da177e4 | 1451 | } |
eea221ce AN |
1452 | (void)tc_readl(&tr->Int_Src); /* flush */ |
1453 | return IRQ_HANDLED; | |
1454 | } | |
1455 | return IRQ_NONE; | |
1456 | #else | |
eea221ce AN |
1457 | int handled; |
1458 | u32 status; | |
1459 | ||
1460 | spin_lock(&lp->lock); | |
1461 | status = tc_readl(&tr->Int_Src); | |
1462 | tc_writel(status, &tr->Int_Src); /* write to clear */ | |
1463 | handled = tc35815_do_interrupt(dev, status); | |
1464 | (void)tc_readl(&tr->Int_Src); /* flush */ | |
1465 | spin_unlock(&lp->lock); | |
1466 | return IRQ_RETVAL(handled >= 0); | |
1467 | #endif /* TC35815_NAPI */ | |
1468 | } | |
1da177e4 | 1469 | |
eea221ce AN |
1470 | #ifdef CONFIG_NET_POLL_CONTROLLER |
1471 | static void tc35815_poll_controller(struct net_device *dev) | |
1472 | { | |
1473 | disable_irq(dev->irq); | |
1474 | tc35815_interrupt(dev->irq, dev); | |
1475 | enable_irq(dev->irq); | |
1da177e4 | 1476 | } |
eea221ce | 1477 | #endif |
1da177e4 LT |
1478 | |
1479 | /* We have a good packet(s), get it/them out of the buffers. */ | |
eea221ce AN |
1480 | #ifdef TC35815_NAPI |
1481 | static int | |
1482 | tc35815_rx(struct net_device *dev, int limit) | |
1483 | #else | |
1da177e4 LT |
1484 | static void |
1485 | tc35815_rx(struct net_device *dev) | |
eea221ce | 1486 | #endif |
1da177e4 LT |
1487 | { |
1488 | struct tc35815_local *lp = dev->priv; | |
1da177e4 LT |
1489 | unsigned int fdctl; |
1490 | int i; | |
1491 | int buf_free_count = 0; | |
1492 | int fd_free_count = 0; | |
eea221ce AN |
1493 | #ifdef TC35815_NAPI |
1494 | int received = 0; | |
1495 | #endif | |
1da177e4 LT |
1496 | |
1497 | while (!((fdctl = le32_to_cpu(lp->rfd_cur->fd.FDCtl)) & FD_CownsFD)) { | |
1498 | int status = le32_to_cpu(lp->rfd_cur->fd.FDStat); | |
1499 | int pkt_len = fdctl & FD_FDLength_MASK; | |
1da177e4 | 1500 | int bd_count = (fdctl & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT; |
eea221ce AN |
1501 | #ifdef DEBUG |
1502 | struct RxFD *next_rfd; | |
1503 | #endif | |
1504 | #if (RX_CTL_CMD & Rx_StripCRC) == 0 | |
1505 | pkt_len -= 4; | |
1506 | #endif | |
1da177e4 | 1507 | |
eea221ce | 1508 | if (netif_msg_rx_status(lp)) |
1da177e4 LT |
1509 | dump_rxfd(lp->rfd_cur); |
1510 | if (status & Rx_Good) { | |
1da177e4 LT |
1511 | struct sk_buff *skb; |
1512 | unsigned char *data; | |
eea221ce AN |
1513 | int cur_bd; |
1514 | #ifdef TC35815_USE_PACKEDBUFFER | |
1515 | int offset; | |
1516 | #endif | |
6aa20a22 | 1517 | |
eea221ce AN |
1518 | #ifdef TC35815_NAPI |
1519 | if (--limit < 0) | |
1520 | break; | |
1521 | #endif | |
1522 | #ifdef TC35815_USE_PACKEDBUFFER | |
1523 | BUG_ON(bd_count > 2); | |
1da177e4 LT |
1524 | skb = dev_alloc_skb(pkt_len + 2); /* +2: for reserve */ |
1525 | if (skb == NULL) { | |
1526 | printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", | |
1527 | dev->name); | |
c201abd9 | 1528 | dev->stats.rx_dropped++; |
1da177e4 LT |
1529 | break; |
1530 | } | |
1531 | skb_reserve(skb, 2); /* 16 bit alignment */ | |
1da177e4 LT |
1532 | |
1533 | data = skb_put(skb, pkt_len); | |
1534 | ||
1535 | /* copy from receive buffer */ | |
1536 | cur_bd = 0; | |
1537 | offset = 0; | |
1538 | while (offset < pkt_len && cur_bd < bd_count) { | |
1539 | int len = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BDCtl) & | |
1540 | BD_BuffLength_MASK; | |
eea221ce AN |
1541 | dma_addr_t dma = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BuffData); |
1542 | void *rxbuf = rxbuf_bus_to_virt(lp, dma); | |
1543 | if (offset + len > pkt_len) | |
1544 | len = pkt_len - offset; | |
1545 | #ifdef TC35815_DMA_SYNC_ONDEMAND | |
1546 | pci_dma_sync_single_for_cpu(lp->pci_dev, | |
1547 | dma, len, | |
1548 | PCI_DMA_FROMDEVICE); | |
1da177e4 LT |
1549 | #endif |
1550 | memcpy(data + offset, rxbuf, len); | |
793bc0af AN |
1551 | #ifdef TC35815_DMA_SYNC_ONDEMAND |
1552 | pci_dma_sync_single_for_device(lp->pci_dev, | |
1553 | dma, len, | |
1554 | PCI_DMA_FROMDEVICE); | |
1555 | #endif | |
1da177e4 LT |
1556 | offset += len; |
1557 | cur_bd++; | |
1558 | } | |
eea221ce AN |
1559 | #else /* TC35815_USE_PACKEDBUFFER */ |
1560 | BUG_ON(bd_count > 1); | |
1561 | cur_bd = (le32_to_cpu(lp->rfd_cur->bd[0].BDCtl) | |
1562 | & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT; | |
1563 | #ifdef DEBUG | |
1564 | if (cur_bd >= RX_BUF_NUM) { | |
1565 | printk("%s: invalid BDID.\n", dev->name); | |
1566 | panic_queues(dev); | |
1567 | } | |
1568 | BUG_ON(lp->rx_skbs[cur_bd].skb_dma != | |
1569 | (le32_to_cpu(lp->rfd_cur->bd[0].BuffData) & ~3)); | |
1570 | if (!lp->rx_skbs[cur_bd].skb) { | |
1571 | printk("%s: NULL skb.\n", dev->name); | |
1572 | panic_queues(dev); | |
1573 | } | |
1574 | #else | |
1575 | BUG_ON(cur_bd >= RX_BUF_NUM); | |
1da177e4 | 1576 | #endif |
eea221ce AN |
1577 | skb = lp->rx_skbs[cur_bd].skb; |
1578 | prefetch(skb->data); | |
1579 | lp->rx_skbs[cur_bd].skb = NULL; | |
1580 | lp->fbl_count--; | |
1581 | pci_unmap_single(lp->pci_dev, | |
1582 | lp->rx_skbs[cur_bd].skb_dma, | |
1583 | RX_BUF_SIZE, PCI_DMA_FROMDEVICE); | |
1584 | if (!HAVE_DMA_RXALIGN(lp)) | |
1585 | memmove(skb->data, skb->data - 2, pkt_len); | |
1586 | data = skb_put(skb, pkt_len); | |
1587 | #endif /* TC35815_USE_PACKEDBUFFER */ | |
1588 | if (netif_msg_pktdata(lp)) | |
1da177e4 LT |
1589 | print_eth(data); |
1590 | skb->protocol = eth_type_trans(skb, dev); | |
eea221ce AN |
1591 | #ifdef TC35815_NAPI |
1592 | netif_receive_skb(skb); | |
1593 | received++; | |
1594 | #else | |
1da177e4 | 1595 | netif_rx(skb); |
eea221ce AN |
1596 | #endif |
1597 | dev->last_rx = jiffies; | |
c201abd9 AN |
1598 | dev->stats.rx_packets++; |
1599 | dev->stats.rx_bytes += pkt_len; | |
1da177e4 | 1600 | } else { |
c201abd9 | 1601 | dev->stats.rx_errors++; |
eea221ce AN |
1602 | printk(KERN_DEBUG "%s: Rx error (status %x)\n", |
1603 | dev->name, status & Rx_Stat_Mask); | |
1da177e4 LT |
1604 | /* WORKAROUND: LongErr and CRCErr means Overflow. */ |
1605 | if ((status & Rx_LongErr) && (status & Rx_CRCErr)) { | |
1606 | status &= ~(Rx_LongErr|Rx_CRCErr); | |
1607 | status |= Rx_Over; | |
1608 | } | |
c201abd9 AN |
1609 | if (status & Rx_LongErr) |
1610 | dev->stats.rx_length_errors++; | |
1611 | if (status & Rx_Over) | |
1612 | dev->stats.rx_fifo_errors++; | |
1613 | if (status & Rx_CRCErr) | |
1614 | dev->stats.rx_crc_errors++; | |
1615 | if (status & Rx_Align) | |
1616 | dev->stats.rx_frame_errors++; | |
1da177e4 LT |
1617 | } |
1618 | ||
1619 | if (bd_count > 0) { | |
1620 | /* put Free Buffer back to controller */ | |
1621 | int bdctl = le32_to_cpu(lp->rfd_cur->bd[bd_count - 1].BDCtl); | |
1622 | unsigned char id = | |
1623 | (bdctl & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT; | |
eea221ce AN |
1624 | #ifdef DEBUG |
1625 | if (id >= RX_BUF_NUM) { | |
1da177e4 LT |
1626 | printk("%s: invalid BDID.\n", dev->name); |
1627 | panic_queues(dev); | |
1628 | } | |
eea221ce AN |
1629 | #else |
1630 | BUG_ON(id >= RX_BUF_NUM); | |
1631 | #endif | |
1da177e4 | 1632 | /* free old buffers */ |
eea221ce AN |
1633 | #ifdef TC35815_USE_PACKEDBUFFER |
1634 | while (lp->fbl_curid != id) | |
1635 | #else | |
1636 | while (lp->fbl_count < RX_BUF_NUM) | |
1637 | #endif | |
1638 | { | |
1639 | #ifdef TC35815_USE_PACKEDBUFFER | |
1640 | unsigned char curid = lp->fbl_curid; | |
1641 | #else | |
1642 | unsigned char curid = | |
1643 | (id + 1 + lp->fbl_count) % RX_BUF_NUM; | |
1644 | #endif | |
1645 | struct BDesc *bd = &lp->fbl_ptr->bd[curid]; | |
1646 | #ifdef DEBUG | |
1647 | bdctl = le32_to_cpu(bd->BDCtl); | |
1da177e4 LT |
1648 | if (bdctl & BD_CownsBD) { |
1649 | printk("%s: Freeing invalid BD.\n", | |
1650 | dev->name); | |
1651 | panic_queues(dev); | |
1652 | } | |
eea221ce | 1653 | #endif |
3a4fa0a2 | 1654 | /* pass BD to controller */ |
eea221ce AN |
1655 | #ifndef TC35815_USE_PACKEDBUFFER |
1656 | if (!lp->rx_skbs[curid].skb) { | |
1657 | lp->rx_skbs[curid].skb = | |
1658 | alloc_rxbuf_skb(dev, | |
1659 | lp->pci_dev, | |
1660 | &lp->rx_skbs[curid].skb_dma); | |
1661 | if (!lp->rx_skbs[curid].skb) | |
1662 | break; /* try on next reception */ | |
1663 | bd->BuffData = cpu_to_le32(lp->rx_skbs[curid].skb_dma); | |
1664 | } | |
1665 | #endif /* TC35815_USE_PACKEDBUFFER */ | |
1da177e4 | 1666 | /* Note: BDLength was modified by chip. */ |
eea221ce AN |
1667 | bd->BDCtl = cpu_to_le32(BD_CownsBD | |
1668 | (curid << BD_RxBDID_SHIFT) | | |
1669 | RX_BUF_SIZE); | |
1670 | #ifdef TC35815_USE_PACKEDBUFFER | |
1671 | lp->fbl_curid = (curid + 1) % RX_BUF_NUM; | |
1672 | if (netif_msg_rx_status(lp)) { | |
1da177e4 LT |
1673 | printk("%s: Entering new FBD %d\n", |
1674 | dev->name, lp->fbl_curid); | |
1675 | dump_frfd(lp->fbl_ptr); | |
1676 | } | |
eea221ce AN |
1677 | #else |
1678 | lp->fbl_count++; | |
1679 | #endif | |
1da177e4 LT |
1680 | buf_free_count++; |
1681 | } | |
1682 | } | |
1683 | ||
1684 | /* put RxFD back to controller */ | |
eea221ce AN |
1685 | #ifdef DEBUG |
1686 | next_rfd = fd_bus_to_virt(lp, | |
1687 | le32_to_cpu(lp->rfd_cur->fd.FDNext)); | |
1da177e4 LT |
1688 | if (next_rfd < lp->rfd_base || next_rfd > lp->rfd_limit) { |
1689 | printk("%s: RxFD FDNext invalid.\n", dev->name); | |
1690 | panic_queues(dev); | |
1691 | } | |
eea221ce | 1692 | #endif |
1da177e4 | 1693 | for (i = 0; i < (bd_count + 1) / 2 + 1; i++) { |
3a4fa0a2 | 1694 | /* pass FD to controller */ |
eea221ce AN |
1695 | #ifdef DEBUG |
1696 | lp->rfd_cur->fd.FDNext = cpu_to_le32(0xdeaddead); | |
1697 | #else | |
1698 | lp->rfd_cur->fd.FDNext = cpu_to_le32(FD_Next_EOL); | |
1699 | #endif | |
1da177e4 LT |
1700 | lp->rfd_cur->fd.FDCtl = cpu_to_le32(FD_CownsFD); |
1701 | lp->rfd_cur++; | |
1702 | fd_free_count++; | |
1703 | } | |
eea221ce AN |
1704 | if (lp->rfd_cur > lp->rfd_limit) |
1705 | lp->rfd_cur = lp->rfd_base; | |
1706 | #ifdef DEBUG | |
1707 | if (lp->rfd_cur != next_rfd) | |
1708 | printk("rfd_cur = %p, next_rfd %p\n", | |
1709 | lp->rfd_cur, next_rfd); | |
1710 | #endif | |
1da177e4 LT |
1711 | } |
1712 | ||
1713 | /* re-enable BL/FDA Exhaust interrupts. */ | |
1714 | if (fd_free_count) { | |
eea221ce AN |
1715 | struct tc35815_regs __iomem *tr = |
1716 | (struct tc35815_regs __iomem *)dev->base_addr; | |
1717 | u32 en, en_old = tc_readl(&tr->Int_En); | |
1718 | en = en_old | Int_FDAExEn; | |
1da177e4 | 1719 | if (buf_free_count) |
eea221ce AN |
1720 | en |= Int_BLExEn; |
1721 | if (en != en_old) | |
1722 | tc_writel(en, &tr->Int_En); | |
1da177e4 | 1723 | } |
eea221ce AN |
1724 | #ifdef TC35815_NAPI |
1725 | return received; | |
1726 | #endif | |
1da177e4 LT |
1727 | } |
1728 | ||
eea221ce | 1729 | #ifdef TC35815_NAPI |
bea3348e | 1730 | static int tc35815_poll(struct napi_struct *napi, int budget) |
eea221ce | 1731 | { |
bea3348e SH |
1732 | struct tc35815_local *lp = container_of(napi, struct tc35815_local, napi); |
1733 | struct net_device *dev = lp->dev; | |
eea221ce AN |
1734 | struct tc35815_regs __iomem *tr = |
1735 | (struct tc35815_regs __iomem *)dev->base_addr; | |
eea221ce AN |
1736 | int received = 0, handled; |
1737 | u32 status; | |
1738 | ||
1739 | spin_lock(&lp->lock); | |
1740 | status = tc_readl(&tr->Int_Src); | |
1741 | do { | |
1742 | tc_writel(status, &tr->Int_Src); /* write to clear */ | |
1743 | ||
1744 | handled = tc35815_do_interrupt(dev, status, limit); | |
1745 | if (handled >= 0) { | |
1746 | received += handled; | |
bea3348e | 1747 | if (received >= budget) |
eea221ce AN |
1748 | break; |
1749 | } | |
1750 | status = tc_readl(&tr->Int_Src); | |
1751 | } while (status); | |
1752 | spin_unlock(&lp->lock); | |
1753 | ||
bea3348e SH |
1754 | if (received < budget) { |
1755 | netif_rx_complete(dev, napi); | |
1756 | /* enable interrupts */ | |
1757 | tc_writel(tc_readl(&tr->DMA_Ctl) & ~DMA_IntMask, &tr->DMA_Ctl); | |
1758 | } | |
1759 | return received; | |
eea221ce AN |
1760 | } |
1761 | #endif | |
1762 | ||
1da177e4 LT |
1763 | #ifdef NO_CHECK_CARRIER |
1764 | #define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_LateColl|Tx_TxPar|Tx_SQErr) | |
1765 | #else | |
1766 | #define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_NCarr|Tx_LateColl|Tx_TxPar|Tx_SQErr) | |
1767 | #endif | |
1768 | ||
1769 | static void | |
1770 | tc35815_check_tx_stat(struct net_device *dev, int status) | |
1771 | { | |
1772 | struct tc35815_local *lp = dev->priv; | |
1773 | const char *msg = NULL; | |
1774 | ||
1775 | /* count collisions */ | |
1776 | if (status & Tx_ExColl) | |
c201abd9 | 1777 | dev->stats.collisions += 16; |
1da177e4 | 1778 | if (status & Tx_TxColl_MASK) |
c201abd9 | 1779 | dev->stats.collisions += status & Tx_TxColl_MASK; |
1da177e4 | 1780 | |
eea221ce AN |
1781 | #ifndef NO_CHECK_CARRIER |
1782 | /* TX4939 does not have NCarr */ | |
1783 | if (lp->boardtype == TC35815_TX4939) | |
1784 | status &= ~Tx_NCarr; | |
1785 | #ifdef WORKAROUND_LOSTCAR | |
1da177e4 | 1786 | /* WORKAROUND: ignore LostCrS in full duplex operation */ |
eea221ce AN |
1787 | if ((lp->timer_state != asleep && lp->timer_state != lcheck) |
1788 | || lp->fullduplex) | |
1da177e4 | 1789 | status &= ~Tx_NCarr; |
eea221ce AN |
1790 | #endif |
1791 | #endif | |
1da177e4 LT |
1792 | |
1793 | if (!(status & TX_STA_ERR)) { | |
1794 | /* no error. */ | |
c201abd9 | 1795 | dev->stats.tx_packets++; |
1da177e4 LT |
1796 | return; |
1797 | } | |
1798 | ||
c201abd9 | 1799 | dev->stats.tx_errors++; |
1da177e4 | 1800 | if (status & Tx_ExColl) { |
c201abd9 | 1801 | dev->stats.tx_aborted_errors++; |
1da177e4 LT |
1802 | msg = "Excessive Collision."; |
1803 | } | |
1804 | if (status & Tx_Under) { | |
c201abd9 | 1805 | dev->stats.tx_fifo_errors++; |
1da177e4 | 1806 | msg = "Tx FIFO Underrun."; |
eea221ce AN |
1807 | if (lp->lstats.tx_underrun < TX_THRESHOLD_KEEP_LIMIT) { |
1808 | lp->lstats.tx_underrun++; | |
1809 | if (lp->lstats.tx_underrun >= TX_THRESHOLD_KEEP_LIMIT) { | |
1810 | struct tc35815_regs __iomem *tr = | |
1811 | (struct tc35815_regs __iomem *)dev->base_addr; | |
1812 | tc_writel(TX_THRESHOLD_MAX, &tr->TxThrsh); | |
1813 | msg = "Tx FIFO Underrun.Change Tx threshold to max."; | |
1814 | } | |
1815 | } | |
1da177e4 LT |
1816 | } |
1817 | if (status & Tx_Defer) { | |
c201abd9 | 1818 | dev->stats.tx_fifo_errors++; |
1da177e4 LT |
1819 | msg = "Excessive Deferral."; |
1820 | } | |
1821 | #ifndef NO_CHECK_CARRIER | |
1822 | if (status & Tx_NCarr) { | |
c201abd9 | 1823 | dev->stats.tx_carrier_errors++; |
1da177e4 LT |
1824 | msg = "Lost Carrier Sense."; |
1825 | } | |
1826 | #endif | |
1827 | if (status & Tx_LateColl) { | |
c201abd9 | 1828 | dev->stats.tx_aborted_errors++; |
1da177e4 LT |
1829 | msg = "Late Collision."; |
1830 | } | |
1831 | if (status & Tx_TxPar) { | |
c201abd9 | 1832 | dev->stats.tx_fifo_errors++; |
1da177e4 LT |
1833 | msg = "Transmit Parity Error."; |
1834 | } | |
1835 | if (status & Tx_SQErr) { | |
c201abd9 | 1836 | dev->stats.tx_heartbeat_errors++; |
1da177e4 LT |
1837 | msg = "Signal Quality Error."; |
1838 | } | |
eea221ce | 1839 | if (msg && netif_msg_tx_err(lp)) |
1da177e4 LT |
1840 | printk(KERN_WARNING "%s: %s (%#x)\n", dev->name, msg, status); |
1841 | } | |
1842 | ||
eea221ce AN |
1843 | /* This handles TX complete events posted by the device |
1844 | * via interrupts. | |
1845 | */ | |
1da177e4 LT |
1846 | static void |
1847 | tc35815_txdone(struct net_device *dev) | |
1848 | { | |
1849 | struct tc35815_local *lp = dev->priv; | |
1da177e4 LT |
1850 | struct TxFD *txfd; |
1851 | unsigned int fdctl; | |
1da177e4 LT |
1852 | |
1853 | txfd = &lp->tfd_base[lp->tfd_end]; | |
1854 | while (lp->tfd_start != lp->tfd_end && | |
1855 | !((fdctl = le32_to_cpu(txfd->fd.FDCtl)) & FD_CownsFD)) { | |
1856 | int status = le32_to_cpu(txfd->fd.FDStat); | |
1857 | struct sk_buff *skb; | |
1858 | unsigned long fdnext = le32_to_cpu(txfd->fd.FDNext); | |
eea221ce | 1859 | u32 fdsystem = le32_to_cpu(txfd->fd.FDSystem); |
1da177e4 | 1860 | |
eea221ce | 1861 | if (netif_msg_tx_done(lp)) { |
1da177e4 LT |
1862 | printk("%s: complete TxFD.\n", dev->name); |
1863 | dump_txfd(txfd); | |
1864 | } | |
1865 | tc35815_check_tx_stat(dev, status); | |
1866 | ||
eea221ce AN |
1867 | skb = fdsystem != 0xffffffff ? |
1868 | lp->tx_skbs[fdsystem].skb : NULL; | |
1869 | #ifdef DEBUG | |
1870 | if (lp->tx_skbs[lp->tfd_end].skb != skb) { | |
1871 | printk("%s: tx_skbs mismatch.\n", dev->name); | |
1872 | panic_queues(dev); | |
1873 | } | |
1874 | #else | |
1875 | BUG_ON(lp->tx_skbs[lp->tfd_end].skb != skb); | |
1876 | #endif | |
1da177e4 | 1877 | if (skb) { |
c201abd9 | 1878 | dev->stats.tx_bytes += skb->len; |
eea221ce AN |
1879 | pci_unmap_single(lp->pci_dev, lp->tx_skbs[lp->tfd_end].skb_dma, skb->len, PCI_DMA_TODEVICE); |
1880 | lp->tx_skbs[lp->tfd_end].skb = NULL; | |
1881 | lp->tx_skbs[lp->tfd_end].skb_dma = 0; | |
1882 | #ifdef TC35815_NAPI | |
1da177e4 | 1883 | dev_kfree_skb_any(skb); |
eea221ce AN |
1884 | #else |
1885 | dev_kfree_skb_irq(skb); | |
1886 | #endif | |
1da177e4 | 1887 | } |
eea221ce | 1888 | txfd->fd.FDSystem = cpu_to_le32(0xffffffff); |
1da177e4 | 1889 | |
1da177e4 LT |
1890 | lp->tfd_end = (lp->tfd_end + 1) % TX_FD_NUM; |
1891 | txfd = &lp->tfd_base[lp->tfd_end]; | |
eea221ce AN |
1892 | #ifdef DEBUG |
1893 | if ((fdnext & ~FD_Next_EOL) != fd_virt_to_bus(lp, txfd)) { | |
1da177e4 LT |
1894 | printk("%s: TxFD FDNext invalid.\n", dev->name); |
1895 | panic_queues(dev); | |
1896 | } | |
eea221ce | 1897 | #endif |
1da177e4 LT |
1898 | if (fdnext & FD_Next_EOL) { |
1899 | /* DMA Transmitter has been stopping... */ | |
1900 | if (lp->tfd_end != lp->tfd_start) { | |
eea221ce AN |
1901 | struct tc35815_regs __iomem *tr = |
1902 | (struct tc35815_regs __iomem *)dev->base_addr; | |
1da177e4 LT |
1903 | int head = (lp->tfd_start + TX_FD_NUM - 1) % TX_FD_NUM; |
1904 | struct TxFD* txhead = &lp->tfd_base[head]; | |
1905 | int qlen = (lp->tfd_start + TX_FD_NUM | |
1906 | - lp->tfd_end) % TX_FD_NUM; | |
1907 | ||
eea221ce | 1908 | #ifdef DEBUG |
1da177e4 LT |
1909 | if (!(le32_to_cpu(txfd->fd.FDCtl) & FD_CownsFD)) { |
1910 | printk("%s: TxFD FDCtl invalid.\n", dev->name); | |
1911 | panic_queues(dev); | |
1912 | } | |
eea221ce | 1913 | #endif |
1da177e4 LT |
1914 | /* log max queue length */ |
1915 | if (lp->lstats.max_tx_qlen < qlen) | |
1916 | lp->lstats.max_tx_qlen = qlen; | |
1917 | ||
1918 | ||
1919 | /* start DMA Transmitter again */ | |
1920 | txhead->fd.FDNext |= cpu_to_le32(FD_Next_EOL); | |
1921 | #ifdef GATHER_TXINT | |
1922 | txhead->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx); | |
1923 | #endif | |
eea221ce | 1924 | if (netif_msg_tx_queued(lp)) { |
1da177e4 LT |
1925 | printk("%s: start TxFD on queue.\n", |
1926 | dev->name); | |
1927 | dump_txfd(txfd); | |
1928 | } | |
eea221ce | 1929 | tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr); |
1da177e4 LT |
1930 | } |
1931 | break; | |
1932 | } | |
1933 | } | |
1934 | ||
eea221ce AN |
1935 | /* If we had stopped the queue due to a "tx full" |
1936 | * condition, and space has now been made available, | |
1937 | * wake up the queue. | |
1938 | */ | |
1939 | if (netif_queue_stopped(dev) && ! tc35815_tx_full(dev)) | |
1940 | netif_wake_queue(dev); | |
1da177e4 LT |
1941 | } |
1942 | ||
1943 | /* The inverse routine to tc35815_open(). */ | |
1944 | static int | |
1945 | tc35815_close(struct net_device *dev) | |
1946 | { | |
1947 | struct tc35815_local *lp = dev->priv; | |
bea3348e | 1948 | |
1da177e4 | 1949 | netif_stop_queue(dev); |
bea3348e SH |
1950 | #ifdef TC35815_NAPI |
1951 | napi_disable(&lp->napi); | |
1952 | #endif | |
1da177e4 LT |
1953 | |
1954 | /* Flush the Tx and disable Rx here. */ | |
1955 | ||
eea221ce | 1956 | del_timer(&lp->timer); /* Kill if running */ |
1da177e4 LT |
1957 | tc35815_chip_reset(dev); |
1958 | free_irq(dev->irq, dev); | |
1959 | ||
1960 | tc35815_free_queues(dev); | |
1961 | ||
1962 | return 0; | |
eea221ce | 1963 | |
1da177e4 LT |
1964 | } |
1965 | ||
1966 | /* | |
1967 | * Get the current statistics. | |
1968 | * This may be called with the card open or closed. | |
1969 | */ | |
1970 | static struct net_device_stats *tc35815_get_stats(struct net_device *dev) | |
1971 | { | |
eea221ce AN |
1972 | struct tc35815_regs __iomem *tr = |
1973 | (struct tc35815_regs __iomem *)dev->base_addr; | |
c201abd9 | 1974 | if (netif_running(dev)) |
1da177e4 | 1975 | /* Update the statistics from the device registers. */ |
c201abd9 | 1976 | dev->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt); |
1da177e4 | 1977 | |
c201abd9 | 1978 | return &dev->stats; |
1da177e4 LT |
1979 | } |
1980 | ||
eea221ce | 1981 | static void tc35815_set_cam_entry(struct net_device *dev, int index, unsigned char *addr) |
1da177e4 | 1982 | { |
eea221ce AN |
1983 | struct tc35815_local *lp = dev->priv; |
1984 | struct tc35815_regs __iomem *tr = | |
1985 | (struct tc35815_regs __iomem *)dev->base_addr; | |
1da177e4 | 1986 | int cam_index = index * 6; |
eea221ce AN |
1987 | u32 cam_data; |
1988 | u32 saved_addr; | |
958eb80b AN |
1989 | DECLARE_MAC_BUF(mac); |
1990 | ||
1da177e4 LT |
1991 | saved_addr = tc_readl(&tr->CAM_Adr); |
1992 | ||
958eb80b AN |
1993 | if (netif_msg_hw(lp)) |
1994 | printk(KERN_DEBUG "%s: CAM %d: %s\n", | |
1995 | dev->name, index, print_mac(mac, addr)); | |
1da177e4 LT |
1996 | if (index & 1) { |
1997 | /* read modify write */ | |
1998 | tc_writel(cam_index - 2, &tr->CAM_Adr); | |
1999 | cam_data = tc_readl(&tr->CAM_Data) & 0xffff0000; | |
2000 | cam_data |= addr[0] << 8 | addr[1]; | |
2001 | tc_writel(cam_data, &tr->CAM_Data); | |
2002 | /* write whole word */ | |
2003 | tc_writel(cam_index + 2, &tr->CAM_Adr); | |
2004 | cam_data = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | addr[5]; | |
2005 | tc_writel(cam_data, &tr->CAM_Data); | |
2006 | } else { | |
2007 | /* write whole word */ | |
2008 | tc_writel(cam_index, &tr->CAM_Adr); | |
2009 | cam_data = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3]; | |
2010 | tc_writel(cam_data, &tr->CAM_Data); | |
2011 | /* read modify write */ | |
2012 | tc_writel(cam_index + 4, &tr->CAM_Adr); | |
2013 | cam_data = tc_readl(&tr->CAM_Data) & 0x0000ffff; | |
2014 | cam_data |= addr[4] << 24 | (addr[5] << 16); | |
2015 | tc_writel(cam_data, &tr->CAM_Data); | |
2016 | } | |
2017 | ||
1da177e4 LT |
2018 | tc_writel(saved_addr, &tr->CAM_Adr); |
2019 | } | |
2020 | ||
2021 | ||
2022 | /* | |
2023 | * Set or clear the multicast filter for this adaptor. | |
2024 | * num_addrs == -1 Promiscuous mode, receive all packets | |
2025 | * num_addrs == 0 Normal mode, clear multicast list | |
2026 | * num_addrs > 0 Multicast mode, receive normal and MC packets, | |
2027 | * and do best-effort filtering. | |
2028 | */ | |
2029 | static void | |
2030 | tc35815_set_multicast_list(struct net_device *dev) | |
2031 | { | |
eea221ce AN |
2032 | struct tc35815_regs __iomem *tr = |
2033 | (struct tc35815_regs __iomem *)dev->base_addr; | |
1da177e4 LT |
2034 | |
2035 | if (dev->flags&IFF_PROMISC) | |
2036 | { | |
eea221ce AN |
2037 | #ifdef WORKAROUND_100HALF_PROMISC |
2038 | /* With some (all?) 100MHalf HUB, controller will hang | |
2039 | * if we enabled promiscuous mode before linkup... */ | |
2040 | struct tc35815_local *lp = dev->priv; | |
2041 | int pid = lp->phy_addr; | |
2042 | if (!(tc_mdio_read(dev, pid, MII_BMSR) & BMSR_LSTATUS)) | |
2043 | return; | |
2044 | #endif | |
1da177e4 LT |
2045 | /* Enable promiscuous mode */ |
2046 | tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl); | |
2047 | } | |
2048 | else if((dev->flags&IFF_ALLMULTI) || dev->mc_count > CAM_ENTRY_MAX - 3) | |
2049 | { | |
2050 | /* CAM 0, 1, 20 are reserved. */ | |
2051 | /* Disable promiscuous mode, use normal mode. */ | |
2052 | tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl); | |
2053 | } | |
2054 | else if(dev->mc_count) | |
2055 | { | |
2056 | struct dev_mc_list* cur_addr = dev->mc_list; | |
2057 | int i; | |
2058 | int ena_bits = CAM_Ena_Bit(CAM_ENTRY_SOURCE); | |
2059 | ||
2060 | tc_writel(0, &tr->CAM_Ctl); | |
2061 | /* Walk the address list, and load the filter */ | |
2062 | for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) { | |
2063 | if (!cur_addr) | |
2064 | break; | |
2065 | /* entry 0,1 is reserved. */ | |
eea221ce | 2066 | tc35815_set_cam_entry(dev, i + 2, cur_addr->dmi_addr); |
1da177e4 LT |
2067 | ena_bits |= CAM_Ena_Bit(i + 2); |
2068 | } | |
2069 | tc_writel(ena_bits, &tr->CAM_Ena); | |
2070 | tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl); | |
2071 | } | |
2072 | else { | |
2073 | tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena); | |
2074 | tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl); | |
2075 | } | |
2076 | } | |
2077 | ||
eea221ce | 2078 | static void tc35815_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) |
1da177e4 LT |
2079 | { |
2080 | struct tc35815_local *lp = dev->priv; | |
eea221ce AN |
2081 | strcpy(info->driver, MODNAME); |
2082 | strcpy(info->version, DRV_VERSION); | |
2083 | strcpy(info->bus_info, pci_name(lp->pci_dev)); | |
2084 | } | |
6aa20a22 | 2085 | |
eea221ce AN |
2086 | static int tc35815_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
2087 | { | |
2088 | struct tc35815_local *lp = dev->priv; | |
2089 | spin_lock_irq(&lp->lock); | |
2090 | mii_ethtool_gset(&lp->mii, cmd); | |
2091 | spin_unlock_irq(&lp->lock); | |
2092 | return 0; | |
2093 | } | |
2094 | ||
2095 | static int tc35815_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
2096 | { | |
2097 | struct tc35815_local *lp = dev->priv; | |
2098 | int rc; | |
2099 | #if 1 /* use our negotiation method... */ | |
2100 | /* Verify the settings we care about. */ | |
2101 | if (cmd->autoneg != AUTONEG_ENABLE && | |
2102 | cmd->autoneg != AUTONEG_DISABLE) | |
2103 | return -EINVAL; | |
2104 | if (cmd->autoneg == AUTONEG_DISABLE && | |
2105 | ((cmd->speed != SPEED_100 && | |
2106 | cmd->speed != SPEED_10) || | |
2107 | (cmd->duplex != DUPLEX_HALF && | |
2108 | cmd->duplex != DUPLEX_FULL))) | |
2109 | return -EINVAL; | |
2110 | ||
2111 | /* Ok, do it to it. */ | |
2112 | spin_lock_irq(&lp->lock); | |
2113 | del_timer(&lp->timer); | |
2114 | tc35815_start_auto_negotiation(dev, cmd); | |
2115 | spin_unlock_irq(&lp->lock); | |
2116 | rc = 0; | |
2117 | #else | |
2118 | spin_lock_irq(&lp->lock); | |
2119 | rc = mii_ethtool_sset(&lp->mii, cmd); | |
2120 | spin_unlock_irq(&lp->lock); | |
2121 | #endif | |
2122 | return rc; | |
2123 | } | |
2124 | ||
2125 | static int tc35815_nway_reset(struct net_device *dev) | |
2126 | { | |
2127 | struct tc35815_local *lp = dev->priv; | |
2128 | int rc; | |
2129 | spin_lock_irq(&lp->lock); | |
2130 | rc = mii_nway_restart(&lp->mii); | |
2131 | spin_unlock_irq(&lp->lock); | |
2132 | return rc; | |
2133 | } | |
2134 | ||
2135 | static u32 tc35815_get_link(struct net_device *dev) | |
2136 | { | |
2137 | struct tc35815_local *lp = dev->priv; | |
2138 | int rc; | |
2139 | spin_lock_irq(&lp->lock); | |
2140 | rc = mii_link_ok(&lp->mii); | |
2141 | spin_unlock_irq(&lp->lock); | |
2142 | return rc; | |
2143 | } | |
2144 | ||
2145 | static u32 tc35815_get_msglevel(struct net_device *dev) | |
2146 | { | |
2147 | struct tc35815_local *lp = dev->priv; | |
2148 | return lp->msg_enable; | |
2149 | } | |
2150 | ||
2151 | static void tc35815_set_msglevel(struct net_device *dev, u32 datum) | |
2152 | { | |
2153 | struct tc35815_local *lp = dev->priv; | |
2154 | lp->msg_enable = datum; | |
2155 | } | |
2156 | ||
b9f2c044 | 2157 | static int tc35815_get_sset_count(struct net_device *dev, int sset) |
eea221ce AN |
2158 | { |
2159 | struct tc35815_local *lp = dev->priv; | |
b9f2c044 JG |
2160 | |
2161 | switch (sset) { | |
2162 | case ETH_SS_STATS: | |
2163 | return sizeof(lp->lstats) / sizeof(int); | |
2164 | default: | |
2165 | return -EOPNOTSUPP; | |
2166 | } | |
eea221ce | 2167 | } |
1da177e4 | 2168 | |
eea221ce AN |
2169 | static void tc35815_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data) |
2170 | { | |
2171 | struct tc35815_local *lp = dev->priv; | |
2172 | data[0] = lp->lstats.max_tx_qlen; | |
2173 | data[1] = lp->lstats.tx_ints; | |
2174 | data[2] = lp->lstats.rx_ints; | |
2175 | data[3] = lp->lstats.tx_underrun; | |
2176 | } | |
2177 | ||
2178 | static struct { | |
2179 | const char str[ETH_GSTRING_LEN]; | |
2180 | } ethtool_stats_keys[] = { | |
2181 | { "max_tx_qlen" }, | |
2182 | { "tx_ints" }, | |
2183 | { "rx_ints" }, | |
2184 | { "tx_underrun" }, | |
2185 | }; | |
2186 | ||
2187 | static void tc35815_get_strings(struct net_device *dev, u32 stringset, u8 *data) | |
2188 | { | |
2189 | memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys)); | |
2190 | } | |
2191 | ||
2192 | static const struct ethtool_ops tc35815_ethtool_ops = { | |
2193 | .get_drvinfo = tc35815_get_drvinfo, | |
2194 | .get_settings = tc35815_get_settings, | |
2195 | .set_settings = tc35815_set_settings, | |
2196 | .nway_reset = tc35815_nway_reset, | |
2197 | .get_link = tc35815_get_link, | |
2198 | .get_msglevel = tc35815_get_msglevel, | |
2199 | .set_msglevel = tc35815_set_msglevel, | |
2200 | .get_strings = tc35815_get_strings, | |
b9f2c044 | 2201 | .get_sset_count = tc35815_get_sset_count, |
eea221ce | 2202 | .get_ethtool_stats = tc35815_get_ethtool_stats, |
eea221ce AN |
2203 | }; |
2204 | ||
2205 | static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |
2206 | { | |
2207 | struct tc35815_local *lp = dev->priv; | |
2208 | int rc; | |
2209 | ||
2210 | if (!netif_running(dev)) | |
2211 | return -EINVAL; | |
2212 | ||
2213 | spin_lock_irq(&lp->lock); | |
2214 | rc = generic_mii_ioctl(&lp->mii, if_mii(rq), cmd, NULL); | |
2215 | spin_unlock_irq(&lp->lock); | |
2216 | ||
2217 | return rc; | |
2218 | } | |
2219 | ||
2220 | static int tc_mdio_read(struct net_device *dev, int phy_id, int location) | |
2221 | { | |
2222 | struct tc35815_regs __iomem *tr = | |
2223 | (struct tc35815_regs __iomem *)dev->base_addr; | |
2224 | u32 data; | |
2225 | tc_writel(MD_CA_Busy | (phy_id << 5) | location, &tr->MD_CA); | |
1da177e4 LT |
2226 | while (tc_readl(&tr->MD_CA) & MD_CA_Busy) |
2227 | ; | |
2228 | data = tc_readl(&tr->MD_Data); | |
eea221ce AN |
2229 | return data & 0xffff; |
2230 | } | |
2231 | ||
2232 | static void tc_mdio_write(struct net_device *dev, int phy_id, int location, | |
2233 | int val) | |
2234 | { | |
2235 | struct tc35815_regs __iomem *tr = | |
2236 | (struct tc35815_regs __iomem *)dev->base_addr; | |
2237 | tc_writel(val, &tr->MD_Data); | |
2238 | tc_writel(MD_CA_Busy | MD_CA_Wr | (phy_id << 5) | location, &tr->MD_CA); | |
2239 | while (tc_readl(&tr->MD_CA) & MD_CA_Busy) | |
2240 | ; | |
1da177e4 LT |
2241 | } |
2242 | ||
eea221ce AN |
2243 | /* Auto negotiation. The scheme is very simple. We have a timer routine |
2244 | * that keeps watching the auto negotiation process as it progresses. | |
2245 | * The DP83840 is first told to start doing it's thing, we set up the time | |
2246 | * and place the timer state machine in it's initial state. | |
2247 | * | |
2248 | * Here the timer peeks at the DP83840 status registers at each click to see | |
2249 | * if the auto negotiation has completed, we assume here that the DP83840 PHY | |
2250 | * will time out at some point and just tell us what (didn't) happen. For | |
2251 | * complete coverage we only allow so many of the ticks at this level to run, | |
2252 | * when this has expired we print a warning message and try another strategy. | |
2253 | * This "other" strategy is to force the interface into various speed/duplex | |
2254 | * configurations and we stop when we see a link-up condition before the | |
2255 | * maximum number of "peek" ticks have occurred. | |
2256 | * | |
2257 | * Once a valid link status has been detected we configure the BigMAC and | |
2258 | * the rest of the Happy Meal to speak the most efficient protocol we could | |
2259 | * get a clean link for. The priority for link configurations, highest first | |
2260 | * is: | |
2261 | * 100 Base-T Full Duplex | |
2262 | * 100 Base-T Half Duplex | |
2263 | * 10 Base-T Full Duplex | |
2264 | * 10 Base-T Half Duplex | |
2265 | * | |
2266 | * We start a new timer now, after a successful auto negotiation status has | |
2267 | * been detected. This timer just waits for the link-up bit to get set in | |
2268 | * the BMCR of the DP83840. When this occurs we print a kernel log message | |
2269 | * describing the link type in use and the fact that it is up. | |
2270 | * | |
2271 | * If a fatal error of some sort is signalled and detected in the interrupt | |
2272 | * service routine, and the chip is reset, or the link is ifconfig'd down | |
2273 | * and then back up, this entire process repeats itself all over again. | |
2274 | */ | |
2275 | /* Note: Above comments are come from sunhme driver. */ | |
2276 | ||
2277 | static int tc35815_try_next_permutation(struct net_device *dev) | |
1da177e4 LT |
2278 | { |
2279 | struct tc35815_local *lp = dev->priv; | |
eea221ce AN |
2280 | int pid = lp->phy_addr; |
2281 | unsigned short bmcr; | |
1da177e4 | 2282 | |
eea221ce | 2283 | bmcr = tc_mdio_read(dev, pid, MII_BMCR); |
1da177e4 | 2284 | |
eea221ce AN |
2285 | /* Downgrade from full to half duplex. Only possible via ethtool. */ |
2286 | if (bmcr & BMCR_FULLDPLX) { | |
2287 | bmcr &= ~BMCR_FULLDPLX; | |
2288 | printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr); | |
2289 | tc_mdio_write(dev, pid, MII_BMCR, bmcr); | |
2290 | return 0; | |
2291 | } | |
2292 | ||
2293 | /* Downgrade from 100 to 10. */ | |
2294 | if (bmcr & BMCR_SPEED100) { | |
2295 | bmcr &= ~BMCR_SPEED100; | |
2296 | printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr); | |
2297 | tc_mdio_write(dev, pid, MII_BMCR, bmcr); | |
2298 | return 0; | |
2299 | } | |
2300 | ||
2301 | /* We've tried everything. */ | |
2302 | return -1; | |
1da177e4 LT |
2303 | } |
2304 | ||
eea221ce AN |
2305 | static void |
2306 | tc35815_display_link_mode(struct net_device *dev) | |
1da177e4 LT |
2307 | { |
2308 | struct tc35815_local *lp = dev->priv; | |
eea221ce AN |
2309 | int pid = lp->phy_addr; |
2310 | unsigned short lpa, bmcr; | |
2311 | char *speed = "", *duplex = ""; | |
2312 | ||
2313 | lpa = tc_mdio_read(dev, pid, MII_LPA); | |
2314 | bmcr = tc_mdio_read(dev, pid, MII_BMCR); | |
2315 | if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL))) | |
2316 | speed = "100Mb/s"; | |
2317 | else | |
2318 | speed = "10Mb/s"; | |
2319 | if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL))) | |
2320 | duplex = "Full Duplex"; | |
2321 | else | |
2322 | duplex = "Half Duplex"; | |
2323 | ||
2324 | if (netif_msg_link(lp)) | |
2325 | printk(KERN_INFO "%s: Link is up at %s, %s.\n", | |
2326 | dev->name, speed, duplex); | |
2327 | printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n", | |
2328 | dev->name, | |
2329 | bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa); | |
2330 | } | |
2331 | ||
2332 | static void tc35815_display_forced_link_mode(struct net_device *dev) | |
2333 | { | |
2334 | struct tc35815_local *lp = dev->priv; | |
2335 | int pid = lp->phy_addr; | |
2336 | unsigned short bmcr; | |
2337 | char *speed = "", *duplex = ""; | |
2338 | ||
2339 | bmcr = tc_mdio_read(dev, pid, MII_BMCR); | |
2340 | if (bmcr & BMCR_SPEED100) | |
2341 | speed = "100Mb/s"; | |
2342 | else | |
2343 | speed = "10Mb/s"; | |
2344 | if (bmcr & BMCR_FULLDPLX) | |
2345 | duplex = "Full Duplex.\n"; | |
2346 | else | |
2347 | duplex = "Half Duplex.\n"; | |
2348 | ||
2349 | if (netif_msg_link(lp)) | |
2350 | printk(KERN_INFO "%s: Link has been forced up at %s, %s", | |
2351 | dev->name, speed, duplex); | |
2352 | } | |
2353 | ||
2354 | static void tc35815_set_link_modes(struct net_device *dev) | |
2355 | { | |
2356 | struct tc35815_local *lp = dev->priv; | |
2357 | struct tc35815_regs __iomem *tr = | |
2358 | (struct tc35815_regs __iomem *)dev->base_addr; | |
2359 | int pid = lp->phy_addr; | |
2360 | unsigned short bmcr, lpa; | |
2361 | int speed; | |
2362 | ||
2363 | if (lp->timer_state == arbwait) { | |
2364 | lpa = tc_mdio_read(dev, pid, MII_LPA); | |
2365 | bmcr = tc_mdio_read(dev, pid, MII_BMCR); | |
2366 | printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n", | |
2367 | dev->name, | |
2368 | bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa); | |
2369 | if (!(lpa & (LPA_10HALF | LPA_10FULL | | |
2370 | LPA_100HALF | LPA_100FULL))) { | |
2371 | /* fall back to 10HALF */ | |
2372 | printk(KERN_INFO "%s: bad ability %04x - falling back to 10HD.\n", | |
2373 | dev->name, lpa); | |
2374 | lpa = LPA_10HALF; | |
2375 | } | |
2376 | if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL))) | |
2377 | lp->fullduplex = 1; | |
2378 | else | |
2379 | lp->fullduplex = 0; | |
2380 | if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL))) | |
2381 | speed = 100; | |
2382 | else | |
2383 | speed = 10; | |
2384 | } else { | |
2385 | /* Forcing a link mode. */ | |
2386 | bmcr = tc_mdio_read(dev, pid, MII_BMCR); | |
2387 | if (bmcr & BMCR_FULLDPLX) | |
2388 | lp->fullduplex = 1; | |
2389 | else | |
2390 | lp->fullduplex = 0; | |
2391 | if (bmcr & BMCR_SPEED100) | |
2392 | speed = 100; | |
2393 | else | |
2394 | speed = 10; | |
2395 | } | |
2396 | ||
2397 | tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_HaltReq, &tr->MAC_Ctl); | |
2398 | if (lp->fullduplex) { | |
2399 | tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_FullDup, &tr->MAC_Ctl); | |
2400 | } else { | |
2401 | tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_FullDup, &tr->MAC_Ctl); | |
2402 | } | |
2403 | tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_HaltReq, &tr->MAC_Ctl); | |
2404 | ||
2405 | /* TX4939 PCFG.SPEEDn bit will be changed on NETDEV_CHANGE event. */ | |
2406 | ||
2407 | #ifndef NO_CHECK_CARRIER | |
2408 | /* TX4939 does not have EnLCarr */ | |
2409 | if (lp->boardtype != TC35815_TX4939) { | |
2410 | #ifdef WORKAROUND_LOSTCAR | |
2411 | /* WORKAROUND: enable LostCrS only if half duplex operation */ | |
2412 | if (!lp->fullduplex && lp->boardtype != TC35815_TX4939) | |
2413 | tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr, &tr->Tx_Ctl); | |
2414 | #endif | |
2415 | } | |
2416 | #endif | |
2417 | lp->mii.full_duplex = lp->fullduplex; | |
2418 | } | |
2419 | ||
2420 | static void tc35815_timer(unsigned long data) | |
2421 | { | |
2422 | struct net_device *dev = (struct net_device *)data; | |
2423 | struct tc35815_local *lp = dev->priv; | |
2424 | int pid = lp->phy_addr; | |
2425 | unsigned short bmsr, bmcr, lpa; | |
2426 | int restart_timer = 0; | |
2427 | ||
2428 | spin_lock_irq(&lp->lock); | |
2429 | ||
2430 | lp->timer_ticks++; | |
2431 | switch (lp->timer_state) { | |
2432 | case arbwait: | |
2433 | /* | |
2434 | * Only allow for 5 ticks, thats 10 seconds and much too | |
2435 | * long to wait for arbitration to complete. | |
2436 | */ | |
2437 | /* TC35815 need more times... */ | |
2438 | if (lp->timer_ticks >= 10) { | |
2439 | /* Enter force mode. */ | |
2440 | if (!options.doforce) { | |
2441 | printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful," | |
2442 | " cable probblem?\n", dev->name); | |
2443 | /* Try to restart the adaptor. */ | |
2444 | tc35815_restart(dev); | |
2445 | goto out; | |
2446 | } | |
2447 | printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful," | |
2448 | " trying force link mode\n", dev->name); | |
2449 | printk(KERN_DEBUG "%s: BMCR %x BMSR %x\n", dev->name, | |
2450 | tc_mdio_read(dev, pid, MII_BMCR), | |
2451 | tc_mdio_read(dev, pid, MII_BMSR)); | |
2452 | bmcr = BMCR_SPEED100; | |
2453 | tc_mdio_write(dev, pid, MII_BMCR, bmcr); | |
2454 | ||
2455 | /* | |
2456 | * OK, seems we need do disable the transceiver | |
2457 | * for the first tick to make sure we get an | |
2458 | * accurate link state at the second tick. | |
2459 | */ | |
2460 | ||
2461 | lp->timer_state = ltrywait; | |
2462 | lp->timer_ticks = 0; | |
2463 | restart_timer = 1; | |
1da177e4 | 2464 | } else { |
eea221ce AN |
2465 | /* Anything interesting happen? */ |
2466 | bmsr = tc_mdio_read(dev, pid, MII_BMSR); | |
2467 | if (bmsr & BMSR_ANEGCOMPLETE) { | |
2468 | /* Just what we've been waiting for... */ | |
2469 | tc35815_set_link_modes(dev); | |
2470 | ||
2471 | /* | |
2472 | * Success, at least so far, advance our state | |
2473 | * engine. | |
2474 | */ | |
2475 | lp->timer_state = lupwait; | |
2476 | restart_timer = 1; | |
2477 | } else { | |
2478 | restart_timer = 1; | |
2479 | } | |
2480 | } | |
2481 | break; | |
2482 | ||
2483 | case lupwait: | |
2484 | /* | |
2485 | * Auto negotiation was successful and we are awaiting a | |
2486 | * link up status. I have decided to let this timer run | |
2487 | * forever until some sort of error is signalled, reporting | |
2488 | * a message to the user at 10 second intervals. | |
2489 | */ | |
2490 | bmsr = tc_mdio_read(dev, pid, MII_BMSR); | |
2491 | if (bmsr & BMSR_LSTATUS) { | |
2492 | /* | |
2493 | * Wheee, it's up, display the link mode in use and put | |
2494 | * the timer to sleep. | |
2495 | */ | |
2496 | tc35815_display_link_mode(dev); | |
2497 | netif_carrier_on(dev); | |
2498 | #ifdef WORKAROUND_100HALF_PROMISC | |
2499 | /* delayed promiscuous enabling */ | |
2500 | if (dev->flags & IFF_PROMISC) | |
2501 | tc35815_set_multicast_list(dev); | |
2502 | #endif | |
2503 | #if 1 | |
2504 | lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA); | |
2505 | lp->timer_state = lcheck; | |
2506 | restart_timer = 1; | |
2507 | #else | |
2508 | lp->timer_state = asleep; | |
2509 | restart_timer = 0; | |
2510 | #endif | |
2511 | } else { | |
2512 | if (lp->timer_ticks >= 10) { | |
2513 | printk(KERN_NOTICE "%s: Auto negotiation successful, link still " | |
2514 | "not completely up.\n", dev->name); | |
2515 | lp->timer_ticks = 0; | |
2516 | restart_timer = 1; | |
2517 | } else { | |
2518 | restart_timer = 1; | |
2519 | } | |
2520 | } | |
2521 | break; | |
2522 | ||
2523 | case ltrywait: | |
2524 | /* | |
2525 | * Making the timeout here too long can make it take | |
2526 | * annoyingly long to attempt all of the link mode | |
2527 | * permutations, but then again this is essentially | |
2528 | * error recovery code for the most part. | |
2529 | */ | |
2530 | bmsr = tc_mdio_read(dev, pid, MII_BMSR); | |
2531 | bmcr = tc_mdio_read(dev, pid, MII_BMCR); | |
2532 | if (lp->timer_ticks == 1) { | |
2533 | /* | |
2534 | * Re-enable transceiver, we'll re-enable the | |
2535 | * transceiver next tick, then check link state | |
2536 | * on the following tick. | |
2537 | */ | |
2538 | restart_timer = 1; | |
2539 | break; | |
2540 | } | |
2541 | if (lp->timer_ticks == 2) { | |
2542 | restart_timer = 1; | |
2543 | break; | |
2544 | } | |
2545 | if (bmsr & BMSR_LSTATUS) { | |
2546 | /* Force mode selection success. */ | |
2547 | tc35815_display_forced_link_mode(dev); | |
2548 | netif_carrier_on(dev); | |
2549 | tc35815_set_link_modes(dev); | |
2550 | #ifdef WORKAROUND_100HALF_PROMISC | |
2551 | /* delayed promiscuous enabling */ | |
2552 | if (dev->flags & IFF_PROMISC) | |
2553 | tc35815_set_multicast_list(dev); | |
2554 | #endif | |
2555 | #if 1 | |
2556 | lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA); | |
2557 | lp->timer_state = lcheck; | |
2558 | restart_timer = 1; | |
2559 | #else | |
2560 | lp->timer_state = asleep; | |
2561 | restart_timer = 0; | |
2562 | #endif | |
2563 | } else { | |
2564 | if (lp->timer_ticks >= 4) { /* 6 seconds or so... */ | |
2565 | int ret; | |
2566 | ||
2567 | ret = tc35815_try_next_permutation(dev); | |
2568 | if (ret == -1) { | |
2569 | /* | |
2570 | * Aieee, tried them all, reset the | |
2571 | * chip and try all over again. | |
2572 | */ | |
2573 | printk(KERN_NOTICE "%s: Link down, " | |
2574 | "cable problem?\n", | |
2575 | dev->name); | |
2576 | ||
2577 | /* Try to restart the adaptor. */ | |
2578 | tc35815_restart(dev); | |
2579 | goto out; | |
1da177e4 | 2580 | } |
eea221ce AN |
2581 | lp->timer_ticks = 0; |
2582 | restart_timer = 1; | |
2583 | } else { | |
2584 | restart_timer = 1; | |
1da177e4 | 2585 | } |
eea221ce AN |
2586 | } |
2587 | break; | |
2588 | ||
2589 | case lcheck: | |
2590 | bmcr = tc_mdio_read(dev, pid, MII_BMCR); | |
2591 | lpa = tc_mdio_read(dev, pid, MII_LPA); | |
2592 | if (bmcr & (BMCR_PDOWN | BMCR_ISOLATE | BMCR_RESET)) { | |
2593 | printk(KERN_ERR "%s: PHY down? (BMCR %x)\n", dev->name, | |
2594 | bmcr); | |
2595 | } else if ((lp->saved_lpa ^ lpa) & | |
2596 | (LPA_100FULL|LPA_100HALF|LPA_10FULL|LPA_10HALF)) { | |
2597 | printk(KERN_NOTICE "%s: link status changed" | |
2598 | " (BMCR %x LPA %x->%x)\n", dev->name, | |
2599 | bmcr, lp->saved_lpa, lpa); | |
2600 | } else { | |
2601 | /* go on */ | |
2602 | restart_timer = 1; | |
2603 | break; | |
2604 | } | |
2605 | /* Try to restart the adaptor. */ | |
2606 | tc35815_restart(dev); | |
2607 | goto out; | |
2608 | ||
2609 | case asleep: | |
2610 | default: | |
2611 | /* Can't happens.... */ | |
2612 | printk(KERN_ERR "%s: Aieee, link timer is asleep but we got " | |
2613 | "one anyways!\n", dev->name); | |
2614 | restart_timer = 0; | |
2615 | lp->timer_ticks = 0; | |
2616 | lp->timer_state = asleep; /* foo on you */ | |
2617 | break; | |
2618 | } | |
2619 | ||
2620 | if (restart_timer) { | |
2621 | lp->timer.expires = jiffies + msecs_to_jiffies(1200); | |
2622 | add_timer(&lp->timer); | |
2623 | } | |
2624 | out: | |
2625 | spin_unlock_irq(&lp->lock); | |
2626 | } | |
2627 | ||
2628 | static void tc35815_start_auto_negotiation(struct net_device *dev, | |
2629 | struct ethtool_cmd *ep) | |
2630 | { | |
2631 | struct tc35815_local *lp = dev->priv; | |
2632 | int pid = lp->phy_addr; | |
2633 | unsigned short bmsr, bmcr, advertize; | |
2634 | int timeout; | |
2635 | ||
2636 | netif_carrier_off(dev); | |
2637 | bmsr = tc_mdio_read(dev, pid, MII_BMSR); | |
2638 | bmcr = tc_mdio_read(dev, pid, MII_BMCR); | |
2639 | advertize = tc_mdio_read(dev, pid, MII_ADVERTISE); | |
2640 | ||
2641 | if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) { | |
2642 | if (options.speed || options.duplex) { | |
2643 | /* Advertise only specified configuration. */ | |
2644 | advertize &= ~(ADVERTISE_10HALF | | |
2645 | ADVERTISE_10FULL | | |
2646 | ADVERTISE_100HALF | | |
2647 | ADVERTISE_100FULL); | |
2648 | if (options.speed != 10) { | |
2649 | if (options.duplex != 1) | |
2650 | advertize |= ADVERTISE_100FULL; | |
2651 | if (options.duplex != 2) | |
2652 | advertize |= ADVERTISE_100HALF; | |
2653 | } | |
2654 | if (options.speed != 100) { | |
2655 | if (options.duplex != 1) | |
2656 | advertize |= ADVERTISE_10FULL; | |
2657 | if (options.duplex != 2) | |
2658 | advertize |= ADVERTISE_10HALF; | |
2659 | } | |
2660 | if (options.speed == 100) | |
2661 | bmcr |= BMCR_SPEED100; | |
2662 | else if (options.speed == 10) | |
2663 | bmcr &= ~BMCR_SPEED100; | |
2664 | if (options.duplex == 2) | |
2665 | bmcr |= BMCR_FULLDPLX; | |
2666 | else if (options.duplex == 1) | |
2667 | bmcr &= ~BMCR_FULLDPLX; | |
2668 | } else { | |
2669 | /* Advertise everything we can support. */ | |
2670 | if (bmsr & BMSR_10HALF) | |
2671 | advertize |= ADVERTISE_10HALF; | |
1da177e4 | 2672 | else |
eea221ce AN |
2673 | advertize &= ~ADVERTISE_10HALF; |
2674 | if (bmsr & BMSR_10FULL) | |
2675 | advertize |= ADVERTISE_10FULL; | |
1da177e4 | 2676 | else |
eea221ce AN |
2677 | advertize &= ~ADVERTISE_10FULL; |
2678 | if (bmsr & BMSR_100HALF) | |
2679 | advertize |= ADVERTISE_100HALF; | |
2680 | else | |
2681 | advertize &= ~ADVERTISE_100HALF; | |
2682 | if (bmsr & BMSR_100FULL) | |
2683 | advertize |= ADVERTISE_100FULL; | |
2684 | else | |
2685 | advertize &= ~ADVERTISE_100FULL; | |
2686 | } | |
2687 | ||
2688 | tc_mdio_write(dev, pid, MII_ADVERTISE, advertize); | |
2689 | ||
2690 | /* Enable Auto-Negotiation, this is usually on already... */ | |
2691 | bmcr |= BMCR_ANENABLE; | |
2692 | tc_mdio_write(dev, pid, MII_BMCR, bmcr); | |
2693 | ||
2694 | /* Restart it to make sure it is going. */ | |
2695 | bmcr |= BMCR_ANRESTART; | |
2696 | tc_mdio_write(dev, pid, MII_BMCR, bmcr); | |
2697 | printk(KERN_DEBUG "%s: ADVERTISE %x BMCR %x\n", dev->name, advertize, bmcr); | |
2698 | ||
2699 | /* BMCR_ANRESTART self clears when the process has begun. */ | |
2700 | timeout = 64; /* More than enough. */ | |
2701 | while (--timeout) { | |
2702 | bmcr = tc_mdio_read(dev, pid, MII_BMCR); | |
2703 | if (!(bmcr & BMCR_ANRESTART)) | |
2704 | break; /* got it. */ | |
2705 | udelay(10); | |
2706 | } | |
2707 | if (!timeout) { | |
2708 | printk(KERN_ERR "%s: TC35815 would not start auto " | |
2709 | "negotiation BMCR=0x%04x\n", | |
2710 | dev->name, bmcr); | |
2711 | printk(KERN_NOTICE "%s: Performing force link " | |
2712 | "detection.\n", dev->name); | |
2713 | goto force_link; | |
2714 | } else { | |
2715 | printk(KERN_DEBUG "%s: auto negotiation started.\n", dev->name); | |
2716 | lp->timer_state = arbwait; | |
1da177e4 | 2717 | } |
eea221ce AN |
2718 | } else { |
2719 | force_link: | |
2720 | /* Force the link up, trying first a particular mode. | |
2721 | * Either we are here at the request of ethtool or | |
2722 | * because the Happy Meal would not start to autoneg. | |
2723 | */ | |
2724 | ||
2725 | /* Disable auto-negotiation in BMCR, enable the duplex and | |
2726 | * speed setting, init the timer state machine, and fire it off. | |
2727 | */ | |
2728 | if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) { | |
2729 | bmcr = BMCR_SPEED100; | |
2730 | } else { | |
2731 | if (ep->speed == SPEED_100) | |
2732 | bmcr = BMCR_SPEED100; | |
2733 | else | |
2734 | bmcr = 0; | |
2735 | if (ep->duplex == DUPLEX_FULL) | |
2736 | bmcr |= BMCR_FULLDPLX; | |
2737 | } | |
2738 | tc_mdio_write(dev, pid, MII_BMCR, bmcr); | |
2739 | ||
2740 | /* OK, seems we need do disable the transceiver for the first | |
2741 | * tick to make sure we get an accurate link state at the | |
2742 | * second tick. | |
2743 | */ | |
2744 | lp->timer_state = ltrywait; | |
1da177e4 LT |
2745 | } |
2746 | ||
eea221ce AN |
2747 | del_timer(&lp->timer); |
2748 | lp->timer_ticks = 0; | |
2749 | lp->timer.expires = jiffies + msecs_to_jiffies(1200); | |
2750 | add_timer(&lp->timer); | |
2751 | } | |
1da177e4 | 2752 | |
eea221ce AN |
2753 | static void tc35815_find_phy(struct net_device *dev) |
2754 | { | |
2755 | struct tc35815_local *lp = dev->priv; | |
2756 | int pid = lp->phy_addr; | |
2757 | unsigned short id0; | |
2758 | ||
2759 | /* find MII phy */ | |
2760 | for (pid = 31; pid >= 0; pid--) { | |
2761 | id0 = tc_mdio_read(dev, pid, MII_BMSR); | |
2762 | if (id0 != 0xffff && id0 != 0x0000 && | |
2763 | (id0 & BMSR_RESV) != (0xffff & BMSR_RESV) /* paranoia? */ | |
2764 | ) { | |
2765 | lp->phy_addr = pid; | |
2766 | break; | |
2767 | } | |
2768 | } | |
2769 | if (pid < 0) { | |
2770 | printk(KERN_ERR "%s: No MII Phy found.\n", | |
2771 | dev->name); | |
2772 | lp->phy_addr = pid = 0; | |
1da177e4 | 2773 | } |
eea221ce AN |
2774 | |
2775 | lp->mii_id[0] = tc_mdio_read(dev, pid, MII_PHYSID1); | |
2776 | lp->mii_id[1] = tc_mdio_read(dev, pid, MII_PHYSID2); | |
2777 | if (netif_msg_hw(lp)) | |
2778 | printk(KERN_INFO "%s: PHY(%02x) ID %04x %04x\n", dev->name, | |
2779 | pid, lp->mii_id[0], lp->mii_id[1]); | |
1da177e4 LT |
2780 | } |
2781 | ||
eea221ce | 2782 | static void tc35815_phy_chip_init(struct net_device *dev) |
1da177e4 | 2783 | { |
eea221ce AN |
2784 | struct tc35815_local *lp = dev->priv; |
2785 | int pid = lp->phy_addr; | |
2786 | unsigned short bmcr; | |
2787 | struct ethtool_cmd ecmd, *ep; | |
2788 | ||
2789 | /* dis-isolate if needed. */ | |
2790 | bmcr = tc_mdio_read(dev, pid, MII_BMCR); | |
2791 | if (bmcr & BMCR_ISOLATE) { | |
2792 | int count = 32; | |
2793 | printk(KERN_DEBUG "%s: unisolating...", dev->name); | |
2794 | tc_mdio_write(dev, pid, MII_BMCR, bmcr & ~BMCR_ISOLATE); | |
2795 | while (--count) { | |
2796 | if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_ISOLATE)) | |
2797 | break; | |
2798 | udelay(20); | |
2799 | } | |
2800 | printk(" %s.\n", count ? "done" : "failed"); | |
2801 | } | |
1da177e4 | 2802 | |
eea221ce AN |
2803 | if (options.speed && options.duplex) { |
2804 | ecmd.autoneg = AUTONEG_DISABLE; | |
2805 | ecmd.speed = options.speed == 10 ? SPEED_10 : SPEED_100; | |
2806 | ecmd.duplex = options.duplex == 1 ? DUPLEX_HALF : DUPLEX_FULL; | |
2807 | ep = &ecmd; | |
2808 | } else { | |
2809 | ep = NULL; | |
2810 | } | |
2811 | tc35815_start_auto_negotiation(dev, ep); | |
2812 | } | |
2813 | ||
2814 | static void tc35815_chip_reset(struct net_device *dev) | |
2815 | { | |
2816 | struct tc35815_regs __iomem *tr = | |
2817 | (struct tc35815_regs __iomem *)dev->base_addr; | |
2818 | int i; | |
1da177e4 LT |
2819 | /* reset the controller */ |
2820 | tc_writel(MAC_Reset, &tr->MAC_Ctl); | |
eea221ce AN |
2821 | udelay(4); /* 3200ns */ |
2822 | i = 0; | |
2823 | while (tc_readl(&tr->MAC_Ctl) & MAC_Reset) { | |
2824 | if (i++ > 100) { | |
2825 | printk(KERN_ERR "%s: MAC reset failed.\n", dev->name); | |
2826 | break; | |
2827 | } | |
2828 | mdelay(1); | |
2829 | } | |
1da177e4 LT |
2830 | tc_writel(0, &tr->MAC_Ctl); |
2831 | ||
2832 | /* initialize registers to default value */ | |
2833 | tc_writel(0, &tr->DMA_Ctl); | |
2834 | tc_writel(0, &tr->TxThrsh); | |
2835 | tc_writel(0, &tr->TxPollCtr); | |
2836 | tc_writel(0, &tr->RxFragSize); | |
2837 | tc_writel(0, &tr->Int_En); | |
2838 | tc_writel(0, &tr->FDA_Bas); | |
2839 | tc_writel(0, &tr->FDA_Lim); | |
2840 | tc_writel(0xffffffff, &tr->Int_Src); /* Write 1 to clear */ | |
2841 | tc_writel(0, &tr->CAM_Ctl); | |
2842 | tc_writel(0, &tr->Tx_Ctl); | |
2843 | tc_writel(0, &tr->Rx_Ctl); | |
2844 | tc_writel(0, &tr->CAM_Ena); | |
2845 | (void)tc_readl(&tr->Miss_Cnt); /* Read to clear */ | |
2846 | ||
eea221ce AN |
2847 | /* initialize internal SRAM */ |
2848 | tc_writel(DMA_TestMode, &tr->DMA_Ctl); | |
2849 | for (i = 0; i < 0x1000; i += 4) { | |
2850 | tc_writel(i, &tr->CAM_Adr); | |
2851 | tc_writel(0, &tr->CAM_Data); | |
2852 | } | |
2853 | tc_writel(0, &tr->DMA_Ctl); | |
1da177e4 LT |
2854 | } |
2855 | ||
2856 | static void tc35815_chip_init(struct net_device *dev) | |
2857 | { | |
2858 | struct tc35815_local *lp = dev->priv; | |
eea221ce AN |
2859 | struct tc35815_regs __iomem *tr = |
2860 | (struct tc35815_regs __iomem *)dev->base_addr; | |
1da177e4 LT |
2861 | unsigned long txctl = TX_CTL_CMD; |
2862 | ||
2863 | tc35815_phy_chip_init(dev); | |
2864 | ||
2865 | /* load station address to CAM */ | |
eea221ce | 2866 | tc35815_set_cam_entry(dev, CAM_ENTRY_SOURCE, dev->dev_addr); |
1da177e4 LT |
2867 | |
2868 | /* Enable CAM (broadcast and unicast) */ | |
2869 | tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena); | |
2870 | tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl); | |
2871 | ||
eea221ce AN |
2872 | /* Use DMA_RxAlign_2 to make IP header 4-byte aligned. */ |
2873 | if (HAVE_DMA_RXALIGN(lp)) | |
2874 | tc_writel(DMA_BURST_SIZE | DMA_RxAlign_2, &tr->DMA_Ctl); | |
2875 | else | |
2876 | tc_writel(DMA_BURST_SIZE, &tr->DMA_Ctl); | |
2877 | #ifdef TC35815_USE_PACKEDBUFFER | |
1da177e4 | 2878 | tc_writel(RxFrag_EnPack | ETH_ZLEN, &tr->RxFragSize); /* Packing */ |
eea221ce AN |
2879 | #else |
2880 | tc_writel(ETH_ZLEN, &tr->RxFragSize); | |
2881 | #endif | |
1da177e4 LT |
2882 | tc_writel(0, &tr->TxPollCtr); /* Batch mode */ |
2883 | tc_writel(TX_THRESHOLD, &tr->TxThrsh); | |
2884 | tc_writel(INT_EN_CMD, &tr->Int_En); | |
2885 | ||
2886 | /* set queues */ | |
eea221ce | 2887 | tc_writel(fd_virt_to_bus(lp, lp->rfd_base), &tr->FDA_Bas); |
1da177e4 LT |
2888 | tc_writel((unsigned long)lp->rfd_limit - (unsigned long)lp->rfd_base, |
2889 | &tr->FDA_Lim); | |
2890 | /* | |
2891 | * Activation method: | |
eea221ce | 2892 | * First, enable the MAC Transmitter and the DMA Receive circuits. |
1da177e4 LT |
2893 | * Then enable the DMA Transmitter and the MAC Receive circuits. |
2894 | */ | |
eea221ce | 2895 | tc_writel(fd_virt_to_bus(lp, lp->fbl_ptr), &tr->BLFrmPtr); /* start DMA receiver */ |
1da177e4 | 2896 | tc_writel(RX_CTL_CMD, &tr->Rx_Ctl); /* start MAC receiver */ |
eea221ce | 2897 | |
1da177e4 | 2898 | /* start MAC transmitter */ |
eea221ce AN |
2899 | #ifndef NO_CHECK_CARRIER |
2900 | /* TX4939 does not have EnLCarr */ | |
2901 | if (lp->boardtype == TC35815_TX4939) | |
2902 | txctl &= ~Tx_EnLCarr; | |
2903 | #ifdef WORKAROUND_LOSTCAR | |
1da177e4 | 2904 | /* WORKAROUND: ignore LostCrS in full duplex operation */ |
eea221ce AN |
2905 | if ((lp->timer_state != asleep && lp->timer_state != lcheck) || |
2906 | lp->fullduplex) | |
2907 | txctl &= ~Tx_EnLCarr; | |
2908 | #endif | |
2909 | #endif /* !NO_CHECK_CARRIER */ | |
1da177e4 LT |
2910 | #ifdef GATHER_TXINT |
2911 | txctl &= ~Tx_EnComp; /* disable global tx completion int. */ | |
2912 | #endif | |
2913 | tc_writel(txctl, &tr->Tx_Ctl); | |
eea221ce AN |
2914 | } |
2915 | ||
2916 | #ifdef CONFIG_PM | |
2917 | static int tc35815_suspend(struct pci_dev *pdev, pm_message_t state) | |
2918 | { | |
2919 | struct net_device *dev = pci_get_drvdata(pdev); | |
2920 | struct tc35815_local *lp = dev->priv; | |
2921 | unsigned long flags; | |
2922 | ||
2923 | pci_save_state(pdev); | |
2924 | if (!netif_running(dev)) | |
2925 | return 0; | |
2926 | netif_device_detach(dev); | |
2927 | spin_lock_irqsave(&lp->lock, flags); | |
2928 | del_timer(&lp->timer); /* Kill if running */ | |
2929 | tc35815_chip_reset(dev); | |
1da177e4 | 2930 | spin_unlock_irqrestore(&lp->lock, flags); |
eea221ce AN |
2931 | pci_set_power_state(pdev, PCI_D3hot); |
2932 | return 0; | |
1da177e4 LT |
2933 | } |
2934 | ||
eea221ce AN |
2935 | static int tc35815_resume(struct pci_dev *pdev) |
2936 | { | |
2937 | struct net_device *dev = pci_get_drvdata(pdev); | |
2938 | struct tc35815_local *lp = dev->priv; | |
2939 | unsigned long flags; | |
2940 | ||
2941 | pci_restore_state(pdev); | |
2942 | if (!netif_running(dev)) | |
2943 | return 0; | |
2944 | pci_set_power_state(pdev, PCI_D0); | |
2945 | spin_lock_irqsave(&lp->lock, flags); | |
2946 | tc35815_restart(dev); | |
2947 | spin_unlock_irqrestore(&lp->lock, flags); | |
2948 | netif_device_attach(dev); | |
2949 | return 0; | |
2950 | } | |
2951 | #endif /* CONFIG_PM */ | |
2952 | ||
2953 | static struct pci_driver tc35815_pci_driver = { | |
2954 | .name = MODNAME, | |
2955 | .id_table = tc35815_pci_tbl, | |
2956 | .probe = tc35815_init_one, | |
2957 | .remove = __devexit_p(tc35815_remove_one), | |
2958 | #ifdef CONFIG_PM | |
2959 | .suspend = tc35815_suspend, | |
2960 | .resume = tc35815_resume, | |
2961 | #endif | |
1da177e4 LT |
2962 | }; |
2963 | ||
eea221ce AN |
2964 | module_param_named(speed, options.speed, int, 0); |
2965 | MODULE_PARM_DESC(speed, "0:auto, 10:10Mbps, 100:100Mbps"); | |
2966 | module_param_named(duplex, options.duplex, int, 0); | |
2967 | MODULE_PARM_DESC(duplex, "0:auto, 1:half, 2:full"); | |
2968 | module_param_named(doforce, options.doforce, int, 0); | |
2969 | MODULE_PARM_DESC(doforce, "try force link mode if auto-negotiation failed"); | |
2970 | ||
1da177e4 LT |
2971 | static int __init tc35815_init_module(void) |
2972 | { | |
eea221ce | 2973 | return pci_register_driver(&tc35815_pci_driver); |
1da177e4 LT |
2974 | } |
2975 | ||
2976 | static void __exit tc35815_cleanup_module(void) | |
2977 | { | |
eea221ce | 2978 | pci_unregister_driver(&tc35815_pci_driver); |
1da177e4 | 2979 | } |
420e8524 | 2980 | |
1da177e4 LT |
2981 | module_init(tc35815_init_module); |
2982 | module_exit(tc35815_cleanup_module); | |
eea221ce AN |
2983 | |
2984 | MODULE_DESCRIPTION("TOSHIBA TC35815 PCI 10M/100M Ethernet driver"); | |
2985 | MODULE_LICENSE("GPL"); |