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CommitLineData
1da177e4
LT		 1/*******************************************************************************
2 *
3 * Linux ThunderLAN Driver
4 *
5 * tlan.c
6 * by James Banks
7 *
8 * (C) 1997-1998 Caldera, Inc.
9 * (C) 1998 James Banks
10 * (C) 1999-2001 Torben Mathiasen
11 * (C) 2002 Samuel Chessman
12 *
13 * This software may be used and distributed according to the terms
14 * of the GNU General Public License, incorporated herein by reference.
15 *
1da177e4
LT		 16 ** Useful (if not required) reading:
17 *
18 * Texas Instruments, ThunderLAN Programmer's Guide,
19 * TI Literature Number SPWU013A
20 * available in PDF format from www.ti.com
21 * Level One, LXT901 and LXT970 Data Sheets
22 * available in PDF format from www.level1.com
23 * National Semiconductor, DP83840A Data Sheet
24 * available in PDF format from www.national.com
25 * Microchip Technology, 24C01A/02A/04A Data Sheet
26 * available in PDF format from www.microchip.com
27 *
28 * Change History
29 *
30 * Tigran Aivazian <tigran@sco.com>: TLan_PciProbe() now uses
31 * new PCI BIOS interface.
113aa838
AC		 32 * Alan Cox <alan@lxorguk.ukuu.org.uk>:
33 * Fixed the out of memory
1da177e4 34 * handling.
6aa20a22 35 *
1da177e4
LT		 36 * Torben Mathiasen <torben.mathiasen@compaq.com> New Maintainer!
37 *
38 * v1.1 Dec 20, 1999 - Removed linux version checking
6aa20a22 39 * Patch from Tigran Aivazian.
1da177e4
LT		 40 * - v1.1 includes Alan's SMP updates.
41 * - We still have problems on SMP though,
6aa20a22
JG		 42 * but I'm looking into that.
43 *
1da177e4
LT		 44 * v1.2 Jan 02, 2000 - Hopefully fixed the SMP deadlock.
45 * - Removed dependency of HZ being 100.
6aa20a22 46 * - We now allow higher priority timers to
1da177e4
LT		 47 * overwrite timers like TLAN_TIMER_ACTIVITY
48 * Patch from John Cagle <john.cagle@compaq.com>.
49 * - Fixed a few compiler warnings.
50 *
51 * v1.3 Feb 04, 2000 - Fixed the remaining HZ issues.
6aa20a22 52 * - Removed call to pci_present().
1da177e4 53 * - Removed SA_INTERRUPT flag from irq handler.
6aa20a22 54 * - Added __init and __initdata to reduce resisdent
1da177e4
LT		 55 * code size.
56 * - Driver now uses module_init/module_exit.
57 * - Rewrote init_module and tlan_probe to
58 * share a lot more code. We now use tlan_probe
59 * with builtin and module driver.
6aa20a22
JG		 60 * - Driver ported to new net API.
61 * - tlan.txt has been reworked to reflect current
1da177e4
LT		 62 * driver (almost)
63 * - Other minor stuff
64 *
65 * v1.4 Feb 10, 2000 - Updated with more changes required after Dave's
66 * network cleanup in 2.3.43pre7 (Tigran & myself)
67 * - Minor stuff.
68 *
69 * v1.5 March 22, 2000 - Fixed another timer bug that would hang the driver
70 * if no cable/link were present.
71 * - Cosmetic changes.
72 * - TODO: Port completely to new PCI/DMA API
73 * Auto-Neg fallback.
74 *
75 * v1.6 April 04, 2000 - Fixed driver support for kernel-parameters. Haven't
6aa20a22 76 * tested it though, as the kernel support is currently
1da177e4
LT		 77 * broken (2.3.99p4p3).
78 * - Updated tlan.txt accordingly.
79 * - Adjusted minimum/maximum frame length.
6aa20a22 80 * - There is now a TLAN website up at
1da177e4
LT		 81 * http://tlan.kernel.dk
82 *
83 * v1.7 April 07, 2000 - Started to implement custom ioctls. Driver now
84 * reports PHY information when used with Donald
85 * Beckers userspace MII diagnostics utility.
86 *
87 * v1.8 April 23, 2000 - Fixed support for forced speed/duplex settings.
88 * - Added link information to Auto-Neg and forced
89 * modes. When NIC operates with auto-neg the driver
90 * will report Link speed & duplex modes as well as
91 * link partner abilities. When forced link is used,
92 * the driver will report status of the established
93 * link.
6aa20a22
JG		 94 * Please read tlan.txt for additional information.
95 * - Removed call to check_region(), and used
1da177e4 96 * return value of request_region() instead.
6aa20a22 97 *
1da177e4
LT		 98 * v1.8a May 28, 2000 - Minor updates.
99 *
100 * v1.9 July 25, 2000 - Fixed a few remaining Full-Duplex issues.
101 * - Updated with timer fixes from Andrew Morton.
102 * - Fixed module race in TLan_Open.
103 * - Added routine to monitor PHY status.
104 * - Added activity led support for Proliant devices.
105 *
6aa20a22
JG		 106 * v1.10 Aug 30, 2000 - Added support for EISA based tlan controllers
107 * like the Compaq NetFlex3/E.
1da177e4
LT		 108 * - Rewrote tlan_probe to better handle multiple
109 * bus probes. Probing and device setup is now
110 * done through TLan_Probe and TLan_init_one. Actual
6aa20a22 111 * hardware probe is done with kernel API and
1da177e4
LT		 112 * TLan_EisaProbe.
113 * - Adjusted debug information for probing.
6aa20a22
JG		 114 * - Fixed bug that would cause general debug information
115 * to be printed after driver removal.
1da177e4 116 * - Added transmit timeout handling.
6aa20a22
JG		 117 * - Fixed OOM return values in tlan_probe.
118 * - Fixed possible mem leak in tlan_exit
1da177e4
LT		 119 * (now tlan_remove_one).
120 * - Fixed timer bug in TLan_phyMonitor.
121 * - This driver version is alpha quality, please
122 * send me any bug issues you may encounter.
123 *
6aa20a22 124 * v1.11 Aug 31, 2000 - Do not try to register irq 0 if no irq line was
1da177e4
LT		 125 * set for EISA cards.
126 * - Added support for NetFlex3/E with nibble-rate
127 * 10Base-T PHY. This is untestet as I haven't got
128 * one of these cards.
129 * - Fixed timer being added twice.
130 * - Disabled PhyMonitoring by default as this is
131 * work in progress. Define MONITOR to enable it.
132 * - Now we don't display link info with PHYs that
133 * doesn't support it (level1).
134 * - Incresed tx_timeout beacuse of auto-neg.
135 * - Adjusted timers for forced speeds.
136 *
137 * v1.12 Oct 12, 2000 - Minor fixes (memleak, init, etc.)
138 *
139 * v1.13 Nov 28, 2000 - Stop flooding console with auto-neg issues
140 * when link can't be established.
141 * - Added the bbuf option as a kernel parameter.
142 * - Fixed ioaddr probe bug.
143 * - Fixed stupid deadlock with MII interrupts.
6aa20a22 144 * - Added support for speed/duplex selection with
1da177e4
LT		 145 * multiple nics.
146 * - Added partly fix for TX Channel lockup with
147 * TLAN v1.0 silicon. This needs to be investigated
148 * further.
149 *
150 * v1.14 Dec 16, 2000 - Added support for servicing multiple frames per.
151 * interrupt. Thanks goes to
152 * Adam Keys <adam@ti.com>
153 * Denis Beaudoin <dbeaudoin@ti.com>
154 * for providing the patch.
155 * - Fixed auto-neg output when using multiple
156 * adapters.
157 * - Converted to use new taskq interface.
158 *
159 * v1.14a Jan 6, 2001 - Minor adjustments (spinlocks, etc.)
160 *
161 * Samuel Chessman <chessman@tux.org> New Maintainer!
162 *
163 * v1.15 Apr 4, 2002 - Correct operation when aui=1 to be
164 * 10T half duplex no loopback
165 * Thanks to Gunnar Eikman
166 *******************************************************************************/
167
168#include <linux/module.h>
169#include <linux/init.h>
170#include <linux/ioport.h>
171#include <linux/eisa.h>
172#include <linux/pci.h>
1e7f0bd8 173#include <linux/dma-mapping.h>
1da177e4
LT		 174#include <linux/netdevice.h>
175#include <linux/etherdevice.h>
176#include <linux/delay.h>
177#include <linux/spinlock.h>
178#include <linux/workqueue.h>
179#include <linux/mii.h>
180
181#include "tlan.h"
182
183typedef u32 (TLanIntVectorFunc)( struct net_device *, u16 );
184
185
186/* For removing EISA devices */
187static struct net_device *TLan_Eisa_Devices;
188
189static int TLanDevicesInstalled;
190
191/* Set speed, duplex and aui settings */
192static int aui[MAX_TLAN_BOARDS];
193static int duplex[MAX_TLAN_BOARDS];
194static int speed[MAX_TLAN_BOARDS];
195static int boards_found;
15efa9bb
SH		 196module_param_array(aui, int, NULL, 0);
197module_param_array(duplex, int, NULL, 0);
198module_param_array(speed, int, NULL, 0);
199MODULE_PARM_DESC(aui, "ThunderLAN use AUI port(s) (0-1)");
200MODULE_PARM_DESC(duplex, "ThunderLAN duplex setting(s) (0-default, 1-half, 2-full)");
201MODULE_PARM_DESC(speed, "ThunderLAN port speen setting(s) (0,10,100)");
1da177e4
LT		 202
203MODULE_AUTHOR("Maintainer: Samuel Chessman <chessman@tux.org>");
204MODULE_DESCRIPTION("Driver for TI ThunderLAN based ethernet PCI adapters");
205MODULE_LICENSE("GPL");
206
207
208/* Define this to enable Link beat monitoring */
209#undef MONITOR
210
211/* Turn on debugging. See Documentation/networking/tlan.txt for details */
212static int debug;
15efa9bb
SH		 213module_param(debug, int, 0);
214MODULE_PARM_DESC(debug, "ThunderLAN debug mask");
1da177e4
LT		 215
216static int bbuf;
15efa9bb
SH		 217module_param(bbuf, int, 0);
218MODULE_PARM_DESC(bbuf, "ThunderLAN use big buffer (0-1)");
219
a3ccc789 220static const char TLanSignature[] = "TLAN";
1da177e4
LT		 221static const char tlan_banner[] = "ThunderLAN driver v1.15\n";
222static int tlan_have_pci;
223static int tlan_have_eisa;
224
225static const char *media[] = {
6aa20a22 226 "10BaseT-HD ", "10BaseT-FD ","100baseTx-HD ",
1da177e4
LT		 227 "100baseTx-FD", "100baseT4", NULL
228};
229
230static struct board {
231 const char *deviceLabel;
232 u32 flags;
233 u16 addrOfs;
234} board_info[] = {
235 { "Compaq Netelligent 10 T PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
236 { "Compaq Netelligent 10/100 TX PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
237 { "Compaq Integrated NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
dfc2c0a6
SH		 238 { "Compaq NetFlex-3/P",
239 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
1da177e4 240 { "Compaq NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
dfc2c0a6
SH		 241 { "Compaq Netelligent Integrated 10/100 TX UTP",
242 TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
1da177e4
LT		 243 { "Compaq Netelligent Dual 10/100 TX PCI UTP", TLAN_ADAPTER_NONE, 0x83 },
244 { "Compaq Netelligent 10/100 TX Embedded UTP", TLAN_ADAPTER_NONE, 0x83 },
245 { "Olicom OC-2183/2185", TLAN_ADAPTER_USE_INTERN_10, 0x83 },
246 { "Olicom OC-2325", TLAN_ADAPTER_UNMANAGED_PHY, 0xF8 },
247 { "Olicom OC-2326", TLAN_ADAPTER_USE_INTERN_10, 0xF8 },
248 { "Compaq Netelligent 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
249 { "Compaq Netelligent 10 T/2 PCI UTP/Coax", TLAN_ADAPTER_NONE, 0x83 },
dfc2c0a6
SH		 250 { "Compaq NetFlex-3/E",
251 TLAN_ADAPTER_ACTIVITY_LED | /* EISA card */
252 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
1da177e4
LT		 253 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, /* EISA card */
254};
255
256static struct pci_device_id tlan_pci_tbl[] = {
257 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL10,
258 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
259 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100,
260 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
261 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3I,
262 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
263 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_THUNDER,
264 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
265 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3B,
266 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
267 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100PI,
268 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },
269 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100D,
270 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 },
271 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100I,
272 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 },
273 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2183,
274 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 },
275 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2325,
276 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 },
277 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2326,
278 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 },
279 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_100_WS_5100,
280 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 },
281 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_T2,
282 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 },
283 { 0,}
284};
6aa20a22 285MODULE_DEVICE_TABLE(pci, tlan_pci_tbl);
1da177e4
LT		 286
287static void TLan_EisaProbe( void );
288static void TLan_Eisa_Cleanup( void );
289static int TLan_Init( struct net_device * );
290static int TLan_Open( struct net_device *dev );
291static int TLan_StartTx( struct sk_buff *, struct net_device *);
7d12e780 292static irqreturn_t TLan_HandleInterrupt( int, void *);
1da177e4
LT		 293static int TLan_Close( struct net_device *);
294static struct net_device_stats *TLan_GetStats( struct net_device *);
295static void TLan_SetMulticastList( struct net_device *);
296static int TLan_ioctl( struct net_device *dev, struct ifreq *rq, int cmd);
dfc2c0a6
SH		 297static int TLan_probe1( struct pci_dev *pdev, long ioaddr,
298 int irq, int rev, const struct pci_device_id *ent);
1da177e4 299static void TLan_tx_timeout( struct net_device *dev);
c4028958 300static void TLan_tx_timeout_work(struct work_struct *work);
1da177e4
LT		 301static int tlan_init_one( struct pci_dev *pdev, const struct pci_device_id *ent);
302
1da177e4
LT		 303static u32 TLan_HandleTxEOF( struct net_device *, u16 );
304static u32 TLan_HandleStatOverflow( struct net_device *, u16 );
305static u32 TLan_HandleRxEOF( struct net_device *, u16 );
306static u32 TLan_HandleDummy( struct net_device *, u16 );
307static u32 TLan_HandleTxEOC( struct net_device *, u16 );
308static u32 TLan_HandleStatusCheck( struct net_device *, u16 );
309static u32 TLan_HandleRxEOC( struct net_device *, u16 );
310
311static void TLan_Timer( unsigned long );
312
313static void TLan_ResetLists( struct net_device * );
314static void TLan_FreeLists( struct net_device * );
315static void TLan_PrintDio( u16 );
316static void TLan_PrintList( TLanList *, char *, int );
317static void TLan_ReadAndClearStats( struct net_device *, int );
318static void TLan_ResetAdapter( struct net_device * );
319static void TLan_FinishReset( struct net_device * );
320static void TLan_SetMac( struct net_device *, int areg, char *mac );
321
322static void TLan_PhyPrint( struct net_device * );
323static void TLan_PhyDetect( struct net_device * );
324static void TLan_PhyPowerDown( struct net_device * );
325static void TLan_PhyPowerUp( struct net_device * );
326static void TLan_PhyReset( struct net_device * );
327static void TLan_PhyStartLink( struct net_device * );
328static void TLan_PhyFinishAutoNeg( struct net_device * );
329#ifdef MONITOR
330static void TLan_PhyMonitor( struct net_device * );
331#endif
332
333/*
334static int TLan_PhyNop( struct net_device * );
335static int TLan_PhyInternalCheck( struct net_device * );
336static int TLan_PhyInternalService( struct net_device * );
337static int TLan_PhyDp83840aCheck( struct net_device * );
338*/
339
340static int TLan_MiiReadReg( struct net_device *, u16, u16, u16 * );
341static void TLan_MiiSendData( u16, u32, unsigned );
342static void TLan_MiiSync( u16 );
343static void TLan_MiiWriteReg( struct net_device *, u16, u16, u16 );
344
345static void TLan_EeSendStart( u16 );
346static int TLan_EeSendByte( u16, u8, int );
347static void TLan_EeReceiveByte( u16, u8 *, int );
348static int TLan_EeReadByte( struct net_device *, u8, u8 * );
349
350
93e16847 351static inline void
1da177e4
LT		 352TLan_StoreSKB( struct tlan_list_tag *tag, struct sk_buff *skb)
353{
354 unsigned long addr = (unsigned long)skb;
93e16847
SH		 355 tag->buffer[9].address = addr;
356 tag->buffer[8].address = upper_32_bits(addr);
1da177e4
LT		 357}
358
93e16847
SH		 359static inline struct sk_buff *
360TLan_GetSKB( const struct tlan_list_tag *tag)
1da177e4 361{
93e16847
SH		 362 unsigned long addr;
363
0d63bea2
RF		 364 addr = tag->buffer[9].address;
365 addr |= (tag->buffer[8].address << 16) << 16;
1da177e4
LT		 366 return (struct sk_buff *) addr;
367}
368
369
370static TLanIntVectorFunc *TLanIntVector[TLAN_INT_NUMBER_OF_INTS] = {
a3ccc789 371 NULL,
1da177e4
LT		 372 TLan_HandleTxEOF,
373 TLan_HandleStatOverflow,
374 TLan_HandleRxEOF,
375 TLan_HandleDummy,
376 TLan_HandleTxEOC,
377 TLan_HandleStatusCheck,
378 TLan_HandleRxEOC
379};
380
381static inline void
382TLan_SetTimer( struct net_device *dev, u32 ticks, u32 type )
383{
384 TLanPrivateInfo *priv = netdev_priv(dev);
385 unsigned long flags = 0;
6aa20a22 386
1da177e4
LT		 387 if (!in_irq())
388 spin_lock_irqsave(&priv->lock, flags);
389 if ( priv->timer.function != NULL &&
6aa20a22 390 priv->timerType != TLAN_TIMER_ACTIVITY ) {
1da177e4
LT		 391 if (!in_irq())
392 spin_unlock_irqrestore(&priv->lock, flags);
393 return;
394 }
395 priv->timer.function = &TLan_Timer;
396 if (!in_irq())
397 spin_unlock_irqrestore(&priv->lock, flags);
398
399 priv->timer.data = (unsigned long) dev;
400 priv->timerSetAt = jiffies;
401 priv->timerType = type;
402 mod_timer(&priv->timer, jiffies + ticks);
6aa20a22 403
1da177e4
LT		 404} /* TLan_SetTimer */
405
406
407/*****************************************************************************
408******************************************************************************
409
410 ThunderLAN Driver Primary Functions
411
412 These functions are more or less common to all Linux network drivers.
413
414******************************************************************************
415*****************************************************************************/
416
417
418
419
420
421 /***************************************************************
422 * tlan_remove_one
423 *
424 * Returns:
425 * Nothing
426 * Parms:
427 * None
428 *
429 * Goes through the TLanDevices list and frees the device
430 * structs and memory associated with each device (lists
431 * and buffers). It also ureserves the IO port regions
432 * associated with this device.
433 *
434 **************************************************************/
435
436
437static void __devexit tlan_remove_one( struct pci_dev *pdev)
438{
439 struct net_device *dev = pci_get_drvdata( pdev );
440 TLanPrivateInfo *priv = netdev_priv(dev);
6aa20a22 441
1da177e4
LT		 442 unregister_netdev( dev );
443
444 if ( priv->dmaStorage ) {
dfc2c0a6
SH		 445 pci_free_consistent(priv->pciDev,
446 priv->dmaSize, priv->dmaStorage,
447 priv->dmaStorageDMA );
1da177e4
LT		 448 }
449
450#ifdef CONFIG_PCI
451 pci_release_regions(pdev);
452#endif
6aa20a22 453
1da177e4 454 free_netdev( dev );
6aa20a22 455
1da177e4 456 pci_set_drvdata( pdev, NULL );
6aa20a22 457}
1da177e4
LT		 458
459static struct pci_driver tlan_driver = {
460 .name = "tlan",
461 .id_table = tlan_pci_tbl,
462 .probe = tlan_init_one,
6aa20a22 463 .remove = __devexit_p(tlan_remove_one),
1da177e4
LT		 464};
465
466static int __init tlan_probe(void)
467{
6c04a515 468 int rc = -ENODEV;
6aa20a22 469
1da177e4 470 printk(KERN_INFO "%s", tlan_banner);
6aa20a22 471
1da177e4 472 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting PCI Probe....\n");
6aa20a22 473
1da177e4
LT		 474 /* Use new style PCI probing. Now the kernel will
475 do most of this for us */
6c04a515
LP		 476 rc = pci_register_driver(&tlan_driver);
477
478 if (rc != 0) {
479 printk(KERN_ERR "TLAN: Could not register pci driver.\n");
480 goto err_out_pci_free;
481 }
1da177e4
LT		 482
483 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting EISA Probe....\n");
484 TLan_EisaProbe();
6aa20a22
JG		 485
486 printk(KERN_INFO "TLAN: %d device%s installed, PCI: %d EISA: %d\n",
1da177e4
LT		 487 TLanDevicesInstalled, TLanDevicesInstalled == 1 ? "" : "s",
488 tlan_have_pci, tlan_have_eisa);
489
490 if (TLanDevicesInstalled == 0) {
6c04a515
LP		 491 rc = -ENODEV;
492 goto err_out_pci_unreg;
1da177e4
LT		 493 }
494 return 0;
6c04a515
LP		 495
496err_out_pci_unreg:
497 pci_unregister_driver(&tlan_driver);
498err_out_pci_free:
6c04a515 499 return rc;
1da177e4 500}
6aa20a22 501
1da177e4
LT		 502
503static int __devinit tlan_init_one( struct pci_dev *pdev,
504 const struct pci_device_id *ent)
505{
506 return TLan_probe1( pdev, -1, -1, 0, ent);
507}
508
509
510/*
511 ***************************************************************
512 * tlan_probe1
513 *
514 * Returns:
515 * 0 on success, error code on error
6aa20a22 516 * Parms:
1da177e4
LT		 517 * none
518 *
519 * The name is lower case to fit in with all the rest of
6aa20a22 520 * the netcard_probe names. This function looks for
1da177e4
LT		 521 * another TLan based adapter, setting it up with the
522 * allocated device struct if one is found.
523 * tlan_probe has been ported to the new net API and
524 * now allocates its own device structure. This function
525 * is also used by modules.
526 *
527 **************************************************************/
528
6aa20a22 529static int __devinit TLan_probe1(struct pci_dev *pdev,
dfc2c0a6
SH		 530 long ioaddr, int irq, int rev,
531 const struct pci_device_id *ent )
1da177e4
LT		 532{
533
534 struct net_device *dev;
535 TLanPrivateInfo *priv;
1da177e4
LT		 536 u16 device_id;
537 int reg, rc = -ENODEV;
538
ad9f6713 539#ifdef CONFIG_PCI
1da177e4
LT		 540 if (pdev) {
541 rc = pci_enable_device(pdev);
542 if (rc)
543 return rc;
544
545 rc = pci_request_regions(pdev, TLanSignature);
546 if (rc) {
547 printk(KERN_ERR "TLAN: Could not reserve IO regions\n");
548 goto err_out;
549 }
550 }
ad9f6713 551#endif /* CONFIG_PCI */
1da177e4
LT		 552
553 dev = alloc_etherdev(sizeof(TLanPrivateInfo));
554 if (dev == NULL) {
555 printk(KERN_ERR "TLAN: Could not allocate memory for device.\n");
556 rc = -ENOMEM;
557 goto err_out_regions;
558 }
1da177e4 559 SET_NETDEV_DEV(dev, &pdev->dev);
6aa20a22 560
1da177e4
LT		 561 priv = netdev_priv(dev);
562
563 priv->pciDev = pdev;
c4028958 564 priv->dev = dev;
6aa20a22 565
1da177e4
LT		 566 /* Is this a PCI device? */
567 if (pdev) {
568 u32 pci_io_base = 0;
569
570 priv->adapter = &board_info[ent->driver_data];
571
1e7f0bd8 572 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1da177e4
LT		 573 if (rc) {
574 printk(KERN_ERR "TLAN: No suitable PCI mapping available.\n");
575 goto err_out_free_dev;
576 }
577
1da177e4
LT		 578 for ( reg= 0; reg <= 5; reg ++ ) {
579 if (pci_resource_flags(pdev, reg) & IORESOURCE_IO) {
580 pci_io_base = pci_resource_start(pdev, reg);
581 TLAN_DBG( TLAN_DEBUG_GNRL, "IO mapping is available at %x.\n",
582 pci_io_base);
583 break;
584 }
585 }
586 if (!pci_io_base) {
587 printk(KERN_ERR "TLAN: No IO mappings available\n");
588 rc = -EIO;
589 goto err_out_free_dev;
590 }
6aa20a22 591
1da177e4
LT		 592 dev->base_addr = pci_io_base;
593 dev->irq = pdev->irq;
44c10138 594 priv->adapterRev = pdev->revision;
1da177e4
LT		 595 pci_set_master(pdev);
596 pci_set_drvdata(pdev, dev);
597
598 } else { /* EISA card */
599 /* This is a hack. We need to know which board structure
600 * is suited for this adapter */
601 device_id = inw(ioaddr + EISA_ID2);
602 priv->is_eisa = 1;
603 if (device_id == 0x20F1) {
604 priv->adapter = &board_info[13]; /* NetFlex-3/E */
605 priv->adapterRev = 23; /* TLAN 2.3 */
606 } else {
607 priv->adapter = &board_info[14];
608 priv->adapterRev = 10; /* TLAN 1.0 */
609 }
610 dev->base_addr = ioaddr;
611 dev->irq = irq;
612 }
613
614 /* Kernel parameters */
615 if (dev->mem_start) {
616 priv->aui = dev->mem_start & 0x01;
dfc2c0a6
SH		 617 priv->duplex = ((dev->mem_start & 0x06) == 0x06) ? 0
618 : (dev->mem_start & 0x06) >> 1;
619 priv->speed = ((dev->mem_start & 0x18) == 0x18) ? 0
620 : (dev->mem_start & 0x18) >> 3;
6aa20a22 621
1da177e4
LT		 622 if (priv->speed == 0x1) {
623 priv->speed = TLAN_SPEED_10;
624 } else if (priv->speed == 0x2) {
625 priv->speed = TLAN_SPEED_100;
626 }
627 debug = priv->debug = dev->mem_end;
628 } else {
629 priv->aui = aui[boards_found];
630 priv->speed = speed[boards_found];
631 priv->duplex = duplex[boards_found];
632 priv->debug = debug;
633 }
6aa20a22 634
1da177e4
LT		 635 /* This will be used when we get an adapter error from
636 * within our irq handler */
c4028958 637 INIT_WORK(&priv->tlan_tqueue, TLan_tx_timeout_work);
1da177e4
LT		 638
639 spin_lock_init(&priv->lock);
6aa20a22 640
1da177e4
LT		 641 rc = TLan_Init(dev);
642 if (rc) {
643 printk(KERN_ERR "TLAN: Could not set up device.\n");
644 goto err_out_free_dev;
645 }
646
647 rc = register_netdev(dev);
648 if (rc) {
649 printk(KERN_ERR "TLAN: Could not register device.\n");
650 goto err_out_uninit;
651 }
652
6aa20a22 653
1da177e4
LT		 654 TLanDevicesInstalled++;
655 boards_found++;
6aa20a22 656
1da177e4
LT		 657 /* pdev is NULL if this is an EISA device */
658 if (pdev)
659 tlan_have_pci++;
660 else {
661 priv->nextDevice = TLan_Eisa_Devices;
662 TLan_Eisa_Devices = dev;
663 tlan_have_eisa++;
664 }
6aa20a22 665
1da177e4
LT		 666 printk(KERN_INFO "TLAN: %s irq=%2d, io=%04x, %s, Rev. %d\n",
667 dev->name,
668 (int) dev->irq,
669 (int) dev->base_addr,
670 priv->adapter->deviceLabel,
671 priv->adapterRev);
672 return 0;
673
674err_out_uninit:
675 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage,
676 priv->dmaStorageDMA );
677err_out_free_dev:
678 free_netdev(dev);
679err_out_regions:
680#ifdef CONFIG_PCI
681 if (pdev)
682 pci_release_regions(pdev);
683#endif
684err_out:
685 if (pdev)
686 pci_disable_device(pdev);
687 return rc;
688}
689
690
691static void TLan_Eisa_Cleanup(void)
692{
693 struct net_device *dev;
694 TLanPrivateInfo *priv;
6aa20a22 695
1da177e4
LT		 696 while( tlan_have_eisa ) {
697 dev = TLan_Eisa_Devices;
698 priv = netdev_priv(dev);
699 if (priv->dmaStorage) {
dfc2c0a6
SH		 700 pci_free_consistent(priv->pciDev, priv->dmaSize,
701 priv->dmaStorage, priv->dmaStorageDMA );
1da177e4
LT		 702 }
703 release_region( dev->base_addr, 0x10);
704 unregister_netdev( dev );
705 TLan_Eisa_Devices = priv->nextDevice;
706 free_netdev( dev );
707 tlan_have_eisa--;
708 }
709}
6aa20a22
JG		 710
711
1da177e4
LT		 712static void __exit tlan_exit(void)
713{
714 pci_unregister_driver(&tlan_driver);
715
716 if (tlan_have_eisa)
717 TLan_Eisa_Cleanup();
718
1da177e4
LT		 719}
720
721
722/* Module loading/unloading */
723module_init(tlan_probe);
724module_exit(tlan_exit);
725
726
727
728 /**************************************************************
729 * TLan_EisaProbe
730 *
731 * Returns: 0 on success, 1 otherwise
732 *
733 * Parms: None
734 *
735 *
6aa20a22
JG		 736 * This functions probes for EISA devices and calls
737 * TLan_probe1 when one is found.
1da177e4
LT		 738 *
739 *************************************************************/
740
6aa20a22 741static void __init TLan_EisaProbe (void)
1da177e4
LT		 742{
743 long ioaddr;
744 int rc = -ENODEV;
745 int irq;
746 u16 device_id;
747
6aa20a22 748 if (!EISA_bus) {
1da177e4
LT		 749 TLAN_DBG(TLAN_DEBUG_PROBE, "No EISA bus present\n");
750 return;
751 }
6aa20a22 752
1da177e4
LT		 753 /* Loop through all slots of the EISA bus */
754 for (ioaddr = 0x1000; ioaddr < 0x9000; ioaddr += 0x1000) {
6aa20a22 755
dfc2c0a6
SH		 756 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n",
757 (int) ioaddr + 0xC80, inw(ioaddr + EISA_ID));
758 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n",
759 (int) ioaddr + 0xC82, inw(ioaddr + EISA_ID2));
1da177e4
LT		 760
761
762 TLAN_DBG(TLAN_DEBUG_PROBE, "Probing for EISA adapter at IO: 0x%4x : ",
763 (int) ioaddr);
6aa20a22 764 if (request_region(ioaddr, 0x10, TLanSignature) == NULL)
1da177e4
LT		 765 goto out;
766
6aa20a22 767 if (inw(ioaddr + EISA_ID) != 0x110E) {
1da177e4
LT		 768 release_region(ioaddr, 0x10);
769 goto out;
770 }
6aa20a22 771
1da177e4 772 device_id = inw(ioaddr + EISA_ID2);
6aa20a22 773 if (device_id != 0x20F1 && device_id != 0x40F1) {
1da177e4
LT		 774 release_region (ioaddr, 0x10);
775 goto out;
776 }
6aa20a22 777
1da177e4
LT		 778 if (inb(ioaddr + EISA_CR) != 0x1) { /* Check if adapter is enabled */
779 release_region (ioaddr, 0x10);
780 goto out2;
781 }
6aa20a22
JG		 782
783 if (debug == 0x10)
1da177e4
LT		 784 printk("Found one\n");
785
786
787 /* Get irq from board */
788 switch (inb(ioaddr + 0xCC0)) {
789 case(0x10):
790 irq=5;
791 break;
792 case(0x20):
793 irq=9;
794 break;
795 case(0x40):
796 irq=10;
797 break;
798 case(0x80):
799 irq=11;
800 break;
801 default:
802 goto out;
6aa20a22
JG		 803 }
804
805
1da177e4
LT		 806 /* Setup the newly found eisa adapter */
807 rc = TLan_probe1( NULL, ioaddr, irq,
808 12, NULL);
809 continue;
6aa20a22 810
1da177e4
LT		 811 out:
812 if (debug == 0x10)
813 printk("None found\n");
814 continue;
815
816 out2: if (debug == 0x10)
817 printk("Card found but it is not enabled, skipping\n");
818 continue;
6aa20a22 819
1da177e4
LT		 820 }
821
822} /* TLan_EisaProbe */
823
824#ifdef CONFIG_NET_POLL_CONTROLLER
825static void TLan_Poll(struct net_device *dev)
826{
827 disable_irq(dev->irq);
7d12e780 828 TLan_HandleInterrupt(dev->irq, dev);
1da177e4
LT		 829 enable_irq(dev->irq);
830}
831#endif
832
6aa20a22 833
1da177e4
LT		 834
835
836 /***************************************************************
837 * TLan_Init
838 *
839 * Returns:
840 * 0 on success, error code otherwise.
841 * Parms:
842 * dev The structure of the device to be
843 * init'ed.
844 *
845 * This function completes the initialization of the
846 * device structure and driver. It reserves the IO
847 * addresses, allocates memory for the lists and bounce
848 * buffers, retrieves the MAC address from the eeprom
849 * and assignes the device's methods.
6aa20a22 850 *
1da177e4
LT		 851 **************************************************************/
852
853static int TLan_Init( struct net_device *dev )
854{
855 int dma_size;
856 int err;
857 int i;
858 TLanPrivateInfo *priv;
859
860 priv = netdev_priv(dev);
6aa20a22 861
1da177e4
LT		 862 if ( bbuf ) {
863 dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS )
864 * ( sizeof(TLanList) + TLAN_MAX_FRAME_SIZE );
865 } else {
866 dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS )
867 * ( sizeof(TLanList) );
868 }
93e16847
SH		 869 priv->dmaStorage = pci_alloc_consistent(priv->pciDev,
870 dma_size, &priv->dmaStorageDMA);
1da177e4 871 priv->dmaSize = dma_size;
6aa20a22 872
1da177e4
LT		 873 if ( priv->dmaStorage == NULL ) {
874 printk(KERN_ERR "TLAN: Could not allocate lists and buffers for %s.\n",
875 dev->name );
876 return -ENOMEM;
877 }
878 memset( priv->dmaStorage, 0, dma_size );
93e16847
SH		 879 priv->rxList = (TLanList *) ALIGN((unsigned long)priv->dmaStorage, 8);
880 priv->rxListDMA = ALIGN(priv->dmaStorageDMA, 8);
1da177e4
LT		 881 priv->txList = priv->rxList + TLAN_NUM_RX_LISTS;
882 priv->txListDMA = priv->rxListDMA + sizeof(TLanList) * TLAN_NUM_RX_LISTS;
93e16847 883
1da177e4
LT		 884 if ( bbuf ) {
885 priv->rxBuffer = (u8 *) ( priv->txList + TLAN_NUM_TX_LISTS );
dfc2c0a6
SH		 886 priv->rxBufferDMA =priv->txListDMA
887 + sizeof(TLanList) * TLAN_NUM_TX_LISTS;
888 priv->txBuffer = priv->rxBuffer
889 + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE );
890 priv->txBufferDMA = priv->rxBufferDMA
891 + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE );
1da177e4
LT		 892 }
893
894 err = 0;
895 for ( i = 0; i < 6 ; i++ )
896 err |= TLan_EeReadByte( dev,
897 (u8) priv->adapter->addrOfs + i,
898 (u8 *) &dev->dev_addr[i] );
899 if ( err ) {
900 printk(KERN_ERR "TLAN: %s: Error reading MAC from eeprom: %d\n",
901 dev->name,
902 err );
903 }
904 dev->addr_len = 6;
905
906 netif_carrier_off(dev);
907
908 /* Device methods */
909 dev->open = &TLan_Open;
910 dev->hard_start_xmit = &TLan_StartTx;
911 dev->stop = &TLan_Close;
912 dev->get_stats = &TLan_GetStats;
913 dev->set_multicast_list = &TLan_SetMulticastList;
914 dev->do_ioctl = &TLan_ioctl;
915#ifdef CONFIG_NET_POLL_CONTROLLER
916 dev->poll_controller = &TLan_Poll;
917#endif
918 dev->tx_timeout = &TLan_tx_timeout;
919 dev->watchdog_timeo = TX_TIMEOUT;
920
921 return 0;
922
923} /* TLan_Init */
924
925
926
927
928 /***************************************************************
929 * TLan_Open
930 *
931 * Returns:
932 * 0 on success, error code otherwise.
933 * Parms:
934 * dev Structure of device to be opened.
935 *
936 * This routine puts the driver and TLAN adapter in a
937 * state where it is ready to send and receive packets.
938 * It allocates the IRQ, resets and brings the adapter
939 * out of reset, and allows interrupts. It also delays
940 * the startup for autonegotiation or sends a Rx GO
941 * command to the adapter, as appropriate.
942 *
943 **************************************************************/
944
945static int TLan_Open( struct net_device *dev )
946{
947 TLanPrivateInfo *priv = netdev_priv(dev);
948 int err;
6aa20a22 949
1da177e4 950 priv->tlanRev = TLan_DioRead8( dev->base_addr, TLAN_DEF_REVISION );
a3ccc789
SH		 951 err = request_irq( dev->irq, TLan_HandleInterrupt, IRQF_SHARED,
952 dev->name, dev );
6aa20a22 953
1da177e4 954 if ( err ) {
dfc2c0a6
SH		 955 pr_err("TLAN: Cannot open %s because IRQ %d is already in use.\n",
956 dev->name, dev->irq );
1da177e4
LT		 957 return err;
958 }
6aa20a22 959
1da177e4
LT		 960 init_timer(&priv->timer);
961 netif_start_queue(dev);
6aa20a22 962
1da177e4
LT		 963 /* NOTE: It might not be necessary to read the stats before a
964 reset if you don't care what the values are.
965 */
966 TLan_ResetLists( dev );
967 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
968 TLan_ResetAdapter( dev );
969
dfc2c0a6
SH		 970 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Opened. TLAN Chip Rev: %x\n",
971 dev->name, priv->tlanRev );
1da177e4
LT		 972
973 return 0;
974
975} /* TLan_Open */
976
977
978
979 /**************************************************************
980 * TLan_ioctl
6aa20a22 981 *
1da177e4
LT		 982 * Returns:
983 * 0 on success, error code otherwise
984 * Params:
985 * dev structure of device to receive ioctl.
6aa20a22 986 *
1da177e4
LT		 987 * rq ifreq structure to hold userspace data.
988 *
989 * cmd ioctl command.
990 *
991 *
992 *************************************************************/
993
994static int TLan_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
995{
996 TLanPrivateInfo *priv = netdev_priv(dev);
997 struct mii_ioctl_data *data = if_mii(rq);
998 u32 phy = priv->phy[priv->phyNum];
6aa20a22 999
1da177e4
LT		 1000 if (!priv->phyOnline)
1001 return -EAGAIN;
1002
1003 switch(cmd) {
1004 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
1005 data->phy_id = phy;
1006
1007
1008 case SIOCGMIIREG: /* Read MII PHY register. */
dfc2c0a6
SH		 1009 TLan_MiiReadReg(dev, data->phy_id & 0x1f,
1010 data->reg_num & 0x1f, &data->val_out);
1da177e4 1011 return 0;
6aa20a22 1012
1da177e4
LT		 1013
1014 case SIOCSMIIREG: /* Write MII PHY register. */
1015 if (!capable(CAP_NET_ADMIN))
1016 return -EPERM;
dfc2c0a6
SH		 1017 TLan_MiiWriteReg(dev, data->phy_id & 0x1f,
1018 data->reg_num & 0x1f, data->val_in);
1da177e4
LT		 1019 return 0;
1020 default:
1021 return -EOPNOTSUPP;
1022 }
1023} /* tlan_ioctl */
1024
1025
1026 /***************************************************************
1027 * TLan_tx_timeout
1028 *
1029 * Returns: nothing
1030 *
1031 * Params:
6aa20a22 1032 * dev structure of device which timed out
1da177e4
LT		 1033 * during transmit.
1034 *
1035 **************************************************************/
1036
1037static void TLan_tx_timeout(struct net_device *dev)
1038{
6aa20a22 1039
1da177e4 1040 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Transmit timed out.\n", dev->name);
6aa20a22 1041
1da177e4
LT		 1042 /* Ok so we timed out, lets see what we can do about it...*/
1043 TLan_FreeLists( dev );
6aa20a22 1044 TLan_ResetLists( dev );
1da177e4
LT		 1045 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
1046 TLan_ResetAdapter( dev );
1047 dev->trans_start = jiffies;
6aa20a22 1048 netif_wake_queue( dev );
1da177e4
LT		 1049
1050}
6aa20a22 1051
1da177e4 1052
c4028958
DH		 1053 /***************************************************************
1054 * TLan_tx_timeout_work
1055 *
1056 * Returns: nothing
1057 *
1058 * Params:
1059 * work work item of device which timed out
1060 *
1061 **************************************************************/
1062
1063static void TLan_tx_timeout_work(struct work_struct *work)
1064{
1065 TLanPrivateInfo *priv =
1066 container_of(work, TLanPrivateInfo, tlan_tqueue);
1067
1068 TLan_tx_timeout(priv->dev);
1069}
1070
1071
1da177e4
LT		 1072
1073 /***************************************************************
1074 * TLan_StartTx
6aa20a22 1075 *
1da177e4
LT		 1076 * Returns:
1077 * 0 on success, non-zero on failure.
1078 * Parms:
1079 * skb A pointer to the sk_buff containing the
1080 * frame to be sent.
1081 * dev The device to send the data on.
1082 *
1083 * This function adds a frame to the Tx list to be sent
1084 * ASAP. First it verifies that the adapter is ready and
1085 * there is room in the queue. Then it sets up the next
1086 * available list, copies the frame to the corresponding
1087 * buffer. If the adapter Tx channel is idle, it gives
1088 * the adapter a Tx Go command on the list, otherwise it
1089 * sets the forward address of the previous list to point
1090 * to this one. Then it frees the sk_buff.
1091 *
1092 **************************************************************/
1093
1094static int TLan_StartTx( struct sk_buff *skb, struct net_device *dev )
1095{
1096 TLanPrivateInfo *priv = netdev_priv(dev);
1097 TLanList *tail_list;
1098 dma_addr_t tail_list_phys;
1099 u8 *tail_buffer;
1da177e4
LT		 1100 unsigned long flags;
1101
1102 if ( ! priv->phyOnline ) {
dfc2c0a6
SH		 1103 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s PHY is not ready\n",
1104 dev->name );
1da177e4
LT		 1105 dev_kfree_skb_any(skb);
1106 return 0;
1107 }
1108
41873e9a
SH		 1109 if (skb_padto(skb, TLAN_MIN_FRAME_SIZE))
1110 return 0;
1111
1da177e4
LT		 1112 tail_list = priv->txList + priv->txTail;
1113 tail_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txTail;
6aa20a22 1114
1da177e4 1115 if ( tail_list->cStat != TLAN_CSTAT_UNUSED ) {
dfc2c0a6
SH		 1116 TLAN_DBG( TLAN_DEBUG_TX,
1117 "TRANSMIT: %s is busy (Head=%d Tail=%d)\n",
1118 dev->name, priv->txHead, priv->txTail );
1da177e4
LT		 1119 netif_stop_queue(dev);
1120 priv->txBusyCount++;
1121 return 1;
1122 }
1123
1124 tail_list->forward = 0;
1125
1126 if ( bbuf ) {
1127 tail_buffer = priv->txBuffer + ( priv->txTail * TLAN_MAX_FRAME_SIZE );
d626f62b 1128 skb_copy_from_linear_data(skb, tail_buffer, skb->len);
1da177e4 1129 } else {
dfc2c0a6
SH		 1130 tail_list->buffer[0].address = pci_map_single(priv->pciDev,
1131 skb->data, skb->len,
1132 PCI_DMA_TODEVICE);
1da177e4
LT		 1133 TLan_StoreSKB(tail_list, skb);
1134 }
1135
41873e9a
SH		 1136 tail_list->frameSize = (u16) skb->len;
1137 tail_list->buffer[0].count = TLAN_LAST_BUFFER | (u32) skb->len;
1138 tail_list->buffer[1].count = 0;
1139 tail_list->buffer[1].address = 0;
1da177e4
LT		 1140
1141 spin_lock_irqsave(&priv->lock, flags);
1142 tail_list->cStat = TLAN_CSTAT_READY;
1143 if ( ! priv->txInProgress ) {
1144 priv->txInProgress = 1;
dfc2c0a6
SH		 1145 TLAN_DBG( TLAN_DEBUG_TX,
1146 "TRANSMIT: Starting TX on buffer %d\n", priv->txTail );
1da177e4
LT		 1147 outl( tail_list_phys, dev->base_addr + TLAN_CH_PARM );
1148 outl( TLAN_HC_GO, dev->base_addr + TLAN_HOST_CMD );
1149 } else {
dfc2c0a6
SH		 1150 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Adding buffer %d to TX channel\n",
1151 priv->txTail );
1da177e4 1152 if ( priv->txTail == 0 ) {
dfc2c0a6
SH		 1153 ( priv->txList + ( TLAN_NUM_TX_LISTS - 1 ) )->forward
1154 = tail_list_phys;
1da177e4 1155 } else {
dfc2c0a6
SH		 1156 ( priv->txList + ( priv->txTail - 1 ) )->forward
1157 = tail_list_phys;
1da177e4
LT		 1158 }
1159 }
1160 spin_unlock_irqrestore(&priv->lock, flags);
1161
1162 CIRC_INC( priv->txTail, TLAN_NUM_TX_LISTS );
1163
1164 if ( bbuf )
1165 dev_kfree_skb_any(skb);
6aa20a22 1166
1da177e4
LT		 1167 dev->trans_start = jiffies;
1168 return 0;
1169
1170} /* TLan_StartTx */
1171
1172
1173
1174
1175 /***************************************************************
1176 * TLan_HandleInterrupt
6aa20a22
JG		 1177 *
1178 * Returns:
1da177e4
LT		 1179 * Nothing
1180 * Parms:
1181 * irq The line on which the interrupt
1182 * occurred.
1183 * dev_id A pointer to the device assigned to
1184 * this irq line.
1da177e4
LT		 1185 *
1186 * This function handles an interrupt generated by its
1187 * assigned TLAN adapter. The function deactivates
1188 * interrupts on its adapter, records the type of
1189 * interrupt, executes the appropriate subhandler, and
1190 * acknowdges the interrupt to the adapter (thus
1191 * re-enabling adapter interrupts.
1192 *
1193 **************************************************************/
1194
7d12e780 1195static irqreturn_t TLan_HandleInterrupt(int irq, void *dev_id)
1da177e4 1196{
a3ccc789
SH		 1197 struct net_device *dev = dev_id;
1198 TLanPrivateInfo *priv = netdev_priv(dev);
1da177e4 1199 u16 host_int;
a3ccc789 1200 u16 type;
1da177e4
LT		 1201
1202 spin_lock(&priv->lock);
1203
1204 host_int = inw( dev->base_addr + TLAN_HOST_INT );
1da177e4 1205 type = ( host_int & TLAN_HI_IT_MASK ) >> 2;
a3ccc789
SH		 1206 if ( type ) {
1207 u32 ack;
1208 u32 host_cmd;
1da177e4 1209
a3ccc789
SH		 1210 outw( host_int, dev->base_addr + TLAN_HOST_INT );
1211 ack = TLanIntVector[type]( dev, host_int );
1da177e4 1212
a3ccc789
SH		 1213 if ( ack ) {
1214 host_cmd = TLAN_HC_ACK | ack | ( type << 18 );
1215 outl( host_cmd, dev->base_addr + TLAN_HOST_CMD );
1216 }
1da177e4
LT		 1217 }
1218
1219 spin_unlock(&priv->lock);
1220
a3ccc789 1221 return IRQ_RETVAL(type);
1da177e4
LT		 1222} /* TLan_HandleInterrupts */
1223
1224
1225
1226
1227 /***************************************************************
1228 * TLan_Close
6aa20a22 1229 *
1da177e4
LT		 1230 * Returns:
1231 * An error code.
1232 * Parms:
1233 * dev The device structure of the device to
1234 * close.
1235 *
1236 * This function shuts down the adapter. It records any
1237 * stats, puts the adapter into reset state, deactivates
1238 * its time as needed, and frees the irq it is using.
1239 *
1240 **************************************************************/
1241
1242static int TLan_Close(struct net_device *dev)
1243{
1244 TLanPrivateInfo *priv = netdev_priv(dev);
1245
1246 netif_stop_queue(dev);
1247 priv->neg_be_verbose = 0;
1248
1249 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1250 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
1251 if ( priv->timer.function != NULL ) {
1252 del_timer_sync( &priv->timer );
1253 priv->timer.function = NULL;
1254 }
6aa20a22 1255
1da177e4
LT		 1256 free_irq( dev->irq, dev );
1257 TLan_FreeLists( dev );
1258 TLAN_DBG( TLAN_DEBUG_GNRL, "Device %s closed.\n", dev->name );
1259
1260 return 0;
1261
1262} /* TLan_Close */
1263
1264
1265
1266
1267 /***************************************************************
1268 * TLan_GetStats
6aa20a22 1269 *
1da177e4
LT		 1270 * Returns:
1271 * A pointer to the device's statistics structure.
1272 * Parms:
1273 * dev The device structure to return the
1274 * stats for.
1275 *
1276 * This function updates the devices statistics by reading
1277 * the TLAN chip's onboard registers. Then it returns the
1278 * address of the statistics structure.
1279 *
1280 **************************************************************/
1281
1282static struct net_device_stats *TLan_GetStats( struct net_device *dev )
1283{
1284 TLanPrivateInfo *priv = netdev_priv(dev);
1285 int i;
1286
1287 /* Should only read stats if open ? */
1288 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1289
dfc2c0a6
SH		 1290 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: %s EOC count = %d\n", dev->name,
1291 priv->rxEocCount );
1292 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s Busy count = %d\n", dev->name,
1293 priv->txBusyCount );
1da177e4
LT		 1294 if ( debug & TLAN_DEBUG_GNRL ) {
1295 TLan_PrintDio( dev->base_addr );
6aa20a22 1296 TLan_PhyPrint( dev );
1da177e4
LT		 1297 }
1298 if ( debug & TLAN_DEBUG_LIST ) {
1299 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ )
1300 TLan_PrintList( priv->rxList + i, "RX", i );
1301 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ )
1302 TLan_PrintList( priv->txList + i, "TX", i );
1303 }
6aa20a22 1304
f8f31544 1305 return &dev->stats;
1da177e4
LT		 1306
1307} /* TLan_GetStats */
1308
1309
1310
1311
1312 /***************************************************************
1313 * TLan_SetMulticastList
6aa20a22 1314 *
1da177e4
LT		 1315 * Returns:
1316 * Nothing
1317 * Parms:
1318 * dev The device structure to set the
1319 * multicast list for.
1320 *
1321 * This function sets the TLAN adaptor to various receive
1322 * modes. If the IFF_PROMISC flag is set, promiscuous
1323 * mode is acitviated. Otherwise, promiscuous mode is
1324 * turned off. If the IFF_ALLMULTI flag is set, then
1325 * the hash table is set to receive all group addresses.
1326 * Otherwise, the first three multicast addresses are
1327 * stored in AREG_1-3, and the rest are selected via the
1328 * hash table, as necessary.
1329 *
1330 **************************************************************/
1331
1332static void TLan_SetMulticastList( struct net_device *dev )
6aa20a22 1333{
1da177e4
LT		 1334 struct dev_mc_list *dmi = dev->mc_list;
1335 u32 hash1 = 0;
1336 u32 hash2 = 0;
1337 int i;
1338 u32 offset;
1339 u8 tmp;
1340
1341 if ( dev->flags & IFF_PROMISC ) {
1342 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
dfc2c0a6
SH		 1343 TLan_DioWrite8( dev->base_addr,
1344 TLAN_NET_CMD, tmp | TLAN_NET_CMD_CAF );
1da177e4
LT		 1345 } else {
1346 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
dfc2c0a6
SH		 1347 TLan_DioWrite8( dev->base_addr,
1348 TLAN_NET_CMD, tmp & ~TLAN_NET_CMD_CAF );
1da177e4 1349 if ( dev->flags & IFF_ALLMULTI ) {
6aa20a22 1350 for ( i = 0; i < 3; i++ )
1da177e4
LT		 1351 TLan_SetMac( dev, i + 1, NULL );
1352 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, 0xFFFFFFFF );
1353 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, 0xFFFFFFFF );
1354 } else {
1355 for ( i = 0; i < dev->mc_count; i++ ) {
1356 if ( i < 3 ) {
dfc2c0a6
SH		 1357 TLan_SetMac( dev, i + 1,
1358 (char *) &dmi->dmi_addr );
1da177e4
LT		 1359 } else {
1360 offset = TLan_HashFunc( (u8 *) &dmi->dmi_addr );
6aa20a22 1361 if ( offset < 32 )
1da177e4
LT		 1362 hash1 |= ( 1 << offset );
1363 else
1364 hash2 |= ( 1 << ( offset - 32 ) );
1365 }
1366 dmi = dmi->next;
1367 }
6aa20a22 1368 for ( ; i < 3; i++ )
1da177e4
LT		 1369 TLan_SetMac( dev, i + 1, NULL );
1370 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, hash1 );
1371 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, hash2 );
1372 }
1373 }
1374
1375} /* TLan_SetMulticastList */
1376
1377
1378
1379/*****************************************************************************
1380******************************************************************************
1381
1382 ThunderLAN Driver Interrupt Vectors and Table
1383
1384 Please see Chap. 4, "Interrupt Handling" of the "ThunderLAN
1385 Programmer's Guide" for more informations on handling interrupts
6aa20a22 1386 generated by TLAN based adapters.
1da177e4
LT		 1387
1388******************************************************************************
1389*****************************************************************************/
1390
1391
1da177e4
LT		 1392
1393
1394 /***************************************************************
1395 * TLan_HandleTxEOF
1396 *
1397 * Returns:
1398 * 1
1399 * Parms:
1400 * dev Device assigned the IRQ that was
1401 * raised.
1402 * host_int The contents of the HOST_INT
1403 * port.
1404 *
1405 * This function handles Tx EOF interrupts which are raised
1406 * by the adapter when it has completed sending the
1407 * contents of a buffer. If detemines which list/buffer
1408 * was completed and resets it. If the buffer was the last
1409 * in the channel (EOC), then the function checks to see if
1410 * another buffer is ready to send, and if so, sends a Tx
1411 * Go command. Finally, the driver activates/continues the
1412 * activity LED.
1413 *
1414 **************************************************************/
1415
98e0f521 1416static u32 TLan_HandleTxEOF( struct net_device *dev, u16 host_int )
1da177e4
LT		 1417{
1418 TLanPrivateInfo *priv = netdev_priv(dev);
1419 int eoc = 0;
1420 TLanList *head_list;
1421 dma_addr_t head_list_phys;
1422 u32 ack = 0;
1423 u16 tmpCStat;
6aa20a22 1424
dfc2c0a6
SH		 1425 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOF (Head=%d Tail=%d)\n",
1426 priv->txHead, priv->txTail );
1da177e4
LT		 1427 head_list = priv->txList + priv->txHead;
1428
1429 while (((tmpCStat = head_list->cStat ) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) {
1430 ack++;
1431 if ( ! bbuf ) {
1432 struct sk_buff *skb = TLan_GetSKB(head_list);
dfc2c0a6
SH		 1433 pci_unmap_single(priv->pciDev, head_list->buffer[0].address,
1434 skb->len, PCI_DMA_TODEVICE);
1da177e4
LT		 1435 dev_kfree_skb_any(skb);
1436 head_list->buffer[8].address = 0;
1437 head_list->buffer[9].address = 0;
1438 }
6aa20a22 1439
1da177e4
LT		 1440 if ( tmpCStat & TLAN_CSTAT_EOC )
1441 eoc = 1;
6aa20a22 1442
f8f31544 1443 dev->stats.tx_bytes += head_list->frameSize;
1da177e4
LT		 1444
1445 head_list->cStat = TLAN_CSTAT_UNUSED;
6aa20a22
JG		 1446 netif_start_queue(dev);
1447 CIRC_INC( priv->txHead, TLAN_NUM_TX_LISTS );
1da177e4
LT		 1448 head_list = priv->txList + priv->txHead;
1449 }
1450
1451 if (!ack)
1452 printk(KERN_INFO "TLAN: Received interrupt for uncompleted TX frame.\n");
6aa20a22 1453
1da177e4 1454 if ( eoc ) {
dfc2c0a6
SH		 1455 TLAN_DBG( TLAN_DEBUG_TX,
1456 "TRANSMIT: Handling TX EOC (Head=%d Tail=%d)\n",
1457 priv->txHead, priv->txTail );
1da177e4
LT		 1458 head_list = priv->txList + priv->txHead;
1459 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1460 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1461 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM );
1462 ack |= TLAN_HC_GO;
1463 } else {
1464 priv->txInProgress = 0;
1465 }
1466 }
6aa20a22 1467
1da177e4 1468 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
dfc2c0a6
SH		 1469 TLan_DioWrite8( dev->base_addr,
1470 TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1da177e4
LT		 1471 if ( priv->timer.function == NULL ) {
1472 priv->timer.function = &TLan_Timer;
1473 priv->timer.data = (unsigned long) dev;
1474 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1475 priv->timerSetAt = jiffies;
1476 priv->timerType = TLAN_TIMER_ACTIVITY;
1477 add_timer(&priv->timer);
1478 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1479 priv->timerSetAt = jiffies;
1480 }
1481 }
1482
1483 return ack;
1484
1485} /* TLan_HandleTxEOF */
1486
1487
1488
1489
1490 /***************************************************************
1491 * TLan_HandleStatOverflow
1492 *
1493 * Returns:
1494 * 1
1495 * Parms:
1496 * dev Device assigned the IRQ that was
1497 * raised.
1498 * host_int The contents of the HOST_INT
1499 * port.
1500 *
1501 * This function handles the Statistics Overflow interrupt
1502 * which means that one or more of the TLAN statistics
1503 * registers has reached 1/2 capacity and needs to be read.
1504 *
1505 **************************************************************/
1506
98e0f521 1507static u32 TLan_HandleStatOverflow( struct net_device *dev, u16 host_int )
1da177e4
LT		 1508{
1509 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1510
1511 return 1;
1512
1513} /* TLan_HandleStatOverflow */
1514
1515
1516
1517
1518 /***************************************************************
1519 * TLan_HandleRxEOF
1520 *
1521 * Returns:
1522 * 1
1523 * Parms:
1524 * dev Device assigned the IRQ that was
1525 * raised.
1526 * host_int The contents of the HOST_INT
1527 * port.
1528 *
1529 * This function handles the Rx EOF interrupt which
1530 * indicates a frame has been received by the adapter from
1531 * the net and the frame has been transferred to memory.
1532 * The function determines the bounce buffer the frame has
1533 * been loaded into, creates a new sk_buff big enough to
1534 * hold the frame, and sends it to protocol stack. It
1535 * then resets the used buffer and appends it to the end
1536 * of the list. If the frame was the last in the Rx
1537 * channel (EOC), the function restarts the receive channel
1538 * by sending an Rx Go command to the adapter. Then it
1539 * activates/continues the activity LED.
1540 *
1541 **************************************************************/
1542
98e0f521 1543static u32 TLan_HandleRxEOF( struct net_device *dev, u16 host_int )
1da177e4
LT		 1544{
1545 TLanPrivateInfo *priv = netdev_priv(dev);
1546 u32 ack = 0;
1547 int eoc = 0;
1548 u8 *head_buffer;
1549 TLanList *head_list;
1550 struct sk_buff *skb;
1551 TLanList *tail_list;
1da177e4
LT		 1552 u16 tmpCStat;
1553 dma_addr_t head_list_phys;
1554
dfc2c0a6
SH		 1555 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOF (Head=%d Tail=%d)\n",
1556 priv->rxHead, priv->rxTail );
1da177e4
LT		 1557 head_list = priv->rxList + priv->rxHead;
1558 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
6aa20a22 1559
1da177e4 1560 while (((tmpCStat = head_list->cStat) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) {
9ded65a1
SH		 1561 dma_addr_t frameDma = head_list->buffer[0].address;
1562 u32 frameSize = head_list->frameSize;
1da177e4
LT		 1563 ack++;
1564 if (tmpCStat & TLAN_CSTAT_EOC)
1565 eoc = 1;
6aa20a22 1566
1da177e4 1567 if (bbuf) {
9ded65a1 1568 skb = netdev_alloc_skb(dev, frameSize + 7);
dfc2c0a6
SH		 1569 if ( !skb )
1570 goto drop_and_reuse;
1571
1572 head_buffer = priv->rxBuffer
1573 + (priv->rxHead * TLAN_MAX_FRAME_SIZE);
1574 skb_reserve(skb, 2);
1575 pci_dma_sync_single_for_cpu(priv->pciDev,
1576 frameDma, frameSize,
1577 PCI_DMA_FROMDEVICE);
1578 skb_copy_from_linear_data(skb, head_buffer, frameSize);
1579 skb_put(skb, frameSize);
1580 dev->stats.rx_bytes += frameSize;
1581
1582 skb->protocol = eth_type_trans( skb, dev );
1583 netif_rx( skb );
1da177e4
LT		 1584 } else {
1585 struct sk_buff *new_skb;
6aa20a22 1586
9ded65a1 1587 new_skb = netdev_alloc_skb(dev, TLAN_MAX_FRAME_SIZE + 7 );
dfc2c0a6
SH		 1588 if ( !new_skb )
1589 goto drop_and_reuse;
1da177e4 1590
dfc2c0a6
SH		 1591 skb = TLan_GetSKB(head_list);
1592 pci_unmap_single(priv->pciDev, frameDma,
1593 TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1594 skb_put( skb, frameSize );
1da177e4 1595
dfc2c0a6 1596 dev->stats.rx_bytes += frameSize;
6aa20a22 1597
dfc2c0a6
SH		 1598 skb->protocol = eth_type_trans( skb, dev );
1599 netif_rx( skb );
93e16847 1600
dfc2c0a6
SH		 1601 skb_reserve( new_skb, NET_IP_ALIGN );
1602 head_list->buffer[0].address = pci_map_single(priv->pciDev,
1603 new_skb->data,
1604 TLAN_MAX_FRAME_SIZE,
1605 PCI_DMA_FROMDEVICE);
9ded65a1 1606
dfc2c0a6 1607 TLan_StoreSKB(head_list, new_skb);
1da177e4 1608
dfc2c0a6
SH		 1609 }
1610drop_and_reuse:
1da177e4
LT		 1611 head_list->forward = 0;
1612 head_list->cStat = 0;
1613 tail_list = priv->rxList + priv->rxTail;
1614 tail_list->forward = head_list_phys;
1615
1616 CIRC_INC( priv->rxHead, TLAN_NUM_RX_LISTS );
1617 CIRC_INC( priv->rxTail, TLAN_NUM_RX_LISTS );
1618 head_list = priv->rxList + priv->rxHead;
1619 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1620 }
1621
1622 if (!ack)
1623 printk(KERN_INFO "TLAN: Received interrupt for uncompleted RX frame.\n");
1da177e4
LT		 1624
1625
6aa20a22 1626 if ( eoc ) {
dfc2c0a6
SH		 1627 TLAN_DBG( TLAN_DEBUG_RX,
1628 "RECEIVE: Handling RX EOC (Head=%d Tail=%d)\n",
1629 priv->rxHead, priv->rxTail );
1da177e4
LT		 1630 head_list = priv->rxList + priv->rxHead;
1631 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1632 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM );
1633 ack |= TLAN_HC_GO | TLAN_HC_RT;
1634 priv->rxEocCount++;
1635 }
1636
1637 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
dfc2c0a6
SH		 1638 TLan_DioWrite8( dev->base_addr,
1639 TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1da177e4
LT		 1640 if ( priv->timer.function == NULL ) {
1641 priv->timer.function = &TLan_Timer;
1642 priv->timer.data = (unsigned long) dev;
1643 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1644 priv->timerSetAt = jiffies;
1645 priv->timerType = TLAN_TIMER_ACTIVITY;
1646 add_timer(&priv->timer);
1647 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1648 priv->timerSetAt = jiffies;
1649 }
1650 }
1651
1da177e4
LT		 1652 return ack;
1653
1654} /* TLan_HandleRxEOF */
1655
1656
1657
1658
1659 /***************************************************************
1660 * TLan_HandleDummy
1661 *
1662 * Returns:
1663 * 1
1664 * Parms:
1665 * dev Device assigned the IRQ that was
1666 * raised.
1667 * host_int The contents of the HOST_INT
1668 * port.
1669 *
1670 * This function handles the Dummy interrupt, which is
1671 * raised whenever a test interrupt is generated by setting
1672 * the Req_Int bit of HOST_CMD to 1.
1673 *
1674 **************************************************************/
1675
98e0f521 1676static u32 TLan_HandleDummy( struct net_device *dev, u16 host_int )
1da177e4
LT		 1677{
1678 printk( "TLAN: Test interrupt on %s.\n", dev->name );
1679 return 1;
1680
1681} /* TLan_HandleDummy */
1682
1683
1684
1685
1686 /***************************************************************
1687 * TLan_HandleTxEOC
1688 *
1689 * Returns:
1690 * 1
1691 * Parms:
1692 * dev Device assigned the IRQ that was
1693 * raised.
1694 * host_int The contents of the HOST_INT
1695 * port.
1696 *
1697 * This driver is structured to determine EOC occurrences by
1698 * reading the CSTAT member of the list structure. Tx EOC
1699 * interrupts are disabled via the DIO INTDIS register.
1700 * However, TLAN chips before revision 3.0 didn't have this
1701 * functionality, so process EOC events if this is the
1702 * case.
1703 *
1704 **************************************************************/
1705
98e0f521 1706static u32 TLan_HandleTxEOC( struct net_device *dev, u16 host_int )
1da177e4
LT		 1707{
1708 TLanPrivateInfo *priv = netdev_priv(dev);
1709 TLanList *head_list;
1710 dma_addr_t head_list_phys;
1711 u32 ack = 1;
6aa20a22 1712
1da177e4
LT		 1713 host_int = 0;
1714 if ( priv->tlanRev < 0x30 ) {
dfc2c0a6
SH		 1715 TLAN_DBG( TLAN_DEBUG_TX,
1716 "TRANSMIT: Handling TX EOC (Head=%d Tail=%d) -- IRQ\n",
1717 priv->txHead, priv->txTail );
1da177e4
LT		 1718 head_list = priv->txList + priv->txHead;
1719 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1720 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1721 netif_stop_queue(dev);
1722 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM );
1723 ack |= TLAN_HC_GO;
1724 } else {
1725 priv->txInProgress = 0;
1726 }
1727 }
1728
1729 return ack;
1730
1731} /* TLan_HandleTxEOC */
1732
1733
1734
1735
1736 /***************************************************************
1737 * TLan_HandleStatusCheck
1738 *
1739 * Returns:
1740 * 0 if Adapter check, 1 if Network Status check.
1741 * Parms:
1742 * dev Device assigned the IRQ that was
1743 * raised.
1744 * host_int The contents of the HOST_INT
1745 * port.
1746 *
1747 * This function handles Adapter Check/Network Status
1748 * interrupts generated by the adapter. It checks the
1749 * vector in the HOST_INT register to determine if it is
1750 * an Adapter Check interrupt. If so, it resets the
1751 * adapter. Otherwise it clears the status registers
1752 * and services the PHY.
1753 *
1754 **************************************************************/
1755
98e0f521 1756static u32 TLan_HandleStatusCheck( struct net_device *dev, u16 host_int )
6aa20a22 1757{
1da177e4
LT		 1758 TLanPrivateInfo *priv = netdev_priv(dev);
1759 u32 ack;
1760 u32 error;
1761 u8 net_sts;
1762 u32 phy;
1763 u16 tlphy_ctl;
1764 u16 tlphy_sts;
6aa20a22 1765
1da177e4
LT		 1766 ack = 1;
1767 if ( host_int & TLAN_HI_IV_MASK ) {
1768 netif_stop_queue( dev );
1769 error = inl( dev->base_addr + TLAN_CH_PARM );
1770 printk( "TLAN: %s: Adaptor Error = 0x%x\n", dev->name, error );
1771 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1772 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
1773
1774 schedule_work(&priv->tlan_tqueue);
1775
1776 netif_wake_queue(dev);
1777 ack = 0;
1778 } else {
1779 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Status Check\n", dev->name );
1780 phy = priv->phy[priv->phyNum];
1781
1782 net_sts = TLan_DioRead8( dev->base_addr, TLAN_NET_STS );
1783 if ( net_sts ) {
1784 TLan_DioWrite8( dev->base_addr, TLAN_NET_STS, net_sts );
dfc2c0a6
SH		 1785 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Net_Sts = %x\n",
1786 dev->name, (unsigned) net_sts );
1da177e4
LT		 1787 }
1788 if ( ( net_sts & TLAN_NET_STS_MIRQ ) && ( priv->phyNum == 0 ) ) {
1789 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_STS, &tlphy_sts );
1790 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
dfc2c0a6
SH		 1791 if ( ! ( tlphy_sts & TLAN_TS_POLOK ) &&
1792 ! ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1da177e4
LT		 1793 tlphy_ctl |= TLAN_TC_SWAPOL;
1794 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
dfc2c0a6
SH		 1795 } else if ( ( tlphy_sts & TLAN_TS_POLOK )
1796 && ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1da177e4
LT		 1797 tlphy_ctl &= ~TLAN_TC_SWAPOL;
1798 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1799 }
1800
1801 if (debug) {
6aa20a22 1802 TLan_PhyPrint( dev );
1da177e4
LT		 1803 }
1804 }
1805 }
1806
1807 return ack;
1808
1809} /* TLan_HandleStatusCheck */
1810
1811
1812
1813
1814 /***************************************************************
1815 * TLan_HandleRxEOC
1816 *
1817 * Returns:
1818 * 1
1819 * Parms:
1820 * dev Device assigned the IRQ that was
1821 * raised.
1822 * host_int The contents of the HOST_INT
1823 * port.
1824 *
1825 * This driver is structured to determine EOC occurrences by
1826 * reading the CSTAT member of the list structure. Rx EOC
1827 * interrupts are disabled via the DIO INTDIS register.
1828 * However, TLAN chips before revision 3.0 didn't have this
1829 * CSTAT member or a INTDIS register, so if this chip is
1830 * pre-3.0, process EOC interrupts normally.
1831 *
1832 **************************************************************/
1833
98e0f521 1834static u32 TLan_HandleRxEOC( struct net_device *dev, u16 host_int )
1da177e4
LT		 1835{
1836 TLanPrivateInfo *priv = netdev_priv(dev);
1837 dma_addr_t head_list_phys;
1838 u32 ack = 1;
1839
1840 if ( priv->tlanRev < 0x30 ) {
dfc2c0a6
SH		 1841 TLAN_DBG( TLAN_DEBUG_RX,
1842 "RECEIVE: Handling RX EOC (Head=%d Tail=%d) -- IRQ\n",
1843 priv->rxHead, priv->rxTail );
1da177e4
LT		 1844 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1845 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM );
1846 ack |= TLAN_HC_GO | TLAN_HC_RT;
1847 priv->rxEocCount++;
1848 }
1849
1850 return ack;
1851
1852} /* TLan_HandleRxEOC */
1853
1854
1855
1856
1857/*****************************************************************************
1858******************************************************************************
1859
1860 ThunderLAN Driver Timer Function
1861
1862******************************************************************************
1863*****************************************************************************/
1864
1865
1866 /***************************************************************
1867 * TLan_Timer
1868 *
1869 * Returns:
1870 * Nothing
1871 * Parms:
1872 * data A value given to add timer when
1873 * add_timer was called.
1874 *
1875 * This function handles timed functionality for the
1876 * TLAN driver. The two current timer uses are for
1877 * delaying for autonegotionation and driving the ACT LED.
1878 * - Autonegotiation requires being allowed about
1879 * 2 1/2 seconds before attempting to transmit a
1880 * packet. It would be a very bad thing to hang
1881 * the kernel this long, so the driver doesn't
1882 * allow transmission 'til after this time, for
1883 * certain PHYs. It would be much nicer if all
1884 * PHYs were interrupt-capable like the internal
1885 * PHY.
1886 * - The ACT LED, which shows adapter activity, is
1887 * driven by the driver, and so must be left on
1888 * for a short period to power up the LED so it
1889 * can be seen. This delay can be changed by
1890 * changing the TLAN_TIMER_ACT_DELAY in tlan.h,
1891 * if desired. 100 ms produces a slightly
1892 * sluggish response.
1893 *
1894 **************************************************************/
1895
98e0f521 1896static void TLan_Timer( unsigned long data )
1da177e4
LT		 1897{
1898 struct net_device *dev = (struct net_device *) data;
1899 TLanPrivateInfo *priv = netdev_priv(dev);
1900 u32 elapsed;
1901 unsigned long flags = 0;
1902
1903 priv->timer.function = NULL;
1904
1905 switch ( priv->timerType ) {
6aa20a22 1906#ifdef MONITOR
1da177e4
LT		 1907 case TLAN_TIMER_LINK_BEAT:
1908 TLan_PhyMonitor( dev );
1909 break;
1910#endif
1911 case TLAN_TIMER_PHY_PDOWN:
1912 TLan_PhyPowerDown( dev );
1913 break;
1914 case TLAN_TIMER_PHY_PUP:
1915 TLan_PhyPowerUp( dev );
1916 break;
1917 case TLAN_TIMER_PHY_RESET:
1918 TLan_PhyReset( dev );
1919 break;
1920 case TLAN_TIMER_PHY_START_LINK:
1921 TLan_PhyStartLink( dev );
1922 break;
1923 case TLAN_TIMER_PHY_FINISH_AN:
1924 TLan_PhyFinishAutoNeg( dev );
1925 break;
1926 case TLAN_TIMER_FINISH_RESET:
1927 TLan_FinishReset( dev );
1928 break;
1929 case TLAN_TIMER_ACTIVITY:
1930 spin_lock_irqsave(&priv->lock, flags);
1931 if ( priv->timer.function == NULL ) {
1932 elapsed = jiffies - priv->timerSetAt;
1933 if ( elapsed >= TLAN_TIMER_ACT_DELAY ) {
dfc2c0a6
SH		 1934 TLan_DioWrite8( dev->base_addr,
1935 TLAN_LED_REG, TLAN_LED_LINK );
1da177e4
LT		 1936 } else {
1937 priv->timer.function = &TLan_Timer;
dfc2c0a6
SH		 1938 priv->timer.expires = priv->timerSetAt
1939 + TLAN_TIMER_ACT_DELAY;
1da177e4
LT		 1940 spin_unlock_irqrestore(&priv->lock, flags);
1941 add_timer( &priv->timer );
1942 break;
1943 }
1944 }
1945 spin_unlock_irqrestore(&priv->lock, flags);
1946 break;
1947 default:
1948 break;
1949 }
1950
1951} /* TLan_Timer */
1952
1953
1954
1955
1956/*****************************************************************************
1957******************************************************************************
1958
1959 ThunderLAN Driver Adapter Related Routines
1960
1961******************************************************************************
1962*****************************************************************************/
1963
1964
1965 /***************************************************************
1966 * TLan_ResetLists
6aa20a22 1967 *
1da177e4
LT		 1968 * Returns:
1969 * Nothing
1970 * Parms:
1971 * dev The device structure with the list
1972 * stuctures to be reset.
1973 *
1974 * This routine sets the variables associated with managing
1975 * the TLAN lists to their initial values.
1976 *
1977 **************************************************************/
1978
98e0f521 1979static void TLan_ResetLists( struct net_device *dev )
1da177e4
LT		 1980{
1981 TLanPrivateInfo *priv = netdev_priv(dev);
1982 int i;
1983 TLanList *list;
1984 dma_addr_t list_phys;
1985 struct sk_buff *skb;
1da177e4
LT		 1986
1987 priv->txHead = 0;
1988 priv->txTail = 0;
1989 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
1990 list = priv->txList + i;
1991 list->cStat = TLAN_CSTAT_UNUSED;
1992 if ( bbuf ) {
dfc2c0a6
SH		 1993 list->buffer[0].address = priv->txBufferDMA
1994 + ( i * TLAN_MAX_FRAME_SIZE );
1da177e4
LT		 1995 } else {
1996 list->buffer[0].address = 0;
1997 }
1998 list->buffer[2].count = 0;
1999 list->buffer[2].address = 0;
2000 list->buffer[8].address = 0;
2001 list->buffer[9].address = 0;
2002 }
2003
2004 priv->rxHead = 0;
2005 priv->rxTail = TLAN_NUM_RX_LISTS - 1;
2006 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
2007 list = priv->rxList + i;
2008 list_phys = priv->rxListDMA + sizeof(TLanList) * i;
2009 list->cStat = TLAN_CSTAT_READY;
2010 list->frameSize = TLAN_MAX_FRAME_SIZE;
2011 list->buffer[0].count = TLAN_MAX_FRAME_SIZE | TLAN_LAST_BUFFER;
2012 if ( bbuf ) {
dfc2c0a6
SH		 2013 list->buffer[0].address = priv->rxBufferDMA
2014 + ( i * TLAN_MAX_FRAME_SIZE );
1da177e4 2015 } else {
9ded65a1
SH		 2016 skb = netdev_alloc_skb(dev, TLAN_MAX_FRAME_SIZE + 7 );
2017 if ( !skb ) {
dfc2c0a6 2018 pr_err("TLAN: out of memory for received data.\n" );
9ded65a1 2019 break;
1da177e4 2020 }
9ded65a1
SH		 2021
2022 skb_reserve( skb, NET_IP_ALIGN );
0d63bea2
RF		 2023 list->buffer[0].address = pci_map_single(priv->pciDev,
2024 skb->data,
dfc2c0a6
SH		 2025 TLAN_MAX_FRAME_SIZE,
2026 PCI_DMA_FROMDEVICE);
1da177e4
LT		 2027 TLan_StoreSKB(list, skb);
2028 }
2029 list->buffer[1].count = 0;
2030 list->buffer[1].address = 0;
9ded65a1
SH		 2031 list->forward = list_phys + sizeof(TLanList);
2032 }
2033
2034 /* in case ran out of memory early, clear bits */
2035 while (i < TLAN_NUM_RX_LISTS) {
2036 TLan_StoreSKB(priv->rxList + i, NULL);
2037 ++i;
1da177e4 2038 }
9ded65a1 2039 list->forward = 0;
1da177e4
LT		 2040
2041} /* TLan_ResetLists */
2042
2043
98e0f521 2044static void TLan_FreeLists( struct net_device *dev )
1da177e4
LT		 2045{
2046 TLanPrivateInfo *priv = netdev_priv(dev);
2047 int i;
2048 TLanList *list;
2049 struct sk_buff *skb;
2050
2051 if ( ! bbuf ) {
2052 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
2053 list = priv->txList + i;
2054 skb = TLan_GetSKB(list);
2055 if ( skb ) {
dfc2c0a6
SH		 2056 pci_unmap_single(priv->pciDev,
2057 list->buffer[0].address, skb->len,
2058 PCI_DMA_TODEVICE);
1da177e4
LT		 2059 dev_kfree_skb_any( skb );
2060 list->buffer[8].address = 0;
2061 list->buffer[9].address = 0;
2062 }
2063 }
2064
2065 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
2066 list = priv->rxList + i;
2067 skb = TLan_GetSKB(list);
2068 if ( skb ) {
dfc2c0a6
SH		 2069 pci_unmap_single(priv->pciDev,
2070 list->buffer[0].address,
2071 TLAN_MAX_FRAME_SIZE,
2072 PCI_DMA_FROMDEVICE);
1da177e4
LT		 2073 dev_kfree_skb_any( skb );
2074 list->buffer[8].address = 0;
2075 list->buffer[9].address = 0;
2076 }
2077 }
2078 }
2079} /* TLan_FreeLists */
2080
2081
2082
2083
2084 /***************************************************************
2085 * TLan_PrintDio
6aa20a22 2086 *
1da177e4
LT		 2087 * Returns:
2088 * Nothing
2089 * Parms:
2090 * io_base Base IO port of the device of
2091 * which to print DIO registers.
2092 *
2093 * This function prints out all the internal (DIO)
2094 * registers of a TLAN chip.
2095 *
2096 **************************************************************/
2097
98e0f521 2098static void TLan_PrintDio( u16 io_base )
1da177e4
LT		 2099{
2100 u32 data0, data1;
2101 int i;
2102
dfc2c0a6
SH		 2103 printk( "TLAN: Contents of internal registers for io base 0x%04hx.\n",
2104 io_base );
1da177e4
LT		 2105 printk( "TLAN: Off. +0 +4\n" );
2106 for ( i = 0; i < 0x4C; i+= 8 ) {
2107 data0 = TLan_DioRead32( io_base, i );
2108 data1 = TLan_DioRead32( io_base, i + 0x4 );
2109 printk( "TLAN: 0x%02x 0x%08x 0x%08x\n", i, data0, data1 );
2110 }
2111
2112} /* TLan_PrintDio */
2113
2114
2115
2116
2117 /***************************************************************
2118 * TLan_PrintList
6aa20a22 2119 *
1da177e4
LT		 2120 * Returns:
2121 * Nothing
2122 * Parms:
2123 * list A pointer to the TLanList structure to
2124 * be printed.
2125 * type A string to designate type of list,
2126 * "Rx" or "Tx".
2127 * num The index of the list.
2128 *
2129 * This function prints out the contents of the list
2130 * pointed to by the list parameter.
2131 *
2132 **************************************************************/
2133
98e0f521 2134static void TLan_PrintList( TLanList *list, char *type, int num)
1da177e4
LT		 2135{
2136 int i;
2137
93e16847 2138 printk( "TLAN: %s List %d at %p\n", type, num, list );
1da177e4
LT		 2139 printk( "TLAN: Forward = 0x%08x\n", list->forward );
2140 printk( "TLAN: CSTAT = 0x%04hx\n", list->cStat );
2141 printk( "TLAN: Frame Size = 0x%04hx\n", list->frameSize );
2142 /* for ( i = 0; i < 10; i++ ) { */
2143 for ( i = 0; i < 2; i++ ) {
dfc2c0a6
SH		 2144 printk( "TLAN: Buffer[%d].count, addr = 0x%08x, 0x%08x\n",
2145 i, list->buffer[i].count, list->buffer[i].address );
1da177e4
LT		 2146 }
2147
2148} /* TLan_PrintList */
2149
2150
2151
2152
2153 /***************************************************************
2154 * TLan_ReadAndClearStats
2155 *
2156 * Returns:
2157 * Nothing
2158 * Parms:
2159 * dev Pointer to device structure of adapter
2160 * to which to read stats.
6aa20a22 2161 * record Flag indicating whether to add
1da177e4
LT		 2162 *
2163 * This functions reads all the internal status registers
2164 * of the TLAN chip, which clears them as a side effect.
2165 * It then either adds the values to the device's status
2166 * struct, or discards them, depending on whether record
2167 * is TLAN_RECORD (!=0) or TLAN_IGNORE (==0).
2168 *
2169 **************************************************************/
2170
98e0f521 2171static void TLan_ReadAndClearStats( struct net_device *dev, int record )
1da177e4 2172{
1da177e4
LT		 2173 u32 tx_good, tx_under;
2174 u32 rx_good, rx_over;
2175 u32 def_tx, crc, code;
2176 u32 multi_col, single_col;
2177 u32 excess_col, late_col, loss;
2178
2179 outw( TLAN_GOOD_TX_FRMS, dev->base_addr + TLAN_DIO_ADR );
2180 tx_good = inb( dev->base_addr + TLAN_DIO_DATA );
2181 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2182 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
2183 tx_under = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
2184
2185 outw( TLAN_GOOD_RX_FRMS, dev->base_addr + TLAN_DIO_ADR );
2186 rx_good = inb( dev->base_addr + TLAN_DIO_DATA );
2187 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2188 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
2189 rx_over = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
6aa20a22 2190
1da177e4
LT		 2191 outw( TLAN_DEFERRED_TX, dev->base_addr + TLAN_DIO_ADR );
2192 def_tx = inb( dev->base_addr + TLAN_DIO_DATA );
2193 def_tx += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2194 crc = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2195 code = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
6aa20a22 2196
1da177e4
LT		 2197 outw( TLAN_MULTICOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
2198 multi_col = inb( dev->base_addr + TLAN_DIO_DATA );
2199 multi_col += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2200 single_col = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2201 single_col += inb( dev->base_addr + TLAN_DIO_DATA + 3 ) << 8;
2202
2203 outw( TLAN_EXCESSCOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
2204 excess_col = inb( dev->base_addr + TLAN_DIO_DATA );
2205 late_col = inb( dev->base_addr + TLAN_DIO_DATA + 1 );
2206 loss = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2207
2208 if ( record ) {
f8f31544
SH		 2209 dev->stats.rx_packets += rx_good;
2210 dev->stats.rx_errors += rx_over + crc + code;
2211 dev->stats.tx_packets += tx_good;
2212 dev->stats.tx_errors += tx_under + loss;
2213 dev->stats.collisions += multi_col + single_col + excess_col + late_col;
2214
2215 dev->stats.rx_over_errors += rx_over;
2216 dev->stats.rx_crc_errors += crc;
2217 dev->stats.rx_frame_errors += code;
2218
2219 dev->stats.tx_aborted_errors += tx_under;
2220 dev->stats.tx_carrier_errors += loss;
1da177e4 2221 }
6aa20a22 2222
1da177e4
LT		 2223} /* TLan_ReadAndClearStats */
2224
2225
2226
2227
2228 /***************************************************************
2229 * TLan_Reset
2230 *
2231 * Returns:
2232 * 0
2233 * Parms:
2234 * dev Pointer to device structure of adapter
2235 * to be reset.
2236 *
2237 * This function resets the adapter and it's physical
2238 * device. See Chap. 3, pp. 9-10 of the "ThunderLAN
2239 * Programmer's Guide" for details. The routine tries to
2240 * implement what is detailed there, though adjustments
2241 * have been made.
2242 *
2243 **************************************************************/
2244
98e0f521 2245static void
1da177e4
LT		 2246TLan_ResetAdapter( struct net_device *dev )
2247{
2248 TLanPrivateInfo *priv = netdev_priv(dev);
2249 int i;
2250 u32 addr;
2251 u32 data;
2252 u8 data8;
2253
2254 priv->tlanFullDuplex = FALSE;
2255 priv->phyOnline=0;
2256 netif_carrier_off(dev);
2257
2258/* 1. Assert reset bit. */
2259
2260 data = inl(dev->base_addr + TLAN_HOST_CMD);
2261 data |= TLAN_HC_AD_RST;
2262 outl(data, dev->base_addr + TLAN_HOST_CMD);
6aa20a22 2263
1da177e4
LT		 2264 udelay(1000);
2265
2266/* 2. Turn off interrupts. ( Probably isn't necessary ) */
2267
2268 data = inl(dev->base_addr + TLAN_HOST_CMD);
2269 data |= TLAN_HC_INT_OFF;
2270 outl(data, dev->base_addr + TLAN_HOST_CMD);
2271
2272/* 3. Clear AREGs and HASHs. */
2273
2274 for ( i = TLAN_AREG_0; i <= TLAN_HASH_2; i += 4 ) {
2275 TLan_DioWrite32( dev->base_addr, (u16) i, 0 );
2276 }
2277
2278/* 4. Setup NetConfig register. */
2279
2280 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2281 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
2282
2283/* 5. Load Ld_Tmr and Ld_Thr in HOST_CMD. */
2284
2285 outl( TLAN_HC_LD_TMR | 0x3f, dev->base_addr + TLAN_HOST_CMD );
2286 outl( TLAN_HC_LD_THR | 0x9, dev->base_addr + TLAN_HOST_CMD );
2287
2288/* 6. Unreset the MII by setting NMRST (in NetSio) to 1. */
2289
2290 outw( TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR );
2291 addr = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
2292 TLan_SetBit( TLAN_NET_SIO_NMRST, addr );
2293
2294/* 7. Setup the remaining registers. */
2295
2296 if ( priv->tlanRev >= 0x30 ) {
2297 data8 = TLAN_ID_TX_EOC | TLAN_ID_RX_EOC;
2298 TLan_DioWrite8( dev->base_addr, TLAN_INT_DIS, data8 );
2299 }
2300 TLan_PhyDetect( dev );
2301 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN;
6aa20a22 2302
1da177e4
LT		 2303 if ( priv->adapter->flags & TLAN_ADAPTER_BIT_RATE_PHY ) {
2304 data |= TLAN_NET_CFG_BIT;
2305 if ( priv->aui == 1 ) {
2306 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x0a );
2307 } else if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2308 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x00 );
2309 priv->tlanFullDuplex = TRUE;
2310 } else {
2311 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x08 );
2312 }
2313 }
2314
2315 if ( priv->phyNum == 0 ) {
2316 data |= TLAN_NET_CFG_PHY_EN;
2317 }
2318 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
2319
2320 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2321 TLan_FinishReset( dev );
2322 } else {
2323 TLan_PhyPowerDown( dev );
2324 }
2325
2326} /* TLan_ResetAdapter */
2327
2328
2329
2330
98e0f521 2331static void
1da177e4
LT		 2332TLan_FinishReset( struct net_device *dev )
2333{
2334 TLanPrivateInfo *priv = netdev_priv(dev);
2335 u8 data;
2336 u32 phy;
2337 u8 sio;
2338 u16 status;
2339 u16 partner;
2340 u16 tlphy_ctl;
2341 u16 tlphy_par;
2342 u16 tlphy_id1, tlphy_id2;
2343 int i;
2344
2345 phy = priv->phy[priv->phyNum];
2346
2347 data = TLAN_NET_CMD_NRESET | TLAN_NET_CMD_NWRAP;
2348 if ( priv->tlanFullDuplex ) {
2349 data |= TLAN_NET_CMD_DUPLEX;
2350 }
2351 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, data );
6aa20a22 2352 data = TLAN_NET_MASK_MASK4 | TLAN_NET_MASK_MASK5;
1da177e4 2353 if ( priv->phyNum == 0 ) {
6aa20a22 2354 data |= TLAN_NET_MASK_MASK7;
1da177e4
LT		 2355 }
2356 TLan_DioWrite8( dev->base_addr, TLAN_NET_MASK, data );
2357 TLan_DioWrite16( dev->base_addr, TLAN_MAX_RX, ((1536)+7)&~7 );
2358 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &tlphy_id1 );
2359 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &tlphy_id2 );
6aa20a22 2360
dfc2c0a6
SH		 2361 if ( ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) ||
2362 ( priv->aui ) ) {
1da177e4
LT		 2363 status = MII_GS_LINK;
2364 printk( "TLAN: %s: Link forced.\n", dev->name );
2365 } else {
2366 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2367 udelay( 1000 );
2368 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
dfc2c0a6
SH		 2369 if ( (status & MII_GS_LINK) &&
2370 /* We only support link info on Nat.Sem. PHY's */
1da177e4
LT		 2371 (tlphy_id1 == NAT_SEM_ID1) &&
2372 (tlphy_id2 == NAT_SEM_ID2) ) {
2373 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &partner );
2374 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_PAR, &tlphy_par );
6aa20a22 2375
1da177e4
LT		 2376 printk( "TLAN: %s: Link active with ", dev->name );
2377 if (!(tlphy_par & TLAN_PHY_AN_EN_STAT)) {
6aa20a22 2378 printk( "forced 10%sMbps %s-Duplex\n",
dfc2c0a6
SH		 2379 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2380 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
1da177e4
LT		 2381 } else {
2382 printk( "AutoNegotiation enabled, at 10%sMbps %s-Duplex\n",
dfc2c0a6
SH		 2383 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2384 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
1da177e4
LT		 2385 printk("TLAN: Partner capability: ");
2386 for (i = 5; i <= 10; i++)
2387 if (partner & (1<<i))
2388 printk("%s",media[i-5]);
2389 printk("\n");
2390 }
2391
2392 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
6aa20a22 2393#ifdef MONITOR
1da177e4
LT		 2394 /* We have link beat..for now anyway */
2395 priv->link = 1;
2396 /*Enabling link beat monitoring */
2397 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_LINK_BEAT );
6aa20a22 2398#endif
1da177e4
LT		 2399 } else if (status & MII_GS_LINK) {
2400 printk( "TLAN: %s: Link active\n", dev->name );
2401 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
2402 }
2403 }
2404
2405 if ( priv->phyNum == 0 ) {
2406 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
2407 tlphy_ctl |= TLAN_TC_INTEN;
2408 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl );
2409 sio = TLan_DioRead8( dev->base_addr, TLAN_NET_SIO );
2410 sio |= TLAN_NET_SIO_MINTEN;
2411 TLan_DioWrite8( dev->base_addr, TLAN_NET_SIO, sio );
2412 }
2413
2414 if ( status & MII_GS_LINK ) {
2415 TLan_SetMac( dev, 0, dev->dev_addr );
2416 priv->phyOnline = 1;
2417 outb( ( TLAN_HC_INT_ON >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2418 if ( debug >= 1 && debug != TLAN_DEBUG_PROBE ) {
2419 outb( ( TLAN_HC_REQ_INT >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2420 }
2421 outl( priv->rxListDMA, dev->base_addr + TLAN_CH_PARM );
2422 outl( TLAN_HC_GO | TLAN_HC_RT, dev->base_addr + TLAN_HOST_CMD );
2423 netif_carrier_on(dev);
2424 } else {
dfc2c0a6
SH		 2425 printk( "TLAN: %s: Link inactive, will retry in 10 secs...\n",
2426 dev->name );
1da177e4
LT		 2427 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_FINISH_RESET );
2428 return;
2429 }
562faf46 2430 TLan_SetMulticastList(dev);
1da177e4
LT		 2431
2432} /* TLan_FinishReset */
2433
2434
2435
2436
2437 /***************************************************************
2438 * TLan_SetMac
2439 *
2440 * Returns:
2441 * Nothing
2442 * Parms:
2443 * dev Pointer to device structure of adapter
2444 * on which to change the AREG.
2445 * areg The AREG to set the address in (0 - 3).
2446 * mac A pointer to an array of chars. Each
2447 * element stores one byte of the address.
2448 * IE, it isn't in ascii.
2449 *
2450 * This function transfers a MAC address to one of the
2451 * TLAN AREGs (address registers). The TLAN chip locks
2452 * the register on writing to offset 0 and unlocks the
2453 * register after writing to offset 5. If NULL is passed
2454 * in mac, then the AREG is filled with 0's.
2455 *
2456 **************************************************************/
2457
98e0f521 2458static void TLan_SetMac( struct net_device *dev, int areg, char *mac )
1da177e4
LT		 2459{
2460 int i;
6aa20a22 2461
1da177e4
LT		 2462 areg *= 6;
2463
2464 if ( mac != NULL ) {
2465 for ( i = 0; i < 6; i++ )
dfc2c0a6
SH		 2466 TLan_DioWrite8( dev->base_addr,
2467 TLAN_AREG_0 + areg + i, mac[i] );
1da177e4
LT		 2468 } else {
2469 for ( i = 0; i < 6; i++ )
dfc2c0a6
SH		 2470 TLan_DioWrite8( dev->base_addr,
2471 TLAN_AREG_0 + areg + i, 0 );
1da177e4
LT		 2472 }
2473
2474} /* TLan_SetMac */
2475
2476
2477
2478
2479/*****************************************************************************
2480******************************************************************************
2481
2482 ThunderLAN Driver PHY Layer Routines
2483
2484******************************************************************************
2485*****************************************************************************/
2486
2487
2488
2489 /*********************************************************************
2490 * TLan_PhyPrint
2491 *
2492 * Returns:
2493 * Nothing
2494 * Parms:
2495 * dev A pointer to the device structure of the
2496 * TLAN device having the PHYs to be detailed.
6aa20a22 2497 *
1da177e4
LT		 2498 * This function prints the registers a PHY (aka transceiver).
2499 *
2500 ********************************************************************/
2501
98e0f521 2502static void TLan_PhyPrint( struct net_device *dev )
1da177e4
LT		 2503{
2504 TLanPrivateInfo *priv = netdev_priv(dev);
2505 u16 i, data0, data1, data2, data3, phy;
2506
2507 phy = priv->phy[priv->phyNum];
2508
2509 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2510 printk( "TLAN: Device %s, Unmanaged PHY.\n", dev->name );
2511 } else if ( phy <= TLAN_PHY_MAX_ADDR ) {
2512 printk( "TLAN: Device %s, PHY 0x%02x.\n", dev->name, phy );
2513 printk( "TLAN: Off. +0 +1 +2 +3 \n" );
2514 for ( i = 0; i < 0x20; i+= 4 ) {
2515 printk( "TLAN: 0x%02x", i );
2516 TLan_MiiReadReg( dev, phy, i, &data0 );
2517 printk( " 0x%04hx", data0 );
2518 TLan_MiiReadReg( dev, phy, i + 1, &data1 );
2519 printk( " 0x%04hx", data1 );
2520 TLan_MiiReadReg( dev, phy, i + 2, &data2 );
2521 printk( " 0x%04hx", data2 );
2522 TLan_MiiReadReg( dev, phy, i + 3, &data3 );
2523 printk( " 0x%04hx\n", data3 );
2524 }
2525 } else {
2526 printk( "TLAN: Device %s, Invalid PHY.\n", dev->name );
2527 }
2528
2529} /* TLan_PhyPrint */
2530
2531
2532
2533
2534 /*********************************************************************
2535 * TLan_PhyDetect
2536 *
2537 * Returns:
2538 * Nothing
2539 * Parms:
2540 * dev A pointer to the device structure of the adapter
2541 * for which the PHY needs determined.
2542 *
2543 * So far I've found that adapters which have external PHYs
2544 * may also use the internal PHY for part of the functionality.
2545 * (eg, AUI/Thinnet). This function finds out if this TLAN
2546 * chip has an internal PHY, and then finds the first external
2547 * PHY (starting from address 0) if it exists).
2548 *
2549 ********************************************************************/
2550
98e0f521 2551static void TLan_PhyDetect( struct net_device *dev )
1da177e4
LT		 2552{
2553 TLanPrivateInfo *priv = netdev_priv(dev);
2554 u16 control;
2555 u16 hi;
2556 u16 lo;
2557 u32 phy;
2558
2559 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2560 priv->phyNum = 0xFFFF;
2561 return;
2562 }
2563
2564 TLan_MiiReadReg( dev, TLAN_PHY_MAX_ADDR, MII_GEN_ID_HI, &hi );
6aa20a22 2565
1da177e4
LT		 2566 if ( hi != 0xFFFF ) {
2567 priv->phy[0] = TLAN_PHY_MAX_ADDR;
2568 } else {
2569 priv->phy[0] = TLAN_PHY_NONE;
2570 }
2571
2572 priv->phy[1] = TLAN_PHY_NONE;
2573 for ( phy = 0; phy <= TLAN_PHY_MAX_ADDR; phy++ ) {
2574 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &control );
2575 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &hi );
2576 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &lo );
dfc2c0a6
SH		 2577 if ( ( control != 0xFFFF ) ||
2578 ( hi != 0xFFFF ) || ( lo != 0xFFFF ) ) {
2579 TLAN_DBG( TLAN_DEBUG_GNRL,
2580 "PHY found at %02x %04x %04x %04x\n",
2581 phy, control, hi, lo );
2582 if ( ( priv->phy[1] == TLAN_PHY_NONE ) &&
2583 ( phy != TLAN_PHY_MAX_ADDR ) ) {
1da177e4
LT		 2584 priv->phy[1] = phy;
2585 }
2586 }
2587 }
2588
2589 if ( priv->phy[1] != TLAN_PHY_NONE ) {
2590 priv->phyNum = 1;
2591 } else if ( priv->phy[0] != TLAN_PHY_NONE ) {
2592 priv->phyNum = 0;
2593 } else {
2594 printk( "TLAN: Cannot initialize device, no PHY was found!\n" );
2595 }
2596
2597} /* TLan_PhyDetect */
2598
2599
2600
2601
98e0f521 2602static void TLan_PhyPowerDown( struct net_device *dev )
1da177e4
LT		 2603{
2604 TLanPrivateInfo *priv = netdev_priv(dev);
2605 u16 value;
2606
2607 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering down PHY(s).\n", dev->name );
2608 value = MII_GC_PDOWN | MII_GC_LOOPBK | MII_GC_ISOLATE;
2609 TLan_MiiSync( dev->base_addr );
2610 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
dfc2c0a6
SH		 2611 if ( ( priv->phyNum == 0 ) &&
2612 ( priv->phy[1] != TLAN_PHY_NONE ) &&
2613 ( ! ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) ) ) {
1da177e4
LT		 2614 TLan_MiiSync( dev->base_addr );
2615 TLan_MiiWriteReg( dev, priv->phy[1], MII_GEN_CTL, value );
2616 }
2617
2618 /* Wait for 50 ms and powerup
2619 * This is abitrary. It is intended to make sure the
2620 * transceiver settles.
2621 */
2622 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_PUP );
2623
2624} /* TLan_PhyPowerDown */
2625
2626
2627
2628
98e0f521 2629static void TLan_PhyPowerUp( struct net_device *dev )
1da177e4
LT		 2630{
2631 TLanPrivateInfo *priv = netdev_priv(dev);
2632 u16 value;
2633
2634 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering up PHY.\n", dev->name );
2635 TLan_MiiSync( dev->base_addr );
2636 value = MII_GC_LOOPBK;
2637 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
2638 TLan_MiiSync(dev->base_addr);
2639 /* Wait for 500 ms and reset the
2640 * transceiver. The TLAN docs say both 50 ms and
2641 * 500 ms, so do the longer, just in case.
2642 */
2643 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_RESET );
2644
2645} /* TLan_PhyPowerUp */
2646
2647
2648
2649
98e0f521 2650static void TLan_PhyReset( struct net_device *dev )
1da177e4
LT		 2651{
2652 TLanPrivateInfo *priv = netdev_priv(dev);
2653 u16 phy;
2654 u16 value;
2655
2656 phy = priv->phy[priv->phyNum];
2657
2658 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Reseting PHY.\n", dev->name );
2659 TLan_MiiSync( dev->base_addr );
2660 value = MII_GC_LOOPBK | MII_GC_RESET;
2661 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, value );
2662 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2663 while ( value & MII_GC_RESET ) {
2664 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2665 }
2666
2667 /* Wait for 500 ms and initialize.
2668 * I don't remember why I wait this long.
2669 * I've changed this to 50ms, as it seems long enough.
2670 */
2671 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_START_LINK );
2672
2673} /* TLan_PhyReset */
2674
2675
2676
2677
98e0f521 2678static void TLan_PhyStartLink( struct net_device *dev )
1da177e4
LT		 2679{
2680 TLanPrivateInfo *priv = netdev_priv(dev);
2681 u16 ability;
2682 u16 control;
2683 u16 data;
2684 u16 phy;
2685 u16 status;
2686 u16 tctl;
2687
2688 phy = priv->phy[priv->phyNum];
2689 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Trying to activate link.\n", dev->name );
2690 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2691 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &ability );
2692
6aa20a22 2693 if ( ( status & MII_GS_AUTONEG ) &&
1da177e4
LT		 2694 ( ! priv->aui ) ) {
2695 ability = status >> 11;
6aa20a22 2696 if ( priv->speed == TLAN_SPEED_10 &&
1da177e4
LT		 2697 priv->duplex == TLAN_DUPLEX_HALF) {
2698 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0000);
2699 } else if ( priv->speed == TLAN_SPEED_10 &&
2700 priv->duplex == TLAN_DUPLEX_FULL) {
2701 priv->tlanFullDuplex = TRUE;
2702 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0100);
2703 } else if ( priv->speed == TLAN_SPEED_100 &&
2704 priv->duplex == TLAN_DUPLEX_HALF) {
2705 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2000);
2706 } else if ( priv->speed == TLAN_SPEED_100 &&
2707 priv->duplex == TLAN_DUPLEX_FULL) {
2708 priv->tlanFullDuplex = TRUE;
2709 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2100);
2710 } else {
6aa20a22 2711
1da177e4
LT		 2712 /* Set Auto-Neg advertisement */
2713 TLan_MiiWriteReg( dev, phy, MII_AN_ADV, (ability << 5) | 1);
2714 /* Enablee Auto-Neg */
2715 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1000 );
2716 /* Restart Auto-Neg */
2717 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1200 );
2718 /* Wait for 4 sec for autonegotiation
2719 * to complete. The max spec time is less than this
2720 * but the card need additional time to start AN.
2721 * .5 sec should be plenty extra.
2722 */
2723 printk( "TLAN: %s: Starting autonegotiation.\n", dev->name );
2724 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_PHY_FINISH_AN );
2725 return;
2726 }
6aa20a22
JG		 2727
2728 }
2729
1da177e4
LT		 2730 if ( ( priv->aui ) && ( priv->phyNum != 0 ) ) {
2731 priv->phyNum = 0;
2732 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2733 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2734 TLan_SetTimer( dev, (40*HZ/1000), TLAN_TIMER_PHY_PDOWN );
2735 return;
2736 } else if ( priv->phyNum == 0 ) {
2737 control = 0;
2738 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tctl );
2739 if ( priv->aui ) {
2740 tctl |= TLAN_TC_AUISEL;
6aa20a22 2741 } else {
1da177e4
LT		 2742 tctl &= ~TLAN_TC_AUISEL;
2743 if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2744 control |= MII_GC_DUPLEX;
2745 priv->tlanFullDuplex = TRUE;
2746 }
2747 if ( priv->speed == TLAN_SPEED_100 ) {
2748 control |= MII_GC_SPEEDSEL;
2749 }
2750 }
2751 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, control );
2752 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tctl );
2753 }
2754
2755 /* Wait for 2 sec to give the transceiver time
2756 * to establish link.
2757 */
2758 TLan_SetTimer( dev, (4*HZ), TLAN_TIMER_FINISH_RESET );
2759
2760} /* TLan_PhyStartLink */
2761
2762
2763
2764
98e0f521 2765static void TLan_PhyFinishAutoNeg( struct net_device *dev )
1da177e4
LT		 2766{
2767 TLanPrivateInfo *priv = netdev_priv(dev);
2768 u16 an_adv;
2769 u16 an_lpa;
2770 u16 data;
2771 u16 mode;
2772 u16 phy;
2773 u16 status;
6aa20a22 2774
1da177e4
LT		 2775 phy = priv->phy[priv->phyNum];
2776
2777 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2778 udelay( 1000 );
2779 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2780
2781 if ( ! ( status & MII_GS_AUTOCMPLT ) ) {
2782 /* Wait for 8 sec to give the process
2783 * more time. Perhaps we should fail after a while.
2784 */
2785 if (!priv->neg_be_verbose++) {
dfc2c0a6
SH		 2786 pr_info("TLAN: Giving autonegotiation more time.\n");
2787 pr_info("TLAN: Please check that your adapter has\n");
2788 pr_info("TLAN: been properly connected to a HUB or Switch.\n");
2789 pr_info("TLAN: Trying to establish link in the background...\n");
1da177e4
LT		 2790 }
2791 TLan_SetTimer( dev, (8*HZ), TLAN_TIMER_PHY_FINISH_AN );
2792 return;
2793 }
2794
2795 printk( "TLAN: %s: Autonegotiation complete.\n", dev->name );
2796 TLan_MiiReadReg( dev, phy, MII_AN_ADV, &an_adv );
2797 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &an_lpa );
2798 mode = an_adv & an_lpa & 0x03E0;
2799 if ( mode & 0x0100 ) {
2800 priv->tlanFullDuplex = TRUE;
2801 } else if ( ! ( mode & 0x0080 ) && ( mode & 0x0040 ) ) {
2802 priv->tlanFullDuplex = TRUE;
2803 }
2804
dfc2c0a6
SH		 2805 if ( ( ! ( mode & 0x0180 ) ) &&
2806 ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) &&
2807 ( priv->phyNum != 0 ) ) {
1da177e4
LT		 2808 priv->phyNum = 0;
2809 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2810 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2811 TLan_SetTimer( dev, (400*HZ/1000), TLAN_TIMER_PHY_PDOWN );
2812 return;
2813 }
2814
2815 if ( priv->phyNum == 0 ) {
dfc2c0a6
SH		 2816 if ( ( priv->duplex == TLAN_DUPLEX_FULL ) ||
2817 ( an_adv & an_lpa & 0x0040 ) ) {
2818 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL,
2819 MII_GC_AUTOENB | MII_GC_DUPLEX );
2820 pr_info("TLAN: Starting internal PHY with FULL-DUPLEX\n" );
1da177e4
LT		 2821 } else {
2822 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB );
dfc2c0a6 2823 pr_info( "TLAN: Starting internal PHY with HALF-DUPLEX\n" );
1da177e4
LT		 2824 }
2825 }
2826
2827 /* Wait for 100 ms. No reason in partiticular.
2828 */
2829 TLan_SetTimer( dev, (HZ/10), TLAN_TIMER_FINISH_RESET );
6aa20a22 2830
1da177e4
LT		 2831} /* TLan_PhyFinishAutoNeg */
2832
2833#ifdef MONITOR
2834
2835 /*********************************************************************
2836 *
2837 * TLan_phyMonitor
2838 *
6aa20a22 2839 * Returns:
1da177e4
LT		 2840 * None
2841 *
2842 * Params:
2843 * dev The device structure of this device.
2844 *
6aa20a22 2845 *
1da177e4
LT		 2846 * This function monitors PHY condition by reading the status
2847 * register via the MII bus. This can be used to give info
2848 * about link changes (up/down), and possible switch to alternate
2849 * media.
2850 *
2851 * ******************************************************************/
2852
2853void TLan_PhyMonitor( struct net_device *dev )
2854{
2855 TLanPrivateInfo *priv = netdev_priv(dev);
2856 u16 phy;
2857 u16 phy_status;
2858
2859 phy = priv->phy[priv->phyNum];
2860
2861 /* Get PHY status register */
2862 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &phy_status );
2863
2864 /* Check if link has been lost */
6aa20a22 2865 if (!(phy_status & MII_GS_LINK)) {
1da177e4
LT		 2866 if (priv->link) {
2867 priv->link = 0;
2868 printk(KERN_DEBUG "TLAN: %s has lost link\n", dev->name);
7d17c1d6 2869 netif_carrier_off(dev);
1da177e4
LT		 2870 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT );
2871 return;
2872 }
2873 }
2874
2875 /* Link restablished? */
2876 if ((phy_status & MII_GS_LINK) && !priv->link) {
2877 priv->link = 1;
2878 printk(KERN_DEBUG "TLAN: %s has reestablished link\n", dev->name);
7d17c1d6 2879 netif_carrier_on(dev);
1da177e4
LT		 2880 }
2881
2882 /* Setup a new monitor */
2883 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT );
6aa20a22 2884}
1da177e4
LT		 2885
2886#endif /* MONITOR */
2887
2888
2889/*****************************************************************************
2890******************************************************************************
2891
2892 ThunderLAN Driver MII Routines
2893
2894 These routines are based on the information in Chap. 2 of the
2895 "ThunderLAN Programmer's Guide", pp. 15-24.
2896
2897******************************************************************************
2898*****************************************************************************/
2899
2900
2901 /***************************************************************
2902 * TLan_MiiReadReg
2903 *
2904 * Returns:
2905 * 0 if ack received ok
2906 * 1 otherwise.
2907 *
2908 * Parms:
2909 * dev The device structure containing
2910 * The io address and interrupt count
2911 * for this device.
2912 * phy The address of the PHY to be queried.
2913 * reg The register whose contents are to be
4a4efbde 2914 * retrieved.
1da177e4
LT		 2915 * val A pointer to a variable to store the
2916 * retrieved value.
2917 *
4a4efbde 2918 * This function uses the TLAN's MII bus to retrieve the contents
1da177e4
LT		 2919 * of a given register on a PHY. It sends the appropriate info
2920 * and then reads the 16-bit register value from the MII bus via
2921 * the TLAN SIO register.
2922 *
2923 **************************************************************/
2924
98e0f521 2925static int TLan_MiiReadReg( struct net_device *dev, u16 phy, u16 reg, u16 *val )
1da177e4
LT		 2926{
2927 u8 nack;
2928 u16 sio, tmp;
2929 u32 i;
2930 int err;
2931 int minten;
2932 TLanPrivateInfo *priv = netdev_priv(dev);
2933 unsigned long flags = 0;
2934
2935 err = FALSE;
2936 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
2937 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
6aa20a22 2938
1da177e4
LT		 2939 if (!in_irq())
2940 spin_lock_irqsave(&priv->lock, flags);
2941
2942 TLan_MiiSync(dev->base_addr);
2943
2944 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
2945 if ( minten )
2946 TLan_ClearBit(TLAN_NET_SIO_MINTEN, sio);
2947
2948 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
2949 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Read ( 10b ) */
2950 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
2951 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
2952
2953
2954 TLan_ClearBit(TLAN_NET_SIO_MTXEN, sio); /* Change direction */
2955
2956 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Clock Idle bit */
2957 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2958 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Wait 300ns */
2959
2960 nack = TLan_GetBit(TLAN_NET_SIO_MDATA, sio); /* Check for ACK */
2961 TLan_SetBit(TLAN_NET_SIO_MCLK, sio); /* Finish ACK */
2962 if (nack) { /* No ACK, so fake it */
2963 for (i = 0; i < 16; i++) {
2964 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2965 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2966 }
2967 tmp = 0xffff;
2968 err = TRUE;
2969 } else { /* ACK, so read data */
2970 for (tmp = 0, i = 0x8000; i; i >>= 1) {
2971 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2972 if (TLan_GetBit(TLAN_NET_SIO_MDATA, sio))
2973 tmp |= i;
2974 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2975 }
2976 }
2977
2978
2979 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Idle cycle */
2980 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2981
2982 if ( minten )
2983 TLan_SetBit(TLAN_NET_SIO_MINTEN, sio);
2984
2985 *val = tmp;
6aa20a22 2986
1da177e4
LT		 2987 if (!in_irq())
2988 spin_unlock_irqrestore(&priv->lock, flags);
2989
2990 return err;
2991
2992} /* TLan_MiiReadReg */
2993
2994
2995
2996
2997 /***************************************************************
2998 * TLan_MiiSendData
2999 *
3000 * Returns:
3001 * Nothing
3002 * Parms:
3003 * base_port The base IO port of the adapter in
3004 * question.
3005 * dev The address of the PHY to be queried.
3006 * data The value to be placed on the MII bus.
3007 * num_bits The number of bits in data that are to
3008 * be placed on the MII bus.
3009 *
3010 * This function sends on sequence of bits on the MII
3011 * configuration bus.
3012 *
3013 **************************************************************/
3014
98e0f521 3015static void TLan_MiiSendData( u16 base_port, u32 data, unsigned num_bits )
1da177e4
LT		 3016{
3017 u16 sio;
3018 u32 i;
3019
3020 if ( num_bits == 0 )
3021 return;
3022
3023 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
3024 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
3025 TLan_SetBit( TLAN_NET_SIO_MTXEN, sio );
3026
3027 for ( i = ( 0x1 << ( num_bits - 1 ) ); i; i >>= 1 ) {
3028 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
3029 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
3030 if ( data & i )
3031 TLan_SetBit( TLAN_NET_SIO_MDATA, sio );
3032 else
3033 TLan_ClearBit( TLAN_NET_SIO_MDATA, sio );
3034 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3035 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
3036 }
3037
3038} /* TLan_MiiSendData */
3039
3040
3041
3042
3043 /***************************************************************
3044 * TLan_MiiSync
3045 *
3046 * Returns:
3047 * Nothing
3048 * Parms:
3049 * base_port The base IO port of the adapter in
3050 * question.
3051 *
3052 * This functions syncs all PHYs in terms of the MII configuration
3053 * bus.
3054 *
3055 **************************************************************/
3056
98e0f521 3057static void TLan_MiiSync( u16 base_port )
1da177e4
LT		 3058{
3059 int i;
3060 u16 sio;
3061
3062 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
3063 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
3064
3065 TLan_ClearBit( TLAN_NET_SIO_MTXEN, sio );
3066 for ( i = 0; i < 32; i++ ) {
3067 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
3068 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3069 }
3070
3071} /* TLan_MiiSync */
3072
3073
3074
3075
3076 /***************************************************************
3077 * TLan_MiiWriteReg
3078 *
3079 * Returns:
3080 * Nothing
3081 * Parms:
3082 * dev The device structure for the device
3083 * to write to.
3084 * phy The address of the PHY to be written to.
3085 * reg The register whose contents are to be
3086 * written.
3087 * val The value to be written to the register.
3088 *
3089 * This function uses the TLAN's MII bus to write the contents of a
3090 * given register on a PHY. It sends the appropriate info and then
3091 * writes the 16-bit register value from the MII configuration bus
3092 * via the TLAN SIO register.
3093 *
3094 **************************************************************/
3095
98e0f521 3096static void TLan_MiiWriteReg( struct net_device *dev, u16 phy, u16 reg, u16 val )
1da177e4
LT		 3097{
3098 u16 sio;
3099 int minten;
3100 unsigned long flags = 0;
3101 TLanPrivateInfo *priv = netdev_priv(dev);
3102
3103 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
3104 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
6aa20a22 3105
1da177e4
LT		 3106 if (!in_irq())
3107 spin_lock_irqsave(&priv->lock, flags);
3108
3109 TLan_MiiSync( dev->base_addr );
3110
3111 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
3112 if ( minten )
3113 TLan_ClearBit( TLAN_NET_SIO_MINTEN, sio );
3114
3115 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
3116 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Write ( 01b ) */
3117 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
3118 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
3119
3120 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Send ACK */
3121 TLan_MiiSendData( dev->base_addr, val, 16 ); /* Send Data */
3122
3123 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio ); /* Idle cycle */
3124 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3125
3126 if ( minten )
3127 TLan_SetBit( TLAN_NET_SIO_MINTEN, sio );
6aa20a22 3128
1da177e4
LT		 3129 if (!in_irq())
3130 spin_unlock_irqrestore(&priv->lock, flags);
3131
3132} /* TLan_MiiWriteReg */
3133
3134
3135
3136
3137/*****************************************************************************
3138******************************************************************************
3139
3140 ThunderLAN Driver Eeprom routines
3141
3142 The Compaq Netelligent 10 and 10/100 cards use a Microchip 24C02A
3143 EEPROM. These functions are based on information in Microchip's
3144 data sheet. I don't know how well this functions will work with
3145 other EEPROMs.
3146
3147******************************************************************************
3148*****************************************************************************/
3149
3150
3151 /***************************************************************
3152 * TLan_EeSendStart
3153 *
3154 * Returns:
3155 * Nothing
6aa20a22 3156 * Parms:
1da177e4
LT		 3157 * io_base The IO port base address for the
3158 * TLAN device with the EEPROM to
3159 * use.
3160 *
3161 * This function sends a start cycle to an EEPROM attached
3162 * to a TLAN chip.
3163 *
3164 **************************************************************/
3165
98e0f521 3166static void TLan_EeSendStart( u16 io_base )
1da177e4
LT		 3167{
3168 u16 sio;
3169
3170 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3171 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3172
3173 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3174 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3175 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3176 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3177 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3178
3179} /* TLan_EeSendStart */
3180
3181
3182
3183
3184 /***************************************************************
3185 * TLan_EeSendByte
3186 *
3187 * Returns:
3188 * If the correct ack was received, 0, otherwise 1
3189 * Parms: io_base The IO port base address for the
3190 * TLAN device with the EEPROM to
3191 * use.
3192 * data The 8 bits of information to
3193 * send to the EEPROM.
3194 * stop If TLAN_EEPROM_STOP is passed, a
3195 * stop cycle is sent after the
3196 * byte is sent after the ack is
3197 * read.
3198 *
3199 * This function sends a byte on the serial EEPROM line,
3200 * driving the clock to send each bit. The function then
3201 * reverses transmission direction and reads an acknowledge
3202 * bit.
3203 *
3204 **************************************************************/
3205
98e0f521 3206static int TLan_EeSendByte( u16 io_base, u8 data, int stop )
1da177e4
LT		 3207{
3208 int err;
3209 u8 place;
3210 u16 sio;
3211
3212 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3213 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3214
3215 /* Assume clock is low, tx is enabled; */
3216 for ( place = 0x80; place != 0; place >>= 1 ) {
3217 if ( place & data )
3218 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3219 else
3220 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3221 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3222 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3223 }
3224 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
3225 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3226 err = TLan_GetBit( TLAN_NET_SIO_EDATA, sio );
3227 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3228 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3229
3230 if ( ( ! err ) && stop ) {
dfc2c0a6
SH		 3231 /* STOP, raise data while clock is high */
3232 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
1da177e4
LT		 3233 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3234 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3235 }
3236
3237 return ( err );
3238
3239} /* TLan_EeSendByte */
3240
3241
3242
3243
3244 /***************************************************************
3245 * TLan_EeReceiveByte
3246 *
3247 * Returns:
3248 * Nothing
3249 * Parms:
3250 * io_base The IO port base address for the
3251 * TLAN device with the EEPROM to
3252 * use.
3253 * data An address to a char to hold the
3254 * data sent from the EEPROM.
3255 * stop If TLAN_EEPROM_STOP is passed, a
3256 * stop cycle is sent after the
3257 * byte is received, and no ack is
3258 * sent.
3259 *
3260 * This function receives 8 bits of data from the EEPROM
3261 * over the serial link. It then sends and ack bit, or no
3262 * ack and a stop bit. This function is used to retrieve
3263 * data after the address of a byte in the EEPROM has been
3264 * sent.
3265 *
3266 **************************************************************/
3267
98e0f521 3268static void TLan_EeReceiveByte( u16 io_base, u8 *data, int stop )
1da177e4
LT		 3269{
3270 u8 place;
3271 u16 sio;
3272
3273 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3274 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3275 *data = 0;
3276
3277 /* Assume clock is low, tx is enabled; */
3278 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
3279 for ( place = 0x80; place; place >>= 1 ) {
3280 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3281 if ( TLan_GetBit( TLAN_NET_SIO_EDATA, sio ) )
3282 *data |= place;
3283 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3284 }
3285
3286 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3287 if ( ! stop ) {
3288 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* Ack = 0 */
3289 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3290 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3291 } else {
3292 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); /* No ack = 1 (?) */
3293 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3294 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
dfc2c0a6
SH		 3295 /* STOP, raise data while clock is high */
3296 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
1da177e4
LT		 3297 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3298 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3299 }
3300
3301} /* TLan_EeReceiveByte */
3302
3303
3304
3305
3306 /***************************************************************
3307 * TLan_EeReadByte
3308 *
3309 * Returns:
3310 * No error = 0, else, the stage at which the error
3311 * occurred.
3312 * Parms:
3313 * io_base The IO port base address for the
3314 * TLAN device with the EEPROM to
3315 * use.
3316 * ee_addr The address of the byte in the
3317 * EEPROM whose contents are to be
3318 * retrieved.
3319 * data An address to a char to hold the
3320 * data obtained from the EEPROM.
3321 *
3322 * This function reads a byte of information from an byte
3323 * cell in the EEPROM.
3324 *
3325 **************************************************************/
3326
98e0f521 3327static int TLan_EeReadByte( struct net_device *dev, u8 ee_addr, u8 *data )
1da177e4
LT		 3328{
3329 int err;
3330 TLanPrivateInfo *priv = netdev_priv(dev);
3331 unsigned long flags = 0;
3332 int ret=0;
3333
3334 spin_lock_irqsave(&priv->lock, flags);
3335
3336 TLan_EeSendStart( dev->base_addr );
3337 err = TLan_EeSendByte( dev->base_addr, 0xA0, TLAN_EEPROM_ACK );
3338 if (err)
3339 {
3340 ret=1;
3341 goto fail;
3342 }
3343 err = TLan_EeSendByte( dev->base_addr, ee_addr, TLAN_EEPROM_ACK );
3344 if (err)
3345 {
3346 ret=2;
3347 goto fail;
3348 }
3349 TLan_EeSendStart( dev->base_addr );
3350 err = TLan_EeSendByte( dev->base_addr, 0xA1, TLAN_EEPROM_ACK );
3351 if (err)
3352 {
3353 ret=3;
3354 goto fail;
3355 }
3356 TLan_EeReceiveByte( dev->base_addr, data, TLAN_EEPROM_STOP );
3357fail:
3358 spin_unlock_irqrestore(&priv->lock, flags);
3359
3360 return ret;
3361
3362} /* TLan_EeReadByte */
3363
3364
3365
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