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CommitLineData
1da177e4
LT
1/*
2 * olympic.c (c) 1999 Peter De Schrijver All Rights Reserved
3 * 1999/2000 Mike Phillips (mikep@linuxtr.net)
4 *
5 * Linux driver for IBM PCI tokenring cards based on the Pit/Pit-Phy/Olympic
6 * chipset.
7 *
8 * Base Driver Skeleton:
9 * Written 1993-94 by Donald Becker.
10 *
11 * Copyright 1993 United States Government as represented by the
12 * Director, National Security Agency.
13 *
14 * Thanks to Erik De Cock, Adrian Bridgett and Frank Fiene for their
15 * assistance and perserverance with the testing of this driver.
16 *
17 * This software may be used and distributed according to the terms
18 * of the GNU General Public License, incorporated herein by reference.
19 *
20 * 4/27/99 - Alpha Release 0.1.0
21 * First release to the public
22 *
23 * 6/8/99 - Official Release 0.2.0
24 * Merged into the kernel code
25 * 8/18/99 - Updated driver for 2.3.13 kernel to use new pci
26 * resource. Driver also reports the card name returned by
27 * the pci resource.
28 * 1/11/00 - Added spinlocks for smp
29 * 2/23/00 - Updated to dev_kfree_irq
30 * 3/10/00 - Fixed FDX enable which triggered other bugs also
31 * squashed.
32 * 5/20/00 - Changes to handle Olympic on LinuxPPC. Endian changes.
33 * The odd thing about the changes is that the fix for
34 * endian issues with the big-endian data in the arb, asb...
35 * was to always swab() the bytes, no matter what CPU.
36 * That's because the read[wl]() functions always swap the
37 * bytes on the way in on PPC.
38 * Fixing the hardware descriptors was another matter,
39 * because they weren't going through read[wl](), there all
40 * the results had to be in memory in le32 values. kdaaker
41 *
42 * 12/23/00 - Added minimal Cardbus support (Thanks Donald).
43 *
44 * 03/09/01 - Add new pci api, dev_base_lock, general clean up.
45 *
46 * 03/27/01 - Add new dma pci (Thanks to Kyle Lucke) and alloc_trdev
47 * Change proc_fs behaviour, now one entry per adapter.
48 *
49 * 04/09/01 - Couple of bug fixes to the dma unmaps and ejecting the
50 * adapter when live does not take the system down with it.
51 *
52 * 06/02/01 - Clean up, copy skb for small packets
53 *
54 * 06/22/01 - Add EISR error handling routines
55 *
56 * 07/19/01 - Improve bad LAA reporting, strip out freemem
57 * into a separate function, its called from 3
58 * different places now.
59 * 02/09/02 - Replaced sleep_on.
60 * 03/01/02 - Replace access to several registers from 32 bit to
61 * 16 bit. Fixes alignment errors on PPC 64 bit machines.
62 * Thanks to Al Trautman for this one.
63 * 03/10/02 - Fix BUG in arb_cmd. Bug was there all along but was
64 * silently ignored until the error checking code
65 * went into version 1.0.0
66 * 06/04/02 - Add correct start up sequence for the cardbus adapters.
67 * Required for strict compliance with pci power mgmt specs.
68 * To Do:
69 *
70 * Wake on lan
71 *
72 * If Problems do Occur
73 * Most problems can be rectified by either closing and opening the interface
74 * (ifconfig down and up) or rmmod and insmod'ing the driver (a bit difficult
75 * if compiled into the kernel).
76 */
77
78/* Change OLYMPIC_DEBUG to 1 to get verbose, and I mean really verbose, messages */
79
80#define OLYMPIC_DEBUG 0
81
82
1da177e4
LT
83#include <linux/module.h>
84#include <linux/kernel.h>
85#include <linux/errno.h>
86#include <linux/timer.h>
87#include <linux/in.h>
88#include <linux/ioport.h>
89#include <linux/string.h>
90#include <linux/proc_fs.h>
91#include <linux/ptrace.h>
92#include <linux/skbuff.h>
93#include <linux/interrupt.h>
94#include <linux/delay.h>
95#include <linux/netdevice.h>
96#include <linux/trdevice.h>
97#include <linux/stddef.h>
98#include <linux/init.h>
99#include <linux/pci.h>
100#include <linux/spinlock.h>
101#include <linux/bitops.h>
ff5688ae 102#include <linux/jiffies.h>
1da177e4
LT
103
104#include <net/checksum.h>
457c4cbc 105#include <net/net_namespace.h>
1da177e4
LT
106
107#include <asm/io.h>
108#include <asm/system.h>
109
110#include "olympic.h"
111
112/* I've got to put some intelligence into the version number so that Peter and I know
113 * which version of the code somebody has got.
114 * Version Number = a.b.c.d where a.b.c is the level of code and d is the latest author.
115 * So 0.0.1.pds = Peter, 0.0.1.mlp = Mike
116 *
117 * Official releases will only have an a.b.c version number format.
118 */
119
e28e3a61 120static char version[] =
1da177e4
LT
121"Olympic.c v1.0.5 6/04/02 - Peter De Schrijver & Mike Phillips" ;
122
123static char *open_maj_error[] = {"No error", "Lobe Media Test", "Physical Insertion",
124 "Address Verification", "Neighbor Notification (Ring Poll)",
125 "Request Parameters","FDX Registration Request",
126 "FDX Duplicate Address Check", "Station registration Query Wait",
127 "Unknown stage"};
128
129static char *open_min_error[] = {"No error", "Function Failure", "Signal Lost", "Wire Fault",
130 "Ring Speed Mismatch", "Timeout","Ring Failure","Ring Beaconing",
131 "Duplicate Node Address","Request Parameters","Remove Received",
132 "Reserved", "Reserved", "No Monitor Detected for RPL",
133 "Monitor Contention failer for RPL", "FDX Protocol Error"};
134
135/* Module paramters */
136
137MODULE_AUTHOR("Mike Phillips <mikep@linuxtr.net>") ;
138MODULE_DESCRIPTION("Olympic PCI/Cardbus Chipset Driver") ;
139
140/* Ring Speed 0,4,16,100
141 * 0 = Autosense
142 * 4,16 = Selected speed only, no autosense
143 * This allows the card to be the first on the ring
144 * and become the active monitor.
145 * 100 = Nothing at present, 100mbps is autodetected
146 * if FDX is turned on. May be implemented in the future to
147 * fail if 100mpbs is not detected.
148 *
149 * WARNING: Some hubs will allow you to insert
150 * at the wrong speed
151 */
152
153static int ringspeed[OLYMPIC_MAX_ADAPTERS] = {0,} ;
154module_param_array(ringspeed, int, NULL, 0);
155
156/* Packet buffer size */
157
158static int pkt_buf_sz[OLYMPIC_MAX_ADAPTERS] = {0,} ;
159module_param_array(pkt_buf_sz, int, NULL, 0) ;
160
161/* Message Level */
162
163static int message_level[OLYMPIC_MAX_ADAPTERS] = {0,} ;
164module_param_array(message_level, int, NULL, 0) ;
165
166/* Change network_monitor to receive mac frames through the arb channel.
167 * Will also create a /proc/net/olympic_tr%d entry, where %d is the tr
168 * device, i.e. tr0, tr1 etc.
169 * Intended to be used to create a ring-error reporting network module
170 * i.e. it will give you the source address of beaconers on the ring
171 */
172static int network_monitor[OLYMPIC_MAX_ADAPTERS] = {0,};
173module_param_array(network_monitor, int, NULL, 0);
174
175static struct pci_device_id olympic_pci_tbl[] = {
176 {PCI_VENDOR_ID_IBM,PCI_DEVICE_ID_IBM_TR_WAKE,PCI_ANY_ID,PCI_ANY_ID,},
177 { } /* Terminating Entry */
178};
179MODULE_DEVICE_TABLE(pci,olympic_pci_tbl) ;
180
181
182static int olympic_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
183static int olympic_init(struct net_device *dev);
184static int olympic_open(struct net_device *dev);
185static int olympic_xmit(struct sk_buff *skb, struct net_device *dev);
186static int olympic_close(struct net_device *dev);
187static void olympic_set_rx_mode(struct net_device *dev);
188static void olympic_freemem(struct net_device *dev) ;
7d12e780 189static irqreturn_t olympic_interrupt(int irq, void *dev_id);
1da177e4
LT
190static struct net_device_stats * olympic_get_stats(struct net_device *dev);
191static int olympic_set_mac_address(struct net_device *dev, void *addr) ;
192static void olympic_arb_cmd(struct net_device *dev);
193static int olympic_change_mtu(struct net_device *dev, int mtu);
194static void olympic_srb_bh(struct net_device *dev) ;
195static void olympic_asb_bh(struct net_device *dev) ;
196static int olympic_proc_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data) ;
197
198static int __devinit olympic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
199{
200 struct net_device *dev ;
201 struct olympic_private *olympic_priv;
202 static int card_no = -1 ;
203 int i ;
204
205 card_no++ ;
206
207 if ((i = pci_enable_device(pdev))) {
208 return i ;
209 }
210
211 pci_set_master(pdev);
212
213 if ((i = pci_request_regions(pdev,"olympic"))) {
214 goto op_disable_dev;
215 }
216
217 dev = alloc_trdev(sizeof(struct olympic_private)) ;
218 if (!dev) {
219 i = -ENOMEM;
6d56ab93 220 goto op_release_dev;
1da177e4
LT
221 }
222
eda10531 223 olympic_priv = netdev_priv(dev) ;
1da177e4
LT
224
225 spin_lock_init(&olympic_priv->olympic_lock) ;
226
227 init_waitqueue_head(&olympic_priv->srb_wait);
228 init_waitqueue_head(&olympic_priv->trb_wait);
229#if OLYMPIC_DEBUG
eda10531 230 printk(KERN_INFO "pci_device: %p, dev:%p, dev->priv: %p\n", pdev, dev, netdev_priv(dev));
1da177e4
LT
231#endif
232 dev->irq=pdev->irq;
233 dev->base_addr=pci_resource_start(pdev, 0);
234 olympic_priv->olympic_card_name = pci_name(pdev);
235 olympic_priv->pdev = pdev;
236 olympic_priv->olympic_mmio = ioremap(pci_resource_start(pdev,1),256);
237 olympic_priv->olympic_lap = ioremap(pci_resource_start(pdev,2),2048);
238 if (!olympic_priv->olympic_mmio || !olympic_priv->olympic_lap) {
239 goto op_free_iomap;
240 }
241
242 if ((pkt_buf_sz[card_no] < 100) || (pkt_buf_sz[card_no] > 18000) )
243 olympic_priv->pkt_buf_sz = PKT_BUF_SZ ;
244 else
245 olympic_priv->pkt_buf_sz = pkt_buf_sz[card_no] ;
246
247 dev->mtu = olympic_priv->pkt_buf_sz - TR_HLEN ;
248 olympic_priv->olympic_ring_speed = ringspeed[card_no] ;
249 olympic_priv->olympic_message_level = message_level[card_no] ;
250 olympic_priv->olympic_network_monitor = network_monitor[card_no];
251
252 if ((i = olympic_init(dev))) {
253 goto op_free_iomap;
254 }
255
256 dev->open=&olympic_open;
257 dev->hard_start_xmit=&olympic_xmit;
258 dev->change_mtu=&olympic_change_mtu;
259 dev->stop=&olympic_close;
260 dev->do_ioctl=NULL;
261 dev->set_multicast_list=&olympic_set_rx_mode;
262 dev->get_stats=&olympic_get_stats ;
263 dev->set_mac_address=&olympic_set_mac_address ;
1da177e4
LT
264 SET_NETDEV_DEV(dev, &pdev->dev);
265
266 pci_set_drvdata(pdev,dev) ;
267 register_netdev(dev) ;
268 printk("Olympic: %s registered as: %s\n",olympic_priv->olympic_card_name,dev->name);
269 if (olympic_priv->olympic_network_monitor) { /* Must go after register_netdev as we need the device name */
270 char proc_name[20] ;
457c4cbc 271 strcpy(proc_name,"olympic_") ;
1da177e4 272 strcat(proc_name,dev->name) ;
457c4cbc 273 create_proc_read_entry(proc_name,0,init_net.proc_net,olympic_proc_info,(void *)dev) ;
1da177e4
LT
274 printk("Olympic: Network Monitor information: /proc/%s\n",proc_name);
275 }
276 return 0 ;
277
278op_free_iomap:
279 if (olympic_priv->olympic_mmio)
280 iounmap(olympic_priv->olympic_mmio);
281 if (olympic_priv->olympic_lap)
282 iounmap(olympic_priv->olympic_lap);
283
1da177e4 284 free_netdev(dev);
6d56ab93 285op_release_dev:
1da177e4
LT
286 pci_release_regions(pdev);
287
288op_disable_dev:
289 pci_disable_device(pdev);
290 return i;
291}
292
e28e3a61 293static int olympic_init(struct net_device *dev)
1da177e4
LT
294{
295 struct olympic_private *olympic_priv;
296 u8 __iomem *olympic_mmio, *init_srb,*adapter_addr;
297 unsigned long t;
298 unsigned int uaa_addr;
299
eda10531 300 olympic_priv=netdev_priv(dev);
1da177e4
LT
301 olympic_mmio=olympic_priv->olympic_mmio;
302
303 printk("%s \n", version);
304 printk("%s. I/O at %hx, MMIO at %p, LAP at %p, using irq %d\n", olympic_priv->olympic_card_name, (unsigned int) dev->base_addr,olympic_priv->olympic_mmio, olympic_priv->olympic_lap, dev->irq);
305
306 writel(readl(olympic_mmio+BCTL) | BCTL_SOFTRESET,olympic_mmio+BCTL);
307 t=jiffies;
308 while((readl(olympic_mmio+BCTL)) & BCTL_SOFTRESET) {
309 schedule();
ff5688ae 310 if(time_after(jiffies, t + 40*HZ)) {
1da177e4
LT
311 printk(KERN_ERR "IBM PCI tokenring card not responding.\n");
312 return -ENODEV;
313 }
314 }
315
316
317 /* Needed for cardbus */
318 if(!(readl(olympic_mmio+BCTL) & BCTL_MODE_INDICATOR)) {
319 writel(readl(olympic_priv->olympic_mmio+FERMASK)|FERMASK_INT_BIT, olympic_mmio+FERMASK);
320 }
321
322#if OLYMPIC_DEBUG
323 printk("BCTL: %x\n",readl(olympic_mmio+BCTL));
324 printk("GPR: %x\n",readw(olympic_mmio+GPR));
325 printk("SISRMASK: %x\n",readl(olympic_mmio+SISR_MASK));
326#endif
327 /* Aaaahhh, You have got to be real careful setting GPR, the card
328 holds the previous values from flash memory, including autosense
329 and ring speed */
330
331 writel(readl(olympic_mmio+BCTL)|BCTL_MIMREB,olympic_mmio+BCTL);
332
333 if (olympic_priv->olympic_ring_speed == 0) { /* Autosense */
334 writew(readw(olympic_mmio+GPR)|GPR_AUTOSENSE,olympic_mmio+GPR);
335 if (olympic_priv->olympic_message_level)
336 printk(KERN_INFO "%s: Ringspeed autosense mode on\n",olympic_priv->olympic_card_name);
337 } else if (olympic_priv->olympic_ring_speed == 16) {
338 if (olympic_priv->olympic_message_level)
339 printk(KERN_INFO "%s: Trying to open at 16 Mbps as requested\n", olympic_priv->olympic_card_name);
340 writew(GPR_16MBPS, olympic_mmio+GPR);
341 } else if (olympic_priv->olympic_ring_speed == 4) {
342 if (olympic_priv->olympic_message_level)
343 printk(KERN_INFO "%s: Trying to open at 4 Mbps as requested\n", olympic_priv->olympic_card_name) ;
344 writew(0, olympic_mmio+GPR);
345 }
346
347 writew(readw(olympic_mmio+GPR)|GPR_NEPTUNE_BF,olympic_mmio+GPR);
348
349#if OLYMPIC_DEBUG
350 printk("GPR = %x\n",readw(olympic_mmio + GPR) ) ;
351#endif
352 /* Solo has been paused to meet the Cardbus power
353 * specs if the adapter is cardbus. Check to
354 * see its been paused and then restart solo. The
355 * adapter should set the pause bit within 1 second.
356 */
357
358 if(!(readl(olympic_mmio+BCTL) & BCTL_MODE_INDICATOR)) {
359 t=jiffies;
b710b43c 360 while (!(readl(olympic_mmio+CLKCTL) & CLKCTL_PAUSE)) {
1da177e4 361 schedule() ;
ff5688ae 362 if(time_after(jiffies, t + 2*HZ)) {
1da177e4
LT
363 printk(KERN_ERR "IBM Cardbus tokenring adapter not responsing.\n") ;
364 return -ENODEV;
365 }
366 }
367 writel(readl(olympic_mmio+CLKCTL) & ~CLKCTL_PAUSE, olympic_mmio+CLKCTL) ;
368 }
369
370 /* start solo init */
371 writel((1<<15),olympic_mmio+SISR_MASK_SUM);
372
373 t=jiffies;
374 while(!((readl(olympic_mmio+SISR_RR)) & SISR_SRB_REPLY)) {
375 schedule();
ff5688ae 376 if(time_after(jiffies, t + 15*HZ)) {
1da177e4
LT
377 printk(KERN_ERR "IBM PCI tokenring card not responding.\n");
378 return -ENODEV;
379 }
380 }
381
382 writel(readw(olympic_mmio+LAPWWO),olympic_mmio+LAPA);
383
384#if OLYMPIC_DEBUG
385 printk("LAPWWO: %x, LAPA: %x\n",readl(olympic_mmio+LAPWWO), readl(olympic_mmio+LAPA));
386#endif
387
388 init_srb=olympic_priv->olympic_lap + ((readw(olympic_mmio+LAPWWO)) & (~0xf800));
389
390#if OLYMPIC_DEBUG
391{
392 int i;
393 printk("init_srb(%p): ",init_srb);
394 for(i=0;i<20;i++)
395 printk("%x ",readb(init_srb+i));
396 printk("\n");
397}
398#endif
399 if(readw(init_srb+6)) {
400 printk(KERN_INFO "tokenring card initialization failed. errorcode : %x\n",readw(init_srb+6));
401 return -ENODEV;
402 }
403
404 if (olympic_priv->olympic_message_level) {
405 if ( readb(init_srb +2) & 0x40) {
406 printk(KERN_INFO "Olympic: Adapter is FDX capable.\n") ;
407 } else {
408 printk(KERN_INFO "Olympic: Adapter cannot do FDX.\n");
409 }
410 }
411
412 uaa_addr=swab16(readw(init_srb+8));
413
414#if OLYMPIC_DEBUG
415 printk("UAA resides at %x\n",uaa_addr);
416#endif
417
418 writel(uaa_addr,olympic_mmio+LAPA);
419 adapter_addr=olympic_priv->olympic_lap + (uaa_addr & (~0xf800));
420
0795af57
JP
421 memcpy_fromio(&dev->dev_addr[0], adapter_addr,6);
422
1da177e4 423#if OLYMPIC_DEBUG
e174961c 424 printk("adapter address: %pM\n", dev->dev_addr);
1da177e4
LT
425#endif
426
1da177e4
LT
427 olympic_priv->olympic_addr_table_addr = swab16(readw(init_srb + 12));
428 olympic_priv->olympic_parms_addr = swab16(readw(init_srb + 14));
429
430 return 0;
431
432}
433
e28e3a61 434static int olympic_open(struct net_device *dev)
1da177e4 435{
eda10531 436 struct olympic_private *olympic_priv=netdev_priv(dev);
1da177e4
LT
437 u8 __iomem *olympic_mmio=olympic_priv->olympic_mmio,*init_srb;
438 unsigned long flags, t;
439 int i, open_finished = 1 ;
440 u8 resp, err;
441
442 DECLARE_WAITQUEUE(wait,current) ;
443
444 olympic_init(dev);
445
1fb9df5d 446 if(request_irq(dev->irq, &olympic_interrupt, IRQF_SHARED , "olympic", dev)) {
1da177e4
LT
447 return -EAGAIN;
448 }
449
450#if OLYMPIC_DEBUG
451 printk("BMCTL: %x\n",readl(olympic_mmio+BMCTL_SUM));
452 printk("pending ints: %x\n",readl(olympic_mmio+SISR_RR));
453#endif
454
455 writel(SISR_MI,olympic_mmio+SISR_MASK_SUM);
456
457 writel(SISR_MI | SISR_SRB_REPLY, olympic_mmio+SISR_MASK); /* more ints later, doesn't stop arb cmd interrupt */
458
459 writel(LISR_LIE,olympic_mmio+LISR); /* more ints later */
460
461 /* adapter is closed, so SRB is pointed to by LAPWWO */
462
463 writel(readw(olympic_mmio+LAPWWO),olympic_mmio+LAPA);
464 init_srb=olympic_priv->olympic_lap + ((readw(olympic_mmio+LAPWWO)) & (~0xf800));
465
466#if OLYMPIC_DEBUG
467 printk("LAPWWO: %x, LAPA: %x\n",readw(olympic_mmio+LAPWWO), readl(olympic_mmio+LAPA));
468 printk("SISR Mask = %04x\n", readl(olympic_mmio+SISR_MASK));
469 printk("Before the open command \n");
470#endif
471 do {
472 memset_io(init_srb,0,SRB_COMMAND_SIZE);
473
474 writeb(SRB_OPEN_ADAPTER,init_srb) ; /* open */
475 writeb(OLYMPIC_CLEAR_RET_CODE,init_srb+2);
476
477 /* If Network Monitor, instruct card to copy MAC frames through the ARB */
478 if (olympic_priv->olympic_network_monitor)
479 writew(swab16(OPEN_ADAPTER_ENABLE_FDX | OPEN_ADAPTER_PASS_ADC_MAC | OPEN_ADAPTER_PASS_ATT_MAC | OPEN_ADAPTER_PASS_BEACON), init_srb+8);
480 else
481 writew(swab16(OPEN_ADAPTER_ENABLE_FDX), init_srb+8);
482
483 /* Test OR of first 3 bytes as its totally possible for
484 * someone to set the first 2 bytes to be zero, although this
485 * is an error, the first byte must have bit 6 set to 1 */
486
487 if (olympic_priv->olympic_laa[0] | olympic_priv->olympic_laa[1] | olympic_priv->olympic_laa[2]) {
488 writeb(olympic_priv->olympic_laa[0],init_srb+12);
489 writeb(olympic_priv->olympic_laa[1],init_srb+13);
490 writeb(olympic_priv->olympic_laa[2],init_srb+14);
491 writeb(olympic_priv->olympic_laa[3],init_srb+15);
492 writeb(olympic_priv->olympic_laa[4],init_srb+16);
493 writeb(olympic_priv->olympic_laa[5],init_srb+17);
494 memcpy(dev->dev_addr,olympic_priv->olympic_laa,dev->addr_len) ;
495 }
496 writeb(1,init_srb+30);
497
498 spin_lock_irqsave(&olympic_priv->olympic_lock,flags);
499 olympic_priv->srb_queued=1;
500
501 writel(LISR_SRB_CMD,olympic_mmio+LISR_SUM);
502 spin_unlock_irqrestore(&olympic_priv->olympic_lock,flags);
503
504 t = jiffies ;
505
506 add_wait_queue(&olympic_priv->srb_wait,&wait) ;
507 set_current_state(TASK_INTERRUPTIBLE) ;
508
509 while(olympic_priv->srb_queued) {
510 schedule() ;
511 if(signal_pending(current)) {
512 printk(KERN_WARNING "%s: Signal received in open.\n",
513 dev->name);
514 printk(KERN_WARNING "SISR=%x LISR=%x\n",
515 readl(olympic_mmio+SISR),
516 readl(olympic_mmio+LISR));
517 olympic_priv->srb_queued=0;
518 break;
519 }
ff5688ae 520 if (time_after(jiffies, t + 10*HZ)) {
1da177e4
LT
521 printk(KERN_WARNING "%s: SRB timed out. \n",dev->name) ;
522 olympic_priv->srb_queued=0;
523 break ;
524 }
525 set_current_state(TASK_INTERRUPTIBLE) ;
526 }
527 remove_wait_queue(&olympic_priv->srb_wait,&wait) ;
528 set_current_state(TASK_RUNNING) ;
529 olympic_priv->srb_queued = 0 ;
530#if OLYMPIC_DEBUG
531 printk("init_srb(%p): ",init_srb);
532 for(i=0;i<20;i++)
533 printk("%02x ",readb(init_srb+i));
534 printk("\n");
535#endif
536
537 /* If we get the same return response as we set, the interrupt wasn't raised and the open
538 * timed out.
539 */
540
541 switch (resp = readb(init_srb+2)) {
542 case OLYMPIC_CLEAR_RET_CODE:
543 printk(KERN_WARNING "%s: Adapter Open time out or error.\n", dev->name) ;
544 goto out;
545 case 0:
546 open_finished = 1;
547 break;
548 case 0x07:
549 if (!olympic_priv->olympic_ring_speed && open_finished) { /* Autosense , first time around */
550 printk(KERN_WARNING "%s: Retrying at different ring speed \n", dev->name);
551 open_finished = 0 ;
552 continue;
553 }
554
555 err = readb(init_srb+7);
556
557 if (!olympic_priv->olympic_ring_speed && ((err & 0x0f) == 0x0d)) {
558 printk(KERN_WARNING "%s: Tried to autosense ring speed with no monitors present\n",dev->name);
559 printk(KERN_WARNING "%s: Please try again with a specified ring speed \n",dev->name);
560 } else {
561 printk(KERN_WARNING "%s: %s - %s\n", dev->name,
562 open_maj_error[(err & 0xf0) >> 4],
563 open_min_error[(err & 0x0f)]);
564 }
565 goto out;
566
567 case 0x32:
e174961c
JB
568 printk(KERN_WARNING "%s: Invalid LAA: %pM\n",
569 dev->name, olympic_priv->olympic_laa);
1da177e4
LT
570 goto out;
571
572 default:
573 printk(KERN_WARNING "%s: Bad OPEN response: %x\n", dev->name, resp);
574 goto out;
575
576 }
577 } while (!(open_finished)) ; /* Will only loop if ring speed mismatch re-open attempted && autosense is on */
578
579 if (readb(init_srb+18) & (1<<3))
580 if (olympic_priv->olympic_message_level)
581 printk(KERN_INFO "%s: Opened in FDX Mode\n",dev->name);
582
583 if (readb(init_srb+18) & (1<<1))
584 olympic_priv->olympic_ring_speed = 100 ;
585 else if (readb(init_srb+18) & 1)
586 olympic_priv->olympic_ring_speed = 16 ;
587 else
588 olympic_priv->olympic_ring_speed = 4 ;
589
590 if (olympic_priv->olympic_message_level)
591 printk(KERN_INFO "%s: Opened in %d Mbps mode\n",dev->name, olympic_priv->olympic_ring_speed);
592
593 olympic_priv->asb = swab16(readw(init_srb+8));
594 olympic_priv->srb = swab16(readw(init_srb+10));
595 olympic_priv->arb = swab16(readw(init_srb+12));
596 olympic_priv->trb = swab16(readw(init_srb+16));
597
598 olympic_priv->olympic_receive_options = 0x01 ;
599 olympic_priv->olympic_copy_all_options = 0 ;
600
601 /* setup rx ring */
602
603 writel((3<<16),olympic_mmio+BMCTL_RWM); /* Ensure end of frame generated interrupts */
604
605 writel(BMCTL_RX_DIS|3,olympic_mmio+BMCTL_RWM); /* Yes, this the enables RX channel */
606
607 for(i=0;i<OLYMPIC_RX_RING_SIZE;i++) {
608
609 struct sk_buff *skb;
610
611 skb=dev_alloc_skb(olympic_priv->pkt_buf_sz);
612 if(skb == NULL)
613 break;
614
615 skb->dev = dev;
616
617 olympic_priv->olympic_rx_ring[i].buffer = cpu_to_le32(pci_map_single(olympic_priv->pdev,
618 skb->data,olympic_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE)) ;
619 olympic_priv->olympic_rx_ring[i].res_length = cpu_to_le32(olympic_priv->pkt_buf_sz);
620 olympic_priv->rx_ring_skb[i]=skb;
621 }
622
623 if (i==0) {
624 printk(KERN_WARNING "%s: Not enough memory to allocate rx buffers. Adapter disabled\n",dev->name);
625 goto out;
626 }
627
628 olympic_priv->rx_ring_dma_addr = pci_map_single(olympic_priv->pdev,olympic_priv->olympic_rx_ring,
629 sizeof(struct olympic_rx_desc) * OLYMPIC_RX_RING_SIZE, PCI_DMA_TODEVICE);
630 writel(olympic_priv->rx_ring_dma_addr, olympic_mmio+RXDESCQ);
631 writel(olympic_priv->rx_ring_dma_addr, olympic_mmio+RXCDA);
632 writew(i, olympic_mmio+RXDESCQCNT);
633
634 olympic_priv->rx_status_ring_dma_addr = pci_map_single(olympic_priv->pdev, olympic_priv->olympic_rx_status_ring,
635 sizeof(struct olympic_rx_status) * OLYMPIC_RX_RING_SIZE, PCI_DMA_FROMDEVICE);
636 writel(olympic_priv->rx_status_ring_dma_addr, olympic_mmio+RXSTATQ);
637 writel(olympic_priv->rx_status_ring_dma_addr, olympic_mmio+RXCSA);
638
639 olympic_priv->rx_ring_last_received = OLYMPIC_RX_RING_SIZE - 1; /* last processed rx status */
640 olympic_priv->rx_status_last_received = OLYMPIC_RX_RING_SIZE - 1;
641
642 writew(i, olympic_mmio+RXSTATQCNT);
643
644#if OLYMPIC_DEBUG
645 printk("# of rx buffers: %d, RXENQ: %x\n",i, readw(olympic_mmio+RXENQ));
646 printk("RXCSA: %x, rx_status_ring[0]: %p\n",readl(olympic_mmio+RXCSA),&olympic_priv->olympic_rx_status_ring[0]);
647 printk(" stat_ring[1]: %p, stat_ring[2]: %p, stat_ring[3]: %p\n", &(olympic_priv->olympic_rx_status_ring[1]), &(olympic_priv->olympic_rx_status_ring[2]), &(olympic_priv->olympic_rx_status_ring[3]) );
648 printk(" stat_ring[4]: %p, stat_ring[5]: %p, stat_ring[6]: %p\n", &(olympic_priv->olympic_rx_status_ring[4]), &(olympic_priv->olympic_rx_status_ring[5]), &(olympic_priv->olympic_rx_status_ring[6]) );
649 printk(" stat_ring[7]: %p\n", &(olympic_priv->olympic_rx_status_ring[7]) );
650
651 printk("RXCDA: %x, rx_ring[0]: %p\n",readl(olympic_mmio+RXCDA),&olympic_priv->olympic_rx_ring[0]);
652 printk("Rx_ring_dma_addr = %08x, rx_status_dma_addr = %08x\n",
653 olympic_priv->rx_ring_dma_addr,olympic_priv->rx_status_ring_dma_addr) ;
654#endif
655
656 writew((((readw(olympic_mmio+RXENQ)) & 0x8000) ^ 0x8000) | i,olympic_mmio+RXENQ);
657
658#if OLYMPIC_DEBUG
659 printk("# of rx buffers: %d, RXENQ: %x\n",i, readw(olympic_mmio+RXENQ));
660 printk("RXCSA: %x, rx_ring[0]: %p\n",readl(olympic_mmio+RXCSA),&olympic_priv->olympic_rx_status_ring[0]);
661 printk("RXCDA: %x, rx_ring[0]: %p\n",readl(olympic_mmio+RXCDA),&olympic_priv->olympic_rx_ring[0]);
662#endif
663
664 writel(SISR_RX_STATUS | SISR_RX_NOBUF,olympic_mmio+SISR_MASK_SUM);
665
666 /* setup tx ring */
667
668 writel(BMCTL_TX1_DIS,olympic_mmio+BMCTL_RWM); /* Yes, this enables TX channel 1 */
669 for(i=0;i<OLYMPIC_TX_RING_SIZE;i++)
b710b43c 670 olympic_priv->olympic_tx_ring[i].buffer=cpu_to_le32(0xdeadbeef);
1da177e4
LT
671
672 olympic_priv->free_tx_ring_entries=OLYMPIC_TX_RING_SIZE;
673 olympic_priv->tx_ring_dma_addr = pci_map_single(olympic_priv->pdev,olympic_priv->olympic_tx_ring,
674 sizeof(struct olympic_tx_desc) * OLYMPIC_TX_RING_SIZE,PCI_DMA_TODEVICE) ;
675 writel(olympic_priv->tx_ring_dma_addr, olympic_mmio+TXDESCQ_1);
676 writel(olympic_priv->tx_ring_dma_addr, olympic_mmio+TXCDA_1);
677 writew(OLYMPIC_TX_RING_SIZE, olympic_mmio+TXDESCQCNT_1);
678
679 olympic_priv->tx_status_ring_dma_addr = pci_map_single(olympic_priv->pdev, olympic_priv->olympic_tx_status_ring,
680 sizeof(struct olympic_tx_status) * OLYMPIC_TX_RING_SIZE, PCI_DMA_FROMDEVICE);
681 writel(olympic_priv->tx_status_ring_dma_addr,olympic_mmio+TXSTATQ_1);
682 writel(olympic_priv->tx_status_ring_dma_addr,olympic_mmio+TXCSA_1);
683 writew(OLYMPIC_TX_RING_SIZE,olympic_mmio+TXSTATQCNT_1);
684
685 olympic_priv->tx_ring_free=0; /* next entry in tx ring to use */
686 olympic_priv->tx_ring_last_status=OLYMPIC_TX_RING_SIZE-1; /* last processed tx status */
687
688 writel(0xffffffff, olympic_mmio+EISR_RWM) ; /* clean the eisr */
689 writel(0,olympic_mmio+EISR) ;
690 writel(EISR_MASK_OPTIONS,olympic_mmio+EISR_MASK) ; /* enables most of the TX error interrupts */
691 writel(SISR_TX1_EOF | SISR_ADAPTER_CHECK | SISR_ARB_CMD | SISR_TRB_REPLY | SISR_ASB_FREE | SISR_ERR,olympic_mmio+SISR_MASK_SUM);
692
693#if OLYMPIC_DEBUG
694 printk("BMCTL: %x\n",readl(olympic_mmio+BMCTL_SUM));
695 printk("SISR MASK: %x\n",readl(olympic_mmio+SISR_MASK));
696#endif
697
698 if (olympic_priv->olympic_network_monitor) {
0795af57
JP
699 u8 __iomem *oat;
700 u8 __iomem *opt;
701 int i;
702 u8 addr[6];
0795af57
JP
703 oat = (olympic_priv->olympic_lap + olympic_priv->olympic_addr_table_addr);
704 opt = (olympic_priv->olympic_lap + olympic_priv->olympic_parms_addr);
705
706 for (i = 0; i < 6; i++)
707 addr[i] = readb(oat+offsetof(struct olympic_adapter_addr_table,node_addr)+i);
e174961c 708 printk("%s: Node Address: %pM\n", dev->name, addr);
1da177e4
LT
709 printk("%s: Functional Address: %02x:%02x:%02x:%02x\n",dev->name,
710 readb(oat+offsetof(struct olympic_adapter_addr_table,func_addr)),
711 readb(oat+offsetof(struct olympic_adapter_addr_table,func_addr)+1),
712 readb(oat+offsetof(struct olympic_adapter_addr_table,func_addr)+2),
713 readb(oat+offsetof(struct olympic_adapter_addr_table,func_addr)+3));
0795af57
JP
714
715 for (i = 0; i < 6; i++)
716 addr[i] = readb(opt+offsetof(struct olympic_parameters_table, up_node_addr)+i);
e174961c 717 printk("%s: NAUN Address: %pM\n", dev->name, addr);
1da177e4
LT
718 }
719
720 netif_start_queue(dev);
721 return 0;
722
723out:
724 free_irq(dev->irq, dev);
725 return -EIO;
726}
727
728/*
729 * When we enter the rx routine we do not know how many frames have been
730 * queued on the rx channel. Therefore we start at the next rx status
731 * position and travel around the receive ring until we have completed
732 * all the frames.
733 *
734 * This means that we may process the frame before we receive the end
735 * of frame interrupt. This is why we always test the status instead
736 * of blindly processing the next frame.
737 *
738 * We also remove the last 4 bytes from the packet as well, these are
739 * just token ring trailer info and upset protocols that don't check
740 * their own length, i.e. SNA.
741 *
742 */
743static void olympic_rx(struct net_device *dev)
744{
eda10531 745 struct olympic_private *olympic_priv=netdev_priv(dev);
1da177e4
LT
746 u8 __iomem *olympic_mmio=olympic_priv->olympic_mmio;
747 struct olympic_rx_status *rx_status;
748 struct olympic_rx_desc *rx_desc ;
749 int rx_ring_last_received,length, buffer_cnt, cpy_length, frag_len;
750 struct sk_buff *skb, *skb2;
751 int i;
752
753 rx_status=&(olympic_priv->olympic_rx_status_ring[(olympic_priv->rx_status_last_received + 1) & (OLYMPIC_RX_RING_SIZE - 1)]) ;
754
755 while (rx_status->status_buffercnt) {
756 u32 l_status_buffercnt;
757
758 olympic_priv->rx_status_last_received++ ;
759 olympic_priv->rx_status_last_received &= (OLYMPIC_RX_RING_SIZE -1);
760#if OLYMPIC_DEBUG
761 printk("rx status: %x rx len: %x \n", le32_to_cpu(rx_status->status_buffercnt), le32_to_cpu(rx_status->fragmentcnt_framelen));
762#endif
763 length = le32_to_cpu(rx_status->fragmentcnt_framelen) & 0xffff;
764 buffer_cnt = le32_to_cpu(rx_status->status_buffercnt) & 0xffff;
765 i = buffer_cnt ; /* Need buffer_cnt later for rxenq update */
766 frag_len = le32_to_cpu(rx_status->fragmentcnt_framelen) >> 16;
767
768#if OLYMPIC_DEBUG
769 printk("length: %x, frag_len: %x, buffer_cnt: %x\n", length, frag_len, buffer_cnt);
770#endif
771 l_status_buffercnt = le32_to_cpu(rx_status->status_buffercnt);
772 if(l_status_buffercnt & 0xC0000000) {
773 if (l_status_buffercnt & 0x3B000000) {
774 if (olympic_priv->olympic_message_level) {
775 if (l_status_buffercnt & (1<<29)) /* Rx Frame Truncated */
776 printk(KERN_WARNING "%s: Rx Frame Truncated \n",dev->name);
777 if (l_status_buffercnt & (1<<28)) /*Rx receive overrun */
778 printk(KERN_WARNING "%s: Rx Frame Receive overrun \n",dev->name);
779 if (l_status_buffercnt & (1<<27)) /* No receive buffers */
780 printk(KERN_WARNING "%s: No receive buffers \n",dev->name);
781 if (l_status_buffercnt & (1<<25)) /* Receive frame error detect */
782 printk(KERN_WARNING "%s: Receive frame error detect \n",dev->name);
783 if (l_status_buffercnt & (1<<24)) /* Received Error Detect */
784 printk(KERN_WARNING "%s: Received Error Detect \n",dev->name);
785 }
786 olympic_priv->rx_ring_last_received += i ;
787 olympic_priv->rx_ring_last_received &= (OLYMPIC_RX_RING_SIZE -1) ;
788 olympic_priv->olympic_stats.rx_errors++;
789 } else {
790
791 if (buffer_cnt == 1) {
792 skb = dev_alloc_skb(max_t(int, olympic_priv->pkt_buf_sz,length)) ;
793 } else {
794 skb = dev_alloc_skb(length) ;
795 }
796
797 if (skb == NULL) {
798 printk(KERN_WARNING "%s: Not enough memory to copy packet to upper layers. \n",dev->name) ;
799 olympic_priv->olympic_stats.rx_dropped++ ;
800 /* Update counters even though we don't transfer the frame */
801 olympic_priv->rx_ring_last_received += i ;
802 olympic_priv->rx_ring_last_received &= (OLYMPIC_RX_RING_SIZE -1) ;
803 } else {
1da177e4
LT
804 /* Optimise based upon number of buffers used.
805 If only one buffer is used we can simply swap the buffers around.
806 If more than one then we must use the new buffer and copy the information
807 first. Ideally all frames would be in a single buffer, this can be tuned by
808 altering the buffer size. If the length of the packet is less than
809 1500 bytes we're going to copy it over anyway to stop packets getting
810 dropped from sockets with buffers smaller than our pkt_buf_sz. */
811
812 if (buffer_cnt==1) {
813 olympic_priv->rx_ring_last_received++ ;
814 olympic_priv->rx_ring_last_received &= (OLYMPIC_RX_RING_SIZE -1);
815 rx_ring_last_received = olympic_priv->rx_ring_last_received ;
816 if (length > 1500) {
817 skb2=olympic_priv->rx_ring_skb[rx_ring_last_received] ;
818 /* unmap buffer */
819 pci_unmap_single(olympic_priv->pdev,
820 le32_to_cpu(olympic_priv->olympic_rx_ring[rx_ring_last_received].buffer),
821 olympic_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ;
822 skb_put(skb2,length-4);
823 skb2->protocol = tr_type_trans(skb2,dev);
824 olympic_priv->olympic_rx_ring[rx_ring_last_received].buffer =
825 cpu_to_le32(pci_map_single(olympic_priv->pdev, skb->data,
826 olympic_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE));
827 olympic_priv->olympic_rx_ring[rx_ring_last_received].res_length =
828 cpu_to_le32(olympic_priv->pkt_buf_sz);
829 olympic_priv->rx_ring_skb[rx_ring_last_received] = skb ;
830 netif_rx(skb2) ;
831 } else {
832 pci_dma_sync_single_for_cpu(olympic_priv->pdev,
833 le32_to_cpu(olympic_priv->olympic_rx_ring[rx_ring_last_received].buffer),
834 olympic_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ;
d626f62b
ACM
835 skb_copy_from_linear_data(olympic_priv->rx_ring_skb[rx_ring_last_received],
836 skb_put(skb,length - 4),
837 length - 4);
1da177e4
LT
838 pci_dma_sync_single_for_device(olympic_priv->pdev,
839 le32_to_cpu(olympic_priv->olympic_rx_ring[rx_ring_last_received].buffer),
840 olympic_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ;
841 skb->protocol = tr_type_trans(skb,dev) ;
842 netif_rx(skb) ;
843 }
844 } else {
845 do { /* Walk the buffers */
846 olympic_priv->rx_ring_last_received++ ;
847 olympic_priv->rx_ring_last_received &= (OLYMPIC_RX_RING_SIZE -1);
848 rx_ring_last_received = olympic_priv->rx_ring_last_received ;
849 pci_dma_sync_single_for_cpu(olympic_priv->pdev,
850 le32_to_cpu(olympic_priv->olympic_rx_ring[rx_ring_last_received].buffer),
851 olympic_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ;
852 rx_desc = &(olympic_priv->olympic_rx_ring[rx_ring_last_received]);
853 cpy_length = (i == 1 ? frag_len : le32_to_cpu(rx_desc->res_length));
d626f62b
ACM
854 skb_copy_from_linear_data(olympic_priv->rx_ring_skb[rx_ring_last_received],
855 skb_put(skb, cpy_length),
856 cpy_length);
1da177e4
LT
857 pci_dma_sync_single_for_device(olympic_priv->pdev,
858 le32_to_cpu(olympic_priv->olympic_rx_ring[rx_ring_last_received].buffer),
859 olympic_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ;
860 } while (--i) ;
861 skb_trim(skb,skb->len-4) ;
862 skb->protocol = tr_type_trans(skb,dev);
863 netif_rx(skb) ;
864 }
1da177e4
LT
865 olympic_priv->olympic_stats.rx_packets++ ;
866 olympic_priv->olympic_stats.rx_bytes += length ;
867 } /* if skb == null */
868 } /* If status & 0x3b */
869
870 } else { /*if buffercnt & 0xC */
871 olympic_priv->rx_ring_last_received += i ;
872 olympic_priv->rx_ring_last_received &= (OLYMPIC_RX_RING_SIZE - 1) ;
873 }
874
875 rx_status->fragmentcnt_framelen = 0 ;
876 rx_status->status_buffercnt = 0 ;
877 rx_status = &(olympic_priv->olympic_rx_status_ring[(olympic_priv->rx_status_last_received+1) & (OLYMPIC_RX_RING_SIZE -1) ]);
878
879 writew((((readw(olympic_mmio+RXENQ)) & 0x8000) ^ 0x8000) | buffer_cnt , olympic_mmio+RXENQ);
880 } /* while */
881
882}
883
884static void olympic_freemem(struct net_device *dev)
885{
eda10531 886 struct olympic_private *olympic_priv=netdev_priv(dev);
1da177e4
LT
887 int i;
888
889 for(i=0;i<OLYMPIC_RX_RING_SIZE;i++) {
890 if (olympic_priv->rx_ring_skb[olympic_priv->rx_status_last_received] != NULL) {
891 dev_kfree_skb_irq(olympic_priv->rx_ring_skb[olympic_priv->rx_status_last_received]);
892 olympic_priv->rx_ring_skb[olympic_priv->rx_status_last_received] = NULL;
893 }
b710b43c 894 if (olympic_priv->olympic_rx_ring[olympic_priv->rx_status_last_received].buffer != cpu_to_le32(0xdeadbeef)) {
1da177e4
LT
895 pci_unmap_single(olympic_priv->pdev,
896 le32_to_cpu(olympic_priv->olympic_rx_ring[olympic_priv->rx_status_last_received].buffer),
897 olympic_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE);
898 }
899 olympic_priv->rx_status_last_received++;
900 olympic_priv->rx_status_last_received&=OLYMPIC_RX_RING_SIZE-1;
901 }
902 /* unmap rings */
903 pci_unmap_single(olympic_priv->pdev, olympic_priv->rx_status_ring_dma_addr,
904 sizeof(struct olympic_rx_status) * OLYMPIC_RX_RING_SIZE, PCI_DMA_FROMDEVICE);
905 pci_unmap_single(olympic_priv->pdev, olympic_priv->rx_ring_dma_addr,
906 sizeof(struct olympic_rx_desc) * OLYMPIC_RX_RING_SIZE, PCI_DMA_TODEVICE);
907
908 pci_unmap_single(olympic_priv->pdev, olympic_priv->tx_status_ring_dma_addr,
909 sizeof(struct olympic_tx_status) * OLYMPIC_TX_RING_SIZE, PCI_DMA_FROMDEVICE);
910 pci_unmap_single(olympic_priv->pdev, olympic_priv->tx_ring_dma_addr,
911 sizeof(struct olympic_tx_desc) * OLYMPIC_TX_RING_SIZE, PCI_DMA_TODEVICE);
912
913 return ;
914}
915
7d12e780 916static irqreturn_t olympic_interrupt(int irq, void *dev_id)
1da177e4
LT
917{
918 struct net_device *dev= (struct net_device *)dev_id;
eda10531 919 struct olympic_private *olympic_priv=netdev_priv(dev);
1da177e4
LT
920 u8 __iomem *olympic_mmio=olympic_priv->olympic_mmio;
921 u32 sisr;
922 u8 __iomem *adapter_check_area ;
923
924 /*
925 * Read sisr but don't reset it yet.
926 * The indication bit may have been set but the interrupt latch
927 * bit may not be set, so we'd lose the interrupt later.
928 */
929 sisr=readl(olympic_mmio+SISR) ;
930 if (!(sisr & SISR_MI)) /* Interrupt isn't for us */
931 return IRQ_NONE;
932 sisr=readl(olympic_mmio+SISR_RR) ; /* Read & Reset sisr */
933
934 spin_lock(&olympic_priv->olympic_lock);
935
936 /* Hotswap gives us this on removal */
937 if (sisr == 0xffffffff) {
938 printk(KERN_WARNING "%s: Hotswap adapter removal.\n",dev->name) ;
939 spin_unlock(&olympic_priv->olympic_lock) ;
940 return IRQ_NONE;
941 }
942
943 if (sisr & (SISR_SRB_REPLY | SISR_TX1_EOF | SISR_RX_STATUS | SISR_ADAPTER_CHECK |
944 SISR_ASB_FREE | SISR_ARB_CMD | SISR_TRB_REPLY | SISR_RX_NOBUF | SISR_ERR)) {
945
946 /* If we ever get this the adapter is seriously dead. Only a reset is going to
947 * bring it back to life. We're talking pci bus errors and such like :( */
948 if((sisr & SISR_ERR) && (readl(olympic_mmio+EISR) & EISR_MASK_OPTIONS)) {
949 printk(KERN_ERR "Olympic: EISR Error, EISR=%08x\n",readl(olympic_mmio+EISR)) ;
950 printk(KERN_ERR "The adapter must be reset to clear this condition.\n") ;
951 printk(KERN_ERR "Please report this error to the driver maintainer and/\n") ;
952 printk(KERN_ERR "or the linux-tr mailing list.\n") ;
953 wake_up_interruptible(&olympic_priv->srb_wait);
954 spin_unlock(&olympic_priv->olympic_lock) ;
955 return IRQ_HANDLED;
956 } /* SISR_ERR */
957
958 if(sisr & SISR_SRB_REPLY) {
959 if(olympic_priv->srb_queued==1) {
960 wake_up_interruptible(&olympic_priv->srb_wait);
961 } else if (olympic_priv->srb_queued==2) {
962 olympic_srb_bh(dev) ;
963 }
964 olympic_priv->srb_queued=0;
965 } /* SISR_SRB_REPLY */
966
967 /* We shouldn't ever miss the Tx interrupt, but the you never know, hence the loop to ensure
968 we get all tx completions. */
969 if (sisr & SISR_TX1_EOF) {
970 while(olympic_priv->olympic_tx_status_ring[(olympic_priv->tx_ring_last_status + 1) & (OLYMPIC_TX_RING_SIZE-1)].status) {
971 olympic_priv->tx_ring_last_status++;
972 olympic_priv->tx_ring_last_status &= (OLYMPIC_TX_RING_SIZE-1);
973 olympic_priv->free_tx_ring_entries++;
974 olympic_priv->olympic_stats.tx_bytes += olympic_priv->tx_ring_skb[olympic_priv->tx_ring_last_status]->len;
975 olympic_priv->olympic_stats.tx_packets++ ;
976 pci_unmap_single(olympic_priv->pdev,
977 le32_to_cpu(olympic_priv->olympic_tx_ring[olympic_priv->tx_ring_last_status].buffer),
978 olympic_priv->tx_ring_skb[olympic_priv->tx_ring_last_status]->len,PCI_DMA_TODEVICE);
979 dev_kfree_skb_irq(olympic_priv->tx_ring_skb[olympic_priv->tx_ring_last_status]);
b710b43c 980 olympic_priv->olympic_tx_ring[olympic_priv->tx_ring_last_status].buffer=cpu_to_le32(0xdeadbeef);
1da177e4
LT
981 olympic_priv->olympic_tx_status_ring[olympic_priv->tx_ring_last_status].status=0;
982 }
983 netif_wake_queue(dev);
984 } /* SISR_TX1_EOF */
985
986 if (sisr & SISR_RX_STATUS) {
987 olympic_rx(dev);
988 } /* SISR_RX_STATUS */
989
990 if (sisr & SISR_ADAPTER_CHECK) {
991 netif_stop_queue(dev);
992 printk(KERN_WARNING "%s: Adapter Check Interrupt Raised, 8 bytes of information follow:\n", dev->name);
993 writel(readl(olympic_mmio+LAPWWC),olympic_mmio+LAPA);
994 adapter_check_area = olympic_priv->olympic_lap + ((readl(olympic_mmio+LAPWWC)) & (~0xf800)) ;
995 printk(KERN_WARNING "%s: Bytes %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n",dev->name, readb(adapter_check_area+0), readb(adapter_check_area+1), readb(adapter_check_area+2), readb(adapter_check_area+3), readb(adapter_check_area+4), readb(adapter_check_area+5), readb(adapter_check_area+6), readb(adapter_check_area+7)) ;
996 spin_unlock(&olympic_priv->olympic_lock) ;
997 return IRQ_HANDLED;
998 } /* SISR_ADAPTER_CHECK */
999
1000 if (sisr & SISR_ASB_FREE) {
1001 /* Wake up anything that is waiting for the asb response */
1002 if (olympic_priv->asb_queued) {
1003 olympic_asb_bh(dev) ;
1004 }
1005 } /* SISR_ASB_FREE */
1006
1007 if (sisr & SISR_ARB_CMD) {
1008 olympic_arb_cmd(dev) ;
1009 } /* SISR_ARB_CMD */
1010
1011 if (sisr & SISR_TRB_REPLY) {
1012 /* Wake up anything that is waiting for the trb response */
1013 if (olympic_priv->trb_queued) {
1014 wake_up_interruptible(&olympic_priv->trb_wait);
1015 }
1016 olympic_priv->trb_queued = 0 ;
1017 } /* SISR_TRB_REPLY */
1018
1019 if (sisr & SISR_RX_NOBUF) {
1020 /* According to the documentation, we don't have to do anything, but trapping it keeps it out of
1021 /var/log/messages. */
1022 } /* SISR_RX_NOBUF */
1023 } else {
1024 printk(KERN_WARNING "%s: Unexpected interrupt: %x\n",dev->name, sisr);
1025 printk(KERN_WARNING "%s: SISR_MASK: %x\n",dev->name, readl(olympic_mmio+SISR_MASK)) ;
1026 } /* One if the interrupts we want */
1027 writel(SISR_MI,olympic_mmio+SISR_MASK_SUM);
1028
1029 spin_unlock(&olympic_priv->olympic_lock) ;
1030 return IRQ_HANDLED;
1031}
1032
1033static int olympic_xmit(struct sk_buff *skb, struct net_device *dev)
1034{
eda10531 1035 struct olympic_private *olympic_priv=netdev_priv(dev);
1da177e4
LT
1036 u8 __iomem *olympic_mmio=olympic_priv->olympic_mmio;
1037 unsigned long flags ;
1038
1039 spin_lock_irqsave(&olympic_priv->olympic_lock, flags);
1040
1041 netif_stop_queue(dev);
1042
1043 if(olympic_priv->free_tx_ring_entries) {
1044 olympic_priv->olympic_tx_ring[olympic_priv->tx_ring_free].buffer =
1045 cpu_to_le32(pci_map_single(olympic_priv->pdev, skb->data, skb->len,PCI_DMA_TODEVICE));
1046 olympic_priv->olympic_tx_ring[olympic_priv->tx_ring_free].status_length = cpu_to_le32(skb->len | (0x80000000));
1047 olympic_priv->tx_ring_skb[olympic_priv->tx_ring_free]=skb;
1048 olympic_priv->free_tx_ring_entries--;
1049
1050 olympic_priv->tx_ring_free++;
1051 olympic_priv->tx_ring_free &= (OLYMPIC_TX_RING_SIZE-1);
1052 writew((((readw(olympic_mmio+TXENQ_1)) & 0x8000) ^ 0x8000) | 1,olympic_mmio+TXENQ_1);
1053 netif_wake_queue(dev);
1054 spin_unlock_irqrestore(&olympic_priv->olympic_lock,flags);
1055 return 0;
1056 } else {
1057 spin_unlock_irqrestore(&olympic_priv->olympic_lock,flags);
1058 return 1;
1059 }
1060
1061}
1062
1063
1064static int olympic_close(struct net_device *dev)
1065{
eda10531 1066 struct olympic_private *olympic_priv=netdev_priv(dev);
1da177e4
LT
1067 u8 __iomem *olympic_mmio=olympic_priv->olympic_mmio,*srb;
1068 unsigned long t,flags;
1069
1070 DECLARE_WAITQUEUE(wait,current) ;
1071
1072 netif_stop_queue(dev);
1073
1074 writel(olympic_priv->srb,olympic_mmio+LAPA);
1075 srb=olympic_priv->olympic_lap + (olympic_priv->srb & (~0xf800));
1076
1077 writeb(SRB_CLOSE_ADAPTER,srb+0);
1078 writeb(0,srb+1);
1079 writeb(OLYMPIC_CLEAR_RET_CODE,srb+2);
1080
1081 add_wait_queue(&olympic_priv->srb_wait,&wait) ;
1082 set_current_state(TASK_INTERRUPTIBLE) ;
1083
1084 spin_lock_irqsave(&olympic_priv->olympic_lock,flags);
1085 olympic_priv->srb_queued=1;
1086
1087 writel(LISR_SRB_CMD,olympic_mmio+LISR_SUM);
1088 spin_unlock_irqrestore(&olympic_priv->olympic_lock,flags);
1089
1090 while(olympic_priv->srb_queued) {
1091
3173c890 1092 t = schedule_timeout_interruptible(60*HZ);
1da177e4
LT
1093
1094 if(signal_pending(current)) {
1095 printk(KERN_WARNING "%s: SRB timed out.\n",dev->name);
1096 printk(KERN_WARNING "SISR=%x MISR=%x\n",readl(olympic_mmio+SISR),readl(olympic_mmio+LISR));
1097 olympic_priv->srb_queued=0;
1098 break;
1099 }
1100
1101 if (t == 0) {
1102 printk(KERN_WARNING "%s: SRB timed out. May not be fatal. \n",dev->name) ;
1103 }
1104 olympic_priv->srb_queued=0;
1105 }
1106 remove_wait_queue(&olympic_priv->srb_wait,&wait) ;
1107
1108 olympic_priv->rx_status_last_received++;
1109 olympic_priv->rx_status_last_received&=OLYMPIC_RX_RING_SIZE-1;
1110
1111 olympic_freemem(dev) ;
1112
1113 /* reset tx/rx fifo's and busmaster logic */
1114
1115 writel(readl(olympic_mmio+BCTL)|(3<<13),olympic_mmio+BCTL);
1116 udelay(1);
1117 writel(readl(olympic_mmio+BCTL)&~(3<<13),olympic_mmio+BCTL);
1118
1119#if OLYMPIC_DEBUG
1120 {
1121 int i ;
1122 printk("srb(%p): ",srb);
1123 for(i=0;i<4;i++)
1124 printk("%x ",readb(srb+i));
1125 printk("\n");
1126 }
1127#endif
1128 free_irq(dev->irq,dev);
1129
1130 return 0;
1131
1132}
1133
1134static void olympic_set_rx_mode(struct net_device *dev)
1135{
eda10531 1136 struct olympic_private *olympic_priv = netdev_priv(dev);
1da177e4
LT
1137 u8 __iomem *olympic_mmio = olympic_priv->olympic_mmio ;
1138 u8 options = 0;
1139 u8 __iomem *srb;
1140 struct dev_mc_list *dmi ;
1141 unsigned char dev_mc_address[4] ;
1142 int i ;
1143
1144 writel(olympic_priv->srb,olympic_mmio+LAPA);
1145 srb=olympic_priv->olympic_lap + (olympic_priv->srb & (~0xf800));
1146 options = olympic_priv->olympic_copy_all_options;
1147
1148 if (dev->flags&IFF_PROMISC)
1149 options |= 0x61 ;
1150 else
1151 options &= ~0x61 ;
1152
1153 /* Only issue the srb if there is a change in options */
1154
1155 if ((options ^ olympic_priv->olympic_copy_all_options)) {
1156
1157 /* Now to issue the srb command to alter the copy.all.options */
1158
1159 writeb(SRB_MODIFY_RECEIVE_OPTIONS,srb);
1160 writeb(0,srb+1);
1161 writeb(OLYMPIC_CLEAR_RET_CODE,srb+2);
1162 writeb(0,srb+3);
1163 writeb(olympic_priv->olympic_receive_options,srb+4);
1164 writeb(options,srb+5);
1165
1166 olympic_priv->srb_queued=2; /* Can't sleep, use srb_bh */
1167
1168 writel(LISR_SRB_CMD,olympic_mmio+LISR_SUM);
1169
1170 olympic_priv->olympic_copy_all_options = options ;
1171
1172 return ;
1173 }
1174
1175 /* Set the functional addresses we need for multicast */
1176
1177 dev_mc_address[0] = dev_mc_address[1] = dev_mc_address[2] = dev_mc_address[3] = 0 ;
1178
1179 for (i=0,dmi=dev->mc_list;i < dev->mc_count; i++,dmi = dmi->next) {
1180 dev_mc_address[0] |= dmi->dmi_addr[2] ;
1181 dev_mc_address[1] |= dmi->dmi_addr[3] ;
1182 dev_mc_address[2] |= dmi->dmi_addr[4] ;
1183 dev_mc_address[3] |= dmi->dmi_addr[5] ;
1184 }
1185
1186 writeb(SRB_SET_FUNC_ADDRESS,srb+0);
1187 writeb(0,srb+1);
1188 writeb(OLYMPIC_CLEAR_RET_CODE,srb+2);
1189 writeb(0,srb+3);
1190 writeb(0,srb+4);
1191 writeb(0,srb+5);
1192 writeb(dev_mc_address[0],srb+6);
1193 writeb(dev_mc_address[1],srb+7);
1194 writeb(dev_mc_address[2],srb+8);
1195 writeb(dev_mc_address[3],srb+9);
1196
1197 olympic_priv->srb_queued = 2 ;
1198 writel(LISR_SRB_CMD,olympic_mmio+LISR_SUM);
1199
1200}
1201
1202static void olympic_srb_bh(struct net_device *dev)
1203{
eda10531 1204 struct olympic_private *olympic_priv = netdev_priv(dev);
1da177e4
LT
1205 u8 __iomem *olympic_mmio = olympic_priv->olympic_mmio ;
1206 u8 __iomem *srb;
1207
1208 writel(olympic_priv->srb,olympic_mmio+LAPA);
1209 srb=olympic_priv->olympic_lap + (olympic_priv->srb & (~0xf800));
1210
1211 switch (readb(srb)) {
1212
1213 /* SRB_MODIFY_RECEIVE_OPTIONS i.e. set_multicast_list options (promiscuous)
1214 * At some point we should do something if we get an error, such as
1215 * resetting the IFF_PROMISC flag in dev
1216 */
1217
1218 case SRB_MODIFY_RECEIVE_OPTIONS:
1219 switch (readb(srb+2)) {
1220 case 0x01:
1221 printk(KERN_WARNING "%s: Unrecognized srb command\n",dev->name) ;
1222 break ;
1223 case 0x04:
1224 printk(KERN_WARNING "%s: Adapter must be open for this operation, doh!!\n",dev->name);
1225 break ;
1226 default:
1227 if (olympic_priv->olympic_message_level)
1228 printk(KERN_WARNING "%s: Receive Options Modified to %x,%x\n",dev->name,olympic_priv->olympic_copy_all_options, olympic_priv->olympic_receive_options) ;
1229 break ;
1230 } /* switch srb[2] */
1231 break ;
1232
1233 /* SRB_SET_GROUP_ADDRESS - Multicast group setting
1234 */
1235
1236 case SRB_SET_GROUP_ADDRESS:
1237 switch (readb(srb+2)) {
1238 case 0x00:
1239 break ;
1240 case 0x01:
1241 printk(KERN_WARNING "%s: Unrecognized srb command \n",dev->name) ;
1242 break ;
1243 case 0x04:
1244 printk(KERN_WARNING "%s: Adapter must be open for this operation, doh!!\n",dev->name);
1245 break ;
1246 case 0x3c:
1247 printk(KERN_WARNING "%s: Group/Functional address indicator bits not set correctly\n",dev->name) ;
1248 break ;
1249 case 0x3e: /* If we ever implement individual multicast addresses, will need to deal with this */
1250 printk(KERN_WARNING "%s: Group address registers full\n",dev->name) ;
1251 break ;
1252 case 0x55:
1253 printk(KERN_INFO "%s: Group Address already set.\n",dev->name) ;
1254 break ;
1255 default:
1256 break ;
1257 } /* switch srb[2] */
1258 break ;
1259
1260 /* SRB_RESET_GROUP_ADDRESS - Remove a multicast address from group list
1261 */
1262
1263 case SRB_RESET_GROUP_ADDRESS:
1264 switch (readb(srb+2)) {
1265 case 0x00:
1266 break ;
1267 case 0x01:
1268 printk(KERN_WARNING "%s: Unrecognized srb command \n",dev->name) ;
1269 break ;
1270 case 0x04:
1271 printk(KERN_WARNING "%s: Adapter must be open for this operation, doh!!\n",dev->name) ;
1272 break ;
1273 case 0x39: /* Must deal with this if individual multicast addresses used */
1274 printk(KERN_INFO "%s: Group address not found \n",dev->name);
1275 break ;
1276 default:
1277 break ;
1278 } /* switch srb[2] */
1279 break ;
1280
1281
1282 /* SRB_SET_FUNC_ADDRESS - Called by the set_rx_mode
1283 */
1284
1285 case SRB_SET_FUNC_ADDRESS:
1286 switch (readb(srb+2)) {
1287 case 0x00:
1288 if (olympic_priv->olympic_message_level)
1289 printk(KERN_INFO "%s: Functional Address Mask Set \n",dev->name) ;
1290 break ;
1291 case 0x01:
1292 printk(KERN_WARNING "%s: Unrecognized srb command \n",dev->name) ;
1293 break ;
1294 case 0x04:
1295 printk(KERN_WARNING "%s: Adapter must be open for this operation, doh!!\n",dev->name) ;
1296 break ;
1297 default:
1298 break ;
1299 } /* switch srb[2] */
1300 break ;
1301
1302 /* SRB_READ_LOG - Read and reset the adapter error counters
1303 */
1304
1305 case SRB_READ_LOG:
1306 switch (readb(srb+2)) {
1307 case 0x00:
1308 if (olympic_priv->olympic_message_level)
1309 printk(KERN_INFO "%s: Read Log issued\n",dev->name) ;
1310 break ;
1311 case 0x01:
1312 printk(KERN_WARNING "%s: Unrecognized srb command \n",dev->name) ;
1313 break ;
1314 case 0x04:
1315 printk(KERN_WARNING "%s: Adapter must be open for this operation, doh!!\n",dev->name) ;
1316 break ;
1317
1318 } /* switch srb[2] */
1319 break ;
1320
1321 /* SRB_READ_SR_COUNTERS - Read and reset the source routing bridge related counters */
1322
1323 case SRB_READ_SR_COUNTERS:
1324 switch (readb(srb+2)) {
1325 case 0x00:
1326 if (olympic_priv->olympic_message_level)
1327 printk(KERN_INFO "%s: Read Source Routing Counters issued\n",dev->name) ;
1328 break ;
1329 case 0x01:
1330 printk(KERN_WARNING "%s: Unrecognized srb command \n",dev->name) ;
1331 break ;
1332 case 0x04:
1333 printk(KERN_WARNING "%s: Adapter must be open for this operation, doh!!\n",dev->name) ;
1334 break ;
1335 default:
1336 break ;
1337 } /* switch srb[2] */
1338 break ;
1339
1340 default:
1341 printk(KERN_WARNING "%s: Unrecognized srb bh return value.\n",dev->name);
1342 break ;
1343 } /* switch srb[0] */
1344
1345}
1346
1347static struct net_device_stats * olympic_get_stats(struct net_device *dev)
1348{
1349 struct olympic_private *olympic_priv ;
eda10531 1350 olympic_priv=netdev_priv(dev);
1da177e4
LT
1351 return (struct net_device_stats *) &olympic_priv->olympic_stats;
1352}
1353
1354static int olympic_set_mac_address (struct net_device *dev, void *addr)
1355{
1356 struct sockaddr *saddr = addr ;
eda10531 1357 struct olympic_private *olympic_priv = netdev_priv(dev);
1da177e4
LT
1358
1359 if (netif_running(dev)) {
1360 printk(KERN_WARNING "%s: Cannot set mac/laa address while card is open\n", dev->name) ;
1361 return -EIO ;
1362 }
1363
1364 memcpy(olympic_priv->olympic_laa, saddr->sa_data,dev->addr_len) ;
1365
1366 if (olympic_priv->olympic_message_level) {
1367 printk(KERN_INFO "%s: MAC/LAA Set to = %x.%x.%x.%x.%x.%x\n",dev->name, olympic_priv->olympic_laa[0],
1368 olympic_priv->olympic_laa[1], olympic_priv->olympic_laa[2],
1369 olympic_priv->olympic_laa[3], olympic_priv->olympic_laa[4],
1370 olympic_priv->olympic_laa[5]);
1371 }
1372
1373 return 0 ;
1374}
1375
1376static void olympic_arb_cmd(struct net_device *dev)
1377{
eda10531 1378 struct olympic_private *olympic_priv = netdev_priv(dev);
1da177e4
LT
1379 u8 __iomem *olympic_mmio=olympic_priv->olympic_mmio;
1380 u8 __iomem *arb_block, *asb_block, *srb ;
1381 u8 header_len ;
1382 u16 frame_len, buffer_len ;
1383 struct sk_buff *mac_frame ;
1384 u8 __iomem *buf_ptr ;
1385 u8 __iomem *frame_data ;
1386 u16 buff_off ;
1387 u16 lan_status = 0, lan_status_diff ; /* Initialize to stop compiler warning */
1388 u8 fdx_prot_error ;
1389 u16 next_ptr;
1390
1391 arb_block = (olympic_priv->olympic_lap + olympic_priv->arb) ;
1392 asb_block = (olympic_priv->olympic_lap + olympic_priv->asb) ;
1393 srb = (olympic_priv->olympic_lap + olympic_priv->srb) ;
1394
1395 if (readb(arb_block+0) == ARB_RECEIVE_DATA) { /* Receive.data, MAC frames */
1396
1397 header_len = readb(arb_block+8) ; /* 802.5 Token-Ring Header Length */
1398 frame_len = swab16(readw(arb_block + 10)) ;
1399
1400 buff_off = swab16(readw(arb_block + 6)) ;
1401
1402 buf_ptr = olympic_priv->olympic_lap + buff_off ;
1403
1404#if OLYMPIC_DEBUG
1405{
1406 int i;
1407 frame_data = buf_ptr+offsetof(struct mac_receive_buffer,frame_data) ;
1408
1409 for (i=0 ; i < 14 ; i++) {
1410 printk("Loc %d = %02x\n",i,readb(frame_data + i));
1411 }
1412
1413 printk("next %04x, fs %02x, len %04x \n",readw(buf_ptr+offsetof(struct mac_receive_buffer,next)), readb(buf_ptr+offsetof(struct mac_receive_buffer,frame_status)), readw(buf_ptr+offsetof(struct mac_receive_buffer,buffer_length)));
1414}
1415#endif
1416 mac_frame = dev_alloc_skb(frame_len) ;
1417 if (!mac_frame) {
1418 printk(KERN_WARNING "%s: Memory squeeze, dropping frame.\n", dev->name);
1419 goto drop_frame;
1420 }
1421
1422 /* Walk the buffer chain, creating the frame */
1423
1424 do {
1425 frame_data = buf_ptr+offsetof(struct mac_receive_buffer,frame_data) ;
1426 buffer_len = swab16(readw(buf_ptr+offsetof(struct mac_receive_buffer,buffer_length)));
1427 memcpy_fromio(skb_put(mac_frame, buffer_len), frame_data , buffer_len ) ;
1428 next_ptr=readw(buf_ptr+offsetof(struct mac_receive_buffer,next));
b710b43c 1429 } while (next_ptr && (buf_ptr=olympic_priv->olympic_lap + swab16(next_ptr)));
1da177e4 1430
c1a4b86e
ACM
1431 mac_frame->protocol = tr_type_trans(mac_frame, dev);
1432
1da177e4 1433 if (olympic_priv->olympic_network_monitor) {
0795af57 1434 struct trh_hdr *mac_hdr;
0795af57 1435 printk(KERN_WARNING "%s: Received MAC Frame, details: \n",dev->name);
c1a4b86e 1436 mac_hdr = tr_hdr(mac_frame);
e174961c
JB
1437 printk(KERN_WARNING "%s: MAC Frame Dest. Addr: %pM\n",
1438 dev->name, mac_hdr->daddr);
1439 printk(KERN_WARNING "%s: MAC Frame Srce. Addr: %pM\n",
1440 dev->name, mac_hdr->saddr);
1da177e4 1441 }
c1a4b86e 1442 netif_rx(mac_frame);
1da177e4
LT
1443
1444drop_frame:
1445 /* Now tell the card we have dealt with the received frame */
1446
1447 /* Set LISR Bit 1 */
1448 writel(LISR_ARB_FREE,olympic_priv->olympic_mmio + LISR_SUM);
1449
1450 /* Is the ASB free ? */
1451
1452 if (readb(asb_block + 2) != 0xff) {
1453 olympic_priv->asb_queued = 1 ;
1454 writel(LISR_ASB_FREE_REQ,olympic_priv->olympic_mmio+LISR_SUM);
1455 return ;
1456 /* Drop out and wait for the bottom half to be run */
1457 }
1458
1459 writeb(ASB_RECEIVE_DATA,asb_block); /* Receive data */
1460 writeb(OLYMPIC_CLEAR_RET_CODE,asb_block+2); /* Necessary ?? */
1461 writeb(readb(arb_block+6),asb_block+6); /* Must send the address back to the adapter */
1462 writeb(readb(arb_block+7),asb_block+7); /* To let it know we have dealt with the data */
1463
1464 writel(LISR_ASB_REPLY | LISR_ASB_FREE_REQ,olympic_priv->olympic_mmio+LISR_SUM);
1465
1466 olympic_priv->asb_queued = 2 ;
1467
1468 return ;
1469
1470 } else if (readb(arb_block) == ARB_LAN_CHANGE_STATUS) { /* Lan.change.status */
1471 lan_status = swab16(readw(arb_block+6));
1472 fdx_prot_error = readb(arb_block+8) ;
1473
1474 /* Issue ARB Free */
1475 writel(LISR_ARB_FREE,olympic_priv->olympic_mmio+LISR_SUM);
1476
1477 lan_status_diff = olympic_priv->olympic_lan_status ^ lan_status ;
1478
1479 if (lan_status_diff & (LSC_LWF | LSC_ARW | LSC_FPE | LSC_RR) ) {
1480 if (lan_status_diff & LSC_LWF)
1481 printk(KERN_WARNING "%s: Short circuit detected on the lobe\n",dev->name);
1482 if (lan_status_diff & LSC_ARW)
1483 printk(KERN_WARNING "%s: Auto removal error\n",dev->name);
1484 if (lan_status_diff & LSC_FPE)
1485 printk(KERN_WARNING "%s: FDX Protocol Error\n",dev->name);
1486 if (lan_status_diff & LSC_RR)
1487 printk(KERN_WARNING "%s: Force remove MAC frame received\n",dev->name);
1488
1489 /* Adapter has been closed by the hardware */
1490
1491 /* reset tx/rx fifo's and busmaster logic */
1492
1493 writel(readl(olympic_mmio+BCTL)|(3<<13),olympic_mmio+BCTL);
1494 udelay(1);
1495 writel(readl(olympic_mmio+BCTL)&~(3<<13),olympic_mmio+BCTL);
1496 netif_stop_queue(dev);
1497 olympic_priv->srb = readw(olympic_priv->olympic_lap + LAPWWO) ;
1498 printk(KERN_WARNING "%s: Adapter has been closed \n", dev->name) ;
1499 } /* If serious error */
1500
1501 if (olympic_priv->olympic_message_level) {
1502 if (lan_status_diff & LSC_SIG_LOSS)
1503 printk(KERN_WARNING "%s: No receive signal detected \n", dev->name) ;
1504 if (lan_status_diff & LSC_HARD_ERR)
1505 printk(KERN_INFO "%s: Beaconing \n",dev->name);
1506 if (lan_status_diff & LSC_SOFT_ERR)
1507 printk(KERN_WARNING "%s: Adapter transmitted Soft Error Report Mac Frame \n",dev->name);
1508 if (lan_status_diff & LSC_TRAN_BCN)
1509 printk(KERN_INFO "%s: We are tranmitting the beacon, aaah\n",dev->name);
1510 if (lan_status_diff & LSC_SS)
1511 printk(KERN_INFO "%s: Single Station on the ring \n", dev->name);
1512 if (lan_status_diff & LSC_RING_REC)
1513 printk(KERN_INFO "%s: Ring recovery ongoing\n",dev->name);
1514 if (lan_status_diff & LSC_FDX_MODE)
1515 printk(KERN_INFO "%s: Operating in FDX mode\n",dev->name);
1516 }
1517
1518 if (lan_status_diff & LSC_CO) {
1519
1520 if (olympic_priv->olympic_message_level)
1521 printk(KERN_INFO "%s: Counter Overflow \n", dev->name);
1522
1523 /* Issue READ.LOG command */
1524
1525 writeb(SRB_READ_LOG, srb);
1526 writeb(0,srb+1);
1527 writeb(OLYMPIC_CLEAR_RET_CODE,srb+2);
1528 writeb(0,srb+3);
1529 writeb(0,srb+4);
1530 writeb(0,srb+5);
1531
1532 olympic_priv->srb_queued=2; /* Can't sleep, use srb_bh */
1533
1534 writel(LISR_SRB_CMD,olympic_mmio+LISR_SUM);
1535
1536 }
1537
1538 if (lan_status_diff & LSC_SR_CO) {
1539
1540 if (olympic_priv->olympic_message_level)
1541 printk(KERN_INFO "%s: Source routing counters overflow\n", dev->name);
1542
1543 /* Issue a READ.SR.COUNTERS */
1544
1545 writeb(SRB_READ_SR_COUNTERS,srb);
1546 writeb(0,srb+1);
1547 writeb(OLYMPIC_CLEAR_RET_CODE,srb+2);
1548 writeb(0,srb+3);
1549
1550 olympic_priv->srb_queued=2; /* Can't sleep, use srb_bh */
1551
1552 writel(LISR_SRB_CMD,olympic_mmio+LISR_SUM);
1553
1554 }
1555
1556 olympic_priv->olympic_lan_status = lan_status ;
1557
1558 } /* Lan.change.status */
1559 else
1560 printk(KERN_WARNING "%s: Unknown arb command \n", dev->name);
1561}
1562
1563static void olympic_asb_bh(struct net_device *dev)
1564{
eda10531 1565 struct olympic_private *olympic_priv = netdev_priv(dev);
1da177e4
LT
1566 u8 __iomem *arb_block, *asb_block ;
1567
1568 arb_block = (olympic_priv->olympic_lap + olympic_priv->arb) ;
1569 asb_block = (olympic_priv->olympic_lap + olympic_priv->asb) ;
1570
1571 if (olympic_priv->asb_queued == 1) { /* Dropped through the first time */
1572
1573 writeb(ASB_RECEIVE_DATA,asb_block); /* Receive data */
1574 writeb(OLYMPIC_CLEAR_RET_CODE,asb_block+2); /* Necessary ?? */
1575 writeb(readb(arb_block+6),asb_block+6); /* Must send the address back to the adapter */
1576 writeb(readb(arb_block+7),asb_block+7); /* To let it know we have dealt with the data */
1577
1578 writel(LISR_ASB_REPLY | LISR_ASB_FREE_REQ,olympic_priv->olympic_mmio+LISR_SUM);
1579 olympic_priv->asb_queued = 2 ;
1580
1581 return ;
1582 }
1583
1584 if (olympic_priv->asb_queued == 2) {
1585 switch (readb(asb_block+2)) {
1586 case 0x01:
1587 printk(KERN_WARNING "%s: Unrecognized command code \n", dev->name);
1588 break ;
1589 case 0x26:
1590 printk(KERN_WARNING "%s: Unrecognized buffer address \n", dev->name);
1591 break ;
1592 case 0xFF:
1593 /* Valid response, everything should be ok again */
1594 break ;
1595 default:
1596 printk(KERN_WARNING "%s: Invalid return code in asb\n",dev->name);
1597 break ;
1598 }
1599 }
1600 olympic_priv->asb_queued = 0 ;
1601}
1602
1603static int olympic_change_mtu(struct net_device *dev, int mtu)
1604{
eda10531 1605 struct olympic_private *olympic_priv = netdev_priv(dev);
1da177e4
LT
1606 u16 max_mtu ;
1607
1608 if (olympic_priv->olympic_ring_speed == 4)
1609 max_mtu = 4500 ;
1610 else
1611 max_mtu = 18000 ;
1612
1613 if (mtu > max_mtu)
1614 return -EINVAL ;
1615 if (mtu < 100)
1616 return -EINVAL ;
1617
1618 dev->mtu = mtu ;
1619 olympic_priv->pkt_buf_sz = mtu + TR_HLEN ;
1620
1621 return 0 ;
1622}
1623
1624static int olympic_proc_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data)
1625{
1626 struct net_device *dev = (struct net_device *)data ;
eda10531 1627 struct olympic_private *olympic_priv=netdev_priv(dev);
1da177e4
LT
1628 u8 __iomem *oat = (olympic_priv->olympic_lap + olympic_priv->olympic_addr_table_addr) ;
1629 u8 __iomem *opt = (olympic_priv->olympic_lap + olympic_priv->olympic_parms_addr) ;
1630 int size = 0 ;
1631 int len=0;
1632 off_t begin=0;
1633 off_t pos=0;
0795af57
JP
1634 u8 addr[6];
1635 u8 addr2[6];
1636 int i;
0795af57 1637
1da177e4
LT
1638 size = sprintf(buffer,
1639 "IBM Pit/Pit-Phy/Olympic Chipset Token Ring Adapter %s\n",dev->name);
1640 size += sprintf(buffer+size, "\n%6s: Adapter Address : Node Address : Functional Addr\n",
1641 dev->name);
1642
0795af57
JP
1643 for (i = 0 ; i < 6 ; i++)
1644 addr[i] = readb(oat+offsetof(struct olympic_adapter_addr_table,node_addr) + i);
1645
e174961c 1646 size += sprintf(buffer+size, "%6s: %pM : %pM : %02x:%02x:%02x:%02x\n",
1da177e4 1647 dev->name,
e174961c 1648 dev->dev_addr, addr,
1da177e4
LT
1649 readb(oat+offsetof(struct olympic_adapter_addr_table,func_addr)),
1650 readb(oat+offsetof(struct olympic_adapter_addr_table,func_addr)+1),
1651 readb(oat+offsetof(struct olympic_adapter_addr_table,func_addr)+2),
1652 readb(oat+offsetof(struct olympic_adapter_addr_table,func_addr)+3));
1653
1654 size += sprintf(buffer+size, "\n%6s: Token Ring Parameters Table:\n", dev->name);
1655
1656 size += sprintf(buffer+size, "%6s: Physical Addr : Up Node Address : Poll Address : AccPri : Auth Src : Att Code :\n",
1657 dev->name) ;
0795af57
JP
1658
1659 for (i = 0 ; i < 6 ; i++)
1660 addr[i] = readb(opt+offsetof(struct olympic_parameters_table, up_node_addr) + i);
1661 for (i = 0 ; i < 6 ; i++)
1662 addr2[i] = readb(opt+offsetof(struct olympic_parameters_table, poll_addr) + i);
1663
e174961c 1664 size += sprintf(buffer+size, "%6s: %02x:%02x:%02x:%02x : %pM : %pM : %04x : %04x : %04x :\n",
1da177e4
LT
1665 dev->name,
1666 readb(opt+offsetof(struct olympic_parameters_table, phys_addr)),
1667 readb(opt+offsetof(struct olympic_parameters_table, phys_addr)+1),
1668 readb(opt+offsetof(struct olympic_parameters_table, phys_addr)+2),
1669 readb(opt+offsetof(struct olympic_parameters_table, phys_addr)+3),
e174961c 1670 addr, addr2,
1da177e4
LT
1671 swab16(readw(opt+offsetof(struct olympic_parameters_table, acc_priority))),
1672 swab16(readw(opt+offsetof(struct olympic_parameters_table, auth_source_class))),
1673 swab16(readw(opt+offsetof(struct olympic_parameters_table, att_code))));
1674
1675 size += sprintf(buffer+size, "%6s: Source Address : Bcn T : Maj. V : Lan St : Lcl Rg : Mon Err : Frame Correl : \n",
1676 dev->name) ;
1677
0795af57
JP
1678 for (i = 0 ; i < 6 ; i++)
1679 addr[i] = readb(opt+offsetof(struct olympic_parameters_table, source_addr) + i);
e174961c
JB
1680 size += sprintf(buffer+size, "%6s: %pM : %04x : %04x : %04x : %04x : %04x : %04x : \n",
1681 dev->name, addr,
1da177e4
LT
1682 swab16(readw(opt+offsetof(struct olympic_parameters_table, beacon_type))),
1683 swab16(readw(opt+offsetof(struct olympic_parameters_table, major_vector))),
1684 swab16(readw(opt+offsetof(struct olympic_parameters_table, lan_status))),
1685 swab16(readw(opt+offsetof(struct olympic_parameters_table, local_ring))),
1686 swab16(readw(opt+offsetof(struct olympic_parameters_table, mon_error))),
1687 swab16(readw(opt+offsetof(struct olympic_parameters_table, frame_correl))));
1688
1689 size += sprintf(buffer+size, "%6s: Beacon Details : Tx : Rx : NAUN Node Address : NAUN Node Phys : \n",
1690 dev->name) ;
1691
0795af57
JP
1692 for (i = 0 ; i < 6 ; i++)
1693 addr[i] = readb(opt+offsetof(struct olympic_parameters_table, beacon_naun) + i);
e174961c 1694 size += sprintf(buffer+size, "%6s: : %02x : %02x : %pM : %02x:%02x:%02x:%02x : \n",
1da177e4
LT
1695 dev->name,
1696 swab16(readw(opt+offsetof(struct olympic_parameters_table, beacon_transmit))),
1697 swab16(readw(opt+offsetof(struct olympic_parameters_table, beacon_receive))),
e174961c 1698 addr,
1da177e4
LT
1699 readb(opt+offsetof(struct olympic_parameters_table, beacon_phys)),
1700 readb(opt+offsetof(struct olympic_parameters_table, beacon_phys)+1),
1701 readb(opt+offsetof(struct olympic_parameters_table, beacon_phys)+2),
1702 readb(opt+offsetof(struct olympic_parameters_table, beacon_phys)+3));
1703
1704 len=size;
1705 pos=begin+size;
1706 if (pos<offset) {
1707 len=0;
1708 begin=pos;
1709 }
1710 *start=buffer+(offset-begin); /* Start of wanted data */
1711 len-=(offset-begin); /* Start slop */
1712 if(len>length)
1713 len=length; /* Ending slop */
1714 return len;
1715}
1716
1717static void __devexit olympic_remove_one(struct pci_dev *pdev)
1718{
1719 struct net_device *dev = pci_get_drvdata(pdev) ;
eda10531 1720 struct olympic_private *olympic_priv=netdev_priv(dev);
1da177e4
LT
1721
1722 if (olympic_priv->olympic_network_monitor) {
1723 char proc_name[20] ;
457c4cbc 1724 strcpy(proc_name,"olympic_") ;
1da177e4 1725 strcat(proc_name,dev->name) ;
457c4cbc 1726 remove_proc_entry(proc_name,init_net.proc_net);
1da177e4
LT
1727 }
1728 unregister_netdev(dev) ;
1729 iounmap(olympic_priv->olympic_mmio) ;
1730 iounmap(olympic_priv->olympic_lap) ;
1731 pci_release_regions(pdev) ;
1732 pci_set_drvdata(pdev,NULL) ;
1733 free_netdev(dev) ;
1734}
1735
1736static struct pci_driver olympic_driver = {
1737 .name = "olympic",
1738 .id_table = olympic_pci_tbl,
1739 .probe = olympic_probe,
1740 .remove = __devexit_p(olympic_remove_one),
1741};
1742
1743static int __init olympic_pci_init(void)
1744{
83717cf0 1745 return pci_register_driver(&olympic_driver) ;
1da177e4
LT
1746}
1747
1748static void __exit olympic_pci_cleanup(void)
1749{
1750 pci_unregister_driver(&olympic_driver) ;
1751}
1752
1753
1754module_init(olympic_pci_init) ;
1755module_exit(olympic_pci_cleanup) ;
1756
1757MODULE_LICENSE("GPL");