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Tsi108_eth: fix link recovery after disconnect
[mirror_ubuntu-bionic-kernel.git] / drivers / net / tsi108_eth.c
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5e123b84
ZR		 1/*******************************************************************************
2
3 Copyright(c) 2006 Tundra Semiconductor Corporation.
4
5 This program is free software; you can redistribute it and/or modify it
6 under the terms of the GNU General Public License as published by the Free
7 Software Foundation; either version 2 of the License, or (at your option)
8 any later version.
9
10 This program is distributed in the hope that it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc., 59
17 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18
19*******************************************************************************/
20
21/* This driver is based on the driver code originally developed
22 * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by
23 * scott.wood@timesys.com * Copyright (C) 2003 TimeSys Corporation
24 *
25 * Currently changes from original version are:
26 * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com)
27 * - modifications to handle two ports independently and support for
28 * additional PHY devices (alexandre.bounine@tundra.com)
29 * - Get hardware information from platform device. (tie-fei.zang@freescale.com)
30 *
31 */
32
33#include <linux/module.h>
34#include <linux/types.h>
35#include <linux/init.h>
36#include <linux/net.h>
37#include <linux/netdevice.h>
38#include <linux/etherdevice.h>
39#include <linux/skbuff.h>
40#include <linux/slab.h>
5e123b84
ZR		 41#include <linux/spinlock.h>
42#include <linux/delay.h>
43#include <linux/crc32.h>
44#include <linux/mii.h>
45#include <linux/device.h>
46#include <linux/pci.h>
47#include <linux/rtnetlink.h>
48#include <linux/timer.h>
49#include <linux/platform_device.h>
5e123b84
ZR		 50
51#include <asm/system.h>
52#include <asm/io.h>
53#include <asm/tsi108.h>
54
55#include "tsi108_eth.h"
56
57#define MII_READ_DELAY 10000 /* max link wait time in msec */
58
59#define TSI108_RXRING_LEN 256
60
61/* NOTE: The driver currently does not support receiving packets
62 * larger than the buffer size, so don't decrease this (unless you
63 * want to add such support).
64 */
65#define TSI108_RXBUF_SIZE 1536
66
67#define TSI108_TXRING_LEN 256
68
69#define TSI108_TX_INT_FREQ 64
70
71/* Check the phy status every half a second. */
72#define CHECK_PHY_INTERVAL (HZ/2)
73
74static int tsi108_init_one(struct platform_device *pdev);
75static int tsi108_ether_remove(struct platform_device *pdev);
76
77struct tsi108_prv_data {
78 void __iomem *regs; /* Base of normal regs */
79 void __iomem *phyregs; /* Base of register bank used for PHY access */
80
bea3348e
SH		 81 struct net_device *dev;
82 struct napi_struct napi;
83
5e123b84
ZR		 84 unsigned int phy; /* Index of PHY for this interface */
85 unsigned int irq_num;
86 unsigned int id;
c1b78d05 87 unsigned int phy_type;
5e123b84
ZR		 88
89 struct timer_list timer;/* Timer that triggers the check phy function */
90 unsigned int rxtail; /* Next entry in rxring to read */
91 unsigned int rxhead; /* Next entry in rxring to give a new buffer */
92 unsigned int rxfree; /* Number of free, allocated RX buffers */
93
94 unsigned int rxpending; /* Non-zero if there are still descriptors
95 * to be processed from a previous descriptor
96 * interrupt condition that has been cleared */
97
98 unsigned int txtail; /* Next TX descriptor to check status on */
99 unsigned int txhead; /* Next TX descriptor to use */
100
101 /* Number of free TX descriptors. This could be calculated from
102 * rxhead and rxtail if one descriptor were left unused to disambiguate
103 * full and empty conditions, but it's simpler to just keep track
104 * explicitly. */
105
106 unsigned int txfree;
107
108 unsigned int phy_ok; /* The PHY is currently powered on. */
109
110 /* PHY status (duplex is 1 for half, 2 for full,
111 * so that the default 0 indicates that neither has
112 * yet been configured). */
113
114 unsigned int link_up;
115 unsigned int speed;
116 unsigned int duplex;
117
118 tx_desc *txring;
119 rx_desc *rxring;
120 struct sk_buff *txskbs[TSI108_TXRING_LEN];
121 struct sk_buff *rxskbs[TSI108_RXRING_LEN];
122
123 dma_addr_t txdma, rxdma;
124
125 /* txlock nests in misclock and phy_lock */
126
127 spinlock_t txlock, misclock;
128
129 /* stats is used to hold the upper bits of each hardware counter,
130 * and tmpstats is used to hold the full values for returning
131 * to the caller of get_stats(). They must be separate in case
132 * an overflow interrupt occurs before the stats are consumed.
133 */
134
135 struct net_device_stats stats;
136 struct net_device_stats tmpstats;
137
138 /* These stats are kept separate in hardware, thus require individual
139 * fields for handling carry. They are combined in get_stats.
140 */
141
142 unsigned long rx_fcs; /* Add to rx_frame_errors */
143 unsigned long rx_short_fcs; /* Add to rx_frame_errors */
144 unsigned long rx_long_fcs; /* Add to rx_frame_errors */
145 unsigned long rx_underruns; /* Add to rx_length_errors */
146 unsigned long rx_overruns; /* Add to rx_length_errors */
147
148 unsigned long tx_coll_abort; /* Add to tx_aborted_errors/collisions */
149 unsigned long tx_pause_drop; /* Add to tx_aborted_errors */
150
151 unsigned long mc_hash[16];
152 u32 msg_enable; /* debug message level */
153 struct mii_if_info mii_if;
154 unsigned int init_media;
155};
156
157/* Structure for a device driver */
158
159static struct platform_driver tsi_eth_driver = {
160 .probe = tsi108_init_one,
161 .remove = tsi108_ether_remove,
162 .driver = {
163 .name = "tsi-ethernet",
164 },
165};
166
167static void tsi108_timed_checker(unsigned long dev_ptr);
168
169static void dump_eth_one(struct net_device *dev)
170{
171 struct tsi108_prv_data *data = netdev_priv(dev);
172
173 printk("Dumping %s...\n", dev->name);
174 printk("intstat %x intmask %x phy_ok %d"
175 " link %d speed %d duplex %d\n",
176 TSI_READ(TSI108_EC_INTSTAT),
177 TSI_READ(TSI108_EC_INTMASK), data->phy_ok,
178 data->link_up, data->speed, data->duplex);
179
180 printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n",
181 data->txhead, data->txtail, data->txfree,
182 TSI_READ(TSI108_EC_TXSTAT),
183 TSI_READ(TSI108_EC_TXESTAT),
184 TSI_READ(TSI108_EC_TXERR));
185
186 printk("RX: head %d, tail %d, free %d, stat %x,"
187 " estat %x, err %x, pending %d\n\n",
188 data->rxhead, data->rxtail, data->rxfree,
189 TSI_READ(TSI108_EC_RXSTAT),
190 TSI_READ(TSI108_EC_RXESTAT),
191 TSI_READ(TSI108_EC_RXERR), data->rxpending);
192}
193
194/* Synchronization is needed between the thread and up/down events.
195 * Note that the PHY is accessed through the same registers for both
196 * interfaces, so this can't be made interface-specific.
197 */
198
199static DEFINE_SPINLOCK(phy_lock);
200
201static int tsi108_read_mii(struct tsi108_prv_data *data, int reg)
202{
203 unsigned i;
204
205 TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
206 (data->phy << TSI108_MAC_MII_ADDR_PHY) |
207 (reg << TSI108_MAC_MII_ADDR_REG));
208 TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0);
209 TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ);
210 for (i = 0; i < 100; i++) {
211 if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
212 (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY)))
213 break;
214 udelay(10);
215 }
216
217 if (i == 100)
218 return 0xffff;
219 else
220 return (TSI_READ_PHY(TSI108_MAC_MII_DATAIN));
221}
222
223static void tsi108_write_mii(struct tsi108_prv_data *data,
224 int reg, u16 val)
225{
226 unsigned i = 100;
227 TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
228 (data->phy << TSI108_MAC_MII_ADDR_PHY) |
229 (reg << TSI108_MAC_MII_ADDR_REG));
230 TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val);
231 while (i--) {
232 if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
233 TSI108_MAC_MII_IND_BUSY))
234 break;
235 udelay(10);
236 }
237}
238
239static int tsi108_mdio_read(struct net_device *dev, int addr, int reg)
240{
241 struct tsi108_prv_data *data = netdev_priv(dev);
242 return tsi108_read_mii(data, reg);
243}
244
245static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val)
246{
247 struct tsi108_prv_data *data = netdev_priv(dev);
248 tsi108_write_mii(data, reg, val);
249}
250
251static inline void tsi108_write_tbi(struct tsi108_prv_data *data,
252 int reg, u16 val)
253{
254 unsigned i = 1000;
255 TSI_WRITE(TSI108_MAC_MII_ADDR,
256 (0x1e << TSI108_MAC_MII_ADDR_PHY)
257 | (reg << TSI108_MAC_MII_ADDR_REG));
258 TSI_WRITE(TSI108_MAC_MII_DATAOUT, val);
259 while(i--) {
260 if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY))
261 return;
262 udelay(10);
263 }
264 printk(KERN_ERR "%s function time out \n", __FUNCTION__);
265}
266
267static int mii_speed(struct mii_if_info *mii)
268{
269 int advert, lpa, val, media;
270 int lpa2 = 0;
271 int speed;
272
273 if (!mii_link_ok(mii))
274 return 0;
275
276 val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR);
277 if ((val & BMSR_ANEGCOMPLETE) == 0)
278 return 0;
279
280 advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE);
281 lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA);
282 media = mii_nway_result(advert & lpa);
283
284 if (mii->supports_gmii)
285 lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000);
286
287 speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 :
288 (media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10);
289 return speed;
290}
291
292static void tsi108_check_phy(struct net_device *dev)
293{
294 struct tsi108_prv_data *data = netdev_priv(dev);
295 u32 mac_cfg2_reg, portctrl_reg;
296 u32 duplex;
297 u32 speed;
298 unsigned long flags;
299
5e123b84
ZR		 300 spin_lock_irqsave(&phy_lock, flags);
301
302 if (!data->phy_ok)
303 goto out;
304
5e123b84
ZR		 305 duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media);
306 data->init_media = 0;
307
308 if (netif_carrier_ok(dev)) {
309
310 speed = mii_speed(&data->mii_if);
311
312 if ((speed != data->speed) || duplex) {
313
314 mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2);
315 portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL);
316
317 mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK;
318
319 if (speed == 1000) {
320 mac_cfg2_reg |= TSI108_MAC_CFG2_GIG;
321 portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG;
322 } else {
323 mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG;
324 portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG;
325 }
326
327 data->speed = speed;
328
329 if (data->mii_if.full_duplex) {
330 mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX;
331 portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX;
332 data->duplex = 2;
333 } else {
334 mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX;
335 portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX;
336 data->duplex = 1;
337 }
338
339 TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg);
340 TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg);
b1aefe58 341 }
5e123b84 342
b1aefe58
AB		 343 if (data->link_up == 0) {
344 /* The manual says it can take 3-4 usecs for the speed change
345 * to take effect.
346 */
347 udelay(5);
5e123b84 348
b1aefe58
AB		 349 spin_lock(&data->txlock);
350 if (is_valid_ether_addr(dev->dev_addr) && data->txfree)
351 netif_wake_queue(dev);
5e123b84 352
b1aefe58
AB		 353 data->link_up = 1;
354 spin_unlock(&data->txlock);
5e123b84 355 }
5e123b84
ZR		 356 } else {
357 if (data->link_up == 1) {
358 netif_stop_queue(dev);
359 data->link_up = 0;
360 printk(KERN_NOTICE "%s : link is down\n", dev->name);
361 }
362
363 goto out;
364 }
365
366
367out:
368 spin_unlock_irqrestore(&phy_lock, flags);
369}
370
371static inline void
372tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift,
373 unsigned long *upper)
374{
375 if (carry & carry_bit)
376 *upper += carry_shift;
377}
378
379static void tsi108_stat_carry(struct net_device *dev)
380{
381 struct tsi108_prv_data *data = netdev_priv(dev);
382 u32 carry1, carry2;
383
384 spin_lock_irq(&data->misclock);
385
386 carry1 = TSI_READ(TSI108_STAT_CARRY1);
387 carry2 = TSI_READ(TSI108_STAT_CARRY2);
388
389 TSI_WRITE(TSI108_STAT_CARRY1, carry1);
390 TSI_WRITE(TSI108_STAT_CARRY2, carry2);
391
392 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES,
393 TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
394
395 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS,
396 TSI108_STAT_RXPKTS_CARRY,
397 &data->stats.rx_packets);
398
399 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS,
400 TSI108_STAT_RXFCS_CARRY, &data->rx_fcs);
401
402 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST,
403 TSI108_STAT_RXMCAST_CARRY,
404 &data->stats.multicast);
405
406 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN,
407 TSI108_STAT_RXALIGN_CARRY,
408 &data->stats.rx_frame_errors);
409
410 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH,
411 TSI108_STAT_RXLENGTH_CARRY,
412 &data->stats.rx_length_errors);
413
414 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT,
415 TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
416
417 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO,
418 TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
419
420 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG,
421 TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
422
423 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER,
424 TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs);
425
426 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP,
427 TSI108_STAT_RXDROP_CARRY,
428 &data->stats.rx_missed_errors);
429
430 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES,
431 TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
432
433 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS,
434 TSI108_STAT_TXPKTS_CARRY,
435 &data->stats.tx_packets);
436
437 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF,
438 TSI108_STAT_TXEXDEF_CARRY,
439 &data->stats.tx_aborted_errors);
440
441 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL,
442 TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort);
443
444 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL,
445 TSI108_STAT_TXTCOL_CARRY,
446 &data->stats.collisions);
447
448 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE,
449 TSI108_STAT_TXPAUSEDROP_CARRY,
450 &data->tx_pause_drop);
451
452 spin_unlock_irq(&data->misclock);
453}
454
455/* Read a stat counter atomically with respect to carries.
456 * data->misclock must be held.
457 */
458static inline unsigned long
459tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit,
460 int carry_shift, unsigned long *upper)
461{
462 int carryreg;
463 unsigned long val;
464
465 if (reg < 0xb0)
466 carryreg = TSI108_STAT_CARRY1;
467 else
468 carryreg = TSI108_STAT_CARRY2;
469
470 again:
471 val = TSI_READ(reg) | *upper;
472
473 /* Check to see if it overflowed, but the interrupt hasn't
474 * been serviced yet. If so, handle the carry here, and
475 * try again.
476 */
477
478 if (unlikely(TSI_READ(carryreg) & carry_bit)) {
479 *upper += carry_shift;
480 TSI_WRITE(carryreg, carry_bit);
481 goto again;
482 }
483
484 return val;
485}
486
487static struct net_device_stats *tsi108_get_stats(struct net_device *dev)
488{
489 unsigned long excol;
490
491 struct tsi108_prv_data *data = netdev_priv(dev);
492 spin_lock_irq(&data->misclock);
493
494 data->tmpstats.rx_packets =
495 tsi108_read_stat(data, TSI108_STAT_RXPKTS,
496 TSI108_STAT_CARRY1_RXPKTS,
497 TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets);
498
499 data->tmpstats.tx_packets =
500 tsi108_read_stat(data, TSI108_STAT_TXPKTS,
501 TSI108_STAT_CARRY2_TXPKTS,
502 TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets);
503
504 data->tmpstats.rx_bytes =
505 tsi108_read_stat(data, TSI108_STAT_RXBYTES,
506 TSI108_STAT_CARRY1_RXBYTES,
507 TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
508
509 data->tmpstats.tx_bytes =
510 tsi108_read_stat(data, TSI108_STAT_TXBYTES,
511 TSI108_STAT_CARRY2_TXBYTES,
512 TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
513
514 data->tmpstats.multicast =
515 tsi108_read_stat(data, TSI108_STAT_RXMCAST,
516 TSI108_STAT_CARRY1_RXMCAST,
517 TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast);
518
519 excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL,
520 TSI108_STAT_CARRY2_TXEXCOL,
521 TSI108_STAT_TXEXCOL_CARRY,
522 &data->tx_coll_abort);
523
524 data->tmpstats.collisions =
525 tsi108_read_stat(data, TSI108_STAT_TXTCOL,
526 TSI108_STAT_CARRY2_TXTCOL,
527 TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions);
528
529 data->tmpstats.collisions += excol;
530
531 data->tmpstats.rx_length_errors =
532 tsi108_read_stat(data, TSI108_STAT_RXLENGTH,
533 TSI108_STAT_CARRY1_RXLENGTH,
534 TSI108_STAT_RXLENGTH_CARRY,
535 &data->stats.rx_length_errors);
536
537 data->tmpstats.rx_length_errors +=
538 tsi108_read_stat(data, TSI108_STAT_RXRUNT,
539 TSI108_STAT_CARRY1_RXRUNT,
540 TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
541
542 data->tmpstats.rx_length_errors +=
543 tsi108_read_stat(data, TSI108_STAT_RXJUMBO,
544 TSI108_STAT_CARRY1_RXJUMBO,
545 TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
546
547 data->tmpstats.rx_frame_errors =
548 tsi108_read_stat(data, TSI108_STAT_RXALIGN,
549 TSI108_STAT_CARRY1_RXALIGN,
550 TSI108_STAT_RXALIGN_CARRY,
551 &data->stats.rx_frame_errors);
552
553 data->tmpstats.rx_frame_errors +=
554 tsi108_read_stat(data, TSI108_STAT_RXFCS,
555 TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY,
556 &data->rx_fcs);
557
558 data->tmpstats.rx_frame_errors +=
559 tsi108_read_stat(data, TSI108_STAT_RXFRAG,
560 TSI108_STAT_CARRY1_RXFRAG,
561 TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
562
563 data->tmpstats.rx_missed_errors =
564 tsi108_read_stat(data, TSI108_STAT_RXDROP,
565 TSI108_STAT_CARRY1_RXDROP,
566 TSI108_STAT_RXDROP_CARRY,
567 &data->stats.rx_missed_errors);
568
569 /* These three are maintained by software. */
570 data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors;
571 data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors;
572
573 data->tmpstats.tx_aborted_errors =
574 tsi108_read_stat(data, TSI108_STAT_TXEXDEF,
575 TSI108_STAT_CARRY2_TXEXDEF,
576 TSI108_STAT_TXEXDEF_CARRY,
577 &data->stats.tx_aborted_errors);
578
579 data->tmpstats.tx_aborted_errors +=
580 tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP,
581 TSI108_STAT_CARRY2_TXPAUSE,
582 TSI108_STAT_TXPAUSEDROP_CARRY,
583 &data->tx_pause_drop);
584
585 data->tmpstats.tx_aborted_errors += excol;
586
587 data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors;
588 data->tmpstats.rx_errors = data->tmpstats.rx_length_errors +
589 data->tmpstats.rx_crc_errors +
590 data->tmpstats.rx_frame_errors +
591 data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors;
592
593 spin_unlock_irq(&data->misclock);
594 return &data->tmpstats;
595}
596
597static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev)
598{
599 TSI_WRITE(TSI108_EC_RXQ_PTRHIGH,
600 TSI108_EC_RXQ_PTRHIGH_VALID);
601
602 TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO
603 | TSI108_EC_RXCTRL_QUEUE0);
604}
605
606static void tsi108_restart_tx(struct tsi108_prv_data * data)
607{
608 TSI_WRITE(TSI108_EC_TXQ_PTRHIGH,
609 TSI108_EC_TXQ_PTRHIGH_VALID);
610
611 TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT |
612 TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0);
613}
614
615/* txlock must be held by caller, with IRQs disabled, and
616 * with permission to re-enable them when the lock is dropped.
617 */
618static void tsi108_complete_tx(struct net_device *dev)
619{
620 struct tsi108_prv_data *data = netdev_priv(dev);
621 int tx;
622 struct sk_buff *skb;
623 int release = 0;
624
625 while (!data->txfree || data->txhead != data->txtail) {
626 tx = data->txtail;
627
628 if (data->txring[tx].misc & TSI108_TX_OWN)
629 break;
630
631 skb = data->txskbs[tx];
632
633 if (!(data->txring[tx].misc & TSI108_TX_OK))
634 printk("%s: bad tx packet, misc %x\n",
635 dev->name, data->txring[tx].misc);
636
637 data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
638 data->txfree++;
639
640 if (data->txring[tx].misc & TSI108_TX_EOF) {
641 dev_kfree_skb_any(skb);
642 release++;
643 }
644 }
645
646 if (release) {
647 if (is_valid_ether_addr(dev->dev_addr) && data->link_up)
648 netif_wake_queue(dev);
649 }
650}
651
652static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev)
653{
654 struct tsi108_prv_data *data = netdev_priv(dev);
655 int frags = skb_shinfo(skb)->nr_frags + 1;
656 int i;
657
658 if (!data->phy_ok && net_ratelimit())
659 printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name);
660
661 if (!data->link_up) {
662 printk(KERN_ERR "%s: Transmit while link is down!\n",
663 dev->name);
664 netif_stop_queue(dev);
665 return NETDEV_TX_BUSY;
666 }
667
668 if (data->txfree < MAX_SKB_FRAGS + 1) {
669 netif_stop_queue(dev);
670
671 if (net_ratelimit())
672 printk(KERN_ERR "%s: Transmit with full tx ring!\n",
673 dev->name);
674 return NETDEV_TX_BUSY;
675 }
676
677 if (data->txfree - frags < MAX_SKB_FRAGS + 1) {
678 netif_stop_queue(dev);
679 }
680
681 spin_lock_irq(&data->txlock);
682
683 for (i = 0; i < frags; i++) {
684 int misc = 0;
685 int tx = data->txhead;
686
687 /* This is done to mark every TSI108_TX_INT_FREQ tx buffers with
688 * the interrupt bit. TX descriptor-complete interrupts are
689 * enabled when the queue fills up, and masked when there is
690 * still free space. This way, when saturating the outbound
691 * link, the tx interrupts are kept to a reasonable level.
692 * When the queue is not full, reclamation of skbs still occurs
693 * as new packets are transmitted, or on a queue-empty
694 * interrupt.
695 */
696
697 if ((tx % TSI108_TX_INT_FREQ == 0) &&
698 ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ))
699 misc = TSI108_TX_INT;
700
701 data->txskbs[tx] = skb;
702
703 if (i == 0) {
704 data->txring[tx].buf0 = dma_map_single(NULL, skb->data,
705 skb->len - skb->data_len, DMA_TO_DEVICE);
706 data->txring[tx].len = skb->len - skb->data_len;
707 misc |= TSI108_TX_SOF;
708 } else {
709 skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1];
710
711 data->txring[tx].buf0 =
712 dma_map_page(NULL, frag->page, frag->page_offset,
713 frag->size, DMA_TO_DEVICE);
714 data->txring[tx].len = frag->size;
715 }
716
717 if (i == frags - 1)
718 misc |= TSI108_TX_EOF;
719
720 if (netif_msg_pktdata(data)) {
721 int i;
722 printk("%s: Tx Frame contents (%d)\n", dev->name,
723 skb->len);
724 for (i = 0; i < skb->len; i++)
725 printk(" %2.2x", skb->data[i]);
726 printk(".\n");
727 }
728 data->txring[tx].misc = misc | TSI108_TX_OWN;
729
730 data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN;
731 data->txfree--;
732 }
733
734 tsi108_complete_tx(dev);
735
736 /* This must be done after the check for completed tx descriptors,
737 * so that the tail pointer is correct.
738 */
739
740 if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0))
741 tsi108_restart_tx(data);
742
743 spin_unlock_irq(&data->txlock);
744 return NETDEV_TX_OK;
745}
746
747static int tsi108_complete_rx(struct net_device *dev, int budget)
748{
749 struct tsi108_prv_data *data = netdev_priv(dev);
750 int done = 0;
751
752 while (data->rxfree && done != budget) {
753 int rx = data->rxtail;
754 struct sk_buff *skb;
755
756 if (data->rxring[rx].misc & TSI108_RX_OWN)
757 break;
758
759 skb = data->rxskbs[rx];
760 data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
761 data->rxfree--;
762 done++;
763
764 if (data->rxring[rx].misc & TSI108_RX_BAD) {
765 spin_lock_irq(&data->misclock);
766
767 if (data->rxring[rx].misc & TSI108_RX_CRC)
768 data->stats.rx_crc_errors++;
769 if (data->rxring[rx].misc & TSI108_RX_OVER)
770 data->stats.rx_fifo_errors++;
771
772 spin_unlock_irq(&data->misclock);
773
774 dev_kfree_skb_any(skb);
775 continue;
776 }
777 if (netif_msg_pktdata(data)) {
778 int i;
779 printk("%s: Rx Frame contents (%d)\n",
780 dev->name, data->rxring[rx].len);
781 for (i = 0; i < data->rxring[rx].len; i++)
782 printk(" %2.2x", skb->data[i]);
783 printk(".\n");
784 }
785
5e123b84
ZR		 786 skb_put(skb, data->rxring[rx].len);
787 skb->protocol = eth_type_trans(skb, dev);
788 netif_receive_skb(skb);
789 dev->last_rx = jiffies;
790 }
791
792 return done;
793}
794
795static int tsi108_refill_rx(struct net_device *dev, int budget)
796{
797 struct tsi108_prv_data *data = netdev_priv(dev);
798 int done = 0;
799
800 while (data->rxfree != TSI108_RXRING_LEN && done != budget) {
801 int rx = data->rxhead;
802 struct sk_buff *skb;
803
804 data->rxskbs[rx] = skb = dev_alloc_skb(TSI108_RXBUF_SIZE + 2);
805 if (!skb)
806 break;
807
808 skb_reserve(skb, 2); /* Align the data on a 4-byte boundary. */
809
810 data->rxring[rx].buf0 = dma_map_single(NULL, skb->data,
811 TSI108_RX_SKB_SIZE,
812 DMA_FROM_DEVICE);
813
814 /* Sometimes the hardware sets blen to zero after packet
815 * reception, even though the manual says that it's only ever
816 * modified by the driver.
817 */
818
819 data->rxring[rx].blen = TSI108_RX_SKB_SIZE;
820 data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT;
821
822 data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN;
823 data->rxfree++;
824 done++;
825 }
826
827 if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) &
828 TSI108_EC_RXSTAT_QUEUE0))
829 tsi108_restart_rx(data, dev);
830
831 return done;
832}
833
bea3348e 834static int tsi108_poll(struct napi_struct *napi, int budget)
5e123b84 835{
bea3348e
SH		 836 struct tsi108_prv_data *data = container_of(napi, struct tsi108_prv_data, napi);
837 struct net_device *dev = data->dev;
5e123b84
ZR		 838 u32 estat = TSI_READ(TSI108_EC_RXESTAT);
839 u32 intstat = TSI_READ(TSI108_EC_INTSTAT);
bea3348e 840 int num_received = 0, num_filled = 0;
5e123b84
ZR		 841
842 intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
843 TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT;
844
845 TSI_WRITE(TSI108_EC_RXESTAT, estat);
846 TSI_WRITE(TSI108_EC_INTSTAT, intstat);
847
848 if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT))
bea3348e 849 num_received = tsi108_complete_rx(dev, budget);
5e123b84
ZR		 850
851 /* This should normally fill no more slots than the number of
852 * packets received in tsi108_complete_rx(). The exception
853 * is when we previously ran out of memory for RX SKBs. In that
854 * case, it's helpful to obey the budget, not only so that the
855 * CPU isn't hogged, but so that memory (which may still be low)
856 * is not hogged by one device.
857 *
858 * A work unit is considered to be two SKBs to allow us to catch
859 * up when the ring has shrunk due to out-of-memory but we're
860 * still removing the full budget's worth of packets each time.
861 */
862
863 if (data->rxfree < TSI108_RXRING_LEN)
bea3348e 864 num_filled = tsi108_refill_rx(dev, budget * 2);
5e123b84
ZR		 865
866 if (intstat & TSI108_INT_RXERROR) {
867 u32 err = TSI_READ(TSI108_EC_RXERR);
868 TSI_WRITE(TSI108_EC_RXERR, err);
869
870 if (err) {
871 if (net_ratelimit())
872 printk(KERN_DEBUG "%s: RX error %x\n",
873 dev->name, err);
874
875 if (!(TSI_READ(TSI108_EC_RXSTAT) &
876 TSI108_EC_RXSTAT_QUEUE0))
877 tsi108_restart_rx(data, dev);
878 }
879 }
880
881 if (intstat & TSI108_INT_RXOVERRUN) {
882 spin_lock_irq(&data->misclock);
883 data->stats.rx_fifo_errors++;
884 spin_unlock_irq(&data->misclock);
885 }
886
bea3348e 887 if (num_received < budget) {
5e123b84 888 data->rxpending = 0;
bea3348e 889 netif_rx_complete(dev, napi);
5e123b84
ZR		 890
891 TSI_WRITE(TSI108_EC_INTMASK,
892 TSI_READ(TSI108_EC_INTMASK)
893 & ~(TSI108_INT_RXQUEUE0
894 | TSI108_INT_RXTHRESH |
895 TSI108_INT_RXOVERRUN |
896 TSI108_INT_RXERROR |
897 TSI108_INT_RXWAIT));
5e123b84
ZR		 898 } else {
899 data->rxpending = 1;
900 }
901
bea3348e 902 return num_received;
5e123b84
ZR		 903}
904
905static void tsi108_rx_int(struct net_device *dev)
906{
907 struct tsi108_prv_data *data = netdev_priv(dev);
908
909 /* A race could cause dev to already be scheduled, so it's not an
910 * error if that happens (and interrupts shouldn't be re-masked,
911 * because that can cause harmful races, if poll has already
912 * unmasked them but not cleared LINK_STATE_SCHED).
913 *
914 * This can happen if this code races with tsi108_poll(), which masks
915 * the interrupts after tsi108_irq_one() read the mask, but before
916 * netif_rx_schedule is called. It could also happen due to calls
917 * from tsi108_check_rxring().
918 */
919
bea3348e 920 if (netif_rx_schedule_prep(dev, &data->napi)) {
5e123b84
ZR		 921 /* Mask, rather than ack, the receive interrupts. The ack
922 * will happen in tsi108_poll().
923 */
924
925 TSI_WRITE(TSI108_EC_INTMASK,
926 TSI_READ(TSI108_EC_INTMASK) |
927 TSI108_INT_RXQUEUE0
928 | TSI108_INT_RXTHRESH |
929 TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR |
930 TSI108_INT_RXWAIT);
bea3348e 931 __netif_rx_schedule(dev, &data->napi);
5e123b84
ZR		 932 } else {
933 if (!netif_running(dev)) {
934 /* This can happen if an interrupt occurs while the
935 * interface is being brought down, as the START
936 * bit is cleared before the stop function is called.
937 *
938 * In this case, the interrupts must be masked, or
939 * they will continue indefinitely.
940 *
941 * There's a race here if the interface is brought down
942 * and then up in rapid succession, as the device could
943 * be made running after the above check and before
944 * the masking below. This will only happen if the IRQ
945 * thread has a lower priority than the task brining
946 * up the interface. Fixing this race would likely
947 * require changes in generic code.
948 */
949
950 TSI_WRITE(TSI108_EC_INTMASK,
951 TSI_READ
952 (TSI108_EC_INTMASK) |
953 TSI108_INT_RXQUEUE0 |
954 TSI108_INT_RXTHRESH |
955 TSI108_INT_RXOVERRUN |
956 TSI108_INT_RXERROR |
957 TSI108_INT_RXWAIT);
958 }
959 }
960}
961
962/* If the RX ring has run out of memory, try periodically
963 * to allocate some more, as otherwise poll would never
964 * get called (apart from the initial end-of-queue condition).
965 *
966 * This is called once per second (by default) from the thread.
967 */
968
969static void tsi108_check_rxring(struct net_device *dev)
970{
971 struct tsi108_prv_data *data = netdev_priv(dev);
972
973 /* A poll is scheduled, as opposed to caling tsi108_refill_rx
974 * directly, so as to keep the receive path single-threaded
975 * (and thus not needing a lock).
976 */
977
978 if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4)
979 tsi108_rx_int(dev);
980}
981
982static void tsi108_tx_int(struct net_device *dev)
983{
984 struct tsi108_prv_data *data = netdev_priv(dev);
985 u32 estat = TSI_READ(TSI108_EC_TXESTAT);
986
987 TSI_WRITE(TSI108_EC_TXESTAT, estat);
988 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 |
989 TSI108_INT_TXIDLE | TSI108_INT_TXERROR);
990 if (estat & TSI108_EC_TXESTAT_Q0_ERR) {
991 u32 err = TSI_READ(TSI108_EC_TXERR);
992 TSI_WRITE(TSI108_EC_TXERR, err);
993
994 if (err && net_ratelimit())
995 printk(KERN_ERR "%s: TX error %x\n", dev->name, err);
996 }
997
998 if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) {
999 spin_lock(&data->txlock);
1000 tsi108_complete_tx(dev);
1001 spin_unlock(&data->txlock);
1002 }
1003}
1004
1005
1006static irqreturn_t tsi108_irq(int irq, void *dev_id)
1007{
1008 struct net_device *dev = dev_id;
1009 struct tsi108_prv_data *data = netdev_priv(dev);
1010 u32 stat = TSI_READ(TSI108_EC_INTSTAT);
1011
1012 if (!(stat & TSI108_INT_ANY))
1013 return IRQ_NONE; /* Not our interrupt */
1014
1015 stat &= ~TSI_READ(TSI108_EC_INTMASK);
1016
1017 if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE |
1018 TSI108_INT_TXERROR))
1019 tsi108_tx_int(dev);
1020 if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
1021 TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN |
1022 TSI108_INT_RXERROR))
1023 tsi108_rx_int(dev);
1024
1025 if (stat & TSI108_INT_SFN) {
1026 if (net_ratelimit())
1027 printk(KERN_DEBUG "%s: SFN error\n", dev->name);
1028 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN);
1029 }
1030
1031 if (stat & TSI108_INT_STATCARRY) {
1032 tsi108_stat_carry(dev);
1033 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY);
1034 }
1035
1036 return IRQ_HANDLED;
1037}
1038
1039static void tsi108_stop_ethernet(struct net_device *dev)
1040{
1041 struct tsi108_prv_data *data = netdev_priv(dev);
1042 int i = 1000;
1043 /* Disable all TX and RX queues ... */
1044 TSI_WRITE(TSI108_EC_TXCTRL, 0);
1045 TSI_WRITE(TSI108_EC_RXCTRL, 0);
1046
1047 /* ...and wait for them to become idle */
1048 while(i--) {
1049 if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE))
1050 break;
1051 udelay(10);
1052 }
1053 i = 1000;
1054 while(i--){
1055 if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE))
1056 return;
1057 udelay(10);
1058 }
1059 printk(KERN_ERR "%s function time out \n", __FUNCTION__);
1060}
1061
1062static void tsi108_reset_ether(struct tsi108_prv_data * data)
1063{
1064 TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST);
1065 udelay(100);
1066 TSI_WRITE(TSI108_MAC_CFG1, 0);
1067
1068 TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST);
1069 udelay(100);
1070 TSI_WRITE(TSI108_EC_PORTCTRL,
1071 TSI_READ(TSI108_EC_PORTCTRL) &
1072 ~TSI108_EC_PORTCTRL_STATRST);
1073
1074 TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST);
1075 udelay(100);
1076 TSI_WRITE(TSI108_EC_TXCFG,
1077 TSI_READ(TSI108_EC_TXCFG) &
1078 ~TSI108_EC_TXCFG_RST);
1079
1080 TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST);
1081 udelay(100);
1082 TSI_WRITE(TSI108_EC_RXCFG,
1083 TSI_READ(TSI108_EC_RXCFG) &
1084 ~TSI108_EC_RXCFG_RST);
1085
1086 TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
1087 TSI_READ(TSI108_MAC_MII_MGMT_CFG) |
1088 TSI108_MAC_MII_MGMT_RST);
1089 udelay(100);
1090 TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
1091 (TSI_READ(TSI108_MAC_MII_MGMT_CFG) &
1092 ~(TSI108_MAC_MII_MGMT_RST |
1093 TSI108_MAC_MII_MGMT_CLK)) | 0x07);
1094}
1095
1096static int tsi108_get_mac(struct net_device *dev)
1097{
1098 struct tsi108_prv_data *data = netdev_priv(dev);
1099 u32 word1 = TSI_READ(TSI108_MAC_ADDR1);
1100 u32 word2 = TSI_READ(TSI108_MAC_ADDR2);
1101
1102 /* Note that the octets are reversed from what the manual says,
1103 * producing an even weirder ordering...
1104 */
1105 if (word2 == 0 && word1 == 0) {
1106 dev->dev_addr[0] = 0x00;
1107 dev->dev_addr[1] = 0x06;
1108 dev->dev_addr[2] = 0xd2;
1109 dev->dev_addr[3] = 0x00;
1110 dev->dev_addr[4] = 0x00;
1111 if (0x8 == data->phy)
1112 dev->dev_addr[5] = 0x01;
1113 else
1114 dev->dev_addr[5] = 0x02;
1115
1116 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1117
1118 word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
1119 (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
1120
1121 TSI_WRITE(TSI108_MAC_ADDR1, word1);
1122 TSI_WRITE(TSI108_MAC_ADDR2, word2);
1123 } else {
1124 dev->dev_addr[0] = (word2 >> 16) & 0xff;
1125 dev->dev_addr[1] = (word2 >> 24) & 0xff;
1126 dev->dev_addr[2] = (word1 >> 0) & 0xff;
1127 dev->dev_addr[3] = (word1 >> 8) & 0xff;
1128 dev->dev_addr[4] = (word1 >> 16) & 0xff;
1129 dev->dev_addr[5] = (word1 >> 24) & 0xff;
1130 }
1131
1132 if (!is_valid_ether_addr(dev->dev_addr)) {
1133 printk("KERN_ERR: word1: %08x, word2: %08x\n", word1, word2);
1134 return -EINVAL;
1135 }
1136
1137 return 0;
1138}
1139
1140static int tsi108_set_mac(struct net_device *dev, void *addr)
1141{
1142 struct tsi108_prv_data *data = netdev_priv(dev);
1143 u32 word1, word2;
1144 int i;
1145
1146 if (!is_valid_ether_addr(addr))
1147 return -EINVAL;
1148
1149 for (i = 0; i < 6; i++)
1150 /* +2 is for the offset of the HW addr type */
1151 dev->dev_addr[i] = ((unsigned char *)addr)[i + 2];
1152
1153 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1154
1155 word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
1156 (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
1157
1158 spin_lock_irq(&data->misclock);
1159 TSI_WRITE(TSI108_MAC_ADDR1, word1);
1160 TSI_WRITE(TSI108_MAC_ADDR2, word2);
1161 spin_lock(&data->txlock);
1162
1163 if (data->txfree && data->link_up)
1164 netif_wake_queue(dev);
1165
1166 spin_unlock(&data->txlock);
1167 spin_unlock_irq(&data->misclock);
1168 return 0;
1169}
1170
1171/* Protected by dev->xmit_lock. */
1172static void tsi108_set_rx_mode(struct net_device *dev)
1173{
1174 struct tsi108_prv_data *data = netdev_priv(dev);
1175 u32 rxcfg = TSI_READ(TSI108_EC_RXCFG);
1176
1177 if (dev->flags & IFF_PROMISC) {
1178 rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH);
1179 rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE;
1180 goto out;
1181 }
1182
1183 rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE);
1184
1185 if (dev->flags & IFF_ALLMULTI || dev->mc_count) {
1186 int i;
1187 struct dev_mc_list *mc = dev->mc_list;
1188 rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH;
1189
1190 memset(data->mc_hash, 0, sizeof(data->mc_hash));
1191
1192 while (mc) {
1193 u32 hash, crc;
1194
1195 if (mc->dmi_addrlen == 6) {
1196 crc = ether_crc(6, mc->dmi_addr);
1197 hash = crc >> 23;
1198
1199 __set_bit(hash, &data->mc_hash[0]);
1200 } else {
1201 printk(KERN_ERR
1202 "%s: got multicast address of length %d "
1203 "instead of 6.\n", dev->name,
1204 mc->dmi_addrlen);
1205 }
1206
1207 mc = mc->next;
1208 }
1209
1210 TSI_WRITE(TSI108_EC_HASHADDR,
1211 TSI108_EC_HASHADDR_AUTOINC |
1212 TSI108_EC_HASHADDR_MCAST);
1213
1214 for (i = 0; i < 16; i++) {
1215 /* The manual says that the hardware may drop
1216 * back-to-back writes to the data register.
1217 */
1218 udelay(1);
1219 TSI_WRITE(TSI108_EC_HASHDATA,
1220 data->mc_hash[i]);
1221 }
1222 }
1223
1224 out:
1225 TSI_WRITE(TSI108_EC_RXCFG, rxcfg);
1226}
1227
1228static void tsi108_init_phy(struct net_device *dev)
1229{
1230 struct tsi108_prv_data *data = netdev_priv(dev);
1231 u32 i = 0;
1232 u16 phyval = 0;
1233 unsigned long flags;
1234
1235 spin_lock_irqsave(&phy_lock, flags);
1236
1237 tsi108_write_mii(data, MII_BMCR, BMCR_RESET);
1238 while (i--){
1239 if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET))
1240 break;
1241 udelay(10);
1242 }
1243 if (i == 0)
1244 printk(KERN_ERR "%s function time out \n", __FUNCTION__);
1245
c1b78d05
JB		 1246 if (data->phy_type == TSI108_PHY_BCM54XX) {
1247 tsi108_write_mii(data, 0x09, 0x0300);
1248 tsi108_write_mii(data, 0x10, 0x1020);
1249 tsi108_write_mii(data, 0x1c, 0x8c00);
1250 }
5e123b84
ZR		 1251
1252 tsi108_write_mii(data,
1253 MII_BMCR,
1254 BMCR_ANENABLE | BMCR_ANRESTART);
1255 while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART)
1256 cpu_relax();
1257
1258 /* Set G/MII mode and receive clock select in TBI control #2. The
1259 * second port won't work if this isn't done, even though we don't
1260 * use TBI mode.
1261 */
1262
1263 tsi108_write_tbi(data, 0x11, 0x30);
1264
1265 /* FIXME: It seems to take more than 2 back-to-back reads to the
1266 * PHY_STAT register before the link up status bit is set.
1267 */
1268
b1aefe58 1269 data->link_up = 0;
5e123b84
ZR		 1270
1271 while (!((phyval = tsi108_read_mii(data, MII_BMSR)) &
1272 BMSR_LSTATUS)) {
1273 if (i++ > (MII_READ_DELAY / 10)) {
5e123b84
ZR		 1274 break;
1275 }
1276 spin_unlock_irqrestore(&phy_lock, flags);
1277 msleep(10);
1278 spin_lock_irqsave(&phy_lock, flags);
1279 }
1280
6a87155a 1281 data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if);
5e123b84
ZR		 1282 printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval);
1283 data->phy_ok = 1;
1284 data->init_media = 1;
1285 spin_unlock_irqrestore(&phy_lock, flags);
1286}
1287
1288static void tsi108_kill_phy(struct net_device *dev)
1289{
1290 struct tsi108_prv_data *data = netdev_priv(dev);
1291 unsigned long flags;
1292
1293 spin_lock_irqsave(&phy_lock, flags);
1294 tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN);
1295 data->phy_ok = 0;
1296 spin_unlock_irqrestore(&phy_lock, flags);
1297}
1298
1299static int tsi108_open(struct net_device *dev)
1300{
1301 int i;
1302 struct tsi108_prv_data *data = netdev_priv(dev);
1303 unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc);
1304 unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc);
1305
1306 i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev);
1307 if (i != 0) {
1308 printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n",
1309 data->id, data->irq_num);
1310 return i;
1311 } else {
1312 dev->irq = data->irq_num;
1313 printk(KERN_NOTICE
1314 "tsi108_open : Port %d Assigned IRQ %d to %s\n",
1315 data->id, dev->irq, dev->name);
1316 }
1317
1318 data->rxring = dma_alloc_coherent(NULL, rxring_size,
1319 &data->rxdma, GFP_KERNEL);
1320
1321 if (!data->rxring) {
1322 printk(KERN_DEBUG
1323 "TSI108_ETH: failed to allocate memory for rxring!\n");
1324 return -ENOMEM;
1325 } else {
1326 memset(data->rxring, 0, rxring_size);
1327 }
1328
1329 data->txring = dma_alloc_coherent(NULL, txring_size,
1330 &data->txdma, GFP_KERNEL);
1331
1332 if (!data->txring) {
1333 printk(KERN_DEBUG
1334 "TSI108_ETH: failed to allocate memory for txring!\n");
1335 pci_free_consistent(0, rxring_size, data->rxring, data->rxdma);
1336 return -ENOMEM;
1337 } else {
1338 memset(data->txring, 0, txring_size);
1339 }
1340
1341 for (i = 0; i < TSI108_RXRING_LEN; i++) {
1342 data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc);
1343 data->rxring[i].blen = TSI108_RXBUF_SIZE;
1344 data->rxring[i].vlan = 0;
1345 }
1346
1347 data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma;
1348
1349 data->rxtail = 0;
1350 data->rxhead = 0;
1351
1352 for (i = 0; i < TSI108_RXRING_LEN; i++) {
1353 struct sk_buff *skb = dev_alloc_skb(TSI108_RXBUF_SIZE + NET_IP_ALIGN);
1354
1355 if (!skb) {
1356 /* Bah. No memory for now, but maybe we'll get
1357 * some more later.
1358 * For now, we'll live with the smaller ring.
1359 */
1360 printk(KERN_WARNING
1361 "%s: Could only allocate %d receive skb(s).\n",
1362 dev->name, i);
1363 data->rxhead = i;
1364 break;
1365 }
1366
1367 data->rxskbs[i] = skb;
1368 /* Align the payload on a 4-byte boundary */
1369 skb_reserve(skb, 2);
1370 data->rxskbs[i] = skb;
1371 data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data);
1372 data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT;
1373 }
1374
1375 data->rxfree = i;
1376 TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma);
1377
1378 for (i = 0; i < TSI108_TXRING_LEN; i++) {
1379 data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc);
1380 data->txring[i].misc = 0;
1381 }
1382
1383 data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma;
1384 data->txtail = 0;
1385 data->txhead = 0;
1386 data->txfree = TSI108_TXRING_LEN;
1387 TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma);
1388 tsi108_init_phy(dev);
1389
bea3348e
SH		 1390 napi_enable(&data->napi);
1391
5e123b84
ZR		 1392 setup_timer(&data->timer, tsi108_timed_checker, (unsigned long)dev);
1393 mod_timer(&data->timer, jiffies + 1);
1394
1395 tsi108_restart_rx(data, dev);
1396
1397 TSI_WRITE(TSI108_EC_INTSTAT, ~0);
1398
1399 TSI_WRITE(TSI108_EC_INTMASK,
1400 ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR |
1401 TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 |
1402 TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT |
1403 TSI108_INT_SFN | TSI108_INT_STATCARRY));
1404
1405 TSI_WRITE(TSI108_MAC_CFG1,
1406 TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN);
1407 netif_start_queue(dev);
1408 return 0;
1409}
1410
1411static int tsi108_close(struct net_device *dev)
1412{
1413 struct tsi108_prv_data *data = netdev_priv(dev);
1414
1415 netif_stop_queue(dev);
bea3348e 1416 napi_disable(&data->napi);
5e123b84
ZR		 1417
1418 del_timer_sync(&data->timer);
1419
1420 tsi108_stop_ethernet(dev);
1421 tsi108_kill_phy(dev);
1422 TSI_WRITE(TSI108_EC_INTMASK, ~0);
1423 TSI_WRITE(TSI108_MAC_CFG1, 0);
1424
1425 /* Check for any pending TX packets, and drop them. */
1426
1427 while (!data->txfree || data->txhead != data->txtail) {
1428 int tx = data->txtail;
1429 struct sk_buff *skb;
1430 skb = data->txskbs[tx];
1431 data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
1432 data->txfree++;
1433 dev_kfree_skb(skb);
1434 }
1435
1436 synchronize_irq(data->irq_num);
1437 free_irq(data->irq_num, dev);
1438
1439 /* Discard the RX ring. */
1440
1441 while (data->rxfree) {
1442 int rx = data->rxtail;
1443 struct sk_buff *skb;
1444
1445 skb = data->rxskbs[rx];
1446 data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
1447 data->rxfree--;
1448 dev_kfree_skb(skb);
1449 }
1450
1451 dma_free_coherent(0,
1452 TSI108_RXRING_LEN * sizeof(rx_desc),
1453 data->rxring, data->rxdma);
1454 dma_free_coherent(0,
1455 TSI108_TXRING_LEN * sizeof(tx_desc),
1456 data->txring, data->txdma);
1457
1458 return 0;
1459}
1460
1461static void tsi108_init_mac(struct net_device *dev)
1462{
1463 struct tsi108_prv_data *data = netdev_priv(dev);
1464
1465 TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE |
1466 TSI108_MAC_CFG2_PADCRC);
1467
1468 TSI_WRITE(TSI108_EC_TXTHRESH,
1469 (192 << TSI108_EC_TXTHRESH_STARTFILL) |
1470 (192 << TSI108_EC_TXTHRESH_STOPFILL));
1471
1472 TSI_WRITE(TSI108_STAT_CARRYMASK1,
1473 ~(TSI108_STAT_CARRY1_RXBYTES |
1474 TSI108_STAT_CARRY1_RXPKTS |
1475 TSI108_STAT_CARRY1_RXFCS |
1476 TSI108_STAT_CARRY1_RXMCAST |
1477 TSI108_STAT_CARRY1_RXALIGN |
1478 TSI108_STAT_CARRY1_RXLENGTH |
1479 TSI108_STAT_CARRY1_RXRUNT |
1480 TSI108_STAT_CARRY1_RXJUMBO |
1481 TSI108_STAT_CARRY1_RXFRAG |
1482 TSI108_STAT_CARRY1_RXJABBER |
1483 TSI108_STAT_CARRY1_RXDROP));
1484
1485 TSI_WRITE(TSI108_STAT_CARRYMASK2,
1486 ~(TSI108_STAT_CARRY2_TXBYTES |
1487 TSI108_STAT_CARRY2_TXPKTS |
1488 TSI108_STAT_CARRY2_TXEXDEF |
1489 TSI108_STAT_CARRY2_TXEXCOL |
1490 TSI108_STAT_CARRY2_TXTCOL |
1491 TSI108_STAT_CARRY2_TXPAUSE));
1492
1493 TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN);
1494 TSI_WRITE(TSI108_MAC_CFG1, 0);
1495
1496 TSI_WRITE(TSI108_EC_RXCFG,
1497 TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE);
1498
1499 TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT |
1500 TSI108_EC_TXQ_CFG_EOQ_OWN_INT |
1501 TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT <<
1502 TSI108_EC_TXQ_CFG_SFNPORT));
1503
1504 TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT |
1505 TSI108_EC_RXQ_CFG_EOQ_OWN_INT |
1506 TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT <<
1507 TSI108_EC_RXQ_CFG_SFNPORT));
1508
1509 TSI_WRITE(TSI108_EC_TXQ_BUFCFG,
1510 TSI108_EC_TXQ_BUFCFG_BURST256 |
1511 TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
1512 TSI108_EC_TXQ_BUFCFG_SFNPORT));
1513
1514 TSI_WRITE(TSI108_EC_RXQ_BUFCFG,
1515 TSI108_EC_RXQ_BUFCFG_BURST256 |
1516 TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
1517 TSI108_EC_RXQ_BUFCFG_SFNPORT));
1518
1519 TSI_WRITE(TSI108_EC_INTMASK, ~0);
1520}
1521
1522static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1523{
1524 struct tsi108_prv_data *data = netdev_priv(dev);
1525 return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL);
1526}
1527
1528static int
1529tsi108_init_one(struct platform_device *pdev)
1530{
1531 struct net_device *dev = NULL;
1532 struct tsi108_prv_data *data = NULL;
1533 hw_info *einfo;
1534 int err = 0;
0795af57 1535 DECLARE_MAC_BUF(mac);
5e123b84
ZR		 1536
1537 einfo = pdev->dev.platform_data;
1538
1539 if (NULL == einfo) {
1540 printk(KERN_ERR "tsi-eth %d: Missing additional data!\n",
1541 pdev->id);
1542 return -ENODEV;
1543 }
1544
1545 /* Create an ethernet device instance */
1546
1547 dev = alloc_etherdev(sizeof(struct tsi108_prv_data));
1548 if (!dev) {
1549 printk("tsi108_eth: Could not allocate a device structure\n");
1550 return -ENOMEM;
1551 }
1552
1553 printk("tsi108_eth%d: probe...\n", pdev->id);
1554 data = netdev_priv(dev);
bea3348e 1555 data->dev = dev;
5e123b84
ZR		 1556
1557 pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n",
1558 pdev->id, einfo->regs, einfo->phyregs,
1559 einfo->phy, einfo->irq_num);
1560
1561 data->regs = ioremap(einfo->regs, 0x400);
1562 if (NULL == data->regs) {
1563 err = -ENOMEM;
1564 goto regs_fail;
1565 }
1566
1567 data->phyregs = ioremap(einfo->phyregs, 0x400);
1568 if (NULL == data->phyregs) {
1569 err = -ENOMEM;
1570 goto regs_fail;
1571 }
1572/* MII setup */
1573 data->mii_if.dev = dev;
1574 data->mii_if.mdio_read = tsi108_mdio_read;
1575 data->mii_if.mdio_write = tsi108_mdio_write;
1576 data->mii_if.phy_id = einfo->phy;
1577 data->mii_if.phy_id_mask = 0x1f;
1578 data->mii_if.reg_num_mask = 0x1f;
5e123b84
ZR		 1579
1580 data->phy = einfo->phy;
c1b78d05 1581 data->phy_type = einfo->phy_type;
5e123b84
ZR		 1582 data->irq_num = einfo->irq_num;
1583 data->id = pdev->id;
1584 dev->open = tsi108_open;
1585 dev->stop = tsi108_close;
1586 dev->hard_start_xmit = tsi108_send_packet;
1587 dev->set_mac_address = tsi108_set_mac;
1588 dev->set_multicast_list = tsi108_set_rx_mode;
1589 dev->get_stats = tsi108_get_stats;
bea3348e 1590 netif_napi_add(dev, &data->napi, tsi108_poll, 64);
5e123b84 1591 dev->do_ioctl = tsi108_do_ioctl;
5e123b84
ZR		 1592
1593 /* Apparently, the Linux networking code won't use scatter-gather
1594 * if the hardware doesn't do checksums. However, it's faster
1595 * to checksum in place and use SG, as (among other reasons)
1596 * the cache won't be dirtied (which then has to be flushed
1597 * before DMA). The checksumming is done by the driver (via
1598 * a new function skb_csum_dev() in net/core/skbuff.c).
1599 */
1600
1601 dev->features = NETIF_F_HIGHDMA;
5e123b84
ZR		 1602
1603 spin_lock_init(&data->txlock);
1604 spin_lock_init(&data->misclock);
1605
1606 tsi108_reset_ether(data);
1607 tsi108_kill_phy(dev);
1608
1609 if ((err = tsi108_get_mac(dev)) != 0) {
1610 printk(KERN_ERR "%s: Invalid MAC address. Please correct.\n",
1611 dev->name);
1612 goto register_fail;
1613 }
1614
1615 tsi108_init_mac(dev);
1616 err = register_netdev(dev);
1617 if (err) {
1618 printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
1619 dev->name);
1620 goto register_fail;
1621 }
1622
a235ef2c 1623 platform_set_drvdata(pdev, dev);
c9b2ca73 1624 printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: %s\n",
0795af57 1625 dev->name, print_mac(mac, dev->dev_addr));
5e123b84
ZR		 1626#ifdef DEBUG
1627 data->msg_enable = DEBUG;
1628 dump_eth_one(dev);
1629#endif
1630
1631 return 0;
1632
1633register_fail:
1634 iounmap(data->regs);
1635 iounmap(data->phyregs);
1636
1637regs_fail:
1638 free_netdev(dev);
1639 return err;
1640}
1641
1642/* There's no way to either get interrupts from the PHY when
1643 * something changes, or to have the Tsi108 automatically communicate
1644 * with the PHY to reconfigure itself.
1645 *
1646 * Thus, we have to do it using a timer.
1647 */
1648
1649static void tsi108_timed_checker(unsigned long dev_ptr)
1650{
1651 struct net_device *dev = (struct net_device *)dev_ptr;
1652 struct tsi108_prv_data *data = netdev_priv(dev);
1653
1654 tsi108_check_phy(dev);
1655 tsi108_check_rxring(dev);
1656 mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL);
1657}
1658
1659static int tsi108_ether_init(void)
1660{
1661 int ret;
1662 ret = platform_driver_register (&tsi_eth_driver);
1663 if (ret < 0){
1664 printk("tsi108_ether_init: error initializing ethernet "
1665 "device\n");
1666 return ret;
1667 }
1668 return 0;
1669}
1670
1671static int tsi108_ether_remove(struct platform_device *pdev)
1672{
1673 struct net_device *dev = platform_get_drvdata(pdev);
1674 struct tsi108_prv_data *priv = netdev_priv(dev);
1675
1676 unregister_netdev(dev);
1677 tsi108_stop_ethernet(dev);
1678 platform_set_drvdata(pdev, NULL);
1679 iounmap(priv->regs);
1680 iounmap(priv->phyregs);
1681 free_netdev(dev);
1682
1683 return 0;
1684}
1685static void tsi108_ether_exit(void)
1686{
1687 platform_driver_unregister(&tsi_eth_driver);
1688}
1689
1690module_init(tsi108_ether_init);
1691module_exit(tsi108_ether_exit);
1692
1693MODULE_AUTHOR("Tundra Semiconductor Corporation");
1694MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver");
1695MODULE_LICENSE("GPL");
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