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Merge commit 'v2.6.29' into timers/core
[mirror_ubuntu-jammy-kernel.git] / drivers / net / tulip / tulip_core.c
CommitLineData
78a65518 1/* tulip_core.c: A DEC 21x4x-family ethernet driver for Linux.
1da177e4 2
1da177e4
LT		 3 Copyright 2000,2001 The Linux Kernel Team
4 Written/copyright 1994-2001 by Donald Becker.
5
6 This software may be used and distributed according to the terms
7 of the GNU General Public License, incorporated herein by reference.
8
9 Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html}
78a65518 10 for more information on this driver.
1da177e4 11
78a65518 12 Please submit bugs to http://bugzilla.kernel.org/ .
1da177e4
LT		 13*/
14
1da177e4
LT		 15
16#define DRV_NAME "tulip"
17#ifdef CONFIG_TULIP_NAPI
6bab99be 18#define DRV_VERSION "1.1.15-NAPI" /* Keep at least for test */
1da177e4 19#else
6bab99be 20#define DRV_VERSION "1.1.15"
1da177e4 21#endif
6bab99be 22#define DRV_RELDATE "Feb 27, 2007"
1da177e4
LT		 23
24
25#include <linux/module.h>
26#include <linux/pci.h>
27#include "tulip.h"
28#include <linux/init.h>
29#include <linux/etherdevice.h>
30#include <linux/delay.h>
31#include <linux/mii.h>
32#include <linux/ethtool.h>
33#include <linux/crc32.h>
34#include <asm/unaligned.h>
35#include <asm/uaccess.h>
36
49345103 37#ifdef CONFIG_SPARC
d297c31f 38#include <asm/prom.h>
1da177e4
LT		 39#endif
40
41static char version[] __devinitdata =
42 "Linux Tulip driver version " DRV_VERSION " (" DRV_RELDATE ")\n";
43
44
45/* A few user-configurable values. */
46
47/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
48static unsigned int max_interrupt_work = 25;
49
50#define MAX_UNITS 8
51/* Used to pass the full-duplex flag, etc. */
52static int full_duplex[MAX_UNITS];
53static int options[MAX_UNITS];
54static int mtu[MAX_UNITS]; /* Jumbo MTU for interfaces. */
55
56/* The possible media types that can be set in options[] are: */
57const char * const medianame[32] = {
58 "10baseT", "10base2", "AUI", "100baseTx",
59 "10baseT-FDX", "100baseTx-FDX", "100baseT4", "100baseFx",
60 "100baseFx-FDX", "MII 10baseT", "MII 10baseT-FDX", "MII",
61 "10baseT(forced)", "MII 100baseTx", "MII 100baseTx-FDX", "MII 100baseT4",
62 "MII 100baseFx-HDX", "MII 100baseFx-FDX", "Home-PNA 1Mbps", "Invalid-19",
63 "","","","", "","","","", "","","","Transceiver reset",
64};
65
66/* Set the copy breakpoint for the copy-only-tiny-buffer Rx structure. */
67#if defined(__alpha__) || defined(__arm__) || defined(__hppa__) \
49345103 68 || defined(CONFIG_SPARC) || defined(__ia64__) \
1da177e4
LT		 69 || defined(__sh__) || defined(__mips__)
70static int rx_copybreak = 1518;
71#else
72static int rx_copybreak = 100;
73#endif
74
75/*
76 Set the bus performance register.
77 Typical: Set 16 longword cache alignment, no burst limit.
78 Cache alignment bits 15:14 Burst length 13:8
79 0000 No alignment 0x00000000 unlimited 0800 8 longwords
80 4000 8 longwords 0100 1 longword 1000 16 longwords
81 8000 16 longwords 0200 2 longwords 2000 32 longwords
82 C000 32 longwords 0400 4 longwords
83 Warning: many older 486 systems are broken and require setting 0x00A04800
84 8 longword cache alignment, 8 longword burst.
85 ToDo: Non-Intel setting could be better.
86*/
87
88#if defined(__alpha__) || defined(__ia64__)
89static int csr0 = 0x01A00000 | 0xE000;
90#elif defined(__i386__) || defined(__powerpc__) || defined(__x86_64__)
91static int csr0 = 0x01A00000 | 0x8000;
49345103 92#elif defined(CONFIG_SPARC) || defined(__hppa__)
1da177e4
LT		 93/* The UltraSparc PCI controllers will disconnect at every 64-byte
94 * crossing anyways so it makes no sense to tell Tulip to burst
95 * any more than that.
96 */
97static int csr0 = 0x01A00000 | 0x9000;
98#elif defined(__arm__) || defined(__sh__)
99static int csr0 = 0x01A00000 | 0x4800;
100#elif defined(__mips__)
101static int csr0 = 0x00200000 | 0x4000;
102#else
103#warning Processor architecture undefined!
104static int csr0 = 0x00A00000 | 0x4800;
105#endif
106
107/* Operational parameters that usually are not changed. */
108/* Time in jiffies before concluding the transmitter is hung. */
109#define TX_TIMEOUT (4*HZ)
110
111
112MODULE_AUTHOR("The Linux Kernel Team");
113MODULE_DESCRIPTION("Digital 21*4* Tulip ethernet driver");
114MODULE_LICENSE("GPL");
115MODULE_VERSION(DRV_VERSION);
116module_param(tulip_debug, int, 0);
117module_param(max_interrupt_work, int, 0);
118module_param(rx_copybreak, int, 0);
119module_param(csr0, int, 0);
120module_param_array(options, int, NULL, 0);
121module_param_array(full_duplex, int, NULL, 0);
122
123#define PFX DRV_NAME ": "
124
125#ifdef TULIP_DEBUG
126int tulip_debug = TULIP_DEBUG;
127#else
128int tulip_debug = 1;
129#endif
130
0bb3cf72
FR		 131static void tulip_timer(unsigned long data)
132{
133 struct net_device *dev = (struct net_device *)data;
134 struct tulip_private *tp = netdev_priv(dev);
1da177e4 135
0bb3cf72
FR		 136 if (netif_running(dev))
137 schedule_work(&tp->media_work);
138}
1da177e4
LT		 139
140/*
141 * This table use during operation for capabilities and media timer.
142 *
143 * It is indexed via the values in 'enum chips'
144 */
145
146struct tulip_chip_table tulip_tbl[] = {
147 { }, /* placeholder for array, slot unused currently */
148 { }, /* placeholder for array, slot unused currently */
149
150 /* DC21140 */
151 { "Digital DS21140 Tulip", 128, 0x0001ebef,
0bb3cf72
FR		 152 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_PCI_MWI, tulip_timer,
153 tulip_media_task },
1da177e4
LT		 154
155 /* DC21142, DC21143 */
b892de0b 156 { "Digital DS21142/43 Tulip", 128, 0x0801fbff,
1da177e4 157 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI | HAS_NWAY
0bb3cf72 158 | HAS_INTR_MITIGATION | HAS_PCI_MWI, tulip_timer, t21142_media_task },
1da177e4
LT		 159
160 /* LC82C168 */
161 { "Lite-On 82c168 PNIC", 256, 0x0001fbef,
0bb3cf72 162 HAS_MII | HAS_PNICNWAY, pnic_timer, },
1da177e4
LT		 163
164 /* MX98713 */
165 { "Macronix 98713 PMAC", 128, 0x0001ebef,
0bb3cf72 166 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer, },
1da177e4
LT		 167
168 /* MX98715 */
169 { "Macronix 98715 PMAC", 256, 0x0001ebef,
0bb3cf72 170 HAS_MEDIA_TABLE, mxic_timer, },
1da177e4
LT		 171
172 /* MX98725 */
173 { "Macronix 98725 PMAC", 256, 0x0001ebef,
0bb3cf72 174 HAS_MEDIA_TABLE, mxic_timer, },
1da177e4
LT		 175
176 /* AX88140 */
177 { "ASIX AX88140", 128, 0x0001fbff,
178 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | MC_HASH_ONLY
0bb3cf72 179 | IS_ASIX, tulip_timer, tulip_media_task },
1da177e4
LT		 180
181 /* PNIC2 */
182 { "Lite-On PNIC-II", 256, 0x0801fbff,
0bb3cf72 183 HAS_MII | HAS_NWAY | HAS_8023X | HAS_PCI_MWI, pnic2_timer, },
1da177e4
LT		 184
185 /* COMET */
186 { "ADMtek Comet", 256, 0x0001abef,
0bb3cf72 187 HAS_MII | MC_HASH_ONLY | COMET_MAC_ADDR, comet_timer, },
1da177e4
LT		 188
189 /* COMPEX9881 */
190 { "Compex 9881 PMAC", 128, 0x0001ebef,
0bb3cf72 191 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer, },
1da177e4
LT		 192
193 /* I21145 */
194 { "Intel DS21145 Tulip", 128, 0x0801fbff,
195 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI
0bb3cf72 196 | HAS_NWAY | HAS_PCI_MWI, tulip_timer, tulip_media_task },
1da177e4
LT		 197
198 /* DM910X */
199 { "Davicom DM9102/DM9102A", 128, 0x0001ebef,
200 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_ACPI,
0bb3cf72 201 tulip_timer, tulip_media_task },
1da177e4
LT		 202
203 /* RS7112 */
204 { "Conexant LANfinity", 256, 0x0001ebef,
0bb3cf72 205 HAS_MII | HAS_ACPI, tulip_timer, tulip_media_task },
1da177e4 206
1da177e4
LT		 207};
208
209
210static struct pci_device_id tulip_pci_tbl[] = {
211 { 0x1011, 0x0009, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21140 },
212 { 0x1011, 0x0019, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21143 },
213 { 0x11AD, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, LC82C168 },
214 { 0x10d9, 0x0512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98713 },
215 { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
216/* { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98725 },*/
217 { 0x125B, 0x1400, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AX88140 },
218 { 0x11AD, 0xc115, PCI_ANY_ID, PCI_ANY_ID, 0, 0, PNIC2 },
219 { 0x1317, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
220 { 0x1317, 0x0985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
221 { 0x1317, 0x1985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
222 { 0x1317, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
223 { 0x13D1, 0xAB02, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
224 { 0x13D1, 0xAB03, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
225 { 0x13D1, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
226 { 0x104A, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
227 { 0x104A, 0x2774, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
228 { 0x1259, 0xa120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
229 { 0x11F6, 0x9881, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMPEX9881 },
230 { 0x8086, 0x0039, PCI_ANY_ID, PCI_ANY_ID, 0, 0, I21145 },
231 { 0x1282, 0x9100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
232 { 0x1282, 0x9102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
233 { 0x1113, 0x1216, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
234 { 0x1113, 0x1217, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
235 { 0x1113, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
236 { 0x1186, 0x1541, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
237 { 0x1186, 0x1561, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
238 { 0x1186, 0x1591, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
239 { 0x14f1, 0x1803, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CONEXANT },
240 { 0x1626, 0x8410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
241 { 0x1737, 0xAB09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
242 { 0x1737, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
243 { 0x17B3, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
1da177e4 244 { 0x10b7, 0x9300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* 3Com 3CSOHO100B-TX */
9b25978e 245 { 0x14ea, 0xab08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* Planex FNW-3602-TX */
1a449358 246 { 0x1414, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
1da177e4
LT		 247 { } /* terminate list */
248};
249MODULE_DEVICE_TABLE(pci, tulip_pci_tbl);
250
251
252/* A full-duplex map for media types. */
253const char tulip_media_cap[32] =
254{0,0,0,16, 3,19,16,24, 27,4,7,5, 0,20,23,20, 28,31,0,0, };
255
256static void tulip_tx_timeout(struct net_device *dev);
257static void tulip_init_ring(struct net_device *dev);
69145635 258static void tulip_free_ring(struct net_device *dev);
1da177e4
LT		 259static int tulip_start_xmit(struct sk_buff *skb, struct net_device *dev);
260static int tulip_open(struct net_device *dev);
261static int tulip_close(struct net_device *dev);
262static void tulip_up(struct net_device *dev);
263static void tulip_down(struct net_device *dev);
264static struct net_device_stats *tulip_get_stats(struct net_device *dev);
265static int private_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
266static void set_rx_mode(struct net_device *dev);
267#ifdef CONFIG_NET_POLL_CONTROLLER
268static void poll_tulip(struct net_device *dev);
269#endif
270
271static void tulip_set_power_state (struct tulip_private *tp,
272 int sleep, int snooze)
273{
274 if (tp->flags & HAS_ACPI) {
275 u32 tmp, newtmp;
276 pci_read_config_dword (tp->pdev, CFDD, &tmp);
277 newtmp = tmp & ~(CFDD_Sleep | CFDD_Snooze);
278 if (sleep)
279 newtmp |= CFDD_Sleep;
280 else if (snooze)
281 newtmp |= CFDD_Snooze;
282 if (tmp != newtmp)
283 pci_write_config_dword (tp->pdev, CFDD, newtmp);
284 }
285
286}
287
288
289static void tulip_up(struct net_device *dev)
290{
291 struct tulip_private *tp = netdev_priv(dev);
292 void __iomem *ioaddr = tp->base_addr;
293 int next_tick = 3*HZ;
b4482a4b 294 u32 reg;
1da177e4
LT		 295 int i;
296
bea3348e
SH		 297#ifdef CONFIG_TULIP_NAPI
298 napi_enable(&tp->napi);
299#endif
300
1da177e4
LT		 301 /* Wake the chip from sleep/snooze mode. */
302 tulip_set_power_state (tp, 0, 0);
303
304 /* On some chip revs we must set the MII/SYM port before the reset!? */
305 if (tp->mii_cnt || (tp->mtable && tp->mtable->has_mii))
306 iowrite32(0x00040000, ioaddr + CSR6);
307
308 /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
309 iowrite32(0x00000001, ioaddr + CSR0);
b4482a4b 310 pci_read_config_dword(tp->pdev, PCI_COMMAND, &reg); /* flush write */
1da177e4
LT		 311 udelay(100);
312
313 /* Deassert reset.
314 Wait the specified 50 PCI cycles after a reset by initializing
315 Tx and Rx queues and the address filter list. */
316 iowrite32(tp->csr0, ioaddr + CSR0);
b4482a4b 317 pci_read_config_dword(tp->pdev, PCI_COMMAND, &reg); /* flush write */
1da177e4
LT		 318 udelay(100);
319
320 if (tulip_debug > 1)
321 printk(KERN_DEBUG "%s: tulip_up(), irq==%d.\n", dev->name, dev->irq);
322
323 iowrite32(tp->rx_ring_dma, ioaddr + CSR3);
324 iowrite32(tp->tx_ring_dma, ioaddr + CSR4);
325 tp->cur_rx = tp->cur_tx = 0;
326 tp->dirty_rx = tp->dirty_tx = 0;
327
328 if (tp->flags & MC_HASH_ONLY) {
6caf52a4
HH		 329 u32 addr_low = get_unaligned_le32(dev->dev_addr);
330 u32 addr_high = get_unaligned_le16(dev->dev_addr + 4);
1da177e4
LT		 331 if (tp->chip_id == AX88140) {
332 iowrite32(0, ioaddr + CSR13);
333 iowrite32(addr_low, ioaddr + CSR14);
334 iowrite32(1, ioaddr + CSR13);
335 iowrite32(addr_high, ioaddr + CSR14);
336 } else if (tp->flags & COMET_MAC_ADDR) {
337 iowrite32(addr_low, ioaddr + 0xA4);
338 iowrite32(addr_high, ioaddr + 0xA8);
339 iowrite32(0, ioaddr + 0xAC);
340 iowrite32(0, ioaddr + 0xB0);
341 }
342 } else {
343 /* This is set_rx_mode(), but without starting the transmitter. */
344 u16 *eaddrs = (u16 *)dev->dev_addr;
345 u16 *setup_frm = &tp->setup_frame[15*6];
346 dma_addr_t mapping;
347
348 /* 21140 bug: you must add the broadcast address. */
349 memset(tp->setup_frame, 0xff, sizeof(tp->setup_frame));
350 /* Fill the final entry of the table with our physical address. */
351 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
352 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
353 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
354
355 mapping = pci_map_single(tp->pdev, tp->setup_frame,
356 sizeof(tp->setup_frame),
357 PCI_DMA_TODEVICE);
358 tp->tx_buffers[tp->cur_tx].skb = NULL;
359 tp->tx_buffers[tp->cur_tx].mapping = mapping;
360
361 /* Put the setup frame on the Tx list. */
362 tp->tx_ring[tp->cur_tx].length = cpu_to_le32(0x08000000 | 192);
363 tp->tx_ring[tp->cur_tx].buffer1 = cpu_to_le32(mapping);
364 tp->tx_ring[tp->cur_tx].status = cpu_to_le32(DescOwned);
365
366 tp->cur_tx++;
367 }
368
369 tp->saved_if_port = dev->if_port;
370 if (dev->if_port == 0)
371 dev->if_port = tp->default_port;
372
373 /* Allow selecting a default media. */
374 i = 0;
375 if (tp->mtable == NULL)
376 goto media_picked;
377 if (dev->if_port) {
378 int looking_for = tulip_media_cap[dev->if_port] & MediaIsMII ? 11 :
379 (dev->if_port == 12 ? 0 : dev->if_port);
380 for (i = 0; i < tp->mtable->leafcount; i++)
381 if (tp->mtable->mleaf[i].media == looking_for) {
382 printk(KERN_INFO "%s: Using user-specified media %s.\n",
383 dev->name, medianame[dev->if_port]);
384 goto media_picked;
385 }
386 }
387 if ((tp->mtable->defaultmedia & 0x0800) == 0) {
388 int looking_for = tp->mtable->defaultmedia & MEDIA_MASK;
389 for (i = 0; i < tp->mtable->leafcount; i++)
390 if (tp->mtable->mleaf[i].media == looking_for) {
391 printk(KERN_INFO "%s: Using EEPROM-set media %s.\n",
392 dev->name, medianame[looking_for]);
393 goto media_picked;
394 }
395 }
396 /* Start sensing first non-full-duplex media. */
397 for (i = tp->mtable->leafcount - 1;
398 (tulip_media_cap[tp->mtable->mleaf[i].media] & MediaAlwaysFD) && i > 0; i--)
399 ;
400media_picked:
401
402 tp->csr6 = 0;
403 tp->cur_index = i;
404 tp->nwayset = 0;
405
406 if (dev->if_port) {
407 if (tp->chip_id == DC21143 &&
408 (tulip_media_cap[dev->if_port] & MediaIsMII)) {
409 /* We must reset the media CSRs when we force-select MII mode. */
410 iowrite32(0x0000, ioaddr + CSR13);
411 iowrite32(0x0000, ioaddr + CSR14);
412 iowrite32(0x0008, ioaddr + CSR15);
413 }
414 tulip_select_media(dev, 1);
415 } else if (tp->chip_id == DC21142) {
416 if (tp->mii_cnt) {
417 tulip_select_media(dev, 1);
418 if (tulip_debug > 1)
419 printk(KERN_INFO "%s: Using MII transceiver %d, status "
420 "%4.4x.\n",
421 dev->name, tp->phys[0], tulip_mdio_read(dev, tp->phys[0], 1));
422 iowrite32(csr6_mask_defstate, ioaddr + CSR6);
423 tp->csr6 = csr6_mask_hdcap;
424 dev->if_port = 11;
425 iowrite32(0x0000, ioaddr + CSR13);
426 iowrite32(0x0000, ioaddr + CSR14);
427 } else
428 t21142_start_nway(dev);
429 } else if (tp->chip_id == PNIC2) {
430 /* for initial startup advertise 10/100 Full and Half */
431 tp->sym_advertise = 0x01E0;
432 /* enable autonegotiate end interrupt */
433 iowrite32(ioread32(ioaddr+CSR5)| 0x00008010, ioaddr + CSR5);
434 iowrite32(ioread32(ioaddr+CSR7)| 0x00008010, ioaddr + CSR7);
435 pnic2_start_nway(dev);
436 } else if (tp->chip_id == LC82C168 && ! tp->medialock) {
437 if (tp->mii_cnt) {
438 dev->if_port = 11;
439 tp->csr6 = 0x814C0000 | (tp->full_duplex ? 0x0200 : 0);
440 iowrite32(0x0001, ioaddr + CSR15);
441 } else if (ioread32(ioaddr + CSR5) & TPLnkPass)
442 pnic_do_nway(dev);
443 else {
444 /* Start with 10mbps to do autonegotiation. */
445 iowrite32(0x32, ioaddr + CSR12);
446 tp->csr6 = 0x00420000;
447 iowrite32(0x0001B078, ioaddr + 0xB8);
448 iowrite32(0x0201B078, ioaddr + 0xB8);
449 next_tick = 1*HZ;
450 }
451 } else if ((tp->chip_id == MX98713 || tp->chip_id == COMPEX9881)
452 && ! tp->medialock) {
453 dev->if_port = 0;
454 tp->csr6 = 0x01880000 | (tp->full_duplex ? 0x0200 : 0);
455 iowrite32(0x0f370000 | ioread16(ioaddr + 0x80), ioaddr + 0x80);
456 } else if (tp->chip_id == MX98715 || tp->chip_id == MX98725) {
457 /* Provided by BOLO, Macronix - 12/10/1998. */
458 dev->if_port = 0;
459 tp->csr6 = 0x01a80200;
460 iowrite32(0x0f370000 | ioread16(ioaddr + 0x80), ioaddr + 0x80);
461 iowrite32(0x11000 | ioread16(ioaddr + 0xa0), ioaddr + 0xa0);
462 } else if (tp->chip_id == COMET || tp->chip_id == CONEXANT) {
463 /* Enable automatic Tx underrun recovery. */
464 iowrite32(ioread32(ioaddr + 0x88) | 1, ioaddr + 0x88);
465 dev->if_port = tp->mii_cnt ? 11 : 0;
466 tp->csr6 = 0x00040000;
467 } else if (tp->chip_id == AX88140) {
468 tp->csr6 = tp->mii_cnt ? 0x00040100 : 0x00000100;
469 } else
470 tulip_select_media(dev, 1);
471
472 /* Start the chip's Tx to process setup frame. */
473 tulip_stop_rxtx(tp);
474 barrier();
475 udelay(5);
476 iowrite32(tp->csr6 | TxOn, ioaddr + CSR6);
477
478 /* Enable interrupts by setting the interrupt mask. */
479 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR5);
480 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR7);
481 tulip_start_rxtx(tp);
482 iowrite32(0, ioaddr + CSR2); /* Rx poll demand */
483
484 if (tulip_debug > 2) {
485 printk(KERN_DEBUG "%s: Done tulip_up(), CSR0 %8.8x, CSR5 %8.8x CSR6 %8.8x.\n",
486 dev->name, ioread32(ioaddr + CSR0), ioread32(ioaddr + CSR5),
487 ioread32(ioaddr + CSR6));
488 }
489
490 /* Set the timer to switch to check for link beat and perhaps switch
491 to an alternate media type. */
492 tp->timer.expires = RUN_AT(next_tick);
493 add_timer(&tp->timer);
494#ifdef CONFIG_TULIP_NAPI
495 init_timer(&tp->oom_timer);
496 tp->oom_timer.data = (unsigned long)dev;
497 tp->oom_timer.function = oom_timer;
498#endif
499}
500
501static int
502tulip_open(struct net_device *dev)
503{
504 int retval;
505
1da177e4
LT		 506 tulip_init_ring (dev);
507
69145635
KM		 508 retval = request_irq(dev->irq, &tulip_interrupt, IRQF_SHARED, dev->name, dev);
509 if (retval)
510 goto free_ring;
511
1da177e4
LT		 512 tulip_up (dev);
513
514 netif_start_queue (dev);
515
516 return 0;
69145635
KM		 517
518free_ring:
519 tulip_free_ring (dev);
520 return retval;
1da177e4
LT		 521}
522
523
524static void tulip_tx_timeout(struct net_device *dev)
525{
526 struct tulip_private *tp = netdev_priv(dev);
527 void __iomem *ioaddr = tp->base_addr;
528 unsigned long flags;
529
530 spin_lock_irqsave (&tp->lock, flags);
531
532 if (tulip_media_cap[dev->if_port] & MediaIsMII) {
533 /* Do nothing -- the media monitor should handle this. */
534 if (tulip_debug > 1)
535 printk(KERN_WARNING "%s: Transmit timeout using MII device.\n",
536 dev->name);
537 } else if (tp->chip_id == DC21140 || tp->chip_id == DC21142
538 || tp->chip_id == MX98713 || tp->chip_id == COMPEX9881
ea8f400c 539 || tp->chip_id == DM910X) {
1da177e4
LT		 540 printk(KERN_WARNING "%s: 21140 transmit timed out, status %8.8x, "
541 "SIA %8.8x %8.8x %8.8x %8.8x, resetting...\n",
542 dev->name, ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR12),
543 ioread32(ioaddr + CSR13), ioread32(ioaddr + CSR14), ioread32(ioaddr + CSR15));
0bb3cf72
FR		 544 tp->timeout_recovery = 1;
545 schedule_work(&tp->media_work);
546 goto out_unlock;
1da177e4
LT		 547 } else if (tp->chip_id == PNIC2) {
548 printk(KERN_WARNING "%s: PNIC2 transmit timed out, status %8.8x, "
549 "CSR6/7 %8.8x / %8.8x CSR12 %8.8x, resetting...\n",
550 dev->name, (int)ioread32(ioaddr + CSR5), (int)ioread32(ioaddr + CSR6),
551 (int)ioread32(ioaddr + CSR7), (int)ioread32(ioaddr + CSR12));
552 } else {
553 printk(KERN_WARNING "%s: Transmit timed out, status %8.8x, CSR12 "
554 "%8.8x, resetting...\n",
555 dev->name, ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR12));
556 dev->if_port = 0;
557 }
558
559#if defined(way_too_many_messages)
560 if (tulip_debug > 3) {
561 int i;
562 for (i = 0; i < RX_RING_SIZE; i++) {
563 u8 *buf = (u8 *)(tp->rx_ring[i].buffer1);
564 int j;
565 printk(KERN_DEBUG "%2d: %8.8x %8.8x %8.8x %8.8x "
566 "%2.2x %2.2x %2.2x.\n",
567 i, (unsigned int)tp->rx_ring[i].status,
568 (unsigned int)tp->rx_ring[i].length,
569 (unsigned int)tp->rx_ring[i].buffer1,
570 (unsigned int)tp->rx_ring[i].buffer2,
571 buf[0], buf[1], buf[2]);
572 for (j = 0; buf[j] != 0xee && j < 1600; j++)
573 if (j < 100) printk(" %2.2x", buf[j]);
574 printk(" j=%d.\n", j);
575 }
576 printk(KERN_DEBUG " Rx ring %8.8x: ", (int)tp->rx_ring);
577 for (i = 0; i < RX_RING_SIZE; i++)
578 printk(" %8.8x", (unsigned int)tp->rx_ring[i].status);
579 printk("\n" KERN_DEBUG " Tx ring %8.8x: ", (int)tp->tx_ring);
580 for (i = 0; i < TX_RING_SIZE; i++)
581 printk(" %8.8x", (unsigned int)tp->tx_ring[i].status);
582 printk("\n");
583 }
584#endif
585
0bb3cf72 586 tulip_tx_timeout_complete(tp, ioaddr);
1da177e4 587
0bb3cf72 588out_unlock:
1da177e4
LT		 589 spin_unlock_irqrestore (&tp->lock, flags);
590 dev->trans_start = jiffies;
591 netif_wake_queue (dev);
592}
593
594
595/* Initialize the Rx and Tx rings, along with various 'dev' bits. */
596static void tulip_init_ring(struct net_device *dev)
597{
598 struct tulip_private *tp = netdev_priv(dev);
599 int i;
600
601 tp->susp_rx = 0;
602 tp->ttimer = 0;
603 tp->nir = 0;
604
605 for (i = 0; i < RX_RING_SIZE; i++) {
606 tp->rx_ring[i].status = 0x00000000;
607 tp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ);
608 tp->rx_ring[i].buffer2 = cpu_to_le32(tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * (i + 1));
609 tp->rx_buffers[i].skb = NULL;
610 tp->rx_buffers[i].mapping = 0;
611 }
612 /* Mark the last entry as wrapping the ring. */
613 tp->rx_ring[i-1].length = cpu_to_le32(PKT_BUF_SZ | DESC_RING_WRAP);
614 tp->rx_ring[i-1].buffer2 = cpu_to_le32(tp->rx_ring_dma);
615
616 for (i = 0; i < RX_RING_SIZE; i++) {
617 dma_addr_t mapping;
618
619 /* Note the receive buffer must be longword aligned.
620 dev_alloc_skb() provides 16 byte alignment. But do *not*
621 use skb_reserve() to align the IP header! */
622 struct sk_buff *skb = dev_alloc_skb(PKT_BUF_SZ);
623 tp->rx_buffers[i].skb = skb;
624 if (skb == NULL)
625 break;
689be439 626 mapping = pci_map_single(tp->pdev, skb->data,
1da177e4
LT		 627 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
628 tp->rx_buffers[i].mapping = mapping;
629 skb->dev = dev; /* Mark as being used by this device. */
630 tp->rx_ring[i].status = cpu_to_le32(DescOwned); /* Owned by Tulip chip */
631 tp->rx_ring[i].buffer1 = cpu_to_le32(mapping);
632 }
633 tp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
634
635 /* The Tx buffer descriptor is filled in as needed, but we
636 do need to clear the ownership bit. */
637 for (i = 0; i < TX_RING_SIZE; i++) {
638 tp->tx_buffers[i].skb = NULL;
639 tp->tx_buffers[i].mapping = 0;
640 tp->tx_ring[i].status = 0x00000000;
641 tp->tx_ring[i].buffer2 = cpu_to_le32(tp->tx_ring_dma + sizeof(struct tulip_tx_desc) * (i + 1));
642 }
643 tp->tx_ring[i-1].buffer2 = cpu_to_le32(tp->tx_ring_dma);
644}
645
646static int
647tulip_start_xmit(struct sk_buff *skb, struct net_device *dev)
648{
649 struct tulip_private *tp = netdev_priv(dev);
650 int entry;
651 u32 flag;
652 dma_addr_t mapping;
653
654 spin_lock_irq(&tp->lock);
655
656 /* Calculate the next Tx descriptor entry. */
657 entry = tp->cur_tx % TX_RING_SIZE;
658
659 tp->tx_buffers[entry].skb = skb;
660 mapping = pci_map_single(tp->pdev, skb->data,
661 skb->len, PCI_DMA_TODEVICE);
662 tp->tx_buffers[entry].mapping = mapping;
663 tp->tx_ring[entry].buffer1 = cpu_to_le32(mapping);
664
665 if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE/2) {/* Typical path */
666 flag = 0x60000000; /* No interrupt */
667 } else if (tp->cur_tx - tp->dirty_tx == TX_RING_SIZE/2) {
668 flag = 0xe0000000; /* Tx-done intr. */
669 } else if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE - 2) {
670 flag = 0x60000000; /* No Tx-done intr. */
671 } else { /* Leave room for set_rx_mode() to fill entries. */
672 flag = 0xe0000000; /* Tx-done intr. */
673 netif_stop_queue(dev);
674 }
675 if (entry == TX_RING_SIZE-1)
676 flag = 0xe0000000 | DESC_RING_WRAP;
677
678 tp->tx_ring[entry].length = cpu_to_le32(skb->len | flag);
679 /* if we were using Transmit Automatic Polling, we would need a
680 * wmb() here. */
681 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
682 wmb();
683
684 tp->cur_tx++;
685
686 /* Trigger an immediate transmit demand. */
687 iowrite32(0, tp->base_addr + CSR1);
688
689 spin_unlock_irq(&tp->lock);
690
691 dev->trans_start = jiffies;
692
693 return 0;
694}
695
696static void tulip_clean_tx_ring(struct tulip_private *tp)
697{
698 unsigned int dirty_tx;
699
700 for (dirty_tx = tp->dirty_tx ; tp->cur_tx - dirty_tx > 0;
701 dirty_tx++) {
702 int entry = dirty_tx % TX_RING_SIZE;
703 int status = le32_to_cpu(tp->tx_ring[entry].status);
704
705 if (status < 0) {
706 tp->stats.tx_errors++; /* It wasn't Txed */
707 tp->tx_ring[entry].status = 0;
708 }
709
710 /* Check for Tx filter setup frames. */
711 if (tp->tx_buffers[entry].skb == NULL) {
712 /* test because dummy frames not mapped */
713 if (tp->tx_buffers[entry].mapping)
714 pci_unmap_single(tp->pdev,
715 tp->tx_buffers[entry].mapping,
716 sizeof(tp->setup_frame),
717 PCI_DMA_TODEVICE);
718 continue;
719 }
720
721 pci_unmap_single(tp->pdev, tp->tx_buffers[entry].mapping,
722 tp->tx_buffers[entry].skb->len,
723 PCI_DMA_TODEVICE);
724
725 /* Free the original skb. */
726 dev_kfree_skb_irq(tp->tx_buffers[entry].skb);
727 tp->tx_buffers[entry].skb = NULL;
728 tp->tx_buffers[entry].mapping = 0;
729 }
730}
731
732static void tulip_down (struct net_device *dev)
733{
734 struct tulip_private *tp = netdev_priv(dev);
735 void __iomem *ioaddr = tp->base_addr;
736 unsigned long flags;
737
4bb073c0 738 cancel_work_sync(&tp->media_work);
0bb3cf72 739
bea3348e
SH		 740#ifdef CONFIG_TULIP_NAPI
741 napi_disable(&tp->napi);
742#endif
743
1da177e4
LT		 744 del_timer_sync (&tp->timer);
745#ifdef CONFIG_TULIP_NAPI
746 del_timer_sync (&tp->oom_timer);
747#endif
748 spin_lock_irqsave (&tp->lock, flags);
749
750 /* Disable interrupts by clearing the interrupt mask. */
751 iowrite32 (0x00000000, ioaddr + CSR7);
752
753 /* Stop the Tx and Rx processes. */
754 tulip_stop_rxtx(tp);
755
756 /* prepare receive buffers */
757 tulip_refill_rx(dev);
758
759 /* release any unconsumed transmit buffers */
760 tulip_clean_tx_ring(tp);
761
762 if (ioread32 (ioaddr + CSR6) != 0xffffffff)
763 tp->stats.rx_missed_errors += ioread32 (ioaddr + CSR8) & 0xffff;
764
765 spin_unlock_irqrestore (&tp->lock, flags);
766
767 init_timer(&tp->timer);
768 tp->timer.data = (unsigned long)dev;
769 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
770
771 dev->if_port = tp->saved_if_port;
772
773 /* Leave the driver in snooze, not sleep, mode. */
774 tulip_set_power_state (tp, 0, 1);
775}
776
69145635 777static void tulip_free_ring (struct net_device *dev)
1da177e4
LT		 778{
779 struct tulip_private *tp = netdev_priv(dev);
1da177e4
LT		 780 int i;
781
1da177e4
LT		 782 /* Free all the skbuffs in the Rx queue. */
783 for (i = 0; i < RX_RING_SIZE; i++) {
784 struct sk_buff *skb = tp->rx_buffers[i].skb;
785 dma_addr_t mapping = tp->rx_buffers[i].mapping;
786
787 tp->rx_buffers[i].skb = NULL;
788 tp->rx_buffers[i].mapping = 0;
789
790 tp->rx_ring[i].status = 0; /* Not owned by Tulip chip. */
791 tp->rx_ring[i].length = 0;
76285ee0
AV		 792 /* An invalid address. */
793 tp->rx_ring[i].buffer1 = cpu_to_le32(0xBADF00D0);
1da177e4
LT		 794 if (skb) {
795 pci_unmap_single(tp->pdev, mapping, PKT_BUF_SZ,
796 PCI_DMA_FROMDEVICE);
797 dev_kfree_skb (skb);
798 }
799 }
69145635 800
1da177e4
LT		 801 for (i = 0; i < TX_RING_SIZE; i++) {
802 struct sk_buff *skb = tp->tx_buffers[i].skb;
803
804 if (skb != NULL) {
805 pci_unmap_single(tp->pdev, tp->tx_buffers[i].mapping,
806 skb->len, PCI_DMA_TODEVICE);
807 dev_kfree_skb (skb);
808 }
809 tp->tx_buffers[i].skb = NULL;
810 tp->tx_buffers[i].mapping = 0;
811 }
69145635
KM		 812}
813
814static int tulip_close (struct net_device *dev)
815{
816 struct tulip_private *tp = netdev_priv(dev);
817 void __iomem *ioaddr = tp->base_addr;
818
819 netif_stop_queue (dev);
820
821 tulip_down (dev);
822
823 if (tulip_debug > 1)
824 printk (KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",
825 dev->name, ioread32 (ioaddr + CSR5));
826
827 free_irq (dev->irq, dev);
828
829 tulip_free_ring (dev);
1da177e4
LT		 830
831 return 0;
832}
833
834static struct net_device_stats *tulip_get_stats(struct net_device *dev)
835{
836 struct tulip_private *tp = netdev_priv(dev);
837 void __iomem *ioaddr = tp->base_addr;
838
839 if (netif_running(dev)) {
840 unsigned long flags;
841
842 spin_lock_irqsave (&tp->lock, flags);
843
844 tp->stats.rx_missed_errors += ioread32(ioaddr + CSR8) & 0xffff;
845
846 spin_unlock_irqrestore(&tp->lock, flags);
847 }
848
849 return &tp->stats;
850}
851
852
853static void tulip_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
854{
855 struct tulip_private *np = netdev_priv(dev);
856 strcpy(info->driver, DRV_NAME);
857 strcpy(info->version, DRV_VERSION);
858 strcpy(info->bus_info, pci_name(np->pdev));
859}
860
7282d491 861static const struct ethtool_ops ops = {
1da177e4
LT		 862 .get_drvinfo = tulip_get_drvinfo
863};
864
865/* Provide ioctl() calls to examine the MII xcvr state. */
866static int private_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
867{
868 struct tulip_private *tp = netdev_priv(dev);
869 void __iomem *ioaddr = tp->base_addr;
870 struct mii_ioctl_data *data = if_mii(rq);
871 const unsigned int phy_idx = 0;
872 int phy = tp->phys[phy_idx] & 0x1f;
873 unsigned int regnum = data->reg_num;
874
875 switch (cmd) {
876 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
877 if (tp->mii_cnt)
878 data->phy_id = phy;
879 else if (tp->flags & HAS_NWAY)
880 data->phy_id = 32;
881 else if (tp->chip_id == COMET)
882 data->phy_id = 1;
883 else
884 return -ENODEV;
885
886 case SIOCGMIIREG: /* Read MII PHY register. */
887 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
888 int csr12 = ioread32 (ioaddr + CSR12);
889 int csr14 = ioread32 (ioaddr + CSR14);
890 switch (regnum) {
891 case 0:
892 if (((csr14<<5) & 0x1000) ||
893 (dev->if_port == 5 && tp->nwayset))
894 data->val_out = 0x1000;
895 else
896 data->val_out = (tulip_media_cap[dev->if_port]&MediaIs100 ? 0x2000 : 0)
897 | (tulip_media_cap[dev->if_port]&MediaIsFD ? 0x0100 : 0);
898 break;
899 case 1:
900 data->val_out =
901 0x1848 +
902 ((csr12&0x7000) == 0x5000 ? 0x20 : 0) +
903 ((csr12&0x06) == 6 ? 0 : 4);
904 data->val_out |= 0x6048;
905 break;
906 case 4:
907 /* Advertised value, bogus 10baseTx-FD value from CSR6. */
908 data->val_out =
909 ((ioread32(ioaddr + CSR6) >> 3) & 0x0040) +
910 ((csr14 >> 1) & 0x20) + 1;
911 data->val_out |= ((csr14 >> 9) & 0x03C0);
912 break;
913 case 5: data->val_out = tp->lpar; break;
914 default: data->val_out = 0; break;
915 }
916 } else {
917 data->val_out = tulip_mdio_read (dev, data->phy_id & 0x1f, regnum);
918 }
919 return 0;
920
921 case SIOCSMIIREG: /* Write MII PHY register. */
922 if (!capable (CAP_NET_ADMIN))
923 return -EPERM;
924 if (regnum & ~0x1f)
925 return -EINVAL;
926 if (data->phy_id == phy) {
927 u16 value = data->val_in;
928 switch (regnum) {
929 case 0: /* Check for autonegotiation on or reset. */
930 tp->full_duplex_lock = (value & 0x9000) ? 0 : 1;
931 if (tp->full_duplex_lock)
932 tp->full_duplex = (value & 0x0100) ? 1 : 0;
933 break;
934 case 4:
935 tp->advertising[phy_idx] =
936 tp->mii_advertise = data->val_in;
937 break;
938 }
939 }
940 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
941 u16 value = data->val_in;
942 if (regnum == 0) {
943 if ((value & 0x1200) == 0x1200) {
944 if (tp->chip_id == PNIC2) {
945 pnic2_start_nway (dev);
946 } else {
947 t21142_start_nway (dev);
948 }
949 }
950 } else if (regnum == 4)
951 tp->sym_advertise = value;
952 } else {
953 tulip_mdio_write (dev, data->phy_id & 0x1f, regnum, data->val_in);
954 }
955 return 0;
956 default:
957 return -EOPNOTSUPP;
958 }
959
960 return -EOPNOTSUPP;
961}
962
963
964/* Set or clear the multicast filter for this adaptor.
965 Note that we only use exclusion around actually queueing the
966 new frame, not around filling tp->setup_frame. This is non-deterministic
967 when re-entered but still correct. */
968
969#undef set_bit_le
970#define set_bit_le(i,p) do { ((char *)(p))[(i)/8] |= (1<<((i)%8)); } while(0)
971
972static void build_setup_frame_hash(u16 *setup_frm, struct net_device *dev)
973{
974 struct tulip_private *tp = netdev_priv(dev);
975 u16 hash_table[32];
976 struct dev_mc_list *mclist;
977 int i;
978 u16 *eaddrs;
979
980 memset(hash_table, 0, sizeof(hash_table));
981 set_bit_le(255, hash_table); /* Broadcast entry */
982 /* This should work on big-endian machines as well. */
983 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
984 i++, mclist = mclist->next) {
985 int index = ether_crc_le(ETH_ALEN, mclist->dmi_addr) & 0x1ff;
986
987 set_bit_le(index, hash_table);
988
989 }
990 for (i = 0; i < 32; i++) {
991 *setup_frm++ = hash_table[i];
992 *setup_frm++ = hash_table[i];
993 }
994 setup_frm = &tp->setup_frame[13*6];
995
996 /* Fill the final entry with our physical address. */
997 eaddrs = (u16 *)dev->dev_addr;
998 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
999 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
1000 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
1001}
1002
1003static void build_setup_frame_perfect(u16 *setup_frm, struct net_device *dev)
1004{
1005 struct tulip_private *tp = netdev_priv(dev);
1006 struct dev_mc_list *mclist;
1007 int i;
1008 u16 *eaddrs;
1009
1010 /* We have <= 14 addresses so we can use the wonderful
1011 16 address perfect filtering of the Tulip. */
1012 for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
1013 i++, mclist = mclist->next) {
1014 eaddrs = (u16 *)mclist->dmi_addr;
1015 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1016 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1017 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1018 }
1019 /* Fill the unused entries with the broadcast address. */
1020 memset(setup_frm, 0xff, (15-i)*12);
1021 setup_frm = &tp->setup_frame[15*6];
1022
1023 /* Fill the final entry with our physical address. */
1024 eaddrs = (u16 *)dev->dev_addr;
1025 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
1026 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
1027 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
1028}
1029
1030
1031static void set_rx_mode(struct net_device *dev)
1032{
1033 struct tulip_private *tp = netdev_priv(dev);
1034 void __iomem *ioaddr = tp->base_addr;
1035 int csr6;
1036
1037 csr6 = ioread32(ioaddr + CSR6) & ~0x00D5;
1038
1039 tp->csr6 &= ~0x00D5;
1040 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1041 tp->csr6 |= AcceptAllMulticast | AcceptAllPhys;
1042 csr6 |= AcceptAllMulticast | AcceptAllPhys;
1da177e4
LT		 1043 } else if ((dev->mc_count > 1000) || (dev->flags & IFF_ALLMULTI)) {
1044 /* Too many to filter well -- accept all multicasts. */
1045 tp->csr6 |= AcceptAllMulticast;
1046 csr6 |= AcceptAllMulticast;
1047 } else if (tp->flags & MC_HASH_ONLY) {
1048 /* Some work-alikes have only a 64-entry hash filter table. */
1049 /* Should verify correctness on big-endian/__powerpc__ */
1050 struct dev_mc_list *mclist;
1051 int i;
1052 if (dev->mc_count > 64) { /* Arbitrary non-effective limit. */
1053 tp->csr6 |= AcceptAllMulticast;
1054 csr6 |= AcceptAllMulticast;
1055 } else {
1056 u32 mc_filter[2] = {0, 0}; /* Multicast hash filter */
1057 int filterbit;
1058 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1059 i++, mclist = mclist->next) {
1060 if (tp->flags & COMET_MAC_ADDR)
1061 filterbit = ether_crc_le(ETH_ALEN, mclist->dmi_addr);
1062 else
1063 filterbit = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
1064 filterbit &= 0x3f;
1065 mc_filter[filterbit >> 5] |= 1 << (filterbit & 31);
e174961c
JB		 1066 if (tulip_debug > 2)
1067 printk(KERN_INFO "%s: Added filter for %pM"
0795af57 1068 " %8.8x bit %d.\n",
e174961c 1069 dev->name, mclist->dmi_addr,
0795af57 1070 ether_crc(ETH_ALEN, mclist->dmi_addr), filterbit);
1da177e4
LT		 1071 }
1072 if (mc_filter[0] == tp->mc_filter[0] &&
1073 mc_filter[1] == tp->mc_filter[1])
1074 ; /* No change. */
1075 else if (tp->flags & IS_ASIX) {
1076 iowrite32(2, ioaddr + CSR13);
1077 iowrite32(mc_filter[0], ioaddr + CSR14);
1078 iowrite32(3, ioaddr + CSR13);
1079 iowrite32(mc_filter[1], ioaddr + CSR14);
1080 } else if (tp->flags & COMET_MAC_ADDR) {
1081 iowrite32(mc_filter[0], ioaddr + 0xAC);
1082 iowrite32(mc_filter[1], ioaddr + 0xB0);
1083 }
1084 tp->mc_filter[0] = mc_filter[0];
1085 tp->mc_filter[1] = mc_filter[1];
1086 }
1087 } else {
1088 unsigned long flags;
1089 u32 tx_flags = 0x08000000 | 192;
1090
1091 /* Note that only the low-address shortword of setup_frame is valid!
1092 The values are doubled for big-endian architectures. */
1093 if (dev->mc_count > 14) { /* Must use a multicast hash table. */
1094 build_setup_frame_hash(tp->setup_frame, dev);
1095 tx_flags = 0x08400000 | 192;
1096 } else {
1097 build_setup_frame_perfect(tp->setup_frame, dev);
1098 }
1099
1100 spin_lock_irqsave(&tp->lock, flags);
1101
1102 if (tp->cur_tx - tp->dirty_tx > TX_RING_SIZE - 2) {
1103 /* Same setup recently queued, we need not add it. */
1104 } else {
1105 unsigned int entry;
1106 int dummy = -1;
1107
1108 /* Now add this frame to the Tx list. */
1109
1110 entry = tp->cur_tx++ % TX_RING_SIZE;
1111
1112 if (entry != 0) {
ea8f400c
PC		 1113 /* Avoid a chip errata by prefixing a dummy entry. */
1114 tp->tx_buffers[entry].skb = NULL;
1115 tp->tx_buffers[entry].mapping = 0;
1116 tp->tx_ring[entry].length =
1117 (entry == TX_RING_SIZE-1) ? cpu_to_le32(DESC_RING_WRAP) : 0;
1118 tp->tx_ring[entry].buffer1 = 0;
1119 /* Must set DescOwned later to avoid race with chip */
1120 dummy = entry;
1121 entry = tp->cur_tx++ % TX_RING_SIZE;
1122
1da177e4
LT		 1123 }
1124
1125 tp->tx_buffers[entry].skb = NULL;
1126 tp->tx_buffers[entry].mapping =
1127 pci_map_single(tp->pdev, tp->setup_frame,
1128 sizeof(tp->setup_frame),
1129 PCI_DMA_TODEVICE);
1130 /* Put the setup frame on the Tx list. */
1131 if (entry == TX_RING_SIZE-1)
1132 tx_flags |= DESC_RING_WRAP; /* Wrap ring. */
1133 tp->tx_ring[entry].length = cpu_to_le32(tx_flags);
1134 tp->tx_ring[entry].buffer1 =
1135 cpu_to_le32(tp->tx_buffers[entry].mapping);
1136 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
1137 if (dummy >= 0)
1138 tp->tx_ring[dummy].status = cpu_to_le32(DescOwned);
1139 if (tp->cur_tx - tp->dirty_tx >= TX_RING_SIZE - 2)
1140 netif_stop_queue(dev);
1141
1142 /* Trigger an immediate transmit demand. */
1143 iowrite32(0, ioaddr + CSR1);
1144 }
1145
1146 spin_unlock_irqrestore(&tp->lock, flags);
1147 }
1148
1149 iowrite32(csr6, ioaddr + CSR6);
1150}
1151
1152#ifdef CONFIG_TULIP_MWI
1153static void __devinit tulip_mwi_config (struct pci_dev *pdev,
1154 struct net_device *dev)
1155{
1156 struct tulip_private *tp = netdev_priv(dev);
1157 u8 cache;
1158 u16 pci_command;
1159 u32 csr0;
1160
1161 if (tulip_debug > 3)
1162 printk(KERN_DEBUG "%s: tulip_mwi_config()\n", pci_name(pdev));
1163
1164 tp->csr0 = csr0 = 0;
1165
10c64620
PH		 1166 /* if we have any cache line size at all, we can do MRM and MWI */
1167 csr0 |= MRM | MWI;
1da177e4 1168
10c64620
PH		 1169 /* Enable MWI in the standard PCI command bit.
1170 * Check for the case where MWI is desired but not available
1da177e4 1171 */
10c64620 1172 pci_try_set_mwi(pdev);
1da177e4
LT		 1173
1174 /* read result from hardware (in case bit refused to enable) */
1175 pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
1176 if ((csr0 & MWI) && (!(pci_command & PCI_COMMAND_INVALIDATE)))
1177 csr0 &= ~MWI;
1178
1179 /* if cache line size hardwired to zero, no MWI */
1180 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache);
1181 if ((csr0 & MWI) && (cache == 0)) {
1182 csr0 &= ~MWI;
1183 pci_clear_mwi(pdev);
1184 }
1185
1186 /* assign per-cacheline-size cache alignment and
1187 * burst length values
1188 */
1189 switch (cache) {
1190 case 8:
1191 csr0 |= MRL | (1 << CALShift) | (16 << BurstLenShift);
1192 break;
1193 case 16:
1194 csr0 |= MRL | (2 << CALShift) | (16 << BurstLenShift);
1195 break;
1196 case 32:
1197 csr0 |= MRL | (3 << CALShift) | (32 << BurstLenShift);
1198 break;
1199 default:
1200 cache = 0;
1201 break;
1202 }
1203
1204 /* if we have a good cache line size, we by now have a good
1205 * csr0, so save it and exit
1206 */
1207 if (cache)
1208 goto out;
1209
1210 /* we don't have a good csr0 or cache line size, disable MWI */
1211 if (csr0 & MWI) {
1212 pci_clear_mwi(pdev);
1213 csr0 &= ~MWI;
1214 }
1215
1216 /* sane defaults for burst length and cache alignment
1217 * originally from de4x5 driver
1218 */
1219 csr0 |= (8 << BurstLenShift) | (1 << CALShift);
1220
1221out:
1222 tp->csr0 = csr0;
1223 if (tulip_debug > 2)
1224 printk(KERN_DEBUG "%s: MWI config cacheline=%d, csr0=%08x\n",
1225 pci_name(pdev), cache, csr0);
1226}
1227#endif
1228
1229/*
1230 * Chips that have the MRM/reserved bit quirk and the burst quirk. That
1231 * is the DM910X and the on chip ULi devices
1232 */
f3b197ac 1233
1da177e4
LT		 1234static int tulip_uli_dm_quirk(struct pci_dev *pdev)
1235{
1236 if (pdev->vendor == 0x1282 && pdev->device == 0x9102)
1237 return 1;
1da177e4
LT		 1238 return 0;
1239}
1240
f4266cf3
SH		 1241static const struct net_device_ops tulip_netdev_ops = {
1242 .ndo_open = tulip_open,
1243 .ndo_start_xmit = tulip_start_xmit,
1244 .ndo_tx_timeout = tulip_tx_timeout,
1245 .ndo_stop = tulip_close,
1246 .ndo_get_stats = tulip_get_stats,
1247 .ndo_do_ioctl = private_ioctl,
1248 .ndo_set_multicast_list = set_rx_mode,
1249 .ndo_change_mtu = eth_change_mtu,
1250 .ndo_set_mac_address = eth_mac_addr,
1251 .ndo_validate_addr = eth_validate_addr,
1252#ifdef CONFIG_NET_POLL_CONTROLLER
1253 .ndo_poll_controller = poll_tulip,
1254#endif
1255};
1256
1da177e4
LT		 1257static int __devinit tulip_init_one (struct pci_dev *pdev,
1258 const struct pci_device_id *ent)
1259{
1260 struct tulip_private *tp;
1261 /* See note below on the multiport cards. */
1262 static unsigned char last_phys_addr[6] = {0x00, 'L', 'i', 'n', 'u', 'x'};
1263 static struct pci_device_id early_486_chipsets[] = {
1264 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82424) },
1265 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496) },
1266 { },
1267 };
1268 static int last_irq;
1269 static int multiport_cnt; /* For four-port boards w/one EEPROM */
1da177e4
LT		 1270 int i, irq;
1271 unsigned short sum;
1272 unsigned char *ee_data;
1273 struct net_device *dev;
1274 void __iomem *ioaddr;
1275 static int board_idx = -1;
1276 int chip_idx = ent->driver_data;
1277 const char *chip_name = tulip_tbl[chip_idx].chip_name;
1278 unsigned int eeprom_missing = 0;
1279 unsigned int force_csr0 = 0;
1280
1281#ifndef MODULE
1282 static int did_version; /* Already printed version info. */
1283 if (tulip_debug > 0 && did_version++ == 0)
1284 printk (KERN_INFO "%s", version);
1285#endif
1286
1287 board_idx++;
1288
1289 /*
1290 * Lan media wire a tulip chip to a wan interface. Needs a very
1291 * different driver (lmc driver)
1292 */
1293
1294 if (pdev->subsystem_vendor == PCI_VENDOR_ID_LMC) {
1295 printk (KERN_ERR PFX "skipping LMC card.\n");
1296 return -ENODEV;
1297 }
1298
1299 /*
1300 * Early DM9100's need software CRC and the DMFE driver
1301 */
1302
1303 if (pdev->vendor == 0x1282 && pdev->device == 0x9100)
1304 {
1da177e4 1305 /* Read Chip revision */
8ca7ee6b 1306 if (pdev->revision < 0x30)
1da177e4
LT		 1307 {
1308 printk(KERN_ERR PFX "skipping early DM9100 with Crc bug (use dmfe)\n");
1309 return -ENODEV;
1310 }
1311 }
1312
1313 /*
1314 * Looks for early PCI chipsets where people report hangs
1315 * without the workarounds being on.
1316 */
1317
1318 /* 1. Intel Saturn. Switch to 8 long words burst, 8 long word cache
f3b197ac 1319 aligned. Aries might need this too. The Saturn errata are not
1da177e4
LT		 1320 pretty reading but thankfully it's an old 486 chipset.
1321
1322 2. The dreaded SiS496 486 chipset. Same workaround as Intel
1323 Saturn.
1324 */
1325
1326 if (pci_dev_present(early_486_chipsets)) {
1327 csr0 = MRL | MRM | (8 << BurstLenShift) | (1 << CALShift);
1328 force_csr0 = 1;
1329 }
1330
1331 /* bugfix: the ASIX must have a burst limit or horrible things happen. */
1332 if (chip_idx == AX88140) {
1333 if ((csr0 & 0x3f00) == 0)
1334 csr0 |= 0x2000;
1335 }
1336
1337 /* PNIC doesn't have MWI/MRL/MRM... */
1338 if (chip_idx == LC82C168)
1339 csr0 &= ~0xfff10000; /* zero reserved bits 31:20, 16 */
1340
1341 /* DM9102A has troubles with MRM & clear reserved bits 24:22, 20, 16, 7:1 */
1342 if (tulip_uli_dm_quirk(pdev)) {
1343 csr0 &= ~0x01f100ff;
49345103 1344#if defined(CONFIG_SPARC)
1da177e4
LT		 1345 csr0 = (csr0 & ~0xff00) | 0xe000;
1346#endif
1347 }
1348 /*
1349 * And back to business
1350 */
1351
1352 i = pci_enable_device(pdev);
1353 if (i) {
1354 printk (KERN_ERR PFX
1355 "Cannot enable tulip board #%d, aborting\n",
1356 board_idx);
1357 return i;
1358 }
1359
1360 irq = pdev->irq;
1361
1362 /* alloc_etherdev ensures aligned and zeroed private structures */
1363 dev = alloc_etherdev (sizeof (*tp));
1364 if (!dev) {
1365 printk (KERN_ERR PFX "ether device alloc failed, aborting\n");
1366 return -ENOMEM;
1367 }
1368
1da177e4
LT		 1369 SET_NETDEV_DEV(dev, &pdev->dev);
1370 if (pci_resource_len (pdev, 0) < tulip_tbl[chip_idx].io_size) {
7c7459d1 1371 printk (KERN_ERR PFX "%s: I/O region (0x%llx@0x%llx) too small, "
1da177e4 1372 "aborting\n", pci_name(pdev),
7c7459d1
GKH		 1373 (unsigned long long)pci_resource_len (pdev, 0),
1374 (unsigned long long)pci_resource_start (pdev, 0));
1da177e4
LT		 1375 goto err_out_free_netdev;
1376 }
1377
1378 /* grab all resources from both PIO and MMIO regions, as we
1379 * don't want anyone else messing around with our hardware */
1380 if (pci_request_regions (pdev, "tulip"))
1381 goto err_out_free_netdev;
1382
7f2b1248
GG		 1383 ioaddr = pci_iomap(pdev, TULIP_BAR, tulip_tbl[chip_idx].io_size);
1384
1da177e4
LT		 1385 if (!ioaddr)
1386 goto err_out_free_res;
1387
1da177e4
LT		 1388 /*
1389 * initialize private data structure 'tp'
1390 * it is zeroed and aligned in alloc_etherdev
1391 */
1392 tp = netdev_priv(dev);
c4028958 1393 tp->dev = dev;
1da177e4
LT		 1394
1395 tp->rx_ring = pci_alloc_consistent(pdev,
1396 sizeof(struct tulip_rx_desc) * RX_RING_SIZE +
1397 sizeof(struct tulip_tx_desc) * TX_RING_SIZE,
1398 &tp->rx_ring_dma);
1399 if (!tp->rx_ring)
1400 goto err_out_mtable;
1401 tp->tx_ring = (struct tulip_tx_desc *)(tp->rx_ring + RX_RING_SIZE);
1402 tp->tx_ring_dma = tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * RX_RING_SIZE;
1403
1404 tp->chip_id = chip_idx;
1405 tp->flags = tulip_tbl[chip_idx].flags;
1406 tp->pdev = pdev;
1407 tp->base_addr = ioaddr;
44c10138 1408 tp->revision = pdev->revision;
1da177e4
LT		 1409 tp->csr0 = csr0;
1410 spin_lock_init(&tp->lock);
1411 spin_lock_init(&tp->mii_lock);
1412 init_timer(&tp->timer);
1413 tp->timer.data = (unsigned long)dev;
1414 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
1415
c4028958 1416 INIT_WORK(&tp->media_work, tulip_tbl[tp->chip_id].media_task);
0bb3cf72 1417
1da177e4
LT		 1418 dev->base_addr = (unsigned long)ioaddr;
1419
1420#ifdef CONFIG_TULIP_MWI
1421 if (!force_csr0 && (tp->flags & HAS_PCI_MWI))
1422 tulip_mwi_config (pdev, dev);
1da177e4
LT		 1423#endif
1424
1425 /* Stop the chip's Tx and Rx processes. */
1426 tulip_stop_rxtx(tp);
1427
1428 pci_set_master(pdev);
1429
1430#ifdef CONFIG_GSC
1431 if (pdev->subsystem_vendor == PCI_VENDOR_ID_HP) {
1432 switch (pdev->subsystem_device) {
1433 default:
1434 break;
1435 case 0x1061:
1436 case 0x1062:
1437 case 0x1063:
1438 case 0x1098:
1439 case 0x1099:
1440 case 0x10EE:
1441 tp->flags |= HAS_SWAPPED_SEEPROM | NEEDS_FAKE_MEDIA_TABLE;
1442 chip_name = "GSC DS21140 Tulip";
1443 }
1444 }
1445#endif
1446
1447 /* Clear the missed-packet counter. */
1448 ioread32(ioaddr + CSR8);
1449
1450 /* The station address ROM is read byte serially. The register must
1451 be polled, waiting for the value to be read bit serially from the
1452 EEPROM.
1453 */
1454 ee_data = tp->eeprom;
209261c0 1455 memset(ee_data, 0, sizeof(tp->eeprom));
1da177e4
LT		 1456 sum = 0;
1457 if (chip_idx == LC82C168) {
1458 for (i = 0; i < 3; i++) {
1459 int value, boguscnt = 100000;
1460 iowrite32(0x600 | i, ioaddr + 0x98);
ec1d1ebb 1461 do {
1da177e4 1462 value = ioread32(ioaddr + CSR9);
ec1d1ebb 1463 } while (value < 0 && --boguscnt > 0);
6caf52a4 1464 put_unaligned_le16(value, ((__le16 *)dev->dev_addr) + i);
1da177e4
LT		 1465 sum += value & 0xffff;
1466 }
1467 } else if (chip_idx == COMET) {
1468 /* No need to read the EEPROM. */
6caf52a4
HH		 1469 put_unaligned_le32(ioread32(ioaddr + 0xA4), dev->dev_addr);
1470 put_unaligned_le16(ioread32(ioaddr + 0xA8), dev->dev_addr + 4);
1da177e4
LT		 1471 for (i = 0; i < 6; i ++)
1472 sum += dev->dev_addr[i];
1473 } else {
1474 /* A serial EEPROM interface, we read now and sort it out later. */
1475 int sa_offset = 0;
1476 int ee_addr_size = tulip_read_eeprom(dev, 0xff, 8) & 0x40000 ? 8 : 6;
209261c0 1477 int ee_max_addr = ((1 << ee_addr_size) - 1) * sizeof(u16);
1da177e4 1478
209261c0
GG		 1479 if (ee_max_addr > sizeof(tp->eeprom))
1480 ee_max_addr = sizeof(tp->eeprom);
1481
1482 for (i = 0; i < ee_max_addr ; i += sizeof(u16)) {
1da177e4
LT		 1483 u16 data = tulip_read_eeprom(dev, i/2, ee_addr_size);
1484 ee_data[i] = data & 0xff;
1485 ee_data[i + 1] = data >> 8;
1486 }
1487
1488 /* DEC now has a specification (see Notes) but early board makers
1489 just put the address in the first EEPROM locations. */
1490 /* This does memcmp(ee_data, ee_data+16, 8) */
1491 for (i = 0; i < 8; i ++)
1492 if (ee_data[i] != ee_data[16+i])
1493 sa_offset = 20;
1494 if (chip_idx == CONEXANT) {
1495 /* Check that the tuple type and length is correct. */
1496 if (ee_data[0x198] == 0x04 && ee_data[0x199] == 6)
1497 sa_offset = 0x19A;
1498 } else if (ee_data[0] == 0xff && ee_data[1] == 0xff &&
1499 ee_data[2] == 0) {
1500 sa_offset = 2; /* Grrr, damn Matrox boards. */
1501 multiport_cnt = 4;
1502 }
1da177e4 1503#ifdef CONFIG_MIPS_COBALT
f3b197ac 1504 if ((pdev->bus->number == 0) &&
1da177e4
LT		 1505 ((PCI_SLOT(pdev->devfn) == 7) ||
1506 (PCI_SLOT(pdev->devfn) == 12))) {
1507 /* Cobalt MAC address in first EEPROM locations. */
1508 sa_offset = 0;
12755c16
RB		 1509 /* Ensure our media table fixup get's applied */
1510 memcpy(ee_data + 16, ee_data, 8);
1da177e4
LT		 1511 }
1512#endif
1513#ifdef CONFIG_GSC
1514 /* Check to see if we have a broken srom */
1515 if (ee_data[0] == 0x61 && ee_data[1] == 0x10) {
1516 /* pci_vendor_id and subsystem_id are swapped */
1517 ee_data[0] = ee_data[2];
1518 ee_data[1] = ee_data[3];
1519 ee_data[2] = 0x61;
1520 ee_data[3] = 0x10;
1521
1522 /* HSC-PCI boards need to be byte-swaped and shifted
1523 * up 1 word. This shift needs to happen at the end
1524 * of the MAC first because of the 2 byte overlap.
1525 */
1526 for (i = 4; i >= 0; i -= 2) {
1527 ee_data[17 + i + 3] = ee_data[17 + i];
1528 ee_data[16 + i + 5] = ee_data[16 + i];
1529 }
1530 }
1531#endif
1532
1533 for (i = 0; i < 6; i ++) {
1534 dev->dev_addr[i] = ee_data[i + sa_offset];
1535 sum += ee_data[i + sa_offset];
1536 }
1537 }
1538 /* Lite-On boards have the address byte-swapped. */
1539 if ((dev->dev_addr[0] == 0xA0 || dev->dev_addr[0] == 0xC0 || dev->dev_addr[0] == 0x02)
1540 && dev->dev_addr[1] == 0x00)
1541 for (i = 0; i < 6; i+=2) {
1542 char tmp = dev->dev_addr[i];
1543 dev->dev_addr[i] = dev->dev_addr[i+1];
1544 dev->dev_addr[i+1] = tmp;
1545 }
1546 /* On the Zynx 315 Etherarray and other multiport boards only the
1547 first Tulip has an EEPROM.
1548 On Sparc systems the mac address is held in the OBP property
1549 "local-mac-address".
1550 The addresses of the subsequent ports are derived from the first.
1551 Many PCI BIOSes also incorrectly report the IRQ line, so we correct
1552 that here as well. */
1553 if (sum == 0 || sum == 6*0xff) {
49345103 1554#if defined(CONFIG_SPARC)
d297c31f
DM		 1555 struct device_node *dp = pci_device_to_OF_node(pdev);
1556 const unsigned char *addr;
1557 int len;
1da177e4
LT		 1558#endif
1559 eeprom_missing = 1;
1560 for (i = 0; i < 5; i++)
1561 dev->dev_addr[i] = last_phys_addr[i];
1562 dev->dev_addr[i] = last_phys_addr[i] + 1;
49345103 1563#if defined(CONFIG_SPARC)
d297c31f
DM		 1564 addr = of_get_property(dp, "local-mac-address", &len);
1565 if (addr && len == 6)
1566 memcpy(dev->dev_addr, addr, 6);
1da177e4 1567#endif
b9c4c609 1568#if defined(__i386__) || defined(__x86_64__) /* Patch up x86 BIOS bug. */
1da177e4
LT		 1569 if (last_irq)
1570 irq = last_irq;
1571#endif
1572 }
1573
1574 for (i = 0; i < 6; i++)
1575 last_phys_addr[i] = dev->dev_addr[i];
1576 last_irq = irq;
1577 dev->irq = irq;
1578
1579 /* The lower four bits are the media type. */
1580 if (board_idx >= 0 && board_idx < MAX_UNITS) {
1581 if (options[board_idx] & MEDIA_MASK)
1582 tp->default_port = options[board_idx] & MEDIA_MASK;
1583 if ((options[board_idx] & FullDuplex) || full_duplex[board_idx] > 0)
1584 tp->full_duplex = 1;
1585 if (mtu[board_idx] > 0)
1586 dev->mtu = mtu[board_idx];
1587 }
1588 if (dev->mem_start & MEDIA_MASK)
1589 tp->default_port = dev->mem_start & MEDIA_MASK;
1590 if (tp->default_port) {
1591 printk(KERN_INFO "tulip%d: Transceiver selection forced to %s.\n",
1592 board_idx, medianame[tp->default_port & MEDIA_MASK]);
1593 tp->medialock = 1;
1594 if (tulip_media_cap[tp->default_port] & MediaAlwaysFD)
1595 tp->full_duplex = 1;
1596 }
1597 if (tp->full_duplex)
1598 tp->full_duplex_lock = 1;
1599
1600 if (tulip_media_cap[tp->default_port] & MediaIsMII) {
1601 u16 media2advert[] = { 0x20, 0x40, 0x03e0, 0x60, 0x80, 0x100, 0x200 };
1602 tp->mii_advertise = media2advert[tp->default_port - 9];
1603 tp->mii_advertise |= (tp->flags & HAS_8023X); /* Matching bits! */
1604 }
1605
1606 if (tp->flags & HAS_MEDIA_TABLE) {
1607 sprintf(dev->name, "tulip%d", board_idx); /* hack */
1608 tulip_parse_eeprom(dev);
1609 strcpy(dev->name, "eth%d"); /* un-hack */
1610 }
1611
1612 if ((tp->flags & ALWAYS_CHECK_MII) ||
1613 (tp->mtable && tp->mtable->has_mii) ||
1614 ( ! tp->mtable && (tp->flags & HAS_MII))) {
1615 if (tp->mtable && tp->mtable->has_mii) {
1616 for (i = 0; i < tp->mtable->leafcount; i++)
1617 if (tp->mtable->mleaf[i].media == 11) {
1618 tp->cur_index = i;
1619 tp->saved_if_port = dev->if_port;
1620 tulip_select_media(dev, 2);
1621 dev->if_port = tp->saved_if_port;
1622 break;
1623 }
1624 }
1625
1626 /* Find the connected MII xcvrs.
1627 Doing this in open() would allow detecting external xcvrs
1628 later, but takes much time. */
1629 tulip_find_mii (dev, board_idx);
1630 }
1631
1632 /* The Tulip-specific entries in the device structure. */
f4266cf3 1633 dev->netdev_ops = &tulip_netdev_ops;
1da177e4
LT		 1634 dev->watchdog_timeo = TX_TIMEOUT;
1635#ifdef CONFIG_TULIP_NAPI
bea3348e 1636 netif_napi_add(dev, &tp->napi, tulip_poll, 16);
1da177e4
LT		 1637#endif
1638 SET_ETHTOOL_OPS(dev, &ops);
1639
1640 if (register_netdev(dev))
1641 goto err_out_free_ring;
1642
c69f4122
GG		 1643 printk(KERN_INFO "%s: %s rev %d at "
1644#ifdef CONFIG_TULIP_MMIO
1645 "MMIO"
1646#else
1647 "Port"
1648#endif
44c10138 1649 " %#llx,", dev->name, chip_name, pdev->revision,
c69f4122 1650 (unsigned long long) pci_resource_start(pdev, TULIP_BAR));
1da177e4
LT		 1651 pci_set_drvdata(pdev, dev);
1652
1653 if (eeprom_missing)
1654 printk(" EEPROM not present,");
e174961c 1655 printk(" %pM", dev->dev_addr);
1da177e4
LT		 1656 printk(", IRQ %d.\n", irq);
1657
1658 if (tp->chip_id == PNIC2)
1659 tp->link_change = pnic2_lnk_change;
1660 else if (tp->flags & HAS_NWAY)
1661 tp->link_change = t21142_lnk_change;
1662 else if (tp->flags & HAS_PNICNWAY)
1663 tp->link_change = pnic_lnk_change;
1664
1665 /* Reset the xcvr interface and turn on heartbeat. */
1666 switch (chip_idx) {
1667 case DC21140:
1668 case DM910X:
1da177e4
LT		 1669 default:
1670 if (tp->mtable)
1671 iowrite32(tp->mtable->csr12dir | 0x100, ioaddr + CSR12);
1672 break;
1673 case DC21142:
1674 if (tp->mii_cnt || tulip_media_cap[dev->if_port] & MediaIsMII) {
1675 iowrite32(csr6_mask_defstate, ioaddr + CSR6);
1676 iowrite32(0x0000, ioaddr + CSR13);
1677 iowrite32(0x0000, ioaddr + CSR14);
1678 iowrite32(csr6_mask_hdcap, ioaddr + CSR6);
1679 } else
1680 t21142_start_nway(dev);
1681 break;
1682 case PNIC2:
1683 /* just do a reset for sanity sake */
1684 iowrite32(0x0000, ioaddr + CSR13);
1685 iowrite32(0x0000, ioaddr + CSR14);
1686 break;
1687 case LC82C168:
1688 if ( ! tp->mii_cnt) {
1689 tp->nway = 1;
1690 tp->nwayset = 0;
1691 iowrite32(csr6_ttm | csr6_ca, ioaddr + CSR6);
1692 iowrite32(0x30, ioaddr + CSR12);
1693 iowrite32(0x0001F078, ioaddr + CSR6);
1694 iowrite32(0x0201F078, ioaddr + CSR6); /* Turn on autonegotiation. */
1695 }
1696 break;
1697 case MX98713:
1698 case COMPEX9881:
1699 iowrite32(0x00000000, ioaddr + CSR6);
1700 iowrite32(0x000711C0, ioaddr + CSR14); /* Turn on NWay. */
1701 iowrite32(0x00000001, ioaddr + CSR13);
1702 break;
1703 case MX98715:
1704 case MX98725:
1705 iowrite32(0x01a80000, ioaddr + CSR6);
1706 iowrite32(0xFFFFFFFF, ioaddr + CSR14);
1707 iowrite32(0x00001000, ioaddr + CSR12);
1708 break;
1709 case COMET:
1710 /* No initialization necessary. */
1711 break;
1712 }
1713
1714 /* put the chip in snooze mode until opened */
1715 tulip_set_power_state (tp, 0, 1);
1716
1717 return 0;
1718
1719err_out_free_ring:
1720 pci_free_consistent (pdev,
1721 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1722 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1723 tp->rx_ring, tp->rx_ring_dma);
1724
1725err_out_mtable:
b4558ea9 1726 kfree (tp->mtable);
1da177e4
LT		 1727 pci_iounmap(pdev, ioaddr);
1728
1729err_out_free_res:
1730 pci_release_regions (pdev);
1731
1732err_out_free_netdev:
1733 free_netdev (dev);
1734 return -ENODEV;
1735}
1736
1737
1738#ifdef CONFIG_PM
1739
1740static int tulip_suspend (struct pci_dev *pdev, pm_message_t state)
1741{
1742 struct net_device *dev = pci_get_drvdata(pdev);
1743
1fe2cb32
AB		 1744 if (!dev)
1745 return -EINVAL;
1746
56997fa8
GG		 1747 if (!netif_running(dev))
1748 goto save_state;
1749
1750 tulip_down(dev);
1fe2cb32
AB		 1751
1752 netif_device_detach(dev);
1753 free_irq(dev->irq, dev);
1754
56997fa8 1755save_state:
1fe2cb32
AB		 1756 pci_save_state(pdev);
1757 pci_disable_device(pdev);
1758 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1759
1da177e4
LT		 1760 return 0;
1761}
1762
1763
1764static int tulip_resume(struct pci_dev *pdev)
1765{
1766 struct net_device *dev = pci_get_drvdata(pdev);
1fe2cb32 1767 int retval;
1da177e4 1768
1fe2cb32
AB		 1769 if (!dev)
1770 return -EINVAL;
1771
1772 pci_set_power_state(pdev, PCI_D0);
1773 pci_restore_state(pdev);
1774
56997fa8
GG		 1775 if (!netif_running(dev))
1776 return 0;
1777
9f486ae1
VH		 1778 if ((retval = pci_enable_device(pdev))) {
1779 printk (KERN_ERR "tulip: pci_enable_device failed in resume\n");
1780 return retval;
1781 }
1fe2cb32 1782
1fb9df5d 1783 if ((retval = request_irq(dev->irq, &tulip_interrupt, IRQF_SHARED, dev->name, dev))) {
1fe2cb32
AB		 1784 printk (KERN_ERR "tulip: request_irq failed in resume\n");
1785 return retval;
1da177e4 1786 }
1fe2cb32
AB		 1787
1788 netif_device_attach(dev);
1789
1790 if (netif_running(dev))
1791 tulip_up(dev);
1792
1da177e4
LT		 1793 return 0;
1794}
1795
1796#endif /* CONFIG_PM */
1797
1798
1799static void __devexit tulip_remove_one (struct pci_dev *pdev)
1800{
1801 struct net_device *dev = pci_get_drvdata (pdev);
1802 struct tulip_private *tp;
1803
1804 if (!dev)
1805 return;
1806
1807 tp = netdev_priv(dev);
1808 unregister_netdev(dev);
1809 pci_free_consistent (pdev,
1810 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1811 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1812 tp->rx_ring, tp->rx_ring_dma);
b4558ea9 1813 kfree (tp->mtable);
1da177e4
LT		 1814 pci_iounmap(pdev, tp->base_addr);
1815 free_netdev (dev);
1816 pci_release_regions (pdev);
1817 pci_set_drvdata (pdev, NULL);
1818
1819 /* pci_power_off (pdev, -1); */
1820}
1821
1822#ifdef CONFIG_NET_POLL_CONTROLLER
1823/*
1824 * Polling 'interrupt' - used by things like netconsole to send skbs
1825 * without having to re-enable interrupts. It's not called while
1826 * the interrupt routine is executing.
1827 */
1828
1829static void poll_tulip (struct net_device *dev)
1830{
1831 /* disable_irq here is not very nice, but with the lockless
1832 interrupt handler we have no other choice. */
1833 disable_irq(dev->irq);
7d12e780 1834 tulip_interrupt (dev->irq, dev);
1da177e4
LT		 1835 enable_irq(dev->irq);
1836}
1837#endif
1838
1839static struct pci_driver tulip_driver = {
1840 .name = DRV_NAME,
1841 .id_table = tulip_pci_tbl,
1842 .probe = tulip_init_one,
1843 .remove = __devexit_p(tulip_remove_one),
1844#ifdef CONFIG_PM
1845 .suspend = tulip_suspend,
1846 .resume = tulip_resume,
1847#endif /* CONFIG_PM */
1848};
1849
1850
1851static int __init tulip_init (void)
1852{
1853#ifdef MODULE
1854 printk (KERN_INFO "%s", version);
1855#endif
1856
1857 /* copy module parms into globals */
1858 tulip_rx_copybreak = rx_copybreak;
1859 tulip_max_interrupt_work = max_interrupt_work;
1860
1861 /* probe for and init boards */
29917620 1862 return pci_register_driver(&tulip_driver);
1da177e4
LT		 1863}
1864
1865
1866static void __exit tulip_cleanup (void)
1867{
1868 pci_unregister_driver (&tulip_driver);
1869}
1870
1871
1872module_init(tulip_init);
1873module_exit(tulip_cleanup);
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