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Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
f3b197ac | 2 | * xircom_cb: A driver for the (tulip-like) Xircom Cardbus ethernet cards |
1da177e4 LT |
3 | * |
4 | * This software is (C) by the respective authors, and licensed under the GPL | |
5 | * License. | |
6 | * | |
7 | * Written by Arjan van de Ven for Red Hat, Inc. | |
f3b197ac | 8 | * Based on work by Jeff Garzik, Doug Ledford and Donald Becker |
1da177e4 LT |
9 | * |
10 | * This software may be used and distributed according to the terms | |
11 | * of the GNU General Public License, incorporated herein by reference. | |
12 | * | |
13 | * | |
14 | * $Id: xircom_cb.c,v 1.33 2001/03/19 14:02:07 arjanv Exp $ | |
15 | */ | |
16 | ||
17 | #include <linux/module.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/string.h> | |
20 | #include <linux/errno.h> | |
21 | #include <linux/ioport.h> | |
22 | #include <linux/slab.h> | |
23 | #include <linux/interrupt.h> | |
24 | #include <linux/pci.h> | |
25 | #include <linux/netdevice.h> | |
26 | #include <linux/etherdevice.h> | |
27 | #include <linux/skbuff.h> | |
28 | #include <linux/delay.h> | |
29 | #include <linux/init.h> | |
30 | #include <linux/ethtool.h> | |
31 | #include <linux/bitops.h> | |
32 | ||
33 | #include <asm/uaccess.h> | |
34 | #include <asm/io.h> | |
82729971 AV |
35 | #ifdef CONFIG_NET_POLL_CONTROLLER |
36 | #include <asm/irq.h> | |
37 | #endif | |
1da177e4 LT |
38 | |
39 | #ifdef DEBUG | |
40 | #define enter(x) printk("Enter: %s, %s line %i\n",x,__FILE__,__LINE__) | |
41 | #define leave(x) printk("Leave: %s, %s line %i\n",x,__FILE__,__LINE__) | |
42 | #else | |
43 | #define enter(x) do {} while (0) | |
44 | #define leave(x) do {} while (0) | |
45 | #endif | |
46 | ||
47 | ||
48 | MODULE_DESCRIPTION("Xircom Cardbus ethernet driver"); | |
49 | MODULE_AUTHOR("Arjan van de Ven <arjanv@redhat.com>"); | |
50 | MODULE_LICENSE("GPL"); | |
51 | ||
52 | ||
53 | ||
54 | /* IO registers on the card, offsets */ | |
55 | #define CSR0 0x00 | |
56 | #define CSR1 0x08 | |
57 | #define CSR2 0x10 | |
58 | #define CSR3 0x18 | |
59 | #define CSR4 0x20 | |
60 | #define CSR5 0x28 | |
61 | #define CSR6 0x30 | |
62 | #define CSR7 0x38 | |
63 | #define CSR8 0x40 | |
64 | #define CSR9 0x48 | |
65 | #define CSR10 0x50 | |
66 | #define CSR11 0x58 | |
67 | #define CSR12 0x60 | |
68 | #define CSR13 0x68 | |
69 | #define CSR14 0x70 | |
70 | #define CSR15 0x78 | |
71 | #define CSR16 0x80 | |
72 | ||
73 | /* PCI registers */ | |
74 | #define PCI_POWERMGMT 0x40 | |
75 | ||
76 | /* Offsets of the buffers within the descriptor pages, in bytes */ | |
77 | ||
78 | #define NUMDESCRIPTORS 4 | |
79 | ||
80 | static int bufferoffsets[NUMDESCRIPTORS] = {128,2048,4096,6144}; | |
81 | ||
82 | ||
83 | struct xircom_private { | |
84 | /* Send and receive buffers, kernel-addressable and dma addressable forms */ | |
85 | ||
6f35d5d5 AV |
86 | __le32 *rx_buffer; |
87 | __le32 *tx_buffer; | |
1da177e4 LT |
88 | |
89 | dma_addr_t rx_dma_handle; | |
90 | dma_addr_t tx_dma_handle; | |
91 | ||
92 | struct sk_buff *tx_skb[4]; | |
93 | ||
94 | unsigned long io_port; | |
95 | int open; | |
f3b197ac | 96 | |
1da177e4 LT |
97 | /* transmit_used is the rotating counter that indicates which transmit |
98 | descriptor has to be used next */ | |
99 | int transmit_used; | |
100 | ||
101 | /* Spinlock to serialize register operations. | |
102 | It must be helt while manipulating the following registers: | |
103 | CSR0, CSR6, CSR7, CSR9, CSR10, CSR15 | |
104 | */ | |
105 | spinlock_t lock; | |
106 | ||
1da177e4 LT |
107 | struct pci_dev *pdev; |
108 | struct net_device *dev; | |
1da177e4 LT |
109 | }; |
110 | ||
111 | ||
112 | /* Function prototypes */ | |
113 | static int xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id); | |
114 | static void xircom_remove(struct pci_dev *pdev); | |
7d12e780 | 115 | static irqreturn_t xircom_interrupt(int irq, void *dev_instance); |
1da177e4 LT |
116 | static int xircom_start_xmit(struct sk_buff *skb, struct net_device *dev); |
117 | static int xircom_open(struct net_device *dev); | |
118 | static int xircom_close(struct net_device *dev); | |
119 | static void xircom_up(struct xircom_private *card); | |
3be034b6 | 120 | #ifdef CONFIG_NET_POLL_CONTROLLER |
1da177e4 LT |
121 | static void xircom_poll_controller(struct net_device *dev); |
122 | #endif | |
123 | ||
124 | static void investigate_read_descriptor(struct net_device *dev,struct xircom_private *card, int descnr, unsigned int bufferoffset); | |
125 | static void investigate_write_descriptor(struct net_device *dev, struct xircom_private *card, int descnr, unsigned int bufferoffset); | |
126 | static void read_mac_address(struct xircom_private *card); | |
127 | static void transceiver_voodoo(struct xircom_private *card); | |
128 | static void initialize_card(struct xircom_private *card); | |
129 | static void trigger_transmit(struct xircom_private *card); | |
130 | static void trigger_receive(struct xircom_private *card); | |
131 | static void setup_descriptors(struct xircom_private *card); | |
132 | static void remove_descriptors(struct xircom_private *card); | |
133 | static int link_status_changed(struct xircom_private *card); | |
134 | static void activate_receiver(struct xircom_private *card); | |
135 | static void deactivate_receiver(struct xircom_private *card); | |
136 | static void activate_transmitter(struct xircom_private *card); | |
137 | static void deactivate_transmitter(struct xircom_private *card); | |
138 | static void enable_transmit_interrupt(struct xircom_private *card); | |
139 | static void enable_receive_interrupt(struct xircom_private *card); | |
140 | static void enable_link_interrupt(struct xircom_private *card); | |
141 | static void disable_all_interrupts(struct xircom_private *card); | |
142 | static int link_status(struct xircom_private *card); | |
143 | ||
144 | ||
145 | ||
146 | static struct pci_device_id xircom_pci_table[] = { | |
147 | {0x115D, 0x0003, PCI_ANY_ID, PCI_ANY_ID,}, | |
148 | {0,}, | |
149 | }; | |
150 | MODULE_DEVICE_TABLE(pci, xircom_pci_table); | |
151 | ||
152 | static struct pci_driver xircom_ops = { | |
f3b197ac JG |
153 | .name = "xircom_cb", |
154 | .id_table = xircom_pci_table, | |
155 | .probe = xircom_probe, | |
156 | .remove = xircom_remove, | |
1da177e4 LT |
157 | .suspend =NULL, |
158 | .resume =NULL | |
159 | }; | |
160 | ||
161 | ||
162 | #ifdef DEBUG | |
163 | static void print_binary(unsigned int number) | |
164 | { | |
165 | int i,i2; | |
166 | char buffer[64]; | |
167 | memset(buffer,0,64); | |
168 | i2=0; | |
169 | for (i=31;i>=0;i--) { | |
170 | if (number & (1<<i)) | |
171 | buffer[i2++]='1'; | |
172 | else | |
173 | buffer[i2++]='0'; | |
f3b197ac | 174 | if ((i&3)==0) |
1da177e4 LT |
175 | buffer[i2++]=' '; |
176 | } | |
177 | printk("%s\n",buffer); | |
178 | } | |
179 | #endif | |
180 | ||
181 | static void netdev_get_drvinfo(struct net_device *dev, | |
182 | struct ethtool_drvinfo *info) | |
183 | { | |
184 | struct xircom_private *private = netdev_priv(dev); | |
185 | ||
186 | strcpy(info->driver, "xircom_cb"); | |
187 | strcpy(info->bus_info, pci_name(private->pdev)); | |
188 | } | |
189 | ||
7282d491 | 190 | static const struct ethtool_ops netdev_ethtool_ops = { |
1da177e4 LT |
191 | .get_drvinfo = netdev_get_drvinfo, |
192 | }; | |
193 | ||
1034c9f6 SH |
194 | static const struct net_device_ops netdev_ops = { |
195 | .ndo_open = xircom_open, | |
196 | .ndo_stop = xircom_close, | |
197 | .ndo_start_xmit = xircom_start_xmit, | |
198 | .ndo_change_mtu = eth_change_mtu, | |
199 | .ndo_set_mac_address = eth_mac_addr, | |
200 | .ndo_validate_addr = eth_validate_addr, | |
201 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
202 | .ndo_poll_controller = xircom_poll_controller, | |
203 | #endif | |
204 | }; | |
205 | ||
1da177e4 LT |
206 | /* xircom_probe is the code that gets called on device insertion. |
207 | it sets up the hardware and registers the device to the networklayer. | |
f3b197ac | 208 | |
1da177e4 LT |
209 | TODO: Send 1 or 2 "dummy" packets here as the card seems to discard the |
210 | first two packets that get send, and pump hates that. | |
f3b197ac | 211 | |
1da177e4 LT |
212 | */ |
213 | static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |
214 | { | |
215 | struct net_device *dev = NULL; | |
216 | struct xircom_private *private; | |
1da177e4 LT |
217 | unsigned long flags; |
218 | unsigned short tmp16; | |
219 | enter("xircom_probe"); | |
f3b197ac | 220 | |
1da177e4 LT |
221 | /* First do the PCI initialisation */ |
222 | ||
223 | if (pci_enable_device(pdev)) | |
224 | return -ENODEV; | |
225 | ||
226 | /* disable all powermanagement */ | |
227 | pci_write_config_dword(pdev, PCI_POWERMGMT, 0x0000); | |
f3b197ac | 228 | |
1da177e4 LT |
229 | pci_set_master(pdev); /* Why isn't this done by pci_enable_device ?*/ |
230 | ||
f3b197ac JG |
231 | /* clear PCI status, if any */ |
232 | pci_read_config_word (pdev,PCI_STATUS, &tmp16); | |
1da177e4 | 233 | pci_write_config_word (pdev, PCI_STATUS,tmp16); |
f3b197ac | 234 | |
1da177e4 LT |
235 | if (!request_region(pci_resource_start(pdev, 0), 128, "xircom_cb")) { |
236 | printk(KERN_ERR "xircom_probe: failed to allocate io-region\n"); | |
237 | return -ENODEV; | |
238 | } | |
239 | ||
f3b197ac | 240 | /* |
1da177e4 LT |
241 | Before changing the hardware, allocate the memory. |
242 | This way, we can fail gracefully if not enough memory | |
f3b197ac | 243 | is available. |
1da177e4 LT |
244 | */ |
245 | dev = alloc_etherdev(sizeof(struct xircom_private)); | |
246 | if (!dev) { | |
247 | printk(KERN_ERR "xircom_probe: failed to allocate etherdev\n"); | |
248 | goto device_fail; | |
249 | } | |
250 | private = netdev_priv(dev); | |
f3b197ac | 251 | |
1da177e4 LT |
252 | /* Allocate the send/receive buffers */ |
253 | private->rx_buffer = pci_alloc_consistent(pdev,8192,&private->rx_dma_handle); | |
254 | if (private->rx_buffer == NULL) { | |
255 | printk(KERN_ERR "xircom_probe: no memory for rx buffer \n"); | |
256 | goto rx_buf_fail; | |
f3b197ac | 257 | } |
1da177e4 LT |
258 | private->tx_buffer = pci_alloc_consistent(pdev,8192,&private->tx_dma_handle); |
259 | if (private->tx_buffer == NULL) { | |
260 | printk(KERN_ERR "xircom_probe: no memory for tx buffer \n"); | |
261 | goto tx_buf_fail; | |
262 | } | |
263 | ||
1da177e4 LT |
264 | SET_NETDEV_DEV(dev, &pdev->dev); |
265 | ||
266 | ||
267 | private->dev = dev; | |
268 | private->pdev = pdev; | |
269 | private->io_port = pci_resource_start(pdev, 0); | |
270 | spin_lock_init(&private->lock); | |
271 | dev->irq = pdev->irq; | |
272 | dev->base_addr = private->io_port; | |
f3b197ac | 273 | |
1da177e4 LT |
274 | initialize_card(private); |
275 | read_mac_address(private); | |
276 | setup_descriptors(private); | |
f3b197ac | 277 | |
1034c9f6 | 278 | dev->netdev_ops = &netdev_ops; |
1da177e4 LT |
279 | SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops); |
280 | pci_set_drvdata(pdev, dev); | |
281 | ||
282 | if (register_netdev(dev)) { | |
283 | printk(KERN_ERR "xircom_probe: netdevice registration failed.\n"); | |
284 | goto reg_fail; | |
285 | } | |
f3b197ac | 286 | |
44c10138 | 287 | printk(KERN_INFO "%s: Xircom cardbus revision %i at irq %i \n", dev->name, pdev->revision, pdev->irq); |
1da177e4 LT |
288 | /* start the transmitter to get a heartbeat */ |
289 | /* TODO: send 2 dummy packets here */ | |
290 | transceiver_voodoo(private); | |
f3b197ac | 291 | |
1da177e4 LT |
292 | spin_lock_irqsave(&private->lock,flags); |
293 | activate_transmitter(private); | |
294 | activate_receiver(private); | |
295 | spin_unlock_irqrestore(&private->lock,flags); | |
f3b197ac | 296 | |
1da177e4 | 297 | trigger_receive(private); |
f3b197ac | 298 | |
1da177e4 LT |
299 | leave("xircom_probe"); |
300 | return 0; | |
301 | ||
302 | reg_fail: | |
303 | kfree(private->tx_buffer); | |
304 | tx_buf_fail: | |
305 | kfree(private->rx_buffer); | |
306 | rx_buf_fail: | |
307 | free_netdev(dev); | |
308 | device_fail: | |
309 | return -ENODEV; | |
310 | } | |
311 | ||
312 | ||
313 | /* | |
314 | xircom_remove is called on module-unload or on device-eject. | |
315 | it unregisters the irq, io-region and network device. | |
316 | Interrupts and such are already stopped in the "ifconfig ethX down" | |
317 | code. | |
318 | */ | |
319 | static void __devexit xircom_remove(struct pci_dev *pdev) | |
320 | { | |
321 | struct net_device *dev = pci_get_drvdata(pdev); | |
322 | struct xircom_private *card = netdev_priv(dev); | |
323 | ||
324 | enter("xircom_remove"); | |
325 | pci_free_consistent(pdev,8192,card->rx_buffer,card->rx_dma_handle); | |
326 | pci_free_consistent(pdev,8192,card->tx_buffer,card->tx_dma_handle); | |
327 | ||
328 | release_region(dev->base_addr, 128); | |
329 | unregister_netdev(dev); | |
330 | free_netdev(dev); | |
331 | pci_set_drvdata(pdev, NULL); | |
332 | leave("xircom_remove"); | |
f3b197ac | 333 | } |
1da177e4 | 334 | |
7d12e780 | 335 | static irqreturn_t xircom_interrupt(int irq, void *dev_instance) |
1da177e4 LT |
336 | { |
337 | struct net_device *dev = (struct net_device *) dev_instance; | |
338 | struct xircom_private *card = netdev_priv(dev); | |
339 | unsigned int status; | |
340 | int i; | |
341 | ||
342 | enter("xircom_interrupt\n"); | |
343 | ||
344 | spin_lock(&card->lock); | |
345 | status = inl(card->io_port+CSR5); | |
346 | ||
f3b197ac | 347 | #ifdef DEBUG |
1da177e4 LT |
348 | print_binary(status); |
349 | printk("tx status 0x%08x 0x%08x \n",card->tx_buffer[0],card->tx_buffer[4]); | |
350 | printk("rx status 0x%08x 0x%08x \n",card->rx_buffer[0],card->rx_buffer[4]); | |
f3b197ac | 351 | #endif |
1da177e4 LT |
352 | /* Handle shared irq and hotplug */ |
353 | if (status == 0 || status == 0xffffffff) { | |
354 | spin_unlock(&card->lock); | |
355 | return IRQ_NONE; | |
356 | } | |
357 | ||
358 | if (link_status_changed(card)) { | |
359 | int newlink; | |
360 | printk(KERN_DEBUG "xircom_cb: Link status has changed \n"); | |
361 | newlink = link_status(card); | |
362 | printk(KERN_INFO "xircom_cb: Link is %i mbit \n",newlink); | |
363 | if (newlink) | |
364 | netif_carrier_on(dev); | |
365 | else | |
366 | netif_carrier_off(dev); | |
f3b197ac | 367 | |
1da177e4 LT |
368 | } |
369 | ||
f3b197ac | 370 | /* Clear all remaining interrupts */ |
1da177e4 LT |
371 | status |= 0xffffffff; /* FIXME: make this clear only the |
372 | real existing bits */ | |
373 | outl(status,card->io_port+CSR5); | |
1da177e4 | 374 | |
f3b197ac JG |
375 | |
376 | for (i=0;i<NUMDESCRIPTORS;i++) | |
1da177e4 | 377 | investigate_write_descriptor(dev,card,i,bufferoffsets[i]); |
f3b197ac | 378 | for (i=0;i<NUMDESCRIPTORS;i++) |
1da177e4 LT |
379 | investigate_read_descriptor(dev,card,i,bufferoffsets[i]); |
380 | ||
f3b197ac | 381 | |
1da177e4 LT |
382 | spin_unlock(&card->lock); |
383 | leave("xircom_interrupt"); | |
384 | return IRQ_HANDLED; | |
385 | } | |
386 | ||
387 | static int xircom_start_xmit(struct sk_buff *skb, struct net_device *dev) | |
388 | { | |
389 | struct xircom_private *card; | |
390 | unsigned long flags; | |
391 | int nextdescriptor; | |
392 | int desc; | |
393 | enter("xircom_start_xmit"); | |
f3b197ac | 394 | |
1da177e4 LT |
395 | card = netdev_priv(dev); |
396 | spin_lock_irqsave(&card->lock,flags); | |
f3b197ac | 397 | |
1da177e4 | 398 | /* First see if we can free some descriptors */ |
f3b197ac | 399 | for (desc=0;desc<NUMDESCRIPTORS;desc++) |
1da177e4 | 400 | investigate_write_descriptor(dev,card,desc,bufferoffsets[desc]); |
f3b197ac JG |
401 | |
402 | ||
1da177e4 LT |
403 | nextdescriptor = (card->transmit_used +1) % (NUMDESCRIPTORS); |
404 | desc = card->transmit_used; | |
f3b197ac | 405 | |
1da177e4 LT |
406 | /* only send the packet if the descriptor is free */ |
407 | if (card->tx_buffer[4*desc]==0) { | |
408 | /* Copy the packet data; zero the memory first as the card | |
409 | sometimes sends more than you ask it to. */ | |
f3b197ac | 410 | |
1da177e4 | 411 | memset(&card->tx_buffer[bufferoffsets[desc]/4],0,1536); |
d626f62b ACM |
412 | skb_copy_from_linear_data(skb, |
413 | &(card->tx_buffer[bufferoffsets[desc] / 4]), | |
414 | skb->len); | |
1da177e4 LT |
415 | /* FIXME: The specification tells us that the length we send HAS to be a multiple of |
416 | 4 bytes. */ | |
f3b197ac | 417 | |
6f35d5d5 AV |
418 | card->tx_buffer[4*desc+1] = cpu_to_le32(skb->len); |
419 | if (desc == NUMDESCRIPTORS - 1) /* bit 25: last descriptor of the ring */ | |
420 | card->tx_buffer[4*desc+1] |= cpu_to_le32(1<<25); | |
1da177e4 | 421 | |
6f35d5d5 | 422 | card->tx_buffer[4*desc+1] |= cpu_to_le32(0xF0000000); |
f3b197ac | 423 | /* 0xF0... means want interrupts*/ |
1da177e4 | 424 | card->tx_skb[desc] = skb; |
f3b197ac | 425 | |
1da177e4 LT |
426 | wmb(); |
427 | /* This gives the descriptor to the card */ | |
6f35d5d5 | 428 | card->tx_buffer[4*desc] = cpu_to_le32(0x80000000); |
1da177e4 | 429 | trigger_transmit(card); |
6f35d5d5 AV |
430 | if (card->tx_buffer[nextdescriptor*4] & cpu_to_le32(0x8000000)) { |
431 | /* next descriptor is occupied... */ | |
1da177e4 LT |
432 | netif_stop_queue(dev); |
433 | } | |
434 | card->transmit_used = nextdescriptor; | |
f3b197ac | 435 | leave("xircom-start_xmit - sent"); |
1da177e4 | 436 | spin_unlock_irqrestore(&card->lock,flags); |
6ed10654 | 437 | return NETDEV_TX_OK; |
1da177e4 | 438 | } |
f3b197ac | 439 | |
1da177e4 LT |
440 | |
441 | ||
442 | /* Uh oh... no free descriptor... drop the packet */ | |
443 | netif_stop_queue(dev); | |
444 | spin_unlock_irqrestore(&card->lock,flags); | |
445 | trigger_transmit(card); | |
f3b197ac | 446 | |
06f7525b | 447 | return NETDEV_TX_BUSY; |
1da177e4 LT |
448 | } |
449 | ||
450 | ||
451 | ||
452 | ||
453 | static int xircom_open(struct net_device *dev) | |
454 | { | |
455 | struct xircom_private *xp = netdev_priv(dev); | |
456 | int retval; | |
457 | enter("xircom_open"); | |
458 | printk(KERN_INFO "xircom cardbus adaptor found, registering as %s, using irq %i \n",dev->name,dev->irq); | |
1fb9df5d | 459 | retval = request_irq(dev->irq, &xircom_interrupt, IRQF_SHARED, dev->name, dev); |
1da177e4 LT |
460 | if (retval) { |
461 | leave("xircom_open - No IRQ"); | |
462 | return retval; | |
463 | } | |
f3b197ac | 464 | |
1da177e4 LT |
465 | xircom_up(xp); |
466 | xp->open = 1; | |
467 | leave("xircom_open"); | |
468 | return 0; | |
469 | } | |
470 | ||
471 | static int xircom_close(struct net_device *dev) | |
472 | { | |
473 | struct xircom_private *card; | |
474 | unsigned long flags; | |
f3b197ac | 475 | |
1da177e4 LT |
476 | enter("xircom_close"); |
477 | card = netdev_priv(dev); | |
478 | netif_stop_queue(dev); /* we don't want new packets */ | |
479 | ||
f3b197ac | 480 | |
1da177e4 | 481 | spin_lock_irqsave(&card->lock,flags); |
f3b197ac | 482 | |
1da177e4 | 483 | disable_all_interrupts(card); |
f3b197ac | 484 | #if 0 |
1da177e4 LT |
485 | /* We can enable this again once we send dummy packets on ifconfig ethX up */ |
486 | deactivate_receiver(card); | |
487 | deactivate_transmitter(card); | |
f3b197ac | 488 | #endif |
1da177e4 | 489 | remove_descriptors(card); |
f3b197ac | 490 | |
1da177e4 | 491 | spin_unlock_irqrestore(&card->lock,flags); |
f3b197ac | 492 | |
1da177e4 LT |
493 | card->open = 0; |
494 | free_irq(dev->irq,dev); | |
f3b197ac | 495 | |
1da177e4 | 496 | leave("xircom_close"); |
f3b197ac | 497 | |
1da177e4 | 498 | return 0; |
f3b197ac | 499 | |
1da177e4 LT |
500 | } |
501 | ||
502 | ||
1da177e4 LT |
503 | #ifdef CONFIG_NET_POLL_CONTROLLER |
504 | static void xircom_poll_controller(struct net_device *dev) | |
505 | { | |
506 | disable_irq(dev->irq); | |
7d12e780 | 507 | xircom_interrupt(dev->irq, dev); |
1da177e4 LT |
508 | enable_irq(dev->irq); |
509 | } | |
510 | #endif | |
511 | ||
512 | ||
513 | static void initialize_card(struct xircom_private *card) | |
514 | { | |
515 | unsigned int val; | |
516 | unsigned long flags; | |
517 | enter("initialize_card"); | |
518 | ||
519 | ||
520 | spin_lock_irqsave(&card->lock, flags); | |
521 | ||
522 | /* First: reset the card */ | |
523 | val = inl(card->io_port + CSR0); | |
524 | val |= 0x01; /* Software reset */ | |
525 | outl(val, card->io_port + CSR0); | |
526 | ||
527 | udelay(100); /* give the card some time to reset */ | |
528 | ||
529 | val = inl(card->io_port + CSR0); | |
530 | val &= ~0x01; /* disable Software reset */ | |
531 | outl(val, card->io_port + CSR0); | |
532 | ||
533 | ||
f3b197ac | 534 | val = 0; /* Value 0x00 is a safe and conservative value |
1da177e4 LT |
535 | for the PCI configuration settings */ |
536 | outl(val, card->io_port + CSR0); | |
537 | ||
538 | ||
539 | disable_all_interrupts(card); | |
540 | deactivate_receiver(card); | |
541 | deactivate_transmitter(card); | |
542 | ||
543 | spin_unlock_irqrestore(&card->lock, flags); | |
544 | ||
545 | leave("initialize_card"); | |
546 | } | |
547 | ||
548 | /* | |
549 | trigger_transmit causes the card to check for frames to be transmitted. | |
550 | This is accomplished by writing to the CSR1 port. The documentation | |
551 | claims that the act of writing is sufficient and that the value is | |
552 | ignored; I chose zero. | |
553 | */ | |
554 | static void trigger_transmit(struct xircom_private *card) | |
555 | { | |
556 | unsigned int val; | |
557 | enter("trigger_transmit"); | |
558 | ||
559 | val = 0; | |
560 | outl(val, card->io_port + CSR1); | |
561 | ||
562 | leave("trigger_transmit"); | |
563 | } | |
564 | ||
565 | /* | |
566 | trigger_receive causes the card to check for empty frames in the | |
567 | descriptor list in which packets can be received. | |
568 | This is accomplished by writing to the CSR2 port. The documentation | |
569 | claims that the act of writing is sufficient and that the value is | |
570 | ignored; I chose zero. | |
571 | */ | |
572 | static void trigger_receive(struct xircom_private *card) | |
573 | { | |
574 | unsigned int val; | |
575 | enter("trigger_receive"); | |
576 | ||
577 | val = 0; | |
578 | outl(val, card->io_port + CSR2); | |
579 | ||
580 | leave("trigger_receive"); | |
581 | } | |
582 | ||
583 | /* | |
584 | setup_descriptors initializes the send and receive buffers to be valid | |
585 | descriptors and programs the addresses into the card. | |
586 | */ | |
587 | static void setup_descriptors(struct xircom_private *card) | |
588 | { | |
6f35d5d5 | 589 | u32 address; |
1da177e4 LT |
590 | int i; |
591 | enter("setup_descriptors"); | |
592 | ||
593 | ||
a707cd6e ES |
594 | BUG_ON(card->rx_buffer == NULL); |
595 | BUG_ON(card->tx_buffer == NULL); | |
1da177e4 LT |
596 | |
597 | /* Receive descriptors */ | |
598 | memset(card->rx_buffer, 0, 128); /* clear the descriptors */ | |
599 | for (i=0;i<NUMDESCRIPTORS;i++ ) { | |
600 | ||
601 | /* Rx Descr0: It's empty, let the card own it, no errors -> 0x80000000 */ | |
6f35d5d5 | 602 | card->rx_buffer[i*4 + 0] = cpu_to_le32(0x80000000); |
1da177e4 | 603 | /* Rx Descr1: buffer 1 is 1536 bytes, buffer 2 is 0 bytes */ |
6f35d5d5 AV |
604 | card->rx_buffer[i*4 + 1] = cpu_to_le32(1536); |
605 | if (i == NUMDESCRIPTORS - 1) /* bit 25 is "last descriptor" */ | |
606 | card->rx_buffer[i*4 + 1] |= cpu_to_le32(1 << 25); | |
1da177e4 LT |
607 | |
608 | /* Rx Descr2: address of the buffer | |
609 | we store the buffer at the 2nd half of the page */ | |
f3b197ac | 610 | |
6f35d5d5 | 611 | address = card->rx_dma_handle; |
1da177e4 LT |
612 | card->rx_buffer[i*4 + 2] = cpu_to_le32(address + bufferoffsets[i]); |
613 | /* Rx Desc3: address of 2nd buffer -> 0 */ | |
614 | card->rx_buffer[i*4 + 3] = 0; | |
615 | } | |
f3b197ac | 616 | |
1da177e4 LT |
617 | wmb(); |
618 | /* Write the receive descriptor ring address to the card */ | |
6f35d5d5 AV |
619 | address = card->rx_dma_handle; |
620 | outl(address, card->io_port + CSR3); /* Receive descr list address */ | |
1da177e4 LT |
621 | |
622 | ||
623 | /* transmit descriptors */ | |
624 | memset(card->tx_buffer, 0, 128); /* clear the descriptors */ | |
f3b197ac | 625 | |
1da177e4 LT |
626 | for (i=0;i<NUMDESCRIPTORS;i++ ) { |
627 | /* Tx Descr0: Empty, we own it, no errors -> 0x00000000 */ | |
628 | card->tx_buffer[i*4 + 0] = 0x00000000; | |
629 | /* Tx Descr1: buffer 1 is 1536 bytes, buffer 2 is 0 bytes */ | |
6f35d5d5 AV |
630 | card->tx_buffer[i*4 + 1] = cpu_to_le32(1536); |
631 | if (i == NUMDESCRIPTORS - 1) /* bit 25 is "last descriptor" */ | |
632 | card->tx_buffer[i*4 + 1] |= cpu_to_le32(1 << 25); | |
f3b197ac | 633 | |
1da177e4 LT |
634 | /* Tx Descr2: address of the buffer |
635 | we store the buffer at the 2nd half of the page */ | |
6f35d5d5 | 636 | address = card->tx_dma_handle; |
1da177e4 LT |
637 | card->tx_buffer[i*4 + 2] = cpu_to_le32(address + bufferoffsets[i]); |
638 | /* Tx Desc3: address of 2nd buffer -> 0 */ | |
639 | card->tx_buffer[i*4 + 3] = 0; | |
640 | } | |
641 | ||
642 | wmb(); | |
643 | /* wite the transmit descriptor ring to the card */ | |
6f35d5d5 AV |
644 | address = card->tx_dma_handle; |
645 | outl(address, card->io_port + CSR4); /* xmit descr list address */ | |
1da177e4 LT |
646 | |
647 | leave("setup_descriptors"); | |
648 | } | |
649 | ||
650 | /* | |
651 | remove_descriptors informs the card the descriptors are no longer | |
652 | valid by setting the address in the card to 0x00. | |
653 | */ | |
654 | static void remove_descriptors(struct xircom_private *card) | |
655 | { | |
656 | unsigned int val; | |
657 | enter("remove_descriptors"); | |
658 | ||
659 | val = 0; | |
660 | outl(val, card->io_port + CSR3); /* Receive descriptor address */ | |
661 | outl(val, card->io_port + CSR4); /* Send descriptor address */ | |
662 | ||
663 | leave("remove_descriptors"); | |
664 | } | |
665 | ||
666 | /* | |
667 | link_status_changed returns 1 if the card has indicated that | |
668 | the link status has changed. The new link status has to be read from CSR12. | |
669 | ||
670 | This function also clears the status-bit. | |
671 | */ | |
672 | static int link_status_changed(struct xircom_private *card) | |
673 | { | |
674 | unsigned int val; | |
675 | enter("link_status_changed"); | |
676 | ||
677 | val = inl(card->io_port + CSR5); /* Status register */ | |
678 | ||
679 | if ((val & (1 << 27)) == 0) { /* no change */ | |
680 | leave("link_status_changed - nochange"); | |
681 | return 0; | |
682 | } | |
683 | ||
684 | /* clear the event by writing a 1 to the bit in the | |
685 | status register. */ | |
686 | val = (1 << 27); | |
687 | outl(val, card->io_port + CSR5); | |
688 | ||
689 | leave("link_status_changed - changed"); | |
690 | return 1; | |
691 | } | |
692 | ||
693 | ||
694 | /* | |
695 | transmit_active returns 1 if the transmitter on the card is | |
696 | in a non-stopped state. | |
697 | */ | |
698 | static int transmit_active(struct xircom_private *card) | |
699 | { | |
700 | unsigned int val; | |
701 | enter("transmit_active"); | |
702 | ||
703 | val = inl(card->io_port + CSR5); /* Status register */ | |
704 | ||
705 | if ((val & (7 << 20)) == 0) { /* transmitter disabled */ | |
706 | leave("transmit_active - inactive"); | |
707 | return 0; | |
708 | } | |
709 | ||
710 | leave("transmit_active - active"); | |
711 | return 1; | |
712 | } | |
713 | ||
714 | /* | |
715 | receive_active returns 1 if the receiver on the card is | |
716 | in a non-stopped state. | |
717 | */ | |
718 | static int receive_active(struct xircom_private *card) | |
719 | { | |
720 | unsigned int val; | |
721 | enter("receive_active"); | |
722 | ||
723 | ||
724 | val = inl(card->io_port + CSR5); /* Status register */ | |
725 | ||
726 | if ((val & (7 << 17)) == 0) { /* receiver disabled */ | |
727 | leave("receive_active - inactive"); | |
728 | return 0; | |
729 | } | |
730 | ||
731 | leave("receive_active - active"); | |
732 | return 1; | |
733 | } | |
734 | ||
735 | /* | |
736 | activate_receiver enables the receiver on the card. | |
737 | Before being allowed to active the receiver, the receiver | |
738 | must be completely de-activated. To achieve this, | |
f3b197ac | 739 | this code actually disables the receiver first; then it waits for the |
1da177e4 LT |
740 | receiver to become inactive, then it activates the receiver and then |
741 | it waits for the receiver to be active. | |
742 | ||
743 | must be called with the lock held and interrupts disabled. | |
744 | */ | |
745 | static void activate_receiver(struct xircom_private *card) | |
746 | { | |
747 | unsigned int val; | |
748 | int counter; | |
749 | enter("activate_receiver"); | |
750 | ||
751 | ||
752 | val = inl(card->io_port + CSR6); /* Operation mode */ | |
f3b197ac | 753 | |
1da177e4 LT |
754 | /* If the "active" bit is set and the receiver is already |
755 | active, no need to do the expensive thing */ | |
756 | if ((val&2) && (receive_active(card))) | |
757 | return; | |
f3b197ac JG |
758 | |
759 | ||
1da177e4 LT |
760 | val = val & ~2; /* disable the receiver */ |
761 | outl(val, card->io_port + CSR6); | |
762 | ||
763 | counter = 10; | |
764 | while (counter > 0) { | |
765 | if (!receive_active(card)) | |
766 | break; | |
767 | /* wait a while */ | |
768 | udelay(50); | |
769 | counter--; | |
770 | if (counter <= 0) | |
771 | printk(KERN_ERR "xircom_cb: Receiver failed to deactivate\n"); | |
772 | } | |
773 | ||
774 | /* enable the receiver */ | |
775 | val = inl(card->io_port + CSR6); /* Operation mode */ | |
776 | val = val | 2; /* enable the receiver */ | |
777 | outl(val, card->io_port + CSR6); | |
778 | ||
779 | /* now wait for the card to activate again */ | |
780 | counter = 10; | |
781 | while (counter > 0) { | |
782 | if (receive_active(card)) | |
783 | break; | |
784 | /* wait a while */ | |
785 | udelay(50); | |
786 | counter--; | |
787 | if (counter <= 0) | |
788 | printk(KERN_ERR "xircom_cb: Receiver failed to re-activate\n"); | |
789 | } | |
790 | ||
791 | leave("activate_receiver"); | |
792 | } | |
793 | ||
794 | /* | |
795 | deactivate_receiver disables the receiver on the card. | |
f3b197ac | 796 | To achieve this this code disables the receiver first; |
1da177e4 LT |
797 | then it waits for the receiver to become inactive. |
798 | ||
799 | must be called with the lock held and interrupts disabled. | |
800 | */ | |
801 | static void deactivate_receiver(struct xircom_private *card) | |
802 | { | |
803 | unsigned int val; | |
804 | int counter; | |
805 | enter("deactivate_receiver"); | |
806 | ||
807 | val = inl(card->io_port + CSR6); /* Operation mode */ | |
808 | val = val & ~2; /* disable the receiver */ | |
809 | outl(val, card->io_port + CSR6); | |
810 | ||
811 | counter = 10; | |
812 | while (counter > 0) { | |
813 | if (!receive_active(card)) | |
814 | break; | |
815 | /* wait a while */ | |
816 | udelay(50); | |
817 | counter--; | |
818 | if (counter <= 0) | |
819 | printk(KERN_ERR "xircom_cb: Receiver failed to deactivate\n"); | |
820 | } | |
821 | ||
822 | ||
823 | leave("deactivate_receiver"); | |
824 | } | |
825 | ||
826 | ||
827 | /* | |
828 | activate_transmitter enables the transmitter on the card. | |
829 | Before being allowed to active the transmitter, the transmitter | |
830 | must be completely de-activated. To achieve this, | |
f3b197ac | 831 | this code actually disables the transmitter first; then it waits for the |
1da177e4 LT |
832 | transmitter to become inactive, then it activates the transmitter and then |
833 | it waits for the transmitter to be active again. | |
834 | ||
835 | must be called with the lock held and interrupts disabled. | |
836 | */ | |
837 | static void activate_transmitter(struct xircom_private *card) | |
838 | { | |
839 | unsigned int val; | |
840 | int counter; | |
841 | enter("activate_transmitter"); | |
842 | ||
843 | ||
844 | val = inl(card->io_port + CSR6); /* Operation mode */ | |
845 | ||
846 | /* If the "active" bit is set and the receiver is already | |
f3b197ac | 847 | active, no need to do the expensive thing */ |
1da177e4 LT |
848 | if ((val&(1<<13)) && (transmit_active(card))) |
849 | return; | |
850 | ||
851 | val = val & ~(1 << 13); /* disable the transmitter */ | |
852 | outl(val, card->io_port + CSR6); | |
853 | ||
854 | counter = 10; | |
855 | while (counter > 0) { | |
856 | if (!transmit_active(card)) | |
857 | break; | |
858 | /* wait a while */ | |
859 | udelay(50); | |
860 | counter--; | |
861 | if (counter <= 0) | |
862 | printk(KERN_ERR "xircom_cb: Transmitter failed to deactivate\n"); | |
863 | } | |
864 | ||
865 | /* enable the transmitter */ | |
866 | val = inl(card->io_port + CSR6); /* Operation mode */ | |
867 | val = val | (1 << 13); /* enable the transmitter */ | |
868 | outl(val, card->io_port + CSR6); | |
869 | ||
870 | /* now wait for the card to activate again */ | |
871 | counter = 10; | |
872 | while (counter > 0) { | |
873 | if (transmit_active(card)) | |
874 | break; | |
875 | /* wait a while */ | |
876 | udelay(50); | |
877 | counter--; | |
878 | if (counter <= 0) | |
879 | printk(KERN_ERR "xircom_cb: Transmitter failed to re-activate\n"); | |
880 | } | |
881 | ||
882 | leave("activate_transmitter"); | |
883 | } | |
884 | ||
885 | /* | |
886 | deactivate_transmitter disables the transmitter on the card. | |
f3b197ac | 887 | To achieve this this code disables the transmitter first; |
1da177e4 LT |
888 | then it waits for the transmitter to become inactive. |
889 | ||
890 | must be called with the lock held and interrupts disabled. | |
891 | */ | |
892 | static void deactivate_transmitter(struct xircom_private *card) | |
893 | { | |
894 | unsigned int val; | |
895 | int counter; | |
896 | enter("deactivate_transmitter"); | |
897 | ||
898 | val = inl(card->io_port + CSR6); /* Operation mode */ | |
899 | val = val & ~2; /* disable the transmitter */ | |
900 | outl(val, card->io_port + CSR6); | |
901 | ||
902 | counter = 20; | |
903 | while (counter > 0) { | |
904 | if (!transmit_active(card)) | |
905 | break; | |
906 | /* wait a while */ | |
907 | udelay(50); | |
908 | counter--; | |
909 | if (counter <= 0) | |
910 | printk(KERN_ERR "xircom_cb: Transmitter failed to deactivate\n"); | |
911 | } | |
912 | ||
913 | ||
914 | leave("deactivate_transmitter"); | |
915 | } | |
916 | ||
917 | ||
918 | /* | |
919 | enable_transmit_interrupt enables the transmit interrupt | |
920 | ||
921 | must be called with the lock held and interrupts disabled. | |
922 | */ | |
923 | static void enable_transmit_interrupt(struct xircom_private *card) | |
924 | { | |
925 | unsigned int val; | |
926 | enter("enable_transmit_interrupt"); | |
927 | ||
928 | val = inl(card->io_port + CSR7); /* Interrupt enable register */ | |
929 | val |= 1; /* enable the transmit interrupt */ | |
930 | outl(val, card->io_port + CSR7); | |
931 | ||
932 | leave("enable_transmit_interrupt"); | |
933 | } | |
934 | ||
935 | ||
936 | /* | |
937 | enable_receive_interrupt enables the receive interrupt | |
938 | ||
939 | must be called with the lock held and interrupts disabled. | |
940 | */ | |
941 | static void enable_receive_interrupt(struct xircom_private *card) | |
942 | { | |
943 | unsigned int val; | |
944 | enter("enable_receive_interrupt"); | |
945 | ||
946 | val = inl(card->io_port + CSR7); /* Interrupt enable register */ | |
947 | val = val | (1 << 6); /* enable the receive interrupt */ | |
948 | outl(val, card->io_port + CSR7); | |
949 | ||
950 | leave("enable_receive_interrupt"); | |
951 | } | |
952 | ||
953 | /* | |
954 | enable_link_interrupt enables the link status change interrupt | |
955 | ||
956 | must be called with the lock held and interrupts disabled. | |
957 | */ | |
958 | static void enable_link_interrupt(struct xircom_private *card) | |
959 | { | |
960 | unsigned int val; | |
961 | enter("enable_link_interrupt"); | |
962 | ||
963 | val = inl(card->io_port + CSR7); /* Interrupt enable register */ | |
964 | val = val | (1 << 27); /* enable the link status chage interrupt */ | |
965 | outl(val, card->io_port + CSR7); | |
966 | ||
967 | leave("enable_link_interrupt"); | |
968 | } | |
969 | ||
970 | ||
971 | ||
972 | /* | |
973 | disable_all_interrupts disables all interrupts | |
974 | ||
975 | must be called with the lock held and interrupts disabled. | |
976 | */ | |
977 | static void disable_all_interrupts(struct xircom_private *card) | |
978 | { | |
979 | unsigned int val; | |
980 | enter("enable_all_interrupts"); | |
f3b197ac | 981 | |
1da177e4 LT |
982 | val = 0; /* disable all interrupts */ |
983 | outl(val, card->io_port + CSR7); | |
984 | ||
985 | leave("disable_all_interrupts"); | |
986 | } | |
987 | ||
988 | /* | |
989 | enable_common_interrupts enables several weird interrupts | |
990 | ||
991 | must be called with the lock held and interrupts disabled. | |
992 | */ | |
993 | static void enable_common_interrupts(struct xircom_private *card) | |
994 | { | |
995 | unsigned int val; | |
996 | enter("enable_link_interrupt"); | |
997 | ||
998 | val = inl(card->io_port + CSR7); /* Interrupt enable register */ | |
999 | val |= (1<<16); /* Normal Interrupt Summary */ | |
1000 | val |= (1<<15); /* Abnormal Interrupt Summary */ | |
1001 | val |= (1<<13); /* Fatal bus error */ | |
1002 | val |= (1<<8); /* Receive Process Stopped */ | |
1003 | val |= (1<<7); /* Receive Buffer Unavailable */ | |
1004 | val |= (1<<5); /* Transmit Underflow */ | |
1005 | val |= (1<<2); /* Transmit Buffer Unavailable */ | |
1006 | val |= (1<<1); /* Transmit Process Stopped */ | |
1007 | outl(val, card->io_port + CSR7); | |
1008 | ||
1009 | leave("enable_link_interrupt"); | |
1010 | } | |
1011 | ||
1012 | /* | |
1013 | enable_promisc starts promisc mode | |
1014 | ||
1015 | must be called with the lock held and interrupts disabled. | |
1016 | */ | |
1017 | static int enable_promisc(struct xircom_private *card) | |
1018 | { | |
1019 | unsigned int val; | |
1020 | enter("enable_promisc"); | |
1021 | ||
f3b197ac JG |
1022 | val = inl(card->io_port + CSR6); |
1023 | val = val | (1 << 6); | |
1da177e4 LT |
1024 | outl(val, card->io_port + CSR6); |
1025 | ||
1026 | leave("enable_promisc"); | |
1027 | return 1; | |
1028 | } | |
1029 | ||
1030 | ||
1031 | ||
1032 | ||
f3b197ac | 1033 | /* |
59c51591 | 1034 | link_status() checks the links status and will return 0 for no link, 10 for 10mbit link and 100 for.. guess what. |
1da177e4 LT |
1035 | |
1036 | Must be called in locked state with interrupts disabled | |
1037 | */ | |
1038 | static int link_status(struct xircom_private *card) | |
1039 | { | |
1040 | unsigned int val; | |
1041 | enter("link_status"); | |
f3b197ac | 1042 | |
1da177e4 | 1043 | val = inb(card->io_port + CSR12); |
f3b197ac | 1044 | |
1da177e4 LT |
1045 | if (!(val&(1<<2))) /* bit 2 is 0 for 10mbit link, 1 for not an 10mbit link */ |
1046 | return 10; | |
1047 | if (!(val&(1<<1))) /* bit 1 is 0 for 100mbit link, 1 for not an 100mbit link */ | |
1048 | return 100; | |
f3b197ac JG |
1049 | |
1050 | /* If we get here -> no link at all */ | |
1da177e4 LT |
1051 | |
1052 | leave("link_status"); | |
1053 | return 0; | |
1054 | } | |
1055 | ||
1056 | ||
1057 | ||
1058 | ||
1059 | ||
1060 | /* | |
1061 | read_mac_address() reads the MAC address from the NIC and stores it in the "dev" structure. | |
f3b197ac | 1062 | |
1da177e4 LT |
1063 | This function will take the spinlock itself and can, as a result, not be called with the lock helt. |
1064 | */ | |
1065 | static void read_mac_address(struct xircom_private *card) | |
1066 | { | |
1067 | unsigned char j, tuple, link, data_id, data_count; | |
1068 | unsigned long flags; | |
1069 | int i; | |
1070 | ||
1071 | enter("read_mac_address"); | |
f3b197ac | 1072 | |
1da177e4 LT |
1073 | spin_lock_irqsave(&card->lock, flags); |
1074 | ||
1075 | outl(1 << 12, card->io_port + CSR9); /* enable boot rom access */ | |
1076 | for (i = 0x100; i < 0x1f7; i += link + 2) { | |
1077 | outl(i, card->io_port + CSR10); | |
1078 | tuple = inl(card->io_port + CSR9) & 0xff; | |
1079 | outl(i + 1, card->io_port + CSR10); | |
1080 | link = inl(card->io_port + CSR9) & 0xff; | |
1081 | outl(i + 2, card->io_port + CSR10); | |
1082 | data_id = inl(card->io_port + CSR9) & 0xff; | |
1083 | outl(i + 3, card->io_port + CSR10); | |
1084 | data_count = inl(card->io_port + CSR9) & 0xff; | |
1085 | if ((tuple == 0x22) && (data_id == 0x04) && (data_count == 0x06)) { | |
f3b197ac | 1086 | /* |
1da177e4 LT |
1087 | * This is it. We have the data we want. |
1088 | */ | |
1089 | for (j = 0; j < 6; j++) { | |
1090 | outl(i + j + 4, card->io_port + CSR10); | |
1091 | card->dev->dev_addr[j] = inl(card->io_port + CSR9) & 0xff; | |
1092 | } | |
1093 | break; | |
1094 | } else if (link == 0) { | |
1095 | break; | |
1096 | } | |
1097 | } | |
1098 | spin_unlock_irqrestore(&card->lock, flags); | |
e174961c | 1099 | pr_debug(" %pM\n", card->dev->dev_addr); |
1da177e4 LT |
1100 | leave("read_mac_address"); |
1101 | } | |
1102 | ||
1103 | ||
1104 | /* | |
1105 | transceiver_voodoo() enables the external UTP plug thingy. | |
1106 | it's called voodoo as I stole this code and cannot cross-reference | |
1107 | it with the specification. | |
1108 | */ | |
1109 | static void transceiver_voodoo(struct xircom_private *card) | |
1110 | { | |
1111 | unsigned long flags; | |
1112 | ||
1113 | enter("transceiver_voodoo"); | |
1114 | ||
1115 | /* disable all powermanagement */ | |
1116 | pci_write_config_dword(card->pdev, PCI_POWERMGMT, 0x0000); | |
1117 | ||
1118 | setup_descriptors(card); | |
1119 | ||
1120 | spin_lock_irqsave(&card->lock, flags); | |
1121 | ||
1122 | outl(0x0008, card->io_port + CSR15); | |
f3b197ac | 1123 | udelay(25); |
1da177e4 LT |
1124 | outl(0xa8050000, card->io_port + CSR15); |
1125 | udelay(25); | |
1126 | outl(0xa00f0000, card->io_port + CSR15); | |
1127 | udelay(25); | |
f3b197ac | 1128 | |
1da177e4 LT |
1129 | spin_unlock_irqrestore(&card->lock, flags); |
1130 | ||
1131 | netif_start_queue(card->dev); | |
1132 | leave("transceiver_voodoo"); | |
1133 | } | |
1134 | ||
1135 | ||
1136 | static void xircom_up(struct xircom_private *card) | |
1137 | { | |
1138 | unsigned long flags; | |
1139 | int i; | |
1140 | ||
1141 | enter("xircom_up"); | |
1142 | ||
1143 | /* disable all powermanagement */ | |
1144 | pci_write_config_dword(card->pdev, PCI_POWERMGMT, 0x0000); | |
1145 | ||
1146 | setup_descriptors(card); | |
1147 | ||
1148 | spin_lock_irqsave(&card->lock, flags); | |
1149 | ||
f3b197ac | 1150 | |
1da177e4 LT |
1151 | enable_link_interrupt(card); |
1152 | enable_transmit_interrupt(card); | |
1153 | enable_receive_interrupt(card); | |
1154 | enable_common_interrupts(card); | |
1155 | enable_promisc(card); | |
f3b197ac | 1156 | |
1da177e4 | 1157 | /* The card can have received packets already, read them away now */ |
f3b197ac | 1158 | for (i=0;i<NUMDESCRIPTORS;i++) |
1da177e4 LT |
1159 | investigate_read_descriptor(card->dev,card,i,bufferoffsets[i]); |
1160 | ||
1161 | ||
1162 | spin_unlock_irqrestore(&card->lock, flags); | |
1163 | trigger_receive(card); | |
1164 | trigger_transmit(card); | |
1165 | netif_start_queue(card->dev); | |
1166 | leave("xircom_up"); | |
1167 | } | |
1168 | ||
1169 | /* Bufferoffset is in BYTES */ | |
1170 | static void investigate_read_descriptor(struct net_device *dev,struct xircom_private *card, int descnr, unsigned int bufferoffset) | |
1171 | { | |
f3b197ac JG |
1172 | int status; |
1173 | ||
1da177e4 | 1174 | enter("investigate_read_descriptor"); |
6f35d5d5 | 1175 | status = le32_to_cpu(card->rx_buffer[4*descnr]); |
f3b197ac | 1176 | |
1da177e4 | 1177 | if ((status > 0)) { /* packet received */ |
f3b197ac | 1178 | |
1da177e4 | 1179 | /* TODO: discard error packets */ |
f3b197ac | 1180 | |
1da177e4 LT |
1181 | short pkt_len = ((status >> 16) & 0x7ff) - 4; /* minus 4, we don't want the CRC */ |
1182 | struct sk_buff *skb; | |
1183 | ||
1184 | if (pkt_len > 1518) { | |
1185 | printk(KERN_ERR "xircom_cb: Packet length %i is bogus \n",pkt_len); | |
1186 | pkt_len = 1518; | |
1187 | } | |
1188 | ||
1189 | skb = dev_alloc_skb(pkt_len + 2); | |
1190 | if (skb == NULL) { | |
1034c9f6 | 1191 | dev->stats.rx_dropped++; |
1da177e4 LT |
1192 | goto out; |
1193 | } | |
1da177e4 | 1194 | skb_reserve(skb, 2); |
8c7b7faa | 1195 | skb_copy_to_linear_data(skb, (unsigned char*)&card->rx_buffer[bufferoffset / 4], pkt_len); |
1da177e4 LT |
1196 | skb_put(skb, pkt_len); |
1197 | skb->protocol = eth_type_trans(skb, dev); | |
1198 | netif_rx(skb); | |
1034c9f6 SH |
1199 | dev->stats.rx_packets++; |
1200 | dev->stats.rx_bytes += pkt_len; | |
f3b197ac | 1201 | |
1da177e4 LT |
1202 | out: |
1203 | /* give the buffer back to the card */ | |
6f35d5d5 | 1204 | card->rx_buffer[4*descnr] = cpu_to_le32(0x80000000); |
1da177e4 LT |
1205 | trigger_receive(card); |
1206 | } | |
1207 | ||
1208 | leave("investigate_read_descriptor"); | |
1209 | ||
1210 | } | |
1211 | ||
1212 | ||
1213 | /* Bufferoffset is in BYTES */ | |
1214 | static void investigate_write_descriptor(struct net_device *dev, struct xircom_private *card, int descnr, unsigned int bufferoffset) | |
1215 | { | |
1216 | int status; | |
1217 | ||
1218 | enter("investigate_write_descriptor"); | |
f3b197ac | 1219 | |
6f35d5d5 | 1220 | status = le32_to_cpu(card->tx_buffer[4*descnr]); |
f3b197ac | 1221 | #if 0 |
1da177e4 LT |
1222 | if (status & 0x8000) { /* Major error */ |
1223 | printk(KERN_ERR "Major transmit error status %x \n", status); | |
1224 | card->tx_buffer[4*descnr] = 0; | |
1225 | netif_wake_queue (dev); | |
1226 | } | |
1227 | #endif | |
1228 | if (status > 0) { /* bit 31 is 0 when done */ | |
1229 | if (card->tx_skb[descnr]!=NULL) { | |
1034c9f6 | 1230 | dev->stats.tx_bytes += card->tx_skb[descnr]->len; |
1da177e4 LT |
1231 | dev_kfree_skb_irq(card->tx_skb[descnr]); |
1232 | } | |
1233 | card->tx_skb[descnr] = NULL; | |
1234 | /* Bit 8 in the status field is 1 if there was a collision */ | |
1235 | if (status&(1<<8)) | |
1034c9f6 | 1236 | dev->stats.collisions++; |
1da177e4 LT |
1237 | card->tx_buffer[4*descnr] = 0; /* descriptor is free again */ |
1238 | netif_wake_queue (dev); | |
1034c9f6 | 1239 | dev->stats.tx_packets++; |
1da177e4 LT |
1240 | } |
1241 | ||
1242 | leave("investigate_write_descriptor"); | |
f3b197ac | 1243 | |
1da177e4 LT |
1244 | } |
1245 | ||
1246 | ||
1247 | static int __init xircom_init(void) | |
1248 | { | |
ec42cdb6 | 1249 | return pci_register_driver(&xircom_ops); |
1da177e4 LT |
1250 | } |
1251 | ||
1252 | static void __exit xircom_exit(void) | |
1253 | { | |
1254 | pci_unregister_driver(&xircom_ops); | |
f3b197ac | 1255 | } |
1da177e4 | 1256 | |
f3b197ac | 1257 | module_init(xircom_init) |
1da177e4 LT |
1258 | module_exit(xircom_exit) |
1259 |