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smsc95xx: Experimental: Enable turbo_mode and packetsize=2560 by default
[mirror_ubuntu-zesty-kernel.git] / drivers / net / usb / smsc95xx.c
CommitLineData
2f7ca802
SG
1 /***************************************************************************
2 *
3 * Copyright (C) 2007-2008 SMSC
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
9cb00073 16 * along with this program; if not, see <http://www.gnu.org/licenses/>.
2f7ca802
SG
17 *
18 *****************************************************************************/
19
20#include <linux/module.h>
21#include <linux/kmod.h>
2f7ca802
SG
22#include <linux/netdevice.h>
23#include <linux/etherdevice.h>
24#include <linux/ethtool.h>
25#include <linux/mii.h>
26#include <linux/usb.h>
bbd9f9ee
SG
27#include <linux/bitrev.h>
28#include <linux/crc16.h>
2f7ca802
SG
29#include <linux/crc32.h>
30#include <linux/usb/usbnet.h>
5a0e3ad6 31#include <linux/slab.h>
c489565b 32#include <linux/of_net.h>
2f7ca802
SG
33#include "smsc95xx.h"
34
35#define SMSC_CHIPNAME "smsc95xx"
13722bbe 36#define SMSC_DRIVER_VERSION "1.0.5"
2f7ca802
SG
37#define HS_USB_PKT_SIZE (512)
38#define FS_USB_PKT_SIZE (64)
39#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
40#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
41#define DEFAULT_BULK_IN_DELAY (0x00002000)
42#define MAX_SINGLE_PACKET_SIZE (2048)
43#define LAN95XX_EEPROM_MAGIC (0x9500)
44#define EEPROM_MAC_OFFSET (0x01)
f7b29271 45#define DEFAULT_TX_CSUM_ENABLE (true)
2f7ca802
SG
46#define DEFAULT_RX_CSUM_ENABLE (true)
47#define SMSC95XX_INTERNAL_PHY_ID (1)
48#define SMSC95XX_TX_OVERHEAD (8)
f7b29271 49#define SMSC95XX_TX_OVERHEAD_CSUM (12)
e5e3af83 50#define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \
bbd9f9ee 51 WAKE_MCAST | WAKE_ARP | WAKE_MAGIC)
2f7ca802 52
9ebca507
SG
53#define FEATURE_8_WAKEUP_FILTERS (0x01)
54#define FEATURE_PHY_NLP_CROSSOVER (0x02)
eb970ff0 55#define FEATURE_REMOTE_WAKEUP (0x04)
9ebca507 56
b2d4b150
SG
57#define SUSPEND_SUSPEND0 (0x01)
58#define SUSPEND_SUSPEND1 (0x02)
59#define SUSPEND_SUSPEND2 (0x04)
60#define SUSPEND_SUSPEND3 (0x08)
61#define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \
62 SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3)
63
d69d1694
CF
64#define CARRIER_CHECK_DELAY (2 * HZ)
65
2f7ca802 66struct smsc95xx_priv {
13722bbe 67 u32 chip_id;
2f7ca802 68 u32 mac_cr;
3c0f3c60
MZ
69 u32 hash_hi;
70 u32 hash_lo;
e0e474a8 71 u32 wolopts;
2f7ca802 72 spinlock_t mac_cr_lock;
9ebca507 73 u8 features;
b2d4b150 74 u8 suspend_flags;
13722bbe 75 u8 mdix_ctrl;
d69d1694
CF
76 bool link_ok;
77 struct delayed_work carrier_check;
78 struct usbnet *dev;
2f7ca802
SG
79};
80
eb939922 81static bool turbo_mode = true;
2f7ca802
SG
82module_param(turbo_mode, bool, 0644);
83MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
84
5ac77b0c
SG
85static bool truesize_mode = false;
86module_param(truesize_mode, bool, 0644);
87MODULE_PARM_DESC(truesize_mode, "Report larger truesize value");
88
3f95eb13
SN
89static int packetsize = 2560;
90module_param(packetsize, int, 0644);
91MODULE_PARM_DESC(packetsize, "Override the RX URB packet size");
92
ec32115d
ML
93static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index,
94 u32 *data, int in_pm)
2f7ca802 95{
72108fd2 96 u32 buf;
2f7ca802 97 int ret;
ec32115d 98 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
2f7ca802
SG
99
100 BUG_ON(!dev);
101
ec32115d
ML
102 if (!in_pm)
103 fn = usbnet_read_cmd;
104 else
105 fn = usbnet_read_cmd_nopm;
106
107 ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN
108 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
109 0, index, &buf, 4);
5a36b68b 110 if (unlikely(ret < 0)) {
1e1d7412
JP
111 netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n",
112 index, ret);
5a36b68b
DC
113 return ret;
114 }
2f7ca802 115
72108fd2
ML
116 le32_to_cpus(&buf);
117 *data = buf;
2f7ca802
SG
118
119 return ret;
120}
121
ec32115d
ML
122static int __must_check __smsc95xx_write_reg(struct usbnet *dev, u32 index,
123 u32 data, int in_pm)
2f7ca802 124{
72108fd2 125 u32 buf;
2f7ca802 126 int ret;
ec32115d 127 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
2f7ca802
SG
128
129 BUG_ON(!dev);
130
ec32115d
ML
131 if (!in_pm)
132 fn = usbnet_write_cmd;
133 else
134 fn = usbnet_write_cmd_nopm;
135
72108fd2
ML
136 buf = data;
137 cpu_to_le32s(&buf);
2f7ca802 138
ec32115d
ML
139 ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT
140 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
141 0, index, &buf, 4);
2f7ca802 142 if (unlikely(ret < 0))
1e1d7412
JP
143 netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n",
144 index, ret);
2f7ca802 145
2f7ca802
SG
146 return ret;
147}
148
ec32115d
ML
149static int __must_check smsc95xx_read_reg_nopm(struct usbnet *dev, u32 index,
150 u32 *data)
151{
152 return __smsc95xx_read_reg(dev, index, data, 1);
153}
154
155static int __must_check smsc95xx_write_reg_nopm(struct usbnet *dev, u32 index,
156 u32 data)
157{
158 return __smsc95xx_write_reg(dev, index, data, 1);
159}
160
161static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index,
162 u32 *data)
163{
164 return __smsc95xx_read_reg(dev, index, data, 0);
165}
166
167static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index,
168 u32 data)
169{
170 return __smsc95xx_write_reg(dev, index, data, 0);
171}
e0e474a8 172
2f7ca802
SG
173/* Loop until the read is completed with timeout
174 * called with phy_mutex held */
e5e3af83
SG
175static int __must_check __smsc95xx_phy_wait_not_busy(struct usbnet *dev,
176 int in_pm)
2f7ca802
SG
177{
178 unsigned long start_time = jiffies;
179 u32 val;
769ea6d8 180 int ret;
2f7ca802
SG
181
182 do {
e5e3af83 183 ret = __smsc95xx_read_reg(dev, MII_ADDR, &val, in_pm);
b052e073
SG
184 if (ret < 0) {
185 netdev_warn(dev->net, "Error reading MII_ACCESS\n");
186 return ret;
187 }
188
2f7ca802
SG
189 if (!(val & MII_BUSY_))
190 return 0;
191 } while (!time_after(jiffies, start_time + HZ));
192
193 return -EIO;
194}
195
e5e3af83
SG
196static int __smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx,
197 int in_pm)
2f7ca802
SG
198{
199 struct usbnet *dev = netdev_priv(netdev);
200 u32 val, addr;
769ea6d8 201 int ret;
2f7ca802
SG
202
203 mutex_lock(&dev->phy_mutex);
204
205 /* confirm MII not busy */
e5e3af83 206 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
b052e073
SG
207 if (ret < 0) {
208 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n");
209 goto done;
210 }
2f7ca802
SG
211
212 /* set the address, index & direction (read from PHY) */
213 phy_id &= dev->mii.phy_id_mask;
214 idx &= dev->mii.reg_num_mask;
80928805 215 addr = (phy_id << 11) | (idx << 6) | MII_READ_ | MII_BUSY_;
e5e3af83 216 ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm);
b052e073
SG
217 if (ret < 0) {
218 netdev_warn(dev->net, "Error writing MII_ADDR\n");
219 goto done;
220 }
2f7ca802 221
e5e3af83 222 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
b052e073
SG
223 if (ret < 0) {
224 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx);
225 goto done;
226 }
2f7ca802 227
e5e3af83 228 ret = __smsc95xx_read_reg(dev, MII_DATA, &val, in_pm);
b052e073
SG
229 if (ret < 0) {
230 netdev_warn(dev->net, "Error reading MII_DATA\n");
231 goto done;
232 }
2f7ca802 233
769ea6d8 234 ret = (u16)(val & 0xFFFF);
2f7ca802 235
769ea6d8
SG
236done:
237 mutex_unlock(&dev->phy_mutex);
238 return ret;
2f7ca802
SG
239}
240
e5e3af83
SG
241static void __smsc95xx_mdio_write(struct net_device *netdev, int phy_id,
242 int idx, int regval, int in_pm)
2f7ca802
SG
243{
244 struct usbnet *dev = netdev_priv(netdev);
245 u32 val, addr;
769ea6d8 246 int ret;
2f7ca802
SG
247
248 mutex_lock(&dev->phy_mutex);
249
250 /* confirm MII not busy */
e5e3af83 251 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
b052e073
SG
252 if (ret < 0) {
253 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n");
254 goto done;
255 }
2f7ca802
SG
256
257 val = regval;
e5e3af83 258 ret = __smsc95xx_write_reg(dev, MII_DATA, val, in_pm);
b052e073
SG
259 if (ret < 0) {
260 netdev_warn(dev->net, "Error writing MII_DATA\n");
261 goto done;
262 }
2f7ca802
SG
263
264 /* set the address, index & direction (write to PHY) */
265 phy_id &= dev->mii.phy_id_mask;
266 idx &= dev->mii.reg_num_mask;
80928805 267 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_ | MII_BUSY_;
e5e3af83 268 ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm);
b052e073
SG
269 if (ret < 0) {
270 netdev_warn(dev->net, "Error writing MII_ADDR\n");
271 goto done;
272 }
2f7ca802 273
e5e3af83 274 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
b052e073
SG
275 if (ret < 0) {
276 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx);
277 goto done;
278 }
2f7ca802 279
769ea6d8 280done:
2f7ca802
SG
281 mutex_unlock(&dev->phy_mutex);
282}
283
e5e3af83
SG
284static int smsc95xx_mdio_read_nopm(struct net_device *netdev, int phy_id,
285 int idx)
286{
287 return __smsc95xx_mdio_read(netdev, phy_id, idx, 1);
288}
289
290static void smsc95xx_mdio_write_nopm(struct net_device *netdev, int phy_id,
291 int idx, int regval)
292{
293 __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 1);
294}
295
296static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
297{
298 return __smsc95xx_mdio_read(netdev, phy_id, idx, 0);
299}
300
301static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
302 int regval)
303{
304 __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 0);
305}
306
769ea6d8 307static int __must_check smsc95xx_wait_eeprom(struct usbnet *dev)
2f7ca802
SG
308{
309 unsigned long start_time = jiffies;
310 u32 val;
769ea6d8 311 int ret;
2f7ca802
SG
312
313 do {
769ea6d8 314 ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
b052e073
SG
315 if (ret < 0) {
316 netdev_warn(dev->net, "Error reading E2P_CMD\n");
317 return ret;
318 }
319
2f7ca802
SG
320 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
321 break;
322 udelay(40);
323 } while (!time_after(jiffies, start_time + HZ));
324
325 if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
60b86755 326 netdev_warn(dev->net, "EEPROM read operation timeout\n");
2f7ca802
SG
327 return -EIO;
328 }
329
330 return 0;
331}
332
769ea6d8 333static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
2f7ca802
SG
334{
335 unsigned long start_time = jiffies;
336 u32 val;
769ea6d8 337 int ret;
2f7ca802
SG
338
339 do {
769ea6d8 340 ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
b052e073
SG
341 if (ret < 0) {
342 netdev_warn(dev->net, "Error reading E2P_CMD\n");
343 return ret;
344 }
2f7ca802 345
2f7ca802
SG
346 if (!(val & E2P_CMD_BUSY_))
347 return 0;
348
349 udelay(40);
350 } while (!time_after(jiffies, start_time + HZ));
351
60b86755 352 netdev_warn(dev->net, "EEPROM is busy\n");
2f7ca802
SG
353 return -EIO;
354}
355
356static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
357 u8 *data)
358{
359 u32 val;
360 int i, ret;
361
362 BUG_ON(!dev);
363 BUG_ON(!data);
364
365 ret = smsc95xx_eeprom_confirm_not_busy(dev);
366 if (ret)
367 return ret;
368
369 for (i = 0; i < length; i++) {
370 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
769ea6d8 371 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
b052e073
SG
372 if (ret < 0) {
373 netdev_warn(dev->net, "Error writing E2P_CMD\n");
374 return ret;
375 }
2f7ca802
SG
376
377 ret = smsc95xx_wait_eeprom(dev);
378 if (ret < 0)
379 return ret;
380
769ea6d8 381 ret = smsc95xx_read_reg(dev, E2P_DATA, &val);
b052e073
SG
382 if (ret < 0) {
383 netdev_warn(dev->net, "Error reading E2P_DATA\n");
384 return ret;
385 }
2f7ca802
SG
386
387 data[i] = val & 0xFF;
388 offset++;
389 }
390
391 return 0;
392}
393
394static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
395 u8 *data)
396{
397 u32 val;
398 int i, ret;
399
400 BUG_ON(!dev);
401 BUG_ON(!data);
402
403 ret = smsc95xx_eeprom_confirm_not_busy(dev);
404 if (ret)
405 return ret;
406
407 /* Issue write/erase enable command */
408 val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
769ea6d8 409 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
b052e073
SG
410 if (ret < 0) {
411 netdev_warn(dev->net, "Error writing E2P_DATA\n");
412 return ret;
413 }
2f7ca802
SG
414
415 ret = smsc95xx_wait_eeprom(dev);
416 if (ret < 0)
417 return ret;
418
419 for (i = 0; i < length; i++) {
420
421 /* Fill data register */
422 val = data[i];
769ea6d8 423 ret = smsc95xx_write_reg(dev, E2P_DATA, val);
b052e073
SG
424 if (ret < 0) {
425 netdev_warn(dev->net, "Error writing E2P_DATA\n");
426 return ret;
427 }
2f7ca802
SG
428
429 /* Send "write" command */
430 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
769ea6d8 431 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
b052e073
SG
432 if (ret < 0) {
433 netdev_warn(dev->net, "Error writing E2P_CMD\n");
434 return ret;
435 }
2f7ca802
SG
436
437 ret = smsc95xx_wait_eeprom(dev);
438 if (ret < 0)
439 return ret;
440
441 offset++;
442 }
443
444 return 0;
445}
446
769ea6d8 447static int __must_check smsc95xx_write_reg_async(struct usbnet *dev, u16 index,
7b9e7580 448 u32 data)
2f7ca802 449{
1d74a6bd 450 const u16 size = 4;
7b9e7580 451 u32 buf;
72108fd2 452 int ret;
2f7ca802 453
7b9e7580
SG
454 buf = data;
455 cpu_to_le32s(&buf);
456
72108fd2
ML
457 ret = usbnet_write_cmd_async(dev, USB_VENDOR_REQUEST_WRITE_REGISTER,
458 USB_DIR_OUT | USB_TYPE_VENDOR |
459 USB_RECIP_DEVICE,
7b9e7580 460 0, index, &buf, size);
72108fd2
ML
461 if (ret < 0)
462 netdev_warn(dev->net, "Error write async cmd, sts=%d\n",
463 ret);
464 return ret;
2f7ca802
SG
465}
466
467/* returns hash bit number for given MAC address
468 * example:
469 * 01 00 5E 00 00 01 -> returns bit number 31 */
470static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
471{
472 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
473}
474
475static void smsc95xx_set_multicast(struct net_device *netdev)
476{
477 struct usbnet *dev = netdev_priv(netdev);
478 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
2f7ca802 479 unsigned long flags;
769ea6d8 480 int ret;
2f7ca802 481
3c0f3c60
MZ
482 pdata->hash_hi = 0;
483 pdata->hash_lo = 0;
484
2f7ca802
SG
485 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
486
487 if (dev->net->flags & IFF_PROMISC) {
a475f603 488 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n");
2f7ca802
SG
489 pdata->mac_cr |= MAC_CR_PRMS_;
490 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
491 } else if (dev->net->flags & IFF_ALLMULTI) {
a475f603 492 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n");
2f7ca802
SG
493 pdata->mac_cr |= MAC_CR_MCPAS_;
494 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
4cd24eaf 495 } else if (!netdev_mc_empty(dev->net)) {
22bedad3 496 struct netdev_hw_addr *ha;
2f7ca802
SG
497
498 pdata->mac_cr |= MAC_CR_HPFILT_;
499 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
500
22bedad3
JP
501 netdev_for_each_mc_addr(ha, netdev) {
502 u32 bitnum = smsc95xx_hash(ha->addr);
a92635dc
JP
503 u32 mask = 0x01 << (bitnum & 0x1F);
504 if (bitnum & 0x20)
3c0f3c60 505 pdata->hash_hi |= mask;
a92635dc 506 else
3c0f3c60 507 pdata->hash_lo |= mask;
2f7ca802
SG
508 }
509
a475f603 510 netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n",
3c0f3c60 511 pdata->hash_hi, pdata->hash_lo);
2f7ca802 512 } else {
a475f603 513 netif_dbg(dev, drv, dev->net, "receive own packets only\n");
2f7ca802
SG
514 pdata->mac_cr &=
515 ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
516 }
517
518 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
519
520 /* Initiate async writes, as we can't wait for completion here */
7b9e7580 521 ret = smsc95xx_write_reg_async(dev, HASHH, pdata->hash_hi);
b052e073
SG
522 if (ret < 0)
523 netdev_warn(dev->net, "failed to initiate async write to HASHH\n");
769ea6d8 524
7b9e7580 525 ret = smsc95xx_write_reg_async(dev, HASHL, pdata->hash_lo);
b052e073
SG
526 if (ret < 0)
527 netdev_warn(dev->net, "failed to initiate async write to HASHL\n");
769ea6d8 528
7b9e7580 529 ret = smsc95xx_write_reg_async(dev, MAC_CR, pdata->mac_cr);
b052e073
SG
530 if (ret < 0)
531 netdev_warn(dev->net, "failed to initiate async write to MAC_CR\n");
2f7ca802
SG
532}
533
769ea6d8
SG
534static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
535 u16 lcladv, u16 rmtadv)
2f7ca802
SG
536{
537 u32 flow, afc_cfg = 0;
538
539 int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
e360a8b4 540 if (ret < 0)
b052e073 541 return ret;
2f7ca802
SG
542
543 if (duplex == DUPLEX_FULL) {
bc02ff95 544 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
2f7ca802
SG
545
546 if (cap & FLOW_CTRL_RX)
547 flow = 0xFFFF0002;
548 else
549 flow = 0;
550
551 if (cap & FLOW_CTRL_TX)
552 afc_cfg |= 0xF;
553 else
554 afc_cfg &= ~0xF;
555
a475f603 556 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n",
60b86755
JP
557 cap & FLOW_CTRL_RX ? "enabled" : "disabled",
558 cap & FLOW_CTRL_TX ? "enabled" : "disabled");
2f7ca802 559 } else {
a475f603 560 netif_dbg(dev, link, dev->net, "half duplex\n");
2f7ca802
SG
561 flow = 0;
562 afc_cfg |= 0xF;
563 }
564
769ea6d8 565 ret = smsc95xx_write_reg(dev, FLOW, flow);
b052e073 566 if (ret < 0)
e360a8b4 567 return ret;
769ea6d8 568
e360a8b4 569 return smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
2f7ca802
SG
570}
571
572static int smsc95xx_link_reset(struct usbnet *dev)
573{
574 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
575 struct mii_if_info *mii = &dev->mii;
8ae6daca 576 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
2f7ca802
SG
577 unsigned long flags;
578 u16 lcladv, rmtadv;
769ea6d8 579 int ret;
2f7ca802
SG
580
581 /* clear interrupt status */
769ea6d8 582 ret = smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
e360a8b4 583 if (ret < 0)
b052e073 584 return ret;
769ea6d8
SG
585
586 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
e360a8b4 587 if (ret < 0)
b052e073 588 return ret;
2f7ca802
SG
589
590 mii_check_media(mii, 1, 1);
591 mii_ethtool_gset(&dev->mii, &ecmd);
592 lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
593 rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
594
8ae6daca
DD
595 netif_dbg(dev, link, dev->net,
596 "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n",
597 ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv);
2f7ca802
SG
598
599 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
600 if (ecmd.duplex != DUPLEX_FULL) {
601 pdata->mac_cr &= ~MAC_CR_FDPX_;
602 pdata->mac_cr |= MAC_CR_RCVOWN_;
603 } else {
604 pdata->mac_cr &= ~MAC_CR_RCVOWN_;
605 pdata->mac_cr |= MAC_CR_FDPX_;
606 }
607 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
608
769ea6d8 609 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
e360a8b4 610 if (ret < 0)
b052e073 611 return ret;
2f7ca802 612
769ea6d8 613 ret = smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
b052e073
SG
614 if (ret < 0)
615 netdev_warn(dev->net, "Error updating PHY flow control\n");
2f7ca802 616
b052e073 617 return ret;
2f7ca802
SG
618}
619
620static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
621{
622 u32 intdata;
623
624 if (urb->actual_length != 4) {
60b86755
JP
625 netdev_warn(dev->net, "unexpected urb length %d\n",
626 urb->actual_length);
2f7ca802
SG
627 return;
628 }
629
630 memcpy(&intdata, urb->transfer_buffer, 4);
1d74a6bd 631 le32_to_cpus(&intdata);
2f7ca802 632
a475f603 633 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata);
2f7ca802
SG
634
635 if (intdata & INT_ENP_PHY_INT_)
636 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
637 else
60b86755
JP
638 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
639 intdata);
2f7ca802
SG
640}
641
d69d1694
CF
642static void set_carrier(struct usbnet *dev, bool link)
643{
644 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
645
646 if (pdata->link_ok == link)
647 return;
648
649 pdata->link_ok = link;
650
651 if (link)
652 usbnet_link_change(dev, 1, 0);
653 else
654 usbnet_link_change(dev, 0, 0);
655}
656
657static void check_carrier(struct work_struct *work)
658{
659 struct smsc95xx_priv *pdata = container_of(work, struct smsc95xx_priv,
660 carrier_check.work);
661 struct usbnet *dev = pdata->dev;
662 int ret;
663
664 if (pdata->suspend_flags != 0)
665 return;
666
667 ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMSR);
668 if (ret < 0) {
669 netdev_warn(dev->net, "Failed to read MII_BMSR\n");
670 return;
671 }
672 if (ret & BMSR_LSTATUS)
673 set_carrier(dev, 1);
674 else
675 set_carrier(dev, 0);
676
677 schedule_delayed_work(&pdata->carrier_check, CARRIER_CHECK_DELAY);
678}
679
f7b29271 680/* Enable or disable Tx & Rx checksum offload engines */
c8f44aff
MM
681static int smsc95xx_set_features(struct net_device *netdev,
682 netdev_features_t features)
2f7ca802 683{
78e47fe4 684 struct usbnet *dev = netdev_priv(netdev);
2f7ca802 685 u32 read_buf;
78e47fe4
MM
686 int ret;
687
688 ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
e360a8b4 689 if (ret < 0)
b052e073 690 return ret;
2f7ca802 691
78e47fe4 692 if (features & NETIF_F_HW_CSUM)
f7b29271
SG
693 read_buf |= Tx_COE_EN_;
694 else
695 read_buf &= ~Tx_COE_EN_;
696
78e47fe4 697 if (features & NETIF_F_RXCSUM)
2f7ca802
SG
698 read_buf |= Rx_COE_EN_;
699 else
700 read_buf &= ~Rx_COE_EN_;
701
702 ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
e360a8b4 703 if (ret < 0)
b052e073 704 return ret;
2f7ca802 705
a475f603 706 netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);
2f7ca802
SG
707 return 0;
708}
709
710static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
711{
712 return MAX_EEPROM_SIZE;
713}
714
715static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
716 struct ethtool_eeprom *ee, u8 *data)
717{
718 struct usbnet *dev = netdev_priv(netdev);
719
720 ee->magic = LAN95XX_EEPROM_MAGIC;
721
722 return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
723}
724
725static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
726 struct ethtool_eeprom *ee, u8 *data)
727{
728 struct usbnet *dev = netdev_priv(netdev);
729
730 if (ee->magic != LAN95XX_EEPROM_MAGIC) {
60b86755
JP
731 netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n",
732 ee->magic);
2f7ca802
SG
733 return -EINVAL;
734 }
735
736 return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
737}
738
9fa32e94
EV
739static int smsc95xx_ethtool_getregslen(struct net_device *netdev)
740{
741 /* all smsc95xx registers */
96245317 742 return COE_CR - ID_REV + sizeof(u32);
9fa32e94
EV
743}
744
745static void
746smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs,
747 void *buf)
748{
749 struct usbnet *dev = netdev_priv(netdev);
d348446b
DC
750 unsigned int i, j;
751 int retval;
9fa32e94
EV
752 u32 *data = buf;
753
754 retval = smsc95xx_read_reg(dev, ID_REV, &regs->version);
755 if (retval < 0) {
756 netdev_warn(netdev, "REGS: cannot read ID_REV\n");
757 return;
758 }
759
760 for (i = ID_REV, j = 0; i <= COE_CR; i += (sizeof(u32)), j++) {
761 retval = smsc95xx_read_reg(dev, i, &data[j]);
762 if (retval < 0) {
763 netdev_warn(netdev, "REGS: cannot read reg[%x]\n", i);
764 return;
765 }
766 }
767}
768
e0e474a8
SG
769static void smsc95xx_ethtool_get_wol(struct net_device *net,
770 struct ethtool_wolinfo *wolinfo)
771{
772 struct usbnet *dev = netdev_priv(net);
773 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
774
775 wolinfo->supported = SUPPORTED_WAKE;
776 wolinfo->wolopts = pdata->wolopts;
777}
778
779static int smsc95xx_ethtool_set_wol(struct net_device *net,
780 struct ethtool_wolinfo *wolinfo)
781{
782 struct usbnet *dev = netdev_priv(net);
783 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
3b14692c 784 int ret;
e0e474a8
SG
785
786 pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE;
3b14692c
SG
787
788 ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts);
b052e073
SG
789 if (ret < 0)
790 netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret);
3b14692c 791
b052e073 792 return ret;
e0e474a8
SG
793}
794
13722bbe
WH
795static int get_mdix_status(struct net_device *net)
796{
797 struct usbnet *dev = netdev_priv(net);
798 u32 val;
799 int buf;
800
801 buf = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, SPECIAL_CTRL_STS);
802 if (buf & SPECIAL_CTRL_STS_OVRRD_AMDIX_) {
803 if (buf & SPECIAL_CTRL_STS_AMDIX_ENABLE_)
804 return ETH_TP_MDI_AUTO;
805 else if (buf & SPECIAL_CTRL_STS_AMDIX_STATE_)
806 return ETH_TP_MDI_X;
807 } else {
808 buf = smsc95xx_read_reg(dev, STRAP_STATUS, &val);
809 if (val & STRAP_STATUS_AMDIX_EN_)
810 return ETH_TP_MDI_AUTO;
811 }
812
813 return ETH_TP_MDI;
814}
815
816static void set_mdix_status(struct net_device *net, __u8 mdix_ctrl)
817{
818 struct usbnet *dev = netdev_priv(net);
819 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
820 int buf;
821
822 if ((pdata->chip_id == ID_REV_CHIP_ID_9500A_) ||
823 (pdata->chip_id == ID_REV_CHIP_ID_9530_) ||
824 (pdata->chip_id == ID_REV_CHIP_ID_89530_) ||
825 (pdata->chip_id == ID_REV_CHIP_ID_9730_)) {
826 /* Extend Manual AutoMDIX timer for 9500A/9500Ai */
827 buf = smsc95xx_mdio_read(dev->net, dev->mii.phy_id,
828 PHY_EDPD_CONFIG);
829 buf |= PHY_EDPD_CONFIG_EXT_CROSSOVER_;
830 smsc95xx_mdio_write(dev->net, dev->mii.phy_id,
831 PHY_EDPD_CONFIG, buf);
832 }
833
834 if (mdix_ctrl == ETH_TP_MDI) {
835 buf = smsc95xx_mdio_read(dev->net, dev->mii.phy_id,
836 SPECIAL_CTRL_STS);
837 buf |= SPECIAL_CTRL_STS_OVRRD_AMDIX_;
838 buf &= ~(SPECIAL_CTRL_STS_AMDIX_ENABLE_ |
839 SPECIAL_CTRL_STS_AMDIX_STATE_);
840 smsc95xx_mdio_write(dev->net, dev->mii.phy_id,
841 SPECIAL_CTRL_STS, buf);
842 } else if (mdix_ctrl == ETH_TP_MDI_X) {
843 buf = smsc95xx_mdio_read(dev->net, dev->mii.phy_id,
844 SPECIAL_CTRL_STS);
845 buf |= SPECIAL_CTRL_STS_OVRRD_AMDIX_;
846 buf &= ~(SPECIAL_CTRL_STS_AMDIX_ENABLE_ |
847 SPECIAL_CTRL_STS_AMDIX_STATE_);
848 buf |= SPECIAL_CTRL_STS_AMDIX_STATE_;
849 smsc95xx_mdio_write(dev->net, dev->mii.phy_id,
850 SPECIAL_CTRL_STS, buf);
851 } else if (mdix_ctrl == ETH_TP_MDI_AUTO) {
852 buf = smsc95xx_mdio_read(dev->net, dev->mii.phy_id,
853 SPECIAL_CTRL_STS);
854 buf &= ~SPECIAL_CTRL_STS_OVRRD_AMDIX_;
855 buf &= ~(SPECIAL_CTRL_STS_AMDIX_ENABLE_ |
856 SPECIAL_CTRL_STS_AMDIX_STATE_);
857 buf |= SPECIAL_CTRL_STS_AMDIX_ENABLE_;
858 smsc95xx_mdio_write(dev->net, dev->mii.phy_id,
859 SPECIAL_CTRL_STS, buf);
860 }
861 pdata->mdix_ctrl = mdix_ctrl;
862}
863
864static int smsc95xx_get_settings(struct net_device *net,
865 struct ethtool_cmd *cmd)
866{
867 struct usbnet *dev = netdev_priv(net);
868 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
869 int retval;
870
871 retval = usbnet_get_settings(net, cmd);
872
873 cmd->eth_tp_mdix = pdata->mdix_ctrl;
874 cmd->eth_tp_mdix_ctrl = pdata->mdix_ctrl;
875
876 return retval;
877}
878
879static int smsc95xx_set_settings(struct net_device *net,
880 struct ethtool_cmd *cmd)
881{
882 struct usbnet *dev = netdev_priv(net);
883 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
884 int retval;
885
886 if (pdata->mdix_ctrl != cmd->eth_tp_mdix_ctrl)
887 set_mdix_status(net, cmd->eth_tp_mdix_ctrl);
888
889 retval = usbnet_set_settings(net, cmd);
890
891 return retval;
892}
893
0fc0b732 894static const struct ethtool_ops smsc95xx_ethtool_ops = {
2f7ca802
SG
895 .get_link = usbnet_get_link,
896 .nway_reset = usbnet_nway_reset,
897 .get_drvinfo = usbnet_get_drvinfo,
898 .get_msglevel = usbnet_get_msglevel,
899 .set_msglevel = usbnet_set_msglevel,
13722bbe
WH
900 .get_settings = smsc95xx_get_settings,
901 .set_settings = smsc95xx_set_settings,
2f7ca802
SG
902 .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len,
903 .get_eeprom = smsc95xx_ethtool_get_eeprom,
904 .set_eeprom = smsc95xx_ethtool_set_eeprom,
9fa32e94
EV
905 .get_regs_len = smsc95xx_ethtool_getregslen,
906 .get_regs = smsc95xx_ethtool_getregs,
e0e474a8
SG
907 .get_wol = smsc95xx_ethtool_get_wol,
908 .set_wol = smsc95xx_ethtool_set_wol,
2f7ca802
SG
909};
910
911static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
912{
913 struct usbnet *dev = netdev_priv(netdev);
914
915 if (!netif_running(netdev))
916 return -EINVAL;
917
918 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
919}
920
921static void smsc95xx_init_mac_address(struct usbnet *dev)
922{
c489565b
AB
923 const u8 *mac_addr;
924
925 /* maybe the boot loader passed the MAC address in devicetree */
926 mac_addr = of_get_mac_address(dev->udev->dev.of_node);
927 if (mac_addr) {
928 memcpy(dev->net->dev_addr, mac_addr, ETH_ALEN);
929 return;
930 }
931
2f7ca802
SG
932 /* try reading mac address from EEPROM */
933 if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
934 dev->net->dev_addr) == 0) {
935 if (is_valid_ether_addr(dev->net->dev_addr)) {
936 /* eeprom values are valid so use them */
a475f603 937 netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n");
2f7ca802
SG
938 return;
939 }
940 }
941
c489565b 942 /* no useful static MAC address found. generate a random one */
f2cedb63 943 eth_hw_addr_random(dev->net);
c7e12ead 944 netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
2f7ca802
SG
945}
946
947static int smsc95xx_set_mac_address(struct usbnet *dev)
948{
949 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
950 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
951 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
952 int ret;
953
954 ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
b052e073 955 if (ret < 0)
e360a8b4 956 return ret;
2f7ca802 957
e360a8b4 958 return smsc95xx_write_reg(dev, ADDRH, addr_hi);
2f7ca802
SG
959}
960
961/* starts the TX path */
769ea6d8 962static int smsc95xx_start_tx_path(struct usbnet *dev)
2f7ca802
SG
963{
964 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
965 unsigned long flags;
769ea6d8 966 int ret;
2f7ca802
SG
967
968 /* Enable Tx at MAC */
969 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
970 pdata->mac_cr |= MAC_CR_TXEN_;
971 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
972
769ea6d8 973 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
e360a8b4 974 if (ret < 0)
b052e073 975 return ret;
2f7ca802
SG
976
977 /* Enable Tx at SCSRs */
e360a8b4 978 return smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_);
2f7ca802
SG
979}
980
981/* Starts the Receive path */
ec32115d 982static int smsc95xx_start_rx_path(struct usbnet *dev, int in_pm)
2f7ca802
SG
983{
984 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
985 unsigned long flags;
986
987 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
988 pdata->mac_cr |= MAC_CR_RXEN_;
989 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
990
e360a8b4 991 return __smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr, in_pm);
2f7ca802
SG
992}
993
994static int smsc95xx_phy_initialize(struct usbnet *dev)
995{
769ea6d8 996 int bmcr, ret, timeout = 0;
db443c44 997
2f7ca802
SG
998 /* Initialize MII structure */
999 dev->mii.dev = dev->net;
1000 dev->mii.mdio_read = smsc95xx_mdio_read;
1001 dev->mii.mdio_write = smsc95xx_mdio_write;
1002 dev->mii.phy_id_mask = 0x1f;
1003 dev->mii.reg_num_mask = 0x1f;
1004 dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
1005
db443c44 1006 /* reset phy and wait for reset to complete */
2f7ca802 1007 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
db443c44
SG
1008
1009 do {
1010 msleep(10);
1011 bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
1012 timeout++;
d9460920 1013 } while ((bmcr & BMCR_RESET) && (timeout < 100));
db443c44
SG
1014
1015 if (timeout >= 100) {
1016 netdev_warn(dev->net, "timeout on PHY Reset");
1017 return -EIO;
1018 }
1019
2f7ca802
SG
1020 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1021 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
1022 ADVERTISE_PAUSE_ASYM);
1023
1024 /* read to clear */
769ea6d8 1025 ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
b052e073
SG
1026 if (ret < 0) {
1027 netdev_warn(dev->net, "Failed to read PHY_INT_SRC during init\n");
1028 return ret;
1029 }
2f7ca802
SG
1030
1031 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
1032 PHY_INT_MASK_DEFAULT_);
1033 mii_nway_restart(&dev->mii);
1034
a475f603 1035 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n");
2f7ca802
SG
1036 return 0;
1037}
1038
1039static int smsc95xx_reset(struct usbnet *dev)
1040{
1041 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1042 u32 read_buf, write_buf, burst_cap;
1043 int ret = 0, timeout;
2f7ca802 1044
a475f603 1045 netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n");
2f7ca802 1046
4436761b 1047 ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_);
e360a8b4 1048 if (ret < 0)
b052e073 1049 return ret;
2f7ca802
SG
1050
1051 timeout = 0;
1052 do {
cf2acec2 1053 msleep(10);
2f7ca802 1054 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
e360a8b4 1055 if (ret < 0)
b052e073 1056 return ret;
2f7ca802
SG
1057 timeout++;
1058 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
1059
1060 if (timeout >= 100) {
60b86755 1061 netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n");
2f7ca802
SG
1062 return ret;
1063 }
1064
4436761b 1065 ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_);
e360a8b4 1066 if (ret < 0)
b052e073 1067 return ret;
2f7ca802
SG
1068
1069 timeout = 0;
1070 do {
cf2acec2 1071 msleep(10);
2f7ca802 1072 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
e360a8b4 1073 if (ret < 0)
b052e073 1074 return ret;
2f7ca802
SG
1075 timeout++;
1076 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
1077
1078 if (timeout >= 100) {
60b86755 1079 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
2f7ca802
SG
1080 return ret;
1081 }
1082
2f7ca802
SG
1083 ret = smsc95xx_set_mac_address(dev);
1084 if (ret < 0)
1085 return ret;
1086
1e1d7412
JP
1087 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n",
1088 dev->net->dev_addr);
2f7ca802
SG
1089
1090 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
e360a8b4 1091 if (ret < 0)
b052e073 1092 return ret;
2f7ca802 1093
1e1d7412
JP
1094 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n",
1095 read_buf);
2f7ca802
SG
1096
1097 read_buf |= HW_CFG_BIR_;
1098
1099 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
e360a8b4 1100 if (ret < 0)
b052e073 1101 return ret;
2f7ca802
SG
1102
1103 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
e360a8b4 1104 if (ret < 0)
b052e073 1105 return ret;
b052e073 1106
a475f603
JP
1107 netif_dbg(dev, ifup, dev->net,
1108 "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n",
1109 read_buf);
2f7ca802
SG
1110
1111 if (!turbo_mode) {
1112 burst_cap = 0;
3f95eb13 1113 dev->rx_urb_size = packetsize ? packetsize : MAX_SINGLE_PACKET_SIZE;
2f7ca802 1114 } else if (dev->udev->speed == USB_SPEED_HIGH) {
3f95eb13
SN
1115 dev->rx_urb_size = packetsize ? packetsize : DEFAULT_HS_BURST_CAP_SIZE;
1116 burst_cap = dev->rx_urb_size / HS_USB_PKT_SIZE;
2f7ca802 1117 } else {
3f95eb13
SN
1118 dev->rx_urb_size = packetsize ? packetsize : DEFAULT_FS_BURST_CAP_SIZE;
1119 burst_cap = dev->rx_urb_size / FS_USB_PKT_SIZE;
2f7ca802
SG
1120 }
1121
1e1d7412
JP
1122 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n",
1123 (ulong)dev->rx_urb_size);
2f7ca802
SG
1124
1125 ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
e360a8b4 1126 if (ret < 0)
b052e073 1127 return ret;
2f7ca802
SG
1128
1129 ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
e360a8b4 1130 if (ret < 0)
b052e073 1131 return ret;
769ea6d8 1132
a475f603
JP
1133 netif_dbg(dev, ifup, dev->net,
1134 "Read Value from BURST_CAP after writing: 0x%08x\n",
1135 read_buf);
2f7ca802 1136
4436761b 1137 ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
e360a8b4 1138 if (ret < 0)
b052e073 1139 return ret;
2f7ca802
SG
1140
1141 ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
e360a8b4 1142 if (ret < 0)
b052e073 1143 return ret;
769ea6d8 1144
a475f603
JP
1145 netif_dbg(dev, ifup, dev->net,
1146 "Read Value from BULK_IN_DLY after writing: 0x%08x\n",
1147 read_buf);
2f7ca802
SG
1148
1149 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
e360a8b4 1150 if (ret < 0)
b052e073 1151 return ret;
769ea6d8 1152
1e1d7412
JP
1153 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG: 0x%08x\n",
1154 read_buf);
2f7ca802
SG
1155
1156 if (turbo_mode)
1157 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
1158
1159 read_buf &= ~HW_CFG_RXDOFF_;
1160
1161 /* set Rx data offset=2, Make IP header aligns on word boundary. */
1162 read_buf |= NET_IP_ALIGN << 9;
1163
1164 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
e360a8b4 1165 if (ret < 0)
b052e073 1166 return ret;
2f7ca802
SG
1167
1168 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
e360a8b4 1169 if (ret < 0)
b052e073 1170 return ret;
769ea6d8 1171
a475f603
JP
1172 netif_dbg(dev, ifup, dev->net,
1173 "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
2f7ca802 1174
4436761b 1175 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
e360a8b4 1176 if (ret < 0)
b052e073 1177 return ret;
2f7ca802
SG
1178
1179 ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
e360a8b4 1180 if (ret < 0)
b052e073 1181 return ret;
a475f603 1182 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);
2f7ca802 1183
f293501c
SG
1184 /* Configure GPIO pins as LED outputs */
1185 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
1186 LED_GPIO_CFG_FDX_LED;
1187 ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
e360a8b4 1188 if (ret < 0)
b052e073 1189 return ret;
f293501c 1190
2f7ca802 1191 /* Init Tx */
4436761b 1192 ret = smsc95xx_write_reg(dev, FLOW, 0);
e360a8b4 1193 if (ret < 0)
b052e073 1194 return ret;
2f7ca802 1195
4436761b 1196 ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT);
e360a8b4 1197 if (ret < 0)
b052e073 1198 return ret;
2f7ca802
SG
1199
1200 /* Don't need mac_cr_lock during initialisation */
1201 ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
e360a8b4 1202 if (ret < 0)
b052e073 1203 return ret;
2f7ca802
SG
1204
1205 /* Init Rx */
1206 /* Set Vlan */
4436761b 1207 ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q);
e360a8b4 1208 if (ret < 0)
b052e073 1209 return ret;
2f7ca802 1210
f7b29271 1211 /* Enable or disable checksum offload engines */
769ea6d8 1212 ret = smsc95xx_set_features(dev->net, dev->net->features);
b052e073
SG
1213 if (ret < 0) {
1214 netdev_warn(dev->net, "Failed to set checksum offload features\n");
1215 return ret;
1216 }
2f7ca802
SG
1217
1218 smsc95xx_set_multicast(dev->net);
1219
769ea6d8 1220 ret = smsc95xx_phy_initialize(dev);
b052e073
SG
1221 if (ret < 0) {
1222 netdev_warn(dev->net, "Failed to init PHY\n");
1223 return ret;
1224 }
2f7ca802
SG
1225
1226 ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
e360a8b4 1227 if (ret < 0)
b052e073 1228 return ret;
2f7ca802
SG
1229
1230 /* enable PHY interrupts */
1231 read_buf |= INT_EP_CTL_PHY_INT_;
1232
1233 ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
e360a8b4 1234 if (ret < 0)
b052e073 1235 return ret;
2f7ca802 1236
769ea6d8 1237 ret = smsc95xx_start_tx_path(dev);
b052e073
SG
1238 if (ret < 0) {
1239 netdev_warn(dev->net, "Failed to start TX path\n");
1240 return ret;
1241 }
769ea6d8 1242
ec32115d 1243 ret = smsc95xx_start_rx_path(dev, 0);
b052e073
SG
1244 if (ret < 0) {
1245 netdev_warn(dev->net, "Failed to start RX path\n");
1246 return ret;
1247 }
2f7ca802 1248
a475f603 1249 netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n");
2f7ca802
SG
1250 return 0;
1251}
1252
63e77b39
SH
1253static const struct net_device_ops smsc95xx_netdev_ops = {
1254 .ndo_open = usbnet_open,
1255 .ndo_stop = usbnet_stop,
1256 .ndo_start_xmit = usbnet_start_xmit,
1257 .ndo_tx_timeout = usbnet_tx_timeout,
1258 .ndo_change_mtu = usbnet_change_mtu,
1259 .ndo_set_mac_address = eth_mac_addr,
1260 .ndo_validate_addr = eth_validate_addr,
1261 .ndo_do_ioctl = smsc95xx_ioctl,
afc4b13d 1262 .ndo_set_rx_mode = smsc95xx_set_multicast,
78e47fe4 1263 .ndo_set_features = smsc95xx_set_features,
63e77b39
SH
1264};
1265
2f7ca802
SG
1266static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
1267{
1268 struct smsc95xx_priv *pdata = NULL;
bbd9f9ee 1269 u32 val;
2f7ca802
SG
1270 int ret;
1271
1272 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1273
1274 ret = usbnet_get_endpoints(dev, intf);
b052e073
SG
1275 if (ret < 0) {
1276 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret);
1277 return ret;
1278 }
2f7ca802
SG
1279
1280 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
38673c82 1281 GFP_KERNEL);
2f7ca802
SG
1282
1283 pdata = (struct smsc95xx_priv *)(dev->data[0]);
38673c82 1284 if (!pdata)
2f7ca802 1285 return -ENOMEM;
2f7ca802
SG
1286
1287 spin_lock_init(&pdata->mac_cr_lock);
1288
78e47fe4
MM
1289 if (DEFAULT_TX_CSUM_ENABLE)
1290 dev->net->features |= NETIF_F_HW_CSUM;
1291 if (DEFAULT_RX_CSUM_ENABLE)
1292 dev->net->features |= NETIF_F_RXCSUM;
1293
1294 dev->net->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM;
2f7ca802 1295
f4e8ab7c
BB
1296 smsc95xx_init_mac_address(dev);
1297
2f7ca802
SG
1298 /* Init all registers */
1299 ret = smsc95xx_reset(dev);
1300
bbd9f9ee
SG
1301 /* detect device revision as different features may be available */
1302 ret = smsc95xx_read_reg(dev, ID_REV, &val);
e360a8b4 1303 if (ret < 0)
b052e073 1304 return ret;
bbd9f9ee 1305 val >>= 16;
13722bbe
WH
1306 pdata->chip_id = val;
1307 pdata->mdix_ctrl = get_mdix_status(dev->net);
9ebca507
SG
1308
1309 if ((val == ID_REV_CHIP_ID_9500A_) || (val == ID_REV_CHIP_ID_9530_) ||
1310 (val == ID_REV_CHIP_ID_89530_) || (val == ID_REV_CHIP_ID_9730_))
1311 pdata->features = (FEATURE_8_WAKEUP_FILTERS |
1312 FEATURE_PHY_NLP_CROSSOVER |
eb970ff0 1313 FEATURE_REMOTE_WAKEUP);
9ebca507
SG
1314 else if (val == ID_REV_CHIP_ID_9512_)
1315 pdata->features = FEATURE_8_WAKEUP_FILTERS;
bbd9f9ee 1316
63e77b39 1317 dev->net->netdev_ops = &smsc95xx_netdev_ops;
2f7ca802 1318 dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
2f7ca802 1319 dev->net->flags |= IFF_MULTICAST;
78e47fe4 1320 dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM;
9bbf5660 1321 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
d69d1694
CF
1322
1323 pdata->dev = dev;
1324 INIT_DELAYED_WORK(&pdata->carrier_check, check_carrier);
1325 schedule_delayed_work(&pdata->carrier_check, CARRIER_CHECK_DELAY);
1326
2f7ca802
SG
1327 return 0;
1328}
1329
1330static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1331{
1332 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
d69d1694 1333
2f7ca802 1334 if (pdata) {
d69d1694 1335 cancel_delayed_work(&pdata->carrier_check);
a475f603 1336 netif_dbg(dev, ifdown, dev->net, "free pdata\n");
2f7ca802
SG
1337 kfree(pdata);
1338 pdata = NULL;
1339 dev->data[0] = 0;
1340 }
1341}
1342
068bb1a7 1343static u32 smsc_crc(const u8 *buffer, size_t len, int filter)
bbd9f9ee 1344{
068bb1a7
SG
1345 u32 crc = bitrev16(crc16(0xFFFF, buffer, len));
1346 return crc << ((filter % 2) * 16);
bbd9f9ee
SG
1347}
1348
e5e3af83
SG
1349static int smsc95xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask)
1350{
1351 struct mii_if_info *mii = &dev->mii;
1352 int ret;
1353
1e1d7412 1354 netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n");
e5e3af83
SG
1355
1356 /* read to clear */
1357 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC);
e360a8b4 1358 if (ret < 0)
b052e073 1359 return ret;
e5e3af83
SG
1360
1361 /* enable interrupt source */
1362 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK);
e360a8b4 1363 if (ret < 0)
b052e073 1364 return ret;
e5e3af83
SG
1365
1366 ret |= mask;
1367
1368 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret);
1369
1370 return 0;
1371}
1372
1373static int smsc95xx_link_ok_nopm(struct usbnet *dev)
1374{
1375 struct mii_if_info *mii = &dev->mii;
1376 int ret;
1377
1378 /* first, a dummy read, needed to latch some MII phys */
1379 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
e360a8b4 1380 if (ret < 0)
b052e073 1381 return ret;
e5e3af83
SG
1382
1383 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
e360a8b4 1384 if (ret < 0)
b052e073 1385 return ret;
e5e3af83
SG
1386
1387 return !!(ret & BMSR_LSTATUS);
1388}
1389
319b95b5
SG
1390static int smsc95xx_enter_suspend0(struct usbnet *dev)
1391{
1392 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1393 u32 val;
1394 int ret;
1395
1396 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1397 if (ret < 0)
b052e073 1398 return ret;
319b95b5
SG
1399
1400 val &= (~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_));
1401 val |= PM_CTL_SUS_MODE_0;
1402
1403 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1404 if (ret < 0)
b052e073 1405 return ret;
319b95b5
SG
1406
1407 /* clear wol status */
1408 val &= ~PM_CTL_WUPS_;
1409 val |= PM_CTL_WUPS_WOL_;
1410
1411 /* enable energy detection */
1412 if (pdata->wolopts & WAKE_PHY)
1413 val |= PM_CTL_WUPS_ED_;
1414
1415 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1416 if (ret < 0)
b052e073 1417 return ret;
319b95b5
SG
1418
1419 /* read back PM_CTRL */
1420 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
76437214
ML
1421 if (ret < 0)
1422 return ret;
319b95b5 1423
b2d4b150
SG
1424 pdata->suspend_flags |= SUSPEND_SUSPEND0;
1425
76437214 1426 return 0;
319b95b5
SG
1427}
1428
1429static int smsc95xx_enter_suspend1(struct usbnet *dev)
1430{
1431 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1432 struct mii_if_info *mii = &dev->mii;
1433 u32 val;
1434 int ret;
1435
1436 /* reconfigure link pulse detection timing for
1437 * compatibility with non-standard link partners
1438 */
1439 if (pdata->features & FEATURE_PHY_NLP_CROSSOVER)
1440 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_EDPD_CONFIG,
1441 PHY_EDPD_CONFIG_DEFAULT);
1442
1443 /* enable energy detect power-down mode */
1444 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS);
e360a8b4 1445 if (ret < 0)
b052e073 1446 return ret;
319b95b5
SG
1447
1448 ret |= MODE_CTRL_STS_EDPWRDOWN_;
1449
1450 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS, ret);
1451
1452 /* enter SUSPEND1 mode */
1453 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1454 if (ret < 0)
b052e073 1455 return ret;
319b95b5
SG
1456
1457 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
1458 val |= PM_CTL_SUS_MODE_1;
1459
1460 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1461 if (ret < 0)
b052e073 1462 return ret;
319b95b5
SG
1463
1464 /* clear wol status, enable energy detection */
1465 val &= ~PM_CTL_WUPS_;
1466 val |= (PM_CTL_WUPS_ED_ | PM_CTL_ED_EN_);
1467
1468 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
76437214
ML
1469 if (ret < 0)
1470 return ret;
319b95b5 1471
b2d4b150
SG
1472 pdata->suspend_flags |= SUSPEND_SUSPEND1;
1473
76437214 1474 return 0;
319b95b5
SG
1475}
1476
1477static int smsc95xx_enter_suspend2(struct usbnet *dev)
1478{
b2d4b150 1479 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
319b95b5
SG
1480 u32 val;
1481 int ret;
1482
1483 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1484 if (ret < 0)
b052e073 1485 return ret;
319b95b5
SG
1486
1487 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
1488 val |= PM_CTL_SUS_MODE_2;
1489
1490 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
76437214
ML
1491 if (ret < 0)
1492 return ret;
319b95b5 1493
b2d4b150
SG
1494 pdata->suspend_flags |= SUSPEND_SUSPEND2;
1495
76437214 1496 return 0;
319b95b5
SG
1497}
1498
b2d4b150
SG
1499static int smsc95xx_enter_suspend3(struct usbnet *dev)
1500{
1501 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1502 u32 val;
1503 int ret;
1504
1505 ret = smsc95xx_read_reg_nopm(dev, RX_FIFO_INF, &val);
1506 if (ret < 0)
1507 return ret;
1508
1509 if (val & 0xFFFF) {
1510 netdev_info(dev->net, "rx fifo not empty in autosuspend\n");
1511 return -EBUSY;
1512 }
1513
1514 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
1515 if (ret < 0)
1516 return ret;
1517
1518 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
1519 val |= PM_CTL_SUS_MODE_3 | PM_CTL_RES_CLR_WKP_STS;
1520
1521 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1522 if (ret < 0)
1523 return ret;
1524
1525 /* clear wol status */
1526 val &= ~PM_CTL_WUPS_;
1527 val |= PM_CTL_WUPS_WOL_;
1528
1529 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1530 if (ret < 0)
1531 return ret;
1532
1533 pdata->suspend_flags |= SUSPEND_SUSPEND3;
1534
1535 return 0;
1536}
1537
1538static int smsc95xx_autosuspend(struct usbnet *dev, u32 link_up)
1539{
1540 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1541 int ret;
1542
1543 if (!netif_running(dev->net)) {
1544 /* interface is ifconfig down so fully power down hw */
1545 netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n");
1546 return smsc95xx_enter_suspend2(dev);
1547 }
1548
1549 if (!link_up) {
1550 /* link is down so enter EDPD mode, but only if device can
1551 * reliably resume from it. This check should be redundant
eb970ff0 1552 * as current FEATURE_REMOTE_WAKEUP parts also support
b2d4b150
SG
1553 * FEATURE_PHY_NLP_CROSSOVER but it's included for clarity */
1554 if (!(pdata->features & FEATURE_PHY_NLP_CROSSOVER)) {
1555 netdev_warn(dev->net, "EDPD not supported\n");
1556 return -EBUSY;
1557 }
1558
1559 netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n");
1560
1561 /* enable PHY wakeup events for if cable is attached */
1562 ret = smsc95xx_enable_phy_wakeup_interrupts(dev,
1563 PHY_INT_MASK_ANEG_COMP_);
1564 if (ret < 0) {
1565 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1566 return ret;
1567 }
1568
1569 netdev_info(dev->net, "entering SUSPEND1 mode\n");
1570 return smsc95xx_enter_suspend1(dev);
1571 }
1572
1573 /* enable PHY wakeup events so we remote wakeup if cable is pulled */
1574 ret = smsc95xx_enable_phy_wakeup_interrupts(dev,
1575 PHY_INT_MASK_LINK_DOWN_);
1576 if (ret < 0) {
1577 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1578 return ret;
1579 }
1580
1581 netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n");
1582 return smsc95xx_enter_suspend3(dev);
1583}
1584
b5a04475
SG
1585static int smsc95xx_suspend(struct usb_interface *intf, pm_message_t message)
1586{
1587 struct usbnet *dev = usb_get_intfdata(intf);
e0e474a8 1588 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
e5e3af83 1589 u32 val, link_up;
b5a04475 1590 int ret;
b5a04475 1591
b5a04475 1592 ret = usbnet_suspend(intf, message);
b052e073
SG
1593 if (ret < 0) {
1594 netdev_warn(dev->net, "usbnet_suspend error\n");
1595 return ret;
1596 }
b5a04475 1597
b2d4b150
SG
1598 if (pdata->suspend_flags) {
1599 netdev_warn(dev->net, "error during last resume\n");
1600 pdata->suspend_flags = 0;
1601 }
1602
e5e3af83
SG
1603 /* determine if link is up using only _nopm functions */
1604 link_up = smsc95xx_link_ok_nopm(dev);
1605
42e21c01 1606 if (message.event == PM_EVENT_AUTO_SUSPEND &&
eb970ff0 1607 (pdata->features & FEATURE_REMOTE_WAKEUP)) {
b2d4b150
SG
1608 ret = smsc95xx_autosuspend(dev, link_up);
1609 goto done;
1610 }
1611
1612 /* if we get this far we're not autosuspending */
e5e3af83
SG
1613 /* if no wol options set, or if link is down and we're not waking on
1614 * PHY activity, enter lowest power SUSPEND2 mode
1615 */
1616 if (!(pdata->wolopts & SUPPORTED_WAKE) ||
1617 !(link_up || (pdata->wolopts & WAKE_PHY))) {
1e1d7412 1618 netdev_info(dev->net, "entering SUSPEND2 mode\n");
e0e474a8
SG
1619
1620 /* disable energy detect (link up) & wake up events */
ec32115d 1621 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
e360a8b4 1622 if (ret < 0)
b052e073 1623 goto done;
e0e474a8
SG
1624
1625 val &= ~(WUCSR_MPEN_ | WUCSR_WAKE_EN_);
1626
ec32115d 1627 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
e360a8b4 1628 if (ret < 0)
b052e073 1629 goto done;
e0e474a8 1630
ec32115d 1631 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1632 if (ret < 0)
b052e073 1633 goto done;
e0e474a8
SG
1634
1635 val &= ~(PM_CTL_ED_EN_ | PM_CTL_WOL_EN_);
1636
ec32115d 1637 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1638 if (ret < 0)
b052e073 1639 goto done;
e0e474a8 1640
3b9f7d8c
SG
1641 ret = smsc95xx_enter_suspend2(dev);
1642 goto done;
e0e474a8
SG
1643 }
1644
e5e3af83
SG
1645 if (pdata->wolopts & WAKE_PHY) {
1646 ret = smsc95xx_enable_phy_wakeup_interrupts(dev,
1647 (PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_LINK_DOWN_));
b052e073
SG
1648 if (ret < 0) {
1649 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1650 goto done;
1651 }
e5e3af83
SG
1652
1653 /* if link is down then configure EDPD and enter SUSPEND1,
1654 * otherwise enter SUSPEND0 below
1655 */
1656 if (!link_up) {
1e1d7412 1657 netdev_info(dev->net, "entering SUSPEND1 mode\n");
3b9f7d8c
SG
1658 ret = smsc95xx_enter_suspend1(dev);
1659 goto done;
e5e3af83
SG
1660 }
1661 }
1662
bbd9f9ee 1663 if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
eed9a729 1664 u32 *filter_mask = kzalloc(sizeof(u32) * 32, GFP_KERNEL);
06a221be
ML
1665 u32 command[2];
1666 u32 offset[2];
1667 u32 crc[4];
9ebca507
SG
1668 int wuff_filter_count =
1669 (pdata->features & FEATURE_8_WAKEUP_FILTERS) ?
1670 LAN9500A_WUFF_NUM : LAN9500_WUFF_NUM;
bbd9f9ee
SG
1671 int i, filter = 0;
1672
eed9a729
SG
1673 if (!filter_mask) {
1674 netdev_warn(dev->net, "Unable to allocate filter_mask\n");
3b9f7d8c
SG
1675 ret = -ENOMEM;
1676 goto done;
eed9a729
SG
1677 }
1678
06a221be
ML
1679 memset(command, 0, sizeof(command));
1680 memset(offset, 0, sizeof(offset));
1681 memset(crc, 0, sizeof(crc));
1682
bbd9f9ee
SG
1683 if (pdata->wolopts & WAKE_BCAST) {
1684 const u8 bcast[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
1e1d7412 1685 netdev_info(dev->net, "enabling broadcast detection\n");
bbd9f9ee
SG
1686 filter_mask[filter * 4] = 0x003F;
1687 filter_mask[filter * 4 + 1] = 0x00;
1688 filter_mask[filter * 4 + 2] = 0x00;
1689 filter_mask[filter * 4 + 3] = 0x00;
1690 command[filter/4] |= 0x05UL << ((filter % 4) * 8);
1691 offset[filter/4] |= 0x00 << ((filter % 4) * 8);
1692 crc[filter/2] |= smsc_crc(bcast, 6, filter);
1693 filter++;
1694 }
1695
1696 if (pdata->wolopts & WAKE_MCAST) {
1697 const u8 mcast[] = {0x01, 0x00, 0x5E};
1e1d7412 1698 netdev_info(dev->net, "enabling multicast detection\n");
bbd9f9ee
SG
1699 filter_mask[filter * 4] = 0x0007;
1700 filter_mask[filter * 4 + 1] = 0x00;
1701 filter_mask[filter * 4 + 2] = 0x00;
1702 filter_mask[filter * 4 + 3] = 0x00;
1703 command[filter/4] |= 0x09UL << ((filter % 4) * 8);
1704 offset[filter/4] |= 0x00 << ((filter % 4) * 8);
1705 crc[filter/2] |= smsc_crc(mcast, 3, filter);
1706 filter++;
1707 }
1708
1709 if (pdata->wolopts & WAKE_ARP) {
1710 const u8 arp[] = {0x08, 0x06};
1e1d7412 1711 netdev_info(dev->net, "enabling ARP detection\n");
bbd9f9ee
SG
1712 filter_mask[filter * 4] = 0x0003;
1713 filter_mask[filter * 4 + 1] = 0x00;
1714 filter_mask[filter * 4 + 2] = 0x00;
1715 filter_mask[filter * 4 + 3] = 0x00;
1716 command[filter/4] |= 0x05UL << ((filter % 4) * 8);
1717 offset[filter/4] |= 0x0C << ((filter % 4) * 8);
1718 crc[filter/2] |= smsc_crc(arp, 2, filter);
1719 filter++;
1720 }
1721
1722 if (pdata->wolopts & WAKE_UCAST) {
1e1d7412 1723 netdev_info(dev->net, "enabling unicast detection\n");
bbd9f9ee
SG
1724 filter_mask[filter * 4] = 0x003F;
1725 filter_mask[filter * 4 + 1] = 0x00;
1726 filter_mask[filter * 4 + 2] = 0x00;
1727 filter_mask[filter * 4 + 3] = 0x00;
1728 command[filter/4] |= 0x01UL << ((filter % 4) * 8);
1729 offset[filter/4] |= 0x00 << ((filter % 4) * 8);
1730 crc[filter/2] |= smsc_crc(dev->net->dev_addr, ETH_ALEN, filter);
1731 filter++;
1732 }
1733
9ebca507 1734 for (i = 0; i < (wuff_filter_count * 4); i++) {
ec32115d 1735 ret = smsc95xx_write_reg_nopm(dev, WUFF, filter_mask[i]);
b052e073 1736 if (ret < 0) {
06a221be 1737 kfree(filter_mask);
b052e073
SG
1738 goto done;
1739 }
bbd9f9ee 1740 }
06a221be 1741 kfree(filter_mask);
bbd9f9ee 1742
9ebca507 1743 for (i = 0; i < (wuff_filter_count / 4); i++) {
ec32115d 1744 ret = smsc95xx_write_reg_nopm(dev, WUFF, command[i]);
e360a8b4 1745 if (ret < 0)
b052e073 1746 goto done;
bbd9f9ee
SG
1747 }
1748
9ebca507 1749 for (i = 0; i < (wuff_filter_count / 4); i++) {
ec32115d 1750 ret = smsc95xx_write_reg_nopm(dev, WUFF, offset[i]);
e360a8b4 1751 if (ret < 0)
b052e073 1752 goto done;
bbd9f9ee
SG
1753 }
1754
9ebca507 1755 for (i = 0; i < (wuff_filter_count / 2); i++) {
ec32115d 1756 ret = smsc95xx_write_reg_nopm(dev, WUFF, crc[i]);
e360a8b4 1757 if (ret < 0)
b052e073 1758 goto done;
bbd9f9ee
SG
1759 }
1760
1761 /* clear any pending pattern match packet status */
ec32115d 1762 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
e360a8b4 1763 if (ret < 0)
b052e073 1764 goto done;
bbd9f9ee
SG
1765
1766 val |= WUCSR_WUFR_;
1767
ec32115d 1768 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
e360a8b4 1769 if (ret < 0)
b052e073 1770 goto done;
bbd9f9ee
SG
1771 }
1772
e0e474a8
SG
1773 if (pdata->wolopts & WAKE_MAGIC) {
1774 /* clear any pending magic packet status */
ec32115d 1775 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
e360a8b4 1776 if (ret < 0)
b052e073 1777 goto done;
e0e474a8
SG
1778
1779 val |= WUCSR_MPR_;
1780
ec32115d 1781 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
e360a8b4 1782 if (ret < 0)
b052e073 1783 goto done;
e0e474a8
SG
1784 }
1785
bbd9f9ee 1786 /* enable/disable wakeup sources */
ec32115d 1787 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
e360a8b4 1788 if (ret < 0)
b052e073 1789 goto done;
e0e474a8 1790
bbd9f9ee 1791 if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
1e1d7412 1792 netdev_info(dev->net, "enabling pattern match wakeup\n");
bbd9f9ee
SG
1793 val |= WUCSR_WAKE_EN_;
1794 } else {
1e1d7412 1795 netdev_info(dev->net, "disabling pattern match wakeup\n");
bbd9f9ee
SG
1796 val &= ~WUCSR_WAKE_EN_;
1797 }
1798
e0e474a8 1799 if (pdata->wolopts & WAKE_MAGIC) {
1e1d7412 1800 netdev_info(dev->net, "enabling magic packet wakeup\n");
e0e474a8
SG
1801 val |= WUCSR_MPEN_;
1802 } else {
1e1d7412 1803 netdev_info(dev->net, "disabling magic packet wakeup\n");
e0e474a8
SG
1804 val &= ~WUCSR_MPEN_;
1805 }
1806
ec32115d 1807 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
e360a8b4 1808 if (ret < 0)
b052e073 1809 goto done;
e0e474a8
SG
1810
1811 /* enable wol wakeup source */
ec32115d 1812 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1813 if (ret < 0)
b052e073 1814 goto done;
e0e474a8
SG
1815
1816 val |= PM_CTL_WOL_EN_;
1817
e5e3af83
SG
1818 /* phy energy detect wakeup source */
1819 if (pdata->wolopts & WAKE_PHY)
1820 val |= PM_CTL_ED_EN_;
1821
ec32115d 1822 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1823 if (ret < 0)
b052e073 1824 goto done;
e0e474a8 1825
bbd9f9ee 1826 /* enable receiver to enable frame reception */
ec32115d 1827 smsc95xx_start_rx_path(dev, 1);
e0e474a8
SG
1828
1829 /* some wol options are enabled, so enter SUSPEND0 */
1e1d7412 1830 netdev_info(dev->net, "entering SUSPEND0 mode\n");
3b9f7d8c
SG
1831 ret = smsc95xx_enter_suspend0(dev);
1832
1833done:
0d41be53
ML
1834 /*
1835 * TODO: resume() might need to handle the suspend failure
1836 * in system sleep
1837 */
1838 if (ret && PMSG_IS_AUTO(message))
3b9f7d8c
SG
1839 usbnet_resume(intf);
1840 return ret;
e0e474a8
SG
1841}
1842
1843static int smsc95xx_resume(struct usb_interface *intf)
1844{
1845 struct usbnet *dev = usb_get_intfdata(intf);
8bca81d9
SM
1846 struct smsc95xx_priv *pdata;
1847 u8 suspend_flags;
e0e474a8
SG
1848 int ret;
1849 u32 val;
1850
1851 BUG_ON(!dev);
8bca81d9
SM
1852 pdata = (struct smsc95xx_priv *)(dev->data[0]);
1853 suspend_flags = pdata->suspend_flags;
e0e474a8 1854
b2d4b150
SG
1855 netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags);
1856
1857 /* do this first to ensure it's cleared even in error case */
1858 pdata->suspend_flags = 0;
d69d1694 1859 schedule_delayed_work(&pdata->carrier_check, CARRIER_CHECK_DELAY);
b2d4b150
SG
1860
1861 if (suspend_flags & SUSPEND_ALLMODES) {
bbd9f9ee 1862 /* clear wake-up sources */
ec32115d 1863 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
e360a8b4 1864 if (ret < 0)
b052e073 1865 return ret;
e0e474a8 1866
bbd9f9ee 1867 val &= ~(WUCSR_WAKE_EN_ | WUCSR_MPEN_);
e0e474a8 1868
ec32115d 1869 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
e360a8b4 1870 if (ret < 0)
b052e073 1871 return ret;
e0e474a8
SG
1872
1873 /* clear wake-up status */
ec32115d 1874 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1875 if (ret < 0)
b052e073 1876 return ret;
e0e474a8
SG
1877
1878 val &= ~PM_CTL_WOL_EN_;
1879 val |= PM_CTL_WUPS_;
1880
ec32115d 1881 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1882 if (ret < 0)
b052e073 1883 return ret;
e0e474a8
SG
1884 }
1885
af3d7c1e 1886 ret = usbnet_resume(intf);
b052e073
SG
1887 if (ret < 0)
1888 netdev_warn(dev->net, "usbnet_resume error\n");
e0e474a8 1889
b052e073 1890 return ret;
b5a04475
SG
1891}
1892
b4df480f
JS
1893static int smsc95xx_reset_resume(struct usb_interface *intf)
1894{
1895 struct usbnet *dev = usb_get_intfdata(intf);
1896 int ret;
1897
1898 ret = smsc95xx_reset(dev);
1899 if (ret < 0)
1900 return ret;
1901
1902 return smsc95xx_resume(intf);
1903}
1904
2f7ca802
SG
1905static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
1906{
1907 skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
1908 skb->ip_summed = CHECKSUM_COMPLETE;
1909 skb_trim(skb, skb->len - 2);
1910}
1911
1912static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1913{
eb85569f
EG
1914 /* This check is no longer done by usbnet */
1915 if (skb->len < dev->net->hard_header_len)
1916 return 0;
1917
2f7ca802
SG
1918 while (skb->len > 0) {
1919 u32 header, align_count;
1920 struct sk_buff *ax_skb;
1921 unsigned char *packet;
1922 u16 size;
1923
1924 memcpy(&header, skb->data, sizeof(header));
1925 le32_to_cpus(&header);
1926 skb_pull(skb, 4 + NET_IP_ALIGN);
1927 packet = skb->data;
1928
1929 /* get the packet length */
1930 size = (u16)((header & RX_STS_FL_) >> 16);
1931 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
1932
1933 if (unlikely(header & RX_STS_ES_)) {
a475f603
JP
1934 netif_dbg(dev, rx_err, dev->net,
1935 "Error header=0x%08x\n", header);
80667ac1
HX
1936 dev->net->stats.rx_errors++;
1937 dev->net->stats.rx_dropped++;
2f7ca802
SG
1938
1939 if (header & RX_STS_CRC_) {
80667ac1 1940 dev->net->stats.rx_crc_errors++;
2f7ca802
SG
1941 } else {
1942 if (header & (RX_STS_TL_ | RX_STS_RF_))
80667ac1 1943 dev->net->stats.rx_frame_errors++;
2f7ca802
SG
1944
1945 if ((header & RX_STS_LE_) &&
1946 (!(header & RX_STS_FT_)))
80667ac1 1947 dev->net->stats.rx_length_errors++;
2f7ca802
SG
1948 }
1949 } else {
1950 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1951 if (unlikely(size > (ETH_FRAME_LEN + 12))) {
a475f603
JP
1952 netif_dbg(dev, rx_err, dev->net,
1953 "size err header=0x%08x\n", header);
2f7ca802
SG
1954 return 0;
1955 }
1956
1957 /* last frame in this batch */
1958 if (skb->len == size) {
78e47fe4 1959 if (dev->net->features & NETIF_F_RXCSUM)
2f7ca802 1960 smsc95xx_rx_csum_offload(skb);
df18acca 1961 skb_trim(skb, skb->len - 4); /* remove fcs */
5ac77b0c
SG
1962 if (truesize_mode)
1963 skb->truesize = size + sizeof(struct sk_buff);
2f7ca802
SG
1964
1965 return 1;
1966 }
1967
1968 ax_skb = skb_clone(skb, GFP_ATOMIC);
1969 if (unlikely(!ax_skb)) {
60b86755 1970 netdev_warn(dev->net, "Error allocating skb\n");
2f7ca802
SG
1971 return 0;
1972 }
1973
1974 ax_skb->len = size;
1975 ax_skb->data = packet;
1976 skb_set_tail_pointer(ax_skb, size);
1977
78e47fe4 1978 if (dev->net->features & NETIF_F_RXCSUM)
2f7ca802 1979 smsc95xx_rx_csum_offload(ax_skb);
df18acca 1980 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
5ac77b0c
SG
1981 if (truesize_mode)
1982 ax_skb->truesize = size + sizeof(struct sk_buff);
2f7ca802
SG
1983
1984 usbnet_skb_return(dev, ax_skb);
1985 }
1986
1987 skb_pull(skb, size);
1988
1989 /* padding bytes before the next frame starts */
1990 if (skb->len)
1991 skb_pull(skb, align_count);
1992 }
1993
2f7ca802
SG
1994 return 1;
1995}
1996
f7b29271
SG
1997static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
1998{
55508d60
MM
1999 u16 low_16 = (u16)skb_checksum_start_offset(skb);
2000 u16 high_16 = low_16 + skb->csum_offset;
f7b29271
SG
2001 return (high_16 << 16) | low_16;
2002}
2003
2f7ca802
SG
2004static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
2005 struct sk_buff *skb, gfp_t flags)
2006{
78e47fe4 2007 bool csum = skb->ip_summed == CHECKSUM_PARTIAL;
f7b29271 2008 int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
2f7ca802
SG
2009 u32 tx_cmd_a, tx_cmd_b;
2010
f7b29271
SG
2011 /* We do not advertise SG, so skbs should be already linearized */
2012 BUG_ON(skb_shinfo(skb)->nr_frags);
2013
2014 if (skb_headroom(skb) < overhead) {
2f7ca802 2015 struct sk_buff *skb2 = skb_copy_expand(skb,
f7b29271 2016 overhead, 0, flags);
2f7ca802
SG
2017 dev_kfree_skb_any(skb);
2018 skb = skb2;
2019 if (!skb)
2020 return NULL;
2021 }
2022
f7b29271 2023 if (csum) {
11bc3088
SG
2024 if (skb->len <= 45) {
2025 /* workaround - hardware tx checksum does not work
2026 * properly with extremely small packets */
55508d60 2027 long csstart = skb_checksum_start_offset(skb);
11bc3088
SG
2028 __wsum calc = csum_partial(skb->data + csstart,
2029 skb->len - csstart, 0);
2030 *((__sum16 *)(skb->data + csstart
2031 + skb->csum_offset)) = csum_fold(calc);
2032
2033 csum = false;
2034 } else {
2035 u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
2036 skb_push(skb, 4);
00acda68 2037 cpu_to_le32s(&csum_preamble);
11bc3088
SG
2038 memcpy(skb->data, &csum_preamble, 4);
2039 }
f7b29271
SG
2040 }
2041
2f7ca802
SG
2042 skb_push(skb, 4);
2043 tx_cmd_b = (u32)(skb->len - 4);
f7b29271
SG
2044 if (csum)
2045 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
2f7ca802
SG
2046 cpu_to_le32s(&tx_cmd_b);
2047 memcpy(skb->data, &tx_cmd_b, 4);
2048
2049 skb_push(skb, 4);
2050 tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ |
2051 TX_CMD_A_LAST_SEG_;
2052 cpu_to_le32s(&tx_cmd_a);
2053 memcpy(skb->data, &tx_cmd_a, 4);
2054
2055 return skb;
2056}
2057
b2d4b150
SG
2058static int smsc95xx_manage_power(struct usbnet *dev, int on)
2059{
2060 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
2061
2062 dev->intf->needs_remote_wakeup = on;
2063
eb970ff0 2064 if (pdata->features & FEATURE_REMOTE_WAKEUP)
b2d4b150
SG
2065 return 0;
2066
eb970ff0
ML
2067 /* this chip revision isn't capable of remote wakeup */
2068 netdev_info(dev->net, "hardware isn't capable of remote wakeup\n");
b2d4b150
SG
2069
2070 if (on)
2071 usb_autopm_get_interface_no_resume(dev->intf);
2072 else
2073 usb_autopm_put_interface(dev->intf);
2074
2075 return 0;
2076}
2077
2f7ca802
SG
2078static const struct driver_info smsc95xx_info = {
2079 .description = "smsc95xx USB 2.0 Ethernet",
2080 .bind = smsc95xx_bind,
2081 .unbind = smsc95xx_unbind,
2082 .link_reset = smsc95xx_link_reset,
2083 .reset = smsc95xx_reset,
2084 .rx_fixup = smsc95xx_rx_fixup,
2085 .tx_fixup = smsc95xx_tx_fixup,
2086 .status = smsc95xx_status,
b2d4b150 2087 .manage_power = smsc95xx_manage_power,
07d69d42 2088 .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
2f7ca802
SG
2089};
2090
2091static const struct usb_device_id products[] = {
2092 {
2093 /* SMSC9500 USB Ethernet Device */
2094 USB_DEVICE(0x0424, 0x9500),
2095 .driver_info = (unsigned long) &smsc95xx_info,
2096 },
6f41d12b
SG
2097 {
2098 /* SMSC9505 USB Ethernet Device */
2099 USB_DEVICE(0x0424, 0x9505),
2100 .driver_info = (unsigned long) &smsc95xx_info,
2101 },
2102 {
2103 /* SMSC9500A USB Ethernet Device */
2104 USB_DEVICE(0x0424, 0x9E00),
2105 .driver_info = (unsigned long) &smsc95xx_info,
2106 },
2107 {
2108 /* SMSC9505A USB Ethernet Device */
2109 USB_DEVICE(0x0424, 0x9E01),
2110 .driver_info = (unsigned long) &smsc95xx_info,
2111 },
726474b8
SG
2112 {
2113 /* SMSC9512/9514 USB Hub & Ethernet Device */
2114 USB_DEVICE(0x0424, 0xec00),
2115 .driver_info = (unsigned long) &smsc95xx_info,
2116 },
6f41d12b
SG
2117 {
2118 /* SMSC9500 USB Ethernet Device (SAL10) */
2119 USB_DEVICE(0x0424, 0x9900),
2120 .driver_info = (unsigned long) &smsc95xx_info,
2121 },
2122 {
2123 /* SMSC9505 USB Ethernet Device (SAL10) */
2124 USB_DEVICE(0x0424, 0x9901),
2125 .driver_info = (unsigned long) &smsc95xx_info,
2126 },
2127 {
2128 /* SMSC9500A USB Ethernet Device (SAL10) */
2129 USB_DEVICE(0x0424, 0x9902),
2130 .driver_info = (unsigned long) &smsc95xx_info,
2131 },
2132 {
2133 /* SMSC9505A USB Ethernet Device (SAL10) */
2134 USB_DEVICE(0x0424, 0x9903),
2135 .driver_info = (unsigned long) &smsc95xx_info,
2136 },
2137 {
2138 /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */
2139 USB_DEVICE(0x0424, 0x9904),
2140 .driver_info = (unsigned long) &smsc95xx_info,
2141 },
2142 {
2143 /* SMSC9500A USB Ethernet Device (HAL) */
2144 USB_DEVICE(0x0424, 0x9905),
2145 .driver_info = (unsigned long) &smsc95xx_info,
2146 },
2147 {
2148 /* SMSC9505A USB Ethernet Device (HAL) */
2149 USB_DEVICE(0x0424, 0x9906),
2150 .driver_info = (unsigned long) &smsc95xx_info,
2151 },
2152 {
2153 /* SMSC9500 USB Ethernet Device (Alternate ID) */
2154 USB_DEVICE(0x0424, 0x9907),
2155 .driver_info = (unsigned long) &smsc95xx_info,
2156 },
2157 {
2158 /* SMSC9500A USB Ethernet Device (Alternate ID) */
2159 USB_DEVICE(0x0424, 0x9908),
2160 .driver_info = (unsigned long) &smsc95xx_info,
2161 },
2162 {
2163 /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */
2164 USB_DEVICE(0x0424, 0x9909),
2165 .driver_info = (unsigned long) &smsc95xx_info,
2166 },
88edaa41
SG
2167 {
2168 /* SMSC LAN9530 USB Ethernet Device */
2169 USB_DEVICE(0x0424, 0x9530),
2170 .driver_info = (unsigned long) &smsc95xx_info,
2171 },
2172 {
2173 /* SMSC LAN9730 USB Ethernet Device */
2174 USB_DEVICE(0x0424, 0x9730),
2175 .driver_info = (unsigned long) &smsc95xx_info,
2176 },
2177 {
2178 /* SMSC LAN89530 USB Ethernet Device */
2179 USB_DEVICE(0x0424, 0x9E08),
2180 .driver_info = (unsigned long) &smsc95xx_info,
2181 },
2f7ca802
SG
2182 { }, /* END */
2183};
2184MODULE_DEVICE_TABLE(usb, products);
2185
2186static struct usb_driver smsc95xx_driver = {
2187 .name = "smsc95xx",
2188 .id_table = products,
2189 .probe = usbnet_probe,
b5a04475 2190 .suspend = smsc95xx_suspend,
e0e474a8 2191 .resume = smsc95xx_resume,
b4df480f 2192 .reset_resume = smsc95xx_reset_resume,
2f7ca802 2193 .disconnect = usbnet_disconnect,
e1f12eb6 2194 .disable_hub_initiated_lpm = 1,
b2d4b150 2195 .supports_autosuspend = 1,
2f7ca802
SG
2196};
2197
d632eb1b 2198module_usb_driver(smsc95xx_driver);
2f7ca802
SG
2199
2200MODULE_AUTHOR("Nancy Lin");
90b24cfb 2201MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>");
2f7ca802
SG
2202MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
2203MODULE_LICENSE("GPL");