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2f7ca802 SG |
1 | /*************************************************************************** |
2 | * | |
3 | * Copyright (C) 2007-2008 SMSC | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License | |
7 | * as published by the Free Software Foundation; either version 2 | |
8 | * of the License, or (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
9cb00073 | 16 | * along with this program; if not, see <http://www.gnu.org/licenses/>. |
2f7ca802 SG |
17 | * |
18 | *****************************************************************************/ | |
19 | ||
20 | #include <linux/module.h> | |
21 | #include <linux/kmod.h> | |
2f7ca802 SG |
22 | #include <linux/netdevice.h> |
23 | #include <linux/etherdevice.h> | |
24 | #include <linux/ethtool.h> | |
25 | #include <linux/mii.h> | |
26 | #include <linux/usb.h> | |
bbd9f9ee SG |
27 | #include <linux/bitrev.h> |
28 | #include <linux/crc16.h> | |
2f7ca802 SG |
29 | #include <linux/crc32.h> |
30 | #include <linux/usb/usbnet.h> | |
5a0e3ad6 | 31 | #include <linux/slab.h> |
c489565b | 32 | #include <linux/of_net.h> |
2f7ca802 SG |
33 | #include "smsc95xx.h" |
34 | ||
35 | #define SMSC_CHIPNAME "smsc95xx" | |
13722bbe | 36 | #define SMSC_DRIVER_VERSION "1.0.5" |
2f7ca802 SG |
37 | #define HS_USB_PKT_SIZE (512) |
38 | #define FS_USB_PKT_SIZE (64) | |
39 | #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE) | |
40 | #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE) | |
41 | #define DEFAULT_BULK_IN_DELAY (0x00002000) | |
42 | #define MAX_SINGLE_PACKET_SIZE (2048) | |
43 | #define LAN95XX_EEPROM_MAGIC (0x9500) | |
44 | #define EEPROM_MAC_OFFSET (0x01) | |
f7b29271 | 45 | #define DEFAULT_TX_CSUM_ENABLE (true) |
2f7ca802 SG |
46 | #define DEFAULT_RX_CSUM_ENABLE (true) |
47 | #define SMSC95XX_INTERNAL_PHY_ID (1) | |
48 | #define SMSC95XX_TX_OVERHEAD (8) | |
f7b29271 | 49 | #define SMSC95XX_TX_OVERHEAD_CSUM (12) |
e5e3af83 | 50 | #define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \ |
bbd9f9ee | 51 | WAKE_MCAST | WAKE_ARP | WAKE_MAGIC) |
2f7ca802 | 52 | |
9ebca507 SG |
53 | #define FEATURE_8_WAKEUP_FILTERS (0x01) |
54 | #define FEATURE_PHY_NLP_CROSSOVER (0x02) | |
eb970ff0 | 55 | #define FEATURE_REMOTE_WAKEUP (0x04) |
9ebca507 | 56 | |
b2d4b150 SG |
57 | #define SUSPEND_SUSPEND0 (0x01) |
58 | #define SUSPEND_SUSPEND1 (0x02) | |
59 | #define SUSPEND_SUSPEND2 (0x04) | |
60 | #define SUSPEND_SUSPEND3 (0x08) | |
61 | #define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \ | |
62 | SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3) | |
63 | ||
d69d1694 CF |
64 | #define CARRIER_CHECK_DELAY (2 * HZ) |
65 | ||
2f7ca802 | 66 | struct smsc95xx_priv { |
13722bbe | 67 | u32 chip_id; |
2f7ca802 | 68 | u32 mac_cr; |
3c0f3c60 MZ |
69 | u32 hash_hi; |
70 | u32 hash_lo; | |
e0e474a8 | 71 | u32 wolopts; |
2f7ca802 | 72 | spinlock_t mac_cr_lock; |
9ebca507 | 73 | u8 features; |
b2d4b150 | 74 | u8 suspend_flags; |
13722bbe | 75 | u8 mdix_ctrl; |
d69d1694 CF |
76 | bool link_ok; |
77 | struct delayed_work carrier_check; | |
78 | struct usbnet *dev; | |
2f7ca802 SG |
79 | }; |
80 | ||
eb939922 | 81 | static bool turbo_mode = true; |
2f7ca802 SG |
82 | module_param(turbo_mode, bool, 0644); |
83 | MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); | |
84 | ||
ec32115d ML |
85 | static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index, |
86 | u32 *data, int in_pm) | |
2f7ca802 | 87 | { |
72108fd2 | 88 | u32 buf; |
2f7ca802 | 89 | int ret; |
ec32115d | 90 | int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16); |
2f7ca802 SG |
91 | |
92 | BUG_ON(!dev); | |
93 | ||
ec32115d ML |
94 | if (!in_pm) |
95 | fn = usbnet_read_cmd; | |
96 | else | |
97 | fn = usbnet_read_cmd_nopm; | |
98 | ||
99 | ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN | |
100 | | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
101 | 0, index, &buf, 4); | |
5a36b68b | 102 | if (unlikely(ret < 0)) { |
1e1d7412 JP |
103 | netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n", |
104 | index, ret); | |
5a36b68b DC |
105 | return ret; |
106 | } | |
2f7ca802 | 107 | |
72108fd2 ML |
108 | le32_to_cpus(&buf); |
109 | *data = buf; | |
2f7ca802 SG |
110 | |
111 | return ret; | |
112 | } | |
113 | ||
ec32115d ML |
114 | static int __must_check __smsc95xx_write_reg(struct usbnet *dev, u32 index, |
115 | u32 data, int in_pm) | |
2f7ca802 | 116 | { |
72108fd2 | 117 | u32 buf; |
2f7ca802 | 118 | int ret; |
ec32115d | 119 | int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16); |
2f7ca802 SG |
120 | |
121 | BUG_ON(!dev); | |
122 | ||
ec32115d ML |
123 | if (!in_pm) |
124 | fn = usbnet_write_cmd; | |
125 | else | |
126 | fn = usbnet_write_cmd_nopm; | |
127 | ||
72108fd2 ML |
128 | buf = data; |
129 | cpu_to_le32s(&buf); | |
2f7ca802 | 130 | |
ec32115d ML |
131 | ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT |
132 | | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
133 | 0, index, &buf, 4); | |
2f7ca802 | 134 | if (unlikely(ret < 0)) |
1e1d7412 JP |
135 | netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n", |
136 | index, ret); | |
2f7ca802 | 137 | |
2f7ca802 SG |
138 | return ret; |
139 | } | |
140 | ||
ec32115d ML |
141 | static int __must_check smsc95xx_read_reg_nopm(struct usbnet *dev, u32 index, |
142 | u32 *data) | |
143 | { | |
144 | return __smsc95xx_read_reg(dev, index, data, 1); | |
145 | } | |
146 | ||
147 | static int __must_check smsc95xx_write_reg_nopm(struct usbnet *dev, u32 index, | |
148 | u32 data) | |
149 | { | |
150 | return __smsc95xx_write_reg(dev, index, data, 1); | |
151 | } | |
152 | ||
153 | static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index, | |
154 | u32 *data) | |
155 | { | |
156 | return __smsc95xx_read_reg(dev, index, data, 0); | |
157 | } | |
158 | ||
159 | static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index, | |
160 | u32 data) | |
161 | { | |
162 | return __smsc95xx_write_reg(dev, index, data, 0); | |
163 | } | |
e0e474a8 | 164 | |
2f7ca802 SG |
165 | /* Loop until the read is completed with timeout |
166 | * called with phy_mutex held */ | |
e5e3af83 SG |
167 | static int __must_check __smsc95xx_phy_wait_not_busy(struct usbnet *dev, |
168 | int in_pm) | |
2f7ca802 SG |
169 | { |
170 | unsigned long start_time = jiffies; | |
171 | u32 val; | |
769ea6d8 | 172 | int ret; |
2f7ca802 SG |
173 | |
174 | do { | |
e5e3af83 | 175 | ret = __smsc95xx_read_reg(dev, MII_ADDR, &val, in_pm); |
b052e073 SG |
176 | if (ret < 0) { |
177 | netdev_warn(dev->net, "Error reading MII_ACCESS\n"); | |
178 | return ret; | |
179 | } | |
180 | ||
2f7ca802 SG |
181 | if (!(val & MII_BUSY_)) |
182 | return 0; | |
183 | } while (!time_after(jiffies, start_time + HZ)); | |
184 | ||
185 | return -EIO; | |
186 | } | |
187 | ||
e5e3af83 SG |
188 | static int __smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx, |
189 | int in_pm) | |
2f7ca802 SG |
190 | { |
191 | struct usbnet *dev = netdev_priv(netdev); | |
192 | u32 val, addr; | |
769ea6d8 | 193 | int ret; |
2f7ca802 SG |
194 | |
195 | mutex_lock(&dev->phy_mutex); | |
196 | ||
197 | /* confirm MII not busy */ | |
e5e3af83 | 198 | ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); |
b052e073 SG |
199 | if (ret < 0) { |
200 | netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n"); | |
201 | goto done; | |
202 | } | |
2f7ca802 SG |
203 | |
204 | /* set the address, index & direction (read from PHY) */ | |
205 | phy_id &= dev->mii.phy_id_mask; | |
206 | idx &= dev->mii.reg_num_mask; | |
80928805 | 207 | addr = (phy_id << 11) | (idx << 6) | MII_READ_ | MII_BUSY_; |
e5e3af83 | 208 | ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm); |
b052e073 SG |
209 | if (ret < 0) { |
210 | netdev_warn(dev->net, "Error writing MII_ADDR\n"); | |
211 | goto done; | |
212 | } | |
2f7ca802 | 213 | |
e5e3af83 | 214 | ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); |
b052e073 SG |
215 | if (ret < 0) { |
216 | netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx); | |
217 | goto done; | |
218 | } | |
2f7ca802 | 219 | |
e5e3af83 | 220 | ret = __smsc95xx_read_reg(dev, MII_DATA, &val, in_pm); |
b052e073 SG |
221 | if (ret < 0) { |
222 | netdev_warn(dev->net, "Error reading MII_DATA\n"); | |
223 | goto done; | |
224 | } | |
2f7ca802 | 225 | |
769ea6d8 | 226 | ret = (u16)(val & 0xFFFF); |
2f7ca802 | 227 | |
769ea6d8 SG |
228 | done: |
229 | mutex_unlock(&dev->phy_mutex); | |
230 | return ret; | |
2f7ca802 SG |
231 | } |
232 | ||
e5e3af83 SG |
233 | static void __smsc95xx_mdio_write(struct net_device *netdev, int phy_id, |
234 | int idx, int regval, int in_pm) | |
2f7ca802 SG |
235 | { |
236 | struct usbnet *dev = netdev_priv(netdev); | |
237 | u32 val, addr; | |
769ea6d8 | 238 | int ret; |
2f7ca802 SG |
239 | |
240 | mutex_lock(&dev->phy_mutex); | |
241 | ||
242 | /* confirm MII not busy */ | |
e5e3af83 | 243 | ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); |
b052e073 SG |
244 | if (ret < 0) { |
245 | netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n"); | |
246 | goto done; | |
247 | } | |
2f7ca802 SG |
248 | |
249 | val = regval; | |
e5e3af83 | 250 | ret = __smsc95xx_write_reg(dev, MII_DATA, val, in_pm); |
b052e073 SG |
251 | if (ret < 0) { |
252 | netdev_warn(dev->net, "Error writing MII_DATA\n"); | |
253 | goto done; | |
254 | } | |
2f7ca802 SG |
255 | |
256 | /* set the address, index & direction (write to PHY) */ | |
257 | phy_id &= dev->mii.phy_id_mask; | |
258 | idx &= dev->mii.reg_num_mask; | |
80928805 | 259 | addr = (phy_id << 11) | (idx << 6) | MII_WRITE_ | MII_BUSY_; |
e5e3af83 | 260 | ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm); |
b052e073 SG |
261 | if (ret < 0) { |
262 | netdev_warn(dev->net, "Error writing MII_ADDR\n"); | |
263 | goto done; | |
264 | } | |
2f7ca802 | 265 | |
e5e3af83 | 266 | ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); |
b052e073 SG |
267 | if (ret < 0) { |
268 | netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx); | |
269 | goto done; | |
270 | } | |
2f7ca802 | 271 | |
769ea6d8 | 272 | done: |
2f7ca802 SG |
273 | mutex_unlock(&dev->phy_mutex); |
274 | } | |
275 | ||
e5e3af83 SG |
276 | static int smsc95xx_mdio_read_nopm(struct net_device *netdev, int phy_id, |
277 | int idx) | |
278 | { | |
279 | return __smsc95xx_mdio_read(netdev, phy_id, idx, 1); | |
280 | } | |
281 | ||
282 | static void smsc95xx_mdio_write_nopm(struct net_device *netdev, int phy_id, | |
283 | int idx, int regval) | |
284 | { | |
285 | __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 1); | |
286 | } | |
287 | ||
288 | static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx) | |
289 | { | |
290 | return __smsc95xx_mdio_read(netdev, phy_id, idx, 0); | |
291 | } | |
292 | ||
293 | static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx, | |
294 | int regval) | |
295 | { | |
296 | __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 0); | |
297 | } | |
298 | ||
769ea6d8 | 299 | static int __must_check smsc95xx_wait_eeprom(struct usbnet *dev) |
2f7ca802 SG |
300 | { |
301 | unsigned long start_time = jiffies; | |
302 | u32 val; | |
769ea6d8 | 303 | int ret; |
2f7ca802 SG |
304 | |
305 | do { | |
769ea6d8 | 306 | ret = smsc95xx_read_reg(dev, E2P_CMD, &val); |
b052e073 SG |
307 | if (ret < 0) { |
308 | netdev_warn(dev->net, "Error reading E2P_CMD\n"); | |
309 | return ret; | |
310 | } | |
311 | ||
2f7ca802 SG |
312 | if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_)) |
313 | break; | |
314 | udelay(40); | |
315 | } while (!time_after(jiffies, start_time + HZ)); | |
316 | ||
317 | if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) { | |
60b86755 | 318 | netdev_warn(dev->net, "EEPROM read operation timeout\n"); |
2f7ca802 SG |
319 | return -EIO; |
320 | } | |
321 | ||
322 | return 0; | |
323 | } | |
324 | ||
769ea6d8 | 325 | static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev) |
2f7ca802 SG |
326 | { |
327 | unsigned long start_time = jiffies; | |
328 | u32 val; | |
769ea6d8 | 329 | int ret; |
2f7ca802 SG |
330 | |
331 | do { | |
769ea6d8 | 332 | ret = smsc95xx_read_reg(dev, E2P_CMD, &val); |
b052e073 SG |
333 | if (ret < 0) { |
334 | netdev_warn(dev->net, "Error reading E2P_CMD\n"); | |
335 | return ret; | |
336 | } | |
2f7ca802 | 337 | |
2f7ca802 SG |
338 | if (!(val & E2P_CMD_BUSY_)) |
339 | return 0; | |
340 | ||
341 | udelay(40); | |
342 | } while (!time_after(jiffies, start_time + HZ)); | |
343 | ||
60b86755 | 344 | netdev_warn(dev->net, "EEPROM is busy\n"); |
2f7ca802 SG |
345 | return -EIO; |
346 | } | |
347 | ||
348 | static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length, | |
349 | u8 *data) | |
350 | { | |
351 | u32 val; | |
352 | int i, ret; | |
353 | ||
354 | BUG_ON(!dev); | |
355 | BUG_ON(!data); | |
356 | ||
357 | ret = smsc95xx_eeprom_confirm_not_busy(dev); | |
358 | if (ret) | |
359 | return ret; | |
360 | ||
361 | for (i = 0; i < length; i++) { | |
362 | val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_); | |
769ea6d8 | 363 | ret = smsc95xx_write_reg(dev, E2P_CMD, val); |
b052e073 SG |
364 | if (ret < 0) { |
365 | netdev_warn(dev->net, "Error writing E2P_CMD\n"); | |
366 | return ret; | |
367 | } | |
2f7ca802 SG |
368 | |
369 | ret = smsc95xx_wait_eeprom(dev); | |
370 | if (ret < 0) | |
371 | return ret; | |
372 | ||
769ea6d8 | 373 | ret = smsc95xx_read_reg(dev, E2P_DATA, &val); |
b052e073 SG |
374 | if (ret < 0) { |
375 | netdev_warn(dev->net, "Error reading E2P_DATA\n"); | |
376 | return ret; | |
377 | } | |
2f7ca802 SG |
378 | |
379 | data[i] = val & 0xFF; | |
380 | offset++; | |
381 | } | |
382 | ||
383 | return 0; | |
384 | } | |
385 | ||
386 | static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length, | |
387 | u8 *data) | |
388 | { | |
389 | u32 val; | |
390 | int i, ret; | |
391 | ||
392 | BUG_ON(!dev); | |
393 | BUG_ON(!data); | |
394 | ||
395 | ret = smsc95xx_eeprom_confirm_not_busy(dev); | |
396 | if (ret) | |
397 | return ret; | |
398 | ||
399 | /* Issue write/erase enable command */ | |
400 | val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_; | |
769ea6d8 | 401 | ret = smsc95xx_write_reg(dev, E2P_CMD, val); |
b052e073 SG |
402 | if (ret < 0) { |
403 | netdev_warn(dev->net, "Error writing E2P_DATA\n"); | |
404 | return ret; | |
405 | } | |
2f7ca802 SG |
406 | |
407 | ret = smsc95xx_wait_eeprom(dev); | |
408 | if (ret < 0) | |
409 | return ret; | |
410 | ||
411 | for (i = 0; i < length; i++) { | |
412 | ||
413 | /* Fill data register */ | |
414 | val = data[i]; | |
769ea6d8 | 415 | ret = smsc95xx_write_reg(dev, E2P_DATA, val); |
b052e073 SG |
416 | if (ret < 0) { |
417 | netdev_warn(dev->net, "Error writing E2P_DATA\n"); | |
418 | return ret; | |
419 | } | |
2f7ca802 SG |
420 | |
421 | /* Send "write" command */ | |
422 | val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_); | |
769ea6d8 | 423 | ret = smsc95xx_write_reg(dev, E2P_CMD, val); |
b052e073 SG |
424 | if (ret < 0) { |
425 | netdev_warn(dev->net, "Error writing E2P_CMD\n"); | |
426 | return ret; | |
427 | } | |
2f7ca802 SG |
428 | |
429 | ret = smsc95xx_wait_eeprom(dev); | |
430 | if (ret < 0) | |
431 | return ret; | |
432 | ||
433 | offset++; | |
434 | } | |
435 | ||
436 | return 0; | |
437 | } | |
438 | ||
769ea6d8 | 439 | static int __must_check smsc95xx_write_reg_async(struct usbnet *dev, u16 index, |
7b9e7580 | 440 | u32 data) |
2f7ca802 | 441 | { |
1d74a6bd | 442 | const u16 size = 4; |
7b9e7580 | 443 | u32 buf; |
72108fd2 | 444 | int ret; |
2f7ca802 | 445 | |
7b9e7580 SG |
446 | buf = data; |
447 | cpu_to_le32s(&buf); | |
448 | ||
72108fd2 ML |
449 | ret = usbnet_write_cmd_async(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, |
450 | USB_DIR_OUT | USB_TYPE_VENDOR | | |
451 | USB_RECIP_DEVICE, | |
7b9e7580 | 452 | 0, index, &buf, size); |
72108fd2 ML |
453 | if (ret < 0) |
454 | netdev_warn(dev->net, "Error write async cmd, sts=%d\n", | |
455 | ret); | |
456 | return ret; | |
2f7ca802 SG |
457 | } |
458 | ||
459 | /* returns hash bit number for given MAC address | |
460 | * example: | |
461 | * 01 00 5E 00 00 01 -> returns bit number 31 */ | |
462 | static unsigned int smsc95xx_hash(char addr[ETH_ALEN]) | |
463 | { | |
464 | return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f; | |
465 | } | |
466 | ||
467 | static void smsc95xx_set_multicast(struct net_device *netdev) | |
468 | { | |
469 | struct usbnet *dev = netdev_priv(netdev); | |
470 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
2f7ca802 | 471 | unsigned long flags; |
769ea6d8 | 472 | int ret; |
2f7ca802 | 473 | |
3c0f3c60 MZ |
474 | pdata->hash_hi = 0; |
475 | pdata->hash_lo = 0; | |
476 | ||
2f7ca802 SG |
477 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); |
478 | ||
479 | if (dev->net->flags & IFF_PROMISC) { | |
a475f603 | 480 | netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n"); |
2f7ca802 SG |
481 | pdata->mac_cr |= MAC_CR_PRMS_; |
482 | pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_); | |
483 | } else if (dev->net->flags & IFF_ALLMULTI) { | |
a475f603 | 484 | netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n"); |
2f7ca802 SG |
485 | pdata->mac_cr |= MAC_CR_MCPAS_; |
486 | pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_); | |
4cd24eaf | 487 | } else if (!netdev_mc_empty(dev->net)) { |
22bedad3 | 488 | struct netdev_hw_addr *ha; |
2f7ca802 SG |
489 | |
490 | pdata->mac_cr |= MAC_CR_HPFILT_; | |
491 | pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); | |
492 | ||
22bedad3 JP |
493 | netdev_for_each_mc_addr(ha, netdev) { |
494 | u32 bitnum = smsc95xx_hash(ha->addr); | |
a92635dc JP |
495 | u32 mask = 0x01 << (bitnum & 0x1F); |
496 | if (bitnum & 0x20) | |
3c0f3c60 | 497 | pdata->hash_hi |= mask; |
a92635dc | 498 | else |
3c0f3c60 | 499 | pdata->hash_lo |= mask; |
2f7ca802 SG |
500 | } |
501 | ||
a475f603 | 502 | netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n", |
3c0f3c60 | 503 | pdata->hash_hi, pdata->hash_lo); |
2f7ca802 | 504 | } else { |
a475f603 | 505 | netif_dbg(dev, drv, dev->net, "receive own packets only\n"); |
2f7ca802 SG |
506 | pdata->mac_cr &= |
507 | ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); | |
508 | } | |
509 | ||
510 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
511 | ||
512 | /* Initiate async writes, as we can't wait for completion here */ | |
7b9e7580 | 513 | ret = smsc95xx_write_reg_async(dev, HASHH, pdata->hash_hi); |
b052e073 SG |
514 | if (ret < 0) |
515 | netdev_warn(dev->net, "failed to initiate async write to HASHH\n"); | |
769ea6d8 | 516 | |
7b9e7580 | 517 | ret = smsc95xx_write_reg_async(dev, HASHL, pdata->hash_lo); |
b052e073 SG |
518 | if (ret < 0) |
519 | netdev_warn(dev->net, "failed to initiate async write to HASHL\n"); | |
769ea6d8 | 520 | |
7b9e7580 | 521 | ret = smsc95xx_write_reg_async(dev, MAC_CR, pdata->mac_cr); |
b052e073 SG |
522 | if (ret < 0) |
523 | netdev_warn(dev->net, "failed to initiate async write to MAC_CR\n"); | |
2f7ca802 SG |
524 | } |
525 | ||
769ea6d8 SG |
526 | static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex, |
527 | u16 lcladv, u16 rmtadv) | |
2f7ca802 SG |
528 | { |
529 | u32 flow, afc_cfg = 0; | |
530 | ||
531 | int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg); | |
e360a8b4 | 532 | if (ret < 0) |
b052e073 | 533 | return ret; |
2f7ca802 SG |
534 | |
535 | if (duplex == DUPLEX_FULL) { | |
bc02ff95 | 536 | u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); |
2f7ca802 SG |
537 | |
538 | if (cap & FLOW_CTRL_RX) | |
539 | flow = 0xFFFF0002; | |
540 | else | |
541 | flow = 0; | |
542 | ||
543 | if (cap & FLOW_CTRL_TX) | |
544 | afc_cfg |= 0xF; | |
545 | else | |
546 | afc_cfg &= ~0xF; | |
547 | ||
a475f603 | 548 | netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n", |
60b86755 JP |
549 | cap & FLOW_CTRL_RX ? "enabled" : "disabled", |
550 | cap & FLOW_CTRL_TX ? "enabled" : "disabled"); | |
2f7ca802 | 551 | } else { |
a475f603 | 552 | netif_dbg(dev, link, dev->net, "half duplex\n"); |
2f7ca802 SG |
553 | flow = 0; |
554 | afc_cfg |= 0xF; | |
555 | } | |
556 | ||
769ea6d8 | 557 | ret = smsc95xx_write_reg(dev, FLOW, flow); |
b052e073 | 558 | if (ret < 0) |
e360a8b4 | 559 | return ret; |
769ea6d8 | 560 | |
e360a8b4 | 561 | return smsc95xx_write_reg(dev, AFC_CFG, afc_cfg); |
2f7ca802 SG |
562 | } |
563 | ||
564 | static int smsc95xx_link_reset(struct usbnet *dev) | |
565 | { | |
566 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
567 | struct mii_if_info *mii = &dev->mii; | |
8ae6daca | 568 | struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; |
2f7ca802 SG |
569 | unsigned long flags; |
570 | u16 lcladv, rmtadv; | |
769ea6d8 | 571 | int ret; |
2f7ca802 SG |
572 | |
573 | /* clear interrupt status */ | |
769ea6d8 | 574 | ret = smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC); |
e360a8b4 | 575 | if (ret < 0) |
b052e073 | 576 | return ret; |
769ea6d8 SG |
577 | |
578 | ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); | |
e360a8b4 | 579 | if (ret < 0) |
b052e073 | 580 | return ret; |
2f7ca802 SG |
581 | |
582 | mii_check_media(mii, 1, 1); | |
583 | mii_ethtool_gset(&dev->mii, &ecmd); | |
584 | lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE); | |
585 | rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA); | |
586 | ||
8ae6daca DD |
587 | netif_dbg(dev, link, dev->net, |
588 | "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n", | |
589 | ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv); | |
2f7ca802 SG |
590 | |
591 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); | |
592 | if (ecmd.duplex != DUPLEX_FULL) { | |
593 | pdata->mac_cr &= ~MAC_CR_FDPX_; | |
594 | pdata->mac_cr |= MAC_CR_RCVOWN_; | |
595 | } else { | |
596 | pdata->mac_cr &= ~MAC_CR_RCVOWN_; | |
597 | pdata->mac_cr |= MAC_CR_FDPX_; | |
598 | } | |
599 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
600 | ||
769ea6d8 | 601 | ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); |
e360a8b4 | 602 | if (ret < 0) |
b052e073 | 603 | return ret; |
2f7ca802 | 604 | |
769ea6d8 | 605 | ret = smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv); |
b052e073 SG |
606 | if (ret < 0) |
607 | netdev_warn(dev->net, "Error updating PHY flow control\n"); | |
2f7ca802 | 608 | |
b052e073 | 609 | return ret; |
2f7ca802 SG |
610 | } |
611 | ||
612 | static void smsc95xx_status(struct usbnet *dev, struct urb *urb) | |
613 | { | |
614 | u32 intdata; | |
615 | ||
616 | if (urb->actual_length != 4) { | |
60b86755 JP |
617 | netdev_warn(dev->net, "unexpected urb length %d\n", |
618 | urb->actual_length); | |
2f7ca802 SG |
619 | return; |
620 | } | |
621 | ||
622 | memcpy(&intdata, urb->transfer_buffer, 4); | |
1d74a6bd | 623 | le32_to_cpus(&intdata); |
2f7ca802 | 624 | |
a475f603 | 625 | netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata); |
2f7ca802 SG |
626 | |
627 | if (intdata & INT_ENP_PHY_INT_) | |
628 | usbnet_defer_kevent(dev, EVENT_LINK_RESET); | |
629 | else | |
60b86755 JP |
630 | netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n", |
631 | intdata); | |
2f7ca802 SG |
632 | } |
633 | ||
d69d1694 CF |
634 | static void set_carrier(struct usbnet *dev, bool link) |
635 | { | |
636 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
637 | ||
638 | if (pdata->link_ok == link) | |
639 | return; | |
640 | ||
641 | pdata->link_ok = link; | |
642 | ||
643 | if (link) | |
644 | usbnet_link_change(dev, 1, 0); | |
645 | else | |
646 | usbnet_link_change(dev, 0, 0); | |
647 | } | |
648 | ||
649 | static void check_carrier(struct work_struct *work) | |
650 | { | |
651 | struct smsc95xx_priv *pdata = container_of(work, struct smsc95xx_priv, | |
652 | carrier_check.work); | |
653 | struct usbnet *dev = pdata->dev; | |
654 | int ret; | |
655 | ||
656 | if (pdata->suspend_flags != 0) | |
657 | return; | |
658 | ||
659 | ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMSR); | |
660 | if (ret < 0) { | |
661 | netdev_warn(dev->net, "Failed to read MII_BMSR\n"); | |
662 | return; | |
663 | } | |
664 | if (ret & BMSR_LSTATUS) | |
665 | set_carrier(dev, 1); | |
666 | else | |
667 | set_carrier(dev, 0); | |
668 | ||
669 | schedule_delayed_work(&pdata->carrier_check, CARRIER_CHECK_DELAY); | |
670 | } | |
671 | ||
f7b29271 | 672 | /* Enable or disable Tx & Rx checksum offload engines */ |
c8f44aff MM |
673 | static int smsc95xx_set_features(struct net_device *netdev, |
674 | netdev_features_t features) | |
2f7ca802 | 675 | { |
78e47fe4 | 676 | struct usbnet *dev = netdev_priv(netdev); |
2f7ca802 | 677 | u32 read_buf; |
78e47fe4 MM |
678 | int ret; |
679 | ||
680 | ret = smsc95xx_read_reg(dev, COE_CR, &read_buf); | |
e360a8b4 | 681 | if (ret < 0) |
b052e073 | 682 | return ret; |
2f7ca802 | 683 | |
78e47fe4 | 684 | if (features & NETIF_F_HW_CSUM) |
f7b29271 SG |
685 | read_buf |= Tx_COE_EN_; |
686 | else | |
687 | read_buf &= ~Tx_COE_EN_; | |
688 | ||
78e47fe4 | 689 | if (features & NETIF_F_RXCSUM) |
2f7ca802 SG |
690 | read_buf |= Rx_COE_EN_; |
691 | else | |
692 | read_buf &= ~Rx_COE_EN_; | |
693 | ||
694 | ret = smsc95xx_write_reg(dev, COE_CR, read_buf); | |
e360a8b4 | 695 | if (ret < 0) |
b052e073 | 696 | return ret; |
2f7ca802 | 697 | |
a475f603 | 698 | netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf); |
2f7ca802 SG |
699 | return 0; |
700 | } | |
701 | ||
702 | static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net) | |
703 | { | |
704 | return MAX_EEPROM_SIZE; | |
705 | } | |
706 | ||
707 | static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev, | |
708 | struct ethtool_eeprom *ee, u8 *data) | |
709 | { | |
710 | struct usbnet *dev = netdev_priv(netdev); | |
711 | ||
712 | ee->magic = LAN95XX_EEPROM_MAGIC; | |
713 | ||
714 | return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data); | |
715 | } | |
716 | ||
717 | static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev, | |
718 | struct ethtool_eeprom *ee, u8 *data) | |
719 | { | |
720 | struct usbnet *dev = netdev_priv(netdev); | |
721 | ||
722 | if (ee->magic != LAN95XX_EEPROM_MAGIC) { | |
60b86755 JP |
723 | netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n", |
724 | ee->magic); | |
2f7ca802 SG |
725 | return -EINVAL; |
726 | } | |
727 | ||
728 | return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data); | |
729 | } | |
730 | ||
9fa32e94 EV |
731 | static int smsc95xx_ethtool_getregslen(struct net_device *netdev) |
732 | { | |
733 | /* all smsc95xx registers */ | |
96245317 | 734 | return COE_CR - ID_REV + sizeof(u32); |
9fa32e94 EV |
735 | } |
736 | ||
737 | static void | |
738 | smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs, | |
739 | void *buf) | |
740 | { | |
741 | struct usbnet *dev = netdev_priv(netdev); | |
d348446b DC |
742 | unsigned int i, j; |
743 | int retval; | |
9fa32e94 EV |
744 | u32 *data = buf; |
745 | ||
746 | retval = smsc95xx_read_reg(dev, ID_REV, ®s->version); | |
747 | if (retval < 0) { | |
748 | netdev_warn(netdev, "REGS: cannot read ID_REV\n"); | |
749 | return; | |
750 | } | |
751 | ||
752 | for (i = ID_REV, j = 0; i <= COE_CR; i += (sizeof(u32)), j++) { | |
753 | retval = smsc95xx_read_reg(dev, i, &data[j]); | |
754 | if (retval < 0) { | |
755 | netdev_warn(netdev, "REGS: cannot read reg[%x]\n", i); | |
756 | return; | |
757 | } | |
758 | } | |
759 | } | |
760 | ||
e0e474a8 SG |
761 | static void smsc95xx_ethtool_get_wol(struct net_device *net, |
762 | struct ethtool_wolinfo *wolinfo) | |
763 | { | |
764 | struct usbnet *dev = netdev_priv(net); | |
765 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
766 | ||
767 | wolinfo->supported = SUPPORTED_WAKE; | |
768 | wolinfo->wolopts = pdata->wolopts; | |
769 | } | |
770 | ||
771 | static int smsc95xx_ethtool_set_wol(struct net_device *net, | |
772 | struct ethtool_wolinfo *wolinfo) | |
773 | { | |
774 | struct usbnet *dev = netdev_priv(net); | |
775 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
3b14692c | 776 | int ret; |
e0e474a8 SG |
777 | |
778 | pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE; | |
3b14692c SG |
779 | |
780 | ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts); | |
b052e073 SG |
781 | if (ret < 0) |
782 | netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret); | |
3b14692c | 783 | |
b052e073 | 784 | return ret; |
e0e474a8 SG |
785 | } |
786 | ||
13722bbe WH |
787 | static int get_mdix_status(struct net_device *net) |
788 | { | |
789 | struct usbnet *dev = netdev_priv(net); | |
790 | u32 val; | |
791 | int buf; | |
792 | ||
793 | buf = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, SPECIAL_CTRL_STS); | |
794 | if (buf & SPECIAL_CTRL_STS_OVRRD_AMDIX_) { | |
795 | if (buf & SPECIAL_CTRL_STS_AMDIX_ENABLE_) | |
796 | return ETH_TP_MDI_AUTO; | |
797 | else if (buf & SPECIAL_CTRL_STS_AMDIX_STATE_) | |
798 | return ETH_TP_MDI_X; | |
799 | } else { | |
800 | buf = smsc95xx_read_reg(dev, STRAP_STATUS, &val); | |
801 | if (val & STRAP_STATUS_AMDIX_EN_) | |
802 | return ETH_TP_MDI_AUTO; | |
803 | } | |
804 | ||
805 | return ETH_TP_MDI; | |
806 | } | |
807 | ||
808 | static void set_mdix_status(struct net_device *net, __u8 mdix_ctrl) | |
809 | { | |
810 | struct usbnet *dev = netdev_priv(net); | |
811 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
812 | int buf; | |
813 | ||
814 | if ((pdata->chip_id == ID_REV_CHIP_ID_9500A_) || | |
815 | (pdata->chip_id == ID_REV_CHIP_ID_9530_) || | |
816 | (pdata->chip_id == ID_REV_CHIP_ID_89530_) || | |
817 | (pdata->chip_id == ID_REV_CHIP_ID_9730_)) { | |
818 | /* Extend Manual AutoMDIX timer for 9500A/9500Ai */ | |
819 | buf = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, | |
820 | PHY_EDPD_CONFIG); | |
821 | buf |= PHY_EDPD_CONFIG_EXT_CROSSOVER_; | |
822 | smsc95xx_mdio_write(dev->net, dev->mii.phy_id, | |
823 | PHY_EDPD_CONFIG, buf); | |
824 | } | |
825 | ||
826 | if (mdix_ctrl == ETH_TP_MDI) { | |
827 | buf = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, | |
828 | SPECIAL_CTRL_STS); | |
829 | buf |= SPECIAL_CTRL_STS_OVRRD_AMDIX_; | |
830 | buf &= ~(SPECIAL_CTRL_STS_AMDIX_ENABLE_ | | |
831 | SPECIAL_CTRL_STS_AMDIX_STATE_); | |
832 | smsc95xx_mdio_write(dev->net, dev->mii.phy_id, | |
833 | SPECIAL_CTRL_STS, buf); | |
834 | } else if (mdix_ctrl == ETH_TP_MDI_X) { | |
835 | buf = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, | |
836 | SPECIAL_CTRL_STS); | |
837 | buf |= SPECIAL_CTRL_STS_OVRRD_AMDIX_; | |
838 | buf &= ~(SPECIAL_CTRL_STS_AMDIX_ENABLE_ | | |
839 | SPECIAL_CTRL_STS_AMDIX_STATE_); | |
840 | buf |= SPECIAL_CTRL_STS_AMDIX_STATE_; | |
841 | smsc95xx_mdio_write(dev->net, dev->mii.phy_id, | |
842 | SPECIAL_CTRL_STS, buf); | |
843 | } else if (mdix_ctrl == ETH_TP_MDI_AUTO) { | |
844 | buf = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, | |
845 | SPECIAL_CTRL_STS); | |
846 | buf &= ~SPECIAL_CTRL_STS_OVRRD_AMDIX_; | |
847 | buf &= ~(SPECIAL_CTRL_STS_AMDIX_ENABLE_ | | |
848 | SPECIAL_CTRL_STS_AMDIX_STATE_); | |
849 | buf |= SPECIAL_CTRL_STS_AMDIX_ENABLE_; | |
850 | smsc95xx_mdio_write(dev->net, dev->mii.phy_id, | |
851 | SPECIAL_CTRL_STS, buf); | |
852 | } | |
853 | pdata->mdix_ctrl = mdix_ctrl; | |
854 | } | |
855 | ||
856 | static int smsc95xx_get_settings(struct net_device *net, | |
857 | struct ethtool_cmd *cmd) | |
858 | { | |
859 | struct usbnet *dev = netdev_priv(net); | |
860 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
861 | int retval; | |
862 | ||
863 | retval = usbnet_get_settings(net, cmd); | |
864 | ||
865 | cmd->eth_tp_mdix = pdata->mdix_ctrl; | |
866 | cmd->eth_tp_mdix_ctrl = pdata->mdix_ctrl; | |
867 | ||
868 | return retval; | |
869 | } | |
870 | ||
871 | static int smsc95xx_set_settings(struct net_device *net, | |
872 | struct ethtool_cmd *cmd) | |
873 | { | |
874 | struct usbnet *dev = netdev_priv(net); | |
875 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
876 | int retval; | |
877 | ||
878 | if (pdata->mdix_ctrl != cmd->eth_tp_mdix_ctrl) | |
879 | set_mdix_status(net, cmd->eth_tp_mdix_ctrl); | |
880 | ||
881 | retval = usbnet_set_settings(net, cmd); | |
882 | ||
883 | return retval; | |
884 | } | |
885 | ||
0fc0b732 | 886 | static const struct ethtool_ops smsc95xx_ethtool_ops = { |
2f7ca802 SG |
887 | .get_link = usbnet_get_link, |
888 | .nway_reset = usbnet_nway_reset, | |
889 | .get_drvinfo = usbnet_get_drvinfo, | |
890 | .get_msglevel = usbnet_get_msglevel, | |
891 | .set_msglevel = usbnet_set_msglevel, | |
13722bbe WH |
892 | .get_settings = smsc95xx_get_settings, |
893 | .set_settings = smsc95xx_set_settings, | |
2f7ca802 SG |
894 | .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len, |
895 | .get_eeprom = smsc95xx_ethtool_get_eeprom, | |
896 | .set_eeprom = smsc95xx_ethtool_set_eeprom, | |
9fa32e94 EV |
897 | .get_regs_len = smsc95xx_ethtool_getregslen, |
898 | .get_regs = smsc95xx_ethtool_getregs, | |
e0e474a8 SG |
899 | .get_wol = smsc95xx_ethtool_get_wol, |
900 | .set_wol = smsc95xx_ethtool_set_wol, | |
2f7ca802 SG |
901 | }; |
902 | ||
903 | static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) | |
904 | { | |
905 | struct usbnet *dev = netdev_priv(netdev); | |
906 | ||
907 | if (!netif_running(netdev)) | |
908 | return -EINVAL; | |
909 | ||
910 | return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); | |
911 | } | |
912 | ||
913 | static void smsc95xx_init_mac_address(struct usbnet *dev) | |
914 | { | |
c489565b AB |
915 | const u8 *mac_addr; |
916 | ||
917 | /* maybe the boot loader passed the MAC address in devicetree */ | |
918 | mac_addr = of_get_mac_address(dev->udev->dev.of_node); | |
919 | if (mac_addr) { | |
920 | memcpy(dev->net->dev_addr, mac_addr, ETH_ALEN); | |
921 | return; | |
922 | } | |
923 | ||
2f7ca802 SG |
924 | /* try reading mac address from EEPROM */ |
925 | if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, | |
926 | dev->net->dev_addr) == 0) { | |
927 | if (is_valid_ether_addr(dev->net->dev_addr)) { | |
928 | /* eeprom values are valid so use them */ | |
a475f603 | 929 | netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n"); |
2f7ca802 SG |
930 | return; |
931 | } | |
932 | } | |
933 | ||
c489565b | 934 | /* no useful static MAC address found. generate a random one */ |
f2cedb63 | 935 | eth_hw_addr_random(dev->net); |
c7e12ead | 936 | netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n"); |
2f7ca802 SG |
937 | } |
938 | ||
939 | static int smsc95xx_set_mac_address(struct usbnet *dev) | |
940 | { | |
941 | u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | | |
942 | dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24; | |
943 | u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8; | |
944 | int ret; | |
945 | ||
946 | ret = smsc95xx_write_reg(dev, ADDRL, addr_lo); | |
b052e073 | 947 | if (ret < 0) |
e360a8b4 | 948 | return ret; |
2f7ca802 | 949 | |
e360a8b4 | 950 | return smsc95xx_write_reg(dev, ADDRH, addr_hi); |
2f7ca802 SG |
951 | } |
952 | ||
953 | /* starts the TX path */ | |
769ea6d8 | 954 | static int smsc95xx_start_tx_path(struct usbnet *dev) |
2f7ca802 SG |
955 | { |
956 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
957 | unsigned long flags; | |
769ea6d8 | 958 | int ret; |
2f7ca802 SG |
959 | |
960 | /* Enable Tx at MAC */ | |
961 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); | |
962 | pdata->mac_cr |= MAC_CR_TXEN_; | |
963 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
964 | ||
769ea6d8 | 965 | ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); |
e360a8b4 | 966 | if (ret < 0) |
b052e073 | 967 | return ret; |
2f7ca802 SG |
968 | |
969 | /* Enable Tx at SCSRs */ | |
e360a8b4 | 970 | return smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_); |
2f7ca802 SG |
971 | } |
972 | ||
973 | /* Starts the Receive path */ | |
ec32115d | 974 | static int smsc95xx_start_rx_path(struct usbnet *dev, int in_pm) |
2f7ca802 SG |
975 | { |
976 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
977 | unsigned long flags; | |
978 | ||
979 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); | |
980 | pdata->mac_cr |= MAC_CR_RXEN_; | |
981 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
982 | ||
e360a8b4 | 983 | return __smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr, in_pm); |
2f7ca802 SG |
984 | } |
985 | ||
986 | static int smsc95xx_phy_initialize(struct usbnet *dev) | |
987 | { | |
769ea6d8 | 988 | int bmcr, ret, timeout = 0; |
db443c44 | 989 | |
2f7ca802 SG |
990 | /* Initialize MII structure */ |
991 | dev->mii.dev = dev->net; | |
992 | dev->mii.mdio_read = smsc95xx_mdio_read; | |
993 | dev->mii.mdio_write = smsc95xx_mdio_write; | |
994 | dev->mii.phy_id_mask = 0x1f; | |
995 | dev->mii.reg_num_mask = 0x1f; | |
996 | dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID; | |
997 | ||
db443c44 | 998 | /* reset phy and wait for reset to complete */ |
2f7ca802 | 999 | smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); |
db443c44 SG |
1000 | |
1001 | do { | |
1002 | msleep(10); | |
1003 | bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR); | |
1004 | timeout++; | |
d9460920 | 1005 | } while ((bmcr & BMCR_RESET) && (timeout < 100)); |
db443c44 SG |
1006 | |
1007 | if (timeout >= 100) { | |
1008 | netdev_warn(dev->net, "timeout on PHY Reset"); | |
1009 | return -EIO; | |
1010 | } | |
1011 | ||
2f7ca802 SG |
1012 | smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, |
1013 | ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | | |
1014 | ADVERTISE_PAUSE_ASYM); | |
1015 | ||
1016 | /* read to clear */ | |
769ea6d8 | 1017 | ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC); |
b052e073 SG |
1018 | if (ret < 0) { |
1019 | netdev_warn(dev->net, "Failed to read PHY_INT_SRC during init\n"); | |
1020 | return ret; | |
1021 | } | |
2f7ca802 SG |
1022 | |
1023 | smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK, | |
1024 | PHY_INT_MASK_DEFAULT_); | |
1025 | mii_nway_restart(&dev->mii); | |
1026 | ||
a475f603 | 1027 | netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n"); |
2f7ca802 SG |
1028 | return 0; |
1029 | } | |
1030 | ||
1031 | static int smsc95xx_reset(struct usbnet *dev) | |
1032 | { | |
1033 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1034 | u32 read_buf, write_buf, burst_cap; | |
1035 | int ret = 0, timeout; | |
2f7ca802 | 1036 | |
a475f603 | 1037 | netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n"); |
2f7ca802 | 1038 | |
4436761b | 1039 | ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_); |
e360a8b4 | 1040 | if (ret < 0) |
b052e073 | 1041 | return ret; |
2f7ca802 SG |
1042 | |
1043 | timeout = 0; | |
1044 | do { | |
cf2acec2 | 1045 | msleep(10); |
2f7ca802 | 1046 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); |
e360a8b4 | 1047 | if (ret < 0) |
b052e073 | 1048 | return ret; |
2f7ca802 SG |
1049 | timeout++; |
1050 | } while ((read_buf & HW_CFG_LRST_) && (timeout < 100)); | |
1051 | ||
1052 | if (timeout >= 100) { | |
60b86755 | 1053 | netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n"); |
2f7ca802 SG |
1054 | return ret; |
1055 | } | |
1056 | ||
4436761b | 1057 | ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_); |
e360a8b4 | 1058 | if (ret < 0) |
b052e073 | 1059 | return ret; |
2f7ca802 SG |
1060 | |
1061 | timeout = 0; | |
1062 | do { | |
cf2acec2 | 1063 | msleep(10); |
2f7ca802 | 1064 | ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf); |
e360a8b4 | 1065 | if (ret < 0) |
b052e073 | 1066 | return ret; |
2f7ca802 SG |
1067 | timeout++; |
1068 | } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100)); | |
1069 | ||
1070 | if (timeout >= 100) { | |
60b86755 | 1071 | netdev_warn(dev->net, "timeout waiting for PHY Reset\n"); |
2f7ca802 SG |
1072 | return ret; |
1073 | } | |
1074 | ||
2f7ca802 SG |
1075 | ret = smsc95xx_set_mac_address(dev); |
1076 | if (ret < 0) | |
1077 | return ret; | |
1078 | ||
1e1d7412 JP |
1079 | netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n", |
1080 | dev->net->dev_addr); | |
2f7ca802 SG |
1081 | |
1082 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 1083 | if (ret < 0) |
b052e073 | 1084 | return ret; |
2f7ca802 | 1085 | |
1e1d7412 JP |
1086 | netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n", |
1087 | read_buf); | |
2f7ca802 SG |
1088 | |
1089 | read_buf |= HW_CFG_BIR_; | |
1090 | ||
1091 | ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); | |
e360a8b4 | 1092 | if (ret < 0) |
b052e073 | 1093 | return ret; |
2f7ca802 SG |
1094 | |
1095 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 1096 | if (ret < 0) |
b052e073 | 1097 | return ret; |
b052e073 | 1098 | |
a475f603 JP |
1099 | netif_dbg(dev, ifup, dev->net, |
1100 | "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n", | |
1101 | read_buf); | |
2f7ca802 SG |
1102 | |
1103 | if (!turbo_mode) { | |
1104 | burst_cap = 0; | |
1105 | dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE; | |
1106 | } else if (dev->udev->speed == USB_SPEED_HIGH) { | |
1107 | burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; | |
1108 | dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; | |
1109 | } else { | |
1110 | burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; | |
1111 | dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; | |
1112 | } | |
1113 | ||
1e1d7412 JP |
1114 | netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n", |
1115 | (ulong)dev->rx_urb_size); | |
2f7ca802 SG |
1116 | |
1117 | ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap); | |
e360a8b4 | 1118 | if (ret < 0) |
b052e073 | 1119 | return ret; |
2f7ca802 SG |
1120 | |
1121 | ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf); | |
e360a8b4 | 1122 | if (ret < 0) |
b052e073 | 1123 | return ret; |
769ea6d8 | 1124 | |
a475f603 JP |
1125 | netif_dbg(dev, ifup, dev->net, |
1126 | "Read Value from BURST_CAP after writing: 0x%08x\n", | |
1127 | read_buf); | |
2f7ca802 | 1128 | |
4436761b | 1129 | ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY); |
e360a8b4 | 1130 | if (ret < 0) |
b052e073 | 1131 | return ret; |
2f7ca802 SG |
1132 | |
1133 | ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf); | |
e360a8b4 | 1134 | if (ret < 0) |
b052e073 | 1135 | return ret; |
769ea6d8 | 1136 | |
a475f603 JP |
1137 | netif_dbg(dev, ifup, dev->net, |
1138 | "Read Value from BULK_IN_DLY after writing: 0x%08x\n", | |
1139 | read_buf); | |
2f7ca802 SG |
1140 | |
1141 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 1142 | if (ret < 0) |
b052e073 | 1143 | return ret; |
769ea6d8 | 1144 | |
1e1d7412 JP |
1145 | netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG: 0x%08x\n", |
1146 | read_buf); | |
2f7ca802 SG |
1147 | |
1148 | if (turbo_mode) | |
1149 | read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_); | |
1150 | ||
1151 | read_buf &= ~HW_CFG_RXDOFF_; | |
1152 | ||
1153 | /* set Rx data offset=2, Make IP header aligns on word boundary. */ | |
1154 | read_buf |= NET_IP_ALIGN << 9; | |
1155 | ||
1156 | ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); | |
e360a8b4 | 1157 | if (ret < 0) |
b052e073 | 1158 | return ret; |
2f7ca802 SG |
1159 | |
1160 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 1161 | if (ret < 0) |
b052e073 | 1162 | return ret; |
769ea6d8 | 1163 | |
a475f603 JP |
1164 | netif_dbg(dev, ifup, dev->net, |
1165 | "Read Value from HW_CFG after writing: 0x%08x\n", read_buf); | |
2f7ca802 | 1166 | |
4436761b | 1167 | ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); |
e360a8b4 | 1168 | if (ret < 0) |
b052e073 | 1169 | return ret; |
2f7ca802 SG |
1170 | |
1171 | ret = smsc95xx_read_reg(dev, ID_REV, &read_buf); | |
e360a8b4 | 1172 | if (ret < 0) |
b052e073 | 1173 | return ret; |
a475f603 | 1174 | netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf); |
2f7ca802 | 1175 | |
f293501c SG |
1176 | /* Configure GPIO pins as LED outputs */ |
1177 | write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED | | |
1178 | LED_GPIO_CFG_FDX_LED; | |
1179 | ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf); | |
e360a8b4 | 1180 | if (ret < 0) |
b052e073 | 1181 | return ret; |
f293501c | 1182 | |
2f7ca802 | 1183 | /* Init Tx */ |
4436761b | 1184 | ret = smsc95xx_write_reg(dev, FLOW, 0); |
e360a8b4 | 1185 | if (ret < 0) |
b052e073 | 1186 | return ret; |
2f7ca802 | 1187 | |
4436761b | 1188 | ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT); |
e360a8b4 | 1189 | if (ret < 0) |
b052e073 | 1190 | return ret; |
2f7ca802 SG |
1191 | |
1192 | /* Don't need mac_cr_lock during initialisation */ | |
1193 | ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr); | |
e360a8b4 | 1194 | if (ret < 0) |
b052e073 | 1195 | return ret; |
2f7ca802 SG |
1196 | |
1197 | /* Init Rx */ | |
1198 | /* Set Vlan */ | |
4436761b | 1199 | ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q); |
e360a8b4 | 1200 | if (ret < 0) |
b052e073 | 1201 | return ret; |
2f7ca802 | 1202 | |
f7b29271 | 1203 | /* Enable or disable checksum offload engines */ |
769ea6d8 | 1204 | ret = smsc95xx_set_features(dev->net, dev->net->features); |
b052e073 SG |
1205 | if (ret < 0) { |
1206 | netdev_warn(dev->net, "Failed to set checksum offload features\n"); | |
1207 | return ret; | |
1208 | } | |
2f7ca802 SG |
1209 | |
1210 | smsc95xx_set_multicast(dev->net); | |
1211 | ||
769ea6d8 | 1212 | ret = smsc95xx_phy_initialize(dev); |
b052e073 SG |
1213 | if (ret < 0) { |
1214 | netdev_warn(dev->net, "Failed to init PHY\n"); | |
1215 | return ret; | |
1216 | } | |
2f7ca802 SG |
1217 | |
1218 | ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf); | |
e360a8b4 | 1219 | if (ret < 0) |
b052e073 | 1220 | return ret; |
2f7ca802 SG |
1221 | |
1222 | /* enable PHY interrupts */ | |
1223 | read_buf |= INT_EP_CTL_PHY_INT_; | |
1224 | ||
1225 | ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf); | |
e360a8b4 | 1226 | if (ret < 0) |
b052e073 | 1227 | return ret; |
2f7ca802 | 1228 | |
769ea6d8 | 1229 | ret = smsc95xx_start_tx_path(dev); |
b052e073 SG |
1230 | if (ret < 0) { |
1231 | netdev_warn(dev->net, "Failed to start TX path\n"); | |
1232 | return ret; | |
1233 | } | |
769ea6d8 | 1234 | |
ec32115d | 1235 | ret = smsc95xx_start_rx_path(dev, 0); |
b052e073 SG |
1236 | if (ret < 0) { |
1237 | netdev_warn(dev->net, "Failed to start RX path\n"); | |
1238 | return ret; | |
1239 | } | |
2f7ca802 | 1240 | |
a475f603 | 1241 | netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n"); |
2f7ca802 SG |
1242 | return 0; |
1243 | } | |
1244 | ||
63e77b39 SH |
1245 | static const struct net_device_ops smsc95xx_netdev_ops = { |
1246 | .ndo_open = usbnet_open, | |
1247 | .ndo_stop = usbnet_stop, | |
1248 | .ndo_start_xmit = usbnet_start_xmit, | |
1249 | .ndo_tx_timeout = usbnet_tx_timeout, | |
1250 | .ndo_change_mtu = usbnet_change_mtu, | |
1251 | .ndo_set_mac_address = eth_mac_addr, | |
1252 | .ndo_validate_addr = eth_validate_addr, | |
1253 | .ndo_do_ioctl = smsc95xx_ioctl, | |
afc4b13d | 1254 | .ndo_set_rx_mode = smsc95xx_set_multicast, |
78e47fe4 | 1255 | .ndo_set_features = smsc95xx_set_features, |
63e77b39 SH |
1256 | }; |
1257 | ||
2f7ca802 SG |
1258 | static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf) |
1259 | { | |
1260 | struct smsc95xx_priv *pdata = NULL; | |
bbd9f9ee | 1261 | u32 val; |
2f7ca802 SG |
1262 | int ret; |
1263 | ||
1264 | printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n"); | |
1265 | ||
1266 | ret = usbnet_get_endpoints(dev, intf); | |
b052e073 SG |
1267 | if (ret < 0) { |
1268 | netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret); | |
1269 | return ret; | |
1270 | } | |
2f7ca802 SG |
1271 | |
1272 | dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv), | |
38673c82 | 1273 | GFP_KERNEL); |
2f7ca802 SG |
1274 | |
1275 | pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
38673c82 | 1276 | if (!pdata) |
2f7ca802 | 1277 | return -ENOMEM; |
2f7ca802 SG |
1278 | |
1279 | spin_lock_init(&pdata->mac_cr_lock); | |
1280 | ||
78e47fe4 MM |
1281 | if (DEFAULT_TX_CSUM_ENABLE) |
1282 | dev->net->features |= NETIF_F_HW_CSUM; | |
1283 | if (DEFAULT_RX_CSUM_ENABLE) | |
1284 | dev->net->features |= NETIF_F_RXCSUM; | |
1285 | ||
1286 | dev->net->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM; | |
2f7ca802 | 1287 | |
f4e8ab7c BB |
1288 | smsc95xx_init_mac_address(dev); |
1289 | ||
2f7ca802 SG |
1290 | /* Init all registers */ |
1291 | ret = smsc95xx_reset(dev); | |
1292 | ||
bbd9f9ee SG |
1293 | /* detect device revision as different features may be available */ |
1294 | ret = smsc95xx_read_reg(dev, ID_REV, &val); | |
e360a8b4 | 1295 | if (ret < 0) |
b052e073 | 1296 | return ret; |
bbd9f9ee | 1297 | val >>= 16; |
13722bbe WH |
1298 | pdata->chip_id = val; |
1299 | pdata->mdix_ctrl = get_mdix_status(dev->net); | |
9ebca507 SG |
1300 | |
1301 | if ((val == ID_REV_CHIP_ID_9500A_) || (val == ID_REV_CHIP_ID_9530_) || | |
1302 | (val == ID_REV_CHIP_ID_89530_) || (val == ID_REV_CHIP_ID_9730_)) | |
1303 | pdata->features = (FEATURE_8_WAKEUP_FILTERS | | |
1304 | FEATURE_PHY_NLP_CROSSOVER | | |
eb970ff0 | 1305 | FEATURE_REMOTE_WAKEUP); |
9ebca507 SG |
1306 | else if (val == ID_REV_CHIP_ID_9512_) |
1307 | pdata->features = FEATURE_8_WAKEUP_FILTERS; | |
bbd9f9ee | 1308 | |
63e77b39 | 1309 | dev->net->netdev_ops = &smsc95xx_netdev_ops; |
2f7ca802 | 1310 | dev->net->ethtool_ops = &smsc95xx_ethtool_ops; |
2f7ca802 | 1311 | dev->net->flags |= IFF_MULTICAST; |
78e47fe4 | 1312 | dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM; |
9bbf5660 | 1313 | dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len; |
d69d1694 CF |
1314 | |
1315 | pdata->dev = dev; | |
1316 | INIT_DELAYED_WORK(&pdata->carrier_check, check_carrier); | |
1317 | schedule_delayed_work(&pdata->carrier_check, CARRIER_CHECK_DELAY); | |
1318 | ||
2f7ca802 SG |
1319 | return 0; |
1320 | } | |
1321 | ||
1322 | static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf) | |
1323 | { | |
1324 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
d69d1694 | 1325 | |
2f7ca802 | 1326 | if (pdata) { |
d69d1694 | 1327 | cancel_delayed_work(&pdata->carrier_check); |
a475f603 | 1328 | netif_dbg(dev, ifdown, dev->net, "free pdata\n"); |
2f7ca802 SG |
1329 | kfree(pdata); |
1330 | pdata = NULL; | |
1331 | dev->data[0] = 0; | |
1332 | } | |
1333 | } | |
1334 | ||
068bb1a7 | 1335 | static u32 smsc_crc(const u8 *buffer, size_t len, int filter) |
bbd9f9ee | 1336 | { |
068bb1a7 SG |
1337 | u32 crc = bitrev16(crc16(0xFFFF, buffer, len)); |
1338 | return crc << ((filter % 2) * 16); | |
bbd9f9ee SG |
1339 | } |
1340 | ||
e5e3af83 SG |
1341 | static int smsc95xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask) |
1342 | { | |
1343 | struct mii_if_info *mii = &dev->mii; | |
1344 | int ret; | |
1345 | ||
1e1d7412 | 1346 | netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n"); |
e5e3af83 SG |
1347 | |
1348 | /* read to clear */ | |
1349 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC); | |
e360a8b4 | 1350 | if (ret < 0) |
b052e073 | 1351 | return ret; |
e5e3af83 SG |
1352 | |
1353 | /* enable interrupt source */ | |
1354 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK); | |
e360a8b4 | 1355 | if (ret < 0) |
b052e073 | 1356 | return ret; |
e5e3af83 SG |
1357 | |
1358 | ret |= mask; | |
1359 | ||
1360 | smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret); | |
1361 | ||
1362 | return 0; | |
1363 | } | |
1364 | ||
1365 | static int smsc95xx_link_ok_nopm(struct usbnet *dev) | |
1366 | { | |
1367 | struct mii_if_info *mii = &dev->mii; | |
1368 | int ret; | |
1369 | ||
1370 | /* first, a dummy read, needed to latch some MII phys */ | |
1371 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); | |
e360a8b4 | 1372 | if (ret < 0) |
b052e073 | 1373 | return ret; |
e5e3af83 SG |
1374 | |
1375 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); | |
e360a8b4 | 1376 | if (ret < 0) |
b052e073 | 1377 | return ret; |
e5e3af83 SG |
1378 | |
1379 | return !!(ret & BMSR_LSTATUS); | |
1380 | } | |
1381 | ||
319b95b5 SG |
1382 | static int smsc95xx_enter_suspend0(struct usbnet *dev) |
1383 | { | |
1384 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1385 | u32 val; | |
1386 | int ret; | |
1387 | ||
1388 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
e360a8b4 | 1389 | if (ret < 0) |
b052e073 | 1390 | return ret; |
319b95b5 SG |
1391 | |
1392 | val &= (~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_)); | |
1393 | val |= PM_CTL_SUS_MODE_0; | |
1394 | ||
1395 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
e360a8b4 | 1396 | if (ret < 0) |
b052e073 | 1397 | return ret; |
319b95b5 SG |
1398 | |
1399 | /* clear wol status */ | |
1400 | val &= ~PM_CTL_WUPS_; | |
1401 | val |= PM_CTL_WUPS_WOL_; | |
1402 | ||
1403 | /* enable energy detection */ | |
1404 | if (pdata->wolopts & WAKE_PHY) | |
1405 | val |= PM_CTL_WUPS_ED_; | |
1406 | ||
1407 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
e360a8b4 | 1408 | if (ret < 0) |
b052e073 | 1409 | return ret; |
319b95b5 SG |
1410 | |
1411 | /* read back PM_CTRL */ | |
1412 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
76437214 ML |
1413 | if (ret < 0) |
1414 | return ret; | |
319b95b5 | 1415 | |
b2d4b150 SG |
1416 | pdata->suspend_flags |= SUSPEND_SUSPEND0; |
1417 | ||
76437214 | 1418 | return 0; |
319b95b5 SG |
1419 | } |
1420 | ||
1421 | static int smsc95xx_enter_suspend1(struct usbnet *dev) | |
1422 | { | |
1423 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1424 | struct mii_if_info *mii = &dev->mii; | |
1425 | u32 val; | |
1426 | int ret; | |
1427 | ||
1428 | /* reconfigure link pulse detection timing for | |
1429 | * compatibility with non-standard link partners | |
1430 | */ | |
1431 | if (pdata->features & FEATURE_PHY_NLP_CROSSOVER) | |
1432 | smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_EDPD_CONFIG, | |
1433 | PHY_EDPD_CONFIG_DEFAULT); | |
1434 | ||
1435 | /* enable energy detect power-down mode */ | |
1436 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS); | |
e360a8b4 | 1437 | if (ret < 0) |
b052e073 | 1438 | return ret; |
319b95b5 SG |
1439 | |
1440 | ret |= MODE_CTRL_STS_EDPWRDOWN_; | |
1441 | ||
1442 | smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS, ret); | |
1443 | ||
1444 | /* enter SUSPEND1 mode */ | |
1445 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
e360a8b4 | 1446 | if (ret < 0) |
b052e073 | 1447 | return ret; |
319b95b5 SG |
1448 | |
1449 | val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); | |
1450 | val |= PM_CTL_SUS_MODE_1; | |
1451 | ||
1452 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
e360a8b4 | 1453 | if (ret < 0) |
b052e073 | 1454 | return ret; |
319b95b5 SG |
1455 | |
1456 | /* clear wol status, enable energy detection */ | |
1457 | val &= ~PM_CTL_WUPS_; | |
1458 | val |= (PM_CTL_WUPS_ED_ | PM_CTL_ED_EN_); | |
1459 | ||
1460 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
76437214 ML |
1461 | if (ret < 0) |
1462 | return ret; | |
319b95b5 | 1463 | |
b2d4b150 SG |
1464 | pdata->suspend_flags |= SUSPEND_SUSPEND1; |
1465 | ||
76437214 | 1466 | return 0; |
319b95b5 SG |
1467 | } |
1468 | ||
1469 | static int smsc95xx_enter_suspend2(struct usbnet *dev) | |
1470 | { | |
b2d4b150 | 1471 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); |
319b95b5 SG |
1472 | u32 val; |
1473 | int ret; | |
1474 | ||
1475 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
e360a8b4 | 1476 | if (ret < 0) |
b052e073 | 1477 | return ret; |
319b95b5 SG |
1478 | |
1479 | val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); | |
1480 | val |= PM_CTL_SUS_MODE_2; | |
1481 | ||
1482 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
76437214 ML |
1483 | if (ret < 0) |
1484 | return ret; | |
319b95b5 | 1485 | |
b2d4b150 SG |
1486 | pdata->suspend_flags |= SUSPEND_SUSPEND2; |
1487 | ||
76437214 | 1488 | return 0; |
319b95b5 SG |
1489 | } |
1490 | ||
b2d4b150 SG |
1491 | static int smsc95xx_enter_suspend3(struct usbnet *dev) |
1492 | { | |
1493 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1494 | u32 val; | |
1495 | int ret; | |
1496 | ||
1497 | ret = smsc95xx_read_reg_nopm(dev, RX_FIFO_INF, &val); | |
1498 | if (ret < 0) | |
1499 | return ret; | |
1500 | ||
1501 | if (val & 0xFFFF) { | |
1502 | netdev_info(dev->net, "rx fifo not empty in autosuspend\n"); | |
1503 | return -EBUSY; | |
1504 | } | |
1505 | ||
1506 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
1507 | if (ret < 0) | |
1508 | return ret; | |
1509 | ||
1510 | val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); | |
1511 | val |= PM_CTL_SUS_MODE_3 | PM_CTL_RES_CLR_WKP_STS; | |
1512 | ||
1513 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
1514 | if (ret < 0) | |
1515 | return ret; | |
1516 | ||
1517 | /* clear wol status */ | |
1518 | val &= ~PM_CTL_WUPS_; | |
1519 | val |= PM_CTL_WUPS_WOL_; | |
1520 | ||
1521 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
1522 | if (ret < 0) | |
1523 | return ret; | |
1524 | ||
1525 | pdata->suspend_flags |= SUSPEND_SUSPEND3; | |
1526 | ||
1527 | return 0; | |
1528 | } | |
1529 | ||
1530 | static int smsc95xx_autosuspend(struct usbnet *dev, u32 link_up) | |
1531 | { | |
1532 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1533 | int ret; | |
1534 | ||
1535 | if (!netif_running(dev->net)) { | |
1536 | /* interface is ifconfig down so fully power down hw */ | |
1537 | netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n"); | |
1538 | return smsc95xx_enter_suspend2(dev); | |
1539 | } | |
1540 | ||
1541 | if (!link_up) { | |
1542 | /* link is down so enter EDPD mode, but only if device can | |
1543 | * reliably resume from it. This check should be redundant | |
eb970ff0 | 1544 | * as current FEATURE_REMOTE_WAKEUP parts also support |
b2d4b150 SG |
1545 | * FEATURE_PHY_NLP_CROSSOVER but it's included for clarity */ |
1546 | if (!(pdata->features & FEATURE_PHY_NLP_CROSSOVER)) { | |
1547 | netdev_warn(dev->net, "EDPD not supported\n"); | |
1548 | return -EBUSY; | |
1549 | } | |
1550 | ||
1551 | netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n"); | |
1552 | ||
1553 | /* enable PHY wakeup events for if cable is attached */ | |
1554 | ret = smsc95xx_enable_phy_wakeup_interrupts(dev, | |
1555 | PHY_INT_MASK_ANEG_COMP_); | |
1556 | if (ret < 0) { | |
1557 | netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); | |
1558 | return ret; | |
1559 | } | |
1560 | ||
1561 | netdev_info(dev->net, "entering SUSPEND1 mode\n"); | |
1562 | return smsc95xx_enter_suspend1(dev); | |
1563 | } | |
1564 | ||
1565 | /* enable PHY wakeup events so we remote wakeup if cable is pulled */ | |
1566 | ret = smsc95xx_enable_phy_wakeup_interrupts(dev, | |
1567 | PHY_INT_MASK_LINK_DOWN_); | |
1568 | if (ret < 0) { | |
1569 | netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); | |
1570 | return ret; | |
1571 | } | |
1572 | ||
1573 | netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n"); | |
1574 | return smsc95xx_enter_suspend3(dev); | |
1575 | } | |
1576 | ||
b5a04475 SG |
1577 | static int smsc95xx_suspend(struct usb_interface *intf, pm_message_t message) |
1578 | { | |
1579 | struct usbnet *dev = usb_get_intfdata(intf); | |
e0e474a8 | 1580 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); |
e5e3af83 | 1581 | u32 val, link_up; |
b5a04475 | 1582 | int ret; |
b5a04475 | 1583 | |
b5a04475 | 1584 | ret = usbnet_suspend(intf, message); |
b052e073 SG |
1585 | if (ret < 0) { |
1586 | netdev_warn(dev->net, "usbnet_suspend error\n"); | |
1587 | return ret; | |
1588 | } | |
b5a04475 | 1589 | |
b2d4b150 SG |
1590 | if (pdata->suspend_flags) { |
1591 | netdev_warn(dev->net, "error during last resume\n"); | |
1592 | pdata->suspend_flags = 0; | |
1593 | } | |
1594 | ||
e5e3af83 SG |
1595 | /* determine if link is up using only _nopm functions */ |
1596 | link_up = smsc95xx_link_ok_nopm(dev); | |
1597 | ||
42e21c01 | 1598 | if (message.event == PM_EVENT_AUTO_SUSPEND && |
eb970ff0 | 1599 | (pdata->features & FEATURE_REMOTE_WAKEUP)) { |
b2d4b150 SG |
1600 | ret = smsc95xx_autosuspend(dev, link_up); |
1601 | goto done; | |
1602 | } | |
1603 | ||
1604 | /* if we get this far we're not autosuspending */ | |
e5e3af83 SG |
1605 | /* if no wol options set, or if link is down and we're not waking on |
1606 | * PHY activity, enter lowest power SUSPEND2 mode | |
1607 | */ | |
1608 | if (!(pdata->wolopts & SUPPORTED_WAKE) || | |
1609 | !(link_up || (pdata->wolopts & WAKE_PHY))) { | |
1e1d7412 | 1610 | netdev_info(dev->net, "entering SUSPEND2 mode\n"); |
e0e474a8 SG |
1611 | |
1612 | /* disable energy detect (link up) & wake up events */ | |
ec32115d | 1613 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1614 | if (ret < 0) |
b052e073 | 1615 | goto done; |
e0e474a8 SG |
1616 | |
1617 | val &= ~(WUCSR_MPEN_ | WUCSR_WAKE_EN_); | |
1618 | ||
ec32115d | 1619 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1620 | if (ret < 0) |
b052e073 | 1621 | goto done; |
e0e474a8 | 1622 | |
ec32115d | 1623 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); |
e360a8b4 | 1624 | if (ret < 0) |
b052e073 | 1625 | goto done; |
e0e474a8 SG |
1626 | |
1627 | val &= ~(PM_CTL_ED_EN_ | PM_CTL_WOL_EN_); | |
1628 | ||
ec32115d | 1629 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); |
e360a8b4 | 1630 | if (ret < 0) |
b052e073 | 1631 | goto done; |
e0e474a8 | 1632 | |
3b9f7d8c SG |
1633 | ret = smsc95xx_enter_suspend2(dev); |
1634 | goto done; | |
e0e474a8 SG |
1635 | } |
1636 | ||
e5e3af83 SG |
1637 | if (pdata->wolopts & WAKE_PHY) { |
1638 | ret = smsc95xx_enable_phy_wakeup_interrupts(dev, | |
1639 | (PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_LINK_DOWN_)); | |
b052e073 SG |
1640 | if (ret < 0) { |
1641 | netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); | |
1642 | goto done; | |
1643 | } | |
e5e3af83 SG |
1644 | |
1645 | /* if link is down then configure EDPD and enter SUSPEND1, | |
1646 | * otherwise enter SUSPEND0 below | |
1647 | */ | |
1648 | if (!link_up) { | |
1e1d7412 | 1649 | netdev_info(dev->net, "entering SUSPEND1 mode\n"); |
3b9f7d8c SG |
1650 | ret = smsc95xx_enter_suspend1(dev); |
1651 | goto done; | |
e5e3af83 SG |
1652 | } |
1653 | } | |
1654 | ||
bbd9f9ee | 1655 | if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) { |
eed9a729 | 1656 | u32 *filter_mask = kzalloc(sizeof(u32) * 32, GFP_KERNEL); |
06a221be ML |
1657 | u32 command[2]; |
1658 | u32 offset[2]; | |
1659 | u32 crc[4]; | |
9ebca507 SG |
1660 | int wuff_filter_count = |
1661 | (pdata->features & FEATURE_8_WAKEUP_FILTERS) ? | |
1662 | LAN9500A_WUFF_NUM : LAN9500_WUFF_NUM; | |
bbd9f9ee SG |
1663 | int i, filter = 0; |
1664 | ||
eed9a729 SG |
1665 | if (!filter_mask) { |
1666 | netdev_warn(dev->net, "Unable to allocate filter_mask\n"); | |
3b9f7d8c SG |
1667 | ret = -ENOMEM; |
1668 | goto done; | |
eed9a729 SG |
1669 | } |
1670 | ||
06a221be ML |
1671 | memset(command, 0, sizeof(command)); |
1672 | memset(offset, 0, sizeof(offset)); | |
1673 | memset(crc, 0, sizeof(crc)); | |
1674 | ||
bbd9f9ee SG |
1675 | if (pdata->wolopts & WAKE_BCAST) { |
1676 | const u8 bcast[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}; | |
1e1d7412 | 1677 | netdev_info(dev->net, "enabling broadcast detection\n"); |
bbd9f9ee SG |
1678 | filter_mask[filter * 4] = 0x003F; |
1679 | filter_mask[filter * 4 + 1] = 0x00; | |
1680 | filter_mask[filter * 4 + 2] = 0x00; | |
1681 | filter_mask[filter * 4 + 3] = 0x00; | |
1682 | command[filter/4] |= 0x05UL << ((filter % 4) * 8); | |
1683 | offset[filter/4] |= 0x00 << ((filter % 4) * 8); | |
1684 | crc[filter/2] |= smsc_crc(bcast, 6, filter); | |
1685 | filter++; | |
1686 | } | |
1687 | ||
1688 | if (pdata->wolopts & WAKE_MCAST) { | |
1689 | const u8 mcast[] = {0x01, 0x00, 0x5E}; | |
1e1d7412 | 1690 | netdev_info(dev->net, "enabling multicast detection\n"); |
bbd9f9ee SG |
1691 | filter_mask[filter * 4] = 0x0007; |
1692 | filter_mask[filter * 4 + 1] = 0x00; | |
1693 | filter_mask[filter * 4 + 2] = 0x00; | |
1694 | filter_mask[filter * 4 + 3] = 0x00; | |
1695 | command[filter/4] |= 0x09UL << ((filter % 4) * 8); | |
1696 | offset[filter/4] |= 0x00 << ((filter % 4) * 8); | |
1697 | crc[filter/2] |= smsc_crc(mcast, 3, filter); | |
1698 | filter++; | |
1699 | } | |
1700 | ||
1701 | if (pdata->wolopts & WAKE_ARP) { | |
1702 | const u8 arp[] = {0x08, 0x06}; | |
1e1d7412 | 1703 | netdev_info(dev->net, "enabling ARP detection\n"); |
bbd9f9ee SG |
1704 | filter_mask[filter * 4] = 0x0003; |
1705 | filter_mask[filter * 4 + 1] = 0x00; | |
1706 | filter_mask[filter * 4 + 2] = 0x00; | |
1707 | filter_mask[filter * 4 + 3] = 0x00; | |
1708 | command[filter/4] |= 0x05UL << ((filter % 4) * 8); | |
1709 | offset[filter/4] |= 0x0C << ((filter % 4) * 8); | |
1710 | crc[filter/2] |= smsc_crc(arp, 2, filter); | |
1711 | filter++; | |
1712 | } | |
1713 | ||
1714 | if (pdata->wolopts & WAKE_UCAST) { | |
1e1d7412 | 1715 | netdev_info(dev->net, "enabling unicast detection\n"); |
bbd9f9ee SG |
1716 | filter_mask[filter * 4] = 0x003F; |
1717 | filter_mask[filter * 4 + 1] = 0x00; | |
1718 | filter_mask[filter * 4 + 2] = 0x00; | |
1719 | filter_mask[filter * 4 + 3] = 0x00; | |
1720 | command[filter/4] |= 0x01UL << ((filter % 4) * 8); | |
1721 | offset[filter/4] |= 0x00 << ((filter % 4) * 8); | |
1722 | crc[filter/2] |= smsc_crc(dev->net->dev_addr, ETH_ALEN, filter); | |
1723 | filter++; | |
1724 | } | |
1725 | ||
9ebca507 | 1726 | for (i = 0; i < (wuff_filter_count * 4); i++) { |
ec32115d | 1727 | ret = smsc95xx_write_reg_nopm(dev, WUFF, filter_mask[i]); |
b052e073 | 1728 | if (ret < 0) { |
06a221be | 1729 | kfree(filter_mask); |
b052e073 SG |
1730 | goto done; |
1731 | } | |
bbd9f9ee | 1732 | } |
06a221be | 1733 | kfree(filter_mask); |
bbd9f9ee | 1734 | |
9ebca507 | 1735 | for (i = 0; i < (wuff_filter_count / 4); i++) { |
ec32115d | 1736 | ret = smsc95xx_write_reg_nopm(dev, WUFF, command[i]); |
e360a8b4 | 1737 | if (ret < 0) |
b052e073 | 1738 | goto done; |
bbd9f9ee SG |
1739 | } |
1740 | ||
9ebca507 | 1741 | for (i = 0; i < (wuff_filter_count / 4); i++) { |
ec32115d | 1742 | ret = smsc95xx_write_reg_nopm(dev, WUFF, offset[i]); |
e360a8b4 | 1743 | if (ret < 0) |
b052e073 | 1744 | goto done; |
bbd9f9ee SG |
1745 | } |
1746 | ||
9ebca507 | 1747 | for (i = 0; i < (wuff_filter_count / 2); i++) { |
ec32115d | 1748 | ret = smsc95xx_write_reg_nopm(dev, WUFF, crc[i]); |
e360a8b4 | 1749 | if (ret < 0) |
b052e073 | 1750 | goto done; |
bbd9f9ee SG |
1751 | } |
1752 | ||
1753 | /* clear any pending pattern match packet status */ | |
ec32115d | 1754 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1755 | if (ret < 0) |
b052e073 | 1756 | goto done; |
bbd9f9ee SG |
1757 | |
1758 | val |= WUCSR_WUFR_; | |
1759 | ||
ec32115d | 1760 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1761 | if (ret < 0) |
b052e073 | 1762 | goto done; |
bbd9f9ee SG |
1763 | } |
1764 | ||
e0e474a8 SG |
1765 | if (pdata->wolopts & WAKE_MAGIC) { |
1766 | /* clear any pending magic packet status */ | |
ec32115d | 1767 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1768 | if (ret < 0) |
b052e073 | 1769 | goto done; |
e0e474a8 SG |
1770 | |
1771 | val |= WUCSR_MPR_; | |
1772 | ||
ec32115d | 1773 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1774 | if (ret < 0) |
b052e073 | 1775 | goto done; |
e0e474a8 SG |
1776 | } |
1777 | ||
bbd9f9ee | 1778 | /* enable/disable wakeup sources */ |
ec32115d | 1779 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1780 | if (ret < 0) |
b052e073 | 1781 | goto done; |
e0e474a8 | 1782 | |
bbd9f9ee | 1783 | if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) { |
1e1d7412 | 1784 | netdev_info(dev->net, "enabling pattern match wakeup\n"); |
bbd9f9ee SG |
1785 | val |= WUCSR_WAKE_EN_; |
1786 | } else { | |
1e1d7412 | 1787 | netdev_info(dev->net, "disabling pattern match wakeup\n"); |
bbd9f9ee SG |
1788 | val &= ~WUCSR_WAKE_EN_; |
1789 | } | |
1790 | ||
e0e474a8 | 1791 | if (pdata->wolopts & WAKE_MAGIC) { |
1e1d7412 | 1792 | netdev_info(dev->net, "enabling magic packet wakeup\n"); |
e0e474a8 SG |
1793 | val |= WUCSR_MPEN_; |
1794 | } else { | |
1e1d7412 | 1795 | netdev_info(dev->net, "disabling magic packet wakeup\n"); |
e0e474a8 SG |
1796 | val &= ~WUCSR_MPEN_; |
1797 | } | |
1798 | ||
ec32115d | 1799 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1800 | if (ret < 0) |
b052e073 | 1801 | goto done; |
e0e474a8 SG |
1802 | |
1803 | /* enable wol wakeup source */ | |
ec32115d | 1804 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); |
e360a8b4 | 1805 | if (ret < 0) |
b052e073 | 1806 | goto done; |
e0e474a8 SG |
1807 | |
1808 | val |= PM_CTL_WOL_EN_; | |
1809 | ||
e5e3af83 SG |
1810 | /* phy energy detect wakeup source */ |
1811 | if (pdata->wolopts & WAKE_PHY) | |
1812 | val |= PM_CTL_ED_EN_; | |
1813 | ||
ec32115d | 1814 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); |
e360a8b4 | 1815 | if (ret < 0) |
b052e073 | 1816 | goto done; |
e0e474a8 | 1817 | |
bbd9f9ee | 1818 | /* enable receiver to enable frame reception */ |
ec32115d | 1819 | smsc95xx_start_rx_path(dev, 1); |
e0e474a8 SG |
1820 | |
1821 | /* some wol options are enabled, so enter SUSPEND0 */ | |
1e1d7412 | 1822 | netdev_info(dev->net, "entering SUSPEND0 mode\n"); |
3b9f7d8c SG |
1823 | ret = smsc95xx_enter_suspend0(dev); |
1824 | ||
1825 | done: | |
0d41be53 ML |
1826 | /* |
1827 | * TODO: resume() might need to handle the suspend failure | |
1828 | * in system sleep | |
1829 | */ | |
1830 | if (ret && PMSG_IS_AUTO(message)) | |
3b9f7d8c SG |
1831 | usbnet_resume(intf); |
1832 | return ret; | |
e0e474a8 SG |
1833 | } |
1834 | ||
1835 | static int smsc95xx_resume(struct usb_interface *intf) | |
1836 | { | |
1837 | struct usbnet *dev = usb_get_intfdata(intf); | |
8bca81d9 SM |
1838 | struct smsc95xx_priv *pdata; |
1839 | u8 suspend_flags; | |
e0e474a8 SG |
1840 | int ret; |
1841 | u32 val; | |
1842 | ||
1843 | BUG_ON(!dev); | |
8bca81d9 SM |
1844 | pdata = (struct smsc95xx_priv *)(dev->data[0]); |
1845 | suspend_flags = pdata->suspend_flags; | |
e0e474a8 | 1846 | |
b2d4b150 SG |
1847 | netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags); |
1848 | ||
1849 | /* do this first to ensure it's cleared even in error case */ | |
1850 | pdata->suspend_flags = 0; | |
d69d1694 | 1851 | schedule_delayed_work(&pdata->carrier_check, CARRIER_CHECK_DELAY); |
b2d4b150 SG |
1852 | |
1853 | if (suspend_flags & SUSPEND_ALLMODES) { | |
bbd9f9ee | 1854 | /* clear wake-up sources */ |
ec32115d | 1855 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1856 | if (ret < 0) |
b052e073 | 1857 | return ret; |
e0e474a8 | 1858 | |
bbd9f9ee | 1859 | val &= ~(WUCSR_WAKE_EN_ | WUCSR_MPEN_); |
e0e474a8 | 1860 | |
ec32115d | 1861 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1862 | if (ret < 0) |
b052e073 | 1863 | return ret; |
e0e474a8 SG |
1864 | |
1865 | /* clear wake-up status */ | |
ec32115d | 1866 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); |
e360a8b4 | 1867 | if (ret < 0) |
b052e073 | 1868 | return ret; |
e0e474a8 SG |
1869 | |
1870 | val &= ~PM_CTL_WOL_EN_; | |
1871 | val |= PM_CTL_WUPS_; | |
1872 | ||
ec32115d | 1873 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); |
e360a8b4 | 1874 | if (ret < 0) |
b052e073 | 1875 | return ret; |
e0e474a8 SG |
1876 | } |
1877 | ||
af3d7c1e | 1878 | ret = usbnet_resume(intf); |
b052e073 SG |
1879 | if (ret < 0) |
1880 | netdev_warn(dev->net, "usbnet_resume error\n"); | |
e0e474a8 | 1881 | |
b052e073 | 1882 | return ret; |
b5a04475 SG |
1883 | } |
1884 | ||
b4df480f JS |
1885 | static int smsc95xx_reset_resume(struct usb_interface *intf) |
1886 | { | |
1887 | struct usbnet *dev = usb_get_intfdata(intf); | |
1888 | int ret; | |
1889 | ||
1890 | ret = smsc95xx_reset(dev); | |
1891 | if (ret < 0) | |
1892 | return ret; | |
1893 | ||
1894 | return smsc95xx_resume(intf); | |
1895 | } | |
1896 | ||
2f7ca802 SG |
1897 | static void smsc95xx_rx_csum_offload(struct sk_buff *skb) |
1898 | { | |
1899 | skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2); | |
1900 | skb->ip_summed = CHECKSUM_COMPLETE; | |
1901 | skb_trim(skb, skb->len - 2); | |
1902 | } | |
1903 | ||
1904 | static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb) | |
1905 | { | |
eb85569f EG |
1906 | /* This check is no longer done by usbnet */ |
1907 | if (skb->len < dev->net->hard_header_len) | |
1908 | return 0; | |
1909 | ||
2f7ca802 SG |
1910 | while (skb->len > 0) { |
1911 | u32 header, align_count; | |
1912 | struct sk_buff *ax_skb; | |
1913 | unsigned char *packet; | |
1914 | u16 size; | |
1915 | ||
1916 | memcpy(&header, skb->data, sizeof(header)); | |
1917 | le32_to_cpus(&header); | |
1918 | skb_pull(skb, 4 + NET_IP_ALIGN); | |
1919 | packet = skb->data; | |
1920 | ||
1921 | /* get the packet length */ | |
1922 | size = (u16)((header & RX_STS_FL_) >> 16); | |
1923 | align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4; | |
1924 | ||
1925 | if (unlikely(header & RX_STS_ES_)) { | |
a475f603 JP |
1926 | netif_dbg(dev, rx_err, dev->net, |
1927 | "Error header=0x%08x\n", header); | |
80667ac1 HX |
1928 | dev->net->stats.rx_errors++; |
1929 | dev->net->stats.rx_dropped++; | |
2f7ca802 SG |
1930 | |
1931 | if (header & RX_STS_CRC_) { | |
80667ac1 | 1932 | dev->net->stats.rx_crc_errors++; |
2f7ca802 SG |
1933 | } else { |
1934 | if (header & (RX_STS_TL_ | RX_STS_RF_)) | |
80667ac1 | 1935 | dev->net->stats.rx_frame_errors++; |
2f7ca802 SG |
1936 | |
1937 | if ((header & RX_STS_LE_) && | |
1938 | (!(header & RX_STS_FT_))) | |
80667ac1 | 1939 | dev->net->stats.rx_length_errors++; |
2f7ca802 SG |
1940 | } |
1941 | } else { | |
1942 | /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */ | |
1943 | if (unlikely(size > (ETH_FRAME_LEN + 12))) { | |
a475f603 JP |
1944 | netif_dbg(dev, rx_err, dev->net, |
1945 | "size err header=0x%08x\n", header); | |
2f7ca802 SG |
1946 | return 0; |
1947 | } | |
1948 | ||
1949 | /* last frame in this batch */ | |
1950 | if (skb->len == size) { | |
78e47fe4 | 1951 | if (dev->net->features & NETIF_F_RXCSUM) |
2f7ca802 | 1952 | smsc95xx_rx_csum_offload(skb); |
df18acca | 1953 | skb_trim(skb, skb->len - 4); /* remove fcs */ |
2f7ca802 SG |
1954 | skb->truesize = size + sizeof(struct sk_buff); |
1955 | ||
1956 | return 1; | |
1957 | } | |
1958 | ||
1959 | ax_skb = skb_clone(skb, GFP_ATOMIC); | |
1960 | if (unlikely(!ax_skb)) { | |
60b86755 | 1961 | netdev_warn(dev->net, "Error allocating skb\n"); |
2f7ca802 SG |
1962 | return 0; |
1963 | } | |
1964 | ||
1965 | ax_skb->len = size; | |
1966 | ax_skb->data = packet; | |
1967 | skb_set_tail_pointer(ax_skb, size); | |
1968 | ||
78e47fe4 | 1969 | if (dev->net->features & NETIF_F_RXCSUM) |
2f7ca802 | 1970 | smsc95xx_rx_csum_offload(ax_skb); |
df18acca | 1971 | skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */ |
2f7ca802 SG |
1972 | ax_skb->truesize = size + sizeof(struct sk_buff); |
1973 | ||
1974 | usbnet_skb_return(dev, ax_skb); | |
1975 | } | |
1976 | ||
1977 | skb_pull(skb, size); | |
1978 | ||
1979 | /* padding bytes before the next frame starts */ | |
1980 | if (skb->len) | |
1981 | skb_pull(skb, align_count); | |
1982 | } | |
1983 | ||
2f7ca802 SG |
1984 | return 1; |
1985 | } | |
1986 | ||
f7b29271 SG |
1987 | static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb) |
1988 | { | |
55508d60 MM |
1989 | u16 low_16 = (u16)skb_checksum_start_offset(skb); |
1990 | u16 high_16 = low_16 + skb->csum_offset; | |
f7b29271 SG |
1991 | return (high_16 << 16) | low_16; |
1992 | } | |
1993 | ||
2f7ca802 SG |
1994 | static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev, |
1995 | struct sk_buff *skb, gfp_t flags) | |
1996 | { | |
78e47fe4 | 1997 | bool csum = skb->ip_summed == CHECKSUM_PARTIAL; |
f7b29271 | 1998 | int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD; |
2f7ca802 SG |
1999 | u32 tx_cmd_a, tx_cmd_b; |
2000 | ||
f7b29271 SG |
2001 | /* We do not advertise SG, so skbs should be already linearized */ |
2002 | BUG_ON(skb_shinfo(skb)->nr_frags); | |
2003 | ||
2004 | if (skb_headroom(skb) < overhead) { | |
2f7ca802 | 2005 | struct sk_buff *skb2 = skb_copy_expand(skb, |
f7b29271 | 2006 | overhead, 0, flags); |
2f7ca802 SG |
2007 | dev_kfree_skb_any(skb); |
2008 | skb = skb2; | |
2009 | if (!skb) | |
2010 | return NULL; | |
2011 | } | |
2012 | ||
f7b29271 | 2013 | if (csum) { |
11bc3088 SG |
2014 | if (skb->len <= 45) { |
2015 | /* workaround - hardware tx checksum does not work | |
2016 | * properly with extremely small packets */ | |
55508d60 | 2017 | long csstart = skb_checksum_start_offset(skb); |
11bc3088 SG |
2018 | __wsum calc = csum_partial(skb->data + csstart, |
2019 | skb->len - csstart, 0); | |
2020 | *((__sum16 *)(skb->data + csstart | |
2021 | + skb->csum_offset)) = csum_fold(calc); | |
2022 | ||
2023 | csum = false; | |
2024 | } else { | |
2025 | u32 csum_preamble = smsc95xx_calc_csum_preamble(skb); | |
2026 | skb_push(skb, 4); | |
00acda68 | 2027 | cpu_to_le32s(&csum_preamble); |
11bc3088 SG |
2028 | memcpy(skb->data, &csum_preamble, 4); |
2029 | } | |
f7b29271 SG |
2030 | } |
2031 | ||
2f7ca802 SG |
2032 | skb_push(skb, 4); |
2033 | tx_cmd_b = (u32)(skb->len - 4); | |
f7b29271 SG |
2034 | if (csum) |
2035 | tx_cmd_b |= TX_CMD_B_CSUM_ENABLE; | |
2f7ca802 SG |
2036 | cpu_to_le32s(&tx_cmd_b); |
2037 | memcpy(skb->data, &tx_cmd_b, 4); | |
2038 | ||
2039 | skb_push(skb, 4); | |
2040 | tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ | | |
2041 | TX_CMD_A_LAST_SEG_; | |
2042 | cpu_to_le32s(&tx_cmd_a); | |
2043 | memcpy(skb->data, &tx_cmd_a, 4); | |
2044 | ||
2045 | return skb; | |
2046 | } | |
2047 | ||
b2d4b150 SG |
2048 | static int smsc95xx_manage_power(struct usbnet *dev, int on) |
2049 | { | |
2050 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
2051 | ||
2052 | dev->intf->needs_remote_wakeup = on; | |
2053 | ||
eb970ff0 | 2054 | if (pdata->features & FEATURE_REMOTE_WAKEUP) |
b2d4b150 SG |
2055 | return 0; |
2056 | ||
eb970ff0 ML |
2057 | /* this chip revision isn't capable of remote wakeup */ |
2058 | netdev_info(dev->net, "hardware isn't capable of remote wakeup\n"); | |
b2d4b150 SG |
2059 | |
2060 | if (on) | |
2061 | usb_autopm_get_interface_no_resume(dev->intf); | |
2062 | else | |
2063 | usb_autopm_put_interface(dev->intf); | |
2064 | ||
2065 | return 0; | |
2066 | } | |
2067 | ||
2f7ca802 SG |
2068 | static const struct driver_info smsc95xx_info = { |
2069 | .description = "smsc95xx USB 2.0 Ethernet", | |
2070 | .bind = smsc95xx_bind, | |
2071 | .unbind = smsc95xx_unbind, | |
2072 | .link_reset = smsc95xx_link_reset, | |
2073 | .reset = smsc95xx_reset, | |
2074 | .rx_fixup = smsc95xx_rx_fixup, | |
2075 | .tx_fixup = smsc95xx_tx_fixup, | |
2076 | .status = smsc95xx_status, | |
b2d4b150 | 2077 | .manage_power = smsc95xx_manage_power, |
07d69d42 | 2078 | .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR, |
2f7ca802 SG |
2079 | }; |
2080 | ||
2081 | static const struct usb_device_id products[] = { | |
2082 | { | |
2083 | /* SMSC9500 USB Ethernet Device */ | |
2084 | USB_DEVICE(0x0424, 0x9500), | |
2085 | .driver_info = (unsigned long) &smsc95xx_info, | |
2086 | }, | |
6f41d12b SG |
2087 | { |
2088 | /* SMSC9505 USB Ethernet Device */ | |
2089 | USB_DEVICE(0x0424, 0x9505), | |
2090 | .driver_info = (unsigned long) &smsc95xx_info, | |
2091 | }, | |
2092 | { | |
2093 | /* SMSC9500A USB Ethernet Device */ | |
2094 | USB_DEVICE(0x0424, 0x9E00), | |
2095 | .driver_info = (unsigned long) &smsc95xx_info, | |
2096 | }, | |
2097 | { | |
2098 | /* SMSC9505A USB Ethernet Device */ | |
2099 | USB_DEVICE(0x0424, 0x9E01), | |
2100 | .driver_info = (unsigned long) &smsc95xx_info, | |
2101 | }, | |
726474b8 SG |
2102 | { |
2103 | /* SMSC9512/9514 USB Hub & Ethernet Device */ | |
2104 | USB_DEVICE(0x0424, 0xec00), | |
2105 | .driver_info = (unsigned long) &smsc95xx_info, | |
2106 | }, | |
6f41d12b SG |
2107 | { |
2108 | /* SMSC9500 USB Ethernet Device (SAL10) */ | |
2109 | USB_DEVICE(0x0424, 0x9900), | |
2110 | .driver_info = (unsigned long) &smsc95xx_info, | |
2111 | }, | |
2112 | { | |
2113 | /* SMSC9505 USB Ethernet Device (SAL10) */ | |
2114 | USB_DEVICE(0x0424, 0x9901), | |
2115 | .driver_info = (unsigned long) &smsc95xx_info, | |
2116 | }, | |
2117 | { | |
2118 | /* SMSC9500A USB Ethernet Device (SAL10) */ | |
2119 | USB_DEVICE(0x0424, 0x9902), | |
2120 | .driver_info = (unsigned long) &smsc95xx_info, | |
2121 | }, | |
2122 | { | |
2123 | /* SMSC9505A USB Ethernet Device (SAL10) */ | |
2124 | USB_DEVICE(0x0424, 0x9903), | |
2125 | .driver_info = (unsigned long) &smsc95xx_info, | |
2126 | }, | |
2127 | { | |
2128 | /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */ | |
2129 | USB_DEVICE(0x0424, 0x9904), | |
2130 | .driver_info = (unsigned long) &smsc95xx_info, | |
2131 | }, | |
2132 | { | |
2133 | /* SMSC9500A USB Ethernet Device (HAL) */ | |
2134 | USB_DEVICE(0x0424, 0x9905), | |
2135 | .driver_info = (unsigned long) &smsc95xx_info, | |
2136 | }, | |
2137 | { | |
2138 | /* SMSC9505A USB Ethernet Device (HAL) */ | |
2139 | USB_DEVICE(0x0424, 0x9906), | |
2140 | .driver_info = (unsigned long) &smsc95xx_info, | |
2141 | }, | |
2142 | { | |
2143 | /* SMSC9500 USB Ethernet Device (Alternate ID) */ | |
2144 | USB_DEVICE(0x0424, 0x9907), | |
2145 | .driver_info = (unsigned long) &smsc95xx_info, | |
2146 | }, | |
2147 | { | |
2148 | /* SMSC9500A USB Ethernet Device (Alternate ID) */ | |
2149 | USB_DEVICE(0x0424, 0x9908), | |
2150 | .driver_info = (unsigned long) &smsc95xx_info, | |
2151 | }, | |
2152 | { | |
2153 | /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */ | |
2154 | USB_DEVICE(0x0424, 0x9909), | |
2155 | .driver_info = (unsigned long) &smsc95xx_info, | |
2156 | }, | |
88edaa41 SG |
2157 | { |
2158 | /* SMSC LAN9530 USB Ethernet Device */ | |
2159 | USB_DEVICE(0x0424, 0x9530), | |
2160 | .driver_info = (unsigned long) &smsc95xx_info, | |
2161 | }, | |
2162 | { | |
2163 | /* SMSC LAN9730 USB Ethernet Device */ | |
2164 | USB_DEVICE(0x0424, 0x9730), | |
2165 | .driver_info = (unsigned long) &smsc95xx_info, | |
2166 | }, | |
2167 | { | |
2168 | /* SMSC LAN89530 USB Ethernet Device */ | |
2169 | USB_DEVICE(0x0424, 0x9E08), | |
2170 | .driver_info = (unsigned long) &smsc95xx_info, | |
2171 | }, | |
2f7ca802 SG |
2172 | { }, /* END */ |
2173 | }; | |
2174 | MODULE_DEVICE_TABLE(usb, products); | |
2175 | ||
2176 | static struct usb_driver smsc95xx_driver = { | |
2177 | .name = "smsc95xx", | |
2178 | .id_table = products, | |
2179 | .probe = usbnet_probe, | |
b5a04475 | 2180 | .suspend = smsc95xx_suspend, |
e0e474a8 | 2181 | .resume = smsc95xx_resume, |
b4df480f | 2182 | .reset_resume = smsc95xx_reset_resume, |
2f7ca802 | 2183 | .disconnect = usbnet_disconnect, |
e1f12eb6 | 2184 | .disable_hub_initiated_lpm = 1, |
b2d4b150 | 2185 | .supports_autosuspend = 1, |
2f7ca802 SG |
2186 | }; |
2187 | ||
d632eb1b | 2188 | module_usb_driver(smsc95xx_driver); |
2f7ca802 SG |
2189 | |
2190 | MODULE_AUTHOR("Nancy Lin"); | |
90b24cfb | 2191 | MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>"); |
2f7ca802 SG |
2192 | MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices"); |
2193 | MODULE_LICENSE("GPL"); |