]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/net/usb/smsc95xx.c
UBUNTU: Ubuntu-4.13.0-45.50
[mirror_ubuntu-artful-kernel.git] / drivers / net / usb / smsc95xx.c
CommitLineData
2f7ca802
SG
1 /***************************************************************************
2 *
3 * Copyright (C) 2007-2008 SMSC
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
9cb00073 16 * along with this program; if not, see <http://www.gnu.org/licenses/>.
2f7ca802
SG
17 *
18 *****************************************************************************/
19
20#include <linux/module.h>
21#include <linux/kmod.h>
2f7ca802
SG
22#include <linux/netdevice.h>
23#include <linux/etherdevice.h>
24#include <linux/ethtool.h>
25#include <linux/mii.h>
26#include <linux/usb.h>
bbd9f9ee
SG
27#include <linux/bitrev.h>
28#include <linux/crc16.h>
2f7ca802
SG
29#include <linux/crc32.h>
30#include <linux/usb/usbnet.h>
5a0e3ad6 31#include <linux/slab.h>
c489565b 32#include <linux/of_net.h>
2f7ca802
SG
33#include "smsc95xx.h"
34
35#define SMSC_CHIPNAME "smsc95xx"
53a759c8 36#define SMSC_DRIVER_VERSION "1.0.6"
2f7ca802
SG
37#define HS_USB_PKT_SIZE (512)
38#define FS_USB_PKT_SIZE (64)
39#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
40#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
41#define DEFAULT_BULK_IN_DELAY (0x00002000)
42#define MAX_SINGLE_PACKET_SIZE (2048)
43#define LAN95XX_EEPROM_MAGIC (0x9500)
44#define EEPROM_MAC_OFFSET (0x01)
f7b29271 45#define DEFAULT_TX_CSUM_ENABLE (true)
2f7ca802
SG
46#define DEFAULT_RX_CSUM_ENABLE (true)
47#define SMSC95XX_INTERNAL_PHY_ID (1)
48#define SMSC95XX_TX_OVERHEAD (8)
f7b29271 49#define SMSC95XX_TX_OVERHEAD_CSUM (12)
e5e3af83 50#define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \
bbd9f9ee 51 WAKE_MCAST | WAKE_ARP | WAKE_MAGIC)
2f7ca802 52
9ebca507
SG
53#define FEATURE_8_WAKEUP_FILTERS (0x01)
54#define FEATURE_PHY_NLP_CROSSOVER (0x02)
eb970ff0 55#define FEATURE_REMOTE_WAKEUP (0x04)
9ebca507 56
b2d4b150
SG
57#define SUSPEND_SUSPEND0 (0x01)
58#define SUSPEND_SUSPEND1 (0x02)
59#define SUSPEND_SUSPEND2 (0x04)
60#define SUSPEND_SUSPEND3 (0x08)
61#define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \
62 SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3)
63
d69d1694
CF
64#define CARRIER_CHECK_DELAY (2 * HZ)
65
2f7ca802 66struct smsc95xx_priv {
13722bbe 67 u32 chip_id;
2f7ca802 68 u32 mac_cr;
3c0f3c60
MZ
69 u32 hash_hi;
70 u32 hash_lo;
e0e474a8 71 u32 wolopts;
2f7ca802 72 spinlock_t mac_cr_lock;
9ebca507 73 u8 features;
b2d4b150 74 u8 suspend_flags;
13722bbe 75 u8 mdix_ctrl;
d69d1694
CF
76 bool link_ok;
77 struct delayed_work carrier_check;
78 struct usbnet *dev;
2f7ca802
SG
79};
80
eb939922 81static bool turbo_mode = true;
2f7ca802
SG
82module_param(turbo_mode, bool, 0644);
83MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
84
ec32115d
ML
85static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index,
86 u32 *data, int in_pm)
2f7ca802 87{
72108fd2 88 u32 buf;
2f7ca802 89 int ret;
ec32115d 90 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
2f7ca802
SG
91
92 BUG_ON(!dev);
93
ec32115d
ML
94 if (!in_pm)
95 fn = usbnet_read_cmd;
96 else
97 fn = usbnet_read_cmd_nopm;
98
99 ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN
100 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
101 0, index, &buf, 4);
5a36b68b 102 if (unlikely(ret < 0)) {
1e1d7412
JP
103 netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n",
104 index, ret);
5a36b68b
DC
105 return ret;
106 }
2f7ca802 107
72108fd2
ML
108 le32_to_cpus(&buf);
109 *data = buf;
2f7ca802
SG
110
111 return ret;
112}
113
ec32115d
ML
114static int __must_check __smsc95xx_write_reg(struct usbnet *dev, u32 index,
115 u32 data, int in_pm)
2f7ca802 116{
72108fd2 117 u32 buf;
2f7ca802 118 int ret;
ec32115d 119 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
2f7ca802
SG
120
121 BUG_ON(!dev);
122
ec32115d
ML
123 if (!in_pm)
124 fn = usbnet_write_cmd;
125 else
126 fn = usbnet_write_cmd_nopm;
127
72108fd2
ML
128 buf = data;
129 cpu_to_le32s(&buf);
2f7ca802 130
ec32115d
ML
131 ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT
132 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
133 0, index, &buf, 4);
2f7ca802 134 if (unlikely(ret < 0))
1e1d7412
JP
135 netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n",
136 index, ret);
2f7ca802 137
2f7ca802
SG
138 return ret;
139}
140
ec32115d
ML
141static int __must_check smsc95xx_read_reg_nopm(struct usbnet *dev, u32 index,
142 u32 *data)
143{
144 return __smsc95xx_read_reg(dev, index, data, 1);
145}
146
147static int __must_check smsc95xx_write_reg_nopm(struct usbnet *dev, u32 index,
148 u32 data)
149{
150 return __smsc95xx_write_reg(dev, index, data, 1);
151}
152
153static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index,
154 u32 *data)
155{
156 return __smsc95xx_read_reg(dev, index, data, 0);
157}
158
159static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index,
160 u32 data)
161{
162 return __smsc95xx_write_reg(dev, index, data, 0);
163}
e0e474a8 164
2f7ca802
SG
165/* Loop until the read is completed with timeout
166 * called with phy_mutex held */
e5e3af83
SG
167static int __must_check __smsc95xx_phy_wait_not_busy(struct usbnet *dev,
168 int in_pm)
2f7ca802
SG
169{
170 unsigned long start_time = jiffies;
171 u32 val;
769ea6d8 172 int ret;
2f7ca802
SG
173
174 do {
e5e3af83 175 ret = __smsc95xx_read_reg(dev, MII_ADDR, &val, in_pm);
b052e073
SG
176 if (ret < 0) {
177 netdev_warn(dev->net, "Error reading MII_ACCESS\n");
178 return ret;
179 }
180
2f7ca802
SG
181 if (!(val & MII_BUSY_))
182 return 0;
183 } while (!time_after(jiffies, start_time + HZ));
184
185 return -EIO;
186}
187
e5e3af83
SG
188static int __smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx,
189 int in_pm)
2f7ca802
SG
190{
191 struct usbnet *dev = netdev_priv(netdev);
192 u32 val, addr;
769ea6d8 193 int ret;
2f7ca802
SG
194
195 mutex_lock(&dev->phy_mutex);
196
197 /* confirm MII not busy */
e5e3af83 198 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
b052e073
SG
199 if (ret < 0) {
200 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n");
201 goto done;
202 }
2f7ca802
SG
203
204 /* set the address, index & direction (read from PHY) */
205 phy_id &= dev->mii.phy_id_mask;
206 idx &= dev->mii.reg_num_mask;
80928805 207 addr = (phy_id << 11) | (idx << 6) | MII_READ_ | MII_BUSY_;
e5e3af83 208 ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm);
b052e073
SG
209 if (ret < 0) {
210 netdev_warn(dev->net, "Error writing MII_ADDR\n");
211 goto done;
212 }
2f7ca802 213
e5e3af83 214 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
b052e073
SG
215 if (ret < 0) {
216 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx);
217 goto done;
218 }
2f7ca802 219
e5e3af83 220 ret = __smsc95xx_read_reg(dev, MII_DATA, &val, in_pm);
b052e073
SG
221 if (ret < 0) {
222 netdev_warn(dev->net, "Error reading MII_DATA\n");
223 goto done;
224 }
2f7ca802 225
769ea6d8 226 ret = (u16)(val & 0xFFFF);
2f7ca802 227
769ea6d8
SG
228done:
229 mutex_unlock(&dev->phy_mutex);
230 return ret;
2f7ca802
SG
231}
232
e5e3af83
SG
233static void __smsc95xx_mdio_write(struct net_device *netdev, int phy_id,
234 int idx, int regval, int in_pm)
2f7ca802
SG
235{
236 struct usbnet *dev = netdev_priv(netdev);
237 u32 val, addr;
769ea6d8 238 int ret;
2f7ca802
SG
239
240 mutex_lock(&dev->phy_mutex);
241
242 /* confirm MII not busy */
e5e3af83 243 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
b052e073
SG
244 if (ret < 0) {
245 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n");
246 goto done;
247 }
2f7ca802
SG
248
249 val = regval;
e5e3af83 250 ret = __smsc95xx_write_reg(dev, MII_DATA, val, in_pm);
b052e073
SG
251 if (ret < 0) {
252 netdev_warn(dev->net, "Error writing MII_DATA\n");
253 goto done;
254 }
2f7ca802
SG
255
256 /* set the address, index & direction (write to PHY) */
257 phy_id &= dev->mii.phy_id_mask;
258 idx &= dev->mii.reg_num_mask;
80928805 259 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_ | MII_BUSY_;
e5e3af83 260 ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm);
b052e073
SG
261 if (ret < 0) {
262 netdev_warn(dev->net, "Error writing MII_ADDR\n");
263 goto done;
264 }
2f7ca802 265
e5e3af83 266 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
b052e073
SG
267 if (ret < 0) {
268 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx);
269 goto done;
270 }
2f7ca802 271
769ea6d8 272done:
2f7ca802
SG
273 mutex_unlock(&dev->phy_mutex);
274}
275
e5e3af83
SG
276static int smsc95xx_mdio_read_nopm(struct net_device *netdev, int phy_id,
277 int idx)
278{
279 return __smsc95xx_mdio_read(netdev, phy_id, idx, 1);
280}
281
282static void smsc95xx_mdio_write_nopm(struct net_device *netdev, int phy_id,
283 int idx, int regval)
284{
285 __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 1);
286}
287
288static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
289{
290 return __smsc95xx_mdio_read(netdev, phy_id, idx, 0);
291}
292
293static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
294 int regval)
295{
296 __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 0);
297}
298
769ea6d8 299static int __must_check smsc95xx_wait_eeprom(struct usbnet *dev)
2f7ca802
SG
300{
301 unsigned long start_time = jiffies;
302 u32 val;
769ea6d8 303 int ret;
2f7ca802
SG
304
305 do {
769ea6d8 306 ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
b052e073
SG
307 if (ret < 0) {
308 netdev_warn(dev->net, "Error reading E2P_CMD\n");
309 return ret;
310 }
311
2f7ca802
SG
312 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
313 break;
314 udelay(40);
315 } while (!time_after(jiffies, start_time + HZ));
316
317 if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
60b86755 318 netdev_warn(dev->net, "EEPROM read operation timeout\n");
2f7ca802
SG
319 return -EIO;
320 }
321
322 return 0;
323}
324
769ea6d8 325static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
2f7ca802
SG
326{
327 unsigned long start_time = jiffies;
328 u32 val;
769ea6d8 329 int ret;
2f7ca802
SG
330
331 do {
769ea6d8 332 ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
b052e073
SG
333 if (ret < 0) {
334 netdev_warn(dev->net, "Error reading E2P_CMD\n");
335 return ret;
336 }
2f7ca802 337
2f7ca802
SG
338 if (!(val & E2P_CMD_BUSY_))
339 return 0;
340
341 udelay(40);
342 } while (!time_after(jiffies, start_time + HZ));
343
60b86755 344 netdev_warn(dev->net, "EEPROM is busy\n");
2f7ca802
SG
345 return -EIO;
346}
347
348static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
349 u8 *data)
350{
351 u32 val;
352 int i, ret;
353
354 BUG_ON(!dev);
355 BUG_ON(!data);
356
357 ret = smsc95xx_eeprom_confirm_not_busy(dev);
358 if (ret)
359 return ret;
360
361 for (i = 0; i < length; i++) {
362 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
769ea6d8 363 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
b052e073
SG
364 if (ret < 0) {
365 netdev_warn(dev->net, "Error writing E2P_CMD\n");
366 return ret;
367 }
2f7ca802
SG
368
369 ret = smsc95xx_wait_eeprom(dev);
370 if (ret < 0)
371 return ret;
372
769ea6d8 373 ret = smsc95xx_read_reg(dev, E2P_DATA, &val);
b052e073
SG
374 if (ret < 0) {
375 netdev_warn(dev->net, "Error reading E2P_DATA\n");
376 return ret;
377 }
2f7ca802
SG
378
379 data[i] = val & 0xFF;
380 offset++;
381 }
382
383 return 0;
384}
385
386static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
387 u8 *data)
388{
389 u32 val;
390 int i, ret;
391
392 BUG_ON(!dev);
393 BUG_ON(!data);
394
395 ret = smsc95xx_eeprom_confirm_not_busy(dev);
396 if (ret)
397 return ret;
398
399 /* Issue write/erase enable command */
400 val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
769ea6d8 401 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
b052e073
SG
402 if (ret < 0) {
403 netdev_warn(dev->net, "Error writing E2P_DATA\n");
404 return ret;
405 }
2f7ca802
SG
406
407 ret = smsc95xx_wait_eeprom(dev);
408 if (ret < 0)
409 return ret;
410
411 for (i = 0; i < length; i++) {
412
413 /* Fill data register */
414 val = data[i];
769ea6d8 415 ret = smsc95xx_write_reg(dev, E2P_DATA, val);
b052e073
SG
416 if (ret < 0) {
417 netdev_warn(dev->net, "Error writing E2P_DATA\n");
418 return ret;
419 }
2f7ca802
SG
420
421 /* Send "write" command */
422 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
769ea6d8 423 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
b052e073
SG
424 if (ret < 0) {
425 netdev_warn(dev->net, "Error writing E2P_CMD\n");
426 return ret;
427 }
2f7ca802
SG
428
429 ret = smsc95xx_wait_eeprom(dev);
430 if (ret < 0)
431 return ret;
432
433 offset++;
434 }
435
436 return 0;
437}
438
769ea6d8 439static int __must_check smsc95xx_write_reg_async(struct usbnet *dev, u16 index,
7b9e7580 440 u32 data)
2f7ca802 441{
1d74a6bd 442 const u16 size = 4;
7b9e7580 443 u32 buf;
72108fd2 444 int ret;
2f7ca802 445
7b9e7580
SG
446 buf = data;
447 cpu_to_le32s(&buf);
448
72108fd2
ML
449 ret = usbnet_write_cmd_async(dev, USB_VENDOR_REQUEST_WRITE_REGISTER,
450 USB_DIR_OUT | USB_TYPE_VENDOR |
451 USB_RECIP_DEVICE,
7b9e7580 452 0, index, &buf, size);
72108fd2
ML
453 if (ret < 0)
454 netdev_warn(dev->net, "Error write async cmd, sts=%d\n",
455 ret);
456 return ret;
2f7ca802
SG
457}
458
459/* returns hash bit number for given MAC address
460 * example:
461 * 01 00 5E 00 00 01 -> returns bit number 31 */
462static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
463{
464 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
465}
466
467static void smsc95xx_set_multicast(struct net_device *netdev)
468{
469 struct usbnet *dev = netdev_priv(netdev);
470 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
2f7ca802 471 unsigned long flags;
769ea6d8 472 int ret;
2f7ca802 473
3c0f3c60
MZ
474 pdata->hash_hi = 0;
475 pdata->hash_lo = 0;
476
2f7ca802
SG
477 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
478
479 if (dev->net->flags & IFF_PROMISC) {
a475f603 480 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n");
2f7ca802
SG
481 pdata->mac_cr |= MAC_CR_PRMS_;
482 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
483 } else if (dev->net->flags & IFF_ALLMULTI) {
a475f603 484 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n");
2f7ca802
SG
485 pdata->mac_cr |= MAC_CR_MCPAS_;
486 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
4cd24eaf 487 } else if (!netdev_mc_empty(dev->net)) {
22bedad3 488 struct netdev_hw_addr *ha;
2f7ca802
SG
489
490 pdata->mac_cr |= MAC_CR_HPFILT_;
491 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
492
22bedad3
JP
493 netdev_for_each_mc_addr(ha, netdev) {
494 u32 bitnum = smsc95xx_hash(ha->addr);
a92635dc
JP
495 u32 mask = 0x01 << (bitnum & 0x1F);
496 if (bitnum & 0x20)
3c0f3c60 497 pdata->hash_hi |= mask;
a92635dc 498 else
3c0f3c60 499 pdata->hash_lo |= mask;
2f7ca802
SG
500 }
501
a475f603 502 netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n",
3c0f3c60 503 pdata->hash_hi, pdata->hash_lo);
2f7ca802 504 } else {
a475f603 505 netif_dbg(dev, drv, dev->net, "receive own packets only\n");
2f7ca802
SG
506 pdata->mac_cr &=
507 ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
508 }
509
510 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
511
512 /* Initiate async writes, as we can't wait for completion here */
7b9e7580 513 ret = smsc95xx_write_reg_async(dev, HASHH, pdata->hash_hi);
b052e073
SG
514 if (ret < 0)
515 netdev_warn(dev->net, "failed to initiate async write to HASHH\n");
769ea6d8 516
7b9e7580 517 ret = smsc95xx_write_reg_async(dev, HASHL, pdata->hash_lo);
b052e073
SG
518 if (ret < 0)
519 netdev_warn(dev->net, "failed to initiate async write to HASHL\n");
769ea6d8 520
7b9e7580 521 ret = smsc95xx_write_reg_async(dev, MAC_CR, pdata->mac_cr);
b052e073
SG
522 if (ret < 0)
523 netdev_warn(dev->net, "failed to initiate async write to MAC_CR\n");
2f7ca802
SG
524}
525
769ea6d8
SG
526static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
527 u16 lcladv, u16 rmtadv)
2f7ca802
SG
528{
529 u32 flow, afc_cfg = 0;
530
531 int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
e360a8b4 532 if (ret < 0)
b052e073 533 return ret;
2f7ca802
SG
534
535 if (duplex == DUPLEX_FULL) {
bc02ff95 536 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
2f7ca802
SG
537
538 if (cap & FLOW_CTRL_RX)
539 flow = 0xFFFF0002;
540 else
541 flow = 0;
542
543 if (cap & FLOW_CTRL_TX)
544 afc_cfg |= 0xF;
545 else
546 afc_cfg &= ~0xF;
547
a475f603 548 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n",
60b86755
JP
549 cap & FLOW_CTRL_RX ? "enabled" : "disabled",
550 cap & FLOW_CTRL_TX ? "enabled" : "disabled");
2f7ca802 551 } else {
a475f603 552 netif_dbg(dev, link, dev->net, "half duplex\n");
2f7ca802
SG
553 flow = 0;
554 afc_cfg |= 0xF;
555 }
556
769ea6d8 557 ret = smsc95xx_write_reg(dev, FLOW, flow);
b052e073 558 if (ret < 0)
e360a8b4 559 return ret;
769ea6d8 560
e360a8b4 561 return smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
2f7ca802
SG
562}
563
564static int smsc95xx_link_reset(struct usbnet *dev)
565{
566 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
567 struct mii_if_info *mii = &dev->mii;
8ae6daca 568 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
2f7ca802
SG
569 unsigned long flags;
570 u16 lcladv, rmtadv;
769ea6d8 571 int ret;
2f7ca802
SG
572
573 /* clear interrupt status */
769ea6d8 574 ret = smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
e360a8b4 575 if (ret < 0)
b052e073 576 return ret;
769ea6d8
SG
577
578 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
e360a8b4 579 if (ret < 0)
b052e073 580 return ret;
2f7ca802
SG
581
582 mii_check_media(mii, 1, 1);
583 mii_ethtool_gset(&dev->mii, &ecmd);
584 lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
585 rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
586
8ae6daca
DD
587 netif_dbg(dev, link, dev->net,
588 "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n",
589 ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv);
2f7ca802
SG
590
591 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
592 if (ecmd.duplex != DUPLEX_FULL) {
593 pdata->mac_cr &= ~MAC_CR_FDPX_;
594 pdata->mac_cr |= MAC_CR_RCVOWN_;
595 } else {
596 pdata->mac_cr &= ~MAC_CR_RCVOWN_;
597 pdata->mac_cr |= MAC_CR_FDPX_;
598 }
599 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
600
769ea6d8 601 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
e360a8b4 602 if (ret < 0)
b052e073 603 return ret;
2f7ca802 604
769ea6d8 605 ret = smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
b052e073
SG
606 if (ret < 0)
607 netdev_warn(dev->net, "Error updating PHY flow control\n");
2f7ca802 608
b052e073 609 return ret;
2f7ca802
SG
610}
611
612static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
613{
614 u32 intdata;
615
616 if (urb->actual_length != 4) {
60b86755
JP
617 netdev_warn(dev->net, "unexpected urb length %d\n",
618 urb->actual_length);
2f7ca802
SG
619 return;
620 }
621
622 memcpy(&intdata, urb->transfer_buffer, 4);
1d74a6bd 623 le32_to_cpus(&intdata);
2f7ca802 624
a475f603 625 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata);
2f7ca802
SG
626
627 if (intdata & INT_ENP_PHY_INT_)
628 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
629 else
60b86755
JP
630 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
631 intdata);
2f7ca802
SG
632}
633
d69d1694
CF
634static void set_carrier(struct usbnet *dev, bool link)
635{
636 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
637
638 if (pdata->link_ok == link)
639 return;
640
641 pdata->link_ok = link;
642
643 if (link)
644 usbnet_link_change(dev, 1, 0);
645 else
646 usbnet_link_change(dev, 0, 0);
647}
648
649static void check_carrier(struct work_struct *work)
650{
651 struct smsc95xx_priv *pdata = container_of(work, struct smsc95xx_priv,
652 carrier_check.work);
653 struct usbnet *dev = pdata->dev;
654 int ret;
655
656 if (pdata->suspend_flags != 0)
657 return;
658
659 ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMSR);
660 if (ret < 0) {
661 netdev_warn(dev->net, "Failed to read MII_BMSR\n");
662 return;
663 }
664 if (ret & BMSR_LSTATUS)
665 set_carrier(dev, 1);
666 else
667 set_carrier(dev, 0);
668
669 schedule_delayed_work(&pdata->carrier_check, CARRIER_CHECK_DELAY);
670}
671
f7b29271 672/* Enable or disable Tx & Rx checksum offload engines */
c8f44aff
MM
673static int smsc95xx_set_features(struct net_device *netdev,
674 netdev_features_t features)
2f7ca802 675{
78e47fe4 676 struct usbnet *dev = netdev_priv(netdev);
2f7ca802 677 u32 read_buf;
78e47fe4
MM
678 int ret;
679
680 ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
e360a8b4 681 if (ret < 0)
b052e073 682 return ret;
2f7ca802 683
fe0cd8ca 684 if (features & NETIF_F_IP_CSUM)
f7b29271
SG
685 read_buf |= Tx_COE_EN_;
686 else
687 read_buf &= ~Tx_COE_EN_;
688
78e47fe4 689 if (features & NETIF_F_RXCSUM)
2f7ca802
SG
690 read_buf |= Rx_COE_EN_;
691 else
692 read_buf &= ~Rx_COE_EN_;
693
694 ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
e360a8b4 695 if (ret < 0)
b052e073 696 return ret;
2f7ca802 697
a475f603 698 netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);
2f7ca802
SG
699 return 0;
700}
701
702static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
703{
704 return MAX_EEPROM_SIZE;
705}
706
707static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
708 struct ethtool_eeprom *ee, u8 *data)
709{
710 struct usbnet *dev = netdev_priv(netdev);
711
712 ee->magic = LAN95XX_EEPROM_MAGIC;
713
714 return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
715}
716
717static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
718 struct ethtool_eeprom *ee, u8 *data)
719{
720 struct usbnet *dev = netdev_priv(netdev);
721
722 if (ee->magic != LAN95XX_EEPROM_MAGIC) {
60b86755
JP
723 netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n",
724 ee->magic);
2f7ca802
SG
725 return -EINVAL;
726 }
727
728 return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
729}
730
9fa32e94
EV
731static int smsc95xx_ethtool_getregslen(struct net_device *netdev)
732{
733 /* all smsc95xx registers */
96245317 734 return COE_CR - ID_REV + sizeof(u32);
9fa32e94
EV
735}
736
737static void
738smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs,
739 void *buf)
740{
741 struct usbnet *dev = netdev_priv(netdev);
d348446b
DC
742 unsigned int i, j;
743 int retval;
9fa32e94
EV
744 u32 *data = buf;
745
746 retval = smsc95xx_read_reg(dev, ID_REV, &regs->version);
747 if (retval < 0) {
748 netdev_warn(netdev, "REGS: cannot read ID_REV\n");
749 return;
750 }
751
752 for (i = ID_REV, j = 0; i <= COE_CR; i += (sizeof(u32)), j++) {
753 retval = smsc95xx_read_reg(dev, i, &data[j]);
754 if (retval < 0) {
755 netdev_warn(netdev, "REGS: cannot read reg[%x]\n", i);
756 return;
757 }
758 }
759}
760
e0e474a8
SG
761static void smsc95xx_ethtool_get_wol(struct net_device *net,
762 struct ethtool_wolinfo *wolinfo)
763{
764 struct usbnet *dev = netdev_priv(net);
765 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
766
767 wolinfo->supported = SUPPORTED_WAKE;
768 wolinfo->wolopts = pdata->wolopts;
769}
770
771static int smsc95xx_ethtool_set_wol(struct net_device *net,
772 struct ethtool_wolinfo *wolinfo)
773{
774 struct usbnet *dev = netdev_priv(net);
775 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
3b14692c 776 int ret;
e0e474a8
SG
777
778 pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE;
3b14692c
SG
779
780 ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts);
b052e073
SG
781 if (ret < 0)
782 netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret);
3b14692c 783
b052e073 784 return ret;
e0e474a8
SG
785}
786
13722bbe
WH
787static int get_mdix_status(struct net_device *net)
788{
789 struct usbnet *dev = netdev_priv(net);
790 u32 val;
791 int buf;
792
793 buf = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, SPECIAL_CTRL_STS);
794 if (buf & SPECIAL_CTRL_STS_OVRRD_AMDIX_) {
795 if (buf & SPECIAL_CTRL_STS_AMDIX_ENABLE_)
796 return ETH_TP_MDI_AUTO;
797 else if (buf & SPECIAL_CTRL_STS_AMDIX_STATE_)
798 return ETH_TP_MDI_X;
799 } else {
800 buf = smsc95xx_read_reg(dev, STRAP_STATUS, &val);
801 if (val & STRAP_STATUS_AMDIX_EN_)
802 return ETH_TP_MDI_AUTO;
803 }
804
805 return ETH_TP_MDI;
806}
807
808static void set_mdix_status(struct net_device *net, __u8 mdix_ctrl)
809{
810 struct usbnet *dev = netdev_priv(net);
811 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
812 int buf;
813
814 if ((pdata->chip_id == ID_REV_CHIP_ID_9500A_) ||
815 (pdata->chip_id == ID_REV_CHIP_ID_9530_) ||
816 (pdata->chip_id == ID_REV_CHIP_ID_89530_) ||
817 (pdata->chip_id == ID_REV_CHIP_ID_9730_)) {
818 /* Extend Manual AutoMDIX timer for 9500A/9500Ai */
819 buf = smsc95xx_mdio_read(dev->net, dev->mii.phy_id,
820 PHY_EDPD_CONFIG);
821 buf |= PHY_EDPD_CONFIG_EXT_CROSSOVER_;
822 smsc95xx_mdio_write(dev->net, dev->mii.phy_id,
823 PHY_EDPD_CONFIG, buf);
824 }
825
826 if (mdix_ctrl == ETH_TP_MDI) {
827 buf = smsc95xx_mdio_read(dev->net, dev->mii.phy_id,
828 SPECIAL_CTRL_STS);
829 buf |= SPECIAL_CTRL_STS_OVRRD_AMDIX_;
830 buf &= ~(SPECIAL_CTRL_STS_AMDIX_ENABLE_ |
831 SPECIAL_CTRL_STS_AMDIX_STATE_);
832 smsc95xx_mdio_write(dev->net, dev->mii.phy_id,
833 SPECIAL_CTRL_STS, buf);
834 } else if (mdix_ctrl == ETH_TP_MDI_X) {
835 buf = smsc95xx_mdio_read(dev->net, dev->mii.phy_id,
836 SPECIAL_CTRL_STS);
837 buf |= SPECIAL_CTRL_STS_OVRRD_AMDIX_;
838 buf &= ~(SPECIAL_CTRL_STS_AMDIX_ENABLE_ |
839 SPECIAL_CTRL_STS_AMDIX_STATE_);
840 buf |= SPECIAL_CTRL_STS_AMDIX_STATE_;
841 smsc95xx_mdio_write(dev->net, dev->mii.phy_id,
842 SPECIAL_CTRL_STS, buf);
843 } else if (mdix_ctrl == ETH_TP_MDI_AUTO) {
844 buf = smsc95xx_mdio_read(dev->net, dev->mii.phy_id,
845 SPECIAL_CTRL_STS);
846 buf &= ~SPECIAL_CTRL_STS_OVRRD_AMDIX_;
847 buf &= ~(SPECIAL_CTRL_STS_AMDIX_ENABLE_ |
848 SPECIAL_CTRL_STS_AMDIX_STATE_);
849 buf |= SPECIAL_CTRL_STS_AMDIX_ENABLE_;
850 smsc95xx_mdio_write(dev->net, dev->mii.phy_id,
851 SPECIAL_CTRL_STS, buf);
852 }
853 pdata->mdix_ctrl = mdix_ctrl;
854}
855
eaf9a32a
PR
856static int smsc95xx_get_link_ksettings(struct net_device *net,
857 struct ethtool_link_ksettings *cmd)
13722bbe
WH
858{
859 struct usbnet *dev = netdev_priv(net);
860 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
861 int retval;
862
eaf9a32a 863 retval = usbnet_get_link_ksettings(net, cmd);
13722bbe 864
eaf9a32a
PR
865 cmd->base.eth_tp_mdix = pdata->mdix_ctrl;
866 cmd->base.eth_tp_mdix_ctrl = pdata->mdix_ctrl;
13722bbe
WH
867
868 return retval;
869}
870
eaf9a32a
PR
871static int smsc95xx_set_link_ksettings(struct net_device *net,
872 const struct ethtool_link_ksettings *cmd)
13722bbe
WH
873{
874 struct usbnet *dev = netdev_priv(net);
875 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
876 int retval;
877
eaf9a32a
PR
878 if (pdata->mdix_ctrl != cmd->base.eth_tp_mdix_ctrl)
879 set_mdix_status(net, cmd->base.eth_tp_mdix_ctrl);
13722bbe 880
eaf9a32a 881 retval = usbnet_set_link_ksettings(net, cmd);
13722bbe
WH
882
883 return retval;
884}
885
0fc0b732 886static const struct ethtool_ops smsc95xx_ethtool_ops = {
2f7ca802
SG
887 .get_link = usbnet_get_link,
888 .nway_reset = usbnet_nway_reset,
889 .get_drvinfo = usbnet_get_drvinfo,
890 .get_msglevel = usbnet_get_msglevel,
891 .set_msglevel = usbnet_set_msglevel,
2f7ca802
SG
892 .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len,
893 .get_eeprom = smsc95xx_ethtool_get_eeprom,
894 .set_eeprom = smsc95xx_ethtool_set_eeprom,
9fa32e94
EV
895 .get_regs_len = smsc95xx_ethtool_getregslen,
896 .get_regs = smsc95xx_ethtool_getregs,
e0e474a8
SG
897 .get_wol = smsc95xx_ethtool_get_wol,
898 .set_wol = smsc95xx_ethtool_set_wol,
eaf9a32a
PR
899 .get_link_ksettings = smsc95xx_get_link_ksettings,
900 .set_link_ksettings = smsc95xx_set_link_ksettings,
a8f5cb9e 901 .get_ts_info = ethtool_op_get_ts_info,
2f7ca802
SG
902};
903
904static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
905{
906 struct usbnet *dev = netdev_priv(netdev);
907
908 if (!netif_running(netdev))
909 return -EINVAL;
910
911 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
912}
913
914static void smsc95xx_init_mac_address(struct usbnet *dev)
915{
c489565b
AB
916 const u8 *mac_addr;
917
918 /* maybe the boot loader passed the MAC address in devicetree */
919 mac_addr = of_get_mac_address(dev->udev->dev.of_node);
920 if (mac_addr) {
921 memcpy(dev->net->dev_addr, mac_addr, ETH_ALEN);
922 return;
923 }
924
2f7ca802
SG
925 /* try reading mac address from EEPROM */
926 if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
927 dev->net->dev_addr) == 0) {
928 if (is_valid_ether_addr(dev->net->dev_addr)) {
929 /* eeprom values are valid so use them */
a475f603 930 netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n");
2f7ca802
SG
931 return;
932 }
933 }
934
c489565b 935 /* no useful static MAC address found. generate a random one */
f2cedb63 936 eth_hw_addr_random(dev->net);
c7e12ead 937 netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
2f7ca802
SG
938}
939
940static int smsc95xx_set_mac_address(struct usbnet *dev)
941{
942 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
943 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
944 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
945 int ret;
946
947 ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
b052e073 948 if (ret < 0)
e360a8b4 949 return ret;
2f7ca802 950
e360a8b4 951 return smsc95xx_write_reg(dev, ADDRH, addr_hi);
2f7ca802
SG
952}
953
954/* starts the TX path */
769ea6d8 955static int smsc95xx_start_tx_path(struct usbnet *dev)
2f7ca802
SG
956{
957 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
958 unsigned long flags;
769ea6d8 959 int ret;
2f7ca802
SG
960
961 /* Enable Tx at MAC */
962 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
963 pdata->mac_cr |= MAC_CR_TXEN_;
964 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
965
769ea6d8 966 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
e360a8b4 967 if (ret < 0)
b052e073 968 return ret;
2f7ca802
SG
969
970 /* Enable Tx at SCSRs */
e360a8b4 971 return smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_);
2f7ca802
SG
972}
973
974/* Starts the Receive path */
ec32115d 975static int smsc95xx_start_rx_path(struct usbnet *dev, int in_pm)
2f7ca802
SG
976{
977 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
978 unsigned long flags;
979
980 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
981 pdata->mac_cr |= MAC_CR_RXEN_;
982 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
983
e360a8b4 984 return __smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr, in_pm);
2f7ca802
SG
985}
986
987static int smsc95xx_phy_initialize(struct usbnet *dev)
988{
769ea6d8 989 int bmcr, ret, timeout = 0;
db443c44 990
2f7ca802
SG
991 /* Initialize MII structure */
992 dev->mii.dev = dev->net;
993 dev->mii.mdio_read = smsc95xx_mdio_read;
994 dev->mii.mdio_write = smsc95xx_mdio_write;
995 dev->mii.phy_id_mask = 0x1f;
996 dev->mii.reg_num_mask = 0x1f;
997 dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
998
db443c44 999 /* reset phy and wait for reset to complete */
2f7ca802 1000 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
db443c44
SG
1001
1002 do {
1003 msleep(10);
1004 bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
1005 timeout++;
d9460920 1006 } while ((bmcr & BMCR_RESET) && (timeout < 100));
db443c44
SG
1007
1008 if (timeout >= 100) {
1009 netdev_warn(dev->net, "timeout on PHY Reset");
1010 return -EIO;
1011 }
1012
2f7ca802
SG
1013 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1014 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
1015 ADVERTISE_PAUSE_ASYM);
1016
1017 /* read to clear */
769ea6d8 1018 ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
b052e073
SG
1019 if (ret < 0) {
1020 netdev_warn(dev->net, "Failed to read PHY_INT_SRC during init\n");
1021 return ret;
1022 }
2f7ca802
SG
1023
1024 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
1025 PHY_INT_MASK_DEFAULT_);
1026 mii_nway_restart(&dev->mii);
1027
a475f603 1028 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n");
2f7ca802
SG
1029 return 0;
1030}
1031
1032static int smsc95xx_reset(struct usbnet *dev)
1033{
1034 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1035 u32 read_buf, write_buf, burst_cap;
1036 int ret = 0, timeout;
2f7ca802 1037
a475f603 1038 netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n");
2f7ca802 1039
4436761b 1040 ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_);
e360a8b4 1041 if (ret < 0)
b052e073 1042 return ret;
2f7ca802
SG
1043
1044 timeout = 0;
1045 do {
cf2acec2 1046 msleep(10);
2f7ca802 1047 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
e360a8b4 1048 if (ret < 0)
b052e073 1049 return ret;
2f7ca802
SG
1050 timeout++;
1051 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
1052
1053 if (timeout >= 100) {
60b86755 1054 netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n");
2f7ca802
SG
1055 return ret;
1056 }
1057
4436761b 1058 ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_);
e360a8b4 1059 if (ret < 0)
b052e073 1060 return ret;
2f7ca802
SG
1061
1062 timeout = 0;
1063 do {
cf2acec2 1064 msleep(10);
2f7ca802 1065 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
e360a8b4 1066 if (ret < 0)
b052e073 1067 return ret;
2f7ca802
SG
1068 timeout++;
1069 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
1070
1071 if (timeout >= 100) {
60b86755 1072 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
2f7ca802
SG
1073 return ret;
1074 }
1075
2f7ca802
SG
1076 ret = smsc95xx_set_mac_address(dev);
1077 if (ret < 0)
1078 return ret;
1079
1e1d7412
JP
1080 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n",
1081 dev->net->dev_addr);
2f7ca802
SG
1082
1083 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
e360a8b4 1084 if (ret < 0)
b052e073 1085 return ret;
2f7ca802 1086
1e1d7412
JP
1087 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n",
1088 read_buf);
2f7ca802
SG
1089
1090 read_buf |= HW_CFG_BIR_;
1091
1092 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
e360a8b4 1093 if (ret < 0)
b052e073 1094 return ret;
2f7ca802
SG
1095
1096 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
e360a8b4 1097 if (ret < 0)
b052e073 1098 return ret;
b052e073 1099
a475f603
JP
1100 netif_dbg(dev, ifup, dev->net,
1101 "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n",
1102 read_buf);
2f7ca802
SG
1103
1104 if (!turbo_mode) {
1105 burst_cap = 0;
1106 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
1107 } else if (dev->udev->speed == USB_SPEED_HIGH) {
1108 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
1109 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
1110 } else {
1111 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
1112 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
1113 }
1114
1e1d7412
JP
1115 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n",
1116 (ulong)dev->rx_urb_size);
2f7ca802
SG
1117
1118 ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
e360a8b4 1119 if (ret < 0)
b052e073 1120 return ret;
2f7ca802
SG
1121
1122 ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
e360a8b4 1123 if (ret < 0)
b052e073 1124 return ret;
769ea6d8 1125
a475f603
JP
1126 netif_dbg(dev, ifup, dev->net,
1127 "Read Value from BURST_CAP after writing: 0x%08x\n",
1128 read_buf);
2f7ca802 1129
4436761b 1130 ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
e360a8b4 1131 if (ret < 0)
b052e073 1132 return ret;
2f7ca802
SG
1133
1134 ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
e360a8b4 1135 if (ret < 0)
b052e073 1136 return ret;
769ea6d8 1137
a475f603
JP
1138 netif_dbg(dev, ifup, dev->net,
1139 "Read Value from BULK_IN_DLY after writing: 0x%08x\n",
1140 read_buf);
2f7ca802
SG
1141
1142 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
e360a8b4 1143 if (ret < 0)
b052e073 1144 return ret;
769ea6d8 1145
1e1d7412
JP
1146 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG: 0x%08x\n",
1147 read_buf);
2f7ca802
SG
1148
1149 if (turbo_mode)
1150 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
1151
1152 read_buf &= ~HW_CFG_RXDOFF_;
1153
1154 /* set Rx data offset=2, Make IP header aligns on word boundary. */
1155 read_buf |= NET_IP_ALIGN << 9;
1156
1157 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
e360a8b4 1158 if (ret < 0)
b052e073 1159 return ret;
2f7ca802
SG
1160
1161 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
e360a8b4 1162 if (ret < 0)
b052e073 1163 return ret;
769ea6d8 1164
a475f603
JP
1165 netif_dbg(dev, ifup, dev->net,
1166 "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
2f7ca802 1167
4436761b 1168 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
e360a8b4 1169 if (ret < 0)
b052e073 1170 return ret;
2f7ca802
SG
1171
1172 ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
e360a8b4 1173 if (ret < 0)
b052e073 1174 return ret;
a475f603 1175 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);
2f7ca802 1176
f293501c
SG
1177 /* Configure GPIO pins as LED outputs */
1178 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
1179 LED_GPIO_CFG_FDX_LED;
1180 ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
e360a8b4 1181 if (ret < 0)
b052e073 1182 return ret;
f293501c 1183
2f7ca802 1184 /* Init Tx */
4436761b 1185 ret = smsc95xx_write_reg(dev, FLOW, 0);
e360a8b4 1186 if (ret < 0)
b052e073 1187 return ret;
2f7ca802 1188
4436761b 1189 ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT);
e360a8b4 1190 if (ret < 0)
b052e073 1191 return ret;
2f7ca802
SG
1192
1193 /* Don't need mac_cr_lock during initialisation */
1194 ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
e360a8b4 1195 if (ret < 0)
b052e073 1196 return ret;
2f7ca802
SG
1197
1198 /* Init Rx */
1199 /* Set Vlan */
4436761b 1200 ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q);
e360a8b4 1201 if (ret < 0)
b052e073 1202 return ret;
2f7ca802 1203
f7b29271 1204 /* Enable or disable checksum offload engines */
769ea6d8 1205 ret = smsc95xx_set_features(dev->net, dev->net->features);
b052e073
SG
1206 if (ret < 0) {
1207 netdev_warn(dev->net, "Failed to set checksum offload features\n");
1208 return ret;
1209 }
2f7ca802
SG
1210
1211 smsc95xx_set_multicast(dev->net);
1212
769ea6d8 1213 ret = smsc95xx_phy_initialize(dev);
b052e073
SG
1214 if (ret < 0) {
1215 netdev_warn(dev->net, "Failed to init PHY\n");
1216 return ret;
1217 }
2f7ca802
SG
1218
1219 ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
e360a8b4 1220 if (ret < 0)
b052e073 1221 return ret;
2f7ca802
SG
1222
1223 /* enable PHY interrupts */
1224 read_buf |= INT_EP_CTL_PHY_INT_;
1225
1226 ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
e360a8b4 1227 if (ret < 0)
b052e073 1228 return ret;
2f7ca802 1229
769ea6d8 1230 ret = smsc95xx_start_tx_path(dev);
b052e073
SG
1231 if (ret < 0) {
1232 netdev_warn(dev->net, "Failed to start TX path\n");
1233 return ret;
1234 }
769ea6d8 1235
ec32115d 1236 ret = smsc95xx_start_rx_path(dev, 0);
b052e073
SG
1237 if (ret < 0) {
1238 netdev_warn(dev->net, "Failed to start RX path\n");
1239 return ret;
1240 }
2f7ca802 1241
a475f603 1242 netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n");
2f7ca802
SG
1243 return 0;
1244}
1245
63e77b39
SH
1246static const struct net_device_ops smsc95xx_netdev_ops = {
1247 .ndo_open = usbnet_open,
1248 .ndo_stop = usbnet_stop,
1249 .ndo_start_xmit = usbnet_start_xmit,
1250 .ndo_tx_timeout = usbnet_tx_timeout,
1251 .ndo_change_mtu = usbnet_change_mtu,
c8b5d129 1252 .ndo_get_stats64 = usbnet_get_stats64,
63e77b39
SH
1253 .ndo_set_mac_address = eth_mac_addr,
1254 .ndo_validate_addr = eth_validate_addr,
1255 .ndo_do_ioctl = smsc95xx_ioctl,
afc4b13d 1256 .ndo_set_rx_mode = smsc95xx_set_multicast,
78e47fe4 1257 .ndo_set_features = smsc95xx_set_features,
63e77b39
SH
1258};
1259
2f7ca802
SG
1260static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
1261{
1262 struct smsc95xx_priv *pdata = NULL;
bbd9f9ee 1263 u32 val;
2f7ca802
SG
1264 int ret;
1265
1266 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1267
1268 ret = usbnet_get_endpoints(dev, intf);
b052e073
SG
1269 if (ret < 0) {
1270 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret);
1271 return ret;
1272 }
2f7ca802
SG
1273
1274 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
38673c82 1275 GFP_KERNEL);
2f7ca802
SG
1276
1277 pdata = (struct smsc95xx_priv *)(dev->data[0]);
38673c82 1278 if (!pdata)
2f7ca802 1279 return -ENOMEM;
2f7ca802
SG
1280
1281 spin_lock_init(&pdata->mac_cr_lock);
1282
fe0cd8ca
NS
1283 /* LAN95xx devices do not alter the computed checksum of 0 to 0xffff.
1284 * RFC 2460, ipv6 UDP calculated checksum yields a result of zero must
1285 * be changed to 0xffff. RFC 768, ipv4 UDP computed checksum is zero,
1286 * it is transmitted as all ones. The zero transmitted checksum means
1287 * transmitter generated no checksum. Hence, enable csum offload only
1288 * for ipv4 packets.
1289 */
78e47fe4 1290 if (DEFAULT_TX_CSUM_ENABLE)
fe0cd8ca 1291 dev->net->features |= NETIF_F_IP_CSUM;
78e47fe4
MM
1292 if (DEFAULT_RX_CSUM_ENABLE)
1293 dev->net->features |= NETIF_F_RXCSUM;
1294
fe0cd8ca 1295 dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM;
2f7ca802 1296
f4e8ab7c
BB
1297 smsc95xx_init_mac_address(dev);
1298
2f7ca802
SG
1299 /* Init all registers */
1300 ret = smsc95xx_reset(dev);
1301
bbd9f9ee
SG
1302 /* detect device revision as different features may be available */
1303 ret = smsc95xx_read_reg(dev, ID_REV, &val);
e360a8b4 1304 if (ret < 0)
b052e073 1305 return ret;
bbd9f9ee 1306 val >>= 16;
13722bbe
WH
1307 pdata->chip_id = val;
1308 pdata->mdix_ctrl = get_mdix_status(dev->net);
9ebca507
SG
1309
1310 if ((val == ID_REV_CHIP_ID_9500A_) || (val == ID_REV_CHIP_ID_9530_) ||
1311 (val == ID_REV_CHIP_ID_89530_) || (val == ID_REV_CHIP_ID_9730_))
1312 pdata->features = (FEATURE_8_WAKEUP_FILTERS |
1313 FEATURE_PHY_NLP_CROSSOVER |
eb970ff0 1314 FEATURE_REMOTE_WAKEUP);
9ebca507
SG
1315 else if (val == ID_REV_CHIP_ID_9512_)
1316 pdata->features = FEATURE_8_WAKEUP_FILTERS;
bbd9f9ee 1317
63e77b39 1318 dev->net->netdev_ops = &smsc95xx_netdev_ops;
2f7ca802 1319 dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
2f7ca802 1320 dev->net->flags |= IFF_MULTICAST;
78e47fe4 1321 dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM;
9bbf5660 1322 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
d69d1694
CF
1323
1324 pdata->dev = dev;
1325 INIT_DELAYED_WORK(&pdata->carrier_check, check_carrier);
1326 schedule_delayed_work(&pdata->carrier_check, CARRIER_CHECK_DELAY);
1327
2f7ca802
SG
1328 return 0;
1329}
1330
1331static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1332{
1333 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
d69d1694 1334
2f7ca802 1335 if (pdata) {
d69d1694 1336 cancel_delayed_work(&pdata->carrier_check);
a475f603 1337 netif_dbg(dev, ifdown, dev->net, "free pdata\n");
2f7ca802
SG
1338 kfree(pdata);
1339 pdata = NULL;
1340 dev->data[0] = 0;
1341 }
1342}
1343
068bb1a7 1344static u32 smsc_crc(const u8 *buffer, size_t len, int filter)
bbd9f9ee 1345{
068bb1a7
SG
1346 u32 crc = bitrev16(crc16(0xFFFF, buffer, len));
1347 return crc << ((filter % 2) * 16);
bbd9f9ee
SG
1348}
1349
e5e3af83
SG
1350static int smsc95xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask)
1351{
1352 struct mii_if_info *mii = &dev->mii;
1353 int ret;
1354
1e1d7412 1355 netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n");
e5e3af83
SG
1356
1357 /* read to clear */
1358 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC);
e360a8b4 1359 if (ret < 0)
b052e073 1360 return ret;
e5e3af83
SG
1361
1362 /* enable interrupt source */
1363 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK);
e360a8b4 1364 if (ret < 0)
b052e073 1365 return ret;
e5e3af83
SG
1366
1367 ret |= mask;
1368
1369 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret);
1370
1371 return 0;
1372}
1373
1374static int smsc95xx_link_ok_nopm(struct usbnet *dev)
1375{
1376 struct mii_if_info *mii = &dev->mii;
1377 int ret;
1378
1379 /* first, a dummy read, needed to latch some MII phys */
1380 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
e360a8b4 1381 if (ret < 0)
b052e073 1382 return ret;
e5e3af83
SG
1383
1384 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
e360a8b4 1385 if (ret < 0)
b052e073 1386 return ret;
e5e3af83
SG
1387
1388 return !!(ret & BMSR_LSTATUS);
1389}
1390
319b95b5
SG
1391static int smsc95xx_enter_suspend0(struct usbnet *dev)
1392{
1393 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1394 u32 val;
1395 int ret;
1396
1397 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1398 if (ret < 0)
b052e073 1399 return ret;
319b95b5
SG
1400
1401 val &= (~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_));
1402 val |= PM_CTL_SUS_MODE_0;
1403
1404 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1405 if (ret < 0)
b052e073 1406 return ret;
319b95b5
SG
1407
1408 /* clear wol status */
1409 val &= ~PM_CTL_WUPS_;
1410 val |= PM_CTL_WUPS_WOL_;
1411
1412 /* enable energy detection */
1413 if (pdata->wolopts & WAKE_PHY)
1414 val |= PM_CTL_WUPS_ED_;
1415
1416 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1417 if (ret < 0)
b052e073 1418 return ret;
319b95b5
SG
1419
1420 /* read back PM_CTRL */
1421 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
76437214
ML
1422 if (ret < 0)
1423 return ret;
319b95b5 1424
b2d4b150
SG
1425 pdata->suspend_flags |= SUSPEND_SUSPEND0;
1426
76437214 1427 return 0;
319b95b5
SG
1428}
1429
1430static int smsc95xx_enter_suspend1(struct usbnet *dev)
1431{
1432 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1433 struct mii_if_info *mii = &dev->mii;
1434 u32 val;
1435 int ret;
1436
1437 /* reconfigure link pulse detection timing for
1438 * compatibility with non-standard link partners
1439 */
1440 if (pdata->features & FEATURE_PHY_NLP_CROSSOVER)
1441 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_EDPD_CONFIG,
1442 PHY_EDPD_CONFIG_DEFAULT);
1443
1444 /* enable energy detect power-down mode */
1445 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS);
e360a8b4 1446 if (ret < 0)
b052e073 1447 return ret;
319b95b5
SG
1448
1449 ret |= MODE_CTRL_STS_EDPWRDOWN_;
1450
1451 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS, ret);
1452
1453 /* enter SUSPEND1 mode */
1454 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1455 if (ret < 0)
b052e073 1456 return ret;
319b95b5
SG
1457
1458 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
1459 val |= PM_CTL_SUS_MODE_1;
1460
1461 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1462 if (ret < 0)
b052e073 1463 return ret;
319b95b5
SG
1464
1465 /* clear wol status, enable energy detection */
1466 val &= ~PM_CTL_WUPS_;
1467 val |= (PM_CTL_WUPS_ED_ | PM_CTL_ED_EN_);
1468
1469 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
76437214
ML
1470 if (ret < 0)
1471 return ret;
319b95b5 1472
b2d4b150
SG
1473 pdata->suspend_flags |= SUSPEND_SUSPEND1;
1474
76437214 1475 return 0;
319b95b5
SG
1476}
1477
1478static int smsc95xx_enter_suspend2(struct usbnet *dev)
1479{
b2d4b150 1480 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
319b95b5
SG
1481 u32 val;
1482 int ret;
1483
1484 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1485 if (ret < 0)
b052e073 1486 return ret;
319b95b5
SG
1487
1488 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
1489 val |= PM_CTL_SUS_MODE_2;
1490
1491 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
76437214
ML
1492 if (ret < 0)
1493 return ret;
319b95b5 1494
b2d4b150
SG
1495 pdata->suspend_flags |= SUSPEND_SUSPEND2;
1496
76437214 1497 return 0;
319b95b5
SG
1498}
1499
b2d4b150
SG
1500static int smsc95xx_enter_suspend3(struct usbnet *dev)
1501{
1502 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1503 u32 val;
1504 int ret;
1505
1506 ret = smsc95xx_read_reg_nopm(dev, RX_FIFO_INF, &val);
1507 if (ret < 0)
1508 return ret;
1509
53a759c8 1510 if (val & RX_FIFO_INF_USED_) {
b2d4b150
SG
1511 netdev_info(dev->net, "rx fifo not empty in autosuspend\n");
1512 return -EBUSY;
1513 }
1514
1515 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
1516 if (ret < 0)
1517 return ret;
1518
1519 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
1520 val |= PM_CTL_SUS_MODE_3 | PM_CTL_RES_CLR_WKP_STS;
1521
1522 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1523 if (ret < 0)
1524 return ret;
1525
1526 /* clear wol status */
1527 val &= ~PM_CTL_WUPS_;
1528 val |= PM_CTL_WUPS_WOL_;
1529
1530 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1531 if (ret < 0)
1532 return ret;
1533
1534 pdata->suspend_flags |= SUSPEND_SUSPEND3;
1535
1536 return 0;
1537}
1538
1539static int smsc95xx_autosuspend(struct usbnet *dev, u32 link_up)
1540{
1541 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1542 int ret;
1543
1544 if (!netif_running(dev->net)) {
1545 /* interface is ifconfig down so fully power down hw */
1546 netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n");
1547 return smsc95xx_enter_suspend2(dev);
1548 }
1549
1550 if (!link_up) {
1551 /* link is down so enter EDPD mode, but only if device can
1552 * reliably resume from it. This check should be redundant
eb970ff0 1553 * as current FEATURE_REMOTE_WAKEUP parts also support
b2d4b150
SG
1554 * FEATURE_PHY_NLP_CROSSOVER but it's included for clarity */
1555 if (!(pdata->features & FEATURE_PHY_NLP_CROSSOVER)) {
1556 netdev_warn(dev->net, "EDPD not supported\n");
1557 return -EBUSY;
1558 }
1559
1560 netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n");
1561
1562 /* enable PHY wakeup events for if cable is attached */
1563 ret = smsc95xx_enable_phy_wakeup_interrupts(dev,
1564 PHY_INT_MASK_ANEG_COMP_);
1565 if (ret < 0) {
1566 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1567 return ret;
1568 }
1569
1570 netdev_info(dev->net, "entering SUSPEND1 mode\n");
1571 return smsc95xx_enter_suspend1(dev);
1572 }
1573
1574 /* enable PHY wakeup events so we remote wakeup if cable is pulled */
1575 ret = smsc95xx_enable_phy_wakeup_interrupts(dev,
1576 PHY_INT_MASK_LINK_DOWN_);
1577 if (ret < 0) {
1578 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1579 return ret;
1580 }
1581
1582 netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n");
1583 return smsc95xx_enter_suspend3(dev);
1584}
1585
b5a04475
SG
1586static int smsc95xx_suspend(struct usb_interface *intf, pm_message_t message)
1587{
1588 struct usbnet *dev = usb_get_intfdata(intf);
e0e474a8 1589 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
e5e3af83 1590 u32 val, link_up;
b5a04475 1591 int ret;
b5a04475 1592
b5a04475 1593 ret = usbnet_suspend(intf, message);
b052e073
SG
1594 if (ret < 0) {
1595 netdev_warn(dev->net, "usbnet_suspend error\n");
1596 return ret;
1597 }
b5a04475 1598
b2d4b150
SG
1599 if (pdata->suspend_flags) {
1600 netdev_warn(dev->net, "error during last resume\n");
1601 pdata->suspend_flags = 0;
1602 }
1603
e5e3af83
SG
1604 /* determine if link is up using only _nopm functions */
1605 link_up = smsc95xx_link_ok_nopm(dev);
1606
42e21c01 1607 if (message.event == PM_EVENT_AUTO_SUSPEND &&
eb970ff0 1608 (pdata->features & FEATURE_REMOTE_WAKEUP)) {
b2d4b150
SG
1609 ret = smsc95xx_autosuspend(dev, link_up);
1610 goto done;
1611 }
1612
1613 /* if we get this far we're not autosuspending */
e5e3af83
SG
1614 /* if no wol options set, or if link is down and we're not waking on
1615 * PHY activity, enter lowest power SUSPEND2 mode
1616 */
1617 if (!(pdata->wolopts & SUPPORTED_WAKE) ||
1618 !(link_up || (pdata->wolopts & WAKE_PHY))) {
1e1d7412 1619 netdev_info(dev->net, "entering SUSPEND2 mode\n");
e0e474a8
SG
1620
1621 /* disable energy detect (link up) & wake up events */
ec32115d 1622 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
e360a8b4 1623 if (ret < 0)
b052e073 1624 goto done;
e0e474a8
SG
1625
1626 val &= ~(WUCSR_MPEN_ | WUCSR_WAKE_EN_);
1627
ec32115d 1628 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
e360a8b4 1629 if (ret < 0)
b052e073 1630 goto done;
e0e474a8 1631
ec32115d 1632 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1633 if (ret < 0)
b052e073 1634 goto done;
e0e474a8
SG
1635
1636 val &= ~(PM_CTL_ED_EN_ | PM_CTL_WOL_EN_);
1637
ec32115d 1638 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1639 if (ret < 0)
b052e073 1640 goto done;
e0e474a8 1641
3b9f7d8c
SG
1642 ret = smsc95xx_enter_suspend2(dev);
1643 goto done;
e0e474a8
SG
1644 }
1645
e5e3af83
SG
1646 if (pdata->wolopts & WAKE_PHY) {
1647 ret = smsc95xx_enable_phy_wakeup_interrupts(dev,
1648 (PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_LINK_DOWN_));
b052e073
SG
1649 if (ret < 0) {
1650 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1651 goto done;
1652 }
e5e3af83
SG
1653
1654 /* if link is down then configure EDPD and enter SUSPEND1,
1655 * otherwise enter SUSPEND0 below
1656 */
1657 if (!link_up) {
1e1d7412 1658 netdev_info(dev->net, "entering SUSPEND1 mode\n");
3b9f7d8c
SG
1659 ret = smsc95xx_enter_suspend1(dev);
1660 goto done;
e5e3af83
SG
1661 }
1662 }
1663
bbd9f9ee 1664 if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
eed9a729 1665 u32 *filter_mask = kzalloc(sizeof(u32) * 32, GFP_KERNEL);
06a221be
ML
1666 u32 command[2];
1667 u32 offset[2];
1668 u32 crc[4];
9ebca507
SG
1669 int wuff_filter_count =
1670 (pdata->features & FEATURE_8_WAKEUP_FILTERS) ?
1671 LAN9500A_WUFF_NUM : LAN9500_WUFF_NUM;
bbd9f9ee
SG
1672 int i, filter = 0;
1673
eed9a729
SG
1674 if (!filter_mask) {
1675 netdev_warn(dev->net, "Unable to allocate filter_mask\n");
3b9f7d8c
SG
1676 ret = -ENOMEM;
1677 goto done;
eed9a729
SG
1678 }
1679
06a221be
ML
1680 memset(command, 0, sizeof(command));
1681 memset(offset, 0, sizeof(offset));
1682 memset(crc, 0, sizeof(crc));
1683
bbd9f9ee
SG
1684 if (pdata->wolopts & WAKE_BCAST) {
1685 const u8 bcast[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
1e1d7412 1686 netdev_info(dev->net, "enabling broadcast detection\n");
bbd9f9ee
SG
1687 filter_mask[filter * 4] = 0x003F;
1688 filter_mask[filter * 4 + 1] = 0x00;
1689 filter_mask[filter * 4 + 2] = 0x00;
1690 filter_mask[filter * 4 + 3] = 0x00;
1691 command[filter/4] |= 0x05UL << ((filter % 4) * 8);
1692 offset[filter/4] |= 0x00 << ((filter % 4) * 8);
1693 crc[filter/2] |= smsc_crc(bcast, 6, filter);
1694 filter++;
1695 }
1696
1697 if (pdata->wolopts & WAKE_MCAST) {
1698 const u8 mcast[] = {0x01, 0x00, 0x5E};
1e1d7412 1699 netdev_info(dev->net, "enabling multicast detection\n");
bbd9f9ee
SG
1700 filter_mask[filter * 4] = 0x0007;
1701 filter_mask[filter * 4 + 1] = 0x00;
1702 filter_mask[filter * 4 + 2] = 0x00;
1703 filter_mask[filter * 4 + 3] = 0x00;
1704 command[filter/4] |= 0x09UL << ((filter % 4) * 8);
1705 offset[filter/4] |= 0x00 << ((filter % 4) * 8);
1706 crc[filter/2] |= smsc_crc(mcast, 3, filter);
1707 filter++;
1708 }
1709
1710 if (pdata->wolopts & WAKE_ARP) {
1711 const u8 arp[] = {0x08, 0x06};
1e1d7412 1712 netdev_info(dev->net, "enabling ARP detection\n");
bbd9f9ee
SG
1713 filter_mask[filter * 4] = 0x0003;
1714 filter_mask[filter * 4 + 1] = 0x00;
1715 filter_mask[filter * 4 + 2] = 0x00;
1716 filter_mask[filter * 4 + 3] = 0x00;
1717 command[filter/4] |= 0x05UL << ((filter % 4) * 8);
1718 offset[filter/4] |= 0x0C << ((filter % 4) * 8);
1719 crc[filter/2] |= smsc_crc(arp, 2, filter);
1720 filter++;
1721 }
1722
1723 if (pdata->wolopts & WAKE_UCAST) {
1e1d7412 1724 netdev_info(dev->net, "enabling unicast detection\n");
bbd9f9ee
SG
1725 filter_mask[filter * 4] = 0x003F;
1726 filter_mask[filter * 4 + 1] = 0x00;
1727 filter_mask[filter * 4 + 2] = 0x00;
1728 filter_mask[filter * 4 + 3] = 0x00;
1729 command[filter/4] |= 0x01UL << ((filter % 4) * 8);
1730 offset[filter/4] |= 0x00 << ((filter % 4) * 8);
1731 crc[filter/2] |= smsc_crc(dev->net->dev_addr, ETH_ALEN, filter);
1732 filter++;
1733 }
1734
9ebca507 1735 for (i = 0; i < (wuff_filter_count * 4); i++) {
ec32115d 1736 ret = smsc95xx_write_reg_nopm(dev, WUFF, filter_mask[i]);
b052e073 1737 if (ret < 0) {
06a221be 1738 kfree(filter_mask);
b052e073
SG
1739 goto done;
1740 }
bbd9f9ee 1741 }
06a221be 1742 kfree(filter_mask);
bbd9f9ee 1743
9ebca507 1744 for (i = 0; i < (wuff_filter_count / 4); i++) {
ec32115d 1745 ret = smsc95xx_write_reg_nopm(dev, WUFF, command[i]);
e360a8b4 1746 if (ret < 0)
b052e073 1747 goto done;
bbd9f9ee
SG
1748 }
1749
9ebca507 1750 for (i = 0; i < (wuff_filter_count / 4); i++) {
ec32115d 1751 ret = smsc95xx_write_reg_nopm(dev, WUFF, offset[i]);
e360a8b4 1752 if (ret < 0)
b052e073 1753 goto done;
bbd9f9ee
SG
1754 }
1755
9ebca507 1756 for (i = 0; i < (wuff_filter_count / 2); i++) {
ec32115d 1757 ret = smsc95xx_write_reg_nopm(dev, WUFF, crc[i]);
e360a8b4 1758 if (ret < 0)
b052e073 1759 goto done;
bbd9f9ee
SG
1760 }
1761
1762 /* clear any pending pattern match packet status */
ec32115d 1763 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
e360a8b4 1764 if (ret < 0)
b052e073 1765 goto done;
bbd9f9ee
SG
1766
1767 val |= WUCSR_WUFR_;
1768
ec32115d 1769 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
e360a8b4 1770 if (ret < 0)
b052e073 1771 goto done;
bbd9f9ee
SG
1772 }
1773
e0e474a8
SG
1774 if (pdata->wolopts & WAKE_MAGIC) {
1775 /* clear any pending magic packet status */
ec32115d 1776 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
e360a8b4 1777 if (ret < 0)
b052e073 1778 goto done;
e0e474a8
SG
1779
1780 val |= WUCSR_MPR_;
1781
ec32115d 1782 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
e360a8b4 1783 if (ret < 0)
b052e073 1784 goto done;
e0e474a8
SG
1785 }
1786
bbd9f9ee 1787 /* enable/disable wakeup sources */
ec32115d 1788 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
e360a8b4 1789 if (ret < 0)
b052e073 1790 goto done;
e0e474a8 1791
bbd9f9ee 1792 if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
1e1d7412 1793 netdev_info(dev->net, "enabling pattern match wakeup\n");
bbd9f9ee
SG
1794 val |= WUCSR_WAKE_EN_;
1795 } else {
1e1d7412 1796 netdev_info(dev->net, "disabling pattern match wakeup\n");
bbd9f9ee
SG
1797 val &= ~WUCSR_WAKE_EN_;
1798 }
1799
e0e474a8 1800 if (pdata->wolopts & WAKE_MAGIC) {
1e1d7412 1801 netdev_info(dev->net, "enabling magic packet wakeup\n");
e0e474a8
SG
1802 val |= WUCSR_MPEN_;
1803 } else {
1e1d7412 1804 netdev_info(dev->net, "disabling magic packet wakeup\n");
e0e474a8
SG
1805 val &= ~WUCSR_MPEN_;
1806 }
1807
ec32115d 1808 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
e360a8b4 1809 if (ret < 0)
b052e073 1810 goto done;
e0e474a8
SG
1811
1812 /* enable wol wakeup source */
ec32115d 1813 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1814 if (ret < 0)
b052e073 1815 goto done;
e0e474a8
SG
1816
1817 val |= PM_CTL_WOL_EN_;
1818
e5e3af83
SG
1819 /* phy energy detect wakeup source */
1820 if (pdata->wolopts & WAKE_PHY)
1821 val |= PM_CTL_ED_EN_;
1822
ec32115d 1823 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1824 if (ret < 0)
b052e073 1825 goto done;
e0e474a8 1826
bbd9f9ee 1827 /* enable receiver to enable frame reception */
ec32115d 1828 smsc95xx_start_rx_path(dev, 1);
e0e474a8
SG
1829
1830 /* some wol options are enabled, so enter SUSPEND0 */
1e1d7412 1831 netdev_info(dev->net, "entering SUSPEND0 mode\n");
3b9f7d8c
SG
1832 ret = smsc95xx_enter_suspend0(dev);
1833
1834done:
0d41be53
ML
1835 /*
1836 * TODO: resume() might need to handle the suspend failure
1837 * in system sleep
1838 */
1839 if (ret && PMSG_IS_AUTO(message))
3b9f7d8c
SG
1840 usbnet_resume(intf);
1841 return ret;
e0e474a8
SG
1842}
1843
1844static int smsc95xx_resume(struct usb_interface *intf)
1845{
1846 struct usbnet *dev = usb_get_intfdata(intf);
8bca81d9
SM
1847 struct smsc95xx_priv *pdata;
1848 u8 suspend_flags;
e0e474a8
SG
1849 int ret;
1850 u32 val;
1851
1852 BUG_ON(!dev);
8bca81d9
SM
1853 pdata = (struct smsc95xx_priv *)(dev->data[0]);
1854 suspend_flags = pdata->suspend_flags;
e0e474a8 1855
b2d4b150
SG
1856 netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags);
1857
1858 /* do this first to ensure it's cleared even in error case */
1859 pdata->suspend_flags = 0;
d69d1694 1860 schedule_delayed_work(&pdata->carrier_check, CARRIER_CHECK_DELAY);
b2d4b150
SG
1861
1862 if (suspend_flags & SUSPEND_ALLMODES) {
bbd9f9ee 1863 /* clear wake-up sources */
ec32115d 1864 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
e360a8b4 1865 if (ret < 0)
b052e073 1866 return ret;
e0e474a8 1867
bbd9f9ee 1868 val &= ~(WUCSR_WAKE_EN_ | WUCSR_MPEN_);
e0e474a8 1869
ec32115d 1870 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
e360a8b4 1871 if (ret < 0)
b052e073 1872 return ret;
e0e474a8
SG
1873
1874 /* clear wake-up status */
ec32115d 1875 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1876 if (ret < 0)
b052e073 1877 return ret;
e0e474a8
SG
1878
1879 val &= ~PM_CTL_WOL_EN_;
1880 val |= PM_CTL_WUPS_;
1881
ec32115d 1882 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1883 if (ret < 0)
b052e073 1884 return ret;
e0e474a8
SG
1885 }
1886
af3d7c1e 1887 ret = usbnet_resume(intf);
b052e073
SG
1888 if (ret < 0)
1889 netdev_warn(dev->net, "usbnet_resume error\n");
e0e474a8 1890
b052e073 1891 return ret;
b5a04475
SG
1892}
1893
b4df480f
JS
1894static int smsc95xx_reset_resume(struct usb_interface *intf)
1895{
1896 struct usbnet *dev = usb_get_intfdata(intf);
1897 int ret;
1898
1899 ret = smsc95xx_reset(dev);
1900 if (ret < 0)
1901 return ret;
1902
1903 return smsc95xx_resume(intf);
1904}
1905
2f7ca802
SG
1906static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
1907{
1908 skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
1909 skb->ip_summed = CHECKSUM_COMPLETE;
1910 skb_trim(skb, skb->len - 2);
1911}
1912
1913static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1914{
eb85569f
EG
1915 /* This check is no longer done by usbnet */
1916 if (skb->len < dev->net->hard_header_len)
1917 return 0;
1918
2f7ca802
SG
1919 while (skb->len > 0) {
1920 u32 header, align_count;
1921 struct sk_buff *ax_skb;
1922 unsigned char *packet;
1923 u16 size;
1924
1925 memcpy(&header, skb->data, sizeof(header));
1926 le32_to_cpus(&header);
1927 skb_pull(skb, 4 + NET_IP_ALIGN);
1928 packet = skb->data;
1929
1930 /* get the packet length */
1931 size = (u16)((header & RX_STS_FL_) >> 16);
1932 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
1933
1934 if (unlikely(header & RX_STS_ES_)) {
a475f603
JP
1935 netif_dbg(dev, rx_err, dev->net,
1936 "Error header=0x%08x\n", header);
80667ac1
HX
1937 dev->net->stats.rx_errors++;
1938 dev->net->stats.rx_dropped++;
2f7ca802
SG
1939
1940 if (header & RX_STS_CRC_) {
80667ac1 1941 dev->net->stats.rx_crc_errors++;
2f7ca802
SG
1942 } else {
1943 if (header & (RX_STS_TL_ | RX_STS_RF_))
80667ac1 1944 dev->net->stats.rx_frame_errors++;
2f7ca802
SG
1945
1946 if ((header & RX_STS_LE_) &&
1947 (!(header & RX_STS_FT_)))
80667ac1 1948 dev->net->stats.rx_length_errors++;
2f7ca802
SG
1949 }
1950 } else {
1951 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1952 if (unlikely(size > (ETH_FRAME_LEN + 12))) {
a475f603
JP
1953 netif_dbg(dev, rx_err, dev->net,
1954 "size err header=0x%08x\n", header);
2f7ca802
SG
1955 return 0;
1956 }
1957
1958 /* last frame in this batch */
1959 if (skb->len == size) {
78e47fe4 1960 if (dev->net->features & NETIF_F_RXCSUM)
2f7ca802 1961 smsc95xx_rx_csum_offload(skb);
df18acca 1962 skb_trim(skb, skb->len - 4); /* remove fcs */
2f7ca802
SG
1963 skb->truesize = size + sizeof(struct sk_buff);
1964
1965 return 1;
1966 }
1967
1968 ax_skb = skb_clone(skb, GFP_ATOMIC);
1969 if (unlikely(!ax_skb)) {
60b86755 1970 netdev_warn(dev->net, "Error allocating skb\n");
2f7ca802
SG
1971 return 0;
1972 }
1973
1974 ax_skb->len = size;
1975 ax_skb->data = packet;
1976 skb_set_tail_pointer(ax_skb, size);
1977
78e47fe4 1978 if (dev->net->features & NETIF_F_RXCSUM)
2f7ca802 1979 smsc95xx_rx_csum_offload(ax_skb);
df18acca 1980 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
2f7ca802
SG
1981 ax_skb->truesize = size + sizeof(struct sk_buff);
1982
1983 usbnet_skb_return(dev, ax_skb);
1984 }
1985
1986 skb_pull(skb, size);
1987
1988 /* padding bytes before the next frame starts */
1989 if (skb->len)
1990 skb_pull(skb, align_count);
1991 }
1992
2f7ca802
SG
1993 return 1;
1994}
1995
f7b29271
SG
1996static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
1997{
55508d60
MM
1998 u16 low_16 = (u16)skb_checksum_start_offset(skb);
1999 u16 high_16 = low_16 + skb->csum_offset;
f7b29271
SG
2000 return (high_16 << 16) | low_16;
2001}
2002
2f7ca802
SG
2003static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
2004 struct sk_buff *skb, gfp_t flags)
2005{
78e47fe4 2006 bool csum = skb->ip_summed == CHECKSUM_PARTIAL;
f7b29271 2007 int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
2f7ca802
SG
2008 u32 tx_cmd_a, tx_cmd_b;
2009
f7b29271
SG
2010 /* We do not advertise SG, so skbs should be already linearized */
2011 BUG_ON(skb_shinfo(skb)->nr_frags);
2012
e9156cd2
JH
2013 /* Make writable and expand header space by overhead if required */
2014 if (skb_cow_head(skb, overhead)) {
2015 /* Must deallocate here as returning NULL to indicate error
2016 * means the skb won't be deallocated in the caller.
2017 */
2f7ca802 2018 dev_kfree_skb_any(skb);
e9156cd2 2019 return NULL;
2f7ca802
SG
2020 }
2021
f7b29271 2022 if (csum) {
11bc3088
SG
2023 if (skb->len <= 45) {
2024 /* workaround - hardware tx checksum does not work
2025 * properly with extremely small packets */
55508d60 2026 long csstart = skb_checksum_start_offset(skb);
11bc3088
SG
2027 __wsum calc = csum_partial(skb->data + csstart,
2028 skb->len - csstart, 0);
2029 *((__sum16 *)(skb->data + csstart
2030 + skb->csum_offset)) = csum_fold(calc);
2031
2032 csum = false;
2033 } else {
2034 u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
2035 skb_push(skb, 4);
00acda68 2036 cpu_to_le32s(&csum_preamble);
11bc3088
SG
2037 memcpy(skb->data, &csum_preamble, 4);
2038 }
f7b29271
SG
2039 }
2040
2f7ca802
SG
2041 skb_push(skb, 4);
2042 tx_cmd_b = (u32)(skb->len - 4);
f7b29271
SG
2043 if (csum)
2044 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
2f7ca802
SG
2045 cpu_to_le32s(&tx_cmd_b);
2046 memcpy(skb->data, &tx_cmd_b, 4);
2047
2048 skb_push(skb, 4);
2049 tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ |
2050 TX_CMD_A_LAST_SEG_;
2051 cpu_to_le32s(&tx_cmd_a);
2052 memcpy(skb->data, &tx_cmd_a, 4);
2053
2054 return skb;
2055}
2056
b2d4b150
SG
2057static int smsc95xx_manage_power(struct usbnet *dev, int on)
2058{
2059 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
2060
2061 dev->intf->needs_remote_wakeup = on;
2062
eb970ff0 2063 if (pdata->features & FEATURE_REMOTE_WAKEUP)
b2d4b150
SG
2064 return 0;
2065
eb970ff0
ML
2066 /* this chip revision isn't capable of remote wakeup */
2067 netdev_info(dev->net, "hardware isn't capable of remote wakeup\n");
b2d4b150
SG
2068
2069 if (on)
2070 usb_autopm_get_interface_no_resume(dev->intf);
2071 else
2072 usb_autopm_put_interface(dev->intf);
2073
2074 return 0;
2075}
2076
2f7ca802
SG
2077static const struct driver_info smsc95xx_info = {
2078 .description = "smsc95xx USB 2.0 Ethernet",
2079 .bind = smsc95xx_bind,
2080 .unbind = smsc95xx_unbind,
2081 .link_reset = smsc95xx_link_reset,
2082 .reset = smsc95xx_reset,
2083 .rx_fixup = smsc95xx_rx_fixup,
2084 .tx_fixup = smsc95xx_tx_fixup,
2085 .status = smsc95xx_status,
b2d4b150 2086 .manage_power = smsc95xx_manage_power,
07d69d42 2087 .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
2f7ca802
SG
2088};
2089
2090static const struct usb_device_id products[] = {
2091 {
2092 /* SMSC9500 USB Ethernet Device */
2093 USB_DEVICE(0x0424, 0x9500),
2094 .driver_info = (unsigned long) &smsc95xx_info,
2095 },
6f41d12b
SG
2096 {
2097 /* SMSC9505 USB Ethernet Device */
2098 USB_DEVICE(0x0424, 0x9505),
2099 .driver_info = (unsigned long) &smsc95xx_info,
2100 },
2101 {
2102 /* SMSC9500A USB Ethernet Device */
2103 USB_DEVICE(0x0424, 0x9E00),
2104 .driver_info = (unsigned long) &smsc95xx_info,
2105 },
2106 {
2107 /* SMSC9505A USB Ethernet Device */
2108 USB_DEVICE(0x0424, 0x9E01),
2109 .driver_info = (unsigned long) &smsc95xx_info,
2110 },
726474b8
SG
2111 {
2112 /* SMSC9512/9514 USB Hub & Ethernet Device */
2113 USB_DEVICE(0x0424, 0xec00),
2114 .driver_info = (unsigned long) &smsc95xx_info,
2115 },
6f41d12b
SG
2116 {
2117 /* SMSC9500 USB Ethernet Device (SAL10) */
2118 USB_DEVICE(0x0424, 0x9900),
2119 .driver_info = (unsigned long) &smsc95xx_info,
2120 },
2121 {
2122 /* SMSC9505 USB Ethernet Device (SAL10) */
2123 USB_DEVICE(0x0424, 0x9901),
2124 .driver_info = (unsigned long) &smsc95xx_info,
2125 },
2126 {
2127 /* SMSC9500A USB Ethernet Device (SAL10) */
2128 USB_DEVICE(0x0424, 0x9902),
2129 .driver_info = (unsigned long) &smsc95xx_info,
2130 },
2131 {
2132 /* SMSC9505A USB Ethernet Device (SAL10) */
2133 USB_DEVICE(0x0424, 0x9903),
2134 .driver_info = (unsigned long) &smsc95xx_info,
2135 },
2136 {
2137 /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */
2138 USB_DEVICE(0x0424, 0x9904),
2139 .driver_info = (unsigned long) &smsc95xx_info,
2140 },
2141 {
2142 /* SMSC9500A USB Ethernet Device (HAL) */
2143 USB_DEVICE(0x0424, 0x9905),
2144 .driver_info = (unsigned long) &smsc95xx_info,
2145 },
2146 {
2147 /* SMSC9505A USB Ethernet Device (HAL) */
2148 USB_DEVICE(0x0424, 0x9906),
2149 .driver_info = (unsigned long) &smsc95xx_info,
2150 },
2151 {
2152 /* SMSC9500 USB Ethernet Device (Alternate ID) */
2153 USB_DEVICE(0x0424, 0x9907),
2154 .driver_info = (unsigned long) &smsc95xx_info,
2155 },
2156 {
2157 /* SMSC9500A USB Ethernet Device (Alternate ID) */
2158 USB_DEVICE(0x0424, 0x9908),
2159 .driver_info = (unsigned long) &smsc95xx_info,
2160 },
2161 {
2162 /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */
2163 USB_DEVICE(0x0424, 0x9909),
2164 .driver_info = (unsigned long) &smsc95xx_info,
2165 },
88edaa41
SG
2166 {
2167 /* SMSC LAN9530 USB Ethernet Device */
2168 USB_DEVICE(0x0424, 0x9530),
2169 .driver_info = (unsigned long) &smsc95xx_info,
2170 },
2171 {
2172 /* SMSC LAN9730 USB Ethernet Device */
2173 USB_DEVICE(0x0424, 0x9730),
2174 .driver_info = (unsigned long) &smsc95xx_info,
2175 },
2176 {
2177 /* SMSC LAN89530 USB Ethernet Device */
2178 USB_DEVICE(0x0424, 0x9E08),
2179 .driver_info = (unsigned long) &smsc95xx_info,
2180 },
2f7ca802
SG
2181 { }, /* END */
2182};
2183MODULE_DEVICE_TABLE(usb, products);
2184
2185static struct usb_driver smsc95xx_driver = {
2186 .name = "smsc95xx",
2187 .id_table = products,
2188 .probe = usbnet_probe,
b5a04475 2189 .suspend = smsc95xx_suspend,
e0e474a8 2190 .resume = smsc95xx_resume,
b4df480f 2191 .reset_resume = smsc95xx_reset_resume,
2f7ca802 2192 .disconnect = usbnet_disconnect,
e1f12eb6 2193 .disable_hub_initiated_lpm = 1,
b2d4b150 2194 .supports_autosuspend = 1,
2f7ca802
SG
2195};
2196
d632eb1b 2197module_usb_driver(smsc95xx_driver);
2f7ca802
SG
2198
2199MODULE_AUTHOR("Nancy Lin");
90b24cfb 2200MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>");
2f7ca802
SG
2201MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
2202MODULE_LICENSE("GPL");