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[mirror_ubuntu-artful-kernel.git] / drivers / net / vmxnet3 / vmxnet3_int.h
CommitLineData
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1/*
2 * Linux driver for VMware's vmxnet3 ethernet NIC.
3 *
190af10f 4 * Copyright (C) 2008-2016, VMware, Inc. All Rights Reserved.
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5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License and no later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
14 * details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * The full GNU General Public License is included in this distribution in
21 * the file called "COPYING".
22 *
190af10f 23 * Maintained by: pv-drivers@vmware.com
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24 *
25 */
26
27#ifndef _VMXNET3_INT_H
28#define _VMXNET3_INT_H
29
72e85c45 30#include <linux/bitops.h>
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31#include <linux/ethtool.h>
32#include <linux/delay.h>
33#include <linux/netdevice.h>
34#include <linux/pci.h>
d1a890fa 35#include <linux/compiler.h>
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36#include <linux/slab.h>
37#include <linux/spinlock.h>
38#include <linux/ioport.h>
39#include <linux/highmem.h>
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40#include <linux/timer.h>
41#include <linux/skbuff.h>
42#include <linux/interrupt.h>
43#include <linux/workqueue.h>
44#include <linux/uaccess.h>
45#include <asm/dma.h>
46#include <asm/page.h>
47
48#include <linux/tcp.h>
49#include <linux/udp.h>
50#include <linux/ip.h>
51#include <linux/ipv6.h>
52#include <linux/in.h>
53#include <linux/etherdevice.h>
54#include <asm/checksum.h>
55#include <linux/if_vlan.h>
56#include <linux/if_arp.h>
57#include <linux/inetdevice.h>
eebb02b1 58#include <linux/log2.h>
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59
60#include "vmxnet3_defs.h"
61
62#ifdef DEBUG
63# define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI(debug)"
64#else
65# define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI"
66#endif
67
68
69/*
70 * Version numbers
71 */
ff2e7d5d 72#define VMXNET3_DRIVER_VERSION_STRING "1.4.a.0-k"
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73
74/* a 32-bit int, each byte encode a verion number in VMXNET3_DRIVER_VERSION */
ff2e7d5d 75#define VMXNET3_DRIVER_VERSION_NUM 0x01040a00
d1a890fa 76
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77#if defined(CONFIG_PCI_MSI)
78 /* RSS only makes sense if MSI-X is supported. */
79 #define VMXNET3_RSS
80#endif
d1a890fa 81
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82#define VMXNET3_REV_3 2 /* Vmxnet3 Rev. 3 */
83#define VMXNET3_REV_2 1 /* Vmxnet3 Rev. 2 */
84#define VMXNET3_REV_1 0 /* Vmxnet3 Rev. 1 */
85
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86/*
87 * Capabilities
88 */
89
90enum {
91 VMNET_CAP_SG = 0x0001, /* Can do scatter-gather transmits. */
92 VMNET_CAP_IP4_CSUM = 0x0002, /* Can checksum only TCP/UDP over
93 * IPv4 */
94 VMNET_CAP_HW_CSUM = 0x0004, /* Can checksum all packets. */
95 VMNET_CAP_HIGH_DMA = 0x0008, /* Can DMA to high memory. */
96 VMNET_CAP_TOE = 0x0010, /* Supports TCP/IP offload. */
97 VMNET_CAP_TSO = 0x0020, /* Supports TCP Segmentation
98 * offload */
99 VMNET_CAP_SW_TSO = 0x0040, /* Supports SW TCP Segmentation */
100 VMNET_CAP_VMXNET_APROM = 0x0080, /* Vmxnet APROM support */
101 VMNET_CAP_HW_TX_VLAN = 0x0100, /* Can we do VLAN tagging in HW */
102 VMNET_CAP_HW_RX_VLAN = 0x0200, /* Can we do VLAN untagging in HW */
103 VMNET_CAP_SW_VLAN = 0x0400, /* VLAN tagging/untagging in SW */
104 VMNET_CAP_WAKE_PCKT_RCV = 0x0800, /* Can wake on network packet recv? */
105 VMNET_CAP_ENABLE_INT_INLINE = 0x1000, /* Enable Interrupt Inline */
106 VMNET_CAP_ENABLE_HEADER_COPY = 0x2000, /* copy header for vmkernel */
107 VMNET_CAP_TX_CHAIN = 0x4000, /* Guest can use multiple tx entries
108 * for a pkt */
109 VMNET_CAP_RX_CHAIN = 0x8000, /* pkt can span multiple rx entries */
110 VMNET_CAP_LPD = 0x10000, /* large pkt delivery */
111 VMNET_CAP_BPF = 0x20000, /* BPF Support in VMXNET Virtual HW*/
112 VMNET_CAP_SG_SPAN_PAGES = 0x40000, /* Scatter-gather can span multiple*/
113 /* pages transmits */
114 VMNET_CAP_IP6_CSUM = 0x80000, /* Can do IPv6 csum offload. */
115 VMNET_CAP_TSO6 = 0x100000, /* TSO seg. offload for IPv6 pkts. */
116 VMNET_CAP_TSO256k = 0x200000, /* Can do TSO seg offload for */
117 /* pkts up to 256kB. */
118 VMNET_CAP_UPT = 0x400000 /* Support UPT */
119};
120
121/*
b1226c7d 122 * Maximum devices supported.
d1a890fa 123 */
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124#define MAX_ETHERNET_CARDS 10
125#define MAX_PCI_PASSTHRU_DEVICE 6
126
127struct vmxnet3_cmd_ring {
128 union Vmxnet3_GenericDesc *base;
129 u32 size;
130 u32 next2fill;
131 u32 next2comp;
132 u8 gen;
133 dma_addr_t basePA;
134};
135
136static inline void
137vmxnet3_cmd_ring_adv_next2fill(struct vmxnet3_cmd_ring *ring)
138{
139 ring->next2fill++;
140 if (unlikely(ring->next2fill == ring->size)) {
141 ring->next2fill = 0;
142 VMXNET3_FLIP_RING_GEN(ring->gen);
143 }
144}
145
146static inline void
147vmxnet3_cmd_ring_adv_next2comp(struct vmxnet3_cmd_ring *ring)
148{
149 VMXNET3_INC_RING_IDX_ONLY(ring->next2comp, ring->size);
150}
151
152static inline int
153vmxnet3_cmd_ring_desc_avail(struct vmxnet3_cmd_ring *ring)
154{
155 return (ring->next2comp > ring->next2fill ? 0 : ring->size) +
156 ring->next2comp - ring->next2fill - 1;
157}
158
159struct vmxnet3_comp_ring {
160 union Vmxnet3_GenericDesc *base;
161 u32 size;
162 u32 next2proc;
163 u8 gen;
164 u8 intr_idx;
165 dma_addr_t basePA;
166};
167
168static inline void
169vmxnet3_comp_ring_adv_next2proc(struct vmxnet3_comp_ring *ring)
170{
171 ring->next2proc++;
172 if (unlikely(ring->next2proc == ring->size)) {
173 ring->next2proc = 0;
174 VMXNET3_FLIP_RING_GEN(ring->gen);
175 }
176}
177
178struct vmxnet3_tx_data_ring {
179 struct Vmxnet3_TxDataDesc *base;
180 u32 size;
181 dma_addr_t basePA;
182};
183
184enum vmxnet3_buf_map_type {
185 VMXNET3_MAP_INVALID = 0,
186 VMXNET3_MAP_NONE,
187 VMXNET3_MAP_SINGLE,
188 VMXNET3_MAP_PAGE,
189};
190
191struct vmxnet3_tx_buf_info {
192 u32 map_type;
193 u16 len;
194 u16 sop_idx;
195 dma_addr_t dma_addr;
196 struct sk_buff *skb;
197};
198
199struct vmxnet3_tq_driver_stats {
200 u64 drop_total; /* # of pkts dropped by the driver, the
201 * counters below track droppings due to
202 * different reasons
203 */
204 u64 drop_too_many_frags;
205 u64 drop_oversized_hdr;
206 u64 drop_hdr_inspect_err;
207 u64 drop_tso;
208
209 u64 tx_ring_full;
210 u64 linearized; /* # of pkts linearized */
211 u64 copy_skb_header; /* # of times we have to copy skb header */
212 u64 oversized_hdr;
213};
214
215struct vmxnet3_tx_ctx {
216 bool ipv4;
759c9359 217 bool ipv6;
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218 u16 mss;
219 u32 eth_ip_hdr_size; /* only valid for pkts requesting tso or csum
220 * offloading
221 */
222 u32 l4_hdr_size; /* only valid if mss != 0 */
223 u32 copy_size; /* # of bytes copied into the data ring */
224 union Vmxnet3_GenericDesc *sop_txd;
225 union Vmxnet3_GenericDesc *eop_txd;
226};
227
228struct vmxnet3_tx_queue {
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229 char name[IFNAMSIZ+8]; /* To identify interrupt */
230 struct vmxnet3_adapter *adapter;
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231 spinlock_t tx_lock;
232 struct vmxnet3_cmd_ring tx_ring;
09c5088e 233 struct vmxnet3_tx_buf_info *buf_info;
b0eb57cb 234 dma_addr_t buf_info_pa;
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235 struct vmxnet3_tx_data_ring data_ring;
236 struct vmxnet3_comp_ring comp_ring;
09c5088e 237 struct Vmxnet3_TxQueueCtrl *shared;
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238 struct vmxnet3_tq_driver_stats stats;
239 bool stopped;
240 int num_stop; /* # of times the queue is
241 * stopped */
09c5088e 242 int qid;
3c8b3efc 243 u16 txdata_desc_size;
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244} __attribute__((__aligned__(SMP_CACHE_BYTES)));
245
246enum vmxnet3_rx_buf_type {
247 VMXNET3_RX_BUF_NONE = 0,
248 VMXNET3_RX_BUF_SKB = 1,
249 VMXNET3_RX_BUF_PAGE = 2
250};
251
252struct vmxnet3_rx_buf_info {
253 enum vmxnet3_rx_buf_type buf_type;
254 u16 len;
255 union {
256 struct sk_buff *skb;
257 struct page *page;
258 };
259 dma_addr_t dma_addr;
260};
261
262struct vmxnet3_rx_ctx {
263 struct sk_buff *skb;
264 u32 sop_idx;
265};
266
267struct vmxnet3_rq_driver_stats {
268 u64 drop_total;
269 u64 drop_err;
270 u64 drop_fcs;
271 u64 rx_buf_alloc_failure;
272};
273
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274struct vmxnet3_rx_data_ring {
275 Vmxnet3_RxDataDesc *base;
276 dma_addr_t basePA;
277 u16 desc_size;
278};
279
d1a890fa 280struct vmxnet3_rx_queue {
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281 char name[IFNAMSIZ + 8]; /* To identify interrupt */
282 struct vmxnet3_adapter *adapter;
283 struct napi_struct napi;
d1a890fa 284 struct vmxnet3_cmd_ring rx_ring[2];
50a5ce3e 285 struct vmxnet3_rx_data_ring data_ring;
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286 struct vmxnet3_comp_ring comp_ring;
287 struct vmxnet3_rx_ctx rx_ctx;
288 u32 qid; /* rqID in RCD for buffer from 1st ring */
289 u32 qid2; /* rqID in RCD for buffer from 2nd ring */
50a5ce3e 290 u32 dataRingQid; /* rqID in RCD for buffer from data ring */
d1a890fa 291 struct vmxnet3_rx_buf_info *buf_info[2];
b0eb57cb 292 dma_addr_t buf_info_pa;
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293 struct Vmxnet3_RxQueueCtrl *shared;
294 struct vmxnet3_rq_driver_stats stats;
295} __attribute__((__aligned__(SMP_CACHE_BYTES)));
296
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297#define VMXNET3_DEVICE_MAX_TX_QUEUES 8
298#define VMXNET3_DEVICE_MAX_RX_QUEUES 8 /* Keep this value as a power of 2 */
299
300/* Should be less than UPT1_RSS_MAX_IND_TABLE_SIZE */
301#define VMXNET3_RSS_IND_TABLE_SIZE (VMXNET3_DEVICE_MAX_RX_QUEUES * 4)
302
303#define VMXNET3_LINUX_MAX_MSIX_VECT (VMXNET3_DEVICE_MAX_TX_QUEUES + \
304 VMXNET3_DEVICE_MAX_RX_QUEUES + 1)
7e96fbf2 305#define VMXNET3_LINUX_MIN_MSIX_VECT 2 /* 1 for tx-rx pair and 1 for event */
09c5088e 306
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307
308struct vmxnet3_intr {
309 enum vmxnet3_intr_mask_mode mask_mode;
310 enum vmxnet3_intr_type type; /* MSI-X, MSI, or INTx? */
311 u8 num_intrs; /* # of intr vectors */
312 u8 event_intr_idx; /* idx of the intr vector for event */
313 u8 mod_levels[VMXNET3_LINUX_MAX_MSIX_VECT]; /* moderation level */
c7673e4d 314 char event_msi_vector_name[IFNAMSIZ+17];
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315#ifdef CONFIG_PCI_MSI
316 struct msix_entry msix_entries[VMXNET3_LINUX_MAX_MSIX_VECT];
317#endif
318};
319
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320/* Interrupt sharing schemes, share_intr */
321#define VMXNET3_INTR_BUDDYSHARE 0 /* Corresponding tx,rx queues share irq */
322#define VMXNET3_INTR_TXSHARE 1 /* All tx queues share one irq */
323#define VMXNET3_INTR_DONTSHARE 2 /* each queue has its own irq */
324
325
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326#define VMXNET3_STATE_BIT_RESETTING 0
327#define VMXNET3_STATE_BIT_QUIESCED 1
328struct vmxnet3_adapter {
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329 struct vmxnet3_tx_queue tx_queue[VMXNET3_DEVICE_MAX_TX_QUEUES];
330 struct vmxnet3_rx_queue rx_queue[VMXNET3_DEVICE_MAX_RX_QUEUES];
72e85c45 331 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
09c5088e 332 struct vmxnet3_intr intr;
83d0feff 333 spinlock_t cmd_lock;
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334 struct Vmxnet3_DriverShared *shared;
335 struct Vmxnet3_PMConf *pm_conf;
336 struct Vmxnet3_TxQueueDesc *tqd_start; /* all tx queue desc */
337 struct Vmxnet3_RxQueueDesc *rqd_start; /* all rx queue desc */
338 struct net_device *netdev;
09c5088e 339 struct pci_dev *pdev;
d1a890fa 340
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341 u8 __iomem *hw_addr0; /* for BAR 0 */
342 u8 __iomem *hw_addr1; /* for BAR 1 */
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343 u8 version;
344
345 bool rxcsum;
346 bool lro;
d1a890fa 347
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348#ifdef VMXNET3_RSS
349 struct UPT1_RSSConf *rss_conf;
350 bool rss;
351#endif
352 u32 num_rx_queues;
353 u32 num_tx_queues;
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354
355 /* rx buffer related */
356 unsigned skb_buf_size;
357 int rx_buf_per_pkt; /* only apply to the 1st ring */
358 dma_addr_t shared_pa;
359 dma_addr_t queue_desc_pa;
4edef40e 360 dma_addr_t coal_conf_pa;
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361
362 /* Wake-on-LAN */
363 u32 wol;
364
365 /* Link speed */
366 u32 link_speed; /* in mbps */
367
368 u64 tx_timeout_count;
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369
370 /* Ring sizes */
371 u32 tx_ring_size;
372 u32 rx_ring_size;
53831aa1 373 u32 rx_ring2_size;
f00e2b0a 374
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375 /* Size of buffer in the data ring */
376 u16 txdata_desc_size;
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377 u16 rxdata_desc_size;
378
379 bool rxdataring_enabled;
3c8b3efc 380
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381 struct work_struct work;
382
383 unsigned long state; /* VMXNET3_STATE_BIT_xxx */
384
09c5088e 385 int share_intr;
b0eb57cb 386
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387 struct Vmxnet3_CoalesceScheme *coal_conf;
388 bool default_coal_mode;
389
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390 dma_addr_t adapter_pa;
391 dma_addr_t pm_conf_pa;
392 dma_addr_t rss_conf_pa;
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393};
394
395#define VMXNET3_WRITE_BAR0_REG(adapter, reg, val) \
b8744cab 396 writel((val), (adapter)->hw_addr0 + (reg))
d1a890fa 397#define VMXNET3_READ_BAR0_REG(adapter, reg) \
b8744cab 398 readl((adapter)->hw_addr0 + (reg))
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399
400#define VMXNET3_WRITE_BAR1_REG(adapter, reg, val) \
b8744cab 401 writel((val), (adapter)->hw_addr1 + (reg))
d1a890fa 402#define VMXNET3_READ_BAR1_REG(adapter, reg) \
b8744cab 403 readl((adapter)->hw_addr1 + (reg))
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404
405#define VMXNET3_WAKE_QUEUE_THRESHOLD(tq) (5)
406#define VMXNET3_RX_ALLOC_THRESHOLD(rq, ring_idx, adapter) \
407 ((rq)->rx_ring[ring_idx].size >> 3)
408
409#define VMXNET3_GET_ADDR_LO(dma) ((u32)(dma))
410#define VMXNET3_GET_ADDR_HI(dma) ((u32)(((u64)(dma)) >> 32))
411
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412#define VMXNET3_VERSION_GE_2(adapter) \
413 (adapter->version >= VMXNET3_REV_2 + 1)
414#define VMXNET3_VERSION_GE_3(adapter) \
415 (adapter->version >= VMXNET3_REV_3 + 1)
416
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417/* must be a multiple of VMXNET3_RING_SIZE_ALIGN */
418#define VMXNET3_DEF_TX_RING_SIZE 512
419#define VMXNET3_DEF_RX_RING_SIZE 256
53831aa1 420#define VMXNET3_DEF_RX_RING2_SIZE 128
d1a890fa 421
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422#define VMXNET3_DEF_RXDATA_DESC_SIZE 128
423
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424#define VMXNET3_MAX_ETH_HDR_SIZE 22
425#define VMXNET3_MAX_SKB_BUF_SIZE (3*1024)
426
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427#define VMXNET3_GET_RING_IDX(adapter, rqID) \
428 ((rqID >= adapter->num_rx_queues && \
429 rqID < 2 * adapter->num_rx_queues) ? 1 : 0) \
430
431#define VMXNET3_RX_DATA_RING(adapter, rqID) \
432 (rqID >= 2 * adapter->num_rx_queues && \
433 rqID < 3 * adapter->num_rx_queues) \
434
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435#define VMXNET3_COAL_STATIC_DEFAULT_DEPTH 64
436
437#define VMXNET3_COAL_RBC_RATE(usecs) (1000000 / usecs)
438#define VMXNET3_COAL_RBC_USECS(rbc_rate) (1000000 / rbc_rate)
439
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440int
441vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter);
442
443int
444vmxnet3_activate_dev(struct vmxnet3_adapter *adapter);
445
446void
447vmxnet3_force_close(struct vmxnet3_adapter *adapter);
448
449void
450vmxnet3_reset_dev(struct vmxnet3_adapter *adapter);
451
452void
09c5088e 453vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter);
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454
455void
09c5088e 456vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter);
d1a890fa 457
a0d2730c 458int
c8f44aff 459vmxnet3_set_features(struct net_device *netdev, netdev_features_t features);
a0d2730c 460
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461int
462vmxnet3_create_queues(struct vmxnet3_adapter *adapter,
3c8b3efc 463 u32 tx_ring_size, u32 rx_ring_size, u32 rx_ring2_size,
50a5ce3e 464 u16 txdata_desc_size, u16 rxdata_desc_size);
d1a890fa 465
d8dea1eb 466void vmxnet3_set_ethtool_ops(struct net_device *netdev);
95305f6c 467
bc1f4470 468void vmxnet3_get_stats64(struct net_device *dev,
469 struct rtnl_link_stats64 *stats);
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470
471extern char vmxnet3_driver_name[];
472#endif