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[mirror_ubuntu-artful-kernel.git] / drivers / net / vxge / vxge-main.c
CommitLineData
703da5a1
RV		 1/******************************************************************************
2* This software may be used and distributed according to the terms of
3* the GNU General Public License (GPL), incorporated herein by reference.
4* Drivers based on or derived from this code fall under the GPL and must
5* retain the authorship, copyright and license notice. This file is not
6* a complete program and may only be used when the entire operating
7* system is licensed under the GPL.
8* See the file COPYING in this distribution for more information.
9*
926bd900 10* vxge-main.c: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O
703da5a1 11* Virtualized Server Adapter.
926bd900 12* Copyright(c) 2002-2010 Exar Corp.
703da5a1
RV		 13*
14* The module loadable parameters that are supported by the driver and a brief
15* explanation of all the variables:
16* vlan_tag_strip:
17* Strip VLAN Tag enable/disable. Instructs the device to remove
18* the VLAN tag from all received tagged frames that are not
19* replicated at the internal L2 switch.
20* 0 - Do not strip the VLAN tag.
21* 1 - Strip the VLAN tag.
22*
23* addr_learn_en:
24* Enable learning the mac address of the guest OS interface in
25* a virtualization environment.
26* 0 - DISABLE
27* 1 - ENABLE
28*
29* max_config_port:
30* Maximum number of port to be supported.
31* MIN -1 and MAX - 2
32*
33* max_config_vpath:
34* This configures the maximum no of VPATH configures for each
35* device function.
36* MIN - 1 and MAX - 17
37*
38* max_config_dev:
39* This configures maximum no of Device function to be enabled.
40* MIN - 1 and MAX - 17
41*
42******************************************************************************/
43
75f5e1c6
JP		 44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
703da5a1
RV		 46#include <linux/if_vlan.h>
47#include <linux/pci.h>
5a0e3ad6 48#include <linux/slab.h>
2b05e002 49#include <linux/tcp.h>
703da5a1
RV		 50#include <net/ip.h>
51#include <linux/netdevice.h>
52#include <linux/etherdevice.h>
e8ac1756 53#include <linux/firmware.h>
b81b3733 54#include <linux/net_tstamp.h>
703da5a1
RV		 55#include "vxge-main.h"
56#include "vxge-reg.h"
57
58MODULE_LICENSE("Dual BSD/GPL");
59MODULE_DESCRIPTION("Neterion's X3100 Series 10GbE PCIe I/O"
60 "Virtualized Server Adapter");
61
a3aa1884 62static DEFINE_PCI_DEVICE_TABLE(vxge_id_table) = {
703da5a1
RV		 63 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_WIN, PCI_ANY_ID,
64 PCI_ANY_ID},
65 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_UNI, PCI_ANY_ID,
66 PCI_ANY_ID},
67 {0}
68};
69
70MODULE_DEVICE_TABLE(pci, vxge_id_table);
71
72VXGE_MODULE_PARAM_INT(vlan_tag_strip, VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE);
73VXGE_MODULE_PARAM_INT(addr_learn_en, VXGE_HW_MAC_ADDR_LEARN_DEFAULT);
74VXGE_MODULE_PARAM_INT(max_config_port, VXGE_MAX_CONFIG_PORT);
75VXGE_MODULE_PARAM_INT(max_config_vpath, VXGE_USE_DEFAULT);
76VXGE_MODULE_PARAM_INT(max_mac_vpath, VXGE_MAX_MAC_ADDR_COUNT);
77VXGE_MODULE_PARAM_INT(max_config_dev, VXGE_MAX_CONFIG_DEV);
78
79static u16 vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS] =
80 {0, 1, 3, 3, 7, 7, 7, 7, 15, 15, 15, 15, 15, 15, 15, 15, 31};
81static unsigned int bw_percentage[VXGE_HW_MAX_VIRTUAL_PATHS] =
82 {[0 ...(VXGE_HW_MAX_VIRTUAL_PATHS - 1)] = 0xFF};
83module_param_array(bw_percentage, uint, NULL, 0);
84
85static struct vxge_drv_config *driver_config;
86
87static inline int is_vxge_card_up(struct vxgedev *vdev)
88{
89 return test_bit(__VXGE_STATE_CARD_UP, &vdev->state);
90}
91
92static inline void VXGE_COMPLETE_VPATH_TX(struct vxge_fifo *fifo)
93{
ff67df55
BL		 94 struct sk_buff **skb_ptr = NULL;
95 struct sk_buff **temp;
96#define NR_SKB_COMPLETED 128
97 struct sk_buff *completed[NR_SKB_COMPLETED];
98 int more;
703da5a1 99
ff67df55
BL		 100 do {
101 more = 0;
102 skb_ptr = completed;
103
98f45da2 104 if (__netif_tx_trylock(fifo->txq)) {
ff67df55
BL		 105 vxge_hw_vpath_poll_tx(fifo->handle, &skb_ptr,
106 NR_SKB_COMPLETED, &more);
98f45da2 107 __netif_tx_unlock(fifo->txq);
ff67df55 108 }
98f45da2 109
ff67df55
BL		 110 /* free SKBs */
111 for (temp = completed; temp != skb_ptr; temp++)
112 dev_kfree_skb_irq(*temp);
98f45da2 113 } while (more);
703da5a1
RV		 114}
115
116static inline void VXGE_COMPLETE_ALL_TX(struct vxgedev *vdev)
117{
118 int i;
119
120 /* Complete all transmits */
121 for (i = 0; i < vdev->no_of_vpath; i++)
122 VXGE_COMPLETE_VPATH_TX(&vdev->vpaths[i].fifo);
123}
124
125static inline void VXGE_COMPLETE_ALL_RX(struct vxgedev *vdev)
126{
127 int i;
128 struct vxge_ring *ring;
129
130 /* Complete all receives*/
131 for (i = 0; i < vdev->no_of_vpath; i++) {
132 ring = &vdev->vpaths[i].ring;
133 vxge_hw_vpath_poll_rx(ring->handle);
134 }
135}
136
703da5a1
RV		 137/*
138 * vxge_callback_link_up
139 *
140 * This function is called during interrupt context to notify link up state
141 * change.
142 */
528f7272 143static void vxge_callback_link_up(struct __vxge_hw_device *hldev)
703da5a1
RV		 144{
145 struct net_device *dev = hldev->ndev;
5f54cebb 146 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV		 147
148 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
149 vdev->ndev->name, __func__, __LINE__);
75f5e1c6 150 netdev_notice(vdev->ndev, "Link Up\n");
703da5a1
RV		 151 vdev->stats.link_up++;
152
153 netif_carrier_on(vdev->ndev);
d03848e0 154 netif_tx_wake_all_queues(vdev->ndev);
703da5a1
RV		 155
156 vxge_debug_entryexit(VXGE_TRACE,
157 "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
158}
159
160/*
161 * vxge_callback_link_down
162 *
163 * This function is called during interrupt context to notify link down state
164 * change.
165 */
528f7272 166static void vxge_callback_link_down(struct __vxge_hw_device *hldev)
703da5a1
RV		 167{
168 struct net_device *dev = hldev->ndev;
5f54cebb 169 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV		 170
171 vxge_debug_entryexit(VXGE_TRACE,
172 "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
75f5e1c6 173 netdev_notice(vdev->ndev, "Link Down\n");
703da5a1
RV		 174
175 vdev->stats.link_down++;
176 netif_carrier_off(vdev->ndev);
d03848e0 177 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 178
179 vxge_debug_entryexit(VXGE_TRACE,
180 "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
181}
182
183/*
184 * vxge_rx_alloc
185 *
186 * Allocate SKB.
187 */
528f7272 188static struct sk_buff *
703da5a1
RV		 189vxge_rx_alloc(void *dtrh, struct vxge_ring *ring, const int skb_size)
190{
191 struct net_device *dev;
192 struct sk_buff *skb;
193 struct vxge_rx_priv *rx_priv;
194
195 dev = ring->ndev;
196 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
197 ring->ndev->name, __func__, __LINE__);
198
199 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
200
201 /* try to allocate skb first. this one may fail */
202 skb = netdev_alloc_skb(dev, skb_size +
203 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
204 if (skb == NULL) {
205 vxge_debug_mem(VXGE_ERR,
206 "%s: out of memory to allocate SKB", dev->name);
207 ring->stats.skb_alloc_fail++;
208 return NULL;
209 }
210
211 vxge_debug_mem(VXGE_TRACE,
212 "%s: %s:%d Skb : 0x%p", ring->ndev->name,
213 __func__, __LINE__, skb);
214
215 skb_reserve(skb, VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
216
217 rx_priv->skb = skb;
ea11bbe0 218 rx_priv->skb_data = NULL;
703da5a1
RV		 219 rx_priv->data_size = skb_size;
220 vxge_debug_entryexit(VXGE_TRACE,
221 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
222
223 return skb;
224}
225
226/*
227 * vxge_rx_map
228 */
229static int vxge_rx_map(void *dtrh, struct vxge_ring *ring)
230{
231 struct vxge_rx_priv *rx_priv;
232 dma_addr_t dma_addr;
233
234 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
235 ring->ndev->name, __func__, __LINE__);
236 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
237
ea11bbe0
BL		 238 rx_priv->skb_data = rx_priv->skb->data;
239 dma_addr = pci_map_single(ring->pdev, rx_priv->skb_data,
703da5a1
RV		 240 rx_priv->data_size, PCI_DMA_FROMDEVICE);
241
fa15e99b 242 if (unlikely(pci_dma_mapping_error(ring->pdev, dma_addr))) {
703da5a1
RV		 243 ring->stats.pci_map_fail++;
244 return -EIO;
245 }
246 vxge_debug_mem(VXGE_TRACE,
247 "%s: %s:%d 1 buffer mode dma_addr = 0x%llx",
248 ring->ndev->name, __func__, __LINE__,
249 (unsigned long long)dma_addr);
250 vxge_hw_ring_rxd_1b_set(dtrh, dma_addr, rx_priv->data_size);
251
252 rx_priv->data_dma = dma_addr;
253 vxge_debug_entryexit(VXGE_TRACE,
254 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
255
256 return 0;
257}
258
259/*
260 * vxge_rx_initial_replenish
261 * Allocation of RxD as an initial replenish procedure.
262 */
263static enum vxge_hw_status
264vxge_rx_initial_replenish(void *dtrh, void *userdata)
265{
266 struct vxge_ring *ring = (struct vxge_ring *)userdata;
267 struct vxge_rx_priv *rx_priv;
268
269 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
270 ring->ndev->name, __func__, __LINE__);
271 if (vxge_rx_alloc(dtrh, ring,
272 VXGE_LL_MAX_FRAME_SIZE(ring->ndev)) == NULL)
273 return VXGE_HW_FAIL;
274
275 if (vxge_rx_map(dtrh, ring)) {
276 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
277 dev_kfree_skb(rx_priv->skb);
278
279 return VXGE_HW_FAIL;
280 }
281 vxge_debug_entryexit(VXGE_TRACE,
282 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
283
284 return VXGE_HW_OK;
285}
286
287static inline void
288vxge_rx_complete(struct vxge_ring *ring, struct sk_buff *skb, u16 vlan,
289 int pkt_length, struct vxge_hw_ring_rxd_info *ext_info)
290{
291
292 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
293 ring->ndev->name, __func__, __LINE__);
294 skb_record_rx_queue(skb, ring->driver_id);
295 skb->protocol = eth_type_trans(skb, ring->ndev);
296
297 ring->stats.rx_frms++;
298 ring->stats.rx_bytes += pkt_length;
299
300 if (skb->pkt_type == PACKET_MULTICAST)
301 ring->stats.rx_mcast++;
302
303 vxge_debug_rx(VXGE_TRACE,
304 "%s: %s:%d skb protocol = %d",
305 ring->ndev->name, __func__, __LINE__, skb->protocol);
306
307 if (ring->gro_enable) {
308 if (ring->vlgrp && ext_info->vlan &&
309 (ring->vlan_tag_strip ==
310 VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE))
a5d165b5 311 vlan_gro_receive(ring->napi_p, ring->vlgrp,
703da5a1
RV		 312 ext_info->vlan, skb);
313 else
a5d165b5 314 napi_gro_receive(ring->napi_p, skb);
703da5a1
RV		 315 } else {
316 if (ring->vlgrp && vlan &&
317 (ring->vlan_tag_strip ==
318 VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE))
319 vlan_hwaccel_receive_skb(skb, ring->vlgrp, vlan);
320 else
321 netif_receive_skb(skb);
322 }
323 vxge_debug_entryexit(VXGE_TRACE,
324 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
325}
326
327static inline void vxge_re_pre_post(void *dtr, struct vxge_ring *ring,
328 struct vxge_rx_priv *rx_priv)
329{
330 pci_dma_sync_single_for_device(ring->pdev,
331 rx_priv->data_dma, rx_priv->data_size, PCI_DMA_FROMDEVICE);
332
333 vxge_hw_ring_rxd_1b_set(dtr, rx_priv->data_dma, rx_priv->data_size);
334 vxge_hw_ring_rxd_pre_post(ring->handle, dtr);
335}
336
337static inline void vxge_post(int *dtr_cnt, void **first_dtr,
338 void *post_dtr, struct __vxge_hw_ring *ringh)
339{
340 int dtr_count = *dtr_cnt;
341 if ((*dtr_cnt % VXGE_HW_RXSYNC_FREQ_CNT) == 0) {
342 if (*first_dtr)
343 vxge_hw_ring_rxd_post_post_wmb(ringh, *first_dtr);
344 *first_dtr = post_dtr;
345 } else
346 vxge_hw_ring_rxd_post_post(ringh, post_dtr);
347 dtr_count++;
348 *dtr_cnt = dtr_count;
349}
350
351/*
352 * vxge_rx_1b_compl
353 *
354 * If the interrupt is because of a received frame or if the receive ring
355 * contains fresh as yet un-processed frames, this function is called.
356 */
42821a5b 357static enum vxge_hw_status
703da5a1
RV		 358vxge_rx_1b_compl(struct __vxge_hw_ring *ringh, void *dtr,
359 u8 t_code, void *userdata)
360{
361 struct vxge_ring *ring = (struct vxge_ring *)userdata;
b81b3733 362 struct net_device *dev = ring->ndev;
703da5a1
RV		 363 unsigned int dma_sizes;
364 void *first_dtr = NULL;
365 int dtr_cnt = 0;
366 int data_size;
367 dma_addr_t data_dma;
368 int pkt_length;
369 struct sk_buff *skb;
370 struct vxge_rx_priv *rx_priv;
371 struct vxge_hw_ring_rxd_info ext_info;
372 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
373 ring->ndev->name, __func__, __LINE__);
374 ring->pkts_processed = 0;
375
3363276f 376 vxge_hw_ring_replenish(ringh);
703da5a1
RV		 377
378 do {
3f23e436 379 prefetch((char *)dtr + L1_CACHE_BYTES);
703da5a1
RV		 380 rx_priv = vxge_hw_ring_rxd_private_get(dtr);
381 skb = rx_priv->skb;
382 data_size = rx_priv->data_size;
383 data_dma = rx_priv->data_dma;
ea11bbe0 384 prefetch(rx_priv->skb_data);
703da5a1
RV		 385
386 vxge_debug_rx(VXGE_TRACE,
387 "%s: %s:%d skb = 0x%p",
388 ring->ndev->name, __func__, __LINE__, skb);
389
390 vxge_hw_ring_rxd_1b_get(ringh, dtr, &dma_sizes);
391 pkt_length = dma_sizes;
392
22fa125e
SH		 393 pkt_length -= ETH_FCS_LEN;
394
703da5a1
RV		 395 vxge_debug_rx(VXGE_TRACE,
396 "%s: %s:%d Packet Length = %d",
397 ring->ndev->name, __func__, __LINE__, pkt_length);
398
399 vxge_hw_ring_rxd_1b_info_get(ringh, dtr, &ext_info);
400
401 /* check skb validity */
402 vxge_assert(skb);
403
404 prefetch((char *)skb + L1_CACHE_BYTES);
405 if (unlikely(t_code)) {
703da5a1
RV		 406 if (vxge_hw_ring_handle_tcode(ringh, dtr, t_code) !=
407 VXGE_HW_OK) {
408
409 ring->stats.rx_errors++;
410 vxge_debug_rx(VXGE_TRACE,
411 "%s: %s :%d Rx T_code is %d",
412 ring->ndev->name, __func__,
413 __LINE__, t_code);
414
415 /* If the t_code is not supported and if the
416 * t_code is other than 0x5 (unparseable packet
417 * such as unknown UPV6 header), Drop it !!!
418 */
419 vxge_re_pre_post(dtr, ring, rx_priv);
420
421 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
422 ring->stats.rx_dropped++;
423 continue;
424 }
425 }
426
427 if (pkt_length > VXGE_LL_RX_COPY_THRESHOLD) {
703da5a1 428 if (vxge_rx_alloc(dtr, ring, data_size) != NULL) {
703da5a1
RV		 429 if (!vxge_rx_map(dtr, ring)) {
430 skb_put(skb, pkt_length);
431
432 pci_unmap_single(ring->pdev, data_dma,
433 data_size, PCI_DMA_FROMDEVICE);
434
435 vxge_hw_ring_rxd_pre_post(ringh, dtr);
436 vxge_post(&dtr_cnt, &first_dtr, dtr,
437 ringh);
438 } else {
439 dev_kfree_skb(rx_priv->skb);
440 rx_priv->skb = skb;
441 rx_priv->data_size = data_size;
442 vxge_re_pre_post(dtr, ring, rx_priv);
443
444 vxge_post(&dtr_cnt, &first_dtr, dtr,
445 ringh);
446 ring->stats.rx_dropped++;
447 break;
448 }
449 } else {
450 vxge_re_pre_post(dtr, ring, rx_priv);
451
452 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
453 ring->stats.rx_dropped++;
454 break;
455 }
456 } else {
457 struct sk_buff *skb_up;
458
459 skb_up = netdev_alloc_skb(dev, pkt_length +
460 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
461 if (skb_up != NULL) {
462 skb_reserve(skb_up,
463 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
464
465 pci_dma_sync_single_for_cpu(ring->pdev,
466 data_dma, data_size,
467 PCI_DMA_FROMDEVICE);
468
469 vxge_debug_mem(VXGE_TRACE,
470 "%s: %s:%d skb_up = %p",
471 ring->ndev->name, __func__,
472 __LINE__, skb);
473 memcpy(skb_up->data, skb->data, pkt_length);
474
475 vxge_re_pre_post(dtr, ring, rx_priv);
476
477 vxge_post(&dtr_cnt, &first_dtr, dtr,
478 ringh);
479 /* will netif_rx small SKB instead */
480 skb = skb_up;
481 skb_put(skb, pkt_length);
482 } else {
483 vxge_re_pre_post(dtr, ring, rx_priv);
484
485 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
486 vxge_debug_rx(VXGE_ERR,
487 "%s: vxge_rx_1b_compl: out of "
488 "memory", dev->name);
489 ring->stats.skb_alloc_fail++;
490 break;
491 }
492 }
493
494 if ((ext_info.proto & VXGE_HW_FRAME_PROTO_TCP_OR_UDP) &&
495 !(ext_info.proto & VXGE_HW_FRAME_PROTO_IP_FRAG) &&
496 ring->rx_csum && /* Offload Rx side CSUM */
497 ext_info.l3_cksum == VXGE_HW_L3_CKSUM_OK &&
498 ext_info.l4_cksum == VXGE_HW_L4_CKSUM_OK)
499 skb->ip_summed = CHECKSUM_UNNECESSARY;
500 else
bc8acf2c 501 skb_checksum_none_assert(skb);
703da5a1 502
b81b3733
JM		 503
504 if (ring->rx_hwts) {
505 struct skb_shared_hwtstamps *skb_hwts;
506 u32 ns = *(u32 *)(skb->head + pkt_length);
507
508 skb_hwts = skb_hwtstamps(skb);
509 skb_hwts->hwtstamp = ns_to_ktime(ns);
510 skb_hwts->syststamp.tv64 = 0;
511 }
512
47f01db4
JM		 513 /* rth_hash_type and rth_it_hit are non-zero regardless of
514 * whether rss is enabled. Only the rth_value is zero/non-zero
515 * if rss is disabled/enabled, so key off of that.
516 */
517 if (ext_info.rth_value)
518 skb->rxhash = ext_info.rth_value;
519
703da5a1
RV		 520 vxge_rx_complete(ring, skb, ext_info.vlan,
521 pkt_length, &ext_info);
522
523 ring->budget--;
524 ring->pkts_processed++;
525 if (!ring->budget)
526 break;
527
528 } while (vxge_hw_ring_rxd_next_completed(ringh, &dtr,
529 &t_code) == VXGE_HW_OK);
530
531 if (first_dtr)
532 vxge_hw_ring_rxd_post_post_wmb(ringh, first_dtr);
533
703da5a1
RV		 534 vxge_debug_entryexit(VXGE_TRACE,
535 "%s:%d Exiting...",
536 __func__, __LINE__);
537 return VXGE_HW_OK;
538}
539
540/*
541 * vxge_xmit_compl
542 *
543 * If an interrupt was raised to indicate DMA complete of the Tx packet,
544 * this function is called. It identifies the last TxD whose buffer was
545 * freed and frees all skbs whose data have already DMA'ed into the NICs
546 * internal memory.
547 */
42821a5b 548static enum vxge_hw_status
703da5a1
RV		 549vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, void *dtr,
550 enum vxge_hw_fifo_tcode t_code, void *userdata,
ff67df55 551 struct sk_buff ***skb_ptr, int nr_skb, int *more)
703da5a1
RV		 552{
553 struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
ff67df55 554 struct sk_buff *skb, **done_skb = *skb_ptr;
703da5a1
RV		 555 int pkt_cnt = 0;
556
557 vxge_debug_entryexit(VXGE_TRACE,
558 "%s:%d Entered....", __func__, __LINE__);
559
560 do {
561 int frg_cnt;
562 skb_frag_t *frag;
563 int i = 0, j;
564 struct vxge_tx_priv *txd_priv =
565 vxge_hw_fifo_txdl_private_get(dtr);
566
567 skb = txd_priv->skb;
568 frg_cnt = skb_shinfo(skb)->nr_frags;
569 frag = &skb_shinfo(skb)->frags[0];
570
571 vxge_debug_tx(VXGE_TRACE,
572 "%s: %s:%d fifo_hw = %p dtr = %p "
573 "tcode = 0x%x", fifo->ndev->name, __func__,
574 __LINE__, fifo_hw, dtr, t_code);
575 /* check skb validity */
576 vxge_assert(skb);
577 vxge_debug_tx(VXGE_TRACE,
578 "%s: %s:%d skb = %p itxd_priv = %p frg_cnt = %d",
579 fifo->ndev->name, __func__, __LINE__,
580 skb, txd_priv, frg_cnt);
581 if (unlikely(t_code)) {
582 fifo->stats.tx_errors++;
583 vxge_debug_tx(VXGE_ERR,
584 "%s: tx: dtr %p completed due to "
585 "error t_code %01x", fifo->ndev->name,
586 dtr, t_code);
587 vxge_hw_fifo_handle_tcode(fifo_hw, dtr, t_code);
588 }
589
590 /* for unfragmented skb */
591 pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
592 skb_headlen(skb), PCI_DMA_TODEVICE);
593
594 for (j = 0; j < frg_cnt; j++) {
595 pci_unmap_page(fifo->pdev,
596 txd_priv->dma_buffers[i++],
597 frag->size, PCI_DMA_TODEVICE);
598 frag += 1;
599 }
600
601 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
602
603 /* Updating the statistics block */
604 fifo->stats.tx_frms++;
605 fifo->stats.tx_bytes += skb->len;
606
ff67df55
BL		 607 *done_skb++ = skb;
608
609 if (--nr_skb <= 0) {
610 *more = 1;
611 break;
612 }
703da5a1
RV		 613
614 pkt_cnt++;
615 if (pkt_cnt > fifo->indicate_max_pkts)
616 break;
617
618 } while (vxge_hw_fifo_txdl_next_completed(fifo_hw,
619 &dtr, &t_code) == VXGE_HW_OK);
620
ff67df55 621 *skb_ptr = done_skb;
98f45da2
JM		 622 if (netif_tx_queue_stopped(fifo->txq))
623 netif_tx_wake_queue(fifo->txq);
703da5a1 624
703da5a1
RV		 625 vxge_debug_entryexit(VXGE_TRACE,
626 "%s: %s:%d Exiting...",
627 fifo->ndev->name, __func__, __LINE__);
628 return VXGE_HW_OK;
629}
630
28679751 631/* select a vpath to transmit the packet */
98f45da2 632static u32 vxge_get_vpath_no(struct vxgedev *vdev, struct sk_buff *skb)
703da5a1
RV		 633{
634 u16 queue_len, counter = 0;
635 if (skb->protocol == htons(ETH_P_IP)) {
636 struct iphdr *ip;
637 struct tcphdr *th;
638
639 ip = ip_hdr(skb);
640
641 if ((ip->frag_off & htons(IP_OFFSET|IP_MF)) == 0) {
642 th = (struct tcphdr *)(((unsigned char *)ip) +
643 ip->ihl*4);
644
645 queue_len = vdev->no_of_vpath;
646 counter = (ntohs(th->source) +
647 ntohs(th->dest)) &
648 vdev->vpath_selector[queue_len - 1];
649 if (counter >= queue_len)
650 counter = queue_len - 1;
703da5a1
RV		 651 }
652 }
653 return counter;
654}
655
656static enum vxge_hw_status vxge_search_mac_addr_in_list(
657 struct vxge_vpath *vpath, u64 del_mac)
658{
659 struct list_head *entry, *next;
660 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
661 if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac)
662 return TRUE;
663 }
664 return FALSE;
665}
666
528f7272
JM		 667static int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac)
668{
669 struct vxge_mac_addrs *new_mac_entry;
670 u8 *mac_address = NULL;
671
672 if (vpath->mac_addr_cnt >= VXGE_MAX_LEARN_MAC_ADDR_CNT)
673 return TRUE;
674
675 new_mac_entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_ATOMIC);
676 if (!new_mac_entry) {
677 vxge_debug_mem(VXGE_ERR,
678 "%s: memory allocation failed",
679 VXGE_DRIVER_NAME);
680 return FALSE;
681 }
682
683 list_add(&new_mac_entry->item, &vpath->mac_addr_list);
684
685 /* Copy the new mac address to the list */
686 mac_address = (u8 *)&new_mac_entry->macaddr;
687 memcpy(mac_address, mac->macaddr, ETH_ALEN);
688
689 new_mac_entry->state = mac->state;
690 vpath->mac_addr_cnt++;
691
692 /* Is this a multicast address */
693 if (0x01 & mac->macaddr[0])
694 vpath->mcast_addr_cnt++;
695
696 return TRUE;
697}
698
699/* Add a mac address to DA table */
700static enum vxge_hw_status
701vxge_add_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
702{
703 enum vxge_hw_status status = VXGE_HW_OK;
704 struct vxge_vpath *vpath;
705 enum vxge_hw_vpath_mac_addr_add_mode duplicate_mode;
706
707 if (0x01 & mac->macaddr[0]) /* multicast address */
708 duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE;
709 else
710 duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_REPLACE_DUPLICATE;
711
712 vpath = &vdev->vpaths[mac->vpath_no];
713 status = vxge_hw_vpath_mac_addr_add(vpath->handle, mac->macaddr,
714 mac->macmask, duplicate_mode);
715 if (status != VXGE_HW_OK) {
716 vxge_debug_init(VXGE_ERR,
717 "DA config add entry failed for vpath:%d",
718 vpath->device_id);
719 } else
720 if (FALSE == vxge_mac_list_add(vpath, mac))
721 status = -EPERM;
722
723 return status;
724}
725
703da5a1
RV		 726static int vxge_learn_mac(struct vxgedev *vdev, u8 *mac_header)
727{
728 struct macInfo mac_info;
729 u8 *mac_address = NULL;
730 u64 mac_addr = 0, vpath_vector = 0;
731 int vpath_idx = 0;
732 enum vxge_hw_status status = VXGE_HW_OK;
733 struct vxge_vpath *vpath = NULL;
734 struct __vxge_hw_device *hldev;
735
d8ee7071 736 hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 737
738 mac_address = (u8 *)&mac_addr;
739 memcpy(mac_address, mac_header, ETH_ALEN);
740
741 /* Is this mac address already in the list? */
742 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
743 vpath = &vdev->vpaths[vpath_idx];
744 if (vxge_search_mac_addr_in_list(vpath, mac_addr))
745 return vpath_idx;
746 }
747
748 memset(&mac_info, 0, sizeof(struct macInfo));
749 memcpy(mac_info.macaddr, mac_header, ETH_ALEN);
750
751 /* Any vpath has room to add mac address to its da table? */
752 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
753 vpath = &vdev->vpaths[vpath_idx];
754 if (vpath->mac_addr_cnt < vpath->max_mac_addr_cnt) {
755 /* Add this mac address to this vpath */
756 mac_info.vpath_no = vpath_idx;
757 mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
758 status = vxge_add_mac_addr(vdev, &mac_info);
759 if (status != VXGE_HW_OK)
760 return -EPERM;
761 return vpath_idx;
762 }
763 }
764
765 mac_info.state = VXGE_LL_MAC_ADDR_IN_LIST;
766 vpath_idx = 0;
767 mac_info.vpath_no = vpath_idx;
768 /* Is the first vpath already selected as catch-basin ? */
769 vpath = &vdev->vpaths[vpath_idx];
770 if (vpath->mac_addr_cnt > vpath->max_mac_addr_cnt) {
771 /* Add this mac address to this vpath */
772 if (FALSE == vxge_mac_list_add(vpath, &mac_info))
773 return -EPERM;
774 return vpath_idx;
775 }
776
777 /* Select first vpath as catch-basin */
778 vpath_vector = vxge_mBIT(vpath->device_id);
779 status = vxge_hw_mgmt_reg_write(vpath->vdev->devh,
780 vxge_hw_mgmt_reg_type_mrpcim,
781 0,
782 (ulong)offsetof(
783 struct vxge_hw_mrpcim_reg,
784 rts_mgr_cbasin_cfg),
785 vpath_vector);
786 if (status != VXGE_HW_OK) {
787 vxge_debug_tx(VXGE_ERR,
788 "%s: Unable to set the vpath-%d in catch-basin mode",
789 VXGE_DRIVER_NAME, vpath->device_id);
790 return -EPERM;
791 }
792
793 if (FALSE == vxge_mac_list_add(vpath, &mac_info))
794 return -EPERM;
795
796 return vpath_idx;
797}
798
799/**
800 * vxge_xmit
801 * @skb : the socket buffer containing the Tx data.
802 * @dev : device pointer.
803 *
804 * This function is the Tx entry point of the driver. Neterion NIC supports
805 * certain protocol assist features on Tx side, namely CSO, S/G, LSO.
703da5a1 806*/
61357325 807static netdev_tx_t
703da5a1
RV		 808vxge_xmit(struct sk_buff *skb, struct net_device *dev)
809{
810 struct vxge_fifo *fifo = NULL;
811 void *dtr_priv;
812 void *dtr = NULL;
813 struct vxgedev *vdev = NULL;
814 enum vxge_hw_status status;
815 int frg_cnt, first_frg_len;
816 skb_frag_t *frag;
817 int i = 0, j = 0, avail;
818 u64 dma_pointer;
819 struct vxge_tx_priv *txdl_priv = NULL;
820 struct __vxge_hw_fifo *fifo_hw;
703da5a1 821 int offload_type;
703da5a1 822 int vpath_no = 0;
703da5a1
RV		 823
824 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
825 dev->name, __func__, __LINE__);
826
827 /* A buffer with no data will be dropped */
828 if (unlikely(skb->len <= 0)) {
829 vxge_debug_tx(VXGE_ERR,
830 "%s: Buffer has no data..", dev->name);
831 dev_kfree_skb(skb);
832 return NETDEV_TX_OK;
833 }
834
5f54cebb 835 vdev = netdev_priv(dev);
703da5a1
RV		 836
837 if (unlikely(!is_vxge_card_up(vdev))) {
838 vxge_debug_tx(VXGE_ERR,
839 "%s: vdev not initialized", dev->name);
840 dev_kfree_skb(skb);
841 return NETDEV_TX_OK;
842 }
843
844 if (vdev->config.addr_learn_en) {
845 vpath_no = vxge_learn_mac(vdev, skb->data + ETH_ALEN);
846 if (vpath_no == -EPERM) {
847 vxge_debug_tx(VXGE_ERR,
848 "%s: Failed to store the mac address",
849 dev->name);
850 dev_kfree_skb(skb);
851 return NETDEV_TX_OK;
852 }
853 }
854
855 if (vdev->config.tx_steering_type == TX_MULTIQ_STEERING)
856 vpath_no = skb_get_queue_mapping(skb);
857 else if (vdev->config.tx_steering_type == TX_PORT_STEERING)
98f45da2 858 vpath_no = vxge_get_vpath_no(vdev, skb);
703da5a1
RV		 859
860 vxge_debug_tx(VXGE_TRACE, "%s: vpath_no= %d", dev->name, vpath_no);
861
862 if (vpath_no >= vdev->no_of_vpath)
863 vpath_no = 0;
864
865 fifo = &vdev->vpaths[vpath_no].fifo;
866 fifo_hw = fifo->handle;
867
98f45da2 868 if (netif_tx_queue_stopped(fifo->txq))
d03848e0 869 return NETDEV_TX_BUSY;
d03848e0 870
703da5a1
RV		 871 avail = vxge_hw_fifo_free_txdl_count_get(fifo_hw);
872 if (avail == 0) {
873 vxge_debug_tx(VXGE_ERR,
874 "%s: No free TXDs available", dev->name);
875 fifo->stats.txd_not_free++;
98f45da2 876 goto _exit0;
703da5a1
RV		 877 }
878
4403b371
BL		 879 /* Last TXD? Stop tx queue to avoid dropping packets. TX
880 * completion will resume the queue.
881 */
882 if (avail == 1)
98f45da2 883 netif_tx_stop_queue(fifo->txq);
4403b371 884
703da5a1
RV		 885 status = vxge_hw_fifo_txdl_reserve(fifo_hw, &dtr, &dtr_priv);
886 if (unlikely(status != VXGE_HW_OK)) {
887 vxge_debug_tx(VXGE_ERR,
888 "%s: Out of descriptors .", dev->name);
889 fifo->stats.txd_out_of_desc++;
98f45da2 890 goto _exit0;
703da5a1
RV		 891 }
892
893 vxge_debug_tx(VXGE_TRACE,
894 "%s: %s:%d fifo_hw = %p dtr = %p dtr_priv = %p",
895 dev->name, __func__, __LINE__,
896 fifo_hw, dtr, dtr_priv);
897
eab6d18d 898 if (vlan_tx_tag_present(skb)) {
703da5a1
RV		 899 u16 vlan_tag = vlan_tx_tag_get(skb);
900 vxge_hw_fifo_txdl_vlan_set(dtr, vlan_tag);
901 }
902
903 first_frg_len = skb_headlen(skb);
904
905 dma_pointer = pci_map_single(fifo->pdev, skb->data, first_frg_len,
906 PCI_DMA_TODEVICE);
907
908 if (unlikely(pci_dma_mapping_error(fifo->pdev, dma_pointer))) {
909 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
703da5a1 910 fifo->stats.pci_map_fail++;
98f45da2 911 goto _exit0;
703da5a1
RV		 912 }
913
914 txdl_priv = vxge_hw_fifo_txdl_private_get(dtr);
915 txdl_priv->skb = skb;
916 txdl_priv->dma_buffers[j] = dma_pointer;
917
918 frg_cnt = skb_shinfo(skb)->nr_frags;
919 vxge_debug_tx(VXGE_TRACE,
920 "%s: %s:%d skb = %p txdl_priv = %p "
921 "frag_cnt = %d dma_pointer = 0x%llx", dev->name,
922 __func__, __LINE__, skb, txdl_priv,
923 frg_cnt, (unsigned long long)dma_pointer);
924
925 vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
926 first_frg_len);
927
928 frag = &skb_shinfo(skb)->frags[0];
929 for (i = 0; i < frg_cnt; i++) {
930 /* ignore 0 length fragment */
931 if (!frag->size)
932 continue;
933
98f45da2 934 dma_pointer = (u64) pci_map_page(fifo->pdev, frag->page,
703da5a1
RV		 935 frag->page_offset, frag->size,
936 PCI_DMA_TODEVICE);
937
938 if (unlikely(pci_dma_mapping_error(fifo->pdev, dma_pointer)))
98f45da2 939 goto _exit2;
703da5a1
RV		 940 vxge_debug_tx(VXGE_TRACE,
941 "%s: %s:%d frag = %d dma_pointer = 0x%llx",
942 dev->name, __func__, __LINE__, i,
943 (unsigned long long)dma_pointer);
944
945 txdl_priv->dma_buffers[j] = dma_pointer;
946 vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
947 frag->size);
948 frag += 1;
949 }
950
951 offload_type = vxge_offload_type(skb);
952
953 if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
703da5a1
RV		 954 int mss = vxge_tcp_mss(skb);
955 if (mss) {
98f45da2 956 vxge_debug_tx(VXGE_TRACE, "%s: %s:%d mss = %d",
703da5a1
RV		 957 dev->name, __func__, __LINE__, mss);
958 vxge_hw_fifo_txdl_mss_set(dtr, mss);
959 } else {
960 vxge_assert(skb->len <=
961 dev->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE);
962 vxge_assert(0);
963 goto _exit1;
964 }
965 }
966
967 if (skb->ip_summed == CHECKSUM_PARTIAL)
968 vxge_hw_fifo_txdl_cksum_set_bits(dtr,
969 VXGE_HW_FIFO_TXD_TX_CKO_IPV4_EN |
970 VXGE_HW_FIFO_TXD_TX_CKO_TCP_EN |
971 VXGE_HW_FIFO_TXD_TX_CKO_UDP_EN);
972
973 vxge_hw_fifo_txdl_post(fifo_hw, dtr);
703da5a1 974
703da5a1
RV		 975 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
976 dev->name, __func__, __LINE__);
6ed10654 977 return NETDEV_TX_OK;
703da5a1 978
98f45da2 979_exit2:
703da5a1 980 vxge_debug_tx(VXGE_TRACE, "%s: pci_map_page failed", dev->name);
703da5a1
RV		 981_exit1:
982 j = 0;
983 frag = &skb_shinfo(skb)->frags[0];
984
985 pci_unmap_single(fifo->pdev, txdl_priv->dma_buffers[j++],
986 skb_headlen(skb), PCI_DMA_TODEVICE);
987
988 for (; j < i; j++) {
989 pci_unmap_page(fifo->pdev, txdl_priv->dma_buffers[j],
990 frag->size, PCI_DMA_TODEVICE);
991 frag += 1;
992 }
993
994 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
98f45da2
JM		 995_exit0:
996 netif_tx_stop_queue(fifo->txq);
703da5a1 997 dev_kfree_skb(skb);
703da5a1 998
6ed10654 999 return NETDEV_TX_OK;
703da5a1
RV		 1000}
1001
1002/*
1003 * vxge_rx_term
1004 *
1005 * Function will be called by hw function to abort all outstanding receive
1006 * descriptors.
1007 */
1008static void
1009vxge_rx_term(void *dtrh, enum vxge_hw_rxd_state state, void *userdata)
1010{
1011 struct vxge_ring *ring = (struct vxge_ring *)userdata;
1012 struct vxge_rx_priv *rx_priv =
1013 vxge_hw_ring_rxd_private_get(dtrh);
1014
1015 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
1016 ring->ndev->name, __func__, __LINE__);
1017 if (state != VXGE_HW_RXD_STATE_POSTED)
1018 return;
1019
1020 pci_unmap_single(ring->pdev, rx_priv->data_dma,
1021 rx_priv->data_size, PCI_DMA_FROMDEVICE);
1022
1023 dev_kfree_skb(rx_priv->skb);
ea11bbe0 1024 rx_priv->skb_data = NULL;
703da5a1
RV		 1025
1026 vxge_debug_entryexit(VXGE_TRACE,
1027 "%s: %s:%d Exiting...",
1028 ring->ndev->name, __func__, __LINE__);
1029}
1030
1031/*
1032 * vxge_tx_term
1033 *
1034 * Function will be called to abort all outstanding tx descriptors
1035 */
1036static void
1037vxge_tx_term(void *dtrh, enum vxge_hw_txdl_state state, void *userdata)
1038{
1039 struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
1040 skb_frag_t *frag;
1041 int i = 0, j, frg_cnt;
1042 struct vxge_tx_priv *txd_priv = vxge_hw_fifo_txdl_private_get(dtrh);
1043 struct sk_buff *skb = txd_priv->skb;
1044
1045 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1046
1047 if (state != VXGE_HW_TXDL_STATE_POSTED)
1048 return;
1049
1050 /* check skb validity */
1051 vxge_assert(skb);
1052 frg_cnt = skb_shinfo(skb)->nr_frags;
1053 frag = &skb_shinfo(skb)->frags[0];
1054
1055 /* for unfragmented skb */
1056 pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
1057 skb_headlen(skb), PCI_DMA_TODEVICE);
1058
1059 for (j = 0; j < frg_cnt; j++) {
1060 pci_unmap_page(fifo->pdev, txd_priv->dma_buffers[i++],
1061 frag->size, PCI_DMA_TODEVICE);
1062 frag += 1;
1063 }
1064
1065 dev_kfree_skb(skb);
1066
1067 vxge_debug_entryexit(VXGE_TRACE,
1068 "%s:%d Exiting...", __func__, __LINE__);
1069}
1070
528f7272
JM		 1071static int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac)
1072{
1073 struct list_head *entry, *next;
1074 u64 del_mac = 0;
1075 u8 *mac_address = (u8 *) (&del_mac);
1076
1077 /* Copy the mac address to delete from the list */
1078 memcpy(mac_address, mac->macaddr, ETH_ALEN);
1079
1080 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
1081 if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac) {
1082 list_del(entry);
1083 kfree((struct vxge_mac_addrs *)entry);
1084 vpath->mac_addr_cnt--;
1085
1086 /* Is this a multicast address */
1087 if (0x01 & mac->macaddr[0])
1088 vpath->mcast_addr_cnt--;
1089 return TRUE;
1090 }
1091 }
1092
1093 return FALSE;
1094}
1095
1096/* delete a mac address from DA table */
1097static enum vxge_hw_status
1098vxge_del_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
1099{
1100 enum vxge_hw_status status = VXGE_HW_OK;
1101 struct vxge_vpath *vpath;
1102
1103 vpath = &vdev->vpaths[mac->vpath_no];
1104 status = vxge_hw_vpath_mac_addr_delete(vpath->handle, mac->macaddr,
1105 mac->macmask);
1106 if (status != VXGE_HW_OK) {
1107 vxge_debug_init(VXGE_ERR,
1108 "DA config delete entry failed for vpath:%d",
1109 vpath->device_id);
1110 } else
1111 vxge_mac_list_del(vpath, mac);
1112 return status;
1113}
1114
703da5a1
RV		 1115/**
1116 * vxge_set_multicast
1117 * @dev: pointer to the device structure
1118 *
1119 * Entry point for multicast address enable/disable
1120 * This function is a driver entry point which gets called by the kernel
1121 * whenever multicast addresses must be enabled/disabled. This also gets
1122 * called to set/reset promiscuous mode. Depending on the deivce flag, we
1123 * determine, if multicast address must be enabled or if promiscuous mode
1124 * is to be disabled etc.
1125 */
1126static void vxge_set_multicast(struct net_device *dev)
1127{
22bedad3 1128 struct netdev_hw_addr *ha;
703da5a1
RV		 1129 struct vxgedev *vdev;
1130 int i, mcast_cnt = 0;
7adf7d1b
JM		 1131 struct __vxge_hw_device *hldev;
1132 struct vxge_vpath *vpath;
703da5a1
RV		 1133 enum vxge_hw_status status = VXGE_HW_OK;
1134 struct macInfo mac_info;
1135 int vpath_idx = 0;
1136 struct vxge_mac_addrs *mac_entry;
1137 struct list_head *list_head;
1138 struct list_head *entry, *next;
1139 u8 *mac_address = NULL;
1140
1141 vxge_debug_entryexit(VXGE_TRACE,
1142 "%s:%d", __func__, __LINE__);
1143
5f54cebb 1144 vdev = netdev_priv(dev);
703da5a1
RV		 1145 hldev = (struct __vxge_hw_device *)vdev->devh;
1146
1147 if (unlikely(!is_vxge_card_up(vdev)))
1148 return;
1149
1150 if ((dev->flags & IFF_ALLMULTI) && (!vdev->all_multi_flg)) {
1151 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 1152 vpath = &vdev->vpaths[i];
1153 vxge_assert(vpath->is_open);
1154 status = vxge_hw_vpath_mcast_enable(vpath->handle);
1155 if (status != VXGE_HW_OK)
1156 vxge_debug_init(VXGE_ERR, "failed to enable "
1157 "multicast, status %d", status);
703da5a1
RV		 1158 vdev->all_multi_flg = 1;
1159 }
7adf7d1b 1160 } else if (!(dev->flags & IFF_ALLMULTI) && (vdev->all_multi_flg)) {
703da5a1 1161 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 1162 vpath = &vdev->vpaths[i];
1163 vxge_assert(vpath->is_open);
1164 status = vxge_hw_vpath_mcast_disable(vpath->handle);
1165 if (status != VXGE_HW_OK)
1166 vxge_debug_init(VXGE_ERR, "failed to disable "
1167 "multicast, status %d", status);
1168 vdev->all_multi_flg = 0;
703da5a1
RV		 1169 }
1170 }
1171
703da5a1
RV		 1172
1173 if (!vdev->config.addr_learn_en) {
7adf7d1b
JM		 1174 for (i = 0; i < vdev->no_of_vpath; i++) {
1175 vpath = &vdev->vpaths[i];
1176 vxge_assert(vpath->is_open);
1177
1178 if (dev->flags & IFF_PROMISC)
703da5a1 1179 status = vxge_hw_vpath_promisc_enable(
7adf7d1b
JM		 1180 vpath->handle);
1181 else
703da5a1 1182 status = vxge_hw_vpath_promisc_disable(
7adf7d1b
JM		 1183 vpath->handle);
1184 if (status != VXGE_HW_OK)
1185 vxge_debug_init(VXGE_ERR, "failed to %s promisc"
1186 ", status %d", dev->flags&IFF_PROMISC ?
1187 "enable" : "disable", status);
703da5a1
RV		 1188 }
1189 }
1190
1191 memset(&mac_info, 0, sizeof(struct macInfo));
1192 /* Update individual M_CAST address list */
4cd24eaf 1193 if ((!vdev->all_multi_flg) && netdev_mc_count(dev)) {
703da5a1
RV		 1194 mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
1195 list_head = &vdev->vpaths[0].mac_addr_list;
4cd24eaf 1196 if ((netdev_mc_count(dev) +
703da5a1
RV		 1197 (vdev->vpaths[0].mac_addr_cnt - mcast_cnt)) >
1198 vdev->vpaths[0].max_mac_addr_cnt)
1199 goto _set_all_mcast;
1200
1201 /* Delete previous MC's */
1202 for (i = 0; i < mcast_cnt; i++) {
703da5a1 1203 list_for_each_safe(entry, next, list_head) {
2c91308f 1204 mac_entry = (struct vxge_mac_addrs *)entry;
703da5a1
RV		 1205 /* Copy the mac address to delete */
1206 mac_address = (u8 *)&mac_entry->macaddr;
1207 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1208
1209 /* Is this a multicast address */
1210 if (0x01 & mac_info.macaddr[0]) {
1211 for (vpath_idx = 0; vpath_idx <
1212 vdev->no_of_vpath;
1213 vpath_idx++) {
1214 mac_info.vpath_no = vpath_idx;
1215 status = vxge_del_mac_addr(
1216 vdev,
1217 &mac_info);
1218 }
1219 }
1220 }
1221 }
1222
1223 /* Add new ones */
22bedad3
JP		 1224 netdev_for_each_mc_addr(ha, dev) {
1225 memcpy(mac_info.macaddr, ha->addr, ETH_ALEN);
703da5a1
RV		 1226 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
1227 vpath_idx++) {
1228 mac_info.vpath_no = vpath_idx;
1229 mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1230 status = vxge_add_mac_addr(vdev, &mac_info);
1231 if (status != VXGE_HW_OK) {
1232 vxge_debug_init(VXGE_ERR,
1233 "%s:%d Setting individual"
1234 "multicast address failed",
1235 __func__, __LINE__);
1236 goto _set_all_mcast;
1237 }
1238 }
1239 }
1240
1241 return;
1242_set_all_mcast:
1243 mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
1244 /* Delete previous MC's */
1245 for (i = 0; i < mcast_cnt; i++) {
703da5a1 1246 list_for_each_safe(entry, next, list_head) {
2c91308f 1247 mac_entry = (struct vxge_mac_addrs *)entry;
703da5a1
RV		 1248 /* Copy the mac address to delete */
1249 mac_address = (u8 *)&mac_entry->macaddr;
1250 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1251
1252 /* Is this a multicast address */
1253 if (0x01 & mac_info.macaddr[0])
1254 break;
1255 }
1256
1257 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
1258 vpath_idx++) {
1259 mac_info.vpath_no = vpath_idx;
1260 status = vxge_del_mac_addr(vdev, &mac_info);
1261 }
1262 }
1263
1264 /* Enable all multicast */
1265 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 1266 vpath = &vdev->vpaths[i];
1267 vxge_assert(vpath->is_open);
1268
1269 status = vxge_hw_vpath_mcast_enable(vpath->handle);
703da5a1
RV		 1270 if (status != VXGE_HW_OK) {
1271 vxge_debug_init(VXGE_ERR,
1272 "%s:%d Enabling all multicasts failed",
1273 __func__, __LINE__);
1274 }
1275 vdev->all_multi_flg = 1;
1276 }
1277 dev->flags |= IFF_ALLMULTI;
1278 }
1279
1280 vxge_debug_entryexit(VXGE_TRACE,
1281 "%s:%d Exiting...", __func__, __LINE__);
1282}
1283
1284/**
1285 * vxge_set_mac_addr
1286 * @dev: pointer to the device structure
1287 *
1288 * Update entry "0" (default MAC addr)
1289 */
1290static int vxge_set_mac_addr(struct net_device *dev, void *p)
1291{
1292 struct sockaddr *addr = p;
1293 struct vxgedev *vdev;
2c91308f 1294 struct __vxge_hw_device *hldev;
703da5a1
RV		 1295 enum vxge_hw_status status = VXGE_HW_OK;
1296 struct macInfo mac_info_new, mac_info_old;
1297 int vpath_idx = 0;
1298
1299 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1300
5f54cebb 1301 vdev = netdev_priv(dev);
703da5a1
RV		 1302 hldev = vdev->devh;
1303
1304 if (!is_valid_ether_addr(addr->sa_data))
1305 return -EINVAL;
1306
1307 memset(&mac_info_new, 0, sizeof(struct macInfo));
1308 memset(&mac_info_old, 0, sizeof(struct macInfo));
1309
1310 vxge_debug_entryexit(VXGE_TRACE, "%s:%d Exiting...",
1311 __func__, __LINE__);
1312
1313 /* Get the old address */
1314 memcpy(mac_info_old.macaddr, dev->dev_addr, dev->addr_len);
1315
1316 /* Copy the new address */
1317 memcpy(mac_info_new.macaddr, addr->sa_data, dev->addr_len);
1318
1319 /* First delete the old mac address from all the vpaths
1320 as we can't specify the index while adding new mac address */
1321 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
1322 struct vxge_vpath *vpath = &vdev->vpaths[vpath_idx];
1323 if (!vpath->is_open) {
1324 /* This can happen when this interface is added/removed
1325 to the bonding interface. Delete this station address
1326 from the linked list */
1327 vxge_mac_list_del(vpath, &mac_info_old);
1328
1329 /* Add this new address to the linked list
1330 for later restoring */
1331 vxge_mac_list_add(vpath, &mac_info_new);
1332
1333 continue;
1334 }
1335 /* Delete the station address */
1336 mac_info_old.vpath_no = vpath_idx;
1337 status = vxge_del_mac_addr(vdev, &mac_info_old);
1338 }
1339
1340 if (unlikely(!is_vxge_card_up(vdev))) {
1341 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1342 return VXGE_HW_OK;
1343 }
1344
1345 /* Set this mac address to all the vpaths */
1346 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
1347 mac_info_new.vpath_no = vpath_idx;
1348 mac_info_new.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1349 status = vxge_add_mac_addr(vdev, &mac_info_new);
1350 if (status != VXGE_HW_OK)
1351 return -EINVAL;
1352 }
1353
1354 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1355
1356 return status;
1357}
1358
1359/*
1360 * vxge_vpath_intr_enable
1361 * @vdev: pointer to vdev
1362 * @vp_id: vpath for which to enable the interrupts
1363 *
1364 * Enables the interrupts for the vpath
1365*/
42821a5b 1366static void vxge_vpath_intr_enable(struct vxgedev *vdev, int vp_id)
703da5a1
RV		 1367{
1368 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
b59c9457
SH		 1369 int msix_id = 0;
1370 int tim_msix_id[4] = {0, 1, 0, 0};
1371 int alarm_msix_id = VXGE_ALARM_MSIX_ID;
703da5a1
RV		 1372
1373 vxge_hw_vpath_intr_enable(vpath->handle);
1374
1375 if (vdev->config.intr_type == INTA)
1376 vxge_hw_vpath_inta_unmask_tx_rx(vpath->handle);
1377 else {
703da5a1
RV		 1378 vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
1379 alarm_msix_id);
1380
b59c9457 1381 msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
703da5a1
RV		 1382 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
1383 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id + 1);
1384
1385 /* enable the alarm vector */
b59c9457
SH		 1386 msix_id = (vpath->handle->vpath->hldev->first_vp_id *
1387 VXGE_HW_VPATH_MSIX_ACTIVE) + alarm_msix_id;
1388 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
703da5a1
RV		 1389 }
1390}
1391
1392/*
1393 * vxge_vpath_intr_disable
1394 * @vdev: pointer to vdev
1395 * @vp_id: vpath for which to disable the interrupts
1396 *
1397 * Disables the interrupts for the vpath
1398*/
42821a5b 1399static void vxge_vpath_intr_disable(struct vxgedev *vdev, int vp_id)
703da5a1
RV		 1400{
1401 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
4d2a5b40 1402 struct __vxge_hw_device *hldev;
703da5a1
RV		 1403 int msix_id;
1404
d8ee7071 1405 hldev = pci_get_drvdata(vdev->pdev);
4d2a5b40
JM		 1406
1407 vxge_hw_vpath_wait_receive_idle(hldev, vpath->device_id);
1408
703da5a1
RV		 1409 vxge_hw_vpath_intr_disable(vpath->handle);
1410
1411 if (vdev->config.intr_type == INTA)
1412 vxge_hw_vpath_inta_mask_tx_rx(vpath->handle);
1413 else {
b59c9457 1414 msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
703da5a1
RV		 1415 vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
1416 vxge_hw_vpath_msix_mask(vpath->handle, msix_id + 1);
1417
1418 /* disable the alarm vector */
b59c9457
SH		 1419 msix_id = (vpath->handle->vpath->hldev->first_vp_id *
1420 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
703da5a1
RV		 1421 vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
1422 }
1423}
1424
528f7272
JM		 1425/* list all mac addresses from DA table */
1426static enum vxge_hw_status
1427vxge_search_mac_addr_in_da_table(struct vxge_vpath *vpath, struct macInfo *mac)
1428{
1429 enum vxge_hw_status status = VXGE_HW_OK;
1430 unsigned char macmask[ETH_ALEN];
1431 unsigned char macaddr[ETH_ALEN];
1432
1433 status = vxge_hw_vpath_mac_addr_get(vpath->handle,
1434 macaddr, macmask);
1435 if (status != VXGE_HW_OK) {
1436 vxge_debug_init(VXGE_ERR,
1437 "DA config list entry failed for vpath:%d",
1438 vpath->device_id);
1439 return status;
1440 }
1441
1442 while (memcmp(mac->macaddr, macaddr, ETH_ALEN)) {
1443 status = vxge_hw_vpath_mac_addr_get_next(vpath->handle,
1444 macaddr, macmask);
1445 if (status != VXGE_HW_OK)
1446 break;
1447 }
1448
1449 return status;
1450}
1451
1452/* Store all mac addresses from the list to the DA table */
1453static enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath)
1454{
1455 enum vxge_hw_status status = VXGE_HW_OK;
1456 struct macInfo mac_info;
1457 u8 *mac_address = NULL;
1458 struct list_head *entry, *next;
1459
1460 memset(&mac_info, 0, sizeof(struct macInfo));
1461
1462 if (vpath->is_open) {
1463 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
1464 mac_address =
1465 (u8 *)&
1466 ((struct vxge_mac_addrs *)entry)->macaddr;
1467 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1468 ((struct vxge_mac_addrs *)entry)->state =
1469 VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1470 /* does this mac address already exist in da table? */
1471 status = vxge_search_mac_addr_in_da_table(vpath,
1472 &mac_info);
1473 if (status != VXGE_HW_OK) {
1474 /* Add this mac address to the DA table */
1475 status = vxge_hw_vpath_mac_addr_add(
1476 vpath->handle, mac_info.macaddr,
1477 mac_info.macmask,
1478 VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE);
1479 if (status != VXGE_HW_OK) {
1480 vxge_debug_init(VXGE_ERR,
1481 "DA add entry failed for vpath:%d",
1482 vpath->device_id);
1483 ((struct vxge_mac_addrs *)entry)->state
1484 = VXGE_LL_MAC_ADDR_IN_LIST;
1485 }
1486 }
1487 }
1488 }
1489
1490 return status;
1491}
1492
1493/* Store all vlan ids from the list to the vid table */
1494static enum vxge_hw_status
1495vxge_restore_vpath_vid_table(struct vxge_vpath *vpath)
1496{
1497 enum vxge_hw_status status = VXGE_HW_OK;
1498 struct vxgedev *vdev = vpath->vdev;
1499 u16 vid;
1500
1501 if (vdev->vlgrp && vpath->is_open) {
1502
1503 for (vid = 0; vid < VLAN_N_VID; vid++) {
1504 if (!vlan_group_get_device(vdev->vlgrp, vid))
1505 continue;
1506 /* Add these vlan to the vid table */
1507 status = vxge_hw_vpath_vid_add(vpath->handle, vid);
1508 }
1509 }
1510
1511 return status;
1512}
1513
703da5a1
RV		 1514/*
1515 * vxge_reset_vpath
1516 * @vdev: pointer to vdev
1517 * @vp_id: vpath to reset
1518 *
1519 * Resets the vpath
1520*/
1521static int vxge_reset_vpath(struct vxgedev *vdev, int vp_id)
1522{
1523 enum vxge_hw_status status = VXGE_HW_OK;
7adf7d1b 1524 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
703da5a1
RV		 1525 int ret = 0;
1526
1527 /* check if device is down already */
1528 if (unlikely(!is_vxge_card_up(vdev)))
1529 return 0;
1530
1531 /* is device reset already scheduled */
1532 if (test_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
1533 return 0;
1534
7adf7d1b
JM		 1535 if (vpath->handle) {
1536 if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
703da5a1 1537 if (is_vxge_card_up(vdev) &&
7adf7d1b 1538 vxge_hw_vpath_recover_from_reset(vpath->handle)
703da5a1
RV		 1539 != VXGE_HW_OK) {
1540 vxge_debug_init(VXGE_ERR,
1541 "vxge_hw_vpath_recover_from_reset"
1542 "failed for vpath:%d", vp_id);
1543 return status;
1544 }
1545 } else {
1546 vxge_debug_init(VXGE_ERR,
1547 "vxge_hw_vpath_reset failed for"
1548 "vpath:%d", vp_id);
1549 return status;
1550 }
1551 } else
1552 return VXGE_HW_FAIL;
1553
7adf7d1b
JM		 1554 vxge_restore_vpath_mac_addr(vpath);
1555 vxge_restore_vpath_vid_table(vpath);
703da5a1
RV		 1556
1557 /* Enable all broadcast */
7adf7d1b
JM		 1558 vxge_hw_vpath_bcast_enable(vpath->handle);
1559
1560 /* Enable all multicast */
1561 if (vdev->all_multi_flg) {
1562 status = vxge_hw_vpath_mcast_enable(vpath->handle);
1563 if (status != VXGE_HW_OK)
1564 vxge_debug_init(VXGE_ERR,
1565 "%s:%d Enabling multicast failed",
1566 __func__, __LINE__);
1567 }
703da5a1
RV		 1568
1569 /* Enable the interrupts */
1570 vxge_vpath_intr_enable(vdev, vp_id);
1571
1572 smp_wmb();
1573
1574 /* Enable the flow of traffic through the vpath */
7adf7d1b 1575 vxge_hw_vpath_enable(vpath->handle);
703da5a1
RV		 1576
1577 smp_wmb();
7adf7d1b
JM		 1578 vxge_hw_vpath_rx_doorbell_init(vpath->handle);
1579 vpath->ring.last_status = VXGE_HW_OK;
703da5a1
RV		 1580
1581 /* Vpath reset done */
1582 clear_bit(vp_id, &vdev->vp_reset);
1583
1584 /* Start the vpath queue */
98f45da2
JM		 1585 if (netif_tx_queue_stopped(vpath->fifo.txq))
1586 netif_tx_wake_queue(vpath->fifo.txq);
703da5a1
RV		 1587
1588 return ret;
1589}
1590
1591static int do_vxge_reset(struct vxgedev *vdev, int event)
1592{
1593 enum vxge_hw_status status;
1594 int ret = 0, vp_id, i;
1595
1596 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1597
1598 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET)) {
1599 /* check if device is down already */
1600 if (unlikely(!is_vxge_card_up(vdev)))
1601 return 0;
1602
1603 /* is reset already scheduled */
1604 if (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
1605 return 0;
1606 }
1607
1608 if (event == VXGE_LL_FULL_RESET) {
2e41f644
JM		 1609 netif_carrier_off(vdev->ndev);
1610
703da5a1
RV		 1611 /* wait for all the vpath reset to complete */
1612 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
1613 while (test_bit(vp_id, &vdev->vp_reset))
1614 msleep(50);
1615 }
1616
2e41f644
JM		 1617 netif_carrier_on(vdev->ndev);
1618
703da5a1
RV		 1619 /* if execution mode is set to debug, don't reset the adapter */
1620 if (unlikely(vdev->exec_mode)) {
1621 vxge_debug_init(VXGE_ERR,
1622 "%s: execution mode is debug, returning..",
1623 vdev->ndev->name);
7adf7d1b
JM		 1624 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
1625 netif_tx_stop_all_queues(vdev->ndev);
1626 return 0;
703da5a1
RV		 1627 }
1628 }
1629
1630 if (event == VXGE_LL_FULL_RESET) {
4d2a5b40 1631 vxge_hw_device_wait_receive_idle(vdev->devh);
703da5a1
RV		 1632 vxge_hw_device_intr_disable(vdev->devh);
1633
1634 switch (vdev->cric_err_event) {
1635 case VXGE_HW_EVENT_UNKNOWN:
d03848e0 1636 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1637 vxge_debug_init(VXGE_ERR,
1638 "fatal: %s: Disabling device due to"
1639 "unknown error",
1640 vdev->ndev->name);
1641 ret = -EPERM;
1642 goto out;
1643 case VXGE_HW_EVENT_RESET_START:
1644 break;
1645 case VXGE_HW_EVENT_RESET_COMPLETE:
1646 case VXGE_HW_EVENT_LINK_DOWN:
1647 case VXGE_HW_EVENT_LINK_UP:
1648 case VXGE_HW_EVENT_ALARM_CLEARED:
1649 case VXGE_HW_EVENT_ECCERR:
1650 case VXGE_HW_EVENT_MRPCIM_ECCERR:
1651 ret = -EPERM;
1652 goto out;
1653 case VXGE_HW_EVENT_FIFO_ERR:
1654 case VXGE_HW_EVENT_VPATH_ERR:
1655 break;
1656 case VXGE_HW_EVENT_CRITICAL_ERR:
d03848e0 1657 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1658 vxge_debug_init(VXGE_ERR,
1659 "fatal: %s: Disabling device due to"
1660 "serious error",
1661 vdev->ndev->name);
1662 /* SOP or device reset required */
1663 /* This event is not currently used */
1664 ret = -EPERM;
1665 goto out;
1666 case VXGE_HW_EVENT_SERR:
d03848e0 1667 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1668 vxge_debug_init(VXGE_ERR,
1669 "fatal: %s: Disabling device due to"
1670 "serious error",
1671 vdev->ndev->name);
1672 ret = -EPERM;
1673 goto out;
1674 case VXGE_HW_EVENT_SRPCIM_SERR:
1675 case VXGE_HW_EVENT_MRPCIM_SERR:
1676 ret = -EPERM;
1677 goto out;
1678 case VXGE_HW_EVENT_SLOT_FREEZE:
d03848e0 1679 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1680 vxge_debug_init(VXGE_ERR,
1681 "fatal: %s: Disabling device due to"
1682 "slot freeze",
1683 vdev->ndev->name);
1684 ret = -EPERM;
1685 goto out;
1686 default:
1687 break;
1688
1689 }
1690 }
1691
1692 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET))
d03848e0 1693 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1694
1695 if (event == VXGE_LL_FULL_RESET) {
1696 status = vxge_reset_all_vpaths(vdev);
1697 if (status != VXGE_HW_OK) {
1698 vxge_debug_init(VXGE_ERR,
1699 "fatal: %s: can not reset vpaths",
1700 vdev->ndev->name);
1701 ret = -EPERM;
1702 goto out;
1703 }
1704 }
1705
1706 if (event == VXGE_LL_COMPL_RESET) {
1707 for (i = 0; i < vdev->no_of_vpath; i++)
1708 if (vdev->vpaths[i].handle) {
1709 if (vxge_hw_vpath_recover_from_reset(
1710 vdev->vpaths[i].handle)
1711 != VXGE_HW_OK) {
1712 vxge_debug_init(VXGE_ERR,
1713 "vxge_hw_vpath_recover_"
1714 "from_reset failed for vpath: "
1715 "%d", i);
1716 ret = -EPERM;
1717 goto out;
1718 }
1719 } else {
1720 vxge_debug_init(VXGE_ERR,
1721 "vxge_hw_vpath_reset failed for "
1722 "vpath:%d", i);
1723 ret = -EPERM;
1724 goto out;
1725 }
1726 }
1727
1728 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET)) {
1729 /* Reprogram the DA table with populated mac addresses */
1730 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
1731 vxge_restore_vpath_mac_addr(&vdev->vpaths[vp_id]);
1732 vxge_restore_vpath_vid_table(&vdev->vpaths[vp_id]);
1733 }
1734
1735 /* enable vpath interrupts */
1736 for (i = 0; i < vdev->no_of_vpath; i++)
1737 vxge_vpath_intr_enable(vdev, i);
1738
1739 vxge_hw_device_intr_enable(vdev->devh);
1740
1741 smp_wmb();
1742
1743 /* Indicate card up */
1744 set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
1745
1746 /* Get the traffic to flow through the vpaths */
1747 for (i = 0; i < vdev->no_of_vpath; i++) {
1748 vxge_hw_vpath_enable(vdev->vpaths[i].handle);
1749 smp_wmb();
1750 vxge_hw_vpath_rx_doorbell_init(vdev->vpaths[i].handle);
1751 }
1752
d03848e0 1753 netif_tx_wake_all_queues(vdev->ndev);
703da5a1
RV		 1754 }
1755
1756out:
1757 vxge_debug_entryexit(VXGE_TRACE,
1758 "%s:%d Exiting...", __func__, __LINE__);
1759
1760 /* Indicate reset done */
1761 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET))
1762 clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
1763 return ret;
1764}
1765
1766/*
1767 * vxge_reset
1768 * @vdev: pointer to ll device
1769 *
1770 * driver may reset the chip on events of serr, eccerr, etc
1771 */
2e41f644 1772static void vxge_reset(struct work_struct *work)
703da5a1 1773{
2e41f644
JM		 1774 struct vxgedev *vdev = container_of(work, struct vxgedev, reset_task);
1775
1776 if (!netif_running(vdev->ndev))
1777 return;
1778
1779 do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
703da5a1
RV		 1780}
1781
1782/**
1783 * vxge_poll - Receive handler when Receive Polling is used.
1784 * @dev: pointer to the device structure.
1785 * @budget: Number of packets budgeted to be processed in this iteration.
1786 *
1787 * This function comes into picture only if Receive side is being handled
1788 * through polling (called NAPI in linux). It mostly does what the normal
1789 * Rx interrupt handler does in terms of descriptor and packet processing
1790 * but not in an interrupt context. Also it will process a specified number
1791 * of packets at most in one iteration. This value is passed down by the
1792 * kernel as the function argument 'budget'.
1793 */
1794static int vxge_poll_msix(struct napi_struct *napi, int budget)
1795{
1796 struct vxge_ring *ring =
1797 container_of(napi, struct vxge_ring, napi);
1798 int budget_org = budget;
1799 ring->budget = budget;
1800
1801 vxge_hw_vpath_poll_rx(ring->handle);
1802
1803 if (ring->pkts_processed < budget_org) {
1804 napi_complete(napi);
1805 /* Re enable the Rx interrupts for the vpath */
1806 vxge_hw_channel_msix_unmask(
1807 (struct __vxge_hw_channel *)ring->handle,
1808 ring->rx_vector_no);
1809 }
1810
1811 return ring->pkts_processed;
1812}
1813
1814static int vxge_poll_inta(struct napi_struct *napi, int budget)
1815{
1816 struct vxgedev *vdev = container_of(napi, struct vxgedev, napi);
1817 int pkts_processed = 0;
1818 int i;
1819 int budget_org = budget;
1820 struct vxge_ring *ring;
1821
d8ee7071 1822 struct __vxge_hw_device *hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 1823
1824 for (i = 0; i < vdev->no_of_vpath; i++) {
1825 ring = &vdev->vpaths[i].ring;
1826 ring->budget = budget;
1827 vxge_hw_vpath_poll_rx(ring->handle);
1828 pkts_processed += ring->pkts_processed;
1829 budget -= ring->pkts_processed;
1830 if (budget <= 0)
1831 break;
1832 }
1833
1834 VXGE_COMPLETE_ALL_TX(vdev);
1835
1836 if (pkts_processed < budget_org) {
1837 napi_complete(napi);
1838 /* Re enable the Rx interrupts for the ring */
1839 vxge_hw_device_unmask_all(hldev);
1840 vxge_hw_device_flush_io(hldev);
1841 }
1842
1843 return pkts_processed;
1844}
1845
1846#ifdef CONFIG_NET_POLL_CONTROLLER
1847/**
1848 * vxge_netpoll - netpoll event handler entry point
1849 * @dev : pointer to the device structure.
1850 * Description:
1851 * This function will be called by upper layer to check for events on the
1852 * interface in situations where interrupts are disabled. It is used for
1853 * specific in-kernel networking tasks, such as remote consoles and kernel
1854 * debugging over the network (example netdump in RedHat).
1855 */
1856static void vxge_netpoll(struct net_device *dev)
1857{
2c91308f 1858 struct __vxge_hw_device *hldev;
703da5a1
RV		 1859 struct vxgedev *vdev;
1860
5f54cebb 1861 vdev = netdev_priv(dev);
d8ee7071 1862 hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 1863
1864 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1865
1866 if (pci_channel_offline(vdev->pdev))
1867 return;
1868
1869 disable_irq(dev->irq);
1870 vxge_hw_device_clear_tx_rx(hldev);
1871
1872 vxge_hw_device_clear_tx_rx(hldev);
1873 VXGE_COMPLETE_ALL_RX(vdev);
1874 VXGE_COMPLETE_ALL_TX(vdev);
1875
1876 enable_irq(dev->irq);
1877
1878 vxge_debug_entryexit(VXGE_TRACE,
1879 "%s:%d Exiting...", __func__, __LINE__);
703da5a1
RV		 1880}
1881#endif
1882
1883/* RTH configuration */
1884static enum vxge_hw_status vxge_rth_configure(struct vxgedev *vdev)
1885{
1886 enum vxge_hw_status status = VXGE_HW_OK;
1887 struct vxge_hw_rth_hash_types hash_types;
1888 u8 itable[256] = {0}; /* indirection table */
1889 u8 mtable[256] = {0}; /* CPU to vpath mapping */
1890 int index;
1891
1892 /*
1893 * Filling
1894 * - itable with bucket numbers
1895 * - mtable with bucket-to-vpath mapping
1896 */
1897 for (index = 0; index < (1 << vdev->config.rth_bkt_sz); index++) {
1898 itable[index] = index;
1899 mtable[index] = index % vdev->no_of_vpath;
1900 }
1901
703da5a1
RV		 1902 /* set indirection table, bucket-to-vpath mapping */
1903 status = vxge_hw_vpath_rts_rth_itable_set(vdev->vp_handles,
1904 vdev->no_of_vpath,
1905 mtable, itable,
1906 vdev->config.rth_bkt_sz);
1907 if (status != VXGE_HW_OK) {
1908 vxge_debug_init(VXGE_ERR,
1909 "RTH indirection table configuration failed "
1910 "for vpath:%d", vdev->vpaths[0].device_id);
1911 return status;
1912 }
1913
47f01db4
JM		 1914 /* Fill RTH hash types */
1915 hash_types.hash_type_tcpipv4_en = vdev->config.rth_hash_type_tcpipv4;
1916 hash_types.hash_type_ipv4_en = vdev->config.rth_hash_type_ipv4;
1917 hash_types.hash_type_tcpipv6_en = vdev->config.rth_hash_type_tcpipv6;
1918 hash_types.hash_type_ipv6_en = vdev->config.rth_hash_type_ipv6;
1919 hash_types.hash_type_tcpipv6ex_en =
1920 vdev->config.rth_hash_type_tcpipv6ex;
1921 hash_types.hash_type_ipv6ex_en = vdev->config.rth_hash_type_ipv6ex;
1922
703da5a1 1923 /*
47f01db4
JM		 1924 * Because the itable_set() method uses the active_table field
1925 * for the target virtual path the RTH config should be updated
1926 * for all VPATHs. The h/w only uses the lowest numbered VPATH
1927 * when steering frames.
1928 */
703da5a1
RV		 1929 for (index = 0; index < vdev->no_of_vpath; index++) {
1930 status = vxge_hw_vpath_rts_rth_set(
1931 vdev->vpaths[index].handle,
1932 vdev->config.rth_algorithm,
1933 &hash_types,
1934 vdev->config.rth_bkt_sz);
703da5a1
RV		 1935 if (status != VXGE_HW_OK) {
1936 vxge_debug_init(VXGE_ERR,
1937 "RTH configuration failed for vpath:%d",
1938 vdev->vpaths[index].device_id);
1939 return status;
1940 }
1941 }
1942
1943 return status;
1944}
1945
703da5a1 1946/* reset vpaths */
4d2a5b40 1947enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev)
703da5a1 1948{
703da5a1 1949 enum vxge_hw_status status = VXGE_HW_OK;
7adf7d1b
JM		 1950 struct vxge_vpath *vpath;
1951 int i;
703da5a1 1952
7adf7d1b
JM		 1953 for (i = 0; i < vdev->no_of_vpath; i++) {
1954 vpath = &vdev->vpaths[i];
1955 if (vpath->handle) {
1956 if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
703da5a1
RV		 1957 if (is_vxge_card_up(vdev) &&
1958 vxge_hw_vpath_recover_from_reset(
7adf7d1b 1959 vpath->handle) != VXGE_HW_OK) {
703da5a1
RV		 1960 vxge_debug_init(VXGE_ERR,
1961 "vxge_hw_vpath_recover_"
1962 "from_reset failed for vpath: "
1963 "%d", i);
1964 return status;
1965 }
1966 } else {
1967 vxge_debug_init(VXGE_ERR,
1968 "vxge_hw_vpath_reset failed for "
1969 "vpath:%d", i);
1970 return status;
1971 }
1972 }
7adf7d1b
JM		 1973 }
1974
703da5a1
RV		 1975 return status;
1976}
1977
1978/* close vpaths */
42821a5b 1979static void vxge_close_vpaths(struct vxgedev *vdev, int index)
703da5a1 1980{
7adf7d1b 1981 struct vxge_vpath *vpath;
703da5a1 1982 int i;
7adf7d1b 1983
703da5a1 1984 for (i = index; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 1985 vpath = &vdev->vpaths[i];
1986
1987 if (vpath->handle && vpath->is_open) {
1988 vxge_hw_vpath_close(vpath->handle);
703da5a1
RV		 1989 vdev->stats.vpaths_open--;
1990 }
7adf7d1b
JM		 1991 vpath->is_open = 0;
1992 vpath->handle = NULL;
703da5a1
RV		 1993 }
1994}
1995
1996/* open vpaths */
42821a5b 1997static int vxge_open_vpaths(struct vxgedev *vdev)
703da5a1 1998{
7adf7d1b 1999 struct vxge_hw_vpath_attr attr;
703da5a1 2000 enum vxge_hw_status status;
7adf7d1b 2001 struct vxge_vpath *vpath;
703da5a1 2002 u32 vp_id = 0;
7adf7d1b 2003 int i;
703da5a1
RV		 2004
2005 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b 2006 vpath = &vdev->vpaths[i];
7adf7d1b 2007 vxge_assert(vpath->is_configured);
e7935c96
JM		 2008
2009 if (!vdev->titan1) {
2010 struct vxge_hw_vp_config *vcfg;
2011 vcfg = &vdev->devh->config.vp_config[vpath->device_id];
2012
2013 vcfg->rti.urange_a = RTI_T1A_RX_URANGE_A;
2014 vcfg->rti.urange_b = RTI_T1A_RX_URANGE_B;
2015 vcfg->rti.urange_c = RTI_T1A_RX_URANGE_C;
2016 vcfg->tti.uec_a = TTI_T1A_TX_UFC_A;
2017 vcfg->tti.uec_b = TTI_T1A_TX_UFC_B;
2018 vcfg->tti.uec_c = TTI_T1A_TX_UFC_C(vdev->mtu);
2019 vcfg->tti.uec_d = TTI_T1A_TX_UFC_D(vdev->mtu);
2020 vcfg->tti.ltimer_val = VXGE_T1A_TTI_LTIMER_VAL;
2021 vcfg->tti.rtimer_val = VXGE_T1A_TTI_RTIMER_VAL;
2022 }
2023
7adf7d1b 2024 attr.vp_id = vpath->device_id;
703da5a1
RV		 2025 attr.fifo_attr.callback = vxge_xmit_compl;
2026 attr.fifo_attr.txdl_term = vxge_tx_term;
2027 attr.fifo_attr.per_txdl_space = sizeof(struct vxge_tx_priv);
7adf7d1b 2028 attr.fifo_attr.userdata = &vpath->fifo;
703da5a1
RV		 2029
2030 attr.ring_attr.callback = vxge_rx_1b_compl;
2031 attr.ring_attr.rxd_init = vxge_rx_initial_replenish;
2032 attr.ring_attr.rxd_term = vxge_rx_term;
2033 attr.ring_attr.per_rxd_space = sizeof(struct vxge_rx_priv);
7adf7d1b 2034 attr.ring_attr.userdata = &vpath->ring;
703da5a1 2035
7adf7d1b
JM		 2036 vpath->ring.ndev = vdev->ndev;
2037 vpath->ring.pdev = vdev->pdev;
528f7272 2038
7adf7d1b 2039 status = vxge_hw_vpath_open(vdev->devh, &attr, &vpath->handle);
703da5a1 2040 if (status == VXGE_HW_OK) {
7adf7d1b 2041 vpath->fifo.handle =
703da5a1 2042 (struct __vxge_hw_fifo *)attr.fifo_attr.userdata;
7adf7d1b 2043 vpath->ring.handle =
703da5a1 2044 (struct __vxge_hw_ring *)attr.ring_attr.userdata;
7adf7d1b 2045 vpath->fifo.tx_steering_type =
703da5a1 2046 vdev->config.tx_steering_type;
7adf7d1b
JM		 2047 vpath->fifo.ndev = vdev->ndev;
2048 vpath->fifo.pdev = vdev->pdev;
98f45da2
JM		 2049 if (vdev->config.tx_steering_type)
2050 vpath->fifo.txq =
2051 netdev_get_tx_queue(vdev->ndev, i);
2052 else
2053 vpath->fifo.txq =
2054 netdev_get_tx_queue(vdev->ndev, 0);
7adf7d1b 2055 vpath->fifo.indicate_max_pkts =
703da5a1 2056 vdev->config.fifo_indicate_max_pkts;
7adf7d1b
JM		 2057 vpath->ring.rx_vector_no = 0;
2058 vpath->ring.rx_csum = vdev->rx_csum;
b81b3733 2059 vpath->ring.rx_hwts = vdev->rx_hwts;
7adf7d1b
JM		 2060 vpath->is_open = 1;
2061 vdev->vp_handles[i] = vpath->handle;
2062 vpath->ring.gro_enable = vdev->config.gro_enable;
2063 vpath->ring.vlan_tag_strip = vdev->vlan_tag_strip;
703da5a1
RV		 2064 vdev->stats.vpaths_open++;
2065 } else {
2066 vdev->stats.vpath_open_fail++;
528f7272
JM		 2067 vxge_debug_init(VXGE_ERR, "%s: vpath: %d failed to "
2068 "open with status: %d",
2069 vdev->ndev->name, vpath->device_id,
2070 status);
703da5a1
RV		 2071 vxge_close_vpaths(vdev, 0);
2072 return -EPERM;
2073 }
2074
7adf7d1b 2075 vp_id = vpath->handle->vpath->vp_id;
703da5a1
RV		 2076 vdev->vpaths_deployed |= vxge_mBIT(vp_id);
2077 }
528f7272 2078
703da5a1
RV		 2079 return VXGE_HW_OK;
2080}
2081
2082/*
2083 * vxge_isr_napi
2084 * @irq: the irq of the device.
2085 * @dev_id: a void pointer to the hldev structure of the Titan device
2086 * @ptregs: pointer to the registers pushed on the stack.
2087 *
2088 * This function is the ISR handler of the device when napi is enabled. It
2089 * identifies the reason for the interrupt and calls the relevant service
2090 * routines.
2091 */
2092static irqreturn_t vxge_isr_napi(int irq, void *dev_id)
2093{
703da5a1 2094 struct net_device *dev;
a5d165b5 2095 struct __vxge_hw_device *hldev;
703da5a1
RV		 2096 u64 reason;
2097 enum vxge_hw_status status;
2c91308f 2098 struct vxgedev *vdev = (struct vxgedev *)dev_id;
703da5a1
RV		 2099
2100 vxge_debug_intr(VXGE_TRACE, "%s:%d", __func__, __LINE__);
2101
a5d165b5 2102 dev = vdev->ndev;
d8ee7071 2103 hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 2104
2105 if (pci_channel_offline(vdev->pdev))
2106 return IRQ_NONE;
2107
2108 if (unlikely(!is_vxge_card_up(vdev)))
4d2a5b40 2109 return IRQ_HANDLED;
703da5a1 2110
528f7272 2111 status = vxge_hw_device_begin_irq(hldev, vdev->exec_mode, &reason);
703da5a1
RV		 2112 if (status == VXGE_HW_OK) {
2113 vxge_hw_device_mask_all(hldev);
2114
2115 if (reason &
2116 VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_TRAFFIC_INT(
2117 vdev->vpaths_deployed >>
2118 (64 - VXGE_HW_MAX_VIRTUAL_PATHS))) {
2119
2120 vxge_hw_device_clear_tx_rx(hldev);
2121 napi_schedule(&vdev->napi);
2122 vxge_debug_intr(VXGE_TRACE,
2123 "%s:%d Exiting...", __func__, __LINE__);
2124 return IRQ_HANDLED;
2125 } else
2126 vxge_hw_device_unmask_all(hldev);
2127 } else if (unlikely((status == VXGE_HW_ERR_VPATH) ||
2128 (status == VXGE_HW_ERR_CRITICAL) ||
2129 (status == VXGE_HW_ERR_FIFO))) {
2130 vxge_hw_device_mask_all(hldev);
2131 vxge_hw_device_flush_io(hldev);
2132 return IRQ_HANDLED;
2133 } else if (unlikely(status == VXGE_HW_ERR_SLOT_FREEZE))
2134 return IRQ_HANDLED;
2135
2136 vxge_debug_intr(VXGE_TRACE, "%s:%d Exiting...", __func__, __LINE__);
2137 return IRQ_NONE;
2138}
2139
2140#ifdef CONFIG_PCI_MSI
2141
2142static irqreturn_t
2143vxge_tx_msix_handle(int irq, void *dev_id)
2144{
2145 struct vxge_fifo *fifo = (struct vxge_fifo *)dev_id;
2146
2147 VXGE_COMPLETE_VPATH_TX(fifo);
2148
2149 return IRQ_HANDLED;
2150}
2151
2152static irqreturn_t
2153vxge_rx_msix_napi_handle(int irq, void *dev_id)
2154{
2155 struct vxge_ring *ring = (struct vxge_ring *)dev_id;
2156
2157 /* MSIX_IDX for Rx is 1 */
2158 vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)ring->handle,
2159 ring->rx_vector_no);
2160
2161 napi_schedule(&ring->napi);
2162 return IRQ_HANDLED;
2163}
2164
2165static irqreturn_t
2166vxge_alarm_msix_handle(int irq, void *dev_id)
2167{
2168 int i;
2169 enum vxge_hw_status status;
2170 struct vxge_vpath *vpath = (struct vxge_vpath *)dev_id;
2171 struct vxgedev *vdev = vpath->vdev;
b59c9457
SH		 2172 int msix_id = (vpath->handle->vpath->vp_id *
2173 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
703da5a1
RV		 2174
2175 for (i = 0; i < vdev->no_of_vpath; i++) {
b59c9457 2176 vxge_hw_vpath_msix_mask(vdev->vpaths[i].handle, msix_id);
703da5a1
RV		 2177
2178 status = vxge_hw_vpath_alarm_process(vdev->vpaths[i].handle,
2179 vdev->exec_mode);
2180 if (status == VXGE_HW_OK) {
2181
2182 vxge_hw_vpath_msix_unmask(vdev->vpaths[i].handle,
b59c9457 2183 msix_id);
703da5a1
RV		 2184 continue;
2185 }
2186 vxge_debug_intr(VXGE_ERR,
2187 "%s: vxge_hw_vpath_alarm_process failed %x ",
2188 VXGE_DRIVER_NAME, status);
2189 }
2190 return IRQ_HANDLED;
2191}
2192
2193static int vxge_alloc_msix(struct vxgedev *vdev)
2194{
2195 int j, i, ret = 0;
b59c9457 2196 int msix_intr_vect = 0, temp;
703da5a1
RV		 2197 vdev->intr_cnt = 0;
2198
b59c9457 2199start:
703da5a1
RV		 2200 /* Tx/Rx MSIX Vectors count */
2201 vdev->intr_cnt = vdev->no_of_vpath * 2;
2202
2203 /* Alarm MSIX Vectors count */
2204 vdev->intr_cnt++;
2205
baeb2ffa
JP		 2206 vdev->entries = kcalloc(vdev->intr_cnt, sizeof(struct msix_entry),
2207 GFP_KERNEL);
703da5a1
RV		 2208 if (!vdev->entries) {
2209 vxge_debug_init(VXGE_ERR,
2210 "%s: memory allocation failed",
2211 VXGE_DRIVER_NAME);
cc413d90
MS		 2212 ret = -ENOMEM;
2213 goto alloc_entries_failed;
703da5a1
RV		 2214 }
2215
baeb2ffa
JP		 2216 vdev->vxge_entries = kcalloc(vdev->intr_cnt,
2217 sizeof(struct vxge_msix_entry),
2218 GFP_KERNEL);
703da5a1
RV		 2219 if (!vdev->vxge_entries) {
2220 vxge_debug_init(VXGE_ERR, "%s: memory allocation failed",
2221 VXGE_DRIVER_NAME);
cc413d90
MS		 2222 ret = -ENOMEM;
2223 goto alloc_vxge_entries_failed;
703da5a1
RV		 2224 }
2225
b59c9457 2226 for (i = 0, j = 0; i < vdev->no_of_vpath; i++) {
703da5a1
RV		 2227
2228 msix_intr_vect = i * VXGE_HW_VPATH_MSIX_ACTIVE;
2229
2230 /* Initialize the fifo vector */
2231 vdev->entries[j].entry = msix_intr_vect;
2232 vdev->vxge_entries[j].entry = msix_intr_vect;
2233 vdev->vxge_entries[j].in_use = 0;
2234 j++;
2235
2236 /* Initialize the ring vector */
2237 vdev->entries[j].entry = msix_intr_vect + 1;
2238 vdev->vxge_entries[j].entry = msix_intr_vect + 1;
2239 vdev->vxge_entries[j].in_use = 0;
2240 j++;
2241 }
2242
2243 /* Initialize the alarm vector */
b59c9457
SH		 2244 vdev->entries[j].entry = VXGE_ALARM_MSIX_ID;
2245 vdev->vxge_entries[j].entry = VXGE_ALARM_MSIX_ID;
703da5a1
RV		 2246 vdev->vxge_entries[j].in_use = 0;
2247
b59c9457 2248 ret = pci_enable_msix(vdev->pdev, vdev->entries, vdev->intr_cnt);
b59c9457 2249 if (ret > 0) {
703da5a1
RV		 2250 vxge_debug_init(VXGE_ERR,
2251 "%s: MSI-X enable failed for %d vectors, ret: %d",
b59c9457 2252 VXGE_DRIVER_NAME, vdev->intr_cnt, ret);
cc413d90
MS		 2253 if ((max_config_vpath != VXGE_USE_DEFAULT) || (ret < 3)) {
2254 ret = -ENODEV;
2255 goto enable_msix_failed;
2256 }
2257
703da5a1
RV		 2258 kfree(vdev->entries);
2259 kfree(vdev->vxge_entries);
2260 vdev->entries = NULL;
2261 vdev->vxge_entries = NULL;
b59c9457
SH		 2262 /* Try with less no of vector by reducing no of vpaths count */
2263 temp = (ret - 1)/2;
2264 vxge_close_vpaths(vdev, temp);
2265 vdev->no_of_vpath = temp;
2266 goto start;
cc413d90
MS		 2267 } else if (ret < 0) {
2268 ret = -ENODEV;
2269 goto enable_msix_failed;
2270 }
703da5a1 2271 return 0;
cc413d90
MS		 2272
2273enable_msix_failed:
2274 kfree(vdev->vxge_entries);
2275alloc_vxge_entries_failed:
2276 kfree(vdev->entries);
2277alloc_entries_failed:
2278 return ret;
703da5a1
RV		 2279}
2280
2281static int vxge_enable_msix(struct vxgedev *vdev)
2282{
2283
2284 int i, ret = 0;
703da5a1 2285 /* 0 - Tx, 1 - Rx */
b59c9457
SH		 2286 int tim_msix_id[4] = {0, 1, 0, 0};
2287
703da5a1
RV		 2288 vdev->intr_cnt = 0;
2289
2290 /* allocate msix vectors */
2291 ret = vxge_alloc_msix(vdev);
2292 if (!ret) {
703da5a1 2293 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b 2294 struct vxge_vpath *vpath = &vdev->vpaths[i];
703da5a1 2295
7adf7d1b
JM		 2296 /* If fifo or ring are not enabled, the MSIX vector for
2297 * it should be set to 0.
2298 */
2299 vpath->ring.rx_vector_no = (vpath->device_id *
2300 VXGE_HW_VPATH_MSIX_ACTIVE) + 1;
703da5a1 2301
7adf7d1b
JM		 2302 vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
2303 VXGE_ALARM_MSIX_ID);
703da5a1
RV		 2304 }
2305 }
2306
2307 return ret;
2308}
2309
2310static void vxge_rem_msix_isr(struct vxgedev *vdev)
2311{
2312 int intr_cnt;
2313
b59c9457 2314 for (intr_cnt = 0; intr_cnt < (vdev->no_of_vpath * 2 + 1);
703da5a1
RV		 2315 intr_cnt++) {
2316 if (vdev->vxge_entries[intr_cnt].in_use) {
2317 synchronize_irq(vdev->entries[intr_cnt].vector);
2318 free_irq(vdev->entries[intr_cnt].vector,
2319 vdev->vxge_entries[intr_cnt].arg);
2320 vdev->vxge_entries[intr_cnt].in_use = 0;
2321 }
2322 }
2323
2324 kfree(vdev->entries);
2325 kfree(vdev->vxge_entries);
2326 vdev->entries = NULL;
2327 vdev->vxge_entries = NULL;
2328
2329 if (vdev->config.intr_type == MSI_X)
2330 pci_disable_msix(vdev->pdev);
2331}
2332#endif
2333
2334static void vxge_rem_isr(struct vxgedev *vdev)
2335{
2c91308f 2336 struct __vxge_hw_device *hldev;
d8ee7071 2337 hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 2338
2339#ifdef CONFIG_PCI_MSI
2340 if (vdev->config.intr_type == MSI_X) {
2341 vxge_rem_msix_isr(vdev);
2342 } else
2343#endif
2344 if (vdev->config.intr_type == INTA) {
2345 synchronize_irq(vdev->pdev->irq);
a5d165b5 2346 free_irq(vdev->pdev->irq, vdev);
703da5a1
RV		 2347 }
2348}
2349
2350static int vxge_add_isr(struct vxgedev *vdev)
2351{
2352 int ret = 0;
703da5a1
RV		 2353#ifdef CONFIG_PCI_MSI
2354 int vp_idx = 0, intr_idx = 0, intr_cnt = 0, msix_idx = 0, irq_req = 0;
703da5a1
RV		 2355 int pci_fun = PCI_FUNC(vdev->pdev->devfn);
2356
2357 if (vdev->config.intr_type == MSI_X)
2358 ret = vxge_enable_msix(vdev);
2359
2360 if (ret) {
2361 vxge_debug_init(VXGE_ERR,
2362 "%s: Enabling MSI-X Failed", VXGE_DRIVER_NAME);
eb5f10c2
SH		 2363 vxge_debug_init(VXGE_ERR,
2364 "%s: Defaulting to INTA", VXGE_DRIVER_NAME);
2365 vdev->config.intr_type = INTA;
703da5a1
RV		 2366 }
2367
2368 if (vdev->config.intr_type == MSI_X) {
2369 for (intr_idx = 0;
2370 intr_idx < (vdev->no_of_vpath *
2371 VXGE_HW_VPATH_MSIX_ACTIVE); intr_idx++) {
2372
2373 msix_idx = intr_idx % VXGE_HW_VPATH_MSIX_ACTIVE;
2374 irq_req = 0;
2375
2376 switch (msix_idx) {
2377 case 0:
2378 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
b59c9457
SH		 2379 "%s:vxge:MSI-X %d - Tx - fn:%d vpath:%d",
2380 vdev->ndev->name,
2381 vdev->entries[intr_cnt].entry,
2382 pci_fun, vp_idx);
703da5a1
RV		 2383 ret = request_irq(
2384 vdev->entries[intr_cnt].vector,
2385 vxge_tx_msix_handle, 0,
2386 vdev->desc[intr_cnt],
2387 &vdev->vpaths[vp_idx].fifo);
2388 vdev->vxge_entries[intr_cnt].arg =
2389 &vdev->vpaths[vp_idx].fifo;
2390 irq_req = 1;
2391 break;
2392 case 1:
2393 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
b59c9457
SH		 2394 "%s:vxge:MSI-X %d - Rx - fn:%d vpath:%d",
2395 vdev->ndev->name,
2396 vdev->entries[intr_cnt].entry,
2397 pci_fun, vp_idx);
703da5a1
RV		 2398 ret = request_irq(
2399 vdev->entries[intr_cnt].vector,
2400 vxge_rx_msix_napi_handle,
2401 0,
2402 vdev->desc[intr_cnt],
2403 &vdev->vpaths[vp_idx].ring);
2404 vdev->vxge_entries[intr_cnt].arg =
2405 &vdev->vpaths[vp_idx].ring;
2406 irq_req = 1;
2407 break;
2408 }
2409
2410 if (ret) {
2411 vxge_debug_init(VXGE_ERR,
2412 "%s: MSIX - %d Registration failed",
2413 vdev->ndev->name, intr_cnt);
2414 vxge_rem_msix_isr(vdev);
eb5f10c2
SH		 2415 vdev->config.intr_type = INTA;
2416 vxge_debug_init(VXGE_ERR,
2417 "%s: Defaulting to INTA"
2418 , vdev->ndev->name);
703da5a1 2419 goto INTA_MODE;
703da5a1
RV		 2420 }
2421
2422 if (irq_req) {
2423 /* We requested for this msix interrupt */
2424 vdev->vxge_entries[intr_cnt].in_use = 1;
b59c9457
SH		 2425 msix_idx += vdev->vpaths[vp_idx].device_id *
2426 VXGE_HW_VPATH_MSIX_ACTIVE;
703da5a1
RV		 2427 vxge_hw_vpath_msix_unmask(
2428 vdev->vpaths[vp_idx].handle,
b59c9457 2429 msix_idx);
703da5a1
RV		 2430 intr_cnt++;
2431 }
2432
2433 /* Point to next vpath handler */
8e95a202
JP		 2434 if (((intr_idx + 1) % VXGE_HW_VPATH_MSIX_ACTIVE == 0) &&
2435 (vp_idx < (vdev->no_of_vpath - 1)))
2436 vp_idx++;
703da5a1
RV		 2437 }
2438
b59c9457 2439 intr_cnt = vdev->no_of_vpath * 2;
703da5a1 2440 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
b59c9457
SH		 2441 "%s:vxge:MSI-X %d - Alarm - fn:%d",
2442 vdev->ndev->name,
2443 vdev->entries[intr_cnt].entry,
2444 pci_fun);
703da5a1
RV		 2445 /* For Alarm interrupts */
2446 ret = request_irq(vdev->entries[intr_cnt].vector,
2447 vxge_alarm_msix_handle, 0,
2448 vdev->desc[intr_cnt],
b59c9457 2449 &vdev->vpaths[0]);
703da5a1
RV		 2450 if (ret) {
2451 vxge_debug_init(VXGE_ERR,
2452 "%s: MSIX - %d Registration failed",
2453 vdev->ndev->name, intr_cnt);
2454 vxge_rem_msix_isr(vdev);
eb5f10c2
SH		 2455 vdev->config.intr_type = INTA;
2456 vxge_debug_init(VXGE_ERR,
2457 "%s: Defaulting to INTA",
2458 vdev->ndev->name);
703da5a1 2459 goto INTA_MODE;
703da5a1
RV		 2460 }
2461
b59c9457
SH		 2462 msix_idx = (vdev->vpaths[0].handle->vpath->vp_id *
2463 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
703da5a1 2464 vxge_hw_vpath_msix_unmask(vdev->vpaths[vp_idx].handle,
b59c9457 2465 msix_idx);
703da5a1 2466 vdev->vxge_entries[intr_cnt].in_use = 1;
b59c9457 2467 vdev->vxge_entries[intr_cnt].arg = &vdev->vpaths[0];
703da5a1
RV		 2468 }
2469INTA_MODE:
2470#endif
703da5a1
RV		 2471
2472 if (vdev->config.intr_type == INTA) {
b59c9457
SH		 2473 snprintf(vdev->desc[0], VXGE_INTR_STRLEN,
2474 "%s:vxge:INTA", vdev->ndev->name);
eb5f10c2
SH		 2475 vxge_hw_device_set_intr_type(vdev->devh,
2476 VXGE_HW_INTR_MODE_IRQLINE);
2477 vxge_hw_vpath_tti_ci_set(vdev->devh,
2478 vdev->vpaths[0].device_id);
703da5a1
RV		 2479 ret = request_irq((int) vdev->pdev->irq,
2480 vxge_isr_napi,
a5d165b5 2481 IRQF_SHARED, vdev->desc[0], vdev);
703da5a1
RV		 2482 if (ret) {
2483 vxge_debug_init(VXGE_ERR,
2484 "%s %s-%d: ISR registration failed",
2485 VXGE_DRIVER_NAME, "IRQ", vdev->pdev->irq);
2486 return -ENODEV;
2487 }
2488 vxge_debug_init(VXGE_TRACE,
2489 "new %s-%d line allocated",
2490 "IRQ", vdev->pdev->irq);
2491 }
2492
2493 return VXGE_HW_OK;
2494}
2495
2496static void vxge_poll_vp_reset(unsigned long data)
2497{
2498 struct vxgedev *vdev = (struct vxgedev *)data;
2499 int i, j = 0;
2500
2501 for (i = 0; i < vdev->no_of_vpath; i++) {
2502 if (test_bit(i, &vdev->vp_reset)) {
2503 vxge_reset_vpath(vdev, i);
2504 j++;
2505 }
2506 }
2507 if (j && (vdev->config.intr_type != MSI_X)) {
2508 vxge_hw_device_unmask_all(vdev->devh);
2509 vxge_hw_device_flush_io(vdev->devh);
2510 }
2511
2512 mod_timer(&vdev->vp_reset_timer, jiffies + HZ / 2);
2513}
2514
2515static void vxge_poll_vp_lockup(unsigned long data)
2516{
2517 struct vxgedev *vdev = (struct vxgedev *)data;
703da5a1 2518 enum vxge_hw_status status = VXGE_HW_OK;
7adf7d1b
JM		 2519 struct vxge_vpath *vpath;
2520 struct vxge_ring *ring;
2521 int i;
703da5a1
RV		 2522
2523 for (i = 0; i < vdev->no_of_vpath; i++) {
2524 ring = &vdev->vpaths[i].ring;
2525 /* Did this vpath received any packets */
2526 if (ring->stats.prev_rx_frms == ring->stats.rx_frms) {
2527 status = vxge_hw_vpath_check_leak(ring->handle);
2528
2529 /* Did it received any packets last time */
2530 if ((VXGE_HW_FAIL == status) &&
2531 (VXGE_HW_FAIL == ring->last_status)) {
2532
2533 /* schedule vpath reset */
2534 if (!test_and_set_bit(i, &vdev->vp_reset)) {
7adf7d1b 2535 vpath = &vdev->vpaths[i];
703da5a1
RV		 2536
2537 /* disable interrupts for this vpath */
2538 vxge_vpath_intr_disable(vdev, i);
2539
2540 /* stop the queue for this vpath */
98f45da2 2541 netif_tx_stop_queue(vpath->fifo.txq);
703da5a1
RV		 2542 continue;
2543 }
2544 }
2545 }
2546 ring->stats.prev_rx_frms = ring->stats.rx_frms;
2547 ring->last_status = status;
2548 }
2549
2550 /* Check every 1 milli second */
2551 mod_timer(&vdev->vp_lockup_timer, jiffies + HZ / 1000);
2552}
2553
2554/**
2555 * vxge_open
2556 * @dev: pointer to the device structure.
2557 *
2558 * This function is the open entry point of the driver. It mainly calls a
2559 * function to allocate Rx buffers and inserts them into the buffer
2560 * descriptors and then enables the Rx part of the NIC.
2561 * Return value: '0' on success and an appropriate (-)ve integer as
2562 * defined in errno.h file on failure.
2563 */
528f7272 2564static int vxge_open(struct net_device *dev)
703da5a1
RV		 2565{
2566 enum vxge_hw_status status;
2567 struct vxgedev *vdev;
2568 struct __vxge_hw_device *hldev;
7adf7d1b 2569 struct vxge_vpath *vpath;
703da5a1
RV		 2570 int ret = 0;
2571 int i;
2572 u64 val64, function_mode;
528f7272 2573
703da5a1
RV		 2574 vxge_debug_entryexit(VXGE_TRACE,
2575 "%s: %s:%d", dev->name, __func__, __LINE__);
2576
5f54cebb 2577 vdev = netdev_priv(dev);
d8ee7071 2578 hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 2579 function_mode = vdev->config.device_hw_info.function_mode;
2580
2581 /* make sure you have link off by default every time Nic is
2582 * initialized */
2583 netif_carrier_off(dev);
2584
703da5a1
RV		 2585 /* Open VPATHs */
2586 status = vxge_open_vpaths(vdev);
2587 if (status != VXGE_HW_OK) {
2588 vxge_debug_init(VXGE_ERR,
2589 "%s: fatal: Vpath open failed", vdev->ndev->name);
2590 ret = -EPERM;
2591 goto out0;
2592 }
2593
2594 vdev->mtu = dev->mtu;
2595
2596 status = vxge_add_isr(vdev);
2597 if (status != VXGE_HW_OK) {
2598 vxge_debug_init(VXGE_ERR,
2599 "%s: fatal: ISR add failed", dev->name);
2600 ret = -EPERM;
2601 goto out1;
2602 }
2603
703da5a1
RV		 2604 if (vdev->config.intr_type != MSI_X) {
2605 netif_napi_add(dev, &vdev->napi, vxge_poll_inta,
2606 vdev->config.napi_weight);
2607 napi_enable(&vdev->napi);
7adf7d1b
JM		 2608 for (i = 0; i < vdev->no_of_vpath; i++) {
2609 vpath = &vdev->vpaths[i];
2610 vpath->ring.napi_p = &vdev->napi;
2611 }
703da5a1
RV		 2612 } else {
2613 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2614 vpath = &vdev->vpaths[i];
2615 netif_napi_add(dev, &vpath->ring.napi,
703da5a1 2616 vxge_poll_msix, vdev->config.napi_weight);
7adf7d1b
JM		 2617 napi_enable(&vpath->ring.napi);
2618 vpath->ring.napi_p = &vpath->ring.napi;
703da5a1
RV		 2619 }
2620 }
2621
2622 /* configure RTH */
2623 if (vdev->config.rth_steering) {
2624 status = vxge_rth_configure(vdev);
2625 if (status != VXGE_HW_OK) {
2626 vxge_debug_init(VXGE_ERR,
2627 "%s: fatal: RTH configuration failed",
2628 dev->name);
2629 ret = -EPERM;
2630 goto out2;
2631 }
2632 }
47f01db4
JM		 2633 printk(KERN_INFO "%s: Receive Hashing Offload %s\n", dev->name,
2634 hldev->config.rth_en ? "enabled" : "disabled");
703da5a1
RV		 2635
2636 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2637 vpath = &vdev->vpaths[i];
2638
703da5a1 2639 /* set initial mtu before enabling the device */
7adf7d1b 2640 status = vxge_hw_vpath_mtu_set(vpath->handle, vdev->mtu);
703da5a1
RV		 2641 if (status != VXGE_HW_OK) {
2642 vxge_debug_init(VXGE_ERR,
2643 "%s: fatal: can not set new MTU", dev->name);
2644 ret = -EPERM;
2645 goto out2;
2646 }
2647 }
2648
2649 VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_TRACE, VXGE_COMPONENT_LL, vdev);
2650 vxge_debug_init(vdev->level_trace,
2651 "%s: MTU is %d", vdev->ndev->name, vdev->mtu);
2652 VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_ERR, VXGE_COMPONENT_LL, vdev);
2653
7adf7d1b
JM		 2654 /* Restore the DA, VID table and also multicast and promiscuous mode
2655 * states
2656 */
2657 if (vdev->all_multi_flg) {
2658 for (i = 0; i < vdev->no_of_vpath; i++) {
2659 vpath = &vdev->vpaths[i];
2660 vxge_restore_vpath_mac_addr(vpath);
2661 vxge_restore_vpath_vid_table(vpath);
2662
2663 status = vxge_hw_vpath_mcast_enable(vpath->handle);
2664 if (status != VXGE_HW_OK)
2665 vxge_debug_init(VXGE_ERR,
2666 "%s:%d Enabling multicast failed",
2667 __func__, __LINE__);
2668 }
703da5a1
RV		 2669 }
2670
2671 /* Enable vpath to sniff all unicast/multicast traffic that not
2672 * addressed to them. We allow promiscous mode for PF only
2673 */
2674
2675 val64 = 0;
2676 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
2677 val64 |= VXGE_HW_RXMAC_AUTHORIZE_ALL_ADDR_VP(i);
2678
2679 vxge_hw_mgmt_reg_write(vdev->devh,
2680 vxge_hw_mgmt_reg_type_mrpcim,
2681 0,
2682 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2683 rxmac_authorize_all_addr),
2684 val64);
2685
2686 vxge_hw_mgmt_reg_write(vdev->devh,
2687 vxge_hw_mgmt_reg_type_mrpcim,
2688 0,
2689 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2690 rxmac_authorize_all_vid),
2691 val64);
2692
2693 vxge_set_multicast(dev);
2694
2695 /* Enabling Bcast and mcast for all vpath */
2696 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2697 vpath = &vdev->vpaths[i];
2698 status = vxge_hw_vpath_bcast_enable(vpath->handle);
703da5a1
RV		 2699 if (status != VXGE_HW_OK)
2700 vxge_debug_init(VXGE_ERR,
2701 "%s : Can not enable bcast for vpath "
2702 "id %d", dev->name, i);
2703 if (vdev->config.addr_learn_en) {
7adf7d1b 2704 status = vxge_hw_vpath_mcast_enable(vpath->handle);
703da5a1
RV		 2705 if (status != VXGE_HW_OK)
2706 vxge_debug_init(VXGE_ERR,
2707 "%s : Can not enable mcast for vpath "
2708 "id %d", dev->name, i);
2709 }
2710 }
2711
2712 vxge_hw_device_setpause_data(vdev->devh, 0,
2713 vdev->config.tx_pause_enable,
2714 vdev->config.rx_pause_enable);
2715
2716 if (vdev->vp_reset_timer.function == NULL)
2717 vxge_os_timer(vdev->vp_reset_timer,
2718 vxge_poll_vp_reset, vdev, (HZ/2));
2719
e7935c96
JM		 2720 /* There is no need to check for RxD leak and RxD lookup on Titan1A */
2721 if (vdev->titan1 && vdev->vp_lockup_timer.function == NULL)
2722 vxge_os_timer(vdev->vp_lockup_timer, vxge_poll_vp_lockup, vdev,
2723 HZ / 2);
703da5a1
RV		 2724
2725 set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
2726
2727 smp_wmb();
2728
2729 if (vxge_hw_device_link_state_get(vdev->devh) == VXGE_HW_LINK_UP) {
2730 netif_carrier_on(vdev->ndev);
75f5e1c6 2731 netdev_notice(vdev->ndev, "Link Up\n");
703da5a1
RV		 2732 vdev->stats.link_up++;
2733 }
2734
2735 vxge_hw_device_intr_enable(vdev->devh);
2736
2737 smp_wmb();
2738
2739 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2740 vpath = &vdev->vpaths[i];
2741
2742 vxge_hw_vpath_enable(vpath->handle);
703da5a1 2743 smp_wmb();
7adf7d1b 2744 vxge_hw_vpath_rx_doorbell_init(vpath->handle);
703da5a1
RV		 2745 }
2746
d03848e0 2747 netif_tx_start_all_queues(vdev->ndev);
703da5a1
RV		 2748 goto out0;
2749
2750out2:
2751 vxge_rem_isr(vdev);
2752
2753 /* Disable napi */
2754 if (vdev->config.intr_type != MSI_X)
2755 napi_disable(&vdev->napi);
2756 else {
2757 for (i = 0; i < vdev->no_of_vpath; i++)
2758 napi_disable(&vdev->vpaths[i].ring.napi);
2759 }
2760
2761out1:
2762 vxge_close_vpaths(vdev, 0);
2763out0:
2764 vxge_debug_entryexit(VXGE_TRACE,
2765 "%s: %s:%d Exiting...",
2766 dev->name, __func__, __LINE__);
2767 return ret;
2768}
2769
2770/* Loop throught the mac address list and delete all the entries */
42821a5b 2771static void vxge_free_mac_add_list(struct vxge_vpath *vpath)
703da5a1
RV		 2772{
2773
2774 struct list_head *entry, *next;
2775 if (list_empty(&vpath->mac_addr_list))
2776 return;
2777
2778 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
2779 list_del(entry);
2780 kfree((struct vxge_mac_addrs *)entry);
2781 }
2782}
2783
2784static void vxge_napi_del_all(struct vxgedev *vdev)
2785{
2786 int i;
2787 if (vdev->config.intr_type != MSI_X)
2788 netif_napi_del(&vdev->napi);
2789 else {
2790 for (i = 0; i < vdev->no_of_vpath; i++)
2791 netif_napi_del(&vdev->vpaths[i].ring.napi);
2792 }
703da5a1
RV		 2793}
2794
42821a5b 2795static int do_vxge_close(struct net_device *dev, int do_io)
703da5a1
RV		 2796{
2797 enum vxge_hw_status status;
2798 struct vxgedev *vdev;
2799 struct __vxge_hw_device *hldev;
2800 int i;
2801 u64 val64, vpath_vector;
2802 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
2803 dev->name, __func__, __LINE__);
2804
5f54cebb 2805 vdev = netdev_priv(dev);
d8ee7071 2806 hldev = pci_get_drvdata(vdev->pdev);
703da5a1 2807
bd9ee680
SH		 2808 if (unlikely(!is_vxge_card_up(vdev)))
2809 return 0;
2810
703da5a1
RV		 2811 /* If vxge_handle_crit_err task is executing,
2812 * wait till it completes. */
2813 while (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
2814 msleep(50);
2815
703da5a1
RV		 2816 if (do_io) {
2817 /* Put the vpath back in normal mode */
2818 vpath_vector = vxge_mBIT(vdev->vpaths[0].device_id);
2819 status = vxge_hw_mgmt_reg_read(vdev->devh,
2820 vxge_hw_mgmt_reg_type_mrpcim,
2821 0,
2822 (ulong)offsetof(
2823 struct vxge_hw_mrpcim_reg,
2824 rts_mgr_cbasin_cfg),
2825 &val64);
703da5a1
RV		 2826 if (status == VXGE_HW_OK) {
2827 val64 &= ~vpath_vector;
2828 status = vxge_hw_mgmt_reg_write(vdev->devh,
2829 vxge_hw_mgmt_reg_type_mrpcim,
2830 0,
2831 (ulong)offsetof(
2832 struct vxge_hw_mrpcim_reg,
2833 rts_mgr_cbasin_cfg),
2834 val64);
2835 }
2836
2837 /* Remove the function 0 from promiscous mode */
2838 vxge_hw_mgmt_reg_write(vdev->devh,
2839 vxge_hw_mgmt_reg_type_mrpcim,
2840 0,
2841 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2842 rxmac_authorize_all_addr),
2843 0);
2844
2845 vxge_hw_mgmt_reg_write(vdev->devh,
2846 vxge_hw_mgmt_reg_type_mrpcim,
2847 0,
2848 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2849 rxmac_authorize_all_vid),
2850 0);
2851
2852 smp_wmb();
2853 }
e7935c96
JM		 2854
2855 if (vdev->titan1)
2856 del_timer_sync(&vdev->vp_lockup_timer);
703da5a1
RV		 2857
2858 del_timer_sync(&vdev->vp_reset_timer);
2859
4d2a5b40
JM		 2860 if (do_io)
2861 vxge_hw_device_wait_receive_idle(hldev);
2862
2863 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
2864
703da5a1
RV		 2865 /* Disable napi */
2866 if (vdev->config.intr_type != MSI_X)
2867 napi_disable(&vdev->napi);
2868 else {
2869 for (i = 0; i < vdev->no_of_vpath; i++)
2870 napi_disable(&vdev->vpaths[i].ring.napi);
2871 }
2872
2873 netif_carrier_off(vdev->ndev);
75f5e1c6 2874 netdev_notice(vdev->ndev, "Link Down\n");
d03848e0 2875 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 2876
2877 /* Note that at this point xmit() is stopped by upper layer */
2878 if (do_io)
2879 vxge_hw_device_intr_disable(vdev->devh);
2880
703da5a1
RV		 2881 vxge_rem_isr(vdev);
2882
2883 vxge_napi_del_all(vdev);
2884
2885 if (do_io)
2886 vxge_reset_all_vpaths(vdev);
2887
2888 vxge_close_vpaths(vdev, 0);
2889
2890 vxge_debug_entryexit(VXGE_TRACE,
2891 "%s: %s:%d Exiting...", dev->name, __func__, __LINE__);
2892
703da5a1
RV		 2893 clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
2894
2895 return 0;
2896}
2897
2898/**
2899 * vxge_close
2900 * @dev: device pointer.
2901 *
2902 * This is the stop entry point of the driver. It needs to undo exactly
2903 * whatever was done by the open entry point, thus it's usually referred to
2904 * as the close function.Among other things this function mainly stops the
2905 * Rx side of the NIC and frees all the Rx buffers in the Rx rings.
2906 * Return value: '0' on success and an appropriate (-)ve integer as
2907 * defined in errno.h file on failure.
2908 */
528f7272 2909static int vxge_close(struct net_device *dev)
703da5a1
RV		 2910{
2911 do_vxge_close(dev, 1);
2912 return 0;
2913}
2914
2915/**
2916 * vxge_change_mtu
2917 * @dev: net device pointer.
2918 * @new_mtu :the new MTU size for the device.
2919 *
2920 * A driver entry point to change MTU size for the device. Before changing
2921 * the MTU the device must be stopped.
2922 */
2923static int vxge_change_mtu(struct net_device *dev, int new_mtu)
2924{
2925 struct vxgedev *vdev = netdev_priv(dev);
2926
2927 vxge_debug_entryexit(vdev->level_trace,
2928 "%s:%d", __func__, __LINE__);
2929 if ((new_mtu < VXGE_HW_MIN_MTU) || (new_mtu > VXGE_HW_MAX_MTU)) {
2930 vxge_debug_init(vdev->level_err,
2931 "%s: mtu size is invalid", dev->name);
2932 return -EPERM;
2933 }
2934
2935 /* check if device is down already */
2936 if (unlikely(!is_vxge_card_up(vdev))) {
2937 /* just store new value, will use later on open() */
2938 dev->mtu = new_mtu;
2939 vxge_debug_init(vdev->level_err,
2940 "%s", "device is down on MTU change");
2941 return 0;
2942 }
2943
2944 vxge_debug_init(vdev->level_trace,
2945 "trying to apply new MTU %d", new_mtu);
2946
2947 if (vxge_close(dev))
2948 return -EIO;
2949
2950 dev->mtu = new_mtu;
2951 vdev->mtu = new_mtu;
2952
2953 if (vxge_open(dev))
2954 return -EIO;
2955
2956 vxge_debug_init(vdev->level_trace,
2957 "%s: MTU changed to %d", vdev->ndev->name, new_mtu);
2958
2959 vxge_debug_entryexit(vdev->level_trace,
2960 "%s:%d Exiting...", __func__, __LINE__);
2961
2962 return 0;
2963}
2964
2965/**
dd57f970 2966 * vxge_get_stats64
703da5a1 2967 * @dev: pointer to the device structure
dd57f970 2968 * @stats: pointer to struct rtnl_link_stats64
703da5a1 2969 *
703da5a1 2970 */
dd57f970
ED		 2971static struct rtnl_link_stats64 *
2972vxge_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *net_stats)
703da5a1 2973{
dd57f970 2974 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV		 2975 int k;
2976
dd57f970 2977 /* net_stats already zeroed by caller */
703da5a1
RV		 2978 for (k = 0; k < vdev->no_of_vpath; k++) {
2979 net_stats->rx_packets += vdev->vpaths[k].ring.stats.rx_frms;
2980 net_stats->rx_bytes += vdev->vpaths[k].ring.stats.rx_bytes;
2981 net_stats->rx_errors += vdev->vpaths[k].ring.stats.rx_errors;
2982 net_stats->multicast += vdev->vpaths[k].ring.stats.rx_mcast;
528f7272 2983 net_stats->rx_dropped += vdev->vpaths[k].ring.stats.rx_dropped;
703da5a1
RV		 2984 net_stats->tx_packets += vdev->vpaths[k].fifo.stats.tx_frms;
2985 net_stats->tx_bytes += vdev->vpaths[k].fifo.stats.tx_bytes;
2986 net_stats->tx_errors += vdev->vpaths[k].fifo.stats.tx_errors;
2987 }
2988
2989 return net_stats;
2990}
2991
b81b3733
JM		 2992static enum vxge_hw_status vxge_timestamp_config(struct vxgedev *vdev,
2993 int enable)
2994{
2995 enum vxge_hw_status status;
2996 u64 val64;
2997
2998 /* Timestamp is passed to the driver via the FCS, therefore we
2999 * must disable the FCS stripping by the adapter. Since this is
3000 * required for the driver to load (due to a hardware bug),
3001 * there is no need to do anything special here.
3002 */
3003 if (enable)
3004 val64 = VXGE_HW_XMAC_TIMESTAMP_EN |
3005 VXGE_HW_XMAC_TIMESTAMP_USE_LINK_ID(0) |
3006 VXGE_HW_XMAC_TIMESTAMP_INTERVAL(0);
3007 else
3008 val64 = 0;
3009
3010 status = vxge_hw_mgmt_reg_write(vdev->devh,
3011 vxge_hw_mgmt_reg_type_mrpcim,
3012 0,
3013 offsetof(struct vxge_hw_mrpcim_reg,
3014 xmac_timestamp),
3015 val64);
3016 vxge_hw_device_flush_io(vdev->devh);
3017 return status;
3018}
3019
3020static int vxge_hwtstamp_ioctl(struct vxgedev *vdev, void __user *data)
3021{
3022 struct hwtstamp_config config;
3023 enum vxge_hw_status status;
3024 int i;
3025
3026 if (copy_from_user(&config, data, sizeof(config)))
3027 return -EFAULT;
3028
3029 /* reserved for future extensions */
3030 if (config.flags)
3031 return -EINVAL;
3032
3033 /* Transmit HW Timestamp not supported */
3034 switch (config.tx_type) {
3035 case HWTSTAMP_TX_OFF:
3036 break;
3037 case HWTSTAMP_TX_ON:
3038 default:
3039 return -ERANGE;
3040 }
3041
3042 switch (config.rx_filter) {
3043 case HWTSTAMP_FILTER_NONE:
3044 status = vxge_timestamp_config(vdev, 0);
3045 if (status != VXGE_HW_OK)
3046 return -EFAULT;
3047
3048 vdev->rx_hwts = 0;
3049 config.rx_filter = HWTSTAMP_FILTER_NONE;
3050 break;
3051
3052 case HWTSTAMP_FILTER_ALL:
3053 case HWTSTAMP_FILTER_SOME:
3054 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3055 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3056 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3057 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3058 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3059 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3060 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3061 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3062 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3063 case HWTSTAMP_FILTER_PTP_V2_EVENT:
3064 case HWTSTAMP_FILTER_PTP_V2_SYNC:
3065 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3066 status = vxge_timestamp_config(vdev, 1);
3067 if (status != VXGE_HW_OK)
3068 return -EFAULT;
3069
3070 vdev->rx_hwts = 1;
3071 config.rx_filter = HWTSTAMP_FILTER_ALL;
3072 break;
3073
3074 default:
3075 return -ERANGE;
3076 }
3077
3078 for (i = 0; i < vdev->no_of_vpath; i++)
3079 vdev->vpaths[i].ring.rx_hwts = vdev->rx_hwts;
3080
3081 if (copy_to_user(data, &config, sizeof(config)))
3082 return -EFAULT;
3083
3084 return 0;
3085}
3086
703da5a1
RV		 3087/**
3088 * vxge_ioctl
3089 * @dev: Device pointer.
3090 * @ifr: An IOCTL specific structure, that can contain a pointer to
3091 * a proprietary structure used to pass information to the driver.
3092 * @cmd: This is used to distinguish between the different commands that
3093 * can be passed to the IOCTL functions.
3094 *
3095 * Entry point for the Ioctl.
3096 */
3097static int vxge_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3098{
b81b3733
JM		 3099 struct vxgedev *vdev = netdev_priv(dev);
3100 int ret;
3101
3102 switch (cmd) {
3103 case SIOCSHWTSTAMP:
3104 ret = vxge_hwtstamp_ioctl(vdev, rq->ifr_data);
3105 if (ret)
3106 return ret;
3107 break;
3108 default:
3109 return -EOPNOTSUPP;
3110 }
3111
3112 return 0;
703da5a1
RV		 3113}
3114
3115/**
3116 * vxge_tx_watchdog
3117 * @dev: pointer to net device structure
3118 *
3119 * Watchdog for transmit side.
3120 * This function is triggered if the Tx Queue is stopped
3121 * for a pre-defined amount of time when the Interface is still up.
3122 */
2e41f644 3123static void vxge_tx_watchdog(struct net_device *dev)
703da5a1
RV		 3124{
3125 struct vxgedev *vdev;
3126
3127 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
3128
5f54cebb 3129 vdev = netdev_priv(dev);
703da5a1
RV		 3130
3131 vdev->cric_err_event = VXGE_HW_EVENT_RESET_START;
3132
2e41f644 3133 schedule_work(&vdev->reset_task);
703da5a1
RV		 3134 vxge_debug_entryexit(VXGE_TRACE,
3135 "%s:%d Exiting...", __func__, __LINE__);
3136}
3137
3138/**
3139 * vxge_vlan_rx_register
3140 * @dev: net device pointer.
3141 * @grp: vlan group
3142 *
3143 * Vlan group registration
3144 */
3145static void
3146vxge_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
3147{
3148 struct vxgedev *vdev;
3149 struct vxge_vpath *vpath;
3150 int vp;
3151 u64 vid;
3152 enum vxge_hw_status status;
3153 int i;
3154
3155 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
3156
5f54cebb 3157 vdev = netdev_priv(dev);
703da5a1
RV		 3158
3159 vpath = &vdev->vpaths[0];
3160 if ((NULL == grp) && (vpath->is_open)) {
3161 /* Get the first vlan */
3162 status = vxge_hw_vpath_vid_get(vpath->handle, &vid);
3163
3164 while (status == VXGE_HW_OK) {
3165
3166 /* Delete this vlan from the vid table */
3167 for (vp = 0; vp < vdev->no_of_vpath; vp++) {
3168 vpath = &vdev->vpaths[vp];
3169 if (!vpath->is_open)
3170 continue;
3171
3172 vxge_hw_vpath_vid_delete(vpath->handle, vid);
3173 }
3174
3175 /* Get the next vlan to be deleted */
3176 vpath = &vdev->vpaths[0];
3177 status = vxge_hw_vpath_vid_get(vpath->handle, &vid);
3178 }
3179 }
3180
3181 vdev->vlgrp = grp;
3182
3183 for (i = 0; i < vdev->no_of_vpath; i++) {
3184 if (vdev->vpaths[i].is_configured)
3185 vdev->vpaths[i].ring.vlgrp = grp;
3186 }
3187
3188 vxge_debug_entryexit(VXGE_TRACE,
3189 "%s:%d Exiting...", __func__, __LINE__);
3190}
3191
3192/**
3193 * vxge_vlan_rx_add_vid
3194 * @dev: net device pointer.
3195 * @vid: vid
3196 *
3197 * Add the vlan id to the devices vlan id table
3198 */
3199static void
3200vxge_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
3201{
3202 struct vxgedev *vdev;
3203 struct vxge_vpath *vpath;
3204 int vp_id;
3205
5f54cebb 3206 vdev = netdev_priv(dev);
703da5a1
RV		 3207
3208 /* Add these vlan to the vid table */
3209 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
3210 vpath = &vdev->vpaths[vp_id];
3211 if (!vpath->is_open)
3212 continue;
3213 vxge_hw_vpath_vid_add(vpath->handle, vid);
3214 }
3215}
3216
3217/**
3218 * vxge_vlan_rx_add_vid
3219 * @dev: net device pointer.
3220 * @vid: vid
3221 *
3222 * Remove the vlan id from the device's vlan id table
3223 */
3224static void
3225vxge_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
3226{
3227 struct vxgedev *vdev;
3228 struct vxge_vpath *vpath;
3229 int vp_id;
3230
3231 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
3232
5f54cebb 3233 vdev = netdev_priv(dev);
703da5a1
RV		 3234
3235 vlan_group_set_device(vdev->vlgrp, vid, NULL);
3236
3237 /* Delete this vlan from the vid table */
3238 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
3239 vpath = &vdev->vpaths[vp_id];
3240 if (!vpath->is_open)
3241 continue;
3242 vxge_hw_vpath_vid_delete(vpath->handle, vid);
3243 }
3244 vxge_debug_entryexit(VXGE_TRACE,
3245 "%s:%d Exiting...", __func__, __LINE__);
3246}
3247
3248static const struct net_device_ops vxge_netdev_ops = {
3249 .ndo_open = vxge_open,
3250 .ndo_stop = vxge_close,
dd57f970 3251 .ndo_get_stats64 = vxge_get_stats64,
703da5a1
RV		 3252 .ndo_start_xmit = vxge_xmit,
3253 .ndo_validate_addr = eth_validate_addr,
3254 .ndo_set_multicast_list = vxge_set_multicast,
703da5a1 3255 .ndo_do_ioctl = vxge_ioctl,
703da5a1
RV		 3256 .ndo_set_mac_address = vxge_set_mac_addr,
3257 .ndo_change_mtu = vxge_change_mtu,
3258 .ndo_vlan_rx_register = vxge_vlan_rx_register,
3259 .ndo_vlan_rx_kill_vid = vxge_vlan_rx_kill_vid,
3260 .ndo_vlan_rx_add_vid = vxge_vlan_rx_add_vid,
703da5a1
RV		 3261 .ndo_tx_timeout = vxge_tx_watchdog,
3262#ifdef CONFIG_NET_POLL_CONTROLLER
3263 .ndo_poll_controller = vxge_netpoll,
3264#endif
3265};
3266
e7935c96
JM		 3267static int __devinit vxge_device_revision(struct vxgedev *vdev)
3268{
3269 int ret;
3270 u8 revision;
3271
3272 ret = pci_read_config_byte(vdev->pdev, PCI_REVISION_ID, &revision);
3273 if (ret)
3274 return -EIO;
3275
3276 vdev->titan1 = (revision == VXGE_HW_TITAN1_PCI_REVISION);
3277 return 0;
3278}
3279
42821a5b 3280static int __devinit vxge_device_register(struct __vxge_hw_device *hldev,
3281 struct vxge_config *config,
3282 int high_dma, int no_of_vpath,
3283 struct vxgedev **vdev_out)
703da5a1
RV		 3284{
3285 struct net_device *ndev;
3286 enum vxge_hw_status status = VXGE_HW_OK;
3287 struct vxgedev *vdev;
98f45da2 3288 int ret = 0, no_of_queue = 1;
703da5a1
RV		 3289 u64 stat;
3290
3291 *vdev_out = NULL;
d03848e0 3292 if (config->tx_steering_type)
703da5a1
RV		 3293 no_of_queue = no_of_vpath;
3294
3295 ndev = alloc_etherdev_mq(sizeof(struct vxgedev),
3296 no_of_queue);
3297 if (ndev == NULL) {
3298 vxge_debug_init(
3299 vxge_hw_device_trace_level_get(hldev),
3300 "%s : device allocation failed", __func__);
3301 ret = -ENODEV;
3302 goto _out0;
3303 }
3304
3305 vxge_debug_entryexit(
3306 vxge_hw_device_trace_level_get(hldev),
3307 "%s: %s:%d Entering...",
3308 ndev->name, __func__, __LINE__);
3309
3310 vdev = netdev_priv(ndev);
3311 memset(vdev, 0, sizeof(struct vxgedev));
3312
3313 vdev->ndev = ndev;
3314 vdev->devh = hldev;
3315 vdev->pdev = hldev->pdev;
3316 memcpy(&vdev->config, config, sizeof(struct vxge_config));
3317 vdev->rx_csum = 1; /* Enable Rx CSUM by default. */
b81b3733 3318 vdev->rx_hwts = 0;
703da5a1 3319
e7935c96
JM		 3320 ret = vxge_device_revision(vdev);
3321 if (ret < 0)
3322 goto _out1;
3323
703da5a1
RV		 3324 SET_NETDEV_DEV(ndev, &vdev->pdev->dev);
3325
3326 ndev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX |
3327 NETIF_F_HW_VLAN_FILTER;
3328 /* Driver entry points */
3329 ndev->irq = vdev->pdev->irq;
3330 ndev->base_addr = (unsigned long) hldev->bar0;
3331
3332 ndev->netdev_ops = &vxge_netdev_ops;
3333
3334 ndev->watchdog_timeo = VXGE_LL_WATCH_DOG_TIMEOUT;
2e41f644 3335 INIT_WORK(&vdev->reset_task, vxge_reset);
703da5a1 3336
42821a5b 3337 vxge_initialize_ethtool_ops(ndev);
703da5a1 3338
47f01db4
JM		 3339 if (vdev->config.rth_steering != NO_STEERING) {
3340 ndev->features |= NETIF_F_RXHASH;
3341 hldev->config.rth_en = VXGE_HW_RTH_ENABLE;
3342 }
3343
703da5a1
RV		 3344 /* Allocate memory for vpath */
3345 vdev->vpaths = kzalloc((sizeof(struct vxge_vpath)) *
3346 no_of_vpath, GFP_KERNEL);
3347 if (!vdev->vpaths) {
3348 vxge_debug_init(VXGE_ERR,
3349 "%s: vpath memory allocation failed",
3350 vdev->ndev->name);
3351 ret = -ENODEV;
3352 goto _out1;
3353 }
3354
3355 ndev->features |= NETIF_F_SG;
3356
79032644 3357 ndev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
703da5a1
RV		 3358 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3359 "%s : checksuming enabled", __func__);
3360
3361 if (high_dma) {
3362 ndev->features |= NETIF_F_HIGHDMA;
3363 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3364 "%s : using High DMA", __func__);
3365 }
3366
3367 ndev->features |= NETIF_F_TSO | NETIF_F_TSO6;
3368
3369 if (vdev->config.gro_enable)
3370 ndev->features |= NETIF_F_GRO;
3371
703da5a1
RV		 3372 if (register_netdev(ndev)) {
3373 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3374 "%s: %s : device registration failed!",
3375 ndev->name, __func__);
3376 ret = -ENODEV;
3377 goto _out2;
3378 }
3379
3380 /* Set the factory defined MAC address initially */
3381 ndev->addr_len = ETH_ALEN;
3382
3383 /* Make Link state as off at this point, when the Link change
3384 * interrupt comes the state will be automatically changed to
3385 * the right state.
3386 */
3387 netif_carrier_off(ndev);
3388
3389 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3390 "%s: Ethernet device registered",
3391 ndev->name);
3392
e8ac1756 3393 hldev->ndev = ndev;
703da5a1
RV		 3394 *vdev_out = vdev;
3395
3396 /* Resetting the Device stats */
3397 status = vxge_hw_mrpcim_stats_access(
3398 hldev,
3399 VXGE_HW_STATS_OP_CLEAR_ALL_STATS,
3400 0,
3401 0,
3402 &stat);
3403
3404 if (status == VXGE_HW_ERR_PRIVILAGED_OPEARATION)
3405 vxge_debug_init(
3406 vxge_hw_device_trace_level_get(hldev),
3407 "%s: device stats clear returns"
3408 "VXGE_HW_ERR_PRIVILAGED_OPEARATION", ndev->name);
3409
3410 vxge_debug_entryexit(vxge_hw_device_trace_level_get(hldev),
3411 "%s: %s:%d Exiting...",
3412 ndev->name, __func__, __LINE__);
3413
3414 return ret;
3415_out2:
3416 kfree(vdev->vpaths);
3417_out1:
3418 free_netdev(ndev);
3419_out0:
3420 return ret;
3421}
3422
3423/*
3424 * vxge_device_unregister
3425 *
3426 * This function will unregister and free network device
3427 */
2c91308f 3428static void vxge_device_unregister(struct __vxge_hw_device *hldev)
703da5a1
RV		 3429{
3430 struct vxgedev *vdev;
3431 struct net_device *dev;
3432 char buf[IFNAMSIZ];
703da5a1
RV		 3433
3434 dev = hldev->ndev;
3435 vdev = netdev_priv(dev);
703da5a1 3436
2c91308f
JM		 3437 vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d", vdev->ndev->name,
3438 __func__, __LINE__);
3439
ead5d238 3440 strncpy(buf, dev->name, IFNAMSIZ);
703da5a1
RV		 3441
3442 /* in 2.6 will call stop() if device is up */
3443 unregister_netdev(dev);
3444
2c91308f
JM		 3445 vxge_debug_init(vdev->level_trace, "%s: ethernet device unregistered",
3446 buf);
3447 vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d Exiting...", buf,
3448 __func__, __LINE__);
703da5a1
RV		 3449}
3450
3451/*
3452 * vxge_callback_crit_err
3453 *
3454 * This function is called by the alarm handler in interrupt context.
3455 * Driver must analyze it based on the event type.
3456 */
3457static void
3458vxge_callback_crit_err(struct __vxge_hw_device *hldev,
3459 enum vxge_hw_event type, u64 vp_id)
3460{
3461 struct net_device *dev = hldev->ndev;
5f54cebb 3462 struct vxgedev *vdev = netdev_priv(dev);
98f45da2 3463 struct vxge_vpath *vpath = NULL;
703da5a1
RV		 3464 int vpath_idx;
3465
3466 vxge_debug_entryexit(vdev->level_trace,
3467 "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
3468
3469 /* Note: This event type should be used for device wide
3470 * indications only - Serious errors, Slot freeze and critical errors
3471 */
3472 vdev->cric_err_event = type;
3473
98f45da2
JM		 3474 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
3475 vpath = &vdev->vpaths[vpath_idx];
3476 if (vpath->device_id == vp_id)
703da5a1 3477 break;
98f45da2 3478 }
703da5a1
RV		 3479
3480 if (!test_bit(__VXGE_STATE_RESET_CARD, &vdev->state)) {
3481 if (type == VXGE_HW_EVENT_SLOT_FREEZE) {
3482 vxge_debug_init(VXGE_ERR,
3483 "%s: Slot is frozen", vdev->ndev->name);
3484 } else if (type == VXGE_HW_EVENT_SERR) {
3485 vxge_debug_init(VXGE_ERR,
3486 "%s: Encountered Serious Error",
3487 vdev->ndev->name);
3488 } else if (type == VXGE_HW_EVENT_CRITICAL_ERR)
3489 vxge_debug_init(VXGE_ERR,
3490 "%s: Encountered Critical Error",
3491 vdev->ndev->name);
3492 }
3493
3494 if ((type == VXGE_HW_EVENT_SERR) ||
3495 (type == VXGE_HW_EVENT_SLOT_FREEZE)) {
3496 if (unlikely(vdev->exec_mode))
3497 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3498 } else if (type == VXGE_HW_EVENT_CRITICAL_ERR) {
3499 vxge_hw_device_mask_all(hldev);
3500 if (unlikely(vdev->exec_mode))
3501 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3502 } else if ((type == VXGE_HW_EVENT_FIFO_ERR) ||
3503 (type == VXGE_HW_EVENT_VPATH_ERR)) {
3504
3505 if (unlikely(vdev->exec_mode))
3506 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3507 else {
3508 /* check if this vpath is already set for reset */
3509 if (!test_and_set_bit(vpath_idx, &vdev->vp_reset)) {
3510
3511 /* disable interrupts for this vpath */
3512 vxge_vpath_intr_disable(vdev, vpath_idx);
3513
3514 /* stop the queue for this vpath */
98f45da2 3515 netif_tx_stop_queue(vpath->fifo.txq);
703da5a1
RV		 3516 }
3517 }
3518 }
3519
3520 vxge_debug_entryexit(vdev->level_trace,
3521 "%s: %s:%d Exiting...",
3522 vdev->ndev->name, __func__, __LINE__);
3523}
3524
3525static void verify_bandwidth(void)
3526{
3527 int i, band_width, total = 0, equal_priority = 0;
3528
3529 /* 1. If user enters 0 for some fifo, give equal priority to all */
3530 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3531 if (bw_percentage[i] == 0) {
3532 equal_priority = 1;
3533 break;
3534 }
3535 }
3536
3537 if (!equal_priority) {
3538 /* 2. If sum exceeds 100, give equal priority to all */
3539 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3540 if (bw_percentage[i] == 0xFF)
3541 break;
3542
3543 total += bw_percentage[i];
3544 if (total > VXGE_HW_VPATH_BANDWIDTH_MAX) {
3545 equal_priority = 1;
3546 break;
3547 }
3548 }
3549 }
3550
3551 if (!equal_priority) {
3552 /* Is all the bandwidth consumed? */
3553 if (total < VXGE_HW_VPATH_BANDWIDTH_MAX) {
3554 if (i < VXGE_HW_MAX_VIRTUAL_PATHS) {
3555 /* Split rest of bw equally among next VPs*/
3556 band_width =
3557 (VXGE_HW_VPATH_BANDWIDTH_MAX - total) /
3558 (VXGE_HW_MAX_VIRTUAL_PATHS - i);
3559 if (band_width < 2) /* min of 2% */
3560 equal_priority = 1;
3561 else {
3562 for (; i < VXGE_HW_MAX_VIRTUAL_PATHS;
3563 i++)
3564 bw_percentage[i] =
3565 band_width;
3566 }
3567 }
3568 } else if (i < VXGE_HW_MAX_VIRTUAL_PATHS)
3569 equal_priority = 1;
3570 }
3571
3572 if (equal_priority) {
3573 vxge_debug_init(VXGE_ERR,
3574 "%s: Assigning equal bandwidth to all the vpaths",
3575 VXGE_DRIVER_NAME);
3576 bw_percentage[0] = VXGE_HW_VPATH_BANDWIDTH_MAX /
3577 VXGE_HW_MAX_VIRTUAL_PATHS;
3578 for (i = 1; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3579 bw_percentage[i] = bw_percentage[0];
3580 }
703da5a1
RV		 3581}
3582
3583/*
3584 * Vpath configuration
3585 */
3586static int __devinit vxge_config_vpaths(
3587 struct vxge_hw_device_config *device_config,
3588 u64 vpath_mask, struct vxge_config *config_param)
3589{
3590 int i, no_of_vpaths = 0, default_no_vpath = 0, temp;
3591 u32 txdl_size, txdl_per_memblock;
3592
3593 temp = driver_config->vpath_per_dev;
3594 if ((driver_config->vpath_per_dev == VXGE_USE_DEFAULT) &&
3595 (max_config_dev == VXGE_MAX_CONFIG_DEV)) {
3596 /* No more CPU. Return vpath number as zero.*/
3597 if (driver_config->g_no_cpus == -1)
3598 return 0;
3599
3600 if (!driver_config->g_no_cpus)
3601 driver_config->g_no_cpus = num_online_cpus();
3602
3603 driver_config->vpath_per_dev = driver_config->g_no_cpus >> 1;
3604 if (!driver_config->vpath_per_dev)
3605 driver_config->vpath_per_dev = 1;
3606
3607 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3608 if (!vxge_bVALn(vpath_mask, i, 1))
3609 continue;
3610 else
3611 default_no_vpath++;
3612 if (default_no_vpath < driver_config->vpath_per_dev)
3613 driver_config->vpath_per_dev = default_no_vpath;
3614
3615 driver_config->g_no_cpus = driver_config->g_no_cpus -
3616 (driver_config->vpath_per_dev * 2);
3617 if (driver_config->g_no_cpus <= 0)
3618 driver_config->g_no_cpus = -1;
3619 }
3620
3621 if (driver_config->vpath_per_dev == 1) {
3622 vxge_debug_ll_config(VXGE_TRACE,
3623 "%s: Disable tx and rx steering, "
3624 "as single vpath is configured", VXGE_DRIVER_NAME);
3625 config_param->rth_steering = NO_STEERING;
3626 config_param->tx_steering_type = NO_STEERING;
3627 device_config->rth_en = 0;
3628 }
3629
3630 /* configure bandwidth */
3631 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3632 device_config->vp_config[i].min_bandwidth = bw_percentage[i];
3633
3634 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3635 device_config->vp_config[i].vp_id = i;
3636 device_config->vp_config[i].mtu = VXGE_HW_DEFAULT_MTU;
3637 if (no_of_vpaths < driver_config->vpath_per_dev) {
3638 if (!vxge_bVALn(vpath_mask, i, 1)) {
3639 vxge_debug_ll_config(VXGE_TRACE,
3640 "%s: vpath: %d is not available",
3641 VXGE_DRIVER_NAME, i);
3642 continue;
3643 } else {
3644 vxge_debug_ll_config(VXGE_TRACE,
3645 "%s: vpath: %d available",
3646 VXGE_DRIVER_NAME, i);
3647 no_of_vpaths++;
3648 }
3649 } else {
3650 vxge_debug_ll_config(VXGE_TRACE,
3651 "%s: vpath: %d is not configured, "
3652 "max_config_vpath exceeded",
3653 VXGE_DRIVER_NAME, i);
3654 break;
3655 }
3656
3657 /* Configure Tx fifo's */
3658 device_config->vp_config[i].fifo.enable =
3659 VXGE_HW_FIFO_ENABLE;
3660 device_config->vp_config[i].fifo.max_frags =
5beefb4f 3661 MAX_SKB_FRAGS + 1;
703da5a1
RV		 3662 device_config->vp_config[i].fifo.memblock_size =
3663 VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE;
3664
5beefb4f
SH		 3665 txdl_size = device_config->vp_config[i].fifo.max_frags *
3666 sizeof(struct vxge_hw_fifo_txd);
703da5a1
RV		 3667 txdl_per_memblock = VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE / txdl_size;
3668
3669 device_config->vp_config[i].fifo.fifo_blocks =
3670 ((VXGE_DEF_FIFO_LENGTH - 1) / txdl_per_memblock) + 1;
3671
3672 device_config->vp_config[i].fifo.intr =
3673 VXGE_HW_FIFO_QUEUE_INTR_DISABLE;
3674
3675 /* Configure tti properties */
3676 device_config->vp_config[i].tti.intr_enable =
3677 VXGE_HW_TIM_INTR_ENABLE;
3678
3679 device_config->vp_config[i].tti.btimer_val =
3680 (VXGE_TTI_BTIMER_VAL * 1000) / 272;
3681
3682 device_config->vp_config[i].tti.timer_ac_en =
3683 VXGE_HW_TIM_TIMER_AC_ENABLE;
3684
528f7272
JM		 3685 /* For msi-x with napi (each vector has a handler of its own) -
3686 * Set CI to OFF for all vpaths
3687 */
703da5a1
RV		 3688 device_config->vp_config[i].tti.timer_ci_en =
3689 VXGE_HW_TIM_TIMER_CI_DISABLE;
3690
3691 device_config->vp_config[i].tti.timer_ri_en =
3692 VXGE_HW_TIM_TIMER_RI_DISABLE;
3693
3694 device_config->vp_config[i].tti.util_sel =
3695 VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL;
3696
3697 device_config->vp_config[i].tti.ltimer_val =
3698 (VXGE_TTI_LTIMER_VAL * 1000) / 272;
3699
3700 device_config->vp_config[i].tti.rtimer_val =
3701 (VXGE_TTI_RTIMER_VAL * 1000) / 272;
3702
3703 device_config->vp_config[i].tti.urange_a = TTI_TX_URANGE_A;
3704 device_config->vp_config[i].tti.urange_b = TTI_TX_URANGE_B;
3705 device_config->vp_config[i].tti.urange_c = TTI_TX_URANGE_C;
3706 device_config->vp_config[i].tti.uec_a = TTI_TX_UFC_A;
3707 device_config->vp_config[i].tti.uec_b = TTI_TX_UFC_B;
3708 device_config->vp_config[i].tti.uec_c = TTI_TX_UFC_C;
3709 device_config->vp_config[i].tti.uec_d = TTI_TX_UFC_D;
3710
3711 /* Configure Rx rings */
3712 device_config->vp_config[i].ring.enable =
3713 VXGE_HW_RING_ENABLE;
3714
3715 device_config->vp_config[i].ring.ring_blocks =
3716 VXGE_HW_DEF_RING_BLOCKS;
528f7272 3717
703da5a1
RV		 3718 device_config->vp_config[i].ring.buffer_mode =
3719 VXGE_HW_RING_RXD_BUFFER_MODE_1;
528f7272 3720
703da5a1
RV		 3721 device_config->vp_config[i].ring.rxds_limit =
3722 VXGE_HW_DEF_RING_RXDS_LIMIT;
528f7272 3723
703da5a1
RV		 3724 device_config->vp_config[i].ring.scatter_mode =
3725 VXGE_HW_RING_SCATTER_MODE_A;
3726
3727 /* Configure rti properties */
3728 device_config->vp_config[i].rti.intr_enable =
3729 VXGE_HW_TIM_INTR_ENABLE;
3730
3731 device_config->vp_config[i].rti.btimer_val =
3732 (VXGE_RTI_BTIMER_VAL * 1000)/272;
3733
3734 device_config->vp_config[i].rti.timer_ac_en =
3735 VXGE_HW_TIM_TIMER_AC_ENABLE;
3736
3737 device_config->vp_config[i].rti.timer_ci_en =
3738 VXGE_HW_TIM_TIMER_CI_DISABLE;
3739
3740 device_config->vp_config[i].rti.timer_ri_en =
3741 VXGE_HW_TIM_TIMER_RI_DISABLE;
3742
3743 device_config->vp_config[i].rti.util_sel =
3744 VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL;
3745
3746 device_config->vp_config[i].rti.urange_a =
3747 RTI_RX_URANGE_A;
3748 device_config->vp_config[i].rti.urange_b =
3749 RTI_RX_URANGE_B;
3750 device_config->vp_config[i].rti.urange_c =
3751 RTI_RX_URANGE_C;
3752 device_config->vp_config[i].rti.uec_a = RTI_RX_UFC_A;
3753 device_config->vp_config[i].rti.uec_b = RTI_RX_UFC_B;
3754 device_config->vp_config[i].rti.uec_c = RTI_RX_UFC_C;
3755 device_config->vp_config[i].rti.uec_d = RTI_RX_UFC_D;
3756
3757 device_config->vp_config[i].rti.rtimer_val =
3758 (VXGE_RTI_RTIMER_VAL * 1000) / 272;
3759
3760 device_config->vp_config[i].rti.ltimer_val =
3761 (VXGE_RTI_LTIMER_VAL * 1000) / 272;
3762
3763 device_config->vp_config[i].rpa_strip_vlan_tag =
3764 vlan_tag_strip;
3765 }
3766
3767 driver_config->vpath_per_dev = temp;
3768 return no_of_vpaths;
3769}
3770
3771/* initialize device configuratrions */
3772static void __devinit vxge_device_config_init(
3773 struct vxge_hw_device_config *device_config,
3774 int *intr_type)
3775{
3776 /* Used for CQRQ/SRQ. */
3777 device_config->dma_blockpool_initial =
3778 VXGE_HW_INITIAL_DMA_BLOCK_POOL_SIZE;
3779
3780 device_config->dma_blockpool_max =
3781 VXGE_HW_MAX_DMA_BLOCK_POOL_SIZE;
3782
3783 if (max_mac_vpath > VXGE_MAX_MAC_ADDR_COUNT)
3784 max_mac_vpath = VXGE_MAX_MAC_ADDR_COUNT;
3785
3786#ifndef CONFIG_PCI_MSI
3787 vxge_debug_init(VXGE_ERR,
3788 "%s: This Kernel does not support "
3789 "MSI-X. Defaulting to INTA", VXGE_DRIVER_NAME);
3790 *intr_type = INTA;
3791#endif
3792
3793 /* Configure whether MSI-X or IRQL. */
3794 switch (*intr_type) {
3795 case INTA:
3796 device_config->intr_mode = VXGE_HW_INTR_MODE_IRQLINE;
3797 break;
3798
3799 case MSI_X:
3800 device_config->intr_mode = VXGE_HW_INTR_MODE_MSIX;
3801 break;
3802 }
528f7272 3803
703da5a1
RV		 3804 /* Timer period between device poll */
3805 device_config->device_poll_millis = VXGE_TIMER_DELAY;
3806
3807 /* Configure mac based steering. */
3808 device_config->rts_mac_en = addr_learn_en;
3809
3810 /* Configure Vpaths */
3811 device_config->rth_it_type = VXGE_HW_RTH_IT_TYPE_MULTI_IT;
3812
3813 vxge_debug_ll_config(VXGE_TRACE, "%s : Device Config Params ",
3814 __func__);
703da5a1
RV		 3815 vxge_debug_ll_config(VXGE_TRACE, "intr_mode : %d",
3816 device_config->intr_mode);
3817 vxge_debug_ll_config(VXGE_TRACE, "device_poll_millis : %d",
3818 device_config->device_poll_millis);
703da5a1
RV		 3819 vxge_debug_ll_config(VXGE_TRACE, "rth_en : %d",
3820 device_config->rth_en);
3821 vxge_debug_ll_config(VXGE_TRACE, "rth_it_type : %d",
3822 device_config->rth_it_type);
3823}
3824
3825static void __devinit vxge_print_parm(struct vxgedev *vdev, u64 vpath_mask)
3826{
3827 int i;
3828
3829 vxge_debug_init(VXGE_TRACE,
3830 "%s: %d Vpath(s) opened",
3831 vdev->ndev->name, vdev->no_of_vpath);
3832
3833 switch (vdev->config.intr_type) {
3834 case INTA:
3835 vxge_debug_init(VXGE_TRACE,
3836 "%s: Interrupt type INTA", vdev->ndev->name);
3837 break;
3838
3839 case MSI_X:
3840 vxge_debug_init(VXGE_TRACE,
3841 "%s: Interrupt type MSI-X", vdev->ndev->name);
3842 break;
3843 }
3844
3845 if (vdev->config.rth_steering) {
3846 vxge_debug_init(VXGE_TRACE,
3847 "%s: RTH steering enabled for TCP_IPV4",
3848 vdev->ndev->name);
3849 } else {
3850 vxge_debug_init(VXGE_TRACE,
3851 "%s: RTH steering disabled", vdev->ndev->name);
3852 }
3853
3854 switch (vdev->config.tx_steering_type) {
3855 case NO_STEERING:
3856 vxge_debug_init(VXGE_TRACE,
3857 "%s: Tx steering disabled", vdev->ndev->name);
3858 break;
3859 case TX_PRIORITY_STEERING:
3860 vxge_debug_init(VXGE_TRACE,
3861 "%s: Unsupported tx steering option",
3862 vdev->ndev->name);
3863 vxge_debug_init(VXGE_TRACE,
3864 "%s: Tx steering disabled", vdev->ndev->name);
3865 vdev->config.tx_steering_type = 0;
3866 break;
3867 case TX_VLAN_STEERING:
3868 vxge_debug_init(VXGE_TRACE,
3869 "%s: Unsupported tx steering option",
3870 vdev->ndev->name);
3871 vxge_debug_init(VXGE_TRACE,
3872 "%s: Tx steering disabled", vdev->ndev->name);
3873 vdev->config.tx_steering_type = 0;
3874 break;
3875 case TX_MULTIQ_STEERING:
3876 vxge_debug_init(VXGE_TRACE,
3877 "%s: Tx multiqueue steering enabled",
3878 vdev->ndev->name);
3879 break;
3880 case TX_PORT_STEERING:
3881 vxge_debug_init(VXGE_TRACE,
3882 "%s: Tx port steering enabled",
3883 vdev->ndev->name);
3884 break;
3885 default:
3886 vxge_debug_init(VXGE_ERR,
3887 "%s: Unsupported tx steering type",
3888 vdev->ndev->name);
3889 vxge_debug_init(VXGE_TRACE,
3890 "%s: Tx steering disabled", vdev->ndev->name);
3891 vdev->config.tx_steering_type = 0;
3892 }
3893
3894 if (vdev->config.gro_enable) {
3895 vxge_debug_init(VXGE_ERR,
3896 "%s: Generic receive offload enabled",
3897 vdev->ndev->name);
3898 } else
3899 vxge_debug_init(VXGE_TRACE,
3900 "%s: Generic receive offload disabled",
3901 vdev->ndev->name);
3902
3903 if (vdev->config.addr_learn_en)
3904 vxge_debug_init(VXGE_TRACE,
3905 "%s: MAC Address learning enabled", vdev->ndev->name);
3906
703da5a1
RV		 3907 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3908 if (!vxge_bVALn(vpath_mask, i, 1))
3909 continue;
3910 vxge_debug_ll_config(VXGE_TRACE,
3911 "%s: MTU size - %d", vdev->ndev->name,
3912 ((struct __vxge_hw_device *)(vdev->devh))->
3913 config.vp_config[i].mtu);
3914 vxge_debug_init(VXGE_TRACE,
3915 "%s: VLAN tag stripping %s", vdev->ndev->name,
3916 ((struct __vxge_hw_device *)(vdev->devh))->
3917 config.vp_config[i].rpa_strip_vlan_tag
3918 ? "Enabled" : "Disabled");
703da5a1
RV		 3919 vxge_debug_ll_config(VXGE_TRACE,
3920 "%s: Max frags : %d", vdev->ndev->name,
3921 ((struct __vxge_hw_device *)(vdev->devh))->
3922 config.vp_config[i].fifo.max_frags);
3923 break;
3924 }
3925}
3926
3927#ifdef CONFIG_PM
3928/**
3929 * vxge_pm_suspend - vxge power management suspend entry point
3930 *
3931 */
3932static int vxge_pm_suspend(struct pci_dev *pdev, pm_message_t state)
3933{
3934 return -ENOSYS;
3935}
3936/**
3937 * vxge_pm_resume - vxge power management resume entry point
3938 *
3939 */
3940static int vxge_pm_resume(struct pci_dev *pdev)
3941{
3942 return -ENOSYS;
3943}
3944
3945#endif
3946
3947/**
3948 * vxge_io_error_detected - called when PCI error is detected
3949 * @pdev: Pointer to PCI device
3950 * @state: The current pci connection state
3951 *
3952 * This function is called after a PCI bus error affecting
3953 * this device has been detected.
3954 */
3955static pci_ers_result_t vxge_io_error_detected(struct pci_dev *pdev,
3956 pci_channel_state_t state)
3957{
d8ee7071 3958 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
703da5a1
RV		 3959 struct net_device *netdev = hldev->ndev;
3960
3961 netif_device_detach(netdev);
3962
e33b992d
DN		 3963 if (state == pci_channel_io_perm_failure)
3964 return PCI_ERS_RESULT_DISCONNECT;
3965
703da5a1
RV		 3966 if (netif_running(netdev)) {
3967 /* Bring down the card, while avoiding PCI I/O */
3968 do_vxge_close(netdev, 0);
3969 }
3970
3971 pci_disable_device(pdev);
3972
3973 return PCI_ERS_RESULT_NEED_RESET;
3974}
3975
3976/**
3977 * vxge_io_slot_reset - called after the pci bus has been reset.
3978 * @pdev: Pointer to PCI device
3979 *
3980 * Restart the card from scratch, as if from a cold-boot.
3981 * At this point, the card has exprienced a hard reset,
3982 * followed by fixups by BIOS, and has its config space
3983 * set up identically to what it was at cold boot.
3984 */
3985static pci_ers_result_t vxge_io_slot_reset(struct pci_dev *pdev)
3986{
d8ee7071 3987 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
703da5a1
RV		 3988 struct net_device *netdev = hldev->ndev;
3989
3990 struct vxgedev *vdev = netdev_priv(netdev);
3991
3992 if (pci_enable_device(pdev)) {
75f5e1c6 3993 netdev_err(netdev, "Cannot re-enable device after reset\n");
703da5a1
RV		 3994 return PCI_ERS_RESULT_DISCONNECT;
3995 }
3996
3997 pci_set_master(pdev);
528f7272 3998 do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
703da5a1
RV		 3999
4000 return PCI_ERS_RESULT_RECOVERED;
4001}
4002
4003/**
4004 * vxge_io_resume - called when traffic can start flowing again.
4005 * @pdev: Pointer to PCI device
4006 *
4007 * This callback is called when the error recovery driver tells
4008 * us that its OK to resume normal operation.
4009 */
4010static void vxge_io_resume(struct pci_dev *pdev)
4011{
d8ee7071 4012 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
703da5a1
RV		 4013 struct net_device *netdev = hldev->ndev;
4014
4015 if (netif_running(netdev)) {
4016 if (vxge_open(netdev)) {
75f5e1c6
JP		 4017 netdev_err(netdev,
4018 "Can't bring device back up after reset\n");
703da5a1
RV		 4019 return;
4020 }
4021 }
4022
4023 netif_device_attach(netdev);
4024}
4025
cb27ec60
SH		 4026static inline u32 vxge_get_num_vfs(u64 function_mode)
4027{
4028 u32 num_functions = 0;
4029
4030 switch (function_mode) {
4031 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
4032 case VXGE_HW_FUNCTION_MODE_SRIOV_8:
4033 num_functions = 8;
4034 break;
4035 case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
4036 num_functions = 1;
4037 break;
4038 case VXGE_HW_FUNCTION_MODE_SRIOV:
4039 case VXGE_HW_FUNCTION_MODE_MRIOV:
4040 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_17:
4041 num_functions = 17;
4042 break;
4043 case VXGE_HW_FUNCTION_MODE_SRIOV_4:
4044 num_functions = 4;
4045 break;
4046 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_2:
4047 num_functions = 2;
4048 break;
4049 case VXGE_HW_FUNCTION_MODE_MRIOV_8:
4050 num_functions = 8; /* TODO */
4051 break;
4052 }
4053 return num_functions;
4054}
4055
e8ac1756
JM		 4056int vxge_fw_upgrade(struct vxgedev *vdev, char *fw_name, int override)
4057{
4058 struct __vxge_hw_device *hldev = vdev->devh;
4059 u32 maj, min, bld, cmaj, cmin, cbld;
4060 enum vxge_hw_status status;
4061 const struct firmware *fw;
4062 int ret;
4063
4064 ret = request_firmware(&fw, fw_name, &vdev->pdev->dev);
4065 if (ret) {
4066 vxge_debug_init(VXGE_ERR, "%s: Firmware file '%s' not found",
4067 VXGE_DRIVER_NAME, fw_name);
4068 goto out;
4069 }
4070
4071 /* Load the new firmware onto the adapter */
4072 status = vxge_update_fw_image(hldev, fw->data, fw->size);
4073 if (status != VXGE_HW_OK) {
4074 vxge_debug_init(VXGE_ERR,
4075 "%s: FW image download to adapter failed '%s'.",
4076 VXGE_DRIVER_NAME, fw_name);
4077 ret = -EIO;
4078 goto out;
4079 }
4080
4081 /* Read the version of the new firmware */
4082 status = vxge_hw_upgrade_read_version(hldev, &maj, &min, &bld);
4083 if (status != VXGE_HW_OK) {
4084 vxge_debug_init(VXGE_ERR,
4085 "%s: Upgrade read version failed '%s'.",
4086 VXGE_DRIVER_NAME, fw_name);
4087 ret = -EIO;
4088 goto out;
4089 }
4090
4091 cmaj = vdev->config.device_hw_info.fw_version.major;
4092 cmin = vdev->config.device_hw_info.fw_version.minor;
4093 cbld = vdev->config.device_hw_info.fw_version.build;
4094 /* It's possible the version in /lib/firmware is not the latest version.
4095 * If so, we could get into a loop of trying to upgrade to the latest
4096 * and flashing the older version.
4097 */
4098 if (VXGE_FW_VER(maj, min, bld) == VXGE_FW_VER(cmaj, cmin, cbld) &&
4099 !override) {
4100 ret = -EINVAL;
4101 goto out;
4102 }
4103
4104 printk(KERN_NOTICE "Upgrade to firmware version %d.%d.%d commencing\n",
4105 maj, min, bld);
4106
4107 /* Flash the adapter with the new firmware */
4108 status = vxge_hw_flash_fw(hldev);
4109 if (status != VXGE_HW_OK) {
4110 vxge_debug_init(VXGE_ERR, "%s: Upgrade commit failed '%s'.",
4111 VXGE_DRIVER_NAME, fw_name);
4112 ret = -EIO;
4113 goto out;
4114 }
4115
4116 printk(KERN_NOTICE "Upgrade of firmware successful! Adapter must be "
4117 "hard reset before using, thus requiring a system reboot or a "
4118 "hotplug event.\n");
4119
4120out:
4121 return ret;
4122}
4123
4124static int vxge_probe_fw_update(struct vxgedev *vdev)
4125{
4126 u32 maj, min, bld;
4127 int ret, gpxe = 0;
4128 char *fw_name;
4129
4130 maj = vdev->config.device_hw_info.fw_version.major;
4131 min = vdev->config.device_hw_info.fw_version.minor;
4132 bld = vdev->config.device_hw_info.fw_version.build;
4133
4134 if (VXGE_FW_VER(maj, min, bld) == VXGE_CERT_FW_VER)
4135 return 0;
4136
4137 /* Ignore the build number when determining if the current firmware is
4138 * "too new" to load the driver
4139 */
4140 if (VXGE_FW_VER(maj, min, 0) > VXGE_CERT_FW_VER) {
4141 vxge_debug_init(VXGE_ERR, "%s: Firmware newer than last known "
4142 "version, unable to load driver\n",
4143 VXGE_DRIVER_NAME);
4144 return -EINVAL;
4145 }
4146
4147 /* Firmware 1.4.4 and older cannot be upgraded, and is too ancient to
4148 * work with this driver.
4149 */
4150 if (VXGE_FW_VER(maj, min, bld) <= VXGE_FW_DEAD_VER) {
4151 vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d cannot be "
4152 "upgraded\n", VXGE_DRIVER_NAME, maj, min, bld);
4153 return -EINVAL;
4154 }
4155
4156 /* If file not specified, determine gPXE or not */
4157 if (VXGE_FW_VER(maj, min, bld) >= VXGE_EPROM_FW_VER) {
4158 int i;
4159 for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++)
4160 if (vdev->devh->eprom_versions[i]) {
4161 gpxe = 1;
4162 break;
4163 }
4164 }
4165 if (gpxe)
4166 fw_name = "vxge/X3fw-pxe.ncf";
4167 else
4168 fw_name = "vxge/X3fw.ncf";
4169
4170 ret = vxge_fw_upgrade(vdev, fw_name, 0);
4171 /* -EINVAL and -ENOENT are not fatal errors for flashing firmware on
4172 * probe, so ignore them
4173 */
4174 if (ret != -EINVAL && ret != -ENOENT)
4175 return -EIO;
4176 else
4177 ret = 0;
4178
4179 if (VXGE_FW_VER(VXGE_CERT_FW_VER_MAJOR, VXGE_CERT_FW_VER_MINOR, 0) >
4180 VXGE_FW_VER(maj, min, 0)) {
4181 vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d is too old to"
4182 " be used with this driver.\n"
4183 "Please get the latest version from "
4184 "ftp://ftp.s2io.com/pub/X3100-Drivers/FIRMWARE",
4185 VXGE_DRIVER_NAME, maj, min, bld);
4186 return -EINVAL;
4187 }
4188
4189 return ret;
4190}
4191
c92bf70d
JM		 4192static int __devinit is_sriov_initialized(struct pci_dev *pdev)
4193{
4194 int pos;
4195 u16 ctrl;
4196
4197 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
4198 if (pos) {
4199 pci_read_config_word(pdev, pos + PCI_SRIOV_CTRL, &ctrl);
4200 if (ctrl & PCI_SRIOV_CTRL_VFE)
4201 return 1;
4202 }
4203 return 0;
4204}
4205
703da5a1
RV		 4206/**
4207 * vxge_probe
4208 * @pdev : structure containing the PCI related information of the device.
4209 * @pre: List of PCI devices supported by the driver listed in vxge_id_table.
4210 * Description:
4211 * This function is called when a new PCI device gets detected and initializes
4212 * it.
4213 * Return value:
4214 * returns 0 on success and negative on failure.
4215 *
4216 */
4217static int __devinit
4218vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre)
4219{
2c91308f 4220 struct __vxge_hw_device *hldev;
703da5a1
RV		 4221 enum vxge_hw_status status;
4222 int ret;
4223 int high_dma = 0;
4224 u64 vpath_mask = 0;
4225 struct vxgedev *vdev;
7dad171c 4226 struct vxge_config *ll_config = NULL;
703da5a1
RV		 4227 struct vxge_hw_device_config *device_config = NULL;
4228 struct vxge_hw_device_attr attr;
4229 int i, j, no_of_vpath = 0, max_vpath_supported = 0;
4230 u8 *macaddr;
4231 struct vxge_mac_addrs *entry;
4232 static int bus = -1, device = -1;
cb27ec60 4233 u32 host_type;
703da5a1 4234 u8 new_device = 0;
cb27ec60
SH		 4235 enum vxge_hw_status is_privileged;
4236 u32 function_mode;
4237 u32 num_vfs = 0;
703da5a1
RV		 4238
4239 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
4240 attr.pdev = pdev;
4241
cb27ec60 4242 /* In SRIOV-17 mode, functions of the same adapter
528f7272
JM		 4243 * can be deployed on different buses
4244 */
4245 if (((bus != pdev->bus->number) || (device != PCI_SLOT(pdev->devfn))) &&
4246 !pdev->is_virtfn)
703da5a1
RV		 4247 new_device = 1;
4248
4249 bus = pdev->bus->number;
4250 device = PCI_SLOT(pdev->devfn);
4251
4252 if (new_device) {
4253 if (driver_config->config_dev_cnt &&
4254 (driver_config->config_dev_cnt !=
4255 driver_config->total_dev_cnt))
4256 vxge_debug_init(VXGE_ERR,
4257 "%s: Configured %d of %d devices",
4258 VXGE_DRIVER_NAME,
4259 driver_config->config_dev_cnt,
4260 driver_config->total_dev_cnt);
4261 driver_config->config_dev_cnt = 0;
4262 driver_config->total_dev_cnt = 0;
703da5a1 4263 }
528f7272 4264
9002397e
SH		 4265 /* Now making the CPU based no of vpath calculation
4266 * applicable for individual functions as well.
4267 */
4268 driver_config->g_no_cpus = 0;
657205bd
SH		 4269 driver_config->vpath_per_dev = max_config_vpath;
4270
703da5a1
RV		 4271 driver_config->total_dev_cnt++;
4272 if (++driver_config->config_dev_cnt > max_config_dev) {
4273 ret = 0;
4274 goto _exit0;
4275 }
4276
4277 device_config = kzalloc(sizeof(struct vxge_hw_device_config),
4278 GFP_KERNEL);
4279 if (!device_config) {
4280 ret = -ENOMEM;
4281 vxge_debug_init(VXGE_ERR,
4282 "device_config : malloc failed %s %d",
4283 __FILE__, __LINE__);
4284 goto _exit0;
4285 }
4286
528f7272 4287 ll_config = kzalloc(sizeof(struct vxge_config), GFP_KERNEL);
7dad171c
PB		 4288 if (!ll_config) {
4289 ret = -ENOMEM;
4290 vxge_debug_init(VXGE_ERR,
528f7272 4291 "device_config : malloc failed %s %d",
7dad171c
PB		 4292 __FILE__, __LINE__);
4293 goto _exit0;
4294 }
4295 ll_config->tx_steering_type = TX_MULTIQ_STEERING;
4296 ll_config->intr_type = MSI_X;
4297 ll_config->napi_weight = NEW_NAPI_WEIGHT;
4298 ll_config->rth_steering = RTH_STEERING;
703da5a1
RV		 4299
4300 /* get the default configuration parameters */
4301 vxge_hw_device_config_default_get(device_config);
4302
4303 /* initialize configuration parameters */
7dad171c 4304 vxge_device_config_init(device_config, &ll_config->intr_type);
703da5a1
RV		 4305
4306 ret = pci_enable_device(pdev);
4307 if (ret) {
4308 vxge_debug_init(VXGE_ERR,
4309 "%s : can not enable PCI device", __func__);
4310 goto _exit0;
4311 }
4312
b3837cec 4313 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
703da5a1
RV		 4314 vxge_debug_ll_config(VXGE_TRACE,
4315 "%s : using 64bit DMA", __func__);
4316
4317 high_dma = 1;
4318
4319 if (pci_set_consistent_dma_mask(pdev,
b3837cec 4320 DMA_BIT_MASK(64))) {
703da5a1
RV		 4321 vxge_debug_init(VXGE_ERR,
4322 "%s : unable to obtain 64bit DMA for "
4323 "consistent allocations", __func__);
4324 ret = -ENOMEM;
4325 goto _exit1;
4326 }
b3837cec 4327 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
703da5a1
RV		 4328 vxge_debug_ll_config(VXGE_TRACE,
4329 "%s : using 32bit DMA", __func__);
4330 } else {
4331 ret = -ENOMEM;
4332 goto _exit1;
4333 }
4334
dc66daa9 4335 if (pci_request_region(pdev, 0, VXGE_DRIVER_NAME)) {
703da5a1
RV		 4336 vxge_debug_init(VXGE_ERR,
4337 "%s : request regions failed", __func__);
4338 ret = -ENODEV;
4339 goto _exit1;
4340 }
4341
4342 pci_set_master(pdev);
4343
4344 attr.bar0 = pci_ioremap_bar(pdev, 0);
4345 if (!attr.bar0) {
4346 vxge_debug_init(VXGE_ERR,
4347 "%s : cannot remap io memory bar0", __func__);
4348 ret = -ENODEV;
4349 goto _exit2;
4350 }
4351 vxge_debug_ll_config(VXGE_TRACE,
4352 "pci ioremap bar0: %p:0x%llx",
4353 attr.bar0,
4354 (unsigned long long)pci_resource_start(pdev, 0));
4355
703da5a1 4356 status = vxge_hw_device_hw_info_get(attr.bar0,
7dad171c 4357 &ll_config->device_hw_info);
703da5a1
RV		 4358 if (status != VXGE_HW_OK) {
4359 vxge_debug_init(VXGE_ERR,
4360 "%s: Reading of hardware info failed."
4361 "Please try upgrading the firmware.", VXGE_DRIVER_NAME);
4362 ret = -EINVAL;
7975d1ee 4363 goto _exit3;
703da5a1
RV		 4364 }
4365
7dad171c 4366 vpath_mask = ll_config->device_hw_info.vpath_mask;
703da5a1
RV		 4367 if (vpath_mask == 0) {
4368 vxge_debug_ll_config(VXGE_TRACE,
4369 "%s: No vpaths available in device", VXGE_DRIVER_NAME);
4370 ret = -EINVAL;
7975d1ee 4371 goto _exit3;
703da5a1
RV		 4372 }
4373
4374 vxge_debug_ll_config(VXGE_TRACE,
4375 "%s:%d Vpath mask = %llx", __func__, __LINE__,
4376 (unsigned long long)vpath_mask);
4377
7dad171c
PB		 4378 function_mode = ll_config->device_hw_info.function_mode;
4379 host_type = ll_config->device_hw_info.host_type;
cb27ec60 4380 is_privileged = __vxge_hw_device_is_privilaged(host_type,
7dad171c 4381 ll_config->device_hw_info.func_id);
cb27ec60 4382
703da5a1
RV		 4383 /* Check how many vpaths are available */
4384 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
4385 if (!((vpath_mask) & vxge_mBIT(i)))
4386 continue;
4387 max_vpath_supported++;
4388 }
4389
cb27ec60
SH		 4390 if (new_device)
4391 num_vfs = vxge_get_num_vfs(function_mode) - 1;
4392
5dbc9011 4393 /* Enable SRIOV mode, if firmware has SRIOV support and if it is a PF */
c92bf70d
JM		 4394 if (is_sriov(function_mode) && !is_sriov_initialized(pdev) &&
4395 (ll_config->intr_type != INTA)) {
4396 ret = pci_enable_sriov(pdev, num_vfs);
cb27ec60
SH		 4397 if (ret)
4398 vxge_debug_ll_config(VXGE_ERR,
4399 "Failed in enabling SRIOV mode: %d\n", ret);
c92bf70d 4400 /* No need to fail out, as an error here is non-fatal */
5dbc9011
SS		 4401 }
4402
703da5a1
RV		 4403 /*
4404 * Configure vpaths and get driver configured number of vpaths
4405 * which is less than or equal to the maximum vpaths per function.
4406 */
7dad171c 4407 no_of_vpath = vxge_config_vpaths(device_config, vpath_mask, ll_config);
703da5a1
RV		 4408 if (!no_of_vpath) {
4409 vxge_debug_ll_config(VXGE_ERR,
4410 "%s: No more vpaths to configure", VXGE_DRIVER_NAME);
4411 ret = 0;
7975d1ee 4412 goto _exit3;
703da5a1
RV		 4413 }
4414
4415 /* Setting driver callbacks */
4416 attr.uld_callbacks.link_up = vxge_callback_link_up;
4417 attr.uld_callbacks.link_down = vxge_callback_link_down;
4418 attr.uld_callbacks.crit_err = vxge_callback_crit_err;
4419
4420 status = vxge_hw_device_initialize(&hldev, &attr, device_config);
4421 if (status != VXGE_HW_OK) {
4422 vxge_debug_init(VXGE_ERR,
4423 "Failed to initialize device (%d)", status);
4424 ret = -EINVAL;
7975d1ee 4425 goto _exit3;
703da5a1
RV		 4426 }
4427
e8ac1756
JM		 4428 if (VXGE_FW_VER(ll_config->device_hw_info.fw_version.major,
4429 ll_config->device_hw_info.fw_version.minor,
4430 ll_config->device_hw_info.fw_version.build) >=
4431 VXGE_EPROM_FW_VER) {
4432 struct eprom_image img[VXGE_HW_MAX_ROM_IMAGES];
4433
4434 status = vxge_hw_vpath_eprom_img_ver_get(hldev, img);
4435 if (status != VXGE_HW_OK) {
4436 vxge_debug_init(VXGE_ERR, "%s: Reading of EPROM failed",
4437 VXGE_DRIVER_NAME);
4438 /* This is a non-fatal error, continue */
4439 }
4440
4441 for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++) {
4442 hldev->eprom_versions[i] = img[i].version;
4443 if (!img[i].is_valid)
4444 break;
4445 vxge_debug_init(VXGE_TRACE, "%s: EPROM %d, version "
4446 "%d.%d.%d.%d\n", VXGE_DRIVER_NAME, i,
4447 VXGE_EPROM_IMG_MAJOR(img[i].version),
4448 VXGE_EPROM_IMG_MINOR(img[i].version),
4449 VXGE_EPROM_IMG_FIX(img[i].version),
4450 VXGE_EPROM_IMG_BUILD(img[i].version));
4451 }
4452 }
4453
fa41fd10 4454 /* if FCS stripping is not disabled in MAC fail driver load */
b81b3733
JM		 4455 status = vxge_hw_vpath_strip_fcs_check(hldev, vpath_mask);
4456 if (status != VXGE_HW_OK) {
4457 vxge_debug_init(VXGE_ERR, "%s: FCS stripping is enabled in MAC"
4458 " failing driver load", VXGE_DRIVER_NAME);
fa41fd10
SH		 4459 ret = -EINVAL;
4460 goto _exit4;
4461 }
4462
703da5a1
RV		 4463 vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
4464
4465 /* set private device info */
4466 pci_set_drvdata(pdev, hldev);
4467
7dad171c
PB		 4468 ll_config->gro_enable = VXGE_GRO_ALWAYS_AGGREGATE;
4469 ll_config->fifo_indicate_max_pkts = VXGE_FIFO_INDICATE_MAX_PKTS;
4470 ll_config->addr_learn_en = addr_learn_en;
4471 ll_config->rth_algorithm = RTH_ALG_JENKINS;
47f01db4
JM		 4472 ll_config->rth_hash_type_tcpipv4 = 1;
4473 ll_config->rth_hash_type_ipv4 = 0;
4474 ll_config->rth_hash_type_tcpipv6 = 0;
4475 ll_config->rth_hash_type_ipv6 = 0;
4476 ll_config->rth_hash_type_tcpipv6ex = 0;
4477 ll_config->rth_hash_type_ipv6ex = 0;
7dad171c
PB		 4478 ll_config->rth_bkt_sz = RTH_BUCKET_SIZE;
4479 ll_config->tx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
4480 ll_config->rx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
4481
e8ac1756
JM		 4482 ret = vxge_device_register(hldev, ll_config, high_dma, no_of_vpath,
4483 &vdev);
4484 if (ret) {
703da5a1 4485 ret = -EINVAL;
7975d1ee 4486 goto _exit4;
703da5a1
RV		 4487 }
4488
e8ac1756
JM		 4489 ret = vxge_probe_fw_update(vdev);
4490 if (ret)
4491 goto _exit5;
4492
703da5a1
RV		 4493 vxge_hw_device_debug_set(hldev, VXGE_TRACE, VXGE_COMPONENT_LL);
4494 VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
4495 vxge_hw_device_trace_level_get(hldev));
4496
4497 /* set private HW device info */
703da5a1
RV		 4498 vdev->mtu = VXGE_HW_DEFAULT_MTU;
4499 vdev->bar0 = attr.bar0;
703da5a1
RV		 4500 vdev->max_vpath_supported = max_vpath_supported;
4501 vdev->no_of_vpath = no_of_vpath;
4502
4503 /* Virtual Path count */
4504 for (i = 0, j = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
4505 if (!vxge_bVALn(vpath_mask, i, 1))
4506 continue;
4507 if (j >= vdev->no_of_vpath)
4508 break;
4509
4510 vdev->vpaths[j].is_configured = 1;
4511 vdev->vpaths[j].device_id = i;
703da5a1
RV		 4512 vdev->vpaths[j].ring.driver_id = j;
4513 vdev->vpaths[j].vdev = vdev;
4514 vdev->vpaths[j].max_mac_addr_cnt = max_mac_vpath;
4515 memcpy((u8 *)vdev->vpaths[j].macaddr,
7dad171c 4516 ll_config->device_hw_info.mac_addrs[i],
703da5a1
RV		 4517 ETH_ALEN);
4518
4519 /* Initialize the mac address list header */
4520 INIT_LIST_HEAD(&vdev->vpaths[j].mac_addr_list);
4521
4522 vdev->vpaths[j].mac_addr_cnt = 0;
4523 vdev->vpaths[j].mcast_addr_cnt = 0;
4524 j++;
4525 }
4526 vdev->exec_mode = VXGE_EXEC_MODE_DISABLE;
4527 vdev->max_config_port = max_config_port;
4528
4529 vdev->vlan_tag_strip = vlan_tag_strip;
4530
4531 /* map the hashing selector table to the configured vpaths */
4532 for (i = 0; i < vdev->no_of_vpath; i++)
4533 vdev->vpath_selector[i] = vpath_selector[i];
4534
4535 macaddr = (u8 *)vdev->vpaths[0].macaddr;
4536
7dad171c
PB		 4537 ll_config->device_hw_info.serial_number[VXGE_HW_INFO_LEN - 1] = '\0';
4538 ll_config->device_hw_info.product_desc[VXGE_HW_INFO_LEN - 1] = '\0';
4539 ll_config->device_hw_info.part_number[VXGE_HW_INFO_LEN - 1] = '\0';
703da5a1
RV		 4540
4541 vxge_debug_init(VXGE_TRACE, "%s: SERIAL NUMBER: %s",
7dad171c 4542 vdev->ndev->name, ll_config->device_hw_info.serial_number);
703da5a1
RV		 4543
4544 vxge_debug_init(VXGE_TRACE, "%s: PART NUMBER: %s",
7dad171c 4545 vdev->ndev->name, ll_config->device_hw_info.part_number);
703da5a1
RV		 4546
4547 vxge_debug_init(VXGE_TRACE, "%s: Neterion %s Server Adapter",
7dad171c 4548 vdev->ndev->name, ll_config->device_hw_info.product_desc);
703da5a1 4549
bf54e736 4550 vxge_debug_init(VXGE_TRACE, "%s: MAC ADDR: %pM",
4551 vdev->ndev->name, macaddr);
703da5a1
RV		 4552
4553 vxge_debug_init(VXGE_TRACE, "%s: Link Width x%d",
4554 vdev->ndev->name, vxge_hw_device_link_width_get(hldev));
4555
4556 vxge_debug_init(VXGE_TRACE,
4557 "%s: Firmware version : %s Date : %s", vdev->ndev->name,
7dad171c
PB		 4558 ll_config->device_hw_info.fw_version.version,
4559 ll_config->device_hw_info.fw_date.date);
703da5a1 4560
0a25bdc6 4561 if (new_device) {
7dad171c 4562 switch (ll_config->device_hw_info.function_mode) {
0a25bdc6
SH		 4563 case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
4564 vxge_debug_init(VXGE_TRACE,
4565 "%s: Single Function Mode Enabled", vdev->ndev->name);
4566 break;
4567 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
4568 vxge_debug_init(VXGE_TRACE,
4569 "%s: Multi Function Mode Enabled", vdev->ndev->name);
4570 break;
4571 case VXGE_HW_FUNCTION_MODE_SRIOV:
4572 vxge_debug_init(VXGE_TRACE,
4573 "%s: Single Root IOV Mode Enabled", vdev->ndev->name);
4574 break;
4575 case VXGE_HW_FUNCTION_MODE_MRIOV:
4576 vxge_debug_init(VXGE_TRACE,
4577 "%s: Multi Root IOV Mode Enabled", vdev->ndev->name);
4578 break;
4579 }
4580 }
4581
703da5a1
RV		 4582 vxge_print_parm(vdev, vpath_mask);
4583
4584 /* Store the fw version for ethttool option */
7dad171c 4585 strcpy(vdev->fw_version, ll_config->device_hw_info.fw_version.version);
703da5a1
RV		 4586 memcpy(vdev->ndev->dev_addr, (u8 *)vdev->vpaths[0].macaddr, ETH_ALEN);
4587 memcpy(vdev->ndev->perm_addr, vdev->ndev->dev_addr, ETH_ALEN);
4588
4589 /* Copy the station mac address to the list */
4590 for (i = 0; i < vdev->no_of_vpath; i++) {
e80be0b0 4591 entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_KERNEL);
703da5a1
RV		 4592 if (NULL == entry) {
4593 vxge_debug_init(VXGE_ERR,
4594 "%s: mac_addr_list : memory allocation failed",
4595 vdev->ndev->name);
4596 ret = -EPERM;
e8ac1756 4597 goto _exit6;
703da5a1
RV		 4598 }
4599 macaddr = (u8 *)&entry->macaddr;
4600 memcpy(macaddr, vdev->ndev->dev_addr, ETH_ALEN);
4601 list_add(&entry->item, &vdev->vpaths[i].mac_addr_list);
4602 vdev->vpaths[i].mac_addr_cnt = 1;
4603 }
4604
914d0d71 4605 kfree(device_config);
eb5f10c2
SH		 4606
4607 /*
4608 * INTA is shared in multi-function mode. This is unlike the INTA
4609 * implementation in MR mode, where each VH has its own INTA message.
4610 * - INTA is masked (disabled) as long as at least one function sets
4611 * its TITAN_MASK_ALL_INT.ALARM bit.
4612 * - INTA is unmasked (enabled) when all enabled functions have cleared
4613 * their own TITAN_MASK_ALL_INT.ALARM bit.
4614 * The TITAN_MASK_ALL_INT ALARM & TRAFFIC bits are cleared on power up.
4615 * Though this driver leaves the top level interrupts unmasked while
4616 * leaving the required module interrupt bits masked on exit, there
4617 * could be a rougue driver around that does not follow this procedure
4618 * resulting in a failure to generate interrupts. The following code is
4619 * present to prevent such a failure.
4620 */
4621
7dad171c 4622 if (ll_config->device_hw_info.function_mode ==
eb5f10c2
SH		 4623 VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION)
4624 if (vdev->config.intr_type == INTA)
4625 vxge_hw_device_unmask_all(hldev);
4626
703da5a1
RV		 4627 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
4628 vdev->ndev->name, __func__, __LINE__);
4629
4630 vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
4631 VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
4632 vxge_hw_device_trace_level_get(hldev));
4633
7dad171c 4634 kfree(ll_config);
703da5a1
RV		 4635 return 0;
4636
e8ac1756 4637_exit6:
703da5a1
RV		 4638 for (i = 0; i < vdev->no_of_vpath; i++)
4639 vxge_free_mac_add_list(&vdev->vpaths[i]);
e8ac1756 4640_exit5:
703da5a1 4641 vxge_device_unregister(hldev);
7975d1ee 4642_exit4:
5dbc9011 4643 pci_disable_sriov(pdev);
703da5a1 4644 vxge_hw_device_terminate(hldev);
703da5a1
RV		 4645_exit3:
4646 iounmap(attr.bar0);
4647_exit2:
dc66daa9 4648 pci_release_region(pdev, 0);
703da5a1
RV		 4649_exit1:
4650 pci_disable_device(pdev);
4651_exit0:
7dad171c 4652 kfree(ll_config);
703da5a1
RV		 4653 kfree(device_config);
4654 driver_config->config_dev_cnt--;
4655 pci_set_drvdata(pdev, NULL);
4656 return ret;
4657}
4658
4659/**
4660 * vxge_rem_nic - Free the PCI device
4661 * @pdev: structure containing the PCI related information of the device.
4662 * Description: This function is called by the Pci subsystem to release a
4663 * PCI device and free up all resource held up by the device.
4664 */
2c91308f 4665static void __devexit vxge_remove(struct pci_dev *pdev)
703da5a1 4666{
2c91308f 4667 struct __vxge_hw_device *hldev;
703da5a1
RV		 4668 struct vxgedev *vdev = NULL;
4669 struct net_device *dev;
4670 int i = 0;
703da5a1 4671
d8ee7071 4672 hldev = pci_get_drvdata(pdev);
703da5a1
RV		 4673
4674 if (hldev == NULL)
4675 return;
2c91308f 4676
703da5a1
RV		 4677 dev = hldev->ndev;
4678 vdev = netdev_priv(dev);
4679
2c91308f 4680 vxge_debug_entryexit(vdev->level_trace, "%s:%d", __func__, __LINE__);
703da5a1 4681
2c91308f
JM		 4682 vxge_debug_init(vdev->level_trace, "%s : removing PCI device...",
4683 __func__);
703da5a1
RV		 4684 vxge_device_unregister(hldev);
4685
4686 for (i = 0; i < vdev->no_of_vpath; i++) {
4687 vxge_free_mac_add_list(&vdev->vpaths[i]);
4688 vdev->vpaths[i].mcast_addr_cnt = 0;
4689 vdev->vpaths[i].mac_addr_cnt = 0;
4690 }
4691
4692 kfree(vdev->vpaths);
4693
4694 iounmap(vdev->bar0);
703da5a1
RV		 4695
4696 /* we are safe to free it now */
4697 free_netdev(dev);
4698
2c91308f
JM		 4699 vxge_debug_init(vdev->level_trace, "%s:%d Device unregistered",
4700 __func__, __LINE__);
703da5a1
RV		 4701
4702 vxge_hw_device_terminate(hldev);
4703
4704 pci_disable_device(pdev);
dc66daa9 4705 pci_release_region(pdev, 0);
703da5a1 4706 pci_set_drvdata(pdev, NULL);
2c91308f
JM		 4707 vxge_debug_entryexit(vdev->level_trace, "%s:%d Exiting...", __func__,
4708 __LINE__);
703da5a1
RV		 4709}
4710
4711static struct pci_error_handlers vxge_err_handler = {
4712 .error_detected = vxge_io_error_detected,
4713 .slot_reset = vxge_io_slot_reset,
4714 .resume = vxge_io_resume,
4715};
4716
4717static struct pci_driver vxge_driver = {
4718 .name = VXGE_DRIVER_NAME,
4719 .id_table = vxge_id_table,
4720 .probe = vxge_probe,
4721 .remove = __devexit_p(vxge_remove),
4722#ifdef CONFIG_PM
4723 .suspend = vxge_pm_suspend,
4724 .resume = vxge_pm_resume,
4725#endif
4726 .err_handler = &vxge_err_handler,
4727};
4728
4729static int __init
4730vxge_starter(void)
4731{
4732 int ret = 0;
703da5a1 4733
75f5e1c6
JP		 4734 pr_info("Copyright(c) 2002-2010 Exar Corp.\n");
4735 pr_info("Driver version: %s\n", DRV_VERSION);
703da5a1
RV		 4736
4737 verify_bandwidth();
4738
4739 driver_config = kzalloc(sizeof(struct vxge_drv_config), GFP_KERNEL);
4740 if (!driver_config)
4741 return -ENOMEM;
4742
4743 ret = pci_register_driver(&vxge_driver);
528f7272
JM		 4744 if (ret) {
4745 kfree(driver_config);
4746 goto err;
4747 }
703da5a1
RV		 4748
4749 if (driver_config->config_dev_cnt &&
4750 (driver_config->config_dev_cnt != driver_config->total_dev_cnt))
4751 vxge_debug_init(VXGE_ERR,
4752 "%s: Configured %d of %d devices",
4753 VXGE_DRIVER_NAME, driver_config->config_dev_cnt,
4754 driver_config->total_dev_cnt);
528f7272 4755err:
703da5a1
RV		 4756 return ret;
4757}
4758
4759static void __exit
4760vxge_closer(void)
4761{
4762 pci_unregister_driver(&vxge_driver);
4763 kfree(driver_config);
4764}
4765module_init(vxge_starter);
4766module_exit(vxge_closer);
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