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net: vxge: convert to hw_features
[mirror_ubuntu-artful-kernel.git] / drivers / net / vxge / vxge-main.c
CommitLineData
703da5a1
RV		 1/******************************************************************************
2* This software may be used and distributed according to the terms of
3* the GNU General Public License (GPL), incorporated herein by reference.
4* Drivers based on or derived from this code fall under the GPL and must
5* retain the authorship, copyright and license notice. This file is not
6* a complete program and may only be used when the entire operating
7* system is licensed under the GPL.
8* See the file COPYING in this distribution for more information.
9*
926bd900 10* vxge-main.c: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O
703da5a1 11* Virtualized Server Adapter.
926bd900 12* Copyright(c) 2002-2010 Exar Corp.
703da5a1
RV		 13*
14* The module loadable parameters that are supported by the driver and a brief
15* explanation of all the variables:
16* vlan_tag_strip:
17* Strip VLAN Tag enable/disable. Instructs the device to remove
18* the VLAN tag from all received tagged frames that are not
19* replicated at the internal L2 switch.
20* 0 - Do not strip the VLAN tag.
21* 1 - Strip the VLAN tag.
22*
23* addr_learn_en:
24* Enable learning the mac address of the guest OS interface in
25* a virtualization environment.
26* 0 - DISABLE
27* 1 - ENABLE
28*
29* max_config_port:
30* Maximum number of port to be supported.
31* MIN -1 and MAX - 2
32*
33* max_config_vpath:
34* This configures the maximum no of VPATH configures for each
35* device function.
36* MIN - 1 and MAX - 17
37*
38* max_config_dev:
39* This configures maximum no of Device function to be enabled.
40* MIN - 1 and MAX - 17
41*
42******************************************************************************/
43
75f5e1c6
JP		 44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
703da5a1
RV		 46#include <linux/if_vlan.h>
47#include <linux/pci.h>
5a0e3ad6 48#include <linux/slab.h>
2b05e002 49#include <linux/tcp.h>
703da5a1
RV		 50#include <net/ip.h>
51#include <linux/netdevice.h>
52#include <linux/etherdevice.h>
e8ac1756 53#include <linux/firmware.h>
b81b3733 54#include <linux/net_tstamp.h>
703da5a1
RV		 55#include "vxge-main.h"
56#include "vxge-reg.h"
57
58MODULE_LICENSE("Dual BSD/GPL");
59MODULE_DESCRIPTION("Neterion's X3100 Series 10GbE PCIe I/O"
60 "Virtualized Server Adapter");
61
a3aa1884 62static DEFINE_PCI_DEVICE_TABLE(vxge_id_table) = {
703da5a1
RV		 63 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_WIN, PCI_ANY_ID,
64 PCI_ANY_ID},
65 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_UNI, PCI_ANY_ID,
66 PCI_ANY_ID},
67 {0}
68};
69
70MODULE_DEVICE_TABLE(pci, vxge_id_table);
71
72VXGE_MODULE_PARAM_INT(vlan_tag_strip, VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE);
73VXGE_MODULE_PARAM_INT(addr_learn_en, VXGE_HW_MAC_ADDR_LEARN_DEFAULT);
74VXGE_MODULE_PARAM_INT(max_config_port, VXGE_MAX_CONFIG_PORT);
75VXGE_MODULE_PARAM_INT(max_config_vpath, VXGE_USE_DEFAULT);
76VXGE_MODULE_PARAM_INT(max_mac_vpath, VXGE_MAX_MAC_ADDR_COUNT);
77VXGE_MODULE_PARAM_INT(max_config_dev, VXGE_MAX_CONFIG_DEV);
78
79static u16 vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS] =
80 {0, 1, 3, 3, 7, 7, 7, 7, 15, 15, 15, 15, 15, 15, 15, 15, 31};
81static unsigned int bw_percentage[VXGE_HW_MAX_VIRTUAL_PATHS] =
82 {[0 ...(VXGE_HW_MAX_VIRTUAL_PATHS - 1)] = 0xFF};
83module_param_array(bw_percentage, uint, NULL, 0);
84
85static struct vxge_drv_config *driver_config;
86
87static inline int is_vxge_card_up(struct vxgedev *vdev)
88{
89 return test_bit(__VXGE_STATE_CARD_UP, &vdev->state);
90}
91
92static inline void VXGE_COMPLETE_VPATH_TX(struct vxge_fifo *fifo)
93{
ff67df55
BL		 94 struct sk_buff **skb_ptr = NULL;
95 struct sk_buff **temp;
96#define NR_SKB_COMPLETED 128
97 struct sk_buff *completed[NR_SKB_COMPLETED];
98 int more;
703da5a1 99
ff67df55
BL		 100 do {
101 more = 0;
102 skb_ptr = completed;
103
98f45da2 104 if (__netif_tx_trylock(fifo->txq)) {
ff67df55
BL		 105 vxge_hw_vpath_poll_tx(fifo->handle, &skb_ptr,
106 NR_SKB_COMPLETED, &more);
98f45da2 107 __netif_tx_unlock(fifo->txq);
ff67df55 108 }
98f45da2 109
ff67df55
BL		 110 /* free SKBs */
111 for (temp = completed; temp != skb_ptr; temp++)
112 dev_kfree_skb_irq(*temp);
98f45da2 113 } while (more);
703da5a1
RV		 114}
115
116static inline void VXGE_COMPLETE_ALL_TX(struct vxgedev *vdev)
117{
118 int i;
119
120 /* Complete all transmits */
121 for (i = 0; i < vdev->no_of_vpath; i++)
122 VXGE_COMPLETE_VPATH_TX(&vdev->vpaths[i].fifo);
123}
124
125static inline void VXGE_COMPLETE_ALL_RX(struct vxgedev *vdev)
126{
127 int i;
128 struct vxge_ring *ring;
129
130 /* Complete all receives*/
131 for (i = 0; i < vdev->no_of_vpath; i++) {
132 ring = &vdev->vpaths[i].ring;
133 vxge_hw_vpath_poll_rx(ring->handle);
134 }
135}
136
703da5a1
RV		 137/*
138 * vxge_callback_link_up
139 *
140 * This function is called during interrupt context to notify link up state
141 * change.
142 */
528f7272 143static void vxge_callback_link_up(struct __vxge_hw_device *hldev)
703da5a1
RV		 144{
145 struct net_device *dev = hldev->ndev;
5f54cebb 146 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV		 147
148 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
149 vdev->ndev->name, __func__, __LINE__);
75f5e1c6 150 netdev_notice(vdev->ndev, "Link Up\n");
703da5a1
RV		 151 vdev->stats.link_up++;
152
153 netif_carrier_on(vdev->ndev);
d03848e0 154 netif_tx_wake_all_queues(vdev->ndev);
703da5a1
RV		 155
156 vxge_debug_entryexit(VXGE_TRACE,
157 "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
158}
159
160/*
161 * vxge_callback_link_down
162 *
163 * This function is called during interrupt context to notify link down state
164 * change.
165 */
528f7272 166static void vxge_callback_link_down(struct __vxge_hw_device *hldev)
703da5a1
RV		 167{
168 struct net_device *dev = hldev->ndev;
5f54cebb 169 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV		 170
171 vxge_debug_entryexit(VXGE_TRACE,
172 "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
75f5e1c6 173 netdev_notice(vdev->ndev, "Link Down\n");
703da5a1
RV		 174
175 vdev->stats.link_down++;
176 netif_carrier_off(vdev->ndev);
d03848e0 177 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 178
179 vxge_debug_entryexit(VXGE_TRACE,
180 "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
181}
182
183/*
184 * vxge_rx_alloc
185 *
186 * Allocate SKB.
187 */
528f7272 188static struct sk_buff *
703da5a1
RV		 189vxge_rx_alloc(void *dtrh, struct vxge_ring *ring, const int skb_size)
190{
191 struct net_device *dev;
192 struct sk_buff *skb;
193 struct vxge_rx_priv *rx_priv;
194
195 dev = ring->ndev;
196 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
197 ring->ndev->name, __func__, __LINE__);
198
199 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
200
201 /* try to allocate skb first. this one may fail */
202 skb = netdev_alloc_skb(dev, skb_size +
203 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
204 if (skb == NULL) {
205 vxge_debug_mem(VXGE_ERR,
206 "%s: out of memory to allocate SKB", dev->name);
207 ring->stats.skb_alloc_fail++;
208 return NULL;
209 }
210
211 vxge_debug_mem(VXGE_TRACE,
212 "%s: %s:%d Skb : 0x%p", ring->ndev->name,
213 __func__, __LINE__, skb);
214
215 skb_reserve(skb, VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
216
217 rx_priv->skb = skb;
ea11bbe0 218 rx_priv->skb_data = NULL;
703da5a1
RV		 219 rx_priv->data_size = skb_size;
220 vxge_debug_entryexit(VXGE_TRACE,
221 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
222
223 return skb;
224}
225
226/*
227 * vxge_rx_map
228 */
229static int vxge_rx_map(void *dtrh, struct vxge_ring *ring)
230{
231 struct vxge_rx_priv *rx_priv;
232 dma_addr_t dma_addr;
233
234 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
235 ring->ndev->name, __func__, __LINE__);
236 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
237
ea11bbe0
BL		 238 rx_priv->skb_data = rx_priv->skb->data;
239 dma_addr = pci_map_single(ring->pdev, rx_priv->skb_data,
703da5a1
RV		 240 rx_priv->data_size, PCI_DMA_FROMDEVICE);
241
fa15e99b 242 if (unlikely(pci_dma_mapping_error(ring->pdev, dma_addr))) {
703da5a1
RV		 243 ring->stats.pci_map_fail++;
244 return -EIO;
245 }
246 vxge_debug_mem(VXGE_TRACE,
247 "%s: %s:%d 1 buffer mode dma_addr = 0x%llx",
248 ring->ndev->name, __func__, __LINE__,
249 (unsigned long long)dma_addr);
250 vxge_hw_ring_rxd_1b_set(dtrh, dma_addr, rx_priv->data_size);
251
252 rx_priv->data_dma = dma_addr;
253 vxge_debug_entryexit(VXGE_TRACE,
254 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
255
256 return 0;
257}
258
259/*
260 * vxge_rx_initial_replenish
261 * Allocation of RxD as an initial replenish procedure.
262 */
263static enum vxge_hw_status
264vxge_rx_initial_replenish(void *dtrh, void *userdata)
265{
266 struct vxge_ring *ring = (struct vxge_ring *)userdata;
267 struct vxge_rx_priv *rx_priv;
268
269 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
270 ring->ndev->name, __func__, __LINE__);
271 if (vxge_rx_alloc(dtrh, ring,
272 VXGE_LL_MAX_FRAME_SIZE(ring->ndev)) == NULL)
273 return VXGE_HW_FAIL;
274
275 if (vxge_rx_map(dtrh, ring)) {
276 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
277 dev_kfree_skb(rx_priv->skb);
278
279 return VXGE_HW_FAIL;
280 }
281 vxge_debug_entryexit(VXGE_TRACE,
282 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
283
284 return VXGE_HW_OK;
285}
286
287static inline void
288vxge_rx_complete(struct vxge_ring *ring, struct sk_buff *skb, u16 vlan,
289 int pkt_length, struct vxge_hw_ring_rxd_info *ext_info)
290{
291
292 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
293 ring->ndev->name, __func__, __LINE__);
294 skb_record_rx_queue(skb, ring->driver_id);
295 skb->protocol = eth_type_trans(skb, ring->ndev);
296
297 ring->stats.rx_frms++;
298 ring->stats.rx_bytes += pkt_length;
299
300 if (skb->pkt_type == PACKET_MULTICAST)
301 ring->stats.rx_mcast++;
302
303 vxge_debug_rx(VXGE_TRACE,
304 "%s: %s:%d skb protocol = %d",
305 ring->ndev->name, __func__, __LINE__, skb->protocol);
306
feb990d4
MM		 307 if (ring->vlgrp && ext_info->vlan &&
308 (ring->vlan_tag_strip ==
309 VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE))
310 vlan_gro_receive(ring->napi_p, ring->vlgrp,
311 ext_info->vlan, skb);
312 else
313 napi_gro_receive(ring->napi_p, skb);
314
703da5a1
RV		 315 vxge_debug_entryexit(VXGE_TRACE,
316 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
317}
318
319static inline void vxge_re_pre_post(void *dtr, struct vxge_ring *ring,
320 struct vxge_rx_priv *rx_priv)
321{
322 pci_dma_sync_single_for_device(ring->pdev,
323 rx_priv->data_dma, rx_priv->data_size, PCI_DMA_FROMDEVICE);
324
325 vxge_hw_ring_rxd_1b_set(dtr, rx_priv->data_dma, rx_priv->data_size);
326 vxge_hw_ring_rxd_pre_post(ring->handle, dtr);
327}
328
329static inline void vxge_post(int *dtr_cnt, void **first_dtr,
330 void *post_dtr, struct __vxge_hw_ring *ringh)
331{
332 int dtr_count = *dtr_cnt;
333 if ((*dtr_cnt % VXGE_HW_RXSYNC_FREQ_CNT) == 0) {
334 if (*first_dtr)
335 vxge_hw_ring_rxd_post_post_wmb(ringh, *first_dtr);
336 *first_dtr = post_dtr;
337 } else
338 vxge_hw_ring_rxd_post_post(ringh, post_dtr);
339 dtr_count++;
340 *dtr_cnt = dtr_count;
341}
342
343/*
344 * vxge_rx_1b_compl
345 *
346 * If the interrupt is because of a received frame or if the receive ring
347 * contains fresh as yet un-processed frames, this function is called.
348 */
42821a5b 349static enum vxge_hw_status
703da5a1
RV		 350vxge_rx_1b_compl(struct __vxge_hw_ring *ringh, void *dtr,
351 u8 t_code, void *userdata)
352{
353 struct vxge_ring *ring = (struct vxge_ring *)userdata;
b81b3733 354 struct net_device *dev = ring->ndev;
703da5a1
RV		 355 unsigned int dma_sizes;
356 void *first_dtr = NULL;
357 int dtr_cnt = 0;
358 int data_size;
359 dma_addr_t data_dma;
360 int pkt_length;
361 struct sk_buff *skb;
362 struct vxge_rx_priv *rx_priv;
363 struct vxge_hw_ring_rxd_info ext_info;
364 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
365 ring->ndev->name, __func__, __LINE__);
703da5a1
RV		 366
367 do {
3f23e436 368 prefetch((char *)dtr + L1_CACHE_BYTES);
703da5a1
RV		 369 rx_priv = vxge_hw_ring_rxd_private_get(dtr);
370 skb = rx_priv->skb;
371 data_size = rx_priv->data_size;
372 data_dma = rx_priv->data_dma;
ea11bbe0 373 prefetch(rx_priv->skb_data);
703da5a1
RV		 374
375 vxge_debug_rx(VXGE_TRACE,
376 "%s: %s:%d skb = 0x%p",
377 ring->ndev->name, __func__, __LINE__, skb);
378
379 vxge_hw_ring_rxd_1b_get(ringh, dtr, &dma_sizes);
380 pkt_length = dma_sizes;
381
22fa125e
SH		 382 pkt_length -= ETH_FCS_LEN;
383
703da5a1
RV		 384 vxge_debug_rx(VXGE_TRACE,
385 "%s: %s:%d Packet Length = %d",
386 ring->ndev->name, __func__, __LINE__, pkt_length);
387
388 vxge_hw_ring_rxd_1b_info_get(ringh, dtr, &ext_info);
389
390 /* check skb validity */
391 vxge_assert(skb);
392
393 prefetch((char *)skb + L1_CACHE_BYTES);
394 if (unlikely(t_code)) {
703da5a1
RV		 395 if (vxge_hw_ring_handle_tcode(ringh, dtr, t_code) !=
396 VXGE_HW_OK) {
397
398 ring->stats.rx_errors++;
399 vxge_debug_rx(VXGE_TRACE,
400 "%s: %s :%d Rx T_code is %d",
401 ring->ndev->name, __func__,
402 __LINE__, t_code);
403
404 /* If the t_code is not supported and if the
405 * t_code is other than 0x5 (unparseable packet
406 * such as unknown UPV6 header), Drop it !!!
407 */
408 vxge_re_pre_post(dtr, ring, rx_priv);
409
410 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
411 ring->stats.rx_dropped++;
412 continue;
413 }
414 }
415
416 if (pkt_length > VXGE_LL_RX_COPY_THRESHOLD) {
703da5a1 417 if (vxge_rx_alloc(dtr, ring, data_size) != NULL) {
703da5a1
RV		 418 if (!vxge_rx_map(dtr, ring)) {
419 skb_put(skb, pkt_length);
420
421 pci_unmap_single(ring->pdev, data_dma,
422 data_size, PCI_DMA_FROMDEVICE);
423
424 vxge_hw_ring_rxd_pre_post(ringh, dtr);
425 vxge_post(&dtr_cnt, &first_dtr, dtr,
426 ringh);
427 } else {
428 dev_kfree_skb(rx_priv->skb);
429 rx_priv->skb = skb;
430 rx_priv->data_size = data_size;
431 vxge_re_pre_post(dtr, ring, rx_priv);
432
433 vxge_post(&dtr_cnt, &first_dtr, dtr,
434 ringh);
435 ring->stats.rx_dropped++;
436 break;
437 }
438 } else {
439 vxge_re_pre_post(dtr, ring, rx_priv);
440
441 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
442 ring->stats.rx_dropped++;
443 break;
444 }
445 } else {
446 struct sk_buff *skb_up;
447
448 skb_up = netdev_alloc_skb(dev, pkt_length +
449 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
450 if (skb_up != NULL) {
451 skb_reserve(skb_up,
452 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
453
454 pci_dma_sync_single_for_cpu(ring->pdev,
455 data_dma, data_size,
456 PCI_DMA_FROMDEVICE);
457
458 vxge_debug_mem(VXGE_TRACE,
459 "%s: %s:%d skb_up = %p",
460 ring->ndev->name, __func__,
461 __LINE__, skb);
462 memcpy(skb_up->data, skb->data, pkt_length);
463
464 vxge_re_pre_post(dtr, ring, rx_priv);
465
466 vxge_post(&dtr_cnt, &first_dtr, dtr,
467 ringh);
468 /* will netif_rx small SKB instead */
469 skb = skb_up;
470 skb_put(skb, pkt_length);
471 } else {
472 vxge_re_pre_post(dtr, ring, rx_priv);
473
474 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
475 vxge_debug_rx(VXGE_ERR,
476 "%s: vxge_rx_1b_compl: out of "
477 "memory", dev->name);
478 ring->stats.skb_alloc_fail++;
479 break;
480 }
481 }
482
483 if ((ext_info.proto & VXGE_HW_FRAME_PROTO_TCP_OR_UDP) &&
484 !(ext_info.proto & VXGE_HW_FRAME_PROTO_IP_FRAG) &&
feb990d4 485 (dev->features & NETIF_F_RXCSUM) && /* Offload Rx side CSUM */
703da5a1
RV		 486 ext_info.l3_cksum == VXGE_HW_L3_CKSUM_OK &&
487 ext_info.l4_cksum == VXGE_HW_L4_CKSUM_OK)
488 skb->ip_summed = CHECKSUM_UNNECESSARY;
489 else
bc8acf2c 490 skb_checksum_none_assert(skb);
703da5a1 491
b81b3733
JM		 492
493 if (ring->rx_hwts) {
494 struct skb_shared_hwtstamps *skb_hwts;
495 u32 ns = *(u32 *)(skb->head + pkt_length);
496
497 skb_hwts = skb_hwtstamps(skb);
498 skb_hwts->hwtstamp = ns_to_ktime(ns);
499 skb_hwts->syststamp.tv64 = 0;
500 }
501
47f01db4
JM		 502 /* rth_hash_type and rth_it_hit are non-zero regardless of
503 * whether rss is enabled. Only the rth_value is zero/non-zero
504 * if rss is disabled/enabled, so key off of that.
505 */
506 if (ext_info.rth_value)
507 skb->rxhash = ext_info.rth_value;
508
703da5a1
RV		 509 vxge_rx_complete(ring, skb, ext_info.vlan,
510 pkt_length, &ext_info);
511
512 ring->budget--;
513 ring->pkts_processed++;
514 if (!ring->budget)
515 break;
516
517 } while (vxge_hw_ring_rxd_next_completed(ringh, &dtr,
518 &t_code) == VXGE_HW_OK);
519
520 if (first_dtr)
521 vxge_hw_ring_rxd_post_post_wmb(ringh, first_dtr);
522
703da5a1
RV		 523 vxge_debug_entryexit(VXGE_TRACE,
524 "%s:%d Exiting...",
525 __func__, __LINE__);
526 return VXGE_HW_OK;
527}
528
529/*
530 * vxge_xmit_compl
531 *
532 * If an interrupt was raised to indicate DMA complete of the Tx packet,
533 * this function is called. It identifies the last TxD whose buffer was
534 * freed and frees all skbs whose data have already DMA'ed into the NICs
535 * internal memory.
536 */
42821a5b 537static enum vxge_hw_status
703da5a1
RV		 538vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, void *dtr,
539 enum vxge_hw_fifo_tcode t_code, void *userdata,
ff67df55 540 struct sk_buff ***skb_ptr, int nr_skb, int *more)
703da5a1
RV		 541{
542 struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
ff67df55 543 struct sk_buff *skb, **done_skb = *skb_ptr;
703da5a1
RV		 544 int pkt_cnt = 0;
545
546 vxge_debug_entryexit(VXGE_TRACE,
547 "%s:%d Entered....", __func__, __LINE__);
548
549 do {
550 int frg_cnt;
551 skb_frag_t *frag;
552 int i = 0, j;
553 struct vxge_tx_priv *txd_priv =
554 vxge_hw_fifo_txdl_private_get(dtr);
555
556 skb = txd_priv->skb;
557 frg_cnt = skb_shinfo(skb)->nr_frags;
558 frag = &skb_shinfo(skb)->frags[0];
559
560 vxge_debug_tx(VXGE_TRACE,
561 "%s: %s:%d fifo_hw = %p dtr = %p "
562 "tcode = 0x%x", fifo->ndev->name, __func__,
563 __LINE__, fifo_hw, dtr, t_code);
564 /* check skb validity */
565 vxge_assert(skb);
566 vxge_debug_tx(VXGE_TRACE,
567 "%s: %s:%d skb = %p itxd_priv = %p frg_cnt = %d",
568 fifo->ndev->name, __func__, __LINE__,
569 skb, txd_priv, frg_cnt);
570 if (unlikely(t_code)) {
571 fifo->stats.tx_errors++;
572 vxge_debug_tx(VXGE_ERR,
573 "%s: tx: dtr %p completed due to "
574 "error t_code %01x", fifo->ndev->name,
575 dtr, t_code);
576 vxge_hw_fifo_handle_tcode(fifo_hw, dtr, t_code);
577 }
578
579 /* for unfragmented skb */
580 pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
581 skb_headlen(skb), PCI_DMA_TODEVICE);
582
583 for (j = 0; j < frg_cnt; j++) {
584 pci_unmap_page(fifo->pdev,
585 txd_priv->dma_buffers[i++],
586 frag->size, PCI_DMA_TODEVICE);
587 frag += 1;
588 }
589
590 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
591
592 /* Updating the statistics block */
593 fifo->stats.tx_frms++;
594 fifo->stats.tx_bytes += skb->len;
595
ff67df55
BL		 596 *done_skb++ = skb;
597
598 if (--nr_skb <= 0) {
599 *more = 1;
600 break;
601 }
703da5a1
RV		 602
603 pkt_cnt++;
604 if (pkt_cnt > fifo->indicate_max_pkts)
605 break;
606
607 } while (vxge_hw_fifo_txdl_next_completed(fifo_hw,
608 &dtr, &t_code) == VXGE_HW_OK);
609
ff67df55 610 *skb_ptr = done_skb;
98f45da2
JM		 611 if (netif_tx_queue_stopped(fifo->txq))
612 netif_tx_wake_queue(fifo->txq);
703da5a1 613
703da5a1
RV		 614 vxge_debug_entryexit(VXGE_TRACE,
615 "%s: %s:%d Exiting...",
616 fifo->ndev->name, __func__, __LINE__);
617 return VXGE_HW_OK;
618}
619
28679751 620/* select a vpath to transmit the packet */
98f45da2 621static u32 vxge_get_vpath_no(struct vxgedev *vdev, struct sk_buff *skb)
703da5a1
RV		 622{
623 u16 queue_len, counter = 0;
624 if (skb->protocol == htons(ETH_P_IP)) {
625 struct iphdr *ip;
626 struct tcphdr *th;
627
628 ip = ip_hdr(skb);
629
630 if ((ip->frag_off & htons(IP_OFFSET|IP_MF)) == 0) {
631 th = (struct tcphdr *)(((unsigned char *)ip) +
632 ip->ihl*4);
633
634 queue_len = vdev->no_of_vpath;
635 counter = (ntohs(th->source) +
636 ntohs(th->dest)) &
637 vdev->vpath_selector[queue_len - 1];
638 if (counter >= queue_len)
639 counter = queue_len - 1;
703da5a1
RV		 640 }
641 }
642 return counter;
643}
644
645static enum vxge_hw_status vxge_search_mac_addr_in_list(
646 struct vxge_vpath *vpath, u64 del_mac)
647{
648 struct list_head *entry, *next;
649 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
650 if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac)
651 return TRUE;
652 }
653 return FALSE;
654}
655
528f7272
JM		 656static int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac)
657{
658 struct vxge_mac_addrs *new_mac_entry;
659 u8 *mac_address = NULL;
660
661 if (vpath->mac_addr_cnt >= VXGE_MAX_LEARN_MAC_ADDR_CNT)
662 return TRUE;
663
664 new_mac_entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_ATOMIC);
665 if (!new_mac_entry) {
666 vxge_debug_mem(VXGE_ERR,
667 "%s: memory allocation failed",
668 VXGE_DRIVER_NAME);
669 return FALSE;
670 }
671
672 list_add(&new_mac_entry->item, &vpath->mac_addr_list);
673
674 /* Copy the new mac address to the list */
675 mac_address = (u8 *)&new_mac_entry->macaddr;
676 memcpy(mac_address, mac->macaddr, ETH_ALEN);
677
678 new_mac_entry->state = mac->state;
679 vpath->mac_addr_cnt++;
680
681 /* Is this a multicast address */
682 if (0x01 & mac->macaddr[0])
683 vpath->mcast_addr_cnt++;
684
685 return TRUE;
686}
687
688/* Add a mac address to DA table */
689static enum vxge_hw_status
690vxge_add_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
691{
692 enum vxge_hw_status status = VXGE_HW_OK;
693 struct vxge_vpath *vpath;
694 enum vxge_hw_vpath_mac_addr_add_mode duplicate_mode;
695
696 if (0x01 & mac->macaddr[0]) /* multicast address */
697 duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE;
698 else
699 duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_REPLACE_DUPLICATE;
700
701 vpath = &vdev->vpaths[mac->vpath_no];
702 status = vxge_hw_vpath_mac_addr_add(vpath->handle, mac->macaddr,
703 mac->macmask, duplicate_mode);
704 if (status != VXGE_HW_OK) {
705 vxge_debug_init(VXGE_ERR,
706 "DA config add entry failed for vpath:%d",
707 vpath->device_id);
708 } else
709 if (FALSE == vxge_mac_list_add(vpath, mac))
710 status = -EPERM;
711
712 return status;
713}
714
703da5a1
RV		 715static int vxge_learn_mac(struct vxgedev *vdev, u8 *mac_header)
716{
717 struct macInfo mac_info;
718 u8 *mac_address = NULL;
719 u64 mac_addr = 0, vpath_vector = 0;
720 int vpath_idx = 0;
721 enum vxge_hw_status status = VXGE_HW_OK;
722 struct vxge_vpath *vpath = NULL;
723 struct __vxge_hw_device *hldev;
724
d8ee7071 725 hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 726
727 mac_address = (u8 *)&mac_addr;
728 memcpy(mac_address, mac_header, ETH_ALEN);
729
730 /* Is this mac address already in the list? */
731 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
732 vpath = &vdev->vpaths[vpath_idx];
733 if (vxge_search_mac_addr_in_list(vpath, mac_addr))
734 return vpath_idx;
735 }
736
737 memset(&mac_info, 0, sizeof(struct macInfo));
738 memcpy(mac_info.macaddr, mac_header, ETH_ALEN);
739
740 /* Any vpath has room to add mac address to its da table? */
741 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
742 vpath = &vdev->vpaths[vpath_idx];
743 if (vpath->mac_addr_cnt < vpath->max_mac_addr_cnt) {
744 /* Add this mac address to this vpath */
745 mac_info.vpath_no = vpath_idx;
746 mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
747 status = vxge_add_mac_addr(vdev, &mac_info);
748 if (status != VXGE_HW_OK)
749 return -EPERM;
750 return vpath_idx;
751 }
752 }
753
754 mac_info.state = VXGE_LL_MAC_ADDR_IN_LIST;
755 vpath_idx = 0;
756 mac_info.vpath_no = vpath_idx;
757 /* Is the first vpath already selected as catch-basin ? */
758 vpath = &vdev->vpaths[vpath_idx];
759 if (vpath->mac_addr_cnt > vpath->max_mac_addr_cnt) {
760 /* Add this mac address to this vpath */
761 if (FALSE == vxge_mac_list_add(vpath, &mac_info))
762 return -EPERM;
763 return vpath_idx;
764 }
765
766 /* Select first vpath as catch-basin */
767 vpath_vector = vxge_mBIT(vpath->device_id);
768 status = vxge_hw_mgmt_reg_write(vpath->vdev->devh,
769 vxge_hw_mgmt_reg_type_mrpcim,
770 0,
771 (ulong)offsetof(
772 struct vxge_hw_mrpcim_reg,
773 rts_mgr_cbasin_cfg),
774 vpath_vector);
775 if (status != VXGE_HW_OK) {
776 vxge_debug_tx(VXGE_ERR,
777 "%s: Unable to set the vpath-%d in catch-basin mode",
778 VXGE_DRIVER_NAME, vpath->device_id);
779 return -EPERM;
780 }
781
782 if (FALSE == vxge_mac_list_add(vpath, &mac_info))
783 return -EPERM;
784
785 return vpath_idx;
786}
787
788/**
789 * vxge_xmit
790 * @skb : the socket buffer containing the Tx data.
791 * @dev : device pointer.
792 *
793 * This function is the Tx entry point of the driver. Neterion NIC supports
794 * certain protocol assist features on Tx side, namely CSO, S/G, LSO.
703da5a1 795*/
61357325 796static netdev_tx_t
703da5a1
RV		 797vxge_xmit(struct sk_buff *skb, struct net_device *dev)
798{
799 struct vxge_fifo *fifo = NULL;
800 void *dtr_priv;
801 void *dtr = NULL;
802 struct vxgedev *vdev = NULL;
803 enum vxge_hw_status status;
804 int frg_cnt, first_frg_len;
805 skb_frag_t *frag;
806 int i = 0, j = 0, avail;
807 u64 dma_pointer;
808 struct vxge_tx_priv *txdl_priv = NULL;
809 struct __vxge_hw_fifo *fifo_hw;
703da5a1 810 int offload_type;
703da5a1 811 int vpath_no = 0;
703da5a1
RV		 812
813 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
814 dev->name, __func__, __LINE__);
815
816 /* A buffer with no data will be dropped */
817 if (unlikely(skb->len <= 0)) {
818 vxge_debug_tx(VXGE_ERR,
819 "%s: Buffer has no data..", dev->name);
820 dev_kfree_skb(skb);
821 return NETDEV_TX_OK;
822 }
823
5f54cebb 824 vdev = netdev_priv(dev);
703da5a1
RV		 825
826 if (unlikely(!is_vxge_card_up(vdev))) {
827 vxge_debug_tx(VXGE_ERR,
828 "%s: vdev not initialized", dev->name);
829 dev_kfree_skb(skb);
830 return NETDEV_TX_OK;
831 }
832
833 if (vdev->config.addr_learn_en) {
834 vpath_no = vxge_learn_mac(vdev, skb->data + ETH_ALEN);
835 if (vpath_no == -EPERM) {
836 vxge_debug_tx(VXGE_ERR,
837 "%s: Failed to store the mac address",
838 dev->name);
839 dev_kfree_skb(skb);
840 return NETDEV_TX_OK;
841 }
842 }
843
844 if (vdev->config.tx_steering_type == TX_MULTIQ_STEERING)
845 vpath_no = skb_get_queue_mapping(skb);
846 else if (vdev->config.tx_steering_type == TX_PORT_STEERING)
98f45da2 847 vpath_no = vxge_get_vpath_no(vdev, skb);
703da5a1
RV		 848
849 vxge_debug_tx(VXGE_TRACE, "%s: vpath_no= %d", dev->name, vpath_no);
850
851 if (vpath_no >= vdev->no_of_vpath)
852 vpath_no = 0;
853
854 fifo = &vdev->vpaths[vpath_no].fifo;
855 fifo_hw = fifo->handle;
856
98f45da2 857 if (netif_tx_queue_stopped(fifo->txq))
d03848e0 858 return NETDEV_TX_BUSY;
d03848e0 859
703da5a1
RV		 860 avail = vxge_hw_fifo_free_txdl_count_get(fifo_hw);
861 if (avail == 0) {
862 vxge_debug_tx(VXGE_ERR,
863 "%s: No free TXDs available", dev->name);
864 fifo->stats.txd_not_free++;
98f45da2 865 goto _exit0;
703da5a1
RV		 866 }
867
4403b371
BL		 868 /* Last TXD? Stop tx queue to avoid dropping packets. TX
869 * completion will resume the queue.
870 */
871 if (avail == 1)
98f45da2 872 netif_tx_stop_queue(fifo->txq);
4403b371 873
703da5a1
RV		 874 status = vxge_hw_fifo_txdl_reserve(fifo_hw, &dtr, &dtr_priv);
875 if (unlikely(status != VXGE_HW_OK)) {
876 vxge_debug_tx(VXGE_ERR,
877 "%s: Out of descriptors .", dev->name);
878 fifo->stats.txd_out_of_desc++;
98f45da2 879 goto _exit0;
703da5a1
RV		 880 }
881
882 vxge_debug_tx(VXGE_TRACE,
883 "%s: %s:%d fifo_hw = %p dtr = %p dtr_priv = %p",
884 dev->name, __func__, __LINE__,
885 fifo_hw, dtr, dtr_priv);
886
eab6d18d 887 if (vlan_tx_tag_present(skb)) {
703da5a1
RV		 888 u16 vlan_tag = vlan_tx_tag_get(skb);
889 vxge_hw_fifo_txdl_vlan_set(dtr, vlan_tag);
890 }
891
892 first_frg_len = skb_headlen(skb);
893
894 dma_pointer = pci_map_single(fifo->pdev, skb->data, first_frg_len,
895 PCI_DMA_TODEVICE);
896
897 if (unlikely(pci_dma_mapping_error(fifo->pdev, dma_pointer))) {
898 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
703da5a1 899 fifo->stats.pci_map_fail++;
98f45da2 900 goto _exit0;
703da5a1
RV		 901 }
902
903 txdl_priv = vxge_hw_fifo_txdl_private_get(dtr);
904 txdl_priv->skb = skb;
905 txdl_priv->dma_buffers[j] = dma_pointer;
906
907 frg_cnt = skb_shinfo(skb)->nr_frags;
908 vxge_debug_tx(VXGE_TRACE,
909 "%s: %s:%d skb = %p txdl_priv = %p "
910 "frag_cnt = %d dma_pointer = 0x%llx", dev->name,
911 __func__, __LINE__, skb, txdl_priv,
912 frg_cnt, (unsigned long long)dma_pointer);
913
914 vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
915 first_frg_len);
916
917 frag = &skb_shinfo(skb)->frags[0];
918 for (i = 0; i < frg_cnt; i++) {
919 /* ignore 0 length fragment */
920 if (!frag->size)
921 continue;
922
98f45da2 923 dma_pointer = (u64) pci_map_page(fifo->pdev, frag->page,
703da5a1
RV		 924 frag->page_offset, frag->size,
925 PCI_DMA_TODEVICE);
926
927 if (unlikely(pci_dma_mapping_error(fifo->pdev, dma_pointer)))
98f45da2 928 goto _exit2;
703da5a1
RV		 929 vxge_debug_tx(VXGE_TRACE,
930 "%s: %s:%d frag = %d dma_pointer = 0x%llx",
931 dev->name, __func__, __LINE__, i,
932 (unsigned long long)dma_pointer);
933
934 txdl_priv->dma_buffers[j] = dma_pointer;
935 vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
936 frag->size);
937 frag += 1;
938 }
939
940 offload_type = vxge_offload_type(skb);
941
942 if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
703da5a1
RV		 943 int mss = vxge_tcp_mss(skb);
944 if (mss) {
98f45da2 945 vxge_debug_tx(VXGE_TRACE, "%s: %s:%d mss = %d",
703da5a1
RV		 946 dev->name, __func__, __LINE__, mss);
947 vxge_hw_fifo_txdl_mss_set(dtr, mss);
948 } else {
949 vxge_assert(skb->len <=
950 dev->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE);
951 vxge_assert(0);
952 goto _exit1;
953 }
954 }
955
956 if (skb->ip_summed == CHECKSUM_PARTIAL)
957 vxge_hw_fifo_txdl_cksum_set_bits(dtr,
958 VXGE_HW_FIFO_TXD_TX_CKO_IPV4_EN |
959 VXGE_HW_FIFO_TXD_TX_CKO_TCP_EN |
960 VXGE_HW_FIFO_TXD_TX_CKO_UDP_EN);
961
962 vxge_hw_fifo_txdl_post(fifo_hw, dtr);
703da5a1 963
703da5a1
RV		 964 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
965 dev->name, __func__, __LINE__);
6ed10654 966 return NETDEV_TX_OK;
703da5a1 967
98f45da2 968_exit2:
703da5a1 969 vxge_debug_tx(VXGE_TRACE, "%s: pci_map_page failed", dev->name);
703da5a1
RV		 970_exit1:
971 j = 0;
972 frag = &skb_shinfo(skb)->frags[0];
973
974 pci_unmap_single(fifo->pdev, txdl_priv->dma_buffers[j++],
975 skb_headlen(skb), PCI_DMA_TODEVICE);
976
977 for (; j < i; j++) {
978 pci_unmap_page(fifo->pdev, txdl_priv->dma_buffers[j],
979 frag->size, PCI_DMA_TODEVICE);
980 frag += 1;
981 }
982
983 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
98f45da2
JM		 984_exit0:
985 netif_tx_stop_queue(fifo->txq);
703da5a1 986 dev_kfree_skb(skb);
703da5a1 987
6ed10654 988 return NETDEV_TX_OK;
703da5a1
RV		 989}
990
991/*
992 * vxge_rx_term
993 *
994 * Function will be called by hw function to abort all outstanding receive
995 * descriptors.
996 */
997static void
998vxge_rx_term(void *dtrh, enum vxge_hw_rxd_state state, void *userdata)
999{
1000 struct vxge_ring *ring = (struct vxge_ring *)userdata;
1001 struct vxge_rx_priv *rx_priv =
1002 vxge_hw_ring_rxd_private_get(dtrh);
1003
1004 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
1005 ring->ndev->name, __func__, __LINE__);
1006 if (state != VXGE_HW_RXD_STATE_POSTED)
1007 return;
1008
1009 pci_unmap_single(ring->pdev, rx_priv->data_dma,
1010 rx_priv->data_size, PCI_DMA_FROMDEVICE);
1011
1012 dev_kfree_skb(rx_priv->skb);
ea11bbe0 1013 rx_priv->skb_data = NULL;
703da5a1
RV		 1014
1015 vxge_debug_entryexit(VXGE_TRACE,
1016 "%s: %s:%d Exiting...",
1017 ring->ndev->name, __func__, __LINE__);
1018}
1019
1020/*
1021 * vxge_tx_term
1022 *
1023 * Function will be called to abort all outstanding tx descriptors
1024 */
1025static void
1026vxge_tx_term(void *dtrh, enum vxge_hw_txdl_state state, void *userdata)
1027{
1028 struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
1029 skb_frag_t *frag;
1030 int i = 0, j, frg_cnt;
1031 struct vxge_tx_priv *txd_priv = vxge_hw_fifo_txdl_private_get(dtrh);
1032 struct sk_buff *skb = txd_priv->skb;
1033
1034 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1035
1036 if (state != VXGE_HW_TXDL_STATE_POSTED)
1037 return;
1038
1039 /* check skb validity */
1040 vxge_assert(skb);
1041 frg_cnt = skb_shinfo(skb)->nr_frags;
1042 frag = &skb_shinfo(skb)->frags[0];
1043
1044 /* for unfragmented skb */
1045 pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
1046 skb_headlen(skb), PCI_DMA_TODEVICE);
1047
1048 for (j = 0; j < frg_cnt; j++) {
1049 pci_unmap_page(fifo->pdev, txd_priv->dma_buffers[i++],
1050 frag->size, PCI_DMA_TODEVICE);
1051 frag += 1;
1052 }
1053
1054 dev_kfree_skb(skb);
1055
1056 vxge_debug_entryexit(VXGE_TRACE,
1057 "%s:%d Exiting...", __func__, __LINE__);
1058}
1059
528f7272
JM		 1060static int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac)
1061{
1062 struct list_head *entry, *next;
1063 u64 del_mac = 0;
1064 u8 *mac_address = (u8 *) (&del_mac);
1065
1066 /* Copy the mac address to delete from the list */
1067 memcpy(mac_address, mac->macaddr, ETH_ALEN);
1068
1069 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
1070 if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac) {
1071 list_del(entry);
1072 kfree((struct vxge_mac_addrs *)entry);
1073 vpath->mac_addr_cnt--;
1074
1075 /* Is this a multicast address */
1076 if (0x01 & mac->macaddr[0])
1077 vpath->mcast_addr_cnt--;
1078 return TRUE;
1079 }
1080 }
1081
1082 return FALSE;
1083}
1084
1085/* delete a mac address from DA table */
1086static enum vxge_hw_status
1087vxge_del_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
1088{
1089 enum vxge_hw_status status = VXGE_HW_OK;
1090 struct vxge_vpath *vpath;
1091
1092 vpath = &vdev->vpaths[mac->vpath_no];
1093 status = vxge_hw_vpath_mac_addr_delete(vpath->handle, mac->macaddr,
1094 mac->macmask);
1095 if (status != VXGE_HW_OK) {
1096 vxge_debug_init(VXGE_ERR,
1097 "DA config delete entry failed for vpath:%d",
1098 vpath->device_id);
1099 } else
1100 vxge_mac_list_del(vpath, mac);
1101 return status;
1102}
1103
703da5a1
RV		 1104/**
1105 * vxge_set_multicast
1106 * @dev: pointer to the device structure
1107 *
1108 * Entry point for multicast address enable/disable
1109 * This function is a driver entry point which gets called by the kernel
1110 * whenever multicast addresses must be enabled/disabled. This also gets
1111 * called to set/reset promiscuous mode. Depending on the deivce flag, we
1112 * determine, if multicast address must be enabled or if promiscuous mode
1113 * is to be disabled etc.
1114 */
1115static void vxge_set_multicast(struct net_device *dev)
1116{
22bedad3 1117 struct netdev_hw_addr *ha;
703da5a1
RV		 1118 struct vxgedev *vdev;
1119 int i, mcast_cnt = 0;
7adf7d1b
JM		 1120 struct __vxge_hw_device *hldev;
1121 struct vxge_vpath *vpath;
703da5a1
RV		 1122 enum vxge_hw_status status = VXGE_HW_OK;
1123 struct macInfo mac_info;
1124 int vpath_idx = 0;
1125 struct vxge_mac_addrs *mac_entry;
1126 struct list_head *list_head;
1127 struct list_head *entry, *next;
1128 u8 *mac_address = NULL;
1129
1130 vxge_debug_entryexit(VXGE_TRACE,
1131 "%s:%d", __func__, __LINE__);
1132
5f54cebb 1133 vdev = netdev_priv(dev);
703da5a1
RV		 1134 hldev = (struct __vxge_hw_device *)vdev->devh;
1135
1136 if (unlikely(!is_vxge_card_up(vdev)))
1137 return;
1138
1139 if ((dev->flags & IFF_ALLMULTI) && (!vdev->all_multi_flg)) {
1140 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 1141 vpath = &vdev->vpaths[i];
1142 vxge_assert(vpath->is_open);
1143 status = vxge_hw_vpath_mcast_enable(vpath->handle);
1144 if (status != VXGE_HW_OK)
1145 vxge_debug_init(VXGE_ERR, "failed to enable "
1146 "multicast, status %d", status);
703da5a1
RV		 1147 vdev->all_multi_flg = 1;
1148 }
7adf7d1b 1149 } else if (!(dev->flags & IFF_ALLMULTI) && (vdev->all_multi_flg)) {
703da5a1 1150 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 1151 vpath = &vdev->vpaths[i];
1152 vxge_assert(vpath->is_open);
1153 status = vxge_hw_vpath_mcast_disable(vpath->handle);
1154 if (status != VXGE_HW_OK)
1155 vxge_debug_init(VXGE_ERR, "failed to disable "
1156 "multicast, status %d", status);
1157 vdev->all_multi_flg = 0;
703da5a1
RV		 1158 }
1159 }
1160
703da5a1
RV		 1161
1162 if (!vdev->config.addr_learn_en) {
7adf7d1b
JM		 1163 for (i = 0; i < vdev->no_of_vpath; i++) {
1164 vpath = &vdev->vpaths[i];
1165 vxge_assert(vpath->is_open);
1166
1167 if (dev->flags & IFF_PROMISC)
703da5a1 1168 status = vxge_hw_vpath_promisc_enable(
7adf7d1b
JM		 1169 vpath->handle);
1170 else
703da5a1 1171 status = vxge_hw_vpath_promisc_disable(
7adf7d1b
JM		 1172 vpath->handle);
1173 if (status != VXGE_HW_OK)
1174 vxge_debug_init(VXGE_ERR, "failed to %s promisc"
1175 ", status %d", dev->flags&IFF_PROMISC ?
1176 "enable" : "disable", status);
703da5a1
RV		 1177 }
1178 }
1179
1180 memset(&mac_info, 0, sizeof(struct macInfo));
1181 /* Update individual M_CAST address list */
4cd24eaf 1182 if ((!vdev->all_multi_flg) && netdev_mc_count(dev)) {
703da5a1
RV		 1183 mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
1184 list_head = &vdev->vpaths[0].mac_addr_list;
4cd24eaf 1185 if ((netdev_mc_count(dev) +
703da5a1
RV		 1186 (vdev->vpaths[0].mac_addr_cnt - mcast_cnt)) >
1187 vdev->vpaths[0].max_mac_addr_cnt)
1188 goto _set_all_mcast;
1189
1190 /* Delete previous MC's */
1191 for (i = 0; i < mcast_cnt; i++) {
703da5a1 1192 list_for_each_safe(entry, next, list_head) {
2c91308f 1193 mac_entry = (struct vxge_mac_addrs *)entry;
703da5a1
RV		 1194 /* Copy the mac address to delete */
1195 mac_address = (u8 *)&mac_entry->macaddr;
1196 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1197
1198 /* Is this a multicast address */
1199 if (0x01 & mac_info.macaddr[0]) {
1200 for (vpath_idx = 0; vpath_idx <
1201 vdev->no_of_vpath;
1202 vpath_idx++) {
1203 mac_info.vpath_no = vpath_idx;
1204 status = vxge_del_mac_addr(
1205 vdev,
1206 &mac_info);
1207 }
1208 }
1209 }
1210 }
1211
1212 /* Add new ones */
22bedad3
JP		 1213 netdev_for_each_mc_addr(ha, dev) {
1214 memcpy(mac_info.macaddr, ha->addr, ETH_ALEN);
703da5a1
RV		 1215 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
1216 vpath_idx++) {
1217 mac_info.vpath_no = vpath_idx;
1218 mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1219 status = vxge_add_mac_addr(vdev, &mac_info);
1220 if (status != VXGE_HW_OK) {
1221 vxge_debug_init(VXGE_ERR,
1222 "%s:%d Setting individual"
1223 "multicast address failed",
1224 __func__, __LINE__);
1225 goto _set_all_mcast;
1226 }
1227 }
1228 }
1229
1230 return;
1231_set_all_mcast:
1232 mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
1233 /* Delete previous MC's */
1234 for (i = 0; i < mcast_cnt; i++) {
703da5a1 1235 list_for_each_safe(entry, next, list_head) {
2c91308f 1236 mac_entry = (struct vxge_mac_addrs *)entry;
703da5a1
RV		 1237 /* Copy the mac address to delete */
1238 mac_address = (u8 *)&mac_entry->macaddr;
1239 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1240
1241 /* Is this a multicast address */
1242 if (0x01 & mac_info.macaddr[0])
1243 break;
1244 }
1245
1246 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
1247 vpath_idx++) {
1248 mac_info.vpath_no = vpath_idx;
1249 status = vxge_del_mac_addr(vdev, &mac_info);
1250 }
1251 }
1252
1253 /* Enable all multicast */
1254 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 1255 vpath = &vdev->vpaths[i];
1256 vxge_assert(vpath->is_open);
1257
1258 status = vxge_hw_vpath_mcast_enable(vpath->handle);
703da5a1
RV		 1259 if (status != VXGE_HW_OK) {
1260 vxge_debug_init(VXGE_ERR,
1261 "%s:%d Enabling all multicasts failed",
1262 __func__, __LINE__);
1263 }
1264 vdev->all_multi_flg = 1;
1265 }
1266 dev->flags |= IFF_ALLMULTI;
1267 }
1268
1269 vxge_debug_entryexit(VXGE_TRACE,
1270 "%s:%d Exiting...", __func__, __LINE__);
1271}
1272
1273/**
1274 * vxge_set_mac_addr
1275 * @dev: pointer to the device structure
1276 *
1277 * Update entry "0" (default MAC addr)
1278 */
1279static int vxge_set_mac_addr(struct net_device *dev, void *p)
1280{
1281 struct sockaddr *addr = p;
1282 struct vxgedev *vdev;
2c91308f 1283 struct __vxge_hw_device *hldev;
703da5a1
RV		 1284 enum vxge_hw_status status = VXGE_HW_OK;
1285 struct macInfo mac_info_new, mac_info_old;
1286 int vpath_idx = 0;
1287
1288 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1289
5f54cebb 1290 vdev = netdev_priv(dev);
703da5a1
RV		 1291 hldev = vdev->devh;
1292
1293 if (!is_valid_ether_addr(addr->sa_data))
1294 return -EINVAL;
1295
1296 memset(&mac_info_new, 0, sizeof(struct macInfo));
1297 memset(&mac_info_old, 0, sizeof(struct macInfo));
1298
1299 vxge_debug_entryexit(VXGE_TRACE, "%s:%d Exiting...",
1300 __func__, __LINE__);
1301
1302 /* Get the old address */
1303 memcpy(mac_info_old.macaddr, dev->dev_addr, dev->addr_len);
1304
1305 /* Copy the new address */
1306 memcpy(mac_info_new.macaddr, addr->sa_data, dev->addr_len);
1307
1308 /* First delete the old mac address from all the vpaths
1309 as we can't specify the index while adding new mac address */
1310 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
1311 struct vxge_vpath *vpath = &vdev->vpaths[vpath_idx];
1312 if (!vpath->is_open) {
1313 /* This can happen when this interface is added/removed
1314 to the bonding interface. Delete this station address
1315 from the linked list */
1316 vxge_mac_list_del(vpath, &mac_info_old);
1317
1318 /* Add this new address to the linked list
1319 for later restoring */
1320 vxge_mac_list_add(vpath, &mac_info_new);
1321
1322 continue;
1323 }
1324 /* Delete the station address */
1325 mac_info_old.vpath_no = vpath_idx;
1326 status = vxge_del_mac_addr(vdev, &mac_info_old);
1327 }
1328
1329 if (unlikely(!is_vxge_card_up(vdev))) {
1330 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1331 return VXGE_HW_OK;
1332 }
1333
1334 /* Set this mac address to all the vpaths */
1335 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
1336 mac_info_new.vpath_no = vpath_idx;
1337 mac_info_new.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1338 status = vxge_add_mac_addr(vdev, &mac_info_new);
1339 if (status != VXGE_HW_OK)
1340 return -EINVAL;
1341 }
1342
1343 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1344
1345 return status;
1346}
1347
1348/*
1349 * vxge_vpath_intr_enable
1350 * @vdev: pointer to vdev
1351 * @vp_id: vpath for which to enable the interrupts
1352 *
1353 * Enables the interrupts for the vpath
1354*/
42821a5b 1355static void vxge_vpath_intr_enable(struct vxgedev *vdev, int vp_id)
703da5a1
RV		 1356{
1357 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
b59c9457
SH		 1358 int msix_id = 0;
1359 int tim_msix_id[4] = {0, 1, 0, 0};
1360 int alarm_msix_id = VXGE_ALARM_MSIX_ID;
703da5a1
RV		 1361
1362 vxge_hw_vpath_intr_enable(vpath->handle);
1363
1364 if (vdev->config.intr_type == INTA)
1365 vxge_hw_vpath_inta_unmask_tx_rx(vpath->handle);
1366 else {
703da5a1
RV		 1367 vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
1368 alarm_msix_id);
1369
b59c9457 1370 msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
703da5a1
RV		 1371 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
1372 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id + 1);
1373
1374 /* enable the alarm vector */
b59c9457
SH		 1375 msix_id = (vpath->handle->vpath->hldev->first_vp_id *
1376 VXGE_HW_VPATH_MSIX_ACTIVE) + alarm_msix_id;
1377 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
703da5a1
RV		 1378 }
1379}
1380
1381/*
1382 * vxge_vpath_intr_disable
1383 * @vdev: pointer to vdev
1384 * @vp_id: vpath for which to disable the interrupts
1385 *
1386 * Disables the interrupts for the vpath
1387*/
42821a5b 1388static void vxge_vpath_intr_disable(struct vxgedev *vdev, int vp_id)
703da5a1
RV		 1389{
1390 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
4d2a5b40 1391 struct __vxge_hw_device *hldev;
703da5a1
RV		 1392 int msix_id;
1393
d8ee7071 1394 hldev = pci_get_drvdata(vdev->pdev);
4d2a5b40
JM		 1395
1396 vxge_hw_vpath_wait_receive_idle(hldev, vpath->device_id);
1397
703da5a1
RV		 1398 vxge_hw_vpath_intr_disable(vpath->handle);
1399
1400 if (vdev->config.intr_type == INTA)
1401 vxge_hw_vpath_inta_mask_tx_rx(vpath->handle);
1402 else {
b59c9457 1403 msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
703da5a1
RV		 1404 vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
1405 vxge_hw_vpath_msix_mask(vpath->handle, msix_id + 1);
1406
1407 /* disable the alarm vector */
b59c9457
SH		 1408 msix_id = (vpath->handle->vpath->hldev->first_vp_id *
1409 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
703da5a1
RV		 1410 vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
1411 }
1412}
1413
528f7272
JM		 1414/* list all mac addresses from DA table */
1415static enum vxge_hw_status
1416vxge_search_mac_addr_in_da_table(struct vxge_vpath *vpath, struct macInfo *mac)
1417{
1418 enum vxge_hw_status status = VXGE_HW_OK;
1419 unsigned char macmask[ETH_ALEN];
1420 unsigned char macaddr[ETH_ALEN];
1421
1422 status = vxge_hw_vpath_mac_addr_get(vpath->handle,
1423 macaddr, macmask);
1424 if (status != VXGE_HW_OK) {
1425 vxge_debug_init(VXGE_ERR,
1426 "DA config list entry failed for vpath:%d",
1427 vpath->device_id);
1428 return status;
1429 }
1430
1431 while (memcmp(mac->macaddr, macaddr, ETH_ALEN)) {
1432 status = vxge_hw_vpath_mac_addr_get_next(vpath->handle,
1433 macaddr, macmask);
1434 if (status != VXGE_HW_OK)
1435 break;
1436 }
1437
1438 return status;
1439}
1440
1441/* Store all mac addresses from the list to the DA table */
1442static enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath)
1443{
1444 enum vxge_hw_status status = VXGE_HW_OK;
1445 struct macInfo mac_info;
1446 u8 *mac_address = NULL;
1447 struct list_head *entry, *next;
1448
1449 memset(&mac_info, 0, sizeof(struct macInfo));
1450
1451 if (vpath->is_open) {
1452 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
1453 mac_address =
1454 (u8 *)&
1455 ((struct vxge_mac_addrs *)entry)->macaddr;
1456 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1457 ((struct vxge_mac_addrs *)entry)->state =
1458 VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1459 /* does this mac address already exist in da table? */
1460 status = vxge_search_mac_addr_in_da_table(vpath,
1461 &mac_info);
1462 if (status != VXGE_HW_OK) {
1463 /* Add this mac address to the DA table */
1464 status = vxge_hw_vpath_mac_addr_add(
1465 vpath->handle, mac_info.macaddr,
1466 mac_info.macmask,
1467 VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE);
1468 if (status != VXGE_HW_OK) {
1469 vxge_debug_init(VXGE_ERR,
1470 "DA add entry failed for vpath:%d",
1471 vpath->device_id);
1472 ((struct vxge_mac_addrs *)entry)->state
1473 = VXGE_LL_MAC_ADDR_IN_LIST;
1474 }
1475 }
1476 }
1477 }
1478
1479 return status;
1480}
1481
1482/* Store all vlan ids from the list to the vid table */
1483static enum vxge_hw_status
1484vxge_restore_vpath_vid_table(struct vxge_vpath *vpath)
1485{
1486 enum vxge_hw_status status = VXGE_HW_OK;
1487 struct vxgedev *vdev = vpath->vdev;
1488 u16 vid;
1489
1490 if (vdev->vlgrp && vpath->is_open) {
1491
1492 for (vid = 0; vid < VLAN_N_VID; vid++) {
1493 if (!vlan_group_get_device(vdev->vlgrp, vid))
1494 continue;
1495 /* Add these vlan to the vid table */
1496 status = vxge_hw_vpath_vid_add(vpath->handle, vid);
1497 }
1498 }
1499
1500 return status;
1501}
1502
703da5a1
RV		 1503/*
1504 * vxge_reset_vpath
1505 * @vdev: pointer to vdev
1506 * @vp_id: vpath to reset
1507 *
1508 * Resets the vpath
1509*/
1510static int vxge_reset_vpath(struct vxgedev *vdev, int vp_id)
1511{
1512 enum vxge_hw_status status = VXGE_HW_OK;
7adf7d1b 1513 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
703da5a1
RV		 1514 int ret = 0;
1515
1516 /* check if device is down already */
1517 if (unlikely(!is_vxge_card_up(vdev)))
1518 return 0;
1519
1520 /* is device reset already scheduled */
1521 if (test_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
1522 return 0;
1523
7adf7d1b
JM		 1524 if (vpath->handle) {
1525 if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
703da5a1 1526 if (is_vxge_card_up(vdev) &&
7adf7d1b 1527 vxge_hw_vpath_recover_from_reset(vpath->handle)
703da5a1
RV		 1528 != VXGE_HW_OK) {
1529 vxge_debug_init(VXGE_ERR,
1530 "vxge_hw_vpath_recover_from_reset"
1531 "failed for vpath:%d", vp_id);
1532 return status;
1533 }
1534 } else {
1535 vxge_debug_init(VXGE_ERR,
1536 "vxge_hw_vpath_reset failed for"
1537 "vpath:%d", vp_id);
1538 return status;
1539 }
1540 } else
1541 return VXGE_HW_FAIL;
1542
7adf7d1b
JM		 1543 vxge_restore_vpath_mac_addr(vpath);
1544 vxge_restore_vpath_vid_table(vpath);
703da5a1
RV		 1545
1546 /* Enable all broadcast */
7adf7d1b
JM		 1547 vxge_hw_vpath_bcast_enable(vpath->handle);
1548
1549 /* Enable all multicast */
1550 if (vdev->all_multi_flg) {
1551 status = vxge_hw_vpath_mcast_enable(vpath->handle);
1552 if (status != VXGE_HW_OK)
1553 vxge_debug_init(VXGE_ERR,
1554 "%s:%d Enabling multicast failed",
1555 __func__, __LINE__);
1556 }
703da5a1
RV		 1557
1558 /* Enable the interrupts */
1559 vxge_vpath_intr_enable(vdev, vp_id);
1560
1561 smp_wmb();
1562
1563 /* Enable the flow of traffic through the vpath */
7adf7d1b 1564 vxge_hw_vpath_enable(vpath->handle);
703da5a1
RV		 1565
1566 smp_wmb();
7adf7d1b
JM		 1567 vxge_hw_vpath_rx_doorbell_init(vpath->handle);
1568 vpath->ring.last_status = VXGE_HW_OK;
703da5a1
RV		 1569
1570 /* Vpath reset done */
1571 clear_bit(vp_id, &vdev->vp_reset);
1572
1573 /* Start the vpath queue */
98f45da2
JM		 1574 if (netif_tx_queue_stopped(vpath->fifo.txq))
1575 netif_tx_wake_queue(vpath->fifo.txq);
703da5a1
RV		 1576
1577 return ret;
1578}
1579
16fded7d
JM		 1580/* Configure CI */
1581static void vxge_config_ci_for_tti_rti(struct vxgedev *vdev)
1582{
1583 int i = 0;
1584
1585 /* Enable CI for RTI */
1586 if (vdev->config.intr_type == MSI_X) {
1587 for (i = 0; i < vdev->no_of_vpath; i++) {
1588 struct __vxge_hw_ring *hw_ring;
1589
1590 hw_ring = vdev->vpaths[i].ring.handle;
1591 vxge_hw_vpath_dynamic_rti_ci_set(hw_ring);
1592 }
1593 }
1594
1595 /* Enable CI for TTI */
1596 for (i = 0; i < vdev->no_of_vpath; i++) {
1597 struct __vxge_hw_fifo *hw_fifo = vdev->vpaths[i].fifo.handle;
1598 vxge_hw_vpath_tti_ci_set(hw_fifo);
1599 /*
1600 * For Inta (with or without napi), Set CI ON for only one
1601 * vpath. (Have only one free running timer).
1602 */
1603 if ((vdev->config.intr_type == INTA) && (i == 0))
1604 break;
1605 }
1606
1607 return;
1608}
1609
703da5a1
RV		 1610static int do_vxge_reset(struct vxgedev *vdev, int event)
1611{
1612 enum vxge_hw_status status;
1613 int ret = 0, vp_id, i;
1614
1615 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1616
1617 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET)) {
1618 /* check if device is down already */
1619 if (unlikely(!is_vxge_card_up(vdev)))
1620 return 0;
1621
1622 /* is reset already scheduled */
1623 if (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
1624 return 0;
1625 }
1626
1627 if (event == VXGE_LL_FULL_RESET) {
2e41f644
JM		 1628 netif_carrier_off(vdev->ndev);
1629
703da5a1
RV		 1630 /* wait for all the vpath reset to complete */
1631 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
1632 while (test_bit(vp_id, &vdev->vp_reset))
1633 msleep(50);
1634 }
1635
2e41f644
JM		 1636 netif_carrier_on(vdev->ndev);
1637
703da5a1
RV		 1638 /* if execution mode is set to debug, don't reset the adapter */
1639 if (unlikely(vdev->exec_mode)) {
1640 vxge_debug_init(VXGE_ERR,
1641 "%s: execution mode is debug, returning..",
1642 vdev->ndev->name);
7adf7d1b
JM		 1643 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
1644 netif_tx_stop_all_queues(vdev->ndev);
1645 return 0;
703da5a1
RV		 1646 }
1647 }
1648
1649 if (event == VXGE_LL_FULL_RESET) {
4d2a5b40 1650 vxge_hw_device_wait_receive_idle(vdev->devh);
703da5a1
RV		 1651 vxge_hw_device_intr_disable(vdev->devh);
1652
1653 switch (vdev->cric_err_event) {
1654 case VXGE_HW_EVENT_UNKNOWN:
d03848e0 1655 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1656 vxge_debug_init(VXGE_ERR,
1657 "fatal: %s: Disabling device due to"
1658 "unknown error",
1659 vdev->ndev->name);
1660 ret = -EPERM;
1661 goto out;
1662 case VXGE_HW_EVENT_RESET_START:
1663 break;
1664 case VXGE_HW_EVENT_RESET_COMPLETE:
1665 case VXGE_HW_EVENT_LINK_DOWN:
1666 case VXGE_HW_EVENT_LINK_UP:
1667 case VXGE_HW_EVENT_ALARM_CLEARED:
1668 case VXGE_HW_EVENT_ECCERR:
1669 case VXGE_HW_EVENT_MRPCIM_ECCERR:
1670 ret = -EPERM;
1671 goto out;
1672 case VXGE_HW_EVENT_FIFO_ERR:
1673 case VXGE_HW_EVENT_VPATH_ERR:
1674 break;
1675 case VXGE_HW_EVENT_CRITICAL_ERR:
d03848e0 1676 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1677 vxge_debug_init(VXGE_ERR,
1678 "fatal: %s: Disabling device due to"
1679 "serious error",
1680 vdev->ndev->name);
1681 /* SOP or device reset required */
1682 /* This event is not currently used */
1683 ret = -EPERM;
1684 goto out;
1685 case VXGE_HW_EVENT_SERR:
d03848e0 1686 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1687 vxge_debug_init(VXGE_ERR,
1688 "fatal: %s: Disabling device due to"
1689 "serious error",
1690 vdev->ndev->name);
1691 ret = -EPERM;
1692 goto out;
1693 case VXGE_HW_EVENT_SRPCIM_SERR:
1694 case VXGE_HW_EVENT_MRPCIM_SERR:
1695 ret = -EPERM;
1696 goto out;
1697 case VXGE_HW_EVENT_SLOT_FREEZE:
d03848e0 1698 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1699 vxge_debug_init(VXGE_ERR,
1700 "fatal: %s: Disabling device due to"
1701 "slot freeze",
1702 vdev->ndev->name);
1703 ret = -EPERM;
1704 goto out;
1705 default:
1706 break;
1707
1708 }
1709 }
1710
1711 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET))
d03848e0 1712 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1713
1714 if (event == VXGE_LL_FULL_RESET) {
1715 status = vxge_reset_all_vpaths(vdev);
1716 if (status != VXGE_HW_OK) {
1717 vxge_debug_init(VXGE_ERR,
1718 "fatal: %s: can not reset vpaths",
1719 vdev->ndev->name);
1720 ret = -EPERM;
1721 goto out;
1722 }
1723 }
1724
1725 if (event == VXGE_LL_COMPL_RESET) {
1726 for (i = 0; i < vdev->no_of_vpath; i++)
1727 if (vdev->vpaths[i].handle) {
1728 if (vxge_hw_vpath_recover_from_reset(
1729 vdev->vpaths[i].handle)
1730 != VXGE_HW_OK) {
1731 vxge_debug_init(VXGE_ERR,
1732 "vxge_hw_vpath_recover_"
1733 "from_reset failed for vpath: "
1734 "%d", i);
1735 ret = -EPERM;
1736 goto out;
1737 }
1738 } else {
1739 vxge_debug_init(VXGE_ERR,
1740 "vxge_hw_vpath_reset failed for "
1741 "vpath:%d", i);
1742 ret = -EPERM;
1743 goto out;
1744 }
1745 }
1746
1747 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET)) {
1748 /* Reprogram the DA table with populated mac addresses */
1749 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
1750 vxge_restore_vpath_mac_addr(&vdev->vpaths[vp_id]);
1751 vxge_restore_vpath_vid_table(&vdev->vpaths[vp_id]);
1752 }
1753
1754 /* enable vpath interrupts */
1755 for (i = 0; i < vdev->no_of_vpath; i++)
1756 vxge_vpath_intr_enable(vdev, i);
1757
1758 vxge_hw_device_intr_enable(vdev->devh);
1759
1760 smp_wmb();
1761
1762 /* Indicate card up */
1763 set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
1764
1765 /* Get the traffic to flow through the vpaths */
1766 for (i = 0; i < vdev->no_of_vpath; i++) {
1767 vxge_hw_vpath_enable(vdev->vpaths[i].handle);
1768 smp_wmb();
1769 vxge_hw_vpath_rx_doorbell_init(vdev->vpaths[i].handle);
1770 }
1771
d03848e0 1772 netif_tx_wake_all_queues(vdev->ndev);
703da5a1
RV		 1773 }
1774
16fded7d
JM		 1775 /* configure CI */
1776 vxge_config_ci_for_tti_rti(vdev);
1777
703da5a1
RV		 1778out:
1779 vxge_debug_entryexit(VXGE_TRACE,
1780 "%s:%d Exiting...", __func__, __LINE__);
1781
1782 /* Indicate reset done */
1783 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET))
1784 clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
1785 return ret;
1786}
1787
1788/*
1789 * vxge_reset
1790 * @vdev: pointer to ll device
1791 *
1792 * driver may reset the chip on events of serr, eccerr, etc
1793 */
2e41f644 1794static void vxge_reset(struct work_struct *work)
703da5a1 1795{
2e41f644
JM		 1796 struct vxgedev *vdev = container_of(work, struct vxgedev, reset_task);
1797
1798 if (!netif_running(vdev->ndev))
1799 return;
1800
1801 do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
703da5a1
RV		 1802}
1803
1804/**
1805 * vxge_poll - Receive handler when Receive Polling is used.
1806 * @dev: pointer to the device structure.
1807 * @budget: Number of packets budgeted to be processed in this iteration.
1808 *
1809 * This function comes into picture only if Receive side is being handled
1810 * through polling (called NAPI in linux). It mostly does what the normal
1811 * Rx interrupt handler does in terms of descriptor and packet processing
1812 * but not in an interrupt context. Also it will process a specified number
1813 * of packets at most in one iteration. This value is passed down by the
1814 * kernel as the function argument 'budget'.
1815 */
1816static int vxge_poll_msix(struct napi_struct *napi, int budget)
1817{
16fded7d
JM		 1818 struct vxge_ring *ring = container_of(napi, struct vxge_ring, napi);
1819 int pkts_processed;
703da5a1 1820 int budget_org = budget;
703da5a1 1821
16fded7d
JM		 1822 ring->budget = budget;
1823 ring->pkts_processed = 0;
703da5a1 1824 vxge_hw_vpath_poll_rx(ring->handle);
16fded7d 1825 pkts_processed = ring->pkts_processed;
703da5a1
RV		 1826
1827 if (ring->pkts_processed < budget_org) {
1828 napi_complete(napi);
16fded7d 1829
703da5a1
RV		 1830 /* Re enable the Rx interrupts for the vpath */
1831 vxge_hw_channel_msix_unmask(
1832 (struct __vxge_hw_channel *)ring->handle,
1833 ring->rx_vector_no);
16fded7d 1834 mmiowb();
703da5a1
RV		 1835 }
1836
16fded7d
JM		 1837 /* We are copying and returning the local variable, in case if after
1838 * clearing the msix interrupt above, if the interrupt fires right
1839 * away which can preempt this NAPI thread */
1840 return pkts_processed;
703da5a1
RV		 1841}
1842
1843static int vxge_poll_inta(struct napi_struct *napi, int budget)
1844{
1845 struct vxgedev *vdev = container_of(napi, struct vxgedev, napi);
1846 int pkts_processed = 0;
1847 int i;
1848 int budget_org = budget;
1849 struct vxge_ring *ring;
1850
d8ee7071 1851 struct __vxge_hw_device *hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 1852
1853 for (i = 0; i < vdev->no_of_vpath; i++) {
1854 ring = &vdev->vpaths[i].ring;
1855 ring->budget = budget;
16fded7d 1856 ring->pkts_processed = 0;
703da5a1
RV		 1857 vxge_hw_vpath_poll_rx(ring->handle);
1858 pkts_processed += ring->pkts_processed;
1859 budget -= ring->pkts_processed;
1860 if (budget <= 0)
1861 break;
1862 }
1863
1864 VXGE_COMPLETE_ALL_TX(vdev);
1865
1866 if (pkts_processed < budget_org) {
1867 napi_complete(napi);
1868 /* Re enable the Rx interrupts for the ring */
1869 vxge_hw_device_unmask_all(hldev);
1870 vxge_hw_device_flush_io(hldev);
1871 }
1872
1873 return pkts_processed;
1874}
1875
1876#ifdef CONFIG_NET_POLL_CONTROLLER
1877/**
1878 * vxge_netpoll - netpoll event handler entry point
1879 * @dev : pointer to the device structure.
1880 * Description:
1881 * This function will be called by upper layer to check for events on the
1882 * interface in situations where interrupts are disabled. It is used for
1883 * specific in-kernel networking tasks, such as remote consoles and kernel
1884 * debugging over the network (example netdump in RedHat).
1885 */
1886static void vxge_netpoll(struct net_device *dev)
1887{
2c91308f 1888 struct __vxge_hw_device *hldev;
703da5a1
RV		 1889 struct vxgedev *vdev;
1890
5f54cebb 1891 vdev = netdev_priv(dev);
d8ee7071 1892 hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 1893
1894 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1895
1896 if (pci_channel_offline(vdev->pdev))
1897 return;
1898
1899 disable_irq(dev->irq);
1900 vxge_hw_device_clear_tx_rx(hldev);
1901
1902 vxge_hw_device_clear_tx_rx(hldev);
1903 VXGE_COMPLETE_ALL_RX(vdev);
1904 VXGE_COMPLETE_ALL_TX(vdev);
1905
1906 enable_irq(dev->irq);
1907
1908 vxge_debug_entryexit(VXGE_TRACE,
1909 "%s:%d Exiting...", __func__, __LINE__);
703da5a1
RV		 1910}
1911#endif
1912
1913/* RTH configuration */
1914static enum vxge_hw_status vxge_rth_configure(struct vxgedev *vdev)
1915{
1916 enum vxge_hw_status status = VXGE_HW_OK;
1917 struct vxge_hw_rth_hash_types hash_types;
1918 u8 itable[256] = {0}; /* indirection table */
1919 u8 mtable[256] = {0}; /* CPU to vpath mapping */
1920 int index;
1921
1922 /*
1923 * Filling
1924 * - itable with bucket numbers
1925 * - mtable with bucket-to-vpath mapping
1926 */
1927 for (index = 0; index < (1 << vdev->config.rth_bkt_sz); index++) {
1928 itable[index] = index;
1929 mtable[index] = index % vdev->no_of_vpath;
1930 }
1931
703da5a1
RV		 1932 /* set indirection table, bucket-to-vpath mapping */
1933 status = vxge_hw_vpath_rts_rth_itable_set(vdev->vp_handles,
1934 vdev->no_of_vpath,
1935 mtable, itable,
1936 vdev->config.rth_bkt_sz);
1937 if (status != VXGE_HW_OK) {
1938 vxge_debug_init(VXGE_ERR,
1939 "RTH indirection table configuration failed "
1940 "for vpath:%d", vdev->vpaths[0].device_id);
1941 return status;
1942 }
1943
47f01db4
JM		 1944 /* Fill RTH hash types */
1945 hash_types.hash_type_tcpipv4_en = vdev->config.rth_hash_type_tcpipv4;
1946 hash_types.hash_type_ipv4_en = vdev->config.rth_hash_type_ipv4;
1947 hash_types.hash_type_tcpipv6_en = vdev->config.rth_hash_type_tcpipv6;
1948 hash_types.hash_type_ipv6_en = vdev->config.rth_hash_type_ipv6;
1949 hash_types.hash_type_tcpipv6ex_en =
1950 vdev->config.rth_hash_type_tcpipv6ex;
1951 hash_types.hash_type_ipv6ex_en = vdev->config.rth_hash_type_ipv6ex;
1952
703da5a1 1953 /*
47f01db4
JM		 1954 * Because the itable_set() method uses the active_table field
1955 * for the target virtual path the RTH config should be updated
1956 * for all VPATHs. The h/w only uses the lowest numbered VPATH
1957 * when steering frames.
1958 */
703da5a1
RV		 1959 for (index = 0; index < vdev->no_of_vpath; index++) {
1960 status = vxge_hw_vpath_rts_rth_set(
1961 vdev->vpaths[index].handle,
1962 vdev->config.rth_algorithm,
1963 &hash_types,
1964 vdev->config.rth_bkt_sz);
703da5a1
RV		 1965 if (status != VXGE_HW_OK) {
1966 vxge_debug_init(VXGE_ERR,
1967 "RTH configuration failed for vpath:%d",
1968 vdev->vpaths[index].device_id);
1969 return status;
1970 }
1971 }
1972
1973 return status;
1974}
1975
703da5a1 1976/* reset vpaths */
4d2a5b40 1977enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev)
703da5a1 1978{
703da5a1 1979 enum vxge_hw_status status = VXGE_HW_OK;
7adf7d1b
JM		 1980 struct vxge_vpath *vpath;
1981 int i;
703da5a1 1982
7adf7d1b
JM		 1983 for (i = 0; i < vdev->no_of_vpath; i++) {
1984 vpath = &vdev->vpaths[i];
1985 if (vpath->handle) {
1986 if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
703da5a1
RV		 1987 if (is_vxge_card_up(vdev) &&
1988 vxge_hw_vpath_recover_from_reset(
7adf7d1b 1989 vpath->handle) != VXGE_HW_OK) {
703da5a1
RV		 1990 vxge_debug_init(VXGE_ERR,
1991 "vxge_hw_vpath_recover_"
1992 "from_reset failed for vpath: "
1993 "%d", i);
1994 return status;
1995 }
1996 } else {
1997 vxge_debug_init(VXGE_ERR,
1998 "vxge_hw_vpath_reset failed for "
1999 "vpath:%d", i);
2000 return status;
2001 }
2002 }
7adf7d1b
JM		 2003 }
2004
703da5a1
RV		 2005 return status;
2006}
2007
2008/* close vpaths */
42821a5b 2009static void vxge_close_vpaths(struct vxgedev *vdev, int index)
703da5a1 2010{
7adf7d1b 2011 struct vxge_vpath *vpath;
703da5a1 2012 int i;
7adf7d1b 2013
703da5a1 2014 for (i = index; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2015 vpath = &vdev->vpaths[i];
2016
2017 if (vpath->handle && vpath->is_open) {
2018 vxge_hw_vpath_close(vpath->handle);
703da5a1
RV		 2019 vdev->stats.vpaths_open--;
2020 }
7adf7d1b
JM		 2021 vpath->is_open = 0;
2022 vpath->handle = NULL;
703da5a1
RV		 2023 }
2024}
2025
2026/* open vpaths */
42821a5b 2027static int vxge_open_vpaths(struct vxgedev *vdev)
703da5a1 2028{
7adf7d1b 2029 struct vxge_hw_vpath_attr attr;
703da5a1 2030 enum vxge_hw_status status;
7adf7d1b 2031 struct vxge_vpath *vpath;
703da5a1 2032 u32 vp_id = 0;
7adf7d1b 2033 int i;
703da5a1
RV		 2034
2035 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b 2036 vpath = &vdev->vpaths[i];
7adf7d1b 2037 vxge_assert(vpath->is_configured);
e7935c96
JM		 2038
2039 if (!vdev->titan1) {
2040 struct vxge_hw_vp_config *vcfg;
2041 vcfg = &vdev->devh->config.vp_config[vpath->device_id];
2042
2043 vcfg->rti.urange_a = RTI_T1A_RX_URANGE_A;
2044 vcfg->rti.urange_b = RTI_T1A_RX_URANGE_B;
2045 vcfg->rti.urange_c = RTI_T1A_RX_URANGE_C;
2046 vcfg->tti.uec_a = TTI_T1A_TX_UFC_A;
2047 vcfg->tti.uec_b = TTI_T1A_TX_UFC_B;
2048 vcfg->tti.uec_c = TTI_T1A_TX_UFC_C(vdev->mtu);
2049 vcfg->tti.uec_d = TTI_T1A_TX_UFC_D(vdev->mtu);
2050 vcfg->tti.ltimer_val = VXGE_T1A_TTI_LTIMER_VAL;
2051 vcfg->tti.rtimer_val = VXGE_T1A_TTI_RTIMER_VAL;
2052 }
2053
7adf7d1b 2054 attr.vp_id = vpath->device_id;
703da5a1
RV		 2055 attr.fifo_attr.callback = vxge_xmit_compl;
2056 attr.fifo_attr.txdl_term = vxge_tx_term;
2057 attr.fifo_attr.per_txdl_space = sizeof(struct vxge_tx_priv);
7adf7d1b 2058 attr.fifo_attr.userdata = &vpath->fifo;
703da5a1
RV		 2059
2060 attr.ring_attr.callback = vxge_rx_1b_compl;
2061 attr.ring_attr.rxd_init = vxge_rx_initial_replenish;
2062 attr.ring_attr.rxd_term = vxge_rx_term;
2063 attr.ring_attr.per_rxd_space = sizeof(struct vxge_rx_priv);
7adf7d1b 2064 attr.ring_attr.userdata = &vpath->ring;
703da5a1 2065
7adf7d1b
JM		 2066 vpath->ring.ndev = vdev->ndev;
2067 vpath->ring.pdev = vdev->pdev;
528f7272 2068
7adf7d1b 2069 status = vxge_hw_vpath_open(vdev->devh, &attr, &vpath->handle);
703da5a1 2070 if (status == VXGE_HW_OK) {
7adf7d1b 2071 vpath->fifo.handle =
703da5a1 2072 (struct __vxge_hw_fifo *)attr.fifo_attr.userdata;
7adf7d1b 2073 vpath->ring.handle =
703da5a1 2074 (struct __vxge_hw_ring *)attr.ring_attr.userdata;
7adf7d1b 2075 vpath->fifo.tx_steering_type =
703da5a1 2076 vdev->config.tx_steering_type;
7adf7d1b
JM		 2077 vpath->fifo.ndev = vdev->ndev;
2078 vpath->fifo.pdev = vdev->pdev;
98f45da2
JM		 2079 if (vdev->config.tx_steering_type)
2080 vpath->fifo.txq =
2081 netdev_get_tx_queue(vdev->ndev, i);
2082 else
2083 vpath->fifo.txq =
2084 netdev_get_tx_queue(vdev->ndev, 0);
7adf7d1b 2085 vpath->fifo.indicate_max_pkts =
703da5a1 2086 vdev->config.fifo_indicate_max_pkts;
16fded7d 2087 vpath->fifo.tx_vector_no = 0;
7adf7d1b 2088 vpath->ring.rx_vector_no = 0;
b81b3733 2089 vpath->ring.rx_hwts = vdev->rx_hwts;
7adf7d1b
JM		 2090 vpath->is_open = 1;
2091 vdev->vp_handles[i] = vpath->handle;
7adf7d1b 2092 vpath->ring.vlan_tag_strip = vdev->vlan_tag_strip;
703da5a1
RV		 2093 vdev->stats.vpaths_open++;
2094 } else {
2095 vdev->stats.vpath_open_fail++;
528f7272
JM		 2096 vxge_debug_init(VXGE_ERR, "%s: vpath: %d failed to "
2097 "open with status: %d",
2098 vdev->ndev->name, vpath->device_id,
2099 status);
703da5a1
RV		 2100 vxge_close_vpaths(vdev, 0);
2101 return -EPERM;
2102 }
2103
7adf7d1b 2104 vp_id = vpath->handle->vpath->vp_id;
703da5a1
RV		 2105 vdev->vpaths_deployed |= vxge_mBIT(vp_id);
2106 }
528f7272 2107
703da5a1
RV		 2108 return VXGE_HW_OK;
2109}
2110
16fded7d
JM		 2111/**
2112 * adaptive_coalesce_tx_interrupts - Changes the interrupt coalescing
2113 * if the interrupts are not within a range
2114 * @fifo: pointer to transmit fifo structure
2115 * Description: The function changes boundary timer and restriction timer
2116 * value depends on the traffic
2117 * Return Value: None
2118 */
2119static void adaptive_coalesce_tx_interrupts(struct vxge_fifo *fifo)
2120{
2121 fifo->interrupt_count++;
2122 if (jiffies > fifo->jiffies + HZ / 100) {
2123 struct __vxge_hw_fifo *hw_fifo = fifo->handle;
2124
2125 fifo->jiffies = jiffies;
2126 if (fifo->interrupt_count > VXGE_T1A_MAX_TX_INTERRUPT_COUNT &&
2127 hw_fifo->rtimer != VXGE_TTI_RTIMER_ADAPT_VAL) {
2128 hw_fifo->rtimer = VXGE_TTI_RTIMER_ADAPT_VAL;
2129 vxge_hw_vpath_dynamic_tti_rtimer_set(hw_fifo);
2130 } else if (hw_fifo->rtimer != 0) {
2131 hw_fifo->rtimer = 0;
2132 vxge_hw_vpath_dynamic_tti_rtimer_set(hw_fifo);
2133 }
2134 fifo->interrupt_count = 0;
2135 }
2136}
2137
2138/**
2139 * adaptive_coalesce_rx_interrupts - Changes the interrupt coalescing
2140 * if the interrupts are not within a range
2141 * @ring: pointer to receive ring structure
2142 * Description: The function increases of decreases the packet counts within
2143 * the ranges of traffic utilization, if the interrupts due to this ring are
2144 * not within a fixed range.
2145 * Return Value: Nothing
2146 */
2147static void adaptive_coalesce_rx_interrupts(struct vxge_ring *ring)
2148{
2149 ring->interrupt_count++;
2150 if (jiffies > ring->jiffies + HZ / 100) {
2151 struct __vxge_hw_ring *hw_ring = ring->handle;
2152
2153 ring->jiffies = jiffies;
2154 if (ring->interrupt_count > VXGE_T1A_MAX_INTERRUPT_COUNT &&
2155 hw_ring->rtimer != VXGE_RTI_RTIMER_ADAPT_VAL) {
2156 hw_ring->rtimer = VXGE_RTI_RTIMER_ADAPT_VAL;
2157 vxge_hw_vpath_dynamic_rti_rtimer_set(hw_ring);
2158 } else if (hw_ring->rtimer != 0) {
2159 hw_ring->rtimer = 0;
2160 vxge_hw_vpath_dynamic_rti_rtimer_set(hw_ring);
2161 }
2162 ring->interrupt_count = 0;
2163 }
2164}
2165
703da5a1
RV		 2166/*
2167 * vxge_isr_napi
2168 * @irq: the irq of the device.
2169 * @dev_id: a void pointer to the hldev structure of the Titan device
2170 * @ptregs: pointer to the registers pushed on the stack.
2171 *
2172 * This function is the ISR handler of the device when napi is enabled. It
2173 * identifies the reason for the interrupt and calls the relevant service
2174 * routines.
2175 */
2176static irqreturn_t vxge_isr_napi(int irq, void *dev_id)
2177{
703da5a1 2178 struct net_device *dev;
a5d165b5 2179 struct __vxge_hw_device *hldev;
703da5a1
RV		 2180 u64 reason;
2181 enum vxge_hw_status status;
2c91308f 2182 struct vxgedev *vdev = (struct vxgedev *)dev_id;
703da5a1
RV		 2183
2184 vxge_debug_intr(VXGE_TRACE, "%s:%d", __func__, __LINE__);
2185
a5d165b5 2186 dev = vdev->ndev;
d8ee7071 2187 hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 2188
2189 if (pci_channel_offline(vdev->pdev))
2190 return IRQ_NONE;
2191
2192 if (unlikely(!is_vxge_card_up(vdev)))
4d2a5b40 2193 return IRQ_HANDLED;
703da5a1 2194
528f7272 2195 status = vxge_hw_device_begin_irq(hldev, vdev->exec_mode, &reason);
703da5a1
RV		 2196 if (status == VXGE_HW_OK) {
2197 vxge_hw_device_mask_all(hldev);
2198
2199 if (reason &
2200 VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_TRAFFIC_INT(
2201 vdev->vpaths_deployed >>
2202 (64 - VXGE_HW_MAX_VIRTUAL_PATHS))) {
2203
2204 vxge_hw_device_clear_tx_rx(hldev);
2205 napi_schedule(&vdev->napi);
2206 vxge_debug_intr(VXGE_TRACE,
2207 "%s:%d Exiting...", __func__, __LINE__);
2208 return IRQ_HANDLED;
2209 } else
2210 vxge_hw_device_unmask_all(hldev);
2211 } else if (unlikely((status == VXGE_HW_ERR_VPATH) ||
2212 (status == VXGE_HW_ERR_CRITICAL) ||
2213 (status == VXGE_HW_ERR_FIFO))) {
2214 vxge_hw_device_mask_all(hldev);
2215 vxge_hw_device_flush_io(hldev);
2216 return IRQ_HANDLED;
2217 } else if (unlikely(status == VXGE_HW_ERR_SLOT_FREEZE))
2218 return IRQ_HANDLED;
2219
2220 vxge_debug_intr(VXGE_TRACE, "%s:%d Exiting...", __func__, __LINE__);
2221 return IRQ_NONE;
2222}
2223
2224#ifdef CONFIG_PCI_MSI
2225
16fded7d 2226static irqreturn_t vxge_tx_msix_handle(int irq, void *dev_id)
703da5a1
RV		 2227{
2228 struct vxge_fifo *fifo = (struct vxge_fifo *)dev_id;
2229
16fded7d
JM		 2230 adaptive_coalesce_tx_interrupts(fifo);
2231
2232 vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)fifo->handle,
2233 fifo->tx_vector_no);
2234
2235 vxge_hw_channel_msix_clear((struct __vxge_hw_channel *)fifo->handle,
2236 fifo->tx_vector_no);
2237
703da5a1
RV		 2238 VXGE_COMPLETE_VPATH_TX(fifo);
2239
16fded7d
JM		 2240 vxge_hw_channel_msix_unmask((struct __vxge_hw_channel *)fifo->handle,
2241 fifo->tx_vector_no);
2242
2243 mmiowb();
2244
703da5a1
RV		 2245 return IRQ_HANDLED;
2246}
2247
16fded7d 2248static irqreturn_t vxge_rx_msix_napi_handle(int irq, void *dev_id)
703da5a1
RV		 2249{
2250 struct vxge_ring *ring = (struct vxge_ring *)dev_id;
2251
16fded7d
JM		 2252 adaptive_coalesce_rx_interrupts(ring);
2253
703da5a1 2254 vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)ring->handle,
16fded7d
JM		 2255 ring->rx_vector_no);
2256
2257 vxge_hw_channel_msix_clear((struct __vxge_hw_channel *)ring->handle,
2258 ring->rx_vector_no);
703da5a1
RV		 2259
2260 napi_schedule(&ring->napi);
2261 return IRQ_HANDLED;
2262}
2263
2264static irqreturn_t
2265vxge_alarm_msix_handle(int irq, void *dev_id)
2266{
2267 int i;
2268 enum vxge_hw_status status;
2269 struct vxge_vpath *vpath = (struct vxge_vpath *)dev_id;
2270 struct vxgedev *vdev = vpath->vdev;
b59c9457
SH		 2271 int msix_id = (vpath->handle->vpath->vp_id *
2272 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
703da5a1
RV		 2273
2274 for (i = 0; i < vdev->no_of_vpath; i++) {
25985edc 2275 /* Reduce the chance of losing alarm interrupts by masking
16fded7d
JM		 2276 * the vector. A pending bit will be set if an alarm is
2277 * generated and on unmask the interrupt will be fired.
2278 */
b59c9457 2279 vxge_hw_vpath_msix_mask(vdev->vpaths[i].handle, msix_id);
16fded7d
JM		 2280 vxge_hw_vpath_msix_clear(vdev->vpaths[i].handle, msix_id);
2281 mmiowb();
703da5a1
RV		 2282
2283 status = vxge_hw_vpath_alarm_process(vdev->vpaths[i].handle,
2284 vdev->exec_mode);
2285 if (status == VXGE_HW_OK) {
703da5a1 2286 vxge_hw_vpath_msix_unmask(vdev->vpaths[i].handle,
16fded7d
JM		 2287 msix_id);
2288 mmiowb();
703da5a1
RV		 2289 continue;
2290 }
2291 vxge_debug_intr(VXGE_ERR,
2292 "%s: vxge_hw_vpath_alarm_process failed %x ",
2293 VXGE_DRIVER_NAME, status);
2294 }
2295 return IRQ_HANDLED;
2296}
2297
2298static int vxge_alloc_msix(struct vxgedev *vdev)
2299{
2300 int j, i, ret = 0;
b59c9457 2301 int msix_intr_vect = 0, temp;
703da5a1
RV		 2302 vdev->intr_cnt = 0;
2303
b59c9457 2304start:
703da5a1
RV		 2305 /* Tx/Rx MSIX Vectors count */
2306 vdev->intr_cnt = vdev->no_of_vpath * 2;
2307
2308 /* Alarm MSIX Vectors count */
2309 vdev->intr_cnt++;
2310
baeb2ffa
JP		 2311 vdev->entries = kcalloc(vdev->intr_cnt, sizeof(struct msix_entry),
2312 GFP_KERNEL);
703da5a1
RV		 2313 if (!vdev->entries) {
2314 vxge_debug_init(VXGE_ERR,
2315 "%s: memory allocation failed",
2316 VXGE_DRIVER_NAME);
cc413d90
MS		 2317 ret = -ENOMEM;
2318 goto alloc_entries_failed;
703da5a1
RV		 2319 }
2320
baeb2ffa
JP		 2321 vdev->vxge_entries = kcalloc(vdev->intr_cnt,
2322 sizeof(struct vxge_msix_entry),
2323 GFP_KERNEL);
703da5a1
RV		 2324 if (!vdev->vxge_entries) {
2325 vxge_debug_init(VXGE_ERR, "%s: memory allocation failed",
2326 VXGE_DRIVER_NAME);
cc413d90
MS		 2327 ret = -ENOMEM;
2328 goto alloc_vxge_entries_failed;
703da5a1
RV		 2329 }
2330
b59c9457 2331 for (i = 0, j = 0; i < vdev->no_of_vpath; i++) {
703da5a1
RV		 2332
2333 msix_intr_vect = i * VXGE_HW_VPATH_MSIX_ACTIVE;
2334
2335 /* Initialize the fifo vector */
2336 vdev->entries[j].entry = msix_intr_vect;
2337 vdev->vxge_entries[j].entry = msix_intr_vect;
2338 vdev->vxge_entries[j].in_use = 0;
2339 j++;
2340
2341 /* Initialize the ring vector */
2342 vdev->entries[j].entry = msix_intr_vect + 1;
2343 vdev->vxge_entries[j].entry = msix_intr_vect + 1;
2344 vdev->vxge_entries[j].in_use = 0;
2345 j++;
2346 }
2347
2348 /* Initialize the alarm vector */
b59c9457
SH		 2349 vdev->entries[j].entry = VXGE_ALARM_MSIX_ID;
2350 vdev->vxge_entries[j].entry = VXGE_ALARM_MSIX_ID;
703da5a1
RV		 2351 vdev->vxge_entries[j].in_use = 0;
2352
b59c9457 2353 ret = pci_enable_msix(vdev->pdev, vdev->entries, vdev->intr_cnt);
b59c9457 2354 if (ret > 0) {
703da5a1
RV		 2355 vxge_debug_init(VXGE_ERR,
2356 "%s: MSI-X enable failed for %d vectors, ret: %d",
b59c9457 2357 VXGE_DRIVER_NAME, vdev->intr_cnt, ret);
cc413d90
MS		 2358 if ((max_config_vpath != VXGE_USE_DEFAULT) || (ret < 3)) {
2359 ret = -ENODEV;
2360 goto enable_msix_failed;
2361 }
2362
703da5a1
RV		 2363 kfree(vdev->entries);
2364 kfree(vdev->vxge_entries);
2365 vdev->entries = NULL;
2366 vdev->vxge_entries = NULL;
b59c9457
SH		 2367 /* Try with less no of vector by reducing no of vpaths count */
2368 temp = (ret - 1)/2;
2369 vxge_close_vpaths(vdev, temp);
2370 vdev->no_of_vpath = temp;
2371 goto start;
cc413d90
MS		 2372 } else if (ret < 0) {
2373 ret = -ENODEV;
2374 goto enable_msix_failed;
2375 }
703da5a1 2376 return 0;
cc413d90
MS		 2377
2378enable_msix_failed:
2379 kfree(vdev->vxge_entries);
2380alloc_vxge_entries_failed:
2381 kfree(vdev->entries);
2382alloc_entries_failed:
2383 return ret;
703da5a1
RV		 2384}
2385
2386static int vxge_enable_msix(struct vxgedev *vdev)
2387{
2388
2389 int i, ret = 0;
703da5a1 2390 /* 0 - Tx, 1 - Rx */
b59c9457
SH		 2391 int tim_msix_id[4] = {0, 1, 0, 0};
2392
703da5a1
RV		 2393 vdev->intr_cnt = 0;
2394
2395 /* allocate msix vectors */
2396 ret = vxge_alloc_msix(vdev);
2397 if (!ret) {
703da5a1 2398 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b 2399 struct vxge_vpath *vpath = &vdev->vpaths[i];
703da5a1 2400
7adf7d1b
JM		 2401 /* If fifo or ring are not enabled, the MSIX vector for
2402 * it should be set to 0.
2403 */
2404 vpath->ring.rx_vector_no = (vpath->device_id *
2405 VXGE_HW_VPATH_MSIX_ACTIVE) + 1;
703da5a1 2406
16fded7d
JM		 2407 vpath->fifo.tx_vector_no = (vpath->device_id *
2408 VXGE_HW_VPATH_MSIX_ACTIVE);
2409
7adf7d1b
JM		 2410 vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
2411 VXGE_ALARM_MSIX_ID);
703da5a1
RV		 2412 }
2413 }
2414
2415 return ret;
2416}
2417
2418static void vxge_rem_msix_isr(struct vxgedev *vdev)
2419{
2420 int intr_cnt;
2421
b59c9457 2422 for (intr_cnt = 0; intr_cnt < (vdev->no_of_vpath * 2 + 1);
703da5a1
RV		 2423 intr_cnt++) {
2424 if (vdev->vxge_entries[intr_cnt].in_use) {
2425 synchronize_irq(vdev->entries[intr_cnt].vector);
2426 free_irq(vdev->entries[intr_cnt].vector,
2427 vdev->vxge_entries[intr_cnt].arg);
2428 vdev->vxge_entries[intr_cnt].in_use = 0;
2429 }
2430 }
2431
2432 kfree(vdev->entries);
2433 kfree(vdev->vxge_entries);
2434 vdev->entries = NULL;
2435 vdev->vxge_entries = NULL;
2436
2437 if (vdev->config.intr_type == MSI_X)
2438 pci_disable_msix(vdev->pdev);
2439}
2440#endif
2441
2442static void vxge_rem_isr(struct vxgedev *vdev)
2443{
2c91308f 2444 struct __vxge_hw_device *hldev;
d8ee7071 2445 hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 2446
2447#ifdef CONFIG_PCI_MSI
2448 if (vdev->config.intr_type == MSI_X) {
2449 vxge_rem_msix_isr(vdev);
2450 } else
2451#endif
2452 if (vdev->config.intr_type == INTA) {
2453 synchronize_irq(vdev->pdev->irq);
a5d165b5 2454 free_irq(vdev->pdev->irq, vdev);
703da5a1
RV		 2455 }
2456}
2457
2458static int vxge_add_isr(struct vxgedev *vdev)
2459{
2460 int ret = 0;
703da5a1
RV		 2461#ifdef CONFIG_PCI_MSI
2462 int vp_idx = 0, intr_idx = 0, intr_cnt = 0, msix_idx = 0, irq_req = 0;
703da5a1
RV		 2463 int pci_fun = PCI_FUNC(vdev->pdev->devfn);
2464
2465 if (vdev->config.intr_type == MSI_X)
2466 ret = vxge_enable_msix(vdev);
2467
2468 if (ret) {
2469 vxge_debug_init(VXGE_ERR,
2470 "%s: Enabling MSI-X Failed", VXGE_DRIVER_NAME);
eb5f10c2
SH		 2471 vxge_debug_init(VXGE_ERR,
2472 "%s: Defaulting to INTA", VXGE_DRIVER_NAME);
2473 vdev->config.intr_type = INTA;
703da5a1
RV		 2474 }
2475
2476 if (vdev->config.intr_type == MSI_X) {
2477 for (intr_idx = 0;
2478 intr_idx < (vdev->no_of_vpath *
2479 VXGE_HW_VPATH_MSIX_ACTIVE); intr_idx++) {
2480
2481 msix_idx = intr_idx % VXGE_HW_VPATH_MSIX_ACTIVE;
2482 irq_req = 0;
2483
2484 switch (msix_idx) {
2485 case 0:
2486 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
b59c9457
SH		 2487 "%s:vxge:MSI-X %d - Tx - fn:%d vpath:%d",
2488 vdev->ndev->name,
2489 vdev->entries[intr_cnt].entry,
2490 pci_fun, vp_idx);
703da5a1
RV		 2491 ret = request_irq(
2492 vdev->entries[intr_cnt].vector,
2493 vxge_tx_msix_handle, 0,
2494 vdev->desc[intr_cnt],
2495 &vdev->vpaths[vp_idx].fifo);
2496 vdev->vxge_entries[intr_cnt].arg =
2497 &vdev->vpaths[vp_idx].fifo;
2498 irq_req = 1;
2499 break;
2500 case 1:
2501 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
b59c9457
SH		 2502 "%s:vxge:MSI-X %d - Rx - fn:%d vpath:%d",
2503 vdev->ndev->name,
2504 vdev->entries[intr_cnt].entry,
2505 pci_fun, vp_idx);
703da5a1
RV		 2506 ret = request_irq(
2507 vdev->entries[intr_cnt].vector,
2508 vxge_rx_msix_napi_handle,
2509 0,
2510 vdev->desc[intr_cnt],
2511 &vdev->vpaths[vp_idx].ring);
2512 vdev->vxge_entries[intr_cnt].arg =
2513 &vdev->vpaths[vp_idx].ring;
2514 irq_req = 1;
2515 break;
2516 }
2517
2518 if (ret) {
2519 vxge_debug_init(VXGE_ERR,
2520 "%s: MSIX - %d Registration failed",
2521 vdev->ndev->name, intr_cnt);
2522 vxge_rem_msix_isr(vdev);
eb5f10c2
SH		 2523 vdev->config.intr_type = INTA;
2524 vxge_debug_init(VXGE_ERR,
2525 "%s: Defaulting to INTA"
2526 , vdev->ndev->name);
703da5a1 2527 goto INTA_MODE;
703da5a1
RV		 2528 }
2529
2530 if (irq_req) {
2531 /* We requested for this msix interrupt */
2532 vdev->vxge_entries[intr_cnt].in_use = 1;
b59c9457
SH		 2533 msix_idx += vdev->vpaths[vp_idx].device_id *
2534 VXGE_HW_VPATH_MSIX_ACTIVE;
703da5a1
RV		 2535 vxge_hw_vpath_msix_unmask(
2536 vdev->vpaths[vp_idx].handle,
b59c9457 2537 msix_idx);
703da5a1
RV		 2538 intr_cnt++;
2539 }
2540
2541 /* Point to next vpath handler */
8e95a202
JP		 2542 if (((intr_idx + 1) % VXGE_HW_VPATH_MSIX_ACTIVE == 0) &&
2543 (vp_idx < (vdev->no_of_vpath - 1)))
2544 vp_idx++;
703da5a1
RV		 2545 }
2546
b59c9457 2547 intr_cnt = vdev->no_of_vpath * 2;
703da5a1 2548 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
b59c9457
SH		 2549 "%s:vxge:MSI-X %d - Alarm - fn:%d",
2550 vdev->ndev->name,
2551 vdev->entries[intr_cnt].entry,
2552 pci_fun);
703da5a1
RV		 2553 /* For Alarm interrupts */
2554 ret = request_irq(vdev->entries[intr_cnt].vector,
2555 vxge_alarm_msix_handle, 0,
2556 vdev->desc[intr_cnt],
b59c9457 2557 &vdev->vpaths[0]);
703da5a1
RV		 2558 if (ret) {
2559 vxge_debug_init(VXGE_ERR,
2560 "%s: MSIX - %d Registration failed",
2561 vdev->ndev->name, intr_cnt);
2562 vxge_rem_msix_isr(vdev);
eb5f10c2
SH		 2563 vdev->config.intr_type = INTA;
2564 vxge_debug_init(VXGE_ERR,
2565 "%s: Defaulting to INTA",
2566 vdev->ndev->name);
703da5a1 2567 goto INTA_MODE;
703da5a1
RV		 2568 }
2569
b59c9457
SH		 2570 msix_idx = (vdev->vpaths[0].handle->vpath->vp_id *
2571 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
703da5a1 2572 vxge_hw_vpath_msix_unmask(vdev->vpaths[vp_idx].handle,
b59c9457 2573 msix_idx);
703da5a1 2574 vdev->vxge_entries[intr_cnt].in_use = 1;
b59c9457 2575 vdev->vxge_entries[intr_cnt].arg = &vdev->vpaths[0];
703da5a1
RV		 2576 }
2577INTA_MODE:
2578#endif
703da5a1
RV		 2579
2580 if (vdev->config.intr_type == INTA) {
b59c9457
SH		 2581 snprintf(vdev->desc[0], VXGE_INTR_STRLEN,
2582 "%s:vxge:INTA", vdev->ndev->name);
eb5f10c2
SH		 2583 vxge_hw_device_set_intr_type(vdev->devh,
2584 VXGE_HW_INTR_MODE_IRQLINE);
16fded7d
JM		 2585
2586 vxge_hw_vpath_tti_ci_set(vdev->vpaths[0].fifo.handle);
2587
703da5a1
RV		 2588 ret = request_irq((int) vdev->pdev->irq,
2589 vxge_isr_napi,
a5d165b5 2590 IRQF_SHARED, vdev->desc[0], vdev);
703da5a1
RV		 2591 if (ret) {
2592 vxge_debug_init(VXGE_ERR,
2593 "%s %s-%d: ISR registration failed",
2594 VXGE_DRIVER_NAME, "IRQ", vdev->pdev->irq);
2595 return -ENODEV;
2596 }
2597 vxge_debug_init(VXGE_TRACE,
2598 "new %s-%d line allocated",
2599 "IRQ", vdev->pdev->irq);
2600 }
2601
2602 return VXGE_HW_OK;
2603}
2604
2605static void vxge_poll_vp_reset(unsigned long data)
2606{
2607 struct vxgedev *vdev = (struct vxgedev *)data;
2608 int i, j = 0;
2609
2610 for (i = 0; i < vdev->no_of_vpath; i++) {
2611 if (test_bit(i, &vdev->vp_reset)) {
2612 vxge_reset_vpath(vdev, i);
2613 j++;
2614 }
2615 }
2616 if (j && (vdev->config.intr_type != MSI_X)) {
2617 vxge_hw_device_unmask_all(vdev->devh);
2618 vxge_hw_device_flush_io(vdev->devh);
2619 }
2620
2621 mod_timer(&vdev->vp_reset_timer, jiffies + HZ / 2);
2622}
2623
2624static void vxge_poll_vp_lockup(unsigned long data)
2625{
2626 struct vxgedev *vdev = (struct vxgedev *)data;
703da5a1 2627 enum vxge_hw_status status = VXGE_HW_OK;
7adf7d1b
JM		 2628 struct vxge_vpath *vpath;
2629 struct vxge_ring *ring;
2630 int i;
703da5a1
RV		 2631
2632 for (i = 0; i < vdev->no_of_vpath; i++) {
2633 ring = &vdev->vpaths[i].ring;
2634 /* Did this vpath received any packets */
2635 if (ring->stats.prev_rx_frms == ring->stats.rx_frms) {
2636 status = vxge_hw_vpath_check_leak(ring->handle);
2637
2638 /* Did it received any packets last time */
2639 if ((VXGE_HW_FAIL == status) &&
2640 (VXGE_HW_FAIL == ring->last_status)) {
2641
2642 /* schedule vpath reset */
2643 if (!test_and_set_bit(i, &vdev->vp_reset)) {
7adf7d1b 2644 vpath = &vdev->vpaths[i];
703da5a1
RV		 2645
2646 /* disable interrupts for this vpath */
2647 vxge_vpath_intr_disable(vdev, i);
2648
2649 /* stop the queue for this vpath */
98f45da2 2650 netif_tx_stop_queue(vpath->fifo.txq);
703da5a1
RV		 2651 continue;
2652 }
2653 }
2654 }
2655 ring->stats.prev_rx_frms = ring->stats.rx_frms;
2656 ring->last_status = status;
2657 }
2658
2659 /* Check every 1 milli second */
2660 mod_timer(&vdev->vp_lockup_timer, jiffies + HZ / 1000);
2661}
2662
feb990d4
MM		 2663static u32 vxge_fix_features(struct net_device *dev, u32 features)
2664{
2665 u32 changed = dev->features ^ features;
2666
2667 /* Enabling RTH requires some of the logic in vxge_device_register and a
2668 * vpath reset. Due to these restrictions, only allow modification
2669 * while the interface is down.
2670 */
2671 if ((changed & NETIF_F_RXHASH) && netif_running(dev))
2672 features ^= NETIF_F_RXHASH;
2673
2674 return features;
2675}
2676
2677static int vxge_set_features(struct net_device *dev, u32 features)
2678{
2679 struct vxgedev *vdev = netdev_priv(dev);
2680 u32 changed = dev->features ^ features;
2681
2682 if (!(changed & NETIF_F_RXHASH))
2683 return 0;
2684
2685 /* !netif_running() ensured by vxge_fix_features() */
2686
2687 vdev->devh->config.rth_en = !!(features & NETIF_F_RXHASH);
2688 if (vxge_reset_all_vpaths(vdev) != VXGE_HW_OK) {
2689 dev->features = features ^ NETIF_F_RXHASH;
2690 vdev->devh->config.rth_en = !!(dev->features & NETIF_F_RXHASH);
2691 return -EIO;
2692 }
2693
2694 return 0;
2695}
2696
703da5a1
RV		 2697/**
2698 * vxge_open
2699 * @dev: pointer to the device structure.
2700 *
2701 * This function is the open entry point of the driver. It mainly calls a
2702 * function to allocate Rx buffers and inserts them into the buffer
2703 * descriptors and then enables the Rx part of the NIC.
2704 * Return value: '0' on success and an appropriate (-)ve integer as
2705 * defined in errno.h file on failure.
2706 */
528f7272 2707static int vxge_open(struct net_device *dev)
703da5a1
RV		 2708{
2709 enum vxge_hw_status status;
2710 struct vxgedev *vdev;
2711 struct __vxge_hw_device *hldev;
7adf7d1b 2712 struct vxge_vpath *vpath;
703da5a1
RV		 2713 int ret = 0;
2714 int i;
2715 u64 val64, function_mode;
528f7272 2716
703da5a1
RV		 2717 vxge_debug_entryexit(VXGE_TRACE,
2718 "%s: %s:%d", dev->name, __func__, __LINE__);
2719
5f54cebb 2720 vdev = netdev_priv(dev);
d8ee7071 2721 hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 2722 function_mode = vdev->config.device_hw_info.function_mode;
2723
2724 /* make sure you have link off by default every time Nic is
2725 * initialized */
2726 netif_carrier_off(dev);
2727
703da5a1
RV		 2728 /* Open VPATHs */
2729 status = vxge_open_vpaths(vdev);
2730 if (status != VXGE_HW_OK) {
2731 vxge_debug_init(VXGE_ERR,
2732 "%s: fatal: Vpath open failed", vdev->ndev->name);
2733 ret = -EPERM;
2734 goto out0;
2735 }
2736
2737 vdev->mtu = dev->mtu;
2738
2739 status = vxge_add_isr(vdev);
2740 if (status != VXGE_HW_OK) {
2741 vxge_debug_init(VXGE_ERR,
2742 "%s: fatal: ISR add failed", dev->name);
2743 ret = -EPERM;
2744 goto out1;
2745 }
2746
703da5a1
RV		 2747 if (vdev->config.intr_type != MSI_X) {
2748 netif_napi_add(dev, &vdev->napi, vxge_poll_inta,
2749 vdev->config.napi_weight);
2750 napi_enable(&vdev->napi);
7adf7d1b
JM		 2751 for (i = 0; i < vdev->no_of_vpath; i++) {
2752 vpath = &vdev->vpaths[i];
2753 vpath->ring.napi_p = &vdev->napi;
2754 }
703da5a1
RV		 2755 } else {
2756 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2757 vpath = &vdev->vpaths[i];
2758 netif_napi_add(dev, &vpath->ring.napi,
703da5a1 2759 vxge_poll_msix, vdev->config.napi_weight);
7adf7d1b
JM		 2760 napi_enable(&vpath->ring.napi);
2761 vpath->ring.napi_p = &vpath->ring.napi;
703da5a1
RV		 2762 }
2763 }
2764
2765 /* configure RTH */
2766 if (vdev->config.rth_steering) {
2767 status = vxge_rth_configure(vdev);
2768 if (status != VXGE_HW_OK) {
2769 vxge_debug_init(VXGE_ERR,
2770 "%s: fatal: RTH configuration failed",
2771 dev->name);
2772 ret = -EPERM;
2773 goto out2;
2774 }
2775 }
47f01db4
JM		 2776 printk(KERN_INFO "%s: Receive Hashing Offload %s\n", dev->name,
2777 hldev->config.rth_en ? "enabled" : "disabled");
703da5a1
RV		 2778
2779 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2780 vpath = &vdev->vpaths[i];
2781
703da5a1 2782 /* set initial mtu before enabling the device */
7adf7d1b 2783 status = vxge_hw_vpath_mtu_set(vpath->handle, vdev->mtu);
703da5a1
RV		 2784 if (status != VXGE_HW_OK) {
2785 vxge_debug_init(VXGE_ERR,
2786 "%s: fatal: can not set new MTU", dev->name);
2787 ret = -EPERM;
2788 goto out2;
2789 }
2790 }
2791
2792 VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_TRACE, VXGE_COMPONENT_LL, vdev);
2793 vxge_debug_init(vdev->level_trace,
2794 "%s: MTU is %d", vdev->ndev->name, vdev->mtu);
2795 VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_ERR, VXGE_COMPONENT_LL, vdev);
2796
7adf7d1b
JM		 2797 /* Restore the DA, VID table and also multicast and promiscuous mode
2798 * states
2799 */
2800 if (vdev->all_multi_flg) {
2801 for (i = 0; i < vdev->no_of_vpath; i++) {
2802 vpath = &vdev->vpaths[i];
2803 vxge_restore_vpath_mac_addr(vpath);
2804 vxge_restore_vpath_vid_table(vpath);
2805
2806 status = vxge_hw_vpath_mcast_enable(vpath->handle);
2807 if (status != VXGE_HW_OK)
2808 vxge_debug_init(VXGE_ERR,
2809 "%s:%d Enabling multicast failed",
2810 __func__, __LINE__);
2811 }
703da5a1
RV		 2812 }
2813
2814 /* Enable vpath to sniff all unicast/multicast traffic that not
25985edc 2815 * addressed to them. We allow promiscuous mode for PF only
703da5a1
RV		 2816 */
2817
2818 val64 = 0;
2819 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
2820 val64 |= VXGE_HW_RXMAC_AUTHORIZE_ALL_ADDR_VP(i);
2821
2822 vxge_hw_mgmt_reg_write(vdev->devh,
2823 vxge_hw_mgmt_reg_type_mrpcim,
2824 0,
2825 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2826 rxmac_authorize_all_addr),
2827 val64);
2828
2829 vxge_hw_mgmt_reg_write(vdev->devh,
2830 vxge_hw_mgmt_reg_type_mrpcim,
2831 0,
2832 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2833 rxmac_authorize_all_vid),
2834 val64);
2835
2836 vxge_set_multicast(dev);
2837
2838 /* Enabling Bcast and mcast for all vpath */
2839 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2840 vpath = &vdev->vpaths[i];
2841 status = vxge_hw_vpath_bcast_enable(vpath->handle);
703da5a1
RV		 2842 if (status != VXGE_HW_OK)
2843 vxge_debug_init(VXGE_ERR,
2844 "%s : Can not enable bcast for vpath "
2845 "id %d", dev->name, i);
2846 if (vdev->config.addr_learn_en) {
7adf7d1b 2847 status = vxge_hw_vpath_mcast_enable(vpath->handle);
703da5a1
RV		 2848 if (status != VXGE_HW_OK)
2849 vxge_debug_init(VXGE_ERR,
2850 "%s : Can not enable mcast for vpath "
2851 "id %d", dev->name, i);
2852 }
2853 }
2854
2855 vxge_hw_device_setpause_data(vdev->devh, 0,
2856 vdev->config.tx_pause_enable,
2857 vdev->config.rx_pause_enable);
2858
2859 if (vdev->vp_reset_timer.function == NULL)
2860 vxge_os_timer(vdev->vp_reset_timer,
2861 vxge_poll_vp_reset, vdev, (HZ/2));
2862
e7935c96
JM		 2863 /* There is no need to check for RxD leak and RxD lookup on Titan1A */
2864 if (vdev->titan1 && vdev->vp_lockup_timer.function == NULL)
2865 vxge_os_timer(vdev->vp_lockup_timer, vxge_poll_vp_lockup, vdev,
2866 HZ / 2);
703da5a1
RV		 2867
2868 set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
2869
2870 smp_wmb();
2871
2872 if (vxge_hw_device_link_state_get(vdev->devh) == VXGE_HW_LINK_UP) {
2873 netif_carrier_on(vdev->ndev);
75f5e1c6 2874 netdev_notice(vdev->ndev, "Link Up\n");
703da5a1
RV		 2875 vdev->stats.link_up++;
2876 }
2877
2878 vxge_hw_device_intr_enable(vdev->devh);
2879
2880 smp_wmb();
2881
2882 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2883 vpath = &vdev->vpaths[i];
2884
2885 vxge_hw_vpath_enable(vpath->handle);
703da5a1 2886 smp_wmb();
7adf7d1b 2887 vxge_hw_vpath_rx_doorbell_init(vpath->handle);
703da5a1
RV		 2888 }
2889
d03848e0 2890 netif_tx_start_all_queues(vdev->ndev);
16fded7d
JM		 2891
2892 /* configure CI */
2893 vxge_config_ci_for_tti_rti(vdev);
2894
703da5a1
RV		 2895 goto out0;
2896
2897out2:
2898 vxge_rem_isr(vdev);
2899
2900 /* Disable napi */
2901 if (vdev->config.intr_type != MSI_X)
2902 napi_disable(&vdev->napi);
2903 else {
2904 for (i = 0; i < vdev->no_of_vpath; i++)
2905 napi_disable(&vdev->vpaths[i].ring.napi);
2906 }
2907
2908out1:
2909 vxge_close_vpaths(vdev, 0);
2910out0:
2911 vxge_debug_entryexit(VXGE_TRACE,
2912 "%s: %s:%d Exiting...",
2913 dev->name, __func__, __LINE__);
2914 return ret;
2915}
2916
25985edc 2917/* Loop through the mac address list and delete all the entries */
42821a5b 2918static void vxge_free_mac_add_list(struct vxge_vpath *vpath)
703da5a1
RV		 2919{
2920
2921 struct list_head *entry, *next;
2922 if (list_empty(&vpath->mac_addr_list))
2923 return;
2924
2925 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
2926 list_del(entry);
2927 kfree((struct vxge_mac_addrs *)entry);
2928 }
2929}
2930
2931static void vxge_napi_del_all(struct vxgedev *vdev)
2932{
2933 int i;
2934 if (vdev->config.intr_type != MSI_X)
2935 netif_napi_del(&vdev->napi);
2936 else {
2937 for (i = 0; i < vdev->no_of_vpath; i++)
2938 netif_napi_del(&vdev->vpaths[i].ring.napi);
2939 }
703da5a1
RV		 2940}
2941
42821a5b 2942static int do_vxge_close(struct net_device *dev, int do_io)
703da5a1
RV		 2943{
2944 enum vxge_hw_status status;
2945 struct vxgedev *vdev;
2946 struct __vxge_hw_device *hldev;
2947 int i;
2948 u64 val64, vpath_vector;
2949 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
2950 dev->name, __func__, __LINE__);
2951
5f54cebb 2952 vdev = netdev_priv(dev);
d8ee7071 2953 hldev = pci_get_drvdata(vdev->pdev);
703da5a1 2954
bd9ee680
SH		 2955 if (unlikely(!is_vxge_card_up(vdev)))
2956 return 0;
2957
703da5a1
RV		 2958 /* If vxge_handle_crit_err task is executing,
2959 * wait till it completes. */
2960 while (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
2961 msleep(50);
2962
703da5a1
RV		 2963 if (do_io) {
2964 /* Put the vpath back in normal mode */
2965 vpath_vector = vxge_mBIT(vdev->vpaths[0].device_id);
2966 status = vxge_hw_mgmt_reg_read(vdev->devh,
2967 vxge_hw_mgmt_reg_type_mrpcim,
2968 0,
2969 (ulong)offsetof(
2970 struct vxge_hw_mrpcim_reg,
2971 rts_mgr_cbasin_cfg),
2972 &val64);
703da5a1
RV		 2973 if (status == VXGE_HW_OK) {
2974 val64 &= ~vpath_vector;
2975 status = vxge_hw_mgmt_reg_write(vdev->devh,
2976 vxge_hw_mgmt_reg_type_mrpcim,
2977 0,
2978 (ulong)offsetof(
2979 struct vxge_hw_mrpcim_reg,
2980 rts_mgr_cbasin_cfg),
2981 val64);
2982 }
2983
25985edc 2984 /* Remove the function 0 from promiscuous mode */
703da5a1
RV		 2985 vxge_hw_mgmt_reg_write(vdev->devh,
2986 vxge_hw_mgmt_reg_type_mrpcim,
2987 0,
2988 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2989 rxmac_authorize_all_addr),
2990 0);
2991
2992 vxge_hw_mgmt_reg_write(vdev->devh,
2993 vxge_hw_mgmt_reg_type_mrpcim,
2994 0,
2995 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2996 rxmac_authorize_all_vid),
2997 0);
2998
2999 smp_wmb();
3000 }
e7935c96
JM		 3001
3002 if (vdev->titan1)
3003 del_timer_sync(&vdev->vp_lockup_timer);
703da5a1
RV		 3004
3005 del_timer_sync(&vdev->vp_reset_timer);
3006
4d2a5b40
JM		 3007 if (do_io)
3008 vxge_hw_device_wait_receive_idle(hldev);
3009
3010 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3011
703da5a1
RV		 3012 /* Disable napi */
3013 if (vdev->config.intr_type != MSI_X)
3014 napi_disable(&vdev->napi);
3015 else {
3016 for (i = 0; i < vdev->no_of_vpath; i++)
3017 napi_disable(&vdev->vpaths[i].ring.napi);
3018 }
3019
3020 netif_carrier_off(vdev->ndev);
75f5e1c6 3021 netdev_notice(vdev->ndev, "Link Down\n");
d03848e0 3022 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 3023
3024 /* Note that at this point xmit() is stopped by upper layer */
3025 if (do_io)
3026 vxge_hw_device_intr_disable(vdev->devh);
3027
703da5a1
RV		 3028 vxge_rem_isr(vdev);
3029
3030 vxge_napi_del_all(vdev);
3031
3032 if (do_io)
3033 vxge_reset_all_vpaths(vdev);
3034
3035 vxge_close_vpaths(vdev, 0);
3036
3037 vxge_debug_entryexit(VXGE_TRACE,
3038 "%s: %s:%d Exiting...", dev->name, __func__, __LINE__);
3039
703da5a1
RV		 3040 clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
3041
3042 return 0;
3043}
3044
3045/**
3046 * vxge_close
3047 * @dev: device pointer.
3048 *
3049 * This is the stop entry point of the driver. It needs to undo exactly
3050 * whatever was done by the open entry point, thus it's usually referred to
3051 * as the close function.Among other things this function mainly stops the
3052 * Rx side of the NIC and frees all the Rx buffers in the Rx rings.
3053 * Return value: '0' on success and an appropriate (-)ve integer as
3054 * defined in errno.h file on failure.
3055 */
528f7272 3056static int vxge_close(struct net_device *dev)
703da5a1
RV		 3057{
3058 do_vxge_close(dev, 1);
3059 return 0;
3060}
3061
3062/**
3063 * vxge_change_mtu
3064 * @dev: net device pointer.
3065 * @new_mtu :the new MTU size for the device.
3066 *
3067 * A driver entry point to change MTU size for the device. Before changing
3068 * the MTU the device must be stopped.
3069 */
3070static int vxge_change_mtu(struct net_device *dev, int new_mtu)
3071{
3072 struct vxgedev *vdev = netdev_priv(dev);
3073
3074 vxge_debug_entryexit(vdev->level_trace,
3075 "%s:%d", __func__, __LINE__);
3076 if ((new_mtu < VXGE_HW_MIN_MTU) || (new_mtu > VXGE_HW_MAX_MTU)) {
3077 vxge_debug_init(vdev->level_err,
3078 "%s: mtu size is invalid", dev->name);
3079 return -EPERM;
3080 }
3081
3082 /* check if device is down already */
3083 if (unlikely(!is_vxge_card_up(vdev))) {
3084 /* just store new value, will use later on open() */
3085 dev->mtu = new_mtu;
3086 vxge_debug_init(vdev->level_err,
3087 "%s", "device is down on MTU change");
3088 return 0;
3089 }
3090
3091 vxge_debug_init(vdev->level_trace,
3092 "trying to apply new MTU %d", new_mtu);
3093
3094 if (vxge_close(dev))
3095 return -EIO;
3096
3097 dev->mtu = new_mtu;
3098 vdev->mtu = new_mtu;
3099
3100 if (vxge_open(dev))
3101 return -EIO;
3102
3103 vxge_debug_init(vdev->level_trace,
3104 "%s: MTU changed to %d", vdev->ndev->name, new_mtu);
3105
3106 vxge_debug_entryexit(vdev->level_trace,
3107 "%s:%d Exiting...", __func__, __LINE__);
3108
3109 return 0;
3110}
3111
3112/**
dd57f970 3113 * vxge_get_stats64
703da5a1 3114 * @dev: pointer to the device structure
dd57f970 3115 * @stats: pointer to struct rtnl_link_stats64
703da5a1 3116 *
703da5a1 3117 */
dd57f970
ED		 3118static struct rtnl_link_stats64 *
3119vxge_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *net_stats)
703da5a1 3120{
dd57f970 3121 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV		 3122 int k;
3123
dd57f970 3124 /* net_stats already zeroed by caller */
703da5a1
RV		 3125 for (k = 0; k < vdev->no_of_vpath; k++) {
3126 net_stats->rx_packets += vdev->vpaths[k].ring.stats.rx_frms;
3127 net_stats->rx_bytes += vdev->vpaths[k].ring.stats.rx_bytes;
3128 net_stats->rx_errors += vdev->vpaths[k].ring.stats.rx_errors;
3129 net_stats->multicast += vdev->vpaths[k].ring.stats.rx_mcast;
528f7272 3130 net_stats->rx_dropped += vdev->vpaths[k].ring.stats.rx_dropped;
703da5a1
RV		 3131 net_stats->tx_packets += vdev->vpaths[k].fifo.stats.tx_frms;
3132 net_stats->tx_bytes += vdev->vpaths[k].fifo.stats.tx_bytes;
3133 net_stats->tx_errors += vdev->vpaths[k].fifo.stats.tx_errors;
3134 }
3135
3136 return net_stats;
3137}
3138
cd883a79 3139static enum vxge_hw_status vxge_timestamp_config(struct __vxge_hw_device *devh)
b81b3733
JM		 3140{
3141 enum vxge_hw_status status;
3142 u64 val64;
3143
3144 /* Timestamp is passed to the driver via the FCS, therefore we
3145 * must disable the FCS stripping by the adapter. Since this is
3146 * required for the driver to load (due to a hardware bug),
3147 * there is no need to do anything special here.
3148 */
cd883a79
JM		 3149 val64 = VXGE_HW_XMAC_TIMESTAMP_EN |
3150 VXGE_HW_XMAC_TIMESTAMP_USE_LINK_ID(0) |
3151 VXGE_HW_XMAC_TIMESTAMP_INTERVAL(0);
b81b3733 3152
cd883a79 3153 status = vxge_hw_mgmt_reg_write(devh,
b81b3733
JM		 3154 vxge_hw_mgmt_reg_type_mrpcim,
3155 0,
3156 offsetof(struct vxge_hw_mrpcim_reg,
3157 xmac_timestamp),
3158 val64);
cd883a79
JM		 3159 vxge_hw_device_flush_io(devh);
3160 devh->config.hwts_en = VXGE_HW_HWTS_ENABLE;
b81b3733
JM		 3161 return status;
3162}
3163
3164static int vxge_hwtstamp_ioctl(struct vxgedev *vdev, void __user *data)
3165{
3166 struct hwtstamp_config config;
b81b3733
JM		 3167 int i;
3168
3169 if (copy_from_user(&config, data, sizeof(config)))
3170 return -EFAULT;
3171
3172 /* reserved for future extensions */
3173 if (config.flags)
3174 return -EINVAL;
3175
3176 /* Transmit HW Timestamp not supported */
3177 switch (config.tx_type) {
3178 case HWTSTAMP_TX_OFF:
3179 break;
3180 case HWTSTAMP_TX_ON:
3181 default:
3182 return -ERANGE;
3183 }
3184
3185 switch (config.rx_filter) {
3186 case HWTSTAMP_FILTER_NONE:
b81b3733
JM		 3187 vdev->rx_hwts = 0;
3188 config.rx_filter = HWTSTAMP_FILTER_NONE;
3189 break;
3190
3191 case HWTSTAMP_FILTER_ALL:
3192 case HWTSTAMP_FILTER_SOME:
3193 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3194 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3195 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3196 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3197 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3198 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3199 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3200 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3201 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3202 case HWTSTAMP_FILTER_PTP_V2_EVENT:
3203 case HWTSTAMP_FILTER_PTP_V2_SYNC:
3204 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
cd883a79 3205 if (vdev->devh->config.hwts_en != VXGE_HW_HWTS_ENABLE)
b81b3733
JM		 3206 return -EFAULT;
3207
3208 vdev->rx_hwts = 1;
3209 config.rx_filter = HWTSTAMP_FILTER_ALL;
3210 break;
3211
3212 default:
3213 return -ERANGE;
3214 }
3215
3216 for (i = 0; i < vdev->no_of_vpath; i++)
3217 vdev->vpaths[i].ring.rx_hwts = vdev->rx_hwts;
3218
3219 if (copy_to_user(data, &config, sizeof(config)))
3220 return -EFAULT;
3221
3222 return 0;
3223}
3224
703da5a1
RV		 3225/**
3226 * vxge_ioctl
3227 * @dev: Device pointer.
3228 * @ifr: An IOCTL specific structure, that can contain a pointer to
3229 * a proprietary structure used to pass information to the driver.
3230 * @cmd: This is used to distinguish between the different commands that
3231 * can be passed to the IOCTL functions.
3232 *
3233 * Entry point for the Ioctl.
3234 */
3235static int vxge_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3236{
b81b3733
JM		 3237 struct vxgedev *vdev = netdev_priv(dev);
3238 int ret;
3239
3240 switch (cmd) {
3241 case SIOCSHWTSTAMP:
3242 ret = vxge_hwtstamp_ioctl(vdev, rq->ifr_data);
3243 if (ret)
3244 return ret;
3245 break;
3246 default:
3247 return -EOPNOTSUPP;
3248 }
3249
3250 return 0;
703da5a1
RV		 3251}
3252
3253/**
3254 * vxge_tx_watchdog
3255 * @dev: pointer to net device structure
3256 *
3257 * Watchdog for transmit side.
3258 * This function is triggered if the Tx Queue is stopped
3259 * for a pre-defined amount of time when the Interface is still up.
3260 */
2e41f644 3261static void vxge_tx_watchdog(struct net_device *dev)
703da5a1
RV		 3262{
3263 struct vxgedev *vdev;
3264
3265 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
3266
5f54cebb 3267 vdev = netdev_priv(dev);
703da5a1
RV		 3268
3269 vdev->cric_err_event = VXGE_HW_EVENT_RESET_START;
3270
2e41f644 3271 schedule_work(&vdev->reset_task);
703da5a1
RV		 3272 vxge_debug_entryexit(VXGE_TRACE,
3273 "%s:%d Exiting...", __func__, __LINE__);
3274}
3275
3276/**
3277 * vxge_vlan_rx_register
3278 * @dev: net device pointer.
3279 * @grp: vlan group
3280 *
3281 * Vlan group registration
3282 */
3283static void
3284vxge_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
3285{
3286 struct vxgedev *vdev;
3287 struct vxge_vpath *vpath;
3288 int vp;
3289 u64 vid;
3290 enum vxge_hw_status status;
3291 int i;
3292
3293 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
3294
5f54cebb 3295 vdev = netdev_priv(dev);
703da5a1
RV		 3296
3297 vpath = &vdev->vpaths[0];
3298 if ((NULL == grp) && (vpath->is_open)) {
3299 /* Get the first vlan */
3300 status = vxge_hw_vpath_vid_get(vpath->handle, &vid);
3301
3302 while (status == VXGE_HW_OK) {
3303
3304 /* Delete this vlan from the vid table */
3305 for (vp = 0; vp < vdev->no_of_vpath; vp++) {
3306 vpath = &vdev->vpaths[vp];
3307 if (!vpath->is_open)
3308 continue;
3309
3310 vxge_hw_vpath_vid_delete(vpath->handle, vid);
3311 }
3312
3313 /* Get the next vlan to be deleted */
3314 vpath = &vdev->vpaths[0];
3315 status = vxge_hw_vpath_vid_get(vpath->handle, &vid);
3316 }
3317 }
3318
3319 vdev->vlgrp = grp;
3320
3321 for (i = 0; i < vdev->no_of_vpath; i++) {
3322 if (vdev->vpaths[i].is_configured)
3323 vdev->vpaths[i].ring.vlgrp = grp;
3324 }
3325
3326 vxge_debug_entryexit(VXGE_TRACE,
3327 "%s:%d Exiting...", __func__, __LINE__);
3328}
3329
3330/**
3331 * vxge_vlan_rx_add_vid
3332 * @dev: net device pointer.
3333 * @vid: vid
3334 *
3335 * Add the vlan id to the devices vlan id table
3336 */
3337static void
3338vxge_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
3339{
3340 struct vxgedev *vdev;
3341 struct vxge_vpath *vpath;
3342 int vp_id;
3343
5f54cebb 3344 vdev = netdev_priv(dev);
703da5a1
RV		 3345
3346 /* Add these vlan to the vid table */
3347 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
3348 vpath = &vdev->vpaths[vp_id];
3349 if (!vpath->is_open)
3350 continue;
3351 vxge_hw_vpath_vid_add(vpath->handle, vid);
3352 }
3353}
3354
3355/**
3356 * vxge_vlan_rx_add_vid
3357 * @dev: net device pointer.
3358 * @vid: vid
3359 *
3360 * Remove the vlan id from the device's vlan id table
3361 */
3362static void
3363vxge_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
3364{
3365 struct vxgedev *vdev;
3366 struct vxge_vpath *vpath;
3367 int vp_id;
3368
3369 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
3370
5f54cebb 3371 vdev = netdev_priv(dev);
703da5a1
RV		 3372
3373 vlan_group_set_device(vdev->vlgrp, vid, NULL);
3374
3375 /* Delete this vlan from the vid table */
3376 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
3377 vpath = &vdev->vpaths[vp_id];
3378 if (!vpath->is_open)
3379 continue;
3380 vxge_hw_vpath_vid_delete(vpath->handle, vid);
3381 }
3382 vxge_debug_entryexit(VXGE_TRACE,
3383 "%s:%d Exiting...", __func__, __LINE__);
3384}
3385
3386static const struct net_device_ops vxge_netdev_ops = {
3387 .ndo_open = vxge_open,
3388 .ndo_stop = vxge_close,
dd57f970 3389 .ndo_get_stats64 = vxge_get_stats64,
703da5a1
RV		 3390 .ndo_start_xmit = vxge_xmit,
3391 .ndo_validate_addr = eth_validate_addr,
3392 .ndo_set_multicast_list = vxge_set_multicast,
703da5a1 3393 .ndo_do_ioctl = vxge_ioctl,
703da5a1
RV		 3394 .ndo_set_mac_address = vxge_set_mac_addr,
3395 .ndo_change_mtu = vxge_change_mtu,
feb990d4
MM		 3396 .ndo_fix_features = vxge_fix_features,
3397 .ndo_set_features = vxge_set_features,
703da5a1
RV		 3398 .ndo_vlan_rx_register = vxge_vlan_rx_register,
3399 .ndo_vlan_rx_kill_vid = vxge_vlan_rx_kill_vid,
3400 .ndo_vlan_rx_add_vid = vxge_vlan_rx_add_vid,
703da5a1
RV		 3401 .ndo_tx_timeout = vxge_tx_watchdog,
3402#ifdef CONFIG_NET_POLL_CONTROLLER
3403 .ndo_poll_controller = vxge_netpoll,
3404#endif
3405};
3406
42821a5b 3407static int __devinit vxge_device_register(struct __vxge_hw_device *hldev,
3408 struct vxge_config *config,
3409 int high_dma, int no_of_vpath,
3410 struct vxgedev **vdev_out)
703da5a1
RV		 3411{
3412 struct net_device *ndev;
3413 enum vxge_hw_status status = VXGE_HW_OK;
3414 struct vxgedev *vdev;
98f45da2 3415 int ret = 0, no_of_queue = 1;
703da5a1
RV		 3416 u64 stat;
3417
3418 *vdev_out = NULL;
d03848e0 3419 if (config->tx_steering_type)
703da5a1
RV		 3420 no_of_queue = no_of_vpath;
3421
3422 ndev = alloc_etherdev_mq(sizeof(struct vxgedev),
3423 no_of_queue);
3424 if (ndev == NULL) {
3425 vxge_debug_init(
3426 vxge_hw_device_trace_level_get(hldev),
3427 "%s : device allocation failed", __func__);
3428 ret = -ENODEV;
3429 goto _out0;
3430 }
3431
3432 vxge_debug_entryexit(
3433 vxge_hw_device_trace_level_get(hldev),
3434 "%s: %s:%d Entering...",
3435 ndev->name, __func__, __LINE__);
3436
3437 vdev = netdev_priv(ndev);
3438 memset(vdev, 0, sizeof(struct vxgedev));
3439
3440 vdev->ndev = ndev;
3441 vdev->devh = hldev;
3442 vdev->pdev = hldev->pdev;
3443 memcpy(&vdev->config, config, sizeof(struct vxge_config));
b81b3733 3444 vdev->rx_hwts = 0;
ff938e43 3445 vdev->titan1 = (vdev->pdev->revision == VXGE_HW_TITAN1_PCI_REVISION);
e7935c96 3446
703da5a1
RV		 3447 SET_NETDEV_DEV(ndev, &vdev->pdev->dev);
3448
feb990d4
MM		 3449 ndev->hw_features = NETIF_F_RXCSUM | NETIF_F_SG |
3450 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
3451 NETIF_F_TSO | NETIF_F_TSO6 |
3452 NETIF_F_HW_VLAN_TX;
3453 if (vdev->config.rth_steering != NO_STEERING)
3454 ndev->hw_features |= NETIF_F_RXHASH;
3455
3456 ndev->features |= ndev->hw_features |
3457 NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER;
3458
703da5a1
RV		 3459 /* Driver entry points */
3460 ndev->irq = vdev->pdev->irq;
3461 ndev->base_addr = (unsigned long) hldev->bar0;
3462
3463 ndev->netdev_ops = &vxge_netdev_ops;
3464
3465 ndev->watchdog_timeo = VXGE_LL_WATCH_DOG_TIMEOUT;
2e41f644 3466 INIT_WORK(&vdev->reset_task, vxge_reset);
703da5a1 3467
42821a5b 3468 vxge_initialize_ethtool_ops(ndev);
703da5a1
RV		 3469
3470 /* Allocate memory for vpath */
3471 vdev->vpaths = kzalloc((sizeof(struct vxge_vpath)) *
3472 no_of_vpath, GFP_KERNEL);
3473 if (!vdev->vpaths) {
3474 vxge_debug_init(VXGE_ERR,
3475 "%s: vpath memory allocation failed",
3476 vdev->ndev->name);
6cca2003 3477 ret = -ENOMEM;
703da5a1
RV		 3478 goto _out1;
3479 }
3480
703da5a1
RV		 3481 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3482 "%s : checksuming enabled", __func__);
3483
3484 if (high_dma) {
3485 ndev->features |= NETIF_F_HIGHDMA;
3486 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3487 "%s : using High DMA", __func__);
3488 }
3489
6cca2003
JM		 3490 ret = register_netdev(ndev);
3491 if (ret) {
703da5a1
RV		 3492 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3493 "%s: %s : device registration failed!",
3494 ndev->name, __func__);
703da5a1
RV		 3495 goto _out2;
3496 }
3497
3498 /* Set the factory defined MAC address initially */
3499 ndev->addr_len = ETH_ALEN;
3500
3501 /* Make Link state as off at this point, when the Link change
3502 * interrupt comes the state will be automatically changed to
3503 * the right state.
3504 */
3505 netif_carrier_off(ndev);
3506
3507 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3508 "%s: Ethernet device registered",
3509 ndev->name);
3510
e8ac1756 3511 hldev->ndev = ndev;
703da5a1
RV		 3512 *vdev_out = vdev;
3513
3514 /* Resetting the Device stats */
3515 status = vxge_hw_mrpcim_stats_access(
3516 hldev,
3517 VXGE_HW_STATS_OP_CLEAR_ALL_STATS,
3518 0,
3519 0,
3520 &stat);
3521
3522 if (status == VXGE_HW_ERR_PRIVILAGED_OPEARATION)
3523 vxge_debug_init(
3524 vxge_hw_device_trace_level_get(hldev),
3525 "%s: device stats clear returns"
3526 "VXGE_HW_ERR_PRIVILAGED_OPEARATION", ndev->name);
3527
3528 vxge_debug_entryexit(vxge_hw_device_trace_level_get(hldev),
3529 "%s: %s:%d Exiting...",
3530 ndev->name, __func__, __LINE__);
3531
3532 return ret;
3533_out2:
3534 kfree(vdev->vpaths);
3535_out1:
3536 free_netdev(ndev);
3537_out0:
3538 return ret;
3539}
3540
3541/*
3542 * vxge_device_unregister
3543 *
3544 * This function will unregister and free network device
3545 */
2c91308f 3546static void vxge_device_unregister(struct __vxge_hw_device *hldev)
703da5a1
RV		 3547{
3548 struct vxgedev *vdev;
3549 struct net_device *dev;
3550 char buf[IFNAMSIZ];
703da5a1
RV		 3551
3552 dev = hldev->ndev;
3553 vdev = netdev_priv(dev);
703da5a1 3554
2c91308f
JM		 3555 vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d", vdev->ndev->name,
3556 __func__, __LINE__);
3557
ead5d238 3558 strncpy(buf, dev->name, IFNAMSIZ);
703da5a1 3559
ba27d85c
TH		 3560 flush_work_sync(&vdev->reset_task);
3561
703da5a1
RV		 3562 /* in 2.6 will call stop() if device is up */
3563 unregister_netdev(dev);
3564
6cca2003
JM		 3565 kfree(vdev->vpaths);
3566
3567 /* we are safe to free it now */
3568 free_netdev(dev);
3569
2c91308f
JM		 3570 vxge_debug_init(vdev->level_trace, "%s: ethernet device unregistered",
3571 buf);
3572 vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d Exiting...", buf,
3573 __func__, __LINE__);
703da5a1
RV		 3574}
3575
3576/*
3577 * vxge_callback_crit_err
3578 *
3579 * This function is called by the alarm handler in interrupt context.
3580 * Driver must analyze it based on the event type.
3581 */
3582static void
3583vxge_callback_crit_err(struct __vxge_hw_device *hldev,
3584 enum vxge_hw_event type, u64 vp_id)
3585{
3586 struct net_device *dev = hldev->ndev;
5f54cebb 3587 struct vxgedev *vdev = netdev_priv(dev);
98f45da2 3588 struct vxge_vpath *vpath = NULL;
703da5a1
RV		 3589 int vpath_idx;
3590
3591 vxge_debug_entryexit(vdev->level_trace,
3592 "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
3593
3594 /* Note: This event type should be used for device wide
3595 * indications only - Serious errors, Slot freeze and critical errors
3596 */
3597 vdev->cric_err_event = type;
3598
98f45da2
JM		 3599 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
3600 vpath = &vdev->vpaths[vpath_idx];
3601 if (vpath->device_id == vp_id)
703da5a1 3602 break;
98f45da2 3603 }
703da5a1
RV		 3604
3605 if (!test_bit(__VXGE_STATE_RESET_CARD, &vdev->state)) {
3606 if (type == VXGE_HW_EVENT_SLOT_FREEZE) {
3607 vxge_debug_init(VXGE_ERR,
3608 "%s: Slot is frozen", vdev->ndev->name);
3609 } else if (type == VXGE_HW_EVENT_SERR) {
3610 vxge_debug_init(VXGE_ERR,
3611 "%s: Encountered Serious Error",
3612 vdev->ndev->name);
3613 } else if (type == VXGE_HW_EVENT_CRITICAL_ERR)
3614 vxge_debug_init(VXGE_ERR,
3615 "%s: Encountered Critical Error",
3616 vdev->ndev->name);
3617 }
3618
3619 if ((type == VXGE_HW_EVENT_SERR) ||
3620 (type == VXGE_HW_EVENT_SLOT_FREEZE)) {
3621 if (unlikely(vdev->exec_mode))
3622 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3623 } else if (type == VXGE_HW_EVENT_CRITICAL_ERR) {
3624 vxge_hw_device_mask_all(hldev);
3625 if (unlikely(vdev->exec_mode))
3626 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3627 } else if ((type == VXGE_HW_EVENT_FIFO_ERR) ||
3628 (type == VXGE_HW_EVENT_VPATH_ERR)) {
3629
3630 if (unlikely(vdev->exec_mode))
3631 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3632 else {
3633 /* check if this vpath is already set for reset */
3634 if (!test_and_set_bit(vpath_idx, &vdev->vp_reset)) {
3635
3636 /* disable interrupts for this vpath */
3637 vxge_vpath_intr_disable(vdev, vpath_idx);
3638
3639 /* stop the queue for this vpath */
98f45da2 3640 netif_tx_stop_queue(vpath->fifo.txq);
703da5a1
RV		 3641 }
3642 }
3643 }
3644
3645 vxge_debug_entryexit(vdev->level_trace,
3646 "%s: %s:%d Exiting...",
3647 vdev->ndev->name, __func__, __LINE__);
3648}
3649
3650static void verify_bandwidth(void)
3651{
3652 int i, band_width, total = 0, equal_priority = 0;
3653
3654 /* 1. If user enters 0 for some fifo, give equal priority to all */
3655 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3656 if (bw_percentage[i] == 0) {
3657 equal_priority = 1;
3658 break;
3659 }
3660 }
3661
3662 if (!equal_priority) {
3663 /* 2. If sum exceeds 100, give equal priority to all */
3664 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3665 if (bw_percentage[i] == 0xFF)
3666 break;
3667
3668 total += bw_percentage[i];
3669 if (total > VXGE_HW_VPATH_BANDWIDTH_MAX) {
3670 equal_priority = 1;
3671 break;
3672 }
3673 }
3674 }
3675
3676 if (!equal_priority) {
3677 /* Is all the bandwidth consumed? */
3678 if (total < VXGE_HW_VPATH_BANDWIDTH_MAX) {
3679 if (i < VXGE_HW_MAX_VIRTUAL_PATHS) {
3680 /* Split rest of bw equally among next VPs*/
3681 band_width =
3682 (VXGE_HW_VPATH_BANDWIDTH_MAX - total) /
3683 (VXGE_HW_MAX_VIRTUAL_PATHS - i);
3684 if (band_width < 2) /* min of 2% */
3685 equal_priority = 1;
3686 else {
3687 for (; i < VXGE_HW_MAX_VIRTUAL_PATHS;
3688 i++)
3689 bw_percentage[i] =
3690 band_width;
3691 }
3692 }
3693 } else if (i < VXGE_HW_MAX_VIRTUAL_PATHS)
3694 equal_priority = 1;
3695 }
3696
3697 if (equal_priority) {
3698 vxge_debug_init(VXGE_ERR,
3699 "%s: Assigning equal bandwidth to all the vpaths",
3700 VXGE_DRIVER_NAME);
3701 bw_percentage[0] = VXGE_HW_VPATH_BANDWIDTH_MAX /
3702 VXGE_HW_MAX_VIRTUAL_PATHS;
3703 for (i = 1; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3704 bw_percentage[i] = bw_percentage[0];
3705 }
703da5a1
RV		 3706}
3707
3708/*
3709 * Vpath configuration
3710 */
3711static int __devinit vxge_config_vpaths(
3712 struct vxge_hw_device_config *device_config,
3713 u64 vpath_mask, struct vxge_config *config_param)
3714{
3715 int i, no_of_vpaths = 0, default_no_vpath = 0, temp;
3716 u32 txdl_size, txdl_per_memblock;
3717
3718 temp = driver_config->vpath_per_dev;
3719 if ((driver_config->vpath_per_dev == VXGE_USE_DEFAULT) &&
3720 (max_config_dev == VXGE_MAX_CONFIG_DEV)) {
3721 /* No more CPU. Return vpath number as zero.*/
3722 if (driver_config->g_no_cpus == -1)
3723 return 0;
3724
3725 if (!driver_config->g_no_cpus)
3726 driver_config->g_no_cpus = num_online_cpus();
3727
3728 driver_config->vpath_per_dev = driver_config->g_no_cpus >> 1;
3729 if (!driver_config->vpath_per_dev)
3730 driver_config->vpath_per_dev = 1;
3731
3732 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3733 if (!vxge_bVALn(vpath_mask, i, 1))
3734 continue;
3735 else
3736 default_no_vpath++;
3737 if (default_no_vpath < driver_config->vpath_per_dev)
3738 driver_config->vpath_per_dev = default_no_vpath;
3739
3740 driver_config->g_no_cpus = driver_config->g_no_cpus -
3741 (driver_config->vpath_per_dev * 2);
3742 if (driver_config->g_no_cpus <= 0)
3743 driver_config->g_no_cpus = -1;
3744 }
3745
3746 if (driver_config->vpath_per_dev == 1) {
3747 vxge_debug_ll_config(VXGE_TRACE,
3748 "%s: Disable tx and rx steering, "
3749 "as single vpath is configured", VXGE_DRIVER_NAME);
3750 config_param->rth_steering = NO_STEERING;
3751 config_param->tx_steering_type = NO_STEERING;
3752 device_config->rth_en = 0;
3753 }
3754
3755 /* configure bandwidth */
3756 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3757 device_config->vp_config[i].min_bandwidth = bw_percentage[i];
3758
3759 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3760 device_config->vp_config[i].vp_id = i;
3761 device_config->vp_config[i].mtu = VXGE_HW_DEFAULT_MTU;
3762 if (no_of_vpaths < driver_config->vpath_per_dev) {
3763 if (!vxge_bVALn(vpath_mask, i, 1)) {
3764 vxge_debug_ll_config(VXGE_TRACE,
3765 "%s: vpath: %d is not available",
3766 VXGE_DRIVER_NAME, i);
3767 continue;
3768 } else {
3769 vxge_debug_ll_config(VXGE_TRACE,
3770 "%s: vpath: %d available",
3771 VXGE_DRIVER_NAME, i);
3772 no_of_vpaths++;
3773 }
3774 } else {
3775 vxge_debug_ll_config(VXGE_TRACE,
3776 "%s: vpath: %d is not configured, "
3777 "max_config_vpath exceeded",
3778 VXGE_DRIVER_NAME, i);
3779 break;
3780 }
3781
3782 /* Configure Tx fifo's */
3783 device_config->vp_config[i].fifo.enable =
3784 VXGE_HW_FIFO_ENABLE;
3785 device_config->vp_config[i].fifo.max_frags =
5beefb4f 3786 MAX_SKB_FRAGS + 1;
703da5a1
RV		 3787 device_config->vp_config[i].fifo.memblock_size =
3788 VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE;
3789
5beefb4f
SH		 3790 txdl_size = device_config->vp_config[i].fifo.max_frags *
3791 sizeof(struct vxge_hw_fifo_txd);
703da5a1
RV		 3792 txdl_per_memblock = VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE / txdl_size;
3793
3794 device_config->vp_config[i].fifo.fifo_blocks =
3795 ((VXGE_DEF_FIFO_LENGTH - 1) / txdl_per_memblock) + 1;
3796
3797 device_config->vp_config[i].fifo.intr =
3798 VXGE_HW_FIFO_QUEUE_INTR_DISABLE;
3799
3800 /* Configure tti properties */
3801 device_config->vp_config[i].tti.intr_enable =
3802 VXGE_HW_TIM_INTR_ENABLE;
3803
3804 device_config->vp_config[i].tti.btimer_val =
3805 (VXGE_TTI_BTIMER_VAL * 1000) / 272;
3806
3807 device_config->vp_config[i].tti.timer_ac_en =
3808 VXGE_HW_TIM_TIMER_AC_ENABLE;
3809
528f7272
JM		 3810 /* For msi-x with napi (each vector has a handler of its own) -
3811 * Set CI to OFF for all vpaths
3812 */
703da5a1
RV		 3813 device_config->vp_config[i].tti.timer_ci_en =
3814 VXGE_HW_TIM_TIMER_CI_DISABLE;
3815
3816 device_config->vp_config[i].tti.timer_ri_en =
3817 VXGE_HW_TIM_TIMER_RI_DISABLE;
3818
3819 device_config->vp_config[i].tti.util_sel =
3820 VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL;
3821
3822 device_config->vp_config[i].tti.ltimer_val =
3823 (VXGE_TTI_LTIMER_VAL * 1000) / 272;
3824
3825 device_config->vp_config[i].tti.rtimer_val =
3826 (VXGE_TTI_RTIMER_VAL * 1000) / 272;
3827
3828 device_config->vp_config[i].tti.urange_a = TTI_TX_URANGE_A;
3829 device_config->vp_config[i].tti.urange_b = TTI_TX_URANGE_B;
3830 device_config->vp_config[i].tti.urange_c = TTI_TX_URANGE_C;
3831 device_config->vp_config[i].tti.uec_a = TTI_TX_UFC_A;
3832 device_config->vp_config[i].tti.uec_b = TTI_TX_UFC_B;
3833 device_config->vp_config[i].tti.uec_c = TTI_TX_UFC_C;
3834 device_config->vp_config[i].tti.uec_d = TTI_TX_UFC_D;
3835
3836 /* Configure Rx rings */
3837 device_config->vp_config[i].ring.enable =
3838 VXGE_HW_RING_ENABLE;
3839
3840 device_config->vp_config[i].ring.ring_blocks =
3841 VXGE_HW_DEF_RING_BLOCKS;
528f7272 3842
703da5a1
RV		 3843 device_config->vp_config[i].ring.buffer_mode =
3844 VXGE_HW_RING_RXD_BUFFER_MODE_1;
528f7272 3845
703da5a1
RV		 3846 device_config->vp_config[i].ring.rxds_limit =
3847 VXGE_HW_DEF_RING_RXDS_LIMIT;
528f7272 3848
703da5a1
RV		 3849 device_config->vp_config[i].ring.scatter_mode =
3850 VXGE_HW_RING_SCATTER_MODE_A;
3851
3852 /* Configure rti properties */
3853 device_config->vp_config[i].rti.intr_enable =
3854 VXGE_HW_TIM_INTR_ENABLE;
3855
3856 device_config->vp_config[i].rti.btimer_val =
3857 (VXGE_RTI_BTIMER_VAL * 1000)/272;
3858
3859 device_config->vp_config[i].rti.timer_ac_en =
3860 VXGE_HW_TIM_TIMER_AC_ENABLE;
3861
3862 device_config->vp_config[i].rti.timer_ci_en =
3863 VXGE_HW_TIM_TIMER_CI_DISABLE;
3864
3865 device_config->vp_config[i].rti.timer_ri_en =
3866 VXGE_HW_TIM_TIMER_RI_DISABLE;
3867
3868 device_config->vp_config[i].rti.util_sel =
3869 VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL;
3870
3871 device_config->vp_config[i].rti.urange_a =
3872 RTI_RX_URANGE_A;
3873 device_config->vp_config[i].rti.urange_b =
3874 RTI_RX_URANGE_B;
3875 device_config->vp_config[i].rti.urange_c =
3876 RTI_RX_URANGE_C;
3877 device_config->vp_config[i].rti.uec_a = RTI_RX_UFC_A;
3878 device_config->vp_config[i].rti.uec_b = RTI_RX_UFC_B;
3879 device_config->vp_config[i].rti.uec_c = RTI_RX_UFC_C;
3880 device_config->vp_config[i].rti.uec_d = RTI_RX_UFC_D;
3881
3882 device_config->vp_config[i].rti.rtimer_val =
3883 (VXGE_RTI_RTIMER_VAL * 1000) / 272;
3884
3885 device_config->vp_config[i].rti.ltimer_val =
3886 (VXGE_RTI_LTIMER_VAL * 1000) / 272;
3887
3888 device_config->vp_config[i].rpa_strip_vlan_tag =
3889 vlan_tag_strip;
3890 }
3891
3892 driver_config->vpath_per_dev = temp;
3893 return no_of_vpaths;
3894}
3895
3896/* initialize device configuratrions */
3897static void __devinit vxge_device_config_init(
3898 struct vxge_hw_device_config *device_config,
3899 int *intr_type)
3900{
3901 /* Used for CQRQ/SRQ. */
3902 device_config->dma_blockpool_initial =
3903 VXGE_HW_INITIAL_DMA_BLOCK_POOL_SIZE;
3904
3905 device_config->dma_blockpool_max =
3906 VXGE_HW_MAX_DMA_BLOCK_POOL_SIZE;
3907
3908 if (max_mac_vpath > VXGE_MAX_MAC_ADDR_COUNT)
3909 max_mac_vpath = VXGE_MAX_MAC_ADDR_COUNT;
3910
3911#ifndef CONFIG_PCI_MSI
3912 vxge_debug_init(VXGE_ERR,
3913 "%s: This Kernel does not support "
3914 "MSI-X. Defaulting to INTA", VXGE_DRIVER_NAME);
3915 *intr_type = INTA;
3916#endif
3917
3918 /* Configure whether MSI-X or IRQL. */
3919 switch (*intr_type) {
3920 case INTA:
3921 device_config->intr_mode = VXGE_HW_INTR_MODE_IRQLINE;
3922 break;
3923
3924 case MSI_X:
16fded7d 3925 device_config->intr_mode = VXGE_HW_INTR_MODE_MSIX_ONE_SHOT;
703da5a1
RV		 3926 break;
3927 }
528f7272 3928
703da5a1
RV		 3929 /* Timer period between device poll */
3930 device_config->device_poll_millis = VXGE_TIMER_DELAY;
3931
3932 /* Configure mac based steering. */
3933 device_config->rts_mac_en = addr_learn_en;
3934
3935 /* Configure Vpaths */
3936 device_config->rth_it_type = VXGE_HW_RTH_IT_TYPE_MULTI_IT;
3937
3938 vxge_debug_ll_config(VXGE_TRACE, "%s : Device Config Params ",
3939 __func__);
703da5a1
RV		 3940 vxge_debug_ll_config(VXGE_TRACE, "intr_mode : %d",
3941 device_config->intr_mode);
3942 vxge_debug_ll_config(VXGE_TRACE, "device_poll_millis : %d",
3943 device_config->device_poll_millis);
703da5a1
RV		 3944 vxge_debug_ll_config(VXGE_TRACE, "rth_en : %d",
3945 device_config->rth_en);
3946 vxge_debug_ll_config(VXGE_TRACE, "rth_it_type : %d",
3947 device_config->rth_it_type);
3948}
3949
3950static void __devinit vxge_print_parm(struct vxgedev *vdev, u64 vpath_mask)
3951{
3952 int i;
3953
3954 vxge_debug_init(VXGE_TRACE,
3955 "%s: %d Vpath(s) opened",
3956 vdev->ndev->name, vdev->no_of_vpath);
3957
3958 switch (vdev->config.intr_type) {
3959 case INTA:
3960 vxge_debug_init(VXGE_TRACE,
3961 "%s: Interrupt type INTA", vdev->ndev->name);
3962 break;
3963
3964 case MSI_X:
3965 vxge_debug_init(VXGE_TRACE,
3966 "%s: Interrupt type MSI-X", vdev->ndev->name);
3967 break;
3968 }
3969
3970 if (vdev->config.rth_steering) {
3971 vxge_debug_init(VXGE_TRACE,
3972 "%s: RTH steering enabled for TCP_IPV4",
3973 vdev->ndev->name);
3974 } else {
3975 vxge_debug_init(VXGE_TRACE,
3976 "%s: RTH steering disabled", vdev->ndev->name);
3977 }
3978
3979 switch (vdev->config.tx_steering_type) {
3980 case NO_STEERING:
3981 vxge_debug_init(VXGE_TRACE,
3982 "%s: Tx steering disabled", vdev->ndev->name);
3983 break;
3984 case TX_PRIORITY_STEERING:
3985 vxge_debug_init(VXGE_TRACE,
3986 "%s: Unsupported tx steering option",
3987 vdev->ndev->name);
3988 vxge_debug_init(VXGE_TRACE,
3989 "%s: Tx steering disabled", vdev->ndev->name);
3990 vdev->config.tx_steering_type = 0;
3991 break;
3992 case TX_VLAN_STEERING:
3993 vxge_debug_init(VXGE_TRACE,
3994 "%s: Unsupported tx steering option",
3995 vdev->ndev->name);
3996 vxge_debug_init(VXGE_TRACE,
3997 "%s: Tx steering disabled", vdev->ndev->name);
3998 vdev->config.tx_steering_type = 0;
3999 break;
4000 case TX_MULTIQ_STEERING:
4001 vxge_debug_init(VXGE_TRACE,
4002 "%s: Tx multiqueue steering enabled",
4003 vdev->ndev->name);
4004 break;
4005 case TX_PORT_STEERING:
4006 vxge_debug_init(VXGE_TRACE,
4007 "%s: Tx port steering enabled",
4008 vdev->ndev->name);
4009 break;
4010 default:
4011 vxge_debug_init(VXGE_ERR,
4012 "%s: Unsupported tx steering type",
4013 vdev->ndev->name);
4014 vxge_debug_init(VXGE_TRACE,
4015 "%s: Tx steering disabled", vdev->ndev->name);
4016 vdev->config.tx_steering_type = 0;
4017 }
4018
703da5a1
RV		 4019 if (vdev->config.addr_learn_en)
4020 vxge_debug_init(VXGE_TRACE,
4021 "%s: MAC Address learning enabled", vdev->ndev->name);
4022
703da5a1
RV		 4023 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
4024 if (!vxge_bVALn(vpath_mask, i, 1))
4025 continue;
4026 vxge_debug_ll_config(VXGE_TRACE,
4027 "%s: MTU size - %d", vdev->ndev->name,
4028 ((struct __vxge_hw_device *)(vdev->devh))->
4029 config.vp_config[i].mtu);
4030 vxge_debug_init(VXGE_TRACE,
4031 "%s: VLAN tag stripping %s", vdev->ndev->name,
4032 ((struct __vxge_hw_device *)(vdev->devh))->
4033 config.vp_config[i].rpa_strip_vlan_tag
4034 ? "Enabled" : "Disabled");
703da5a1
RV		 4035 vxge_debug_ll_config(VXGE_TRACE,
4036 "%s: Max frags : %d", vdev->ndev->name,
4037 ((struct __vxge_hw_device *)(vdev->devh))->
4038 config.vp_config[i].fifo.max_frags);
4039 break;
4040 }
4041}
4042
4043#ifdef CONFIG_PM
4044/**
4045 * vxge_pm_suspend - vxge power management suspend entry point
4046 *
4047 */
4048static int vxge_pm_suspend(struct pci_dev *pdev, pm_message_t state)
4049{
4050 return -ENOSYS;
4051}
4052/**
4053 * vxge_pm_resume - vxge power management resume entry point
4054 *
4055 */
4056static int vxge_pm_resume(struct pci_dev *pdev)
4057{
4058 return -ENOSYS;
4059}
4060
4061#endif
4062
4063/**
4064 * vxge_io_error_detected - called when PCI error is detected
4065 * @pdev: Pointer to PCI device
4066 * @state: The current pci connection state
4067 *
4068 * This function is called after a PCI bus error affecting
4069 * this device has been detected.
4070 */
4071static pci_ers_result_t vxge_io_error_detected(struct pci_dev *pdev,
4072 pci_channel_state_t state)
4073{
d8ee7071 4074 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
703da5a1
RV		 4075 struct net_device *netdev = hldev->ndev;
4076
4077 netif_device_detach(netdev);
4078
e33b992d
DN		 4079 if (state == pci_channel_io_perm_failure)
4080 return PCI_ERS_RESULT_DISCONNECT;
4081
703da5a1
RV		 4082 if (netif_running(netdev)) {
4083 /* Bring down the card, while avoiding PCI I/O */
4084 do_vxge_close(netdev, 0);
4085 }
4086
4087 pci_disable_device(pdev);
4088
4089 return PCI_ERS_RESULT_NEED_RESET;
4090}
4091
4092/**
4093 * vxge_io_slot_reset - called after the pci bus has been reset.
4094 * @pdev: Pointer to PCI device
4095 *
4096 * Restart the card from scratch, as if from a cold-boot.
4097 * At this point, the card has exprienced a hard reset,
4098 * followed by fixups by BIOS, and has its config space
4099 * set up identically to what it was at cold boot.
4100 */
4101static pci_ers_result_t vxge_io_slot_reset(struct pci_dev *pdev)
4102{
d8ee7071 4103 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
703da5a1
RV		 4104 struct net_device *netdev = hldev->ndev;
4105
4106 struct vxgedev *vdev = netdev_priv(netdev);
4107
4108 if (pci_enable_device(pdev)) {
75f5e1c6 4109 netdev_err(netdev, "Cannot re-enable device after reset\n");
703da5a1
RV		 4110 return PCI_ERS_RESULT_DISCONNECT;
4111 }
4112
4113 pci_set_master(pdev);
528f7272 4114 do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
703da5a1
RV		 4115
4116 return PCI_ERS_RESULT_RECOVERED;
4117}
4118
4119/**
4120 * vxge_io_resume - called when traffic can start flowing again.
4121 * @pdev: Pointer to PCI device
4122 *
4123 * This callback is called when the error recovery driver tells
4124 * us that its OK to resume normal operation.
4125 */
4126static void vxge_io_resume(struct pci_dev *pdev)
4127{
d8ee7071 4128 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
703da5a1
RV		 4129 struct net_device *netdev = hldev->ndev;
4130
4131 if (netif_running(netdev)) {
4132 if (vxge_open(netdev)) {
75f5e1c6
JP		 4133 netdev_err(netdev,
4134 "Can't bring device back up after reset\n");
703da5a1
RV		 4135 return;
4136 }
4137 }
4138
4139 netif_device_attach(netdev);
4140}
4141
cb27ec60
SH		 4142static inline u32 vxge_get_num_vfs(u64 function_mode)
4143{
4144 u32 num_functions = 0;
4145
4146 switch (function_mode) {
4147 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
4148 case VXGE_HW_FUNCTION_MODE_SRIOV_8:
4149 num_functions = 8;
4150 break;
4151 case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
4152 num_functions = 1;
4153 break;
4154 case VXGE_HW_FUNCTION_MODE_SRIOV:
4155 case VXGE_HW_FUNCTION_MODE_MRIOV:
4156 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_17:
4157 num_functions = 17;
4158 break;
4159 case VXGE_HW_FUNCTION_MODE_SRIOV_4:
4160 num_functions = 4;
4161 break;
4162 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_2:
4163 num_functions = 2;
4164 break;
4165 case VXGE_HW_FUNCTION_MODE_MRIOV_8:
4166 num_functions = 8; /* TODO */
4167 break;
4168 }
4169 return num_functions;
4170}
4171
e8ac1756
JM		 4172int vxge_fw_upgrade(struct vxgedev *vdev, char *fw_name, int override)
4173{
4174 struct __vxge_hw_device *hldev = vdev->devh;
4175 u32 maj, min, bld, cmaj, cmin, cbld;
4176 enum vxge_hw_status status;
4177 const struct firmware *fw;
4178 int ret;
4179
4180 ret = request_firmware(&fw, fw_name, &vdev->pdev->dev);
4181 if (ret) {
4182 vxge_debug_init(VXGE_ERR, "%s: Firmware file '%s' not found",
4183 VXGE_DRIVER_NAME, fw_name);
4184 goto out;
4185 }
4186
4187 /* Load the new firmware onto the adapter */
4188 status = vxge_update_fw_image(hldev, fw->data, fw->size);
4189 if (status != VXGE_HW_OK) {
4190 vxge_debug_init(VXGE_ERR,
4191 "%s: FW image download to adapter failed '%s'.",
4192 VXGE_DRIVER_NAME, fw_name);
4193 ret = -EIO;
4194 goto out;
4195 }
4196
4197 /* Read the version of the new firmware */
4198 status = vxge_hw_upgrade_read_version(hldev, &maj, &min, &bld);
4199 if (status != VXGE_HW_OK) {
4200 vxge_debug_init(VXGE_ERR,
4201 "%s: Upgrade read version failed '%s'.",
4202 VXGE_DRIVER_NAME, fw_name);
4203 ret = -EIO;
4204 goto out;
4205 }
4206
4207 cmaj = vdev->config.device_hw_info.fw_version.major;
4208 cmin = vdev->config.device_hw_info.fw_version.minor;
4209 cbld = vdev->config.device_hw_info.fw_version.build;
4210 /* It's possible the version in /lib/firmware is not the latest version.
4211 * If so, we could get into a loop of trying to upgrade to the latest
4212 * and flashing the older version.
4213 */
4214 if (VXGE_FW_VER(maj, min, bld) == VXGE_FW_VER(cmaj, cmin, cbld) &&
4215 !override) {
4216 ret = -EINVAL;
4217 goto out;
4218 }
4219
4220 printk(KERN_NOTICE "Upgrade to firmware version %d.%d.%d commencing\n",
4221 maj, min, bld);
4222
4223 /* Flash the adapter with the new firmware */
4224 status = vxge_hw_flash_fw(hldev);
4225 if (status != VXGE_HW_OK) {
4226 vxge_debug_init(VXGE_ERR, "%s: Upgrade commit failed '%s'.",
4227 VXGE_DRIVER_NAME, fw_name);
4228 ret = -EIO;
4229 goto out;
4230 }
4231
4232 printk(KERN_NOTICE "Upgrade of firmware successful! Adapter must be "
4233 "hard reset before using, thus requiring a system reboot or a "
4234 "hotplug event.\n");
4235
4236out:
e84f885e 4237 release_firmware(fw);
e8ac1756
JM		 4238 return ret;
4239}
4240
4241static int vxge_probe_fw_update(struct vxgedev *vdev)
4242{
4243 u32 maj, min, bld;
4244 int ret, gpxe = 0;
4245 char *fw_name;
4246
4247 maj = vdev->config.device_hw_info.fw_version.major;
4248 min = vdev->config.device_hw_info.fw_version.minor;
4249 bld = vdev->config.device_hw_info.fw_version.build;
4250
4251 if (VXGE_FW_VER(maj, min, bld) == VXGE_CERT_FW_VER)
4252 return 0;
4253
4254 /* Ignore the build number when determining if the current firmware is
4255 * "too new" to load the driver
4256 */
4257 if (VXGE_FW_VER(maj, min, 0) > VXGE_CERT_FW_VER) {
4258 vxge_debug_init(VXGE_ERR, "%s: Firmware newer than last known "
4259 "version, unable to load driver\n",
4260 VXGE_DRIVER_NAME);
4261 return -EINVAL;
4262 }
4263
4264 /* Firmware 1.4.4 and older cannot be upgraded, and is too ancient to
4265 * work with this driver.
4266 */
4267 if (VXGE_FW_VER(maj, min, bld) <= VXGE_FW_DEAD_VER) {
4268 vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d cannot be "
4269 "upgraded\n", VXGE_DRIVER_NAME, maj, min, bld);
4270 return -EINVAL;
4271 }
4272
4273 /* If file not specified, determine gPXE or not */
4274 if (VXGE_FW_VER(maj, min, bld) >= VXGE_EPROM_FW_VER) {
4275 int i;
4276 for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++)
4277 if (vdev->devh->eprom_versions[i]) {
4278 gpxe = 1;
4279 break;
4280 }
4281 }
4282 if (gpxe)
4283 fw_name = "vxge/X3fw-pxe.ncf";
4284 else
4285 fw_name = "vxge/X3fw.ncf";
4286
4287 ret = vxge_fw_upgrade(vdev, fw_name, 0);
4288 /* -EINVAL and -ENOENT are not fatal errors for flashing firmware on
4289 * probe, so ignore them
4290 */
4291 if (ret != -EINVAL && ret != -ENOENT)
4292 return -EIO;
4293 else
4294 ret = 0;
4295
4296 if (VXGE_FW_VER(VXGE_CERT_FW_VER_MAJOR, VXGE_CERT_FW_VER_MINOR, 0) >
4297 VXGE_FW_VER(maj, min, 0)) {
4298 vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d is too old to"
4299 " be used with this driver.\n"
4300 "Please get the latest version from "
4301 "ftp://ftp.s2io.com/pub/X3100-Drivers/FIRMWARE",
4302 VXGE_DRIVER_NAME, maj, min, bld);
4303 return -EINVAL;
4304 }
4305
4306 return ret;
4307}
4308
c92bf70d
JM		 4309static int __devinit is_sriov_initialized(struct pci_dev *pdev)
4310{
4311 int pos;
4312 u16 ctrl;
4313
4314 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
4315 if (pos) {
4316 pci_read_config_word(pdev, pos + PCI_SRIOV_CTRL, &ctrl);
4317 if (ctrl & PCI_SRIOV_CTRL_VFE)
4318 return 1;
4319 }
4320 return 0;
4321}
4322
703da5a1
RV		 4323/**
4324 * vxge_probe
4325 * @pdev : structure containing the PCI related information of the device.
4326 * @pre: List of PCI devices supported by the driver listed in vxge_id_table.
4327 * Description:
4328 * This function is called when a new PCI device gets detected and initializes
4329 * it.
4330 * Return value:
4331 * returns 0 on success and negative on failure.
4332 *
4333 */
4334static int __devinit
4335vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre)
4336{
2c91308f 4337 struct __vxge_hw_device *hldev;
703da5a1
RV		 4338 enum vxge_hw_status status;
4339 int ret;
4340 int high_dma = 0;
4341 u64 vpath_mask = 0;
4342 struct vxgedev *vdev;
7dad171c 4343 struct vxge_config *ll_config = NULL;
703da5a1
RV		 4344 struct vxge_hw_device_config *device_config = NULL;
4345 struct vxge_hw_device_attr attr;
4346 int i, j, no_of_vpath = 0, max_vpath_supported = 0;
4347 u8 *macaddr;
4348 struct vxge_mac_addrs *entry;
4349 static int bus = -1, device = -1;
cb27ec60 4350 u32 host_type;
703da5a1 4351 u8 new_device = 0;
cb27ec60
SH		 4352 enum vxge_hw_status is_privileged;
4353 u32 function_mode;
4354 u32 num_vfs = 0;
703da5a1
RV		 4355
4356 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
4357 attr.pdev = pdev;
4358
cb27ec60 4359 /* In SRIOV-17 mode, functions of the same adapter
528f7272
JM		 4360 * can be deployed on different buses
4361 */
4362 if (((bus != pdev->bus->number) || (device != PCI_SLOT(pdev->devfn))) &&
4363 !pdev->is_virtfn)
703da5a1
RV		 4364 new_device = 1;
4365
4366 bus = pdev->bus->number;
4367 device = PCI_SLOT(pdev->devfn);
4368
4369 if (new_device) {
4370 if (driver_config->config_dev_cnt &&
4371 (driver_config->config_dev_cnt !=
4372 driver_config->total_dev_cnt))
4373 vxge_debug_init(VXGE_ERR,
4374 "%s: Configured %d of %d devices",
4375 VXGE_DRIVER_NAME,
4376 driver_config->config_dev_cnt,
4377 driver_config->total_dev_cnt);
4378 driver_config->config_dev_cnt = 0;
4379 driver_config->total_dev_cnt = 0;
703da5a1 4380 }
528f7272 4381
9002397e
SH		 4382 /* Now making the CPU based no of vpath calculation
4383 * applicable for individual functions as well.
4384 */
4385 driver_config->g_no_cpus = 0;
657205bd
SH		 4386 driver_config->vpath_per_dev = max_config_vpath;
4387
703da5a1
RV		 4388 driver_config->total_dev_cnt++;
4389 if (++driver_config->config_dev_cnt > max_config_dev) {
4390 ret = 0;
4391 goto _exit0;
4392 }
4393
4394 device_config = kzalloc(sizeof(struct vxge_hw_device_config),
4395 GFP_KERNEL);
4396 if (!device_config) {
4397 ret = -ENOMEM;
4398 vxge_debug_init(VXGE_ERR,
4399 "device_config : malloc failed %s %d",
4400 __FILE__, __LINE__);
4401 goto _exit0;
4402 }
4403
528f7272 4404 ll_config = kzalloc(sizeof(struct vxge_config), GFP_KERNEL);
7dad171c
PB		 4405 if (!ll_config) {
4406 ret = -ENOMEM;
4407 vxge_debug_init(VXGE_ERR,
528f7272 4408 "device_config : malloc failed %s %d",
7dad171c
PB		 4409 __FILE__, __LINE__);
4410 goto _exit0;
4411 }
4412 ll_config->tx_steering_type = TX_MULTIQ_STEERING;
4413 ll_config->intr_type = MSI_X;
4414 ll_config->napi_weight = NEW_NAPI_WEIGHT;
4415 ll_config->rth_steering = RTH_STEERING;
703da5a1
RV		 4416
4417 /* get the default configuration parameters */
4418 vxge_hw_device_config_default_get(device_config);
4419
4420 /* initialize configuration parameters */
7dad171c 4421 vxge_device_config_init(device_config, &ll_config->intr_type);
703da5a1
RV		 4422
4423 ret = pci_enable_device(pdev);
4424 if (ret) {
4425 vxge_debug_init(VXGE_ERR,
4426 "%s : can not enable PCI device", __func__);
4427 goto _exit0;
4428 }
4429
b3837cec 4430 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
703da5a1
RV		 4431 vxge_debug_ll_config(VXGE_TRACE,
4432 "%s : using 64bit DMA", __func__);
4433
4434 high_dma = 1;
4435
4436 if (pci_set_consistent_dma_mask(pdev,
b3837cec 4437 DMA_BIT_MASK(64))) {
703da5a1
RV		 4438 vxge_debug_init(VXGE_ERR,
4439 "%s : unable to obtain 64bit DMA for "
4440 "consistent allocations", __func__);
4441 ret = -ENOMEM;
4442 goto _exit1;
4443 }
b3837cec 4444 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
703da5a1
RV		 4445 vxge_debug_ll_config(VXGE_TRACE,
4446 "%s : using 32bit DMA", __func__);
4447 } else {
4448 ret = -ENOMEM;
4449 goto _exit1;
4450 }
4451
6cca2003
JM		 4452 ret = pci_request_region(pdev, 0, VXGE_DRIVER_NAME);
4453 if (ret) {
703da5a1
RV		 4454 vxge_debug_init(VXGE_ERR,
4455 "%s : request regions failed", __func__);
703da5a1
RV		 4456 goto _exit1;
4457 }
4458
4459 pci_set_master(pdev);
4460
4461 attr.bar0 = pci_ioremap_bar(pdev, 0);
4462 if (!attr.bar0) {
4463 vxge_debug_init(VXGE_ERR,
4464 "%s : cannot remap io memory bar0", __func__);
4465 ret = -ENODEV;
4466 goto _exit2;
4467 }
4468 vxge_debug_ll_config(VXGE_TRACE,
4469 "pci ioremap bar0: %p:0x%llx",
4470 attr.bar0,
4471 (unsigned long long)pci_resource_start(pdev, 0));
4472
703da5a1 4473 status = vxge_hw_device_hw_info_get(attr.bar0,
7dad171c 4474 &ll_config->device_hw_info);
703da5a1
RV		 4475 if (status != VXGE_HW_OK) {
4476 vxge_debug_init(VXGE_ERR,
4477 "%s: Reading of hardware info failed."
4478 "Please try upgrading the firmware.", VXGE_DRIVER_NAME);
4479 ret = -EINVAL;
7975d1ee 4480 goto _exit3;
703da5a1
RV		 4481 }
4482
7dad171c 4483 vpath_mask = ll_config->device_hw_info.vpath_mask;
703da5a1
RV		 4484 if (vpath_mask == 0) {
4485 vxge_debug_ll_config(VXGE_TRACE,
4486 "%s: No vpaths available in device", VXGE_DRIVER_NAME);
4487 ret = -EINVAL;
7975d1ee 4488 goto _exit3;
703da5a1
RV		 4489 }
4490
4491 vxge_debug_ll_config(VXGE_TRACE,
4492 "%s:%d Vpath mask = %llx", __func__, __LINE__,
4493 (unsigned long long)vpath_mask);
4494
7dad171c
PB		 4495 function_mode = ll_config->device_hw_info.function_mode;
4496 host_type = ll_config->device_hw_info.host_type;
cb27ec60 4497 is_privileged = __vxge_hw_device_is_privilaged(host_type,
7dad171c 4498 ll_config->device_hw_info.func_id);
cb27ec60 4499
703da5a1
RV		 4500 /* Check how many vpaths are available */
4501 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
4502 if (!((vpath_mask) & vxge_mBIT(i)))
4503 continue;
4504 max_vpath_supported++;
4505 }
4506
cb27ec60
SH		 4507 if (new_device)
4508 num_vfs = vxge_get_num_vfs(function_mode) - 1;
4509
5dbc9011 4510 /* Enable SRIOV mode, if firmware has SRIOV support and if it is a PF */
c92bf70d
JM		 4511 if (is_sriov(function_mode) && !is_sriov_initialized(pdev) &&
4512 (ll_config->intr_type != INTA)) {
4513 ret = pci_enable_sriov(pdev, num_vfs);
cb27ec60
SH		 4514 if (ret)
4515 vxge_debug_ll_config(VXGE_ERR,
4516 "Failed in enabling SRIOV mode: %d\n", ret);
c92bf70d 4517 /* No need to fail out, as an error here is non-fatal */
5dbc9011
SS		 4518 }
4519
703da5a1
RV		 4520 /*
4521 * Configure vpaths and get driver configured number of vpaths
4522 * which is less than or equal to the maximum vpaths per function.
4523 */
7dad171c 4524 no_of_vpath = vxge_config_vpaths(device_config, vpath_mask, ll_config);
703da5a1
RV		 4525 if (!no_of_vpath) {
4526 vxge_debug_ll_config(VXGE_ERR,
4527 "%s: No more vpaths to configure", VXGE_DRIVER_NAME);
4528 ret = 0;
7975d1ee 4529 goto _exit3;
703da5a1
RV		 4530 }
4531
4532 /* Setting driver callbacks */
4533 attr.uld_callbacks.link_up = vxge_callback_link_up;
4534 attr.uld_callbacks.link_down = vxge_callback_link_down;
4535 attr.uld_callbacks.crit_err = vxge_callback_crit_err;
4536
4537 status = vxge_hw_device_initialize(&hldev, &attr, device_config);
4538 if (status != VXGE_HW_OK) {
4539 vxge_debug_init(VXGE_ERR,
4540 "Failed to initialize device (%d)", status);
4541 ret = -EINVAL;
7975d1ee 4542 goto _exit3;
703da5a1
RV		 4543 }
4544
e8ac1756
JM		 4545 if (VXGE_FW_VER(ll_config->device_hw_info.fw_version.major,
4546 ll_config->device_hw_info.fw_version.minor,
4547 ll_config->device_hw_info.fw_version.build) >=
4548 VXGE_EPROM_FW_VER) {
4549 struct eprom_image img[VXGE_HW_MAX_ROM_IMAGES];
4550
4551 status = vxge_hw_vpath_eprom_img_ver_get(hldev, img);
4552 if (status != VXGE_HW_OK) {
4553 vxge_debug_init(VXGE_ERR, "%s: Reading of EPROM failed",
4554 VXGE_DRIVER_NAME);
4555 /* This is a non-fatal error, continue */
4556 }
4557
4558 for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++) {
4559 hldev->eprom_versions[i] = img[i].version;
4560 if (!img[i].is_valid)
4561 break;
4562 vxge_debug_init(VXGE_TRACE, "%s: EPROM %d, version "
1d15f81c 4563 "%d.%d.%d.%d", VXGE_DRIVER_NAME, i,
e8ac1756
JM		 4564 VXGE_EPROM_IMG_MAJOR(img[i].version),
4565 VXGE_EPROM_IMG_MINOR(img[i].version),
4566 VXGE_EPROM_IMG_FIX(img[i].version),
4567 VXGE_EPROM_IMG_BUILD(img[i].version));
4568 }
4569 }
4570
fa41fd10 4571 /* if FCS stripping is not disabled in MAC fail driver load */
b81b3733
JM		 4572 status = vxge_hw_vpath_strip_fcs_check(hldev, vpath_mask);
4573 if (status != VXGE_HW_OK) {
4574 vxge_debug_init(VXGE_ERR, "%s: FCS stripping is enabled in MAC"
4575 " failing driver load", VXGE_DRIVER_NAME);
fa41fd10
SH		 4576 ret = -EINVAL;
4577 goto _exit4;
4578 }
4579
cd883a79
JM		 4580 /* Always enable HWTS. This will always cause the FCS to be invalid,
4581 * due to the fact that HWTS is using the FCS as the location of the
4582 * timestamp. The HW FCS checking will still correctly determine if
4583 * there is a valid checksum, and the FCS is being removed by the driver
4584 * anyway. So no fucntionality is being lost. Since it is always
4585 * enabled, we now simply use the ioctl call to set whether or not the
4586 * driver should be paying attention to the HWTS.
4587 */
4588 if (is_privileged == VXGE_HW_OK) {
4589 status = vxge_timestamp_config(hldev);
4590 if (status != VXGE_HW_OK) {
4591 vxge_debug_init(VXGE_ERR, "%s: HWTS enable failed",
4592 VXGE_DRIVER_NAME);
4593 ret = -EFAULT;
4594 goto _exit4;
4595 }
4596 }
4597
703da5a1
RV		 4598 vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
4599
4600 /* set private device info */
4601 pci_set_drvdata(pdev, hldev);
4602
7dad171c
PB		 4603 ll_config->fifo_indicate_max_pkts = VXGE_FIFO_INDICATE_MAX_PKTS;
4604 ll_config->addr_learn_en = addr_learn_en;
4605 ll_config->rth_algorithm = RTH_ALG_JENKINS;
47f01db4
JM		 4606 ll_config->rth_hash_type_tcpipv4 = 1;
4607 ll_config->rth_hash_type_ipv4 = 0;
4608 ll_config->rth_hash_type_tcpipv6 = 0;
4609 ll_config->rth_hash_type_ipv6 = 0;
4610 ll_config->rth_hash_type_tcpipv6ex = 0;
4611 ll_config->rth_hash_type_ipv6ex = 0;
7dad171c
PB		 4612 ll_config->rth_bkt_sz = RTH_BUCKET_SIZE;
4613 ll_config->tx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
4614 ll_config->rx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
4615
e8ac1756
JM		 4616 ret = vxge_device_register(hldev, ll_config, high_dma, no_of_vpath,
4617 &vdev);
4618 if (ret) {
703da5a1 4619 ret = -EINVAL;
7975d1ee 4620 goto _exit4;
703da5a1
RV		 4621 }
4622
e8ac1756
JM		 4623 ret = vxge_probe_fw_update(vdev);
4624 if (ret)
4625 goto _exit5;
4626
703da5a1
RV		 4627 vxge_hw_device_debug_set(hldev, VXGE_TRACE, VXGE_COMPONENT_LL);
4628 VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
4629 vxge_hw_device_trace_level_get(hldev));
4630
4631 /* set private HW device info */
703da5a1
RV		 4632 vdev->mtu = VXGE_HW_DEFAULT_MTU;
4633 vdev->bar0 = attr.bar0;
703da5a1
RV		 4634 vdev->max_vpath_supported = max_vpath_supported;
4635 vdev->no_of_vpath = no_of_vpath;
4636
4637 /* Virtual Path count */
4638 for (i = 0, j = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
4639 if (!vxge_bVALn(vpath_mask, i, 1))
4640 continue;
4641 if (j >= vdev->no_of_vpath)
4642 break;
4643
4644 vdev->vpaths[j].is_configured = 1;
4645 vdev->vpaths[j].device_id = i;
703da5a1
RV		 4646 vdev->vpaths[j].ring.driver_id = j;
4647 vdev->vpaths[j].vdev = vdev;
4648 vdev->vpaths[j].max_mac_addr_cnt = max_mac_vpath;
4649 memcpy((u8 *)vdev->vpaths[j].macaddr,
7dad171c 4650 ll_config->device_hw_info.mac_addrs[i],
703da5a1
RV		 4651 ETH_ALEN);
4652
4653 /* Initialize the mac address list header */
4654 INIT_LIST_HEAD(&vdev->vpaths[j].mac_addr_list);
4655
4656 vdev->vpaths[j].mac_addr_cnt = 0;
4657 vdev->vpaths[j].mcast_addr_cnt = 0;
4658 j++;
4659 }
4660 vdev->exec_mode = VXGE_EXEC_MODE_DISABLE;
4661 vdev->max_config_port = max_config_port;
4662
4663 vdev->vlan_tag_strip = vlan_tag_strip;
4664
4665 /* map the hashing selector table to the configured vpaths */
4666 for (i = 0; i < vdev->no_of_vpath; i++)
4667 vdev->vpath_selector[i] = vpath_selector[i];
4668
4669 macaddr = (u8 *)vdev->vpaths[0].macaddr;
4670
7dad171c
PB		 4671 ll_config->device_hw_info.serial_number[VXGE_HW_INFO_LEN - 1] = '\0';
4672 ll_config->device_hw_info.product_desc[VXGE_HW_INFO_LEN - 1] = '\0';
4673 ll_config->device_hw_info.part_number[VXGE_HW_INFO_LEN - 1] = '\0';
703da5a1
RV		 4674
4675 vxge_debug_init(VXGE_TRACE, "%s: SERIAL NUMBER: %s",
7dad171c 4676 vdev->ndev->name, ll_config->device_hw_info.serial_number);
703da5a1
RV		 4677
4678 vxge_debug_init(VXGE_TRACE, "%s: PART NUMBER: %s",
7dad171c 4679 vdev->ndev->name, ll_config->device_hw_info.part_number);
703da5a1
RV		 4680
4681 vxge_debug_init(VXGE_TRACE, "%s: Neterion %s Server Adapter",
7dad171c 4682 vdev->ndev->name, ll_config->device_hw_info.product_desc);
703da5a1 4683
bf54e736 4684 vxge_debug_init(VXGE_TRACE, "%s: MAC ADDR: %pM",
4685 vdev->ndev->name, macaddr);
703da5a1
RV		 4686
4687 vxge_debug_init(VXGE_TRACE, "%s: Link Width x%d",
4688 vdev->ndev->name, vxge_hw_device_link_width_get(hldev));
4689
4690 vxge_debug_init(VXGE_TRACE,
4691 "%s: Firmware version : %s Date : %s", vdev->ndev->name,
7dad171c
PB		 4692 ll_config->device_hw_info.fw_version.version,
4693 ll_config->device_hw_info.fw_date.date);
703da5a1 4694
0a25bdc6 4695 if (new_device) {
7dad171c 4696 switch (ll_config->device_hw_info.function_mode) {
0a25bdc6
SH		 4697 case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
4698 vxge_debug_init(VXGE_TRACE,
4699 "%s: Single Function Mode Enabled", vdev->ndev->name);
4700 break;
4701 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
4702 vxge_debug_init(VXGE_TRACE,
4703 "%s: Multi Function Mode Enabled", vdev->ndev->name);
4704 break;
4705 case VXGE_HW_FUNCTION_MODE_SRIOV:
4706 vxge_debug_init(VXGE_TRACE,
4707 "%s: Single Root IOV Mode Enabled", vdev->ndev->name);
4708 break;
4709 case VXGE_HW_FUNCTION_MODE_MRIOV:
4710 vxge_debug_init(VXGE_TRACE,
4711 "%s: Multi Root IOV Mode Enabled", vdev->ndev->name);
4712 break;
4713 }
4714 }
4715
703da5a1
RV		 4716 vxge_print_parm(vdev, vpath_mask);
4717
4718 /* Store the fw version for ethttool option */
7dad171c 4719 strcpy(vdev->fw_version, ll_config->device_hw_info.fw_version.version);
703da5a1
RV		 4720 memcpy(vdev->ndev->dev_addr, (u8 *)vdev->vpaths[0].macaddr, ETH_ALEN);
4721 memcpy(vdev->ndev->perm_addr, vdev->ndev->dev_addr, ETH_ALEN);
4722
4723 /* Copy the station mac address to the list */
4724 for (i = 0; i < vdev->no_of_vpath; i++) {
e80be0b0 4725 entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_KERNEL);
703da5a1
RV		 4726 if (NULL == entry) {
4727 vxge_debug_init(VXGE_ERR,
4728 "%s: mac_addr_list : memory allocation failed",
4729 vdev->ndev->name);
4730 ret = -EPERM;
e8ac1756 4731 goto _exit6;
703da5a1
RV		 4732 }
4733 macaddr = (u8 *)&entry->macaddr;
4734 memcpy(macaddr, vdev->ndev->dev_addr, ETH_ALEN);
4735 list_add(&entry->item, &vdev->vpaths[i].mac_addr_list);
4736 vdev->vpaths[i].mac_addr_cnt = 1;
4737 }
4738
914d0d71 4739 kfree(device_config);
eb5f10c2
SH		 4740
4741 /*
4742 * INTA is shared in multi-function mode. This is unlike the INTA
4743 * implementation in MR mode, where each VH has its own INTA message.
4744 * - INTA is masked (disabled) as long as at least one function sets
4745 * its TITAN_MASK_ALL_INT.ALARM bit.
4746 * - INTA is unmasked (enabled) when all enabled functions have cleared
4747 * their own TITAN_MASK_ALL_INT.ALARM bit.
4748 * The TITAN_MASK_ALL_INT ALARM & TRAFFIC bits are cleared on power up.
4749 * Though this driver leaves the top level interrupts unmasked while
4750 * leaving the required module interrupt bits masked on exit, there
4751 * could be a rougue driver around that does not follow this procedure
4752 * resulting in a failure to generate interrupts. The following code is
4753 * present to prevent such a failure.
4754 */
4755
7dad171c 4756 if (ll_config->device_hw_info.function_mode ==
eb5f10c2
SH		 4757 VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION)
4758 if (vdev->config.intr_type == INTA)
4759 vxge_hw_device_unmask_all(hldev);
4760
703da5a1
RV		 4761 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
4762 vdev->ndev->name, __func__, __LINE__);
4763
4764 vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
4765 VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
4766 vxge_hw_device_trace_level_get(hldev));
4767
7dad171c 4768 kfree(ll_config);
703da5a1
RV		 4769 return 0;
4770
e8ac1756 4771_exit6:
703da5a1
RV		 4772 for (i = 0; i < vdev->no_of_vpath; i++)
4773 vxge_free_mac_add_list(&vdev->vpaths[i]);
e8ac1756 4774_exit5:
703da5a1 4775 vxge_device_unregister(hldev);
7975d1ee 4776_exit4:
6cca2003 4777 pci_set_drvdata(pdev, NULL);
703da5a1 4778 vxge_hw_device_terminate(hldev);
6cca2003 4779 pci_disable_sriov(pdev);
703da5a1
RV		 4780_exit3:
4781 iounmap(attr.bar0);
4782_exit2:
dc66daa9 4783 pci_release_region(pdev, 0);
703da5a1
RV		 4784_exit1:
4785 pci_disable_device(pdev);
4786_exit0:
7dad171c 4787 kfree(ll_config);
703da5a1
RV		 4788 kfree(device_config);
4789 driver_config->config_dev_cnt--;
6cca2003 4790 driver_config->total_dev_cnt--;
703da5a1
RV		 4791 return ret;
4792}
4793
4794/**
4795 * vxge_rem_nic - Free the PCI device
4796 * @pdev: structure containing the PCI related information of the device.
4797 * Description: This function is called by the Pci subsystem to release a
4798 * PCI device and free up all resource held up by the device.
4799 */
2c91308f 4800static void __devexit vxge_remove(struct pci_dev *pdev)
703da5a1 4801{
2c91308f 4802 struct __vxge_hw_device *hldev;
6cca2003
JM		 4803 struct vxgedev *vdev;
4804 int i;
703da5a1 4805
d8ee7071 4806 hldev = pci_get_drvdata(pdev);
703da5a1
RV		 4807 if (hldev == NULL)
4808 return;
2c91308f 4809
6cca2003 4810 vdev = netdev_priv(hldev->ndev);
703da5a1 4811
2c91308f 4812 vxge_debug_entryexit(vdev->level_trace, "%s:%d", __func__, __LINE__);
2c91308f
JM		 4813 vxge_debug_init(vdev->level_trace, "%s : removing PCI device...",
4814 __func__);
703da5a1 4815
6cca2003 4816 for (i = 0; i < vdev->no_of_vpath; i++)
703da5a1 4817 vxge_free_mac_add_list(&vdev->vpaths[i]);
703da5a1 4818
6cca2003
JM		 4819 vxge_device_unregister(hldev);
4820 pci_set_drvdata(pdev, NULL);
4821 /* Do not call pci_disable_sriov here, as it will break child devices */
4822 vxge_hw_device_terminate(hldev);
703da5a1 4823 iounmap(vdev->bar0);
6cca2003
JM		 4824 pci_release_region(pdev, 0);
4825 pci_disable_device(pdev);
4826 driver_config->config_dev_cnt--;
4827 driver_config->total_dev_cnt--;
703da5a1 4828
2c91308f
JM		 4829 vxge_debug_init(vdev->level_trace, "%s:%d Device unregistered",
4830 __func__, __LINE__);
2c91308f
JM		 4831 vxge_debug_entryexit(vdev->level_trace, "%s:%d Exiting...", __func__,
4832 __LINE__);
703da5a1
RV		 4833}
4834
4835static struct pci_error_handlers vxge_err_handler = {
4836 .error_detected = vxge_io_error_detected,
4837 .slot_reset = vxge_io_slot_reset,
4838 .resume = vxge_io_resume,
4839};
4840
4841static struct pci_driver vxge_driver = {
4842 .name = VXGE_DRIVER_NAME,
4843 .id_table = vxge_id_table,
4844 .probe = vxge_probe,
4845 .remove = __devexit_p(vxge_remove),
4846#ifdef CONFIG_PM
4847 .suspend = vxge_pm_suspend,
4848 .resume = vxge_pm_resume,
4849#endif
4850 .err_handler = &vxge_err_handler,
4851};
4852
4853static int __init
4854vxge_starter(void)
4855{
4856 int ret = 0;
703da5a1 4857
75f5e1c6
JP		 4858 pr_info("Copyright(c) 2002-2010 Exar Corp.\n");
4859 pr_info("Driver version: %s\n", DRV_VERSION);
703da5a1
RV		 4860
4861 verify_bandwidth();
4862
4863 driver_config = kzalloc(sizeof(struct vxge_drv_config), GFP_KERNEL);
4864 if (!driver_config)
4865 return -ENOMEM;
4866
4867 ret = pci_register_driver(&vxge_driver);
528f7272
JM		 4868 if (ret) {
4869 kfree(driver_config);
4870 goto err;
4871 }
703da5a1
RV		 4872
4873 if (driver_config->config_dev_cnt &&
4874 (driver_config->config_dev_cnt != driver_config->total_dev_cnt))
4875 vxge_debug_init(VXGE_ERR,
4876 "%s: Configured %d of %d devices",
4877 VXGE_DRIVER_NAME, driver_config->config_dev_cnt,
4878 driver_config->total_dev_cnt);
528f7272 4879err:
703da5a1
RV		 4880 return ret;
4881}
4882
4883static void __exit
4884vxge_closer(void)
4885{
4886 pci_unregister_driver(&vxge_driver);
4887 kfree(driver_config);
4888}
4889module_init(vxge_starter);
4890module_exit(vxge_closer);
Ubuntu Artful kernel mirror